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An all-digital VLSI minimum shift keying modem

University of British Columbia

A general purpose all-digital VLSI minimum shift keying (MSK) modem with novel receiver synchronization capability is designed and implemented. The modulated output is binary and has a centre carrier frequency to bit rate ratio of 5.75. Demodulation is performed semicoherently using a one-bit observation interval. Other on-chip functions include carrier detection, automatic self-test, and internal loopback. Fabricated with 1.2 .tm CMOS standard cell technology, the chip can operate at a maximum clock speed of 50 MHz, rendering 0.19 Mbps binary transmission with the carrier centred at 1.1 MHz. Modulation is provided with a data-controlled square-wave generating digital circuit. No on-chip RAM is needed. This approach also has the advantages of robustness and phase stability. For ease of implementation, demodulation is accomplished with a binary quantized correlation-receiver. The theoretical BER performance of this discrete-time all-digital demodulator in AWGN with perfect synchronization is approximately 2 dB poorer than that of a continuoustime optimal detector. The demodulator’s susceptibility to imperfect carrier and bit synchronization is also formulated. Carrier phase recovery and bit timing extraction are provided by three novel first-order digital phase-locked loops (DPLLs). Owing to the special phase-detection techniques employed in these DPLLs, no front-end filtering structures are required. Markovian analyses of the error characteristics of these DPLLs are presented. A compact almost-all-digital modem unit based on the MSK modem chip is built to facilitate data communications over intrabuilding powerlines at 19.2 kbps using 105.6 kHz and 115.2 kHz carriers. The measured BER performance of this powerline modem in AWGN is approximately 2 dB below theoretical prediction. When used for transmission over actual intrabuilding powerline networks where impulse noises are prevalent, the modem’s performance depends on the powerline phase relationship between the transmit and receive points, powerline load profile, and, to a lesser extent, channel’s physical length. Under normal circumstances with a transmitter output level of 70 dBmV rms, the BER typically ranges from 10⁻² to 10⁻⁵ for cross phase transmission, while a BER of 10⁻⁵ or less may be attained for same-phase transmission.

Thesis/Dissertation

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2009-02-20

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http://hdl.handle.net/2429/4868

Electrical and Computer Engineering

University of British Columbia

UBCV

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