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Towards adaptive rendering of smooth primitives on GPUs Fung, Jennifer
Abstract
Higher order surface primitives enable artists to create smooth, complex objects by manipulating only a few control points and allow for the generation of smooth surfaces from a very compact representation. The implementation of higher order primitives on Graphics Processing Units (GPUs) has the potential to significantly reduce the bandwidth requirements across the graphics bus. Unfortunately, the GPU support for higher order primitives is still rudimentary. We present an adaptive, depth-first tessellation algorithm for smooth surfaces. The algorithm takes a set of Bezier control points and tessellates them according to criteria such as screen-space edge length. Other representations, such as subdivision surfaces, can be handled through preprocessing. The algorithm is designed to provide consistent, hole-free tessellations of adjacent patches. In addition, the polygons generated by the tessellator reside on a space filling curve on the 2D manifold of the surface. This guarantees the good memory coherence for both framebuffer and texture memory access. While the current implementation of the method is purely CPU-based, we believe it is suitable for hardware implementation on future generations of GPUs.
Item Metadata
Title |
Towards adaptive rendering of smooth primitives on GPUs
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Creator | |
Publisher |
University of British Columbia
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Date Issued |
2005
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Description |
Higher order surface primitives enable artists to create smooth, complex objects
by manipulating only a few control points and allow for the generation of
smooth surfaces from a very compact representation. The implementation of
higher order primitives on Graphics Processing Units (GPUs) has the potential
to significantly reduce the bandwidth requirements across the graphics bus.
Unfortunately, the GPU support for higher order primitives is still rudimentary.
We present an adaptive, depth-first tessellation algorithm for smooth surfaces.
The algorithm takes a set of Bezier control points and tessellates them according
to criteria such as screen-space edge length. Other representations, such
as subdivision surfaces, can be handled through preprocessing. The algorithm
is designed to provide consistent, hole-free tessellations of adjacent patches. In
addition, the polygons generated by the tessellator reside on a space filling curve
on the 2D manifold of the surface. This guarantees the good memory coherence
for both framebuffer and texture memory access. While the current implementation
of the method is purely CPU-based, we believe it is suitable for hardware
implementation on future generations of GPUs.
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Genre | |
Type | |
Language |
eng
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Date Available |
2009-12-15
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Provider |
Vancouver : University of British Columbia Library
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Rights |
For non-commercial purposes only, such as research, private study and education. Additional conditions apply, see Terms of Use https://open.library.ubc.ca/terms_of_use.
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DOI |
10.14288/1.0051168
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URI | |
Degree | |
Program | |
Affiliation | |
Degree Grantor |
University of British Columbia
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Graduation Date |
2005-11
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Campus | |
Scholarly Level |
Graduate
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Aggregated Source Repository |
DSpace
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Item Media
Item Citations and Data
Rights
For non-commercial purposes only, such as research, private study and education. Additional conditions apply, see Terms of Use https://open.library.ubc.ca/terms_of_use.