UBC Theses and Dissertations
Bidirectional resonant chargers for e-mobility Min, Jun
This thesis investigates the development of efficient bidirectional chargers, an integral component for advancing e-mobility. Electric vehicles (EVs), energized by renewable sources, could mitigate the power grid instability by returning stored energy when renewables are less available. Battery voltage in EVs, however, can vary widely based on the EV's application and its battery's State of Charge (SoC). This necessitates employing various bidirectional charger techniques that can handle a broad range of EV battery voltages when connected to the renewable energy grid. Three innovative techniques are proposed. Firstly, this work introduces the Asymmetric Parameters Methodology (APM), a technique that enables the design of asymmetric resonant tanks in bidirectional resonant CLLC DC/DC stages. APM, optimized through a statistical Design of Experiments (DoE) approach, results in a narrower bidirectional switching frequency range, reduced component current stress, and smaller transformer size. The second technique is a unified bidirectional resonant frequency tracking method for the CLLC DC/DC stage of battery chargers, which decreases bidirectional resonance tracking costs and complexity while enhancing efficiency under parameter deviations. It is based on the discovery of two interesting features of the CLLC converters: one, the maximum efficiency for charging and discharging modes occurs at a variable but bidirectionally identical resonant frequency. Two, the voltages at both ends of the resonant tank remain in phase at this frequency for bidirectional operations. This thesis introduces a third technique: a cascaded half-bridge-based multi-level multi-port bridgeless PFC rectifier for the AC/DC stage of chargers. Suitable for low-voltage battery charging, this technique divides high-voltage DC bus voltage into multiple low-voltage ports for the following CLLC DC/DC converter stage. This allows the transformer ratio of the DC/DC converter stage to be designed close to 1. Compared to cascaded full-bridge multi-level PFC, this approach cuts the number of switches per cell by half, while maintaining the same output ports. It also reduces input current ripple due to the reduction in volt-seconds on the boost inductor.
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