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On the design of low-power low-voltage circuits for smart stents Wang, Ziyu
Abstract
The main focus of this work is on the analysis and design of low-power low-voltage complementary metal-oxide-semiconductor (CMOS) integrated circuits for wirelessly powered implantable systems, in general, and with an emphasis on “Smart Stent” applications. In the context of smart stents, the goal is to collect and transmit sensory data from a stent, for example, the one that is implanted inside an artery or inside the ureter, for clinical diagnosis. The power for the electronic blocks on the “Smart Stent” is harvested from an optimized external radio-frequency (RF) source that enhances the local power density surrounding the implanted stent. As a proof-of-concept design, a commercially available coronary stent is used as the power receiving antenna for the circuits embedded on the implant, and the sys- tem functionality is fulfilled by customized circuit blocks implemented in CMOS technology. Low-power low-voltage circuit blocks are designed to minimize the power consumption of the overall system, and the interface between the stent and the CMOS die is co-designed for improving the in-vitro power transfer efficiency. A CMOS rectifier with a fully on-chip transformer-based tunable matching network is designed in a 0.13-μm CMOS process and the measurement results show that it can generate more than 500 mV DC voltage on a 2 kΩ load when the available power received by the stent is greater than −2 dBm, corresponding to 34% power conversion efficiency (PCE). An output capacitor-less low-dropout regulator (LDO) topology that can operate from a 0.58-to-0.9-V supply is also designed in the same 0.13-μm CMOS process. Furthermore, a low-power 5 GHz Class-D VCO is implemented. With 0.2-V supply voltage, only 280 μW is required by the oscillator core, and a figure of merit (FoM) of 192.5 dBc/Hz can be achieved. To validate the presented circuits and the design methodology, the operation of the complete system that consists of a proposed multi-port external RF source and the “Smart Stent” (stent and the proposed chip) is demonstrated in-vitro. The results of the wireless power transfer experiments show that with 480 mW transmitting power and 53 mm separation distance, more than 350 μW is delivered to the im- planted system.
Item Metadata
Title |
On the design of low-power low-voltage circuits for smart stents
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Creator | |
Supervisor | |
Publisher |
University of British Columbia
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Date Issued |
2021
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Description |
The main focus of this work is on the analysis and design of low-power low-voltage complementary metal-oxide-semiconductor (CMOS) integrated circuits for wirelessly powered implantable systems, in general, and with an emphasis on “Smart Stent” applications. In the context of smart stents, the goal is to collect and transmit sensory data from a stent, for example, the one that is implanted inside an artery or inside the ureter, for clinical diagnosis. The power for the electronic blocks on the “Smart Stent” is harvested from an optimized external radio-frequency (RF) source that enhances the local power density surrounding the implanted stent. As a proof-of-concept design, a commercially available coronary stent is used as the power receiving antenna for the circuits embedded on the implant, and the sys- tem functionality is fulfilled by customized circuit blocks implemented in CMOS technology. Low-power low-voltage circuit blocks are designed to minimize the power consumption of the overall system, and the interface between the stent and the CMOS die is co-designed for improving the in-vitro power transfer efficiency. A CMOS rectifier with a fully on-chip transformer-based tunable matching network is designed in a 0.13-μm CMOS process and the measurement results show that it can generate more than 500 mV DC voltage on a 2 kΩ load when the available power received by the stent is greater than −2 dBm, corresponding to 34% power conversion efficiency (PCE). An output capacitor-less low-dropout regulator (LDO) topology that can operate from a 0.58-to-0.9-V supply is also designed in the same 0.13-μm CMOS process. Furthermore, a low-power 5 GHz Class-D VCO is implemented. With 0.2-V supply voltage, only 280 μW is required by the oscillator core, and a figure of merit (FoM) of 192.5 dBc/Hz can be achieved. To validate the presented circuits and the design methodology, the operation of the complete system that consists of a proposed multi-port external RF source and the “Smart Stent” (stent and the proposed chip) is demonstrated in-vitro. The results of the wireless power transfer experiments show that with 480 mW transmitting power and 53 mm separation distance, more than 350 μW is delivered to the im- planted system.
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Genre | |
Type | |
Language |
eng
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Date Available |
2021-11-02
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Provider |
Vancouver : University of British Columbia Library
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Rights |
Attribution-NonCommercial-NoDerivatives 4.0 International
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DOI |
10.14288/1.0402933
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URI | |
Degree | |
Program | |
Affiliation | |
Degree Grantor |
University of British Columbia
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Graduation Date |
2022-05
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Campus | |
Scholarly Level |
Graduate
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Rights URI | |
Aggregated Source Repository |
DSpace
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Rights
Attribution-NonCommercial-NoDerivatives 4.0 International