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Elimination of slack bus iteration/droop bus iteration in sequential ac-dc power flow algorithm

University of British Columbia

High Voltage Direct Current (HVDC) transmission is a power transmission technology used for integrating large-scale renewable energy over long distances into AC grid. It uses power electronics technology to convert the electric power from AC systems into DC and then transmits this power over long distances and finally converts back DC into AC systems to inject power into AC grid. Current-Sourced Converters (CSC) and voltage-Sourced Converters (VSC) are two major converters deployed in HVDC. The Multi Terminal DC (MTDC) system is a DC grid having multiple terminals containing several converters connected to a common DC system. One converter end is connected to the DC grid and its other end is connected to the AC grid thus forming an integrated AC-DC grid. One converter regulates the constant DC voltage at the DC bus and is called as DC slack bus converter while the other converters regulate their power output to the AC grid. This DC slack bus also performs the voltage droop control function in combination with other converters to regulate DC grid voltage. These converters share power flows between DC and AC sides under two types of power flow algorithms, i.e., unified power flow and sequential power flow methods. This thesis focuses on sequential power flow algorithm to solve AC-DC power flow equations separately and in a sequence. The iterative solution of sequential AC-DC power flow algorithms requires solving extra iteration loop to find the unknown power losses in DC slack or droop bus converters. This extra iteration loop causes additional computational burden on the top of iterative solution. This thesis aims to eliminate Slack Bus Iteration (SBI) or Droop Bus Iteration (DBI) while preserving the accuracy of the AC-DC power flow results. The proposed algorithm brings modification in converter loss formula by applying the AC-DC power balance principle. Simulation results are based on IEEE New England 39-bus system with 6-bus DC grid and demonstrate the accuracy of proposed algorithm by comparing results with conventional algorithm and further can reduce the total computational burden by 11 % and 23 % with SBI and DBI elimination respectively.

Text

2020-10-21

Attribution-NonCommercial-NoDerivatives 4.0 International

http://hdl.handle.net/2429/76320

Electrical Engineering

University of British Columbia

UBCO

http://creativecommons.org/licenses/by-nc-nd/4.0/