UBC Theses and Dissertations

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UBC Theses and Dissertations

A fully-integrated complementary metal-oxide semiconductor receiver with avalanche photodetector Nayak, Spoorthi Gopalakrishna


Optoelectronic links play a key role in data-center, high-performance computing, sensor and biological applications. Photodetectors (PDs) are used at the front end of every optoelectronic receiver (RX). Traditionally, PDs are fabricated in expensive technologies to enhance their performance. However, wirebonding an external PD to a complementary metal-oxide-semiconductor (CMOS) RX or flip-chip assembly results in several issues – increase in manufacturing and packaging cost, possible decrease in yield, additional packaging parasitics degrading the sensitivity of the RX, crosstalk between the bondwires degrading RX performance, requirement for electro-static discharge (ESD) devices, etc. Some of the above problems can be surmounted by fabricating the PD in a CMOS process. However, CMOS PDs have very low responsivity. To improve the responsivity, the PD can be operated in the avalanche region where it has a higher current gain. But there are two major concerns – first, Avalanche PDs (APDs) require high bias voltage for its operation, and second, it is very sensitive to variations in operating conditions. Degradation in the APD performance can reduce RX bandwidth and sensitivity. In this thesis, we present an opto-electrical RX which incorporates on-chip APD, bias generation and stabilization for 850-nm optoelectronic interconnect applications. The proposed receiver consists of CMOS-APD, transimpedance amplifier (TIA), main amplifiers, offset correction loop and 50Ω buffers in the high speed path. APDs are designed and measured to have a -3 dB bandwidth (BW) of 3.5 GHz in 130nm CMOS process, and 6 GHz BW in 65 nm CMOS process, respectively. The electrical -3dB BW of RX, designed and measured in 130nm CMOS process, is approximately 4.5 GHz. A fully integrated APD-RX system is implemented in 130 nm CMOS process that also comprises of a control loop consisting of an analog-to-digital converter (ADC), synthesized controller, digital-to-analog converter (DAC) and voltage booster. The voltage booster biases the APD with a voltage higher than nominal supply voltages in CMOS, and the control loop stabilizes this bias voltage from temperature variations. On-chip APD based RX with bias generation and stabilization have tremendous potential in optoelectronic links due to inherent advantages of high gain, low cost, reduced ground-bounce and bond-wire parasitics.

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