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UBC Theses and Dissertations

A low-phase-noise mm-wave oscillator and its application in a low-power polar transmitter Nouri, Neda


Over the past decade, there have been substantial activities as well as changes in the design of high-speed radio-frequency millimeter-wave (mm-wave) integrated transceivers and their building blocks such as oscillators, mixers, low-noise amplifiers, and power amplifiers. One of the popular mm-wave frequency bands is the 7 GHz unlicensed band available around 60 GHz, which is attractive for a variety of applications including wireless local area networks(WLANs), short-range high data-rate wireless personal area networks (WPANs), and vehicular radar. One of the critical challenges in the design of 60 GHz integrated transceivers is the local oscillator signal generation. One of the main objectives of this thesis is to present and experimentally validate techniques to achieve better phase noise for high frequency oscillators, especially for high data rate applications. This thesis studies the phase noise performance of a new rotary-wave coupled oscillator. The presented oscillator is a traveling-wave oscillator with a reduced phase distortion. This oscillator hybridizes the standing-wave oscillator and travelling-wave oscillator to take advantage of the benefits of each structure, i.e., low phase noise and low power consumption. The structure of this circuit is based on a travelling-wave oscillator tapped with four standing-wave oscillators along a transmission line to accurately provide multiphase outputs. This oscillator produces eight phases, 45° apart from each other. A proof-of-concept prototype oscillator, fabricated in a 0.13-μm CMOS technology, provides a −17.5 dBm tone at 67 GHz and achieves a 5.2 GHz tuning range (8%) while it consumes 43.2 mW from a 1.2-V supply. The measured phase noise is −87 dBc/Hz (−102 dBc/Hz) at 1 MHz (10 MHz) offset. As an application for this type of oscillator, a circular quadrature-amplitude modulation (QAM) small-signal polar transmitter is proposed and a proof-of-concept 16-level QAM modulator is designed and simulated. In this architecture, the proposed oscillator has been combined with an 8-to-1 multiplexer and four-level variable-gain amplifier to implement the QAM transmitter. Based on the post-layout simulation results, (which are in an excellent agreement with measured results for the oscillator block) the transmitter consumes 25% less power as compared to state-of-the-art 60-GHz transmitters with comparable performance.

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