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Evaporated silicon thin-film transistors Salama, Clement Andre Tewfik 1966

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EVAPORATED SILICON THIN-EILM TRANSISTORS by CLEMENT ANDRE TEWPIE S A LAMA B.A.Sc , University of British Columbia, 1961 M.A.Sc., University of British Columbia, 1965 A THESIS SUBMITTED IN PARTIAL FULFILMENT OP THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OE PHILOSOPHY in the Department of Electricai Engineering We accept this thesis as conforming to the required standard Research Supervisor Members of Committee Department Head Members of the Department of Electrical Engineering THE UNIVERSITY OF BRITISH COLUMBIA June, 1966 In p r e s e n t i n g t h i s t h e s i s i n p a r t i a l f u l f i l m e n t o f the r e q u i r e m e n t s f o r an advanced deg ree a t the U n i v e r s i t y o f B r i t i s h C o l u m b i a , I a g r ee t h a t the L i b r a r y s h a l l make i t f r e e l y a v a i l a b l e f o r r e f e r e n c e and s t u d y . I f u r t h e r a g r ee t h a t p e r m i s s i o n f o r e x -t e n s i v e c o p y i n g o f t h i s t h e s i s f o r s c h o l a r l y p u r p o s e s may be g r a n t e d by the Head o f my Depar tment o r by h i s r e p r e s e n t a t i v e s . I t i s u n d e r s t o o d t h a t c o p y i n g o r p u b l i c a t i o n o f t h i s t h e s i s f o r f i n a n -c i a l g a i n s h a l l not be a l l o w e d w i t h o u t my w r i t t e n p e r m i s s i o n . Depa r tment The U n i v e r s i t y o f B r i t i s h C o l u m b i a Vancouve r 8, Canada The University of B r i t i s h Columbia FACULTY OF GRADUATE STUDIES PROGRAMME OF THE FINAL ORAL EXAMINATION FOR THE DEGREE GF . DOCTOR. OF PHILOSOPHY of C. ANDRE T. SALAMA B..A-.Sc, The University of B r i t i s h Columbia, 1961 M.A.Sc, The University of B r i t i s h Columbia, 1963 MONDAY, JUNE 20, 1966 AT 2:00 A.M. IN ROOM 228, HECTOR MacLEOD BUILpi.NG COMMITTEE IN CHARGE Chairman" H. D. Fisher J . Bichard M. M. Z. Kharadly E. V. Bohn E. Teghtsoonian F. K. Bowers L. Young External Examiner: R. R, Haering Department of Physics Simon Fraser University Burnaby Research Supervisor: L. Young EVAPORATED SILICON THIN-FILM TRANSISTORS ABSTRACT The method of fabrications the theory and the pro-pe r t i e s of evaporated s i l i c o n t h i n - f i l m t r a n s i s t o r s are discussed. The device consists of a p-type s i l i c o n f i l m (0.5 to 2 ytt-thick) on a sapphire substrate^ with aluminum source-drain electrodes evaporated onto the s i l i c o n and followed by a s i l i c o n oxide., S i O x S i n s u l a t i n g layer and an aluminum gate. The device operates by f i e l d - e f f e c t conductivity modulation of an n-type inversion layer at the surface of the p-£ype f i l m . The s i l i c o n films were evaporated by electron beam heating i n a t y p i c a l vacuum of 7 x 10"^ mm Hg at a rate of 200-600 l/min. The films exhibited s i n g l e c r y s t a l d i f f r a c t i o n patterns when deposited at a substrate tem-perature i n the range 1050°C to 1100°C. They were found to be high r e s i s t i v i t y ( > 400 SI - cm) p-type and the 2 hole mobility was of the order 20-30 cm /v o l t - s e c . The minority c a r r i e r l i f e t i m e was 1-2 /isec and the o p t i c a l absorption edge of the films was found to be broader than the absorption edge of sin g l e c r y s t a l s i l i c o n at a l l substrate temperatures. The low c a r r i e r mobility and minority c a r r i e r l i f e t i m e as well as the broadening of the o p t i c a l absorption edge are at t r i b u t e d to the presence of a lar;ge number of c r y s t a l l o g r a p h i c defects i n the films. The e f f e c t i v e surface state density at the Si/eva-porated SiO i n t e r f a c e was estimated by the-MOS technique X and was found to be of the same order of magnitude (3 -11 -2 4 x 10 cm ) as that at the Si/thermally grown Si02 i n t e r f a c e . The s i l i c o n surface p o t e n t i a l i n the MOS structure was found to be p a r t i c u l a r l y susceptible to water vapour and contamination by sodium. The s i l i c o n t h i n - f i l m t r a n s i s t o r s fabricated have t y p i c a l e f f e c t i v e m o b i l i t i e s of 5-10 cm^/volt-sec with transconductances as high as 100 /unho and gain bandwidth products up to 1 MHz. Surface trapping was found to a f f e c t the behavior of the devices at low gate voltages. The c h a r a c t e r i z a t i o n of the traps by a method which i n -volves measurements of the source-drain conductance, i t s temperature dependence and i t s transient response i s discussed. The e f f e c t of surface s c a t t e r i n g on the mo-b i l i t y at high gate voltages i s also considered. The device c h a r a c t e r i s t i c s were stable i n vacuum but d r i f t e d when exposed to the atmosphere. GRADUATE STUDIES F i e l d of Study:" E l e c t r i c a l Engineering - Applied Electromagnetic Theory E l e c t r o n i c Instrumentation Network Theory Servomechanisms Solid-State E l e c t r o n i c Devices Linear Active C i r c u i t s * Nonlinear" Active C i r c u i t s * A S o l i d State E l e c t r o n i c s * G. B. Walker F. K. Bowers A. D. Moore E. V. Bohn M. P. Beddoes - R. S. Pepper , R. Boothroyd-A. C English Related Studies: Numerical Analysis I Computer Programming Quantum Mechanics* S o l i d State Physics I* S o l i d State Physics I I * T. H u l l C, Froese S. Crawford E. L. Hahn E. L. Hahn University of C a l i f o r n i a , Berkeley PUBLICATIONS C.A.T. Salama, L. Young, "Evaporated s i l i c o n thin-film, t r a n s i s t o r s , " Proc. I.E.E.E,, V o l . 53, p.2156 1.965. C.A.T. Salama, "Stored charge f l i p - f l o p t r i g g e r i n g Proc. I.E.E.E., Vol 53, p. 416, 1965. M.P. Beddoes, C.A.T. Salama, "Series connected tunnel diode m u l t i l e v e l r e g i s t e r , " I.E.E.E. Trans, on-Elect. Comp., V o l . EC-13, p. 308, 1964. M.P. Beddoes, C.A.T. Salama, "Tunnel diodes," U.B.C. Engineer, V o l . 2, p. 18, 19627 ABSTRACT The method of fa b r i c a t i o n , the theory and the proper-t i e s of evaporated s i l i c o n t h i n - f i l m transistors are discussed. The device consists of a p-type s i l i c o n f i l m (0.5 to 2|i thick) on a sapphire substrate, with aluminum source-drain electrodes evaporated onto the s i l i c o n and followed by a s i l i c o n oxide, SiO , insulating layer and an aluminum gate. The device operates by f i e l d - e f f e c t conductivity modulation of an n-type inversion layer at the surface of the p-type f i l m . The s i l i c o n films were evaporated by electron beam -7 heating i n a t y p i c a l vacuum of 7 x 10 mm Hg at a rate of o 200-600 A/min. The films exhibited single c r y s t a l d i f f r a c t i o n patterns when deposited at a substrate temperature i n the range 1050°C to 1100°C. They were found to be high r e s i s t i v i t y ( > 400 f^-cm) p-type and the hole mobility was of the order of 20-30 cm /volt-sec. The minority c a r r i e r lifetime, was 1-2 p,sec and the o p t i c a l absorption edge of the films was found to be broader than the absorption edge of single c r y s t a l s i l i c o n at a l l substrate temperatures. The low c a r r i e r mobility and minority c a r r i e r l i f e t i m e as well as the broadening of the o p t i c a l absorption edge are attributed to the presence of a large number of crystallographic defects i n the f i l m s . The ef f e c t i v e surface state density at the S i / evaporated SiO interface was estimated by the MOS technique and was found to be of the same order of magnitude 11 —2 (3 - 4 x 10 cm" ) as that at the Si/thermally grown SiO,, interface. The s i l i c o n surface potential i n the MOS structure i i was found to "be p a r t i c u l a r l y s u s c e p t i b l e t o water vapour and contamination "by sodium. The s i l i c o n t h i n - f i l m t r a n s i s t o r s f a b r i c a t e d have t y p i c a l e f f e c t i v e m o b i l i t i e s o f 5-10 cm / v o l t - s e c w i t h t r a r \ s c o n -ductances as h i g h as 100 p,mho and gain-bandwidth products up to 1 MHz. Surface t r a p p i n g was found t o a f f e c t the behavior of the d e v i c e s at low gate v o l t a g e s . The c h a r a c t e r i z a t i o n of the t r a p s by a method which i n v o l v e s measurements of the s o u r c e - d r a i n conductance, i t s temperature dependence and i t s t r a n s i e n t response i s d i s c u s s e d . The e f f e c t o f s u r f a c e s c a t t e r i n g on the m o b i l i t y at h i g h gate v o l t a g e s i s a l s o considered. The device c h a r a c t e r i s t i c s were s t a b l e i n vacuum but d r i f t e d when exposed to the atmosphere. i i i TABLE OE CONTENTS Page LIST OE ILLUSTRATIONS v i i LIST OF TAB HE S e t t » e D e % « o * O 0 o a e « e f t » » » 9 « ? o o » » « » o * * B 3£ LIST OF SYMBOLS x i ACKNOWLEDGEMENT x i v 1. INTRODUCTION 1 1.1 Integrated C i r c u i t s 1 1.2 Types of Thin-Film A c t i v e Devices on I n s u l a t i n g Substrates 2 1.5 Thin-Film F i e l d - E f f e c t T r a n s i s t o r s 4 1.4 S i l i c o n Thin-Film T r a n s i s t o r s : Structure and Operation 8 1.5 Elementary P h y s i c a l Theory of the Insulated-Gate F i e l d - E f f e c t T r a n s i s t o r 9 1.6 Equivalent C i r c u i t of the Insulated-Gate F i e l d -E f f e c t T r a n s i s t o r 18 1.7 C i r c u i t A p p l i c a t i o n s of the TFT 20 1.8 Factors I n f l u e n c i n g the Design and Performance of the TFT 22 2. PREPARATION AND PROPERTIES OF THIN FILMS OF SILICON 25 2.1 I n t r o d u c t i o n 25 2.2 Vacuum Evaporation of S i l i c o n 28 2.5 Choice of the Evaporation Parameters 50 2.5.1 Choice of the substrate .............. 50 2.5.2 The substrate temperature and the evaporation r a t e 55 2.5.5 The ambient and source p u r i t y ........ 55 2.5.4 The f i l m thickness 54 2.5.5 The source doping • 54 i v Page 2.4 Apparatus ...... „ ..«•...» 34 2.4.1 The vacuum system and the evaporation assembly 34 2.4.2 Performance of the system 41 2.5 Experimental Procedure 41 2.5.1 Substrate p r e p a r a t i o n 41 2.5.2 The experimental r u n 41 2.5.3 The s u b s t r a t e temperature 42 2.6 Determination of the Thickness of S i l i c o n T h i n F i l m s 44 2.7 S t r u c t u r a l P r o p e r t i e s of the F i l m s 46 2.8 E l e c t r i c a l P r o p e r t i e s of the F i l m s 51 2.8.1 C o n d u c t i v i t y type determination 51 2.8.2 R e s i s t i v i t y and H a l l e f f e c t measurements 51 2.8.3 M i n o r i t y c a r r i e r l i f e t i m e .............. 54 2*9 O p t i c a l A b s o r p t i o n Edge of the S i l i c o n F i l m s .. 56 2.10 Summary 59 STUDY OF THE CHARACTERISTICS OF THE SILICON/EVAPORATED SiO INTERFACE 60 x 3.1 P r i n c i p l e s o f the MOS Method 61 3.2 Experimental Procedure 64 3.3 Experimental R e s u l t s 66 3.4 Summary ............................ 68 SILICON THIN-FILM TRANSISTORS 72 4.1 Device F a b r i c a t i o n 72 4.1.1 The s o u r c e - d r a i n c o n t a c t s 73 4.1.2 The i n s u l a t i n g l a y e r 75 4.1.3 The gate e l e c t r o d e 76 Page 4.2 Experimental R e s u l t s 76 4.2.1 V-I C h a r a c t e r i s t i c s of the s o u r c e - d r a i n c o n t a c t s 76 4.2.2 Operating c h a r a c t e r i s t i c s of the s i l i c o n TFTs 76 4.2.3 Comparison of the s i m p l i f i e d theory w i t h experiments 80 4.3 The Source-Drain Conductance 91 4.3.1 T h e o r e t i c a l model to account f o r t r a p p i n g e f f e c t s on the s o u r c e - d r a i n conductance 91 4.3.2 Comparison of the mo d i f i e d theory of the s o u r c e - d r a i n conductance w i t h e x p e r i -ments ........... 96 4.4 Surface M o b i l i t y 100 4.5 S t a b i l i t y 107 4.6 Summary 108 5. CONCLUSION ' I l l REFERENCES 113 v i LIST OP ILLUSTRATIONS F i g u r e 1-1 T h i n - F i l m Triddes Deposited on I n s u l a t i n g Substrates ........................**.•••< 1-2 Two Forms of the Insulated-Gate F i e l d - E f f e c t T r a n s i s t o r on I n s u l a t i n g Substrates ........ 7 1-3 S i l i c o n T h i n - F i l m F i e l d - E f f e c t T r a n s i s t o r .. 7 1-4 The I d e a l i z e d Geometry of the S i l i c o n TFT .. 11 1-5 The T h e o r e t i c a l D r a i n C h a r a c t e r i s t i c s of an n-Channel T h i n - F i l m T r a n s i s t o r . . . 14 1-6 Cross S e c t i o n a l Model Of the T r a n s i s t o r Under S a t u r a t i o n C o n d i t i o n s 16 1- 7 I n t r i n s i c C i r c u i t Model f o r the Insulated-Gate F i e l d - E f f e c t T r a n s i s t o r 19 2- 1 L i n e a r C o e f f i c i e n t of Thermal Expansion f o r S i l i c o n and Ceramic Substrates as a F u n c t i o n of Temperature 32 2-2 The S i l i c o n E v a p o r a t i o n System 35 2-3 The Ev a p o r a t i o n Assembly 37 2-4 The Substrate Holder 39 2-5 The Source Holder 39 2-6 The Substrate Changer and the Source Holder 40 2-7 The Pressure Performance of the System d u r i n g a T y p i c a l Run . .43 2-8 Chart f o r Determining the Thickness of S i l i c o n F i l m s by Near I n f r a r e d I n t e r f e r e n c e 45 2-9 Near I n f r a r e d I n t e r f e r e n c e P a t t e r n f o r a T h i n S i l i c o n F i l m 47 2-10 Micrographs Showing the Surface S t r u c t u r e of Deposited Layers ( m a g n i f i c a t i o n x 1200) .... 49 2-11 R e f l e c t i o n E l e c t r o n D i f f r a c t i o n P a t t e r n s f o r S i l i c o n F i l m s Deposited at Vario u s Substrate Temperatures 50 2-12 Indexed D i f f r a c t i o n P a t t e r n s f o r a S i l i c o n F i l m v i i Figure Page (a) I d e n t i f i c a t i o n of P a t t e r n i n Figure 2- l l ! ( d ) (magnified) (b) and (c) I d e n t i f i c a t i o n of Patterns Taken at D i f f e r e n t O r i e n t a t i o n of the F i l m w i t h Respect to the E l e c t r o n Beam 52 2- 13 The E f f e c t of Substrate Temperature on the Absorption Edge of S i l i c o n 58 3- 1 The MOS Structure 61 3-2 The Energy Bands i n an MOS Structure Under Applied Gate Bias 65 3-3 Diagram of C-V Measurement Equipment 65 3-4 Determination of the Surface State Density by Comparison of the Experimental Character-i s t i c w i t h the Theory f o r p-type S i l i c o n .. 67 3- 5 E f f e c t of Ambient on the C-V Character--i s t i c s 70 4- 1 Photograph of a S i l i c o n Thin F i l m T r a n s i s t o r 73 4-2 Photograph of the A l , SiO Evaporation Set-up * 74 4-3 V D - Ij. C h a r a c t e r i s t s of the Source-Drain Contacts 78 4-4 Operating Vw -. T-, C h a r a c t e r i s t i c s f o r a S i l i c o n TFT ... 79 4-5 Operating V^ - I-. C h a r a c t e r i s t i c s f o r a S i l i c o n TFT 79 4-6 S a t u r a t i o n V-p - 1^ C h a r a c t e r i s t i c s 81 4-7 Operating V D - 1^ C h a r a c t e r i s t i c s f o r a TFT Fabricated on a P o l y c r y s t a l l i n e S i l i c o n F i l m 82 4-8 Operating V D - 1^ C h a r a c t e r i s t i c s f o r a TFT Showing the Breakdown Region 82 4-9 S i m p l i f i e d Diagram of the Set-up Used i n the Transconductance vs Gate Voltage Measure-ments 83 4-10 Experimental P l o t of V I D S vs V & 85 v i i i F i g u r e Page 4-11 Experimental Transconductance vs Gate Voltage C h a r a c t e r i s t i c s 86 4-12 Experimental Channel Conductance vs Gate Voltage 87 4-13 Normalized Transconductance and Phase as a F u n c t i o n of Frequency 90 4-14 C i r c u i t Used i n Measuring T r a n s i e n t Response of the Source D r a i n Conductance 98 4-15 T h e o r e t i c a l and Experimental Channel Conduc-tance vs Gate Voltage C h a r a c t e r i s t i c 99 4-16 Temperature Dependence of the Channel Conductance 101 4-17 (a) T r a n s i e n t Response of the Source-Drain Conductance to a R e p e t i t i v e Pulse (b) R e l a x a t i o n Waveform at the Termination of the Pulse 102 4-18 Temperature Dependence of the E l e c t r o n E m i s s i o n Time Constant 103 4-19 Surface M o b i l i t y as a F u n c t i o n of l / F r a .... 106 4-20 H y s t e r e s i s Loops i n the D r a i n C h a r a c t e r i s t i c s of the TFT 109 i x LIST OF TABLES Table Page 2-1 Crystal Structure and Lattice Constants f o r S i l i c o n and Some Single Crys t a l Substrates .. 31 2- 2 R e s i s t i v i t y and Mobility f o r S i l i c o n Films Deposited at Various Substrate Temperatures . 55 3- 1 Characteristics of Typical MOS Samples 69 x LIST OF SYMBOLS the t o t a l oxide capacitance over the channel area the oxide capacitance per unit area the s i l i c o n space charge capacitance per unit area the t o t a l capacitance per unit area of the MOS structure the thickness of the s i l i c o n f i l m the energy l e v e l of the conduction hand edge the energy l e v e l of the valence hand edge the equilibrium Fermi l e v e l the i n t r i n s i c energy l e v e l the i o n i z a t i o n energy of the traps the surface e l e c t r i c f i e l d normal to the channel the longitudinal e l e c t r i c f i e l d along the channel the i n i t i a l occupancy of the traps at zero gate voltage the source-drain conductance the source-drain conductance at zero source-drain voltage the source-drain conductance i n the saturation region the transconductance the.transconductance i n the saturation region the e f f e c t i v e thickness of the inversion layer the dc source-drain current the dc source-drain current i n the saturation region the length of the channel magnitude of the electronic charge the acceptor impurity concentration the e f f e c t i v e volume density of free c a r r i e r s i n the conduction band x i Nj. = the density of surface traps per unit area n = the t o t a l electron density per unit area n' = the volume density of conduction electrons i n the c inversion layer n = the surface density of conduction electrons i n the inversion layer n = the equilibrium surface density of conduction electrons co at zero gate voltage n / \ = the electron density per unit area i n the channel at a s ^ x ' distance x from the source n^ = the surface density of trapped c a r r i e r s n-j = the volume density of c a r r i e r s present i n the semi-conductor when the Fermi l e v e l i s at the trap l e v e l n-, = the eff e c t i v e surface density of c a r r i e r s present i n the semiconductor when the Fermi l e v e l i s at the trap l e v e l Q = the s i l i c o n space charge density per unit area s Q = the surface state charge density per unit area SS Qm = the t o t a l charge per unit area i n i t i a l l y present i n the source drain region at zero gate voltage r = the surface r e f l e c t i v i t y = the rate at which electrons are trapped per unit area <d = the rate at which electrons are emitted from the traps e per unit area S = the cross sectional area of the traps T = the temperature i n 0 K t = the thickness of the oxide ox t = the o p t i c a l transmission through the specimen V = qn /C c ^ c' 0 VJJ = the dc source-drain voltage Vpg = the dc source-drain voltage i n the saturation region YQ = the dc gate to source voltage x i i V T = the threshold gate voltage to turn-on or - o f f a channel \ - 4 V ° o v l = <iV0o v = the thermal v e l o c i t y of the ca r r i e r s W = the width of the channel x = the distance measured p a r a l l e l to the oxide-semiconductor interface y = the distance measured ^perpendicular to the oxide-semiconductor interface a - the o p t i c a l absorption c o e f f i c i e n t of the f i l m e Q x = the per m i t t i v i t y of the oxide e 3 i = P e r m l t t i v i t y of the s i l i c o n 0 s = the s i l i c o n surface potential M^S = ^ e m e"kal-semiconductor work function p = the r e s i s t i v i t y of the f i l m <J"n = the conductivity of the channel T = the electron emission time constant from the traps e ^ = the index of r e f r a c t i o n of the f i l m u- = the ef f e c t i v e electron mobility i n the channel x i i i ACKNOWLEDGEMENT The author i s indebted to Dr. L. Young fo r his help and guidance throughout the course of t h i s investigation. Grateful acknowledgement i s also given to Drs. J. Bichard, E.V. Bohn, F.K. Bowers, M.M.Z. Kharadly and E. Teghtsoonian f o r reading the manuscript and fo r t h e i r many he l p f u l suggestions. The author i s also gr a t e f u l to Dr. D. Troman fo r his discussion of the electron d i f f r a c t i o n patterns, Dr. F. Zobel for making the ellipsometry measurements, Messrs. C. Chubb, A. Horn, E. Huff, A. MacKenzie, N. Owen, H. Stuber f o r t h e i r technical help, Mr. T. Clark of the B.C. Research Council f o r the microbalance weight measurements, Dr. F. Murray of the B.C. Research Council f o r the use of the Cary spectrophotometer and Misses B. Rydberg and H. Thomson for typing the thesis. Grateful acknowledgement i s given to the National Research Council for a studentship awarded i n 1964- and 1965. The work described i n thi s thesis was supported by the Defence Research Board under contract (ECRDC T65A) and the National Research Council under Grant A-68. x i v EVAPORATED SILICON THIN-FILM TRANSISTORS 1. INTRODUCTION 1.1 Integrated C i r c u i t s Integrated c i r c u i t s require the combination of passive and active electronic devices on a single substrate. Active devices offer the best performance when fabricated on a semi-conductor single c r y s t a l substrate while the best passive elements are fabricated on an ins u l a t i n g s u b s t r a t e . T h e i r combination i n integrated c i r c u i t s has so f a r meant compromising the performance of each. In monolithic s i l i c o n integrated c i r c u i t s , the c i r c u i t elements have to be e l e c t r i c a l l y isolated from each other. The reverse biased p-n junction i s the most common method of i s o l a t i o n . ^ It i s inadequate at high frequencies where the coupling capacitances become important and i t tends to suffer from dc effects such as junction leakage, inversion layers and unwanted t r a n s i s t o r and p-n-p:-n e f f e c t s . Several methods have been proposed to a l l e v i a t e the li m i t a t i o n s inherent i n p-n junction i s o l a t i o n i n monolithic integrated c i r c u i t s . One method i s the so ca l l e d "insulated (2) i s o l a t i o n " v ' where an ins u l a t i n g layer of s i l i c o n dioxide or high r e s i s t i v i t y p o l y c r y s t a l l i n e s i l i c o n separates the components from each other and from the s i l i c o n substrate. This technique involves a large number of processing steps and i s s t i l l at the experimental stage. Good e l e c t r i c a l i s o l a t i o n can also be achieved by assembling discrete s i l i c o n t r a n s i s t o r chips and 2 t h i n f i l m passive components mounted on insulating substrates. The disadvantage of t h i s method i s the high assembly cost associated with the handling of many separate chips and the making of a large number of interconnections. An alternative approach which offers i d e a l i s o l a t i o n and s i m p l i f i e d f a b r i c a t i o n procedure consists of depositing a l l components active and passive upon an i n s u l a t i n g substrate i n the form of t h i n films ( < 10 u t h i c k ) . The rate of development of t h i s approach has been limited by the properties of the available t h i n - f i l m active devices on i n s u l a t i n g substrates. 1.2 Types of Thin-Film Active Devices on Insulating Substrates Four types of t h i n - f i l m active devices have been proposed. The f i r s t type i s a conventional bipolar t r a n s i s t o r fabricated using a technology compatible with thin f i l m techni-(•5) ques. Rasmanis attained some success by c r y s t a l l i z i n g s i l i c o n layers evaporated on molten glass substrates and f a b r i c a t i n g diffused junction transistors within these layers as shown i n Figure l - X a i The c h a r a c t e r i s t i c s of these transistors were adversely affected by the presence i n the films of c r y s t a l l o -graphic defects which acted as additional recombination centers i n the base, thus decreasing the current gain. The second type of device i s based on the transport of hot-carriers i n t h i n metal f i l m s . T h e operation of the two hot-carrier triodes, i l l u s t r a t e d i n Figure l v l ( b ) and l * - l ( c ) , i s s i m i l a r to that of a conventional bipolar t r a n s i s t o r except that the base i s a metallic f i l m which i s t h i n enough to transmit 3 —SILICON (a) CONVENTIONAL BIPOLAR JUNCTION TRANSISTOR METAL COLLECTOR S.C. COLLECTOR INSULATOR /////Ssss////s/sss-r.rssss_fy. INSULATING SUBSTRATE THIN METAL BASE INSULATOR METAL EMITTER METAL CONTACT S.C. EMITTER INSULATING SUBSTRATE ro; TUNNEL-EMITTER TRIODE (c) SEMICONDUCTOR METAL- EMITTER TRIODE METAL COLLECTOR Ji METAL GRID £ INSULATOR INSULATING SUBSTRATE METAL EMITTER SEMICONDUCTOR INSULATOR METAL METAL GATE METAL DRAIN SOURCE INSULATING SUBSTRATE (d) "ANALOG" TRIODE (e) SPACE CHARGE-LIMITED TRIODE Figure 1*1 Thin-Film Triodes Deposited on Insulating Substrates 4 hot-electrons from the emitter to the c o l l e c t o r . These two triodes d i f f e r however i n the structure of the emitter and the mechanism of hot-carrier i n j e c t i o n into the metal base. In the tunnel-emitter t^iode (Figure 2ifcL(b)), the carriers'are injected into the base by tunneling through the insulator separating the emitter from the base. In the semiconductor-metal emitter triode (Figure I?£L(Q)), the c a r r i e r s are injected into the base by Schottky emission from the semiconductor. These triodes are s t i l l at an early experimental stage due to the d i f f i c u l t y enoountered i n growing t h i n enough metal films free from pinholes. The t h i r d type of device involves the flow of space-(tx) change-limited currents ' i n a wide band gap semi-insulating material and i s i l l u s t r a t e d i n Figures ;:^l(d)uahd(ii-l(e:)?. i. This approach has received considerable t h e o r e t i c a l attention and has yielded experimental t h i n - f i l m devices having useful c h a r a c t e r i s t i c s . ^ ^ The operation of the fourth type of device i s based on the modulation of the conductivity of a semiconductor f i l m by f i e l d effect. Since a l l of the devices mentioned are s t i l l being a c t i v e l y investigated, no attempt w i l l be made here to evaluate t h e i r ultimate merits. The ensuing work w i l l be con-cerned with a t h i n - f i l m version of the insulated-gate f i e l d -effect t r a n s i s t o r . 1 . 3 Thin-Film F i e l d - E f f e c t Transistors The f i r s t attempts to r e a l i z e active sol i d - s t a t e devices operating on the f i e l d - e f f e c t p r i n c i p l e appear to have ( 7 ) "been undertaken by L i l i e n f e l d v ' i n 1933 > and independently "by (8) H e i l v ' i n 1935. The most relevant early reference of the (9) device i s a note hy Shockley and Pearson on conductivity modulation which appeared i n 1948, and i n which the conductivity of a t h i n germanium f i l m was modulated by an e l e c t r i c f i e l d perpendicular to the f i l m surface. Considerably smaller con-du c t i v i t y modulation than expected was found, and t h i s discrep-ancy was interpreted as due to a high concentration of charge trapped i n s t a t e s a t the semiconductor surface i The role of surface states i n l i m i t i n g the observed modulation was so convincingly demonstrated that f o r many years t h i s much-quoted experiment served as warning against any attempt to use the insulated gate structure i n a p r a c t i c a l t r a n s i s t o r . The f i e l d effect however became a most useful t o o l i n the study of the electronic properties of semiconductor surfaces. An alternative approach to an active solid-state f i e l d - e f f e c t device was conceived by S h o c k l e y w h o circumvented the problem of surface states by using a reverse biased p-n junction as the f i e l d - e f f e c t (12) electrode. This t r a n s i s t o r was r e a l i z e d by Dacey and Ross i n 1953 and became available commercially i n 1959. The obstacles which delayed the progress towards a p r a c t i c a l surface-controlled f i e l d - e f f e c t t r a n s i s t o r were the lack of s t a b i l i t y of the surface and the high density of surface states (of the order of 10 /cm ). In 1959» the success of A t a l l a v J l and his co-workers i n passivating s i l i c o n surfaces by means of thermally-grown oxide and reducing the density of 11 2 states at the s i l i c o n / s i l i c o n dioxide interface to 10 /cm , revived the interest i n the:insulated-gate t r a n s i s t o r , and led to the r e a l i z a t i o n of the f i r s t surface f i e l d - e f f e c t t r a n s i s t o r on bulk s i l i c o n by At a l i a and K a h n g ^ 1 4 ^ 1 5 ^ i n I960. Since then considerable work has been carried out on t h i s type of tr a n s i s t o r and as a r e s u l t these t r a n s i s t o r s have been commer-c i a l l y available for the past two years and are commonly known as the metal/oxide/se,miconductor (MOS) t r a n s i s t o r s . In 1961, the f i r s t insulated-gate t h i n - f i l m t r a n s i s t o r (TFT) deposited by evaporation techniques on an i n s u l a t i n g substrate was reported by W e i m e r ^ 1 ^ ^ w h o used cadmium sul f i d e t h i n films as the semiconducting material. Cadmium s e l e n i d e / 1 8 ^ t e l l u r i u m ^ 1 ^ and lead s u l f i d e ^ 2 0 ^ have also been used successfully. The coplanar electrode structure f o r these devices i s shown i n Figure l - 2 ( a ) . Another version of the insulated-gate f i e l d - e f f e c t t r a n s i s t o r formed i n the surface of p y r o l y t i c a l l y deposited single c r y s t a l films of s i l i c o n has been reported K Jt\**Jt This device, shown i n Figure l~2(b), i s fabricated by standard d i f f u s i o n and photoetching techniques and i s i d e n t i c a l i n structure to the MOS t r a n s i s t o r . The devices described i n t h i s thesis are s i l i c o n (21) insulated-gate f i e l d - e f f e c t TFTs v "' fabricated by evaporation on sapphire substrates. These devices are similar i n structure to Weimer's TFTs and possess the common advantage of being fabricated by the same techniques used i n the production of passive t h i n f i l m c i r c u i t s . S i l i c o n was chosen as the semiconductor f i l m to investigate: (1) the p o s s i b i l i t y of achieving high mobility i n the films and therefore high gain i n the tr a n s i s t o r s , 7 METAL SOURCE SEMICONDUCTOR (CdS.CdSe.Te.PbS) METAL GATE EVAPORATED INSULATOR (SiO. Ca F2) ETAL DRAIN INSULATING SUBSTRATE (a) WEIMER'S TFT THERMALLY GROWN SiO2 M E T A L G A T E Figure 1-2 SOURCE-n- TYPE SURFACE CONDUCTING CHANNEL HEAVILY DOPED DIFFUSE N REGIONS I SAPPHIRE SUBSTRATE -DRAIN ~P-TYPE EPITAXIAL SILICON FILM (b) MOS TRANSISTOR Two Forms of the Insulated-Gate Field-Effect Transistor on Insulating Substrates ALUMINUM DRAIN ELECTRODE (<^0i/j THICK) ALUMINUM GATE (n,o-1/i THICK) SiOx INSULATOR (^O-l-O-2/j THICK) ALUMINUM DRAIN ELECTRODE (n,0-1jj THICK) EVAPORATED P-TYPE SILICON FILM (^0-5-2p THICK) Figure 1~3 Silicon Thin-Film Field-Effect Transistor 8 (2) the p o s s i b i l i t y of developing a method of preparation and integration of good active and passive components on insulating substrates while at the same time u t i l i z i n g the large amount of technology available f o r s i l i c o n . This thesis deals with the structure, the operation, the theory and the factors a f f e c t i n g the performance of the s i l i c o n TFTs. 1.4 S i l i c o n Thin-Film Transistor: Structure and Operation The basic device structure i s shown i n Figure 1-3. The device consists of a t h i n f i l m of p-type s i l i c o n deposited on a sapphire substrate. Aluminum source-drain electrodes are evaporated onto the s i l i c o n followed by a s i l i c o n oxide insulating layer and an aluminum gate. The structure and the mechanism involved i n the operation of the s i l i c o n TFT and Weimer's TFT are very s i m i l a r . Both devices operate by modulation of the conductivity of a surface channel by f i e l d e f f e c t . The source-drain electrodes must make ohmic contacts to that surface channel. However, i n the present s i l i c o n TFT the conducting channel i s an n-type inversion layer at the surface of the p-type f i l m . The contacts must therefore be minority c a r r i e r (electron) i n j e c t i n g contacts with respect to the f i l m . In the case of Weimer's TFT the conducting channel i s an accumulation layer Of the same conductivity type (n-type f o r CdS) as the f i l m and the contacts are ohmic with respect to the f i l m . The TFTs are high input impedance devices having 9 saturated pentode-like c h a r a c t e r i s t i c s t y p i c a l of a f i e l d - e f f e c t t r a n s i s t o r . The insulated gate can he biased either p o s i t i v e l y or negatively with respect to the source without drawing current and two modes of operation are therefore possible. (a) Enhancement mode i n which the drain current i s substantially zero and increases by many orders of magnitude as the gate voltage i s raised from zero to several v o l t s positive with respect to the source. (b) Depletion mode i n which useful drain current flows at zero gate bias, i n t h i s case a negative voltage i s required to pinch-off the source-drain current. 1.5 Elementary Physical Theory of the Insulated-G-ate F i e l d - E f f e c t Transistor The purpose of thi s section i s to give a b r i e f ( 2 4 — 2 8 ) review of the elementary theory v ' of the insulated-gate f i e l d - e f f e c t t r a n s i s t o r pointing out the simplifying assumptions which have come into common use i n analyzing the cha r a c t e r i s t i c s of these devices. The simple physical model used i n the analysis i s based on the following assumptions. (1) The mobility of the ca r r i e r s i s assumed to be constant independent of the gate or source-drain f i e l d . (2 ) The gradual channel approximation i s assumed to hold. In thi s approximation the rate of change of the f i e l d along the channel i s very small compared to the rate of change of the gate f i e l d normal to the channel. This approximation permits the solution of Poisson's equation i n one dimension leading to a channel conductivity which i s a function of the applied gate f i e l d . (3) The eff e c t i v e channel depth i s very small com-pared to the thickness of the oxide so that most of the potential drop "between the gate and channel appears across the oxide. (4) The trapping effects are neglected. (5) The metal-semiconductor work function difference i s neglected. (6) The gate capacitance i s assumed to "be independent of gate voltage. The device structure and the coordinate axes used i n the analysis are shown i n Figure 1-4. The source-drain electrodes make ohmic contacts to the inversion layer which i s present at zero gate voltage. The potentials applied to the gate and drain electrodes are and V-^  respectively. The potential of the semiconductor at any point x from the source electrode i s given by V(x). The source-drain current I D i s given by: JJ> = ° n F x • 11 fl- TYPE CHANNEL (a) CROSS-SECTIONAL VIEW GATE DRAIN SOURCE INSULATOR P-TYPE SILICON (b) ELECTRODE STRUCTURE F i g u r e 1*4 The I d e a l i z e d Geometry of the S i l i c o n TFT 12 where c~ n i s the channel conductivity, P i s the e l e c t r i c f i e l d strength between source and x drain q i s the magnitude of the electronic charge, u- i s the effective electron mobility i n the channel, W i s the width- of the channel, and n (x) i s the electron concentration per unit area s i n the channel at a distance x from the source. The r e l a t i o n between the surface charge density qn (x) and the s t o t a l applied gate voltage i s given by: qn H s (x) = C q [V G - V(x)] + Q T (1-2) where: C Q i s the capacitance per unit area of the gate oxide layer capacitor i s given by C Q = e 0 X A 0 X > e Q x i s the per m i t t i v i t y of the oxide and t i s the thickness of the oxide layer, and Q^ j, i s the t o t a l charge per unit area present at zero gate voltage i n the source-drain region. Substituting f o r qn (x) i n equation (1-1) and integrating between s x = 0 and x = L we get: I D dx = \ qu-n ¥ n s(x) dV(x), 0 J 0 u-n ¥ [ C o ( V G - V(x)) + Q T] dV(x), (1-3) \x C W r n o o Ll C r n g 13 (1-4) (1-5) where C = C WL i s the oxide capacitance over the channel g o area, and Vrp = - Qrp/0Q i s the threshold voltage required for the onset of drain current. V"T i s positive f o r enhancement mode operation and negative for depletion mode. In the fa b r i c a t i o n of TFTs one should be able to control the threshold voltage V"T to within a specified range. This voltage i s determined to a large extent by the surface state charge density and the bulk charge density. Usually the surface states ( 2 7 ) contribution dominates over the bulk charge. The drain ch a r a c t e r i s t i c s given by equation (1-5) are v a l i d only f o r gradual channels, i . e . up to the knee of the Ip vs ch a r a c t e r i s t i c . The r e s u l t i n g c h a r a c t e r i s t i c s are shown by the heavy l i n e s i n Figure l r - 5 . As the drain voltage V D i s increased beyond the knee and the gate voltage i s kept constant at some value greater than V T the channel i s pinched o f f near the drain. The pinch-off condition at which the gradual channel approximation f a i l s and equation (1-5) ceases to be v a l i d corresponds approximately to the condition of maximum drain current and may be obtained by setting (-?TTT-) = 0 from which we get: Figure 1-5 The Theoritical Drain Characteristics of an n-Channel Thin Film Transistor 1 5 ( 1 - 6 ) The drain current at pinch-off i s given by: C . Q C 2 ^ VG V ~ „ T 2 VDS * ( 1 - 7 ) I f the drain voltage i s further increased beyond the pinch-off voltage given by equation ( 1 - 6 ) , the pinch-off region lengthens into the channel from the drain as i l l u s t r a t e d i n Figure 1*6 which shows the potential r i s e along the channel from source to drain f o r V-^ > (VQ_ - V ^ ) . In region I, near the source, where the channel potential i s less than the gate potential, an inversion layer i s present. In region II the inversion layer i s progressively pinched-off. In region I I I , near the drain, where the channel potential exceeds (VQ - V,p)the channel i s completely pinched-off but current flow i s maintained by the high f i e l d and the i n j e c t i o n of minority c a r r i e r s into t h i s space from region I I . Current flow i n regions I and II i s ohmic while i n region III i t i s space charge or emission limited. Most of the additional drain voltage i n excess of ( V & - V ^ ) , appears across the length of the pinched-off region and results i n very l i t t l e increase i n drain current. An increase i n the drain current does occur as predicted from equation ( 1 - 7 ) since the length of the channel i s now e f f e c t i v e l y shorter. An accurate ca l c u l a t i o n of the length of the pinched-off region i s not possible i n the gradual channel approximation. In the elementary theory, the drain current i n the region V D ^ V D G i s taken as the value given by equation ( 1 - 7 ) and i s assumed to be independent of V^. This i s i l l u s t r a t e d i n Figure lr-5. Figure 1-6 Cross-Sectional Model of the Transistor Under Saturation Conditions 17 Several alternative physical mechanisms have been proposed to account for the saturation c h a r a c t e r i s t i c s . In his (OQ) surface-channel d i e l e c t r i c triode Wright v ' has distinguished a source region where a gradual approximation i s legitimate, and a drain region through which a space-charge-limited current flows with a l o n g i t u d i n a l l y directed f i e l d . Some arbitrariness was involved, however, i n the matching of the solutions for theV-1 char a c t e r i s t i c s i n the t r a n s i t i o n region between the source and drain regions. In the case of s i l i c o n insulated-gate f i e l d - e f f e c t t ransistors fabricated on high r e s i s t i v i t y sub-stratss Hof s t e i n and Heimanv J l have related the large but f i n i t e output resistance beyond pinch-off to excess charge c a r r i e r s induced i n the channel by the drain electrode at the substrate side of the semiconductor. The output resistance, calculated by these authors, and v a l i d i n the saturation region gives r i s e to a voltage amplification of the same order of magnitude as that measured on experimental t r a n s i s t o r s . Reddi et a l ^ ^ (31) and Hofstein et a l v ' have attributed the dependence of the incremental saturation resistance on the drain and gate voltages i n silicon,MOS devices fabricated on low r e s i s t i v i t y substrates to the modulation of the width of the pinched-off region i n a similar manner to the modulation of the c o l l e c t o r depletion region i n a bipolar t r a n s i s t o r (Early E f f e c t ) . J u n d ^ ^ has suggested that the physical phenomenon responsible f o r satura-t i o n current i n f i e l d - e f f e c t devices was not complete pinch-off of the channel but the fact that the c a r r i e r s can reach a l i m i t v e l o c i t y at high longitudinal f i e l d s near the drain. A d i f f e r e n t explanation of the f i n i t e output resistance at saturation has 18 been put forward by J o h n s o n . T h i s author assumes that the donors present i n the semiconductor layer are i n i t i a l l y only p a r t i a l l y ionized. The saturation of the V-I c h a r a c t e r i s t i c s would then correspond to the i o n i z i n g of the donors i n the deeper l y i n g l e v e l s . Complete saturation would occur when these donors are completely stripped of t h e i r electrons. More recently G u e r s t ^ ^ has related the f i n i t e saturation resistance i n the insulated-gate field-^effect t r a n s i s t o r to the geometric config-uration of i t s electrodes and characterized the conditions prevailing i n the entire channel by means of a single equation which serves as a non-linear boundary condition f o r the determination of the e l e c t r i c potential i n the insulator region. In his analysis a d i v i s i o n of the channel into a conducting part- (source region) and a part with space-charge-limited current (drain region) can be made but i s not essential for the evaluation of the V-I c h a r a c t e r i s t i c s . 1.6 Equivalent C i r c u i t of the Insulated-Gate F i e l d - E f f e c t Transistor (27) The commonly accepted v low-frequency small-signal i n t r i n s i c c i r c u i t model f o r an insulated-gate f i e l d - e f f e c t t r a n s i s t o r i s shown i n Figure 1T7. The gate, drain and source electrodes are represented as the nodal points marked G, D and S. This i n t r i n s i c model does not include the stray capacitances or lead impedances. The impedances between gate and source,and gate and drain are represented by p a r a l l e l R-C c i r c u i t s . The values of 0 g g, R f f g and R^ depend on the dc operating point 19 and on the frequency. ' The output c i r c u i t consists of the source-drain conductance g^ driven by a constant current generator g^g* Drain-source capacitance•is small and has be en neglected. D C = C + C , g gs gd Figure 1*7 I n t r i n s i c C i r c u i t Model for the Insulated-Gate F i e l d - E f f e c t Transistor. Some of the Important parameters of the c i r c u i t model can be obtained from equation (1-5). The output conductance below saturation i s given by: 8* V G u C ¥ S1: D-a n d gdo = (T^} T-o 3 v D - * 0 L \x C _ *n g / Y _ Y N 2 ^ G T ; ' c . T ( v G - v T - V ^ ) , (l-8(a)) (1-8(1))) i*e*,the output conductance i s l i n e a r with V ^ . The trans-conductance below saturation i s : 20 V D\ _ r n g D cr - - _s & a - u c - v (I-Q) " § V Q ; ~ L2 ~ o 1 D' { ± y ; and i t s maximum which occurs at saturation i s given "by: *ms = ^ n C o I VDS = ^ n °o I ( VG " V ' The voltage amplification of the device i s : •^ v = ~ ( o V ^ = v IT~v _ v > ( l - l l ) v 8 G T G T D XD which i s i d e n t i c a l to the r a t i o g m/g£. At the point of satura-t i o n V D = v"Dg =; (YQ - Yy), the voltage amplification factor diverges due to g^ = 0. In actual devices, due to the channel length shortening-effect beyond the saturation point, the drain conductance i s f i n i t e i n the saturation region and hence the voltage amplification factor i s also f i n i t e . The gain-bandwidth product of the device i s given by: GBW = 0 * = n D 0 below saturation, (1-12) 2 * °g 2 « I H n ( v G - V ) and GBW = — -—5-*- at saturation . (1-13) 2 Jt L 1.7 C i r c u i t Applications of the TFT The TFT has a wide range of applications. In many respects i t r e c a l l s the vacuum tube but with the advantage that i t s cut-off or threshold voltage can be positive or negative and 21 the gate does not conduct when i t i s forward biased. The TFT i s unique i n that i t i s made by techniques which are compatible with those used i n making t h i n - f i l m passive components and can therefore be included i n the fabrication schedules of these components. It i s not envisaged that t h i n f i l m transistors w i l l be produced as single discrete components since they lose t h e i r advantages as soon as they are removed from the context of the t h i n f i l m c i r c u i t . The c i r c u i t applications of the TFT are simi l a r to those of the MOS tr a n s i s t o r which are l i s t e d below. An obvious application i s that as an electrometer amplifier taking advantage of the extremely high input resistance. The high on-off resistance r a t i o and zero dc leakage make these transistors (37) p a r t i c u l a r l y suitable i n chopper and analog switching c i r c u i t s . The devices can also be used i n high frequency small signal amplifiers where the c i r c u i t s i m p l i c i t y i s the pr i n c i p l e (•58) advantage. 1 Another application i s i n micropower integrated c i r c u i t s which require an active device with a good gain at (xq) microamp working currents and r e s i s t o r s which approach the megohm range as currents approach the microamp l e v e l . The silicon-on-sapphire approach discussed i n the following chapters offers a reasonable solution to both of these problems. The TFT can provide f a i r l y good amplification i n the microamp range and with the t h i n s i l i c o n f i l m s used i n t h i s technology, sheet resistances as high as 10 ohm/square can ea s i l y be obtained making high value r e s i s t o r s possible i n very small 22 size s . The fact that this approach can give devices which are e l e c t r i c a l l y isolated from each other (thus eliminating leakage currents) i s even more s i g n i f i c a n t i n micropower c i r c u i t s than at higher power l e v e l s . These devices can also be useful i n large d i g i t a l arrays where slow speed functional blocks are required,although the general advantages here are not nearly so clear-cut when (36) (16) compared with equivalent, bipolar structures. The devices w i l l not, however, be useful i n high speed switching c i r c u i t s or where ion i z i n g radiation i s an important environmental (16) requirement. 1.8 Factors Influencing the Design and Performance of the TFT For good performance, the TFT must have large transconductance and gain-bandwidth product, high input imped-ance, maximum source-drain breakdown voltage, low noise and high s t a b i l i t y . The factors which aff e c t the performance of the TFT are. considered below, and are dealt with i n more d e t a i l i n the following chapters. (l ) The properties of the semiconductor f i l m . The surface mobility i n the films must be high and the density of the c a r r i e r s must not be too large to be e f f e c t i v e l y modulated by the gate voltage. The high c a r r i e r mobility implies single c r y s t a l f i l m s free from crystallographic defects. Dislocations, stacking f a u l t s and accelerated growth regions are the p r i n c i p l e defects observed i n grown semiconductor films.(40) 23 These defects can decrease the mobility and minority c a r r i e r l i f e t i m e and introduce acceptor centers i n the semiconductor. They also reduce the breakdown f i e l d s and increase the noise l e v e l . The properties of the insulator. The insulator must have a high d i e l e c t r i c constant, high breakdown strength, good frequency and temperature behavior and be impervious to the ambient atmosphere. The properties of the semiconductor/insulator interface. The insulator must act as a passivating layer on the surface of the semiconductor. The surface state density at the semiconductor/ insulator interface must be e f f e c t i v e l y control-led and i s c r u c i a l i n determining the ultimate usefulness of the device. The surface states determine to a large extent the value of the threshold voltage V"T, i n fact too large a surface state density at the interface w i l l so completely shield the space-charge region from the influence of the gate that no control action ( 2 8 ) whatever i s observed. Surface states are customarily divided into two groups. The "fa s t " states, which are believed to be located at the semiconductor 24 surface and the "slow" states, located on the oxide which normallycovers the surface of a semiconductor.^ 1) Since t h i s oxide, i n o germanium for example, i s between 10 and 40 A thick,(41) transfer of charge between the slow states and the free c a r r i e r s can take place producing long response times. In the case of a semiconductor surface covered by a thick ' o ( >200 A) oxide layer, there i s l i t t l e charge transfer between the semiconductor and the slow states. The short-term response of the semiconductor/insulator interface w i l l depend on the states at the interface as well as on traps i n the oxide and i n the semiconductor. However only those traps l y i n g very close to the interface w i l l t r u l y a f f e c t the short-term response. The long-term response of the surface w i l l be affected by the deep traps within, the oxide as well as the ionic charge contribution on the surface of and i n the bulk of the oxide.( 25 2. PREPARATION AND PROPERTIES OF THIN FILMS OF SILICON 2.1 Introduction There i s considerable interest i n growing single c r y s t a l e x p i t a x i a l * s i l i c o n films because of t h e i r inherent advantages i n the f a b r i c a t i o n of both improved and new s o l i d state devices. Ideally one would l i k e to control layer thickness and r e s i s t i v i t y and to produce layers free from crystallographic defects. The two most commonly used methods of growing e p i t a x i a l s i l i c o n films are: (a) Chemical or p y r o l y t i c methods The chemical methods involve the hydrogen reduction of a suitable halide, f o r example, s i l i c o n t e t r a c h l o r i d e ^ 3 ) (SiCl^) or the pyrolysis of s i l a n e ^ 4 ^ (SiH^). Most of the early work was concentrated on the chemical deposition of s i l i c o n onto s i l i c o n substrates and led to the extensive use of e p i t a x i a l layers i n t r a n s i s t o r and integrated c i r c u i t s f a b r i c a t i o n . Recently i t became apparent that single c r y s t a l s i l i c o n films could be grown on i n s u l a t i n g single c r y s t a l substrates such as sapphire, quartz; calcium f l u o r i d e ; ^ 7 ) and magnesium oxide.^7) The deposition of s i l i c o n on * The term epitaxy meaning "arrangement on" w i l l be used to denote the growth of one material on another i n such a way that the deposited material possesses a d e f i n i t e orientation with respect to the substrate. 26 i n s u l a t i n g s u b s t r a t e s by p y r o l y t i c methods i s p r e s e n t l y under i n t e n s i v e i n v e s t i g a t i o n by v a r i o u s o r g a n i z a t i o n s . t ( 4 9 ) (b) E v a p o r a t i o n i n h i g h vacuum The method of growing e p i t a x i a l s i l i c o n l a y e r s by vacuum evaporation has only: r e c e i v e d s e r i o u s a t t e n t i o n d u r i n g the past three years, d e s p i t e i t s v e r s a t i l i t y and i t s p o t e n t i a l a p p l i c a t i o n t o complicated geometries. I t o f f e r s a number of advantages over the chemical methods: (1) c l e a n l i n e s s and absence of the halogens, (2) masking without i n t e r f e r e n c e with the process, (3) complete f a b r i c a t i o n of d e v i c e s i n vacuum, (4) lower s u b s t r a t e temperatures f o r e p i t a x i a l growth. A p o s s i b l e drawback of t h i s method i s the h i g h content of c r y s t a l l o g r a p h i c d e f e c t s which are u s u a l l y a s s o c i a t e d w i t h evaporated f i l m s . Recent s t u d i e s ^ ' have demonstrated however, t h a t by s u i t a b l e adjustment of vacuum c o n d i t i o n s and e v a p o r a t i o n r a t e s i t i s p o s s i b l e to d e p o s i t d e f e c t - f r e e s i l i c o n f i l m s on s i l i c o n s u b s t r a t e s . Vacuum evaporated e p i t a x i a l s i l i c o n l a y e r s deposited onto s i n g l e c r y s t a l s i l i c o n s u b s t r a t e s were f i r s t r e p o r t e d by T J n v a l l a ^ 2 ^ and f u r t h e r i n v e s t i g a t e d by U n v a l l a ^ - ^ and H a l e . ^ ^ ) 27 They found that e p i t a x i a l growth occurs r e a d i l y on s i l i c o n s u b s t r a t e s of any o r i e n t a t i o n provided the s u b s t r a t e temperature i s s u f f i c i e n t l y "high". Both Hale and U n v a l l a g i v e the e p i t a x i a l temperature as about 1120°C and U n v a l l a claims t h a t t h i s tempera-ture i n c r e a s e s with i n c r e a s i n g r a t e s of d e p o s i t i o n b e i n g 1250°C at a r a t e of 4 u/min. In g e n e r a l , the e l e c t r i c a l p r o p e r t i e s of the f i l m s are determined by the dopant present i n the source m a t e r i a l . H o w e v e r a c o n s i s t e n t tendancy towards p-type c o n d u c t i v i t y i n the f i l m s has been observed when the sources used are of r e l a t i v e l y h i g h r e s i s t i v i t y ( > 10 H.-cm), indepen-d e n t l y of whether the source i s p or n. The cause of the tendency i s s t i l l s u b j e c t t o c o n t r o v e r s y . Three p o s s i b l e explanations have been suggested. F i r s t , a p-type contaminant may be i n t r o d u c e d i n t o the l a y e r s d u r i n g growth. P o s s i b l e i m p u r i t i e s are boron or aluminum from m a t e r i a l s a s s o c i a t e d w i t h the furnace and/or s u b s t r a t e h e a t e r . Second, the source m a t e r i a l may be compensated, i . e . may c o n t a i n both n and p type dopants-and the measured r e s i s t i v i t y corresponds to the amount of unbalanced dopant. Consequently, although n type m a t e r i a l i s used, owing to vapour pressure c o n s i d e r a t i o n s more n-type dopant (antimony or phosphorus) i s l o s t than p-type dopant (boron) d u r i n g e v a p o r a t i o n , and so the r e s u l t i n g l a y e r s are p-type. The t h i r d p o s s i b i l i t y i s t h a t the b i a s toward p-type m a t e r i a l a r i s e s because of the presence of c r y s t a l l o g r a p h i c d e f e c t s which a c t as acceptor c e n t e r s . R e l a t i v e l y l i t t l e work has been r e p o r t e d on the d e p o s i t i o n of evaporated s i l i c o n on i n s u l a t i n g s u b s t r a t e s . 28 E p i t a x i a l single c r y s t a l growth has been reported on calcium (ere) (cf.) fluoride single c r y s t a l w > / ' w ' and p o l y c r y s t a l l i n e growth has been reported on s a p p h i r e a n d quartz. *(58) 2.2 Vacuum Evaporation of S i l i c o n The thermal evaporation of s i l i c o n i n vacuum involves the heating of the s i l i c o n source material to a high temperature o (55) above 1600 C w - % f o r reasonable rates of evaporation,and the heating of the substrate to a high temperature, between 900°C and 1200°C, to ensure good epitaxy. For high quality and high purity films the following requirements must be s a t i s f i e d . (1) The contamination of the films from the vacuum ambient must be reduced by evaporating i n high vacuum or as an alternative to improving the vacuum the rate of deposition may be increased provided the c r y s t a l perfection of the growing f i l m i s not impaired. The most troublesome ambient contaminants are considered to be the residual hydrocarbons which decompose on the surface of hot s i l i c o n forming s i l i c o n carbide c r y s t a l l i t e s . (2) The contamination from the source crucible must be minimized. ( 3 ) The source and substrate heaters must provide l o c a l i z e d heating to prevent outgassing of the areas surrounding the source and substrate. 29 Various methods can be used to evaporate s i l i c o n . Evaporation from r e f r a c t o r y metal heaters causes considerable contamination of the s i l i c o n source due to the a l l o y i n g of s i l i c o n w i t h these metals at the very high temperatures which (59) are commonly used. R e f r a c t o r y oxide boats overcome t h i s problem to some extent but lead to the presence of SiO i n the (59) f i l m s . Evaporation of s i l i c o n from a boron n i t r i d e c r u c i b l e i n a carbon r e s i s t a n c e heating filament produces f i l m s c o n t a i n i n g 0.5$ boron. Such contamination i s considerably reduced by the use of e l e c t r o n bombardment h e a t i n g ^ 2 ^  or RE h e a t i n g ^ 1 ^ of the s i l i c o n source. The substrate can be heated by r a d i a t i o n from a filament made of tungsten and s i t u a t e d immediately behind the sample and enclosed i n a r e f r a c t o r y metal box. U n v a l l a has shown that heavy tungsten contamination occurs from t h i s type of substrate heater. RE heating can a l s o be used. I t i s a clean and e f f i c i e n t process but r e q u i r e s elaborate water c o o l i n g i n s i d e the vacuum system. Another a l t e r n a t i v e , e l e c t r o n boBi-bardment heating provides a method of concentrating power i n t o a s m a l l , w e l l defined area thus minimizing outgassing. In t h i s work e l e c t r o n beam heating of the source and substrate were used and the s i l i c o n source acted as i t s own c r u c i b l e , i . e . the s i l i c o n was evaporated from a molten pool on the surface of the source. The e l e c t r o n beam method i s very v e r s a t i l e and can be adapted t o the evaporation of m a t e r i a l s other than s i l i c o n , e.g. metals and i n s u l a t o r s involved i n the f a b r i c a t i o n of t h i n f i l m c i r c u i t r y . 30 2„3 Choice of the Ev a p o r a t i o n Parameters The parameters a f f e c t i n g f i l m p r o p e r t i e s may he l i s t e d i n probable order of importance as fo l l o w s s (1) the s u b s t r a t e , (2) the s u b s t r a t e temperature, (3) the evaporation r a t e , (4) the ambient p u r i t y , (5) the f i l m t h i c k n e s s , (6) the source doping. I t i s apparent t h a t , even i f only a few of the parameters are allowed to v a r y , a l a r g e number o f combinations are p o s s i b l e . In view of t h i s f a c t , t h i s i n v e s t i g a t i o n has been c a r r i e d out by f i x i n g some of the parameters and ob s e r v i n g how f i l m p r o p e r t i e s v a r y as a f u n c t i o n o f the remaining v a r i a b l e s always keeping i n mind the u l t i m a t e use of these f i l m s as a c t i v e s u b s t r a t e s f o r t h i n f i l m d e v i c e s . 2.3.1 Choice of the Substrate Most t h e o r e t i c a l c o n s i d e r a t i o n s of the occurrence of s i l i c o n e p i t a x y on i n s u l a t i n g substrates have been based on the concept of a c e r t a i n g e o m e t r i c a l f i t t i n g between the l a t t i c e of the overgrowth and that of the s u b s t r a t e . T h e s e c o n s i d e r a -t i o n s imply the n e c e s s i t y of a c r y s t a l l i n e s u b s t r a t e w i t h l a t t i c e spacings and expansion c o e f f i c i e n t s s i m i l a r to those of s i l i c o n . I t has been shown t h a t a m i s f i t i n the l a t t i c e spac-i n g can l e a d to d i s l o c a t i o n s , which i n t u r n l e a d to s t r a i n s 31 and possibly l o c a l i z e d energy levels, (47) ^ comparison between the crystallography of po t e n t i a l l y useful single c r y s t a l insulators and s i l i c o n suggests that calcium f l u o r i d e , quartz and sapphire would be the most suitable substrates f o r e p i t a x i a l s i l i c o n growth since at least one of the l a t t i c e constants i s about the same as that of s i l i c o n . These materials are l i s t e d i n Table 2-1 together with t h e i r crystallographic constants. Figure 2-1 shows the temperature v a r i a t i o n of the reported l i n e a r c o e f f i c i e n t of thermal expansion p f o r these substrates and s i l i c o n . A large discrepancy between t h i s coef-f i c i e n t f o r s i l i c o n and the substrate can cause poor f i l m Material C r y s t a l System^ 2 ^  (62)° Lattice constants JA a 0 C 0 S i . Cubic 5*41 — CaF 2 Cubic 5o46 •—. Si0 2 (Quartz) Hexagonal 4.90 5.39 A120^ (Sapphire) Hexagonal 4.75 12.96 Table 2-1 Cr y s t a l Structure and Lattice Constants f o r S i l i c o n and Some Single Cry s t a l Substrates. adherence. This has been reported to occur i n the case of r e l a t i v e l y thick films which flaked o f f a CaF 2 substrate.(47) Quartz was not considered usable, i n spite of a good l a t t i c e match to s i l i c o n , because f i l m fracture was reported to occur at the-quartz phase t r a n s i t i o n temperature (573°C), when the films were cooled down from the high deposition temperature (46):' to room temperature. Sapphire offers the closest match to Figure 2-1 Linear C o e f f i c i e n t of Thermal Expansion for S i l i c o n and Ceramic Substrates as a Function of Temperature 33 s i l i c o n as f a r as the thermal c o e f f i c i e n t of expansion i s con-cerned and o f f e r s the f u r t h e r advantages of h i g h m e l t i n g p o i n t (2040°C), low d i e l e c t r i c l o s s , h i g h r e s i s t i v i t y and mechanical s t r e n g t h , freedom from outgassing, no chemical i n t e r a c t i o n w i t h the d e p o s i t , and good thermal c o n d u c t i v i t y . T h i s l a s t p r o p e r t y i s important i n determining the allowed power d i s s i p a t i o n i n the t h i n f i l m . From a p r a c t i c a l p o i n t o f view s y n t h e t i c sapphire s u b s t r a t e s are not much more expensive than s i n g l e c r y s t a l s i l i c o n s u b s t r a t e s p r e s e n t l y used i n i n t e g r a t e d c i r c u i t s and are furthermore r e u s a b l e . The s u b s t r a t e s used i n t h i s i n v e s t i g a t i o n were s i n g l e c r y s t a l 60° o r i e n t a t i o n sapphire, -J- i n c h i n diameter, 0.080 i n c h t h i c k , o p t i c a l l y p o l i s h e d on one s i d e * . 2.3*2 The s u b s t r a t e temperature and the eva p o r a t i o n r a t e The proper combination o f s u b s t r a t e temperature and r a t e of evaporation determines t o a l a r g e extent the c r y s t a l l i n e p e r f e c t i o n o f the de p o s i t e d l a y e r s . Substrate temperatures between 880°C and 1220°C and a range of e v a p o r a t i o n r a t e s o o between 200 A/min and 600 A/min were used. The c h a r a c t e r i s t i c s of the f i l m s were found to be r e l a t i v e l y independent of the evaporation r a t e i n t h i s range. 2,3.3 The ambient and source p u r i t y The ambient and source p u r i t y were d i s c u s s e d i n s e c t i o n 2.2 and were the determining f a c t o r s i n the choice of * A d o l f M e l l e r and Company, Providence, Rhode I s l a n d . 34 electron bombardment in the heating of the souroe and the substrate. 2.3.4 The film thickness 0 Above a certain minimum thickness ( > 500 A), size effects become negligible. Most of this investigation was concerned with films 0.5 to 2 |i thick, 2.3.5 The souroe doping Hyper-pure polycrystalline silicon rods* 1 inch in diameter were used as the source material. The resistivity of these rods was larger than 200 Jii-cm with the following impurity concentrations: 13 -3 Maximum boron content 1.5 x 10 ^ atoms cm 1*5 -3 Maximum donor impurity content 10 x 10 J atoms cm 17 -3 The oxygen content was less than 1 x 10 atoms cm ' . The choice of a lightly doped source material was not arbitrary anfl was made bearing in mind the requirement for films of high erip g^h resistivity which would allow effective field-effeot modulation in the thin -film transistors. 2.4 Apparatus 2.4.1 The vacuum system and the evaporation assembly The system used in the evaporation of silicon films is shown in Figure 2-2. The vacuum system consists of a 10" MC o i l diffusion pump provided with a liquid nitrogen cooled * Dow Corning Corporation, Hemlock, Michigan. 35 Figure 2-2 The S i l i c o n Evaporation System 36 trap. The evaporation assembly is shown schematically in Figure 2-3. It consists of a water cooled stainless steel shell provided with a pyrex viewing port and fitted with two electron guns, a substrate changer disc and shutter, a source holder, a crystal thickness monitor and an auxiliary; liquid., nitrogen trap. The electron guns* are provided with magnetic focus-sing and Xr-y deflection and are rated at 30 kV -400 mA (maximum).' One of the guns is used to heat the silicon source material and the other to heat the substrate. The substrate heater gun is modified to include oscillators connected in series with each of the x and y deflection coils to sweep the beam in a circular or e l l ipt ical pattern on the back of the substrate. The frequency and amplitude of the oscillators signals are adjusted to provide V uniform heating of the substrate. The stainless steel substrate changer disc, which can accommodate six substrate holders, and the stainless steel shutter are inclined at 30° to the horizontal. The substrate changer disc can be driven manually from outside the shell by a gear system with a double 0-ring seal. The space between the 0-rings:is evacuated by a rotary pump. The substrate holders, shown in Figure 2-4, are stainless steel rings which are inserted in the substrate changer disc. The sapphire substrates are held by means of tantalum clips spot-welded to the ring. The rings act as heat baffles, and the tantalum being a poor heat conductor ensures a uniform * Brad-Thomson Industries, Indio, California. SUBSTRATE HEATER ELECTRON GUN. GEAR SYSTEM TO ROTATE SUBSTRATE CHANGER DISC AND SHUTTER WATER COOLING SOURCE HEATER ELECTRON GUN AUXILIARY LIQUID N2 TRAP SUBSTRATE CHANGER DISC STAINLESS STEEL SHELL SHUTTER WATER COOLED COPPER BLOCK LIQUID N2 FEEDTHROUGH QUARTZ CRYSTAL THICKNESS MONITOR SILICON SOURCE WATER COOLED MOVABLE SOURCE HOLDER TO LIQUID N2 MAIN TRAP AND VACUUM SYSTEM Figure 2-3 The Evaporation Assembly 38 heat d i s t r i b u t i o n over the s u b s t r a t e . In o p e r a t i n g p o s i t i o n , the s u b s t r a t e to source d i s t a n c e i s 10 cm. The arrangement f o r h o l d i n g the s i l i c o n b l o c k used as the evaporation source i s shown i n F i g u r e 2-5. The s i l i c o n b l o c k f i t s i n t o a water cooled movable copper p e d e s t a l . During evaporation, the thermal expansion o f the s i l i c o n causes i t to be i n good thermal contact w i t h the tapered rim o f the copper p e d e s t a l thus improving the e f f e c t i v e c o o l i n g . The source c o o l i n g r e s t r i c t s the molten zone t o a s m a l l area at the center of the block and thus prevents any contamination from the source h o l d e r . For f a s t e v aporation r a t e s , the molten zone tends to spread, and u n l e s s the r a t e o f C o o l i n g i s s u f f i c i e n t , s p i l l s over the s i d e s onto the copper p e d e s t a l . F i g u r e 2-6 shows the s u b s t r a t e changer and source h o l d e r i n s i d e the s h e l l . A quartz c r y s t a l o s c i l l a t o r i s used t o monitor the (66) (67) f i l m t h i c k n e s s d u r i n g evaporation; J , K ' The c r y s t a l monitor i s mounted i n s i d e the vacuum system, symmetrically opposite the s u b s t r a t e , on a water cooled copper b l o c k . To prevent charge b u i l d up on! the c r y s t a l d u r i n g evaporation, a low r e s i s t a n c e leakage path i s provided from the c r y s t a l to A (66) ground. v ' An a u x i l i a r y l i q u i d n i t r o g e n t r a p i s a l s o f i t t e d i n s i d e the system to improve the vacuum d u r i n g evaporation. The t r a p c o n s i s t s of a t i g h t l y wound copper tube through which the l i q u i d n i t r o g e n i s c i r c u l a t e d . The e x t e r n a l connections of the tube to the n i t r o g e n supply are made through t h i n s t a i n -l e s s s t e e l feedthrough b u i l t i n t o the f l a n g e s u p p o r t i n g the quartz c r y s t a l monitor as shown i n F i g u r e 2-3. 39 Figure 2-4 The Substrate Holder yf\\w SILICON SOURCE LOW OXYGEN CONTENT COPPER 2D STAINLESS STEEL PIPE 76 D COPPER J>IPE WATER INLET 4 7 ££zzzzzz2z2 WATER OUTLET Figure 2-5 The Source Holder 40 F i g u r e 2-6 The Substrate Changer and the Source Holder 41 2.4.2 Performance of the system Under the high vacuum conditions (<10~ mm Hg) encountered i n the system, manual control of the power input and therefore the evaporation rate was quite f e a s i b l e i The source heater beam could be focussed into a spot less than 0.5 cm i n diameter and the molten zone at that spot was estimated to be at 1600-1700°C. The power output from the souce gun was 800 o watts at 18 kV f o r an evaporation rate of 300 A/min and the power output from the substrate gun was 75 watts at 5 for a substrate temperature of 1100°C. 2.5 Experimental Procedure 2.5.1 Substrate preparation The substrates were degreased i n trichlorethylene, etched i n hot phosphoric acid, u l t r a s o n i c a l l y cleaned i n d i s t i l l e d water and f i n a l l y a i r dried. During the electron bombardment, the substrates became e l e c t r i c a l l y charged and repelled any further electrons thus preventing good heating. This problem was overcome by precoating the back of the substrates with an e l e c t r i c a l l y conducting f i l m of sputtered platinum or tantalum and platinum thus providing a leakage path from the substrate through the tantalum c l i p s to ground. 2.5.2 The experimental run The system was evacuated with the source and substrates —6 i n position. When,the pressure reached 10~ mm Hg. a short out-gassing of the source and substrate was carried out. The 42 system wee then l e f t pumping overnight. The t y p i c a l pressure -7 a f t e r such a pump-down was 2 - 4 x 10 ' mm Hg which dropped —8 to 3 - 4 x 10 mm Hg when both traps were f i l l e d w i t h l i q u i d n i t r o g e n * During the a c t u a l m a the substrate heater was f i r s t turned on and s u f f i o i e n t time was allowed f o r the su b s t r a t e temperature t o become uniform before t u r n i n g the source gun on* The evaporation was c a r r i e d out i n a t y p i c a l pressure of 7 x 10"^ mm Hg* A f t e r d e p o s i t i o n , the f i l m was annealed for f i v e minutes at the d e p o s i t i o n temperature and then g r a d u a l l y brought down to room -temperature. The pressure performance -of the]system as recorded d u r i n g a t y p i c a l run i s shown i n Figure[2-7. 2.5.3 5The sub s t r a t e temperature The substrate temperature was measured previous to the s i l i o o n d e p o s i t i o n by means of an o p t i c a l pyrometer..*' The temperature was assumed to remain constant d u r i n g d e p o s i t i o n , t h i s assumption i s v a l i d provided the s i l i c o n l a y e r i s much thi n n e r than the sapphire s u b s t r a t e . Since the e m i s s i v i t y of sapphire i n the temperature range of i n t e r e s t oould not he found, the pyrometer was c a l i b r a t e d u s i n g a chromel-alumel thermocouple which was i n good thermal contact w i t h the platinum f i l m on the back of the substrate* The oold thermocouple junc-t i o n w^s kept i n s i d e the vacuum system a t 18°0 hy having i t i n good thermal contact w i t h the water oooled copper b l o c k used to hold the quartz c r y s t a l (see F i g u r e 2-3). * Pyropto, Hartmann and Braun, Frankfurt/Main, Germany. 43 PRESSUREil (mmHg) 0-LIQUID N2 TURNED ON Q)-SUBSTRATE HEATER TURNED ON (5)®-SOURCE HEATER TURNED ON Y®-SOURCE HEATER TURNED OFF f ©-SUBSTRATE HEATER TURNED OFF 10 20 30 40 50 60 70 80 90 WO TIME (MINUTES) Figure 2-7 The Pressure Performance of the System during a Typical Run 44 2.6 Determination of the Thickness of S i l i c o n Thin Films The thickness of the s i l i c o n films was determined (68) by an infrared interference method. ' The primary requirement for the production of interference fringes by r e f l e c t i o n from a f i l m i s that the o p t i c a l constants of the f i l m d i f f e r from those of the substrate material. Since t h i s requirement i s s a t i s f i e d i n the case of s i l i c o n films deposited on sapphire substrates, the infrared interference method commonly used i n measuring the thickness of e p i t a x i a l s i l i c o n films deposited on s i l i c o n substrates was adapted to the measurement of the thickness of the evaporated s i l i c o n f i l m s . This method has the advantage of being accurate, quick, non-destructive, and well adapted for routine measurements. The thickness of the f i l m d can be expressed i n terms of the fringe order m, the wavelength of the fringe maxima , m^, the r e f r a c t i v e index of the f i l m 7)^ and the angle of r e f r a c t i o n 0' :. (m + K m (2-1) 27)1 cos 0' The above equation includes a phase change of % at the a i r - f i l m interface but no phase change at the film-substrate interface. The lower l i m i t of s i l i c o n f i l m thickness, that can be measured by observing fringes, depends on the wavelength of the radiation used to measure i t and on the absorption of the s i l i c o n f i l m s . The relationship between f i l m thickness and the o p t i c a l wavelengths of interference fringe maxima given by equation (2-1) i s plotted i n Figure 2-8 f o r the case of normal WAVELENGTH Figure 2-rQ Chart for Determining the Thickness of Silicon Films hy Near Infrared Interference 46 incidence, and r e s u l t s i n a f a m i l y of s t r a i g h t l i n e s of constant f r i n g e order. This chart i s u s e f u l f o r r a p i d and accurate data re d u c t i o n without c a l c u l a t i o n . Once the f r i n g e maxima are determined f o r a s p e c i f i c f i l m , a h o r i z o n t a l l i n e d = constant, can be found to i n t e r s e c t the f r i n g e order l i n e s at wavelength values corresponding to the f r i n g e maxima f o r that t h i c k n e s s . The accuracy of t h i s method i s of the order of + 5$. A Cary spectrophotometer was used f o r the near i n f r a r e d i n t e r f e r e n c e measurements. A t y p i c a l f r i n g e p a t t e r n obtained on one of the s i l i c o n on sapphire specimens i s shown i n Figure 2-9. The thickness of t h a t p a r t i c u l a r specimen was determined by means of the chart i n Figure 2-r8 and was found to be 0.90 \i* as shown. 2.7 S t r u c t u r a l P r o p e r t i e s of the Films The l a y e r s were f i r s t examined by o p t i c a l microscopy. Figure 2-10 shows the t y p i c a l appearance of two l a y e r s grown at 990°C and 1100°C r e s p e c t i v e l y . These micrographs i n d i c a t e that the growth i n v o l v e s the i n i t i a t i o n of very small n u c l e i which coalesce i n a c h a i n - l i k e manner to form a continuous f i l m . The l a y e r s were a l s o examined by r e f l e c t i o n e l e c t r o n d i f f r a c t i o n i n order t o determine the o r i e n t a t i o n of the s i l i c o n deposit and the approximate e p i t a x i a l temperature. Most of the f i l m s studied were approximately 1 (i t h i c k and were deposited o at a constant r a t e of 300 A/min. Figure 2-11 shows the e l e c t r o n d i f f r a c t i o n patterns of f i l m s deposited at temperatures ranging * The thickness of the f i l m determined by weighing u s i n g a microbalance was 0.92 p.. WAVELENGTH (/J) ^ —3 Figure 2-9 Near Infrared Interference Pattern for a Thin S i l i c o n Film 48 from 880°C to 1150°C. The patterns were obtained using 100. kV electrons with a Hitachi 11A microscope. From Figure 2 - l l ( a ) i t can be seen that at 880°C the f i l m obtained i s amorphous, at 950°C (Figure 2 - l l ( b ) ) the f i l m becomes p o l y c r y s t a l l i n e as indicated by the appearance of Debye rings. As the substrate temperature i s raised, the degree of orientation increases as indicated by the appearance of dots along the rings (Figure 2-ll('b)). At 1050°C a predominantly single c r y s t a l * pattern i s formed (Figure 2 - l l ( d ) ) . As the temperature of the substrate i s raised above 1150°C, the growth process i s disturbed and the films revert to p o l y c r y s t a l l i n e (Figure 2 - l l ( e ) ) . Similar • o results were obtained f o r evaporation rates between 200 A/min o and 600 A/min. From t h i s investigation i t can be concluded that, f o r the s p e c i f i c set of evaporation parameters considered, the e p i t a x i a l temperature l i e s between 1025° and 1075°C as com-o (55 pared to 1100-1200 C f o r p y r o l y t i c a l l y grown e p i t a x i a l s i l i c o n . Figure 2-12(a) shows the indexed d i f f r a c t i o n pattern of Figure 2 - l l ( d ) . The zone axis of t h i s pattern i s [llO^* Unallowed r e f l e c t i o n s appearing i n the pattern (indexed i n parentheses) commonly occur i n electron d i f f r a c t i o n at grazing incidence and probably a r i s e from multiple d i f f r a c t i o n s or t w i n n i n g . F i g u r e 2-12(b) and (c) show indexed d i f f r a c t i o n patterns of the same f i l m , taken at d i f f e r e n t orientations of the f i l m r e l a t i v e to the electron beam. The zone axes of these patterns are respectively [312] and [21l]. Unallowed r e f l e c t i o n s * In t h i s investigation, a f i l m i s c l a s s i f i e d as single c r y s t a l provided the d i f f r a c t i o n pattern indicates single c r y s t a l patterns and the orientation remains i d e n t i c a l over the entire area of the f i l m . 49 Figure 2-10 Micrographs Showing the Surface Structure of Deposited Layers (magnification x 1200) 50 Figure 2-11 Reflection Electron D i f f r a c t i o n Patterns f o r S i l i c o n Films Deposited at Various Substrate Temperatures 51 are also observed i n these patterns. The three zone axes deter-mined from the patterns of Figure 2-12 are perpendicular to the (111) plane i n d i c a t i n g a (111) orientation of the f i l m . This finding agrees with the experimental results obtained by Nolder and Cadoff^ 7 0^ who found that (111) s i l i c o n grows on 60° orientation sapphire. 2.8 E l e c t r i c a l Properties of the Films 2.8.1 Conductivity type determination The conductivity type was determined by means of the thermoelectric method. I f two point contacts are made to the sample and the contacts are kept at di f f e r e n t temperatures (either cooling one or heating the other) a potential w i l l appear between them. The p o l a r i t y of the cold probe i s positive (71) f o r p-type and negative f o r n-type material. ' In order to avoid ambiguous res u l t s an electrometer was used to detect the potential: difference and the samples were cooled to ensure that they were e x t r i n s i c before application of the probes. The films were consistently found to be p-type. This r e s u l t was also confirmed by H a l l effect measurements. 2.8.2 R e s i s t i v i t y and H a l l effect measurements The r e s i s t i v i t y and H a l l effect were measured using (72) a van der Pauw geometry. v' ' The advantage of t h i s geometry i s that the shape of the sample i s not c r i t i c a l . The c i r c u l a r samples used were formed by masking arid sandblasting. Four aluminum contacts were then evaporated along the circumference 52 ZONE AXIS [»0] (b) i 371 333 • 375 • • 260 (222) • 224 • • _ 777 151 • • fit ZOA/E AXIS [572] ZONE AXIS [ 277] Figure 2-12 Indexed D i f f r a c t i o n Patterns f o r a S i l i c o n Film (a) I d e n t i f i c a t i o n of Pattern i n Figure 2-11(d) (magnified); ("b) and (c) I d e n t i f i c a t i o n of Patterns Taken at Different Orientation of the Film with Respect to the Electron Beam. 53 of the sample and alloyed at 570°C in a nitrogen atmosphere to ensure ohmic contacts to the silicon film. The measuring circuit (73) was similar to the one described by Mitchell and Putley. The measurements were carried out at constant current. A Keithley 600-A electrometer with an input impedance of lO"^ ohms was used as a voltmeter or as a null detector in conjunction with a potentiometer to measure small voltage changes. Due to the high resistivity of the samples, large portions of the c ir -cuit had to be shielded to prevent stray signals from entering the meter, and the system was set up on a teflon sheet to obtain the best insulation resistance.* The resistivity was calculated in the usual manner (72) for van der Pauw geometries ' by substituting in the equation: O - « d (V12.34 + V2o-.41) f ( 2 - 2 )  r " 2 In 2 1 I ; \***J where P i s the resistivity in TL-cm, d is the thickness of the sample in cm, V12 34 i s ^ n e v o l " t a S e across contacts 3 and 4 whejv the current I is through 1 and 2,and the contacts are numbered in order around the circular sample, and f is a function of 1 2t?4.(72) V23,41 The mobility was calculated from the equation; * A circuit similar to the one described by Fisher et al^^) for measuring Hall effect in high resistivity semiconductors, is presently being used by T.W. Tuoker(75) of this laboratory for a more detailed investigation of the galvanomagnetic effects in silicon films. 54 .. d A V24.15 l o f ( 0 where |i is the mobility in cm /volt-seo, H is the magnetio field aoross the sample in oersteds, and AV24 ^  i s ^e c n a n S e i n voltage Vg4 13 ^ u e ^ ° the magnetic f ield. The thickness of the silicon samples was determined by the infrared interference technique described in section 2.6.* The results of the measurements on films deposited 0 at 300 A/min are shown in Table 2-2. The accuracy on the resistivity measurements was estimated at + 5f° while the accuracy on mobility measurements was + 15# . Prom these measurements, i t appears that the hole mobility In the single crystal films is smaller (by a factor of 1 5 ) than the mobility in bulk silicon and that the density of carriers is an order of magnitude larger than the acceptor density in the source material. Both the low mobility and the increased carrier density are possibly due to the large density of crystallographic defeots (see section 2.1.2) present in the films. 2.8.3 Minority carrier lifetime The minority carrier lifetime was measured by the photoconductivity methodw ; which involves the measurement of the decay of the photoconductive current response in the semi-conductor after excitation by light. The minority carrier * The thickness of the films was also determined by weighing: and was in a l l cases within 5 $ of the value determined by optical interference. Substrate Temperature Conductivity Type Structure of Film Thickness of Film R e s i s t i v i t y Hole mobility cm /volt-sec Carrier Concentration cm" 5 950 ° c P polycrys-^ t a l l i n e 0.90 10 4 — — 990 ° c P oriented polycrys-t a l l i n e 0.92 4 x 10 5 1 1.8 x 1 0 1 5 1050 ° c P single c r y s t a l 0.5 0.5 x 10 5 20 6.3 x 1 0 1 4 1050 °0 P single c r y s t a l 0.94 0.4 x 10 5 32 4.9 x 1 0 1 4 1100 ° c P single c r y s t a l 0.90 0.6 x 10 5 28 3.7 x 1 0 1 4 Table 2-2 "'Resistivity and Mobility f o r S i l i c o n Films Deposited at Various Substrate Temperatures 56 l i f e t i m e was found to be between 1-2 usee i n the s i n g l e c r y s t a l f i l m s . 2.9 O p t i c a l A b s o r p t i o n Edge of the S i l i c o n F i l m s The onset o f o p t i c a l a b s o r p t i o n i n a semiconductor occurs when the i n c i d e n t photon energy i s equal t o the f o r b i d d e n energy gap between the valence and conduction bands. Studies of t h i s a b s o r p t i o n edge y i e l d u s e f u l i n f o r m a t i o n on the band s t r u c -t u r e and the c r y s t a l l i n e p e r f e c t i o n of the semiconductor. In p a r t i c u l a r i t has been shown t h a t the I n t e r n a l s t r a i n due to d i s l o c a t i o n s o r g r a i n boundaries causes a broadeningvof the (77) a b s o r p t i o n edge o f the semiconductor. v''' In t h i s i n v e s t i g a t i o n , the a b s o r p t i o n spectrum of the s i l i c o n f i l m s d e p o s i t e d a t v a r i o u s s u b s t r a t e temperatures was compared with t h a t of bul k s i n g l e c r y s t a l s i l i c o n . The d i f f e r e n c e between the s p e c t r a of the s i n g l e c r y s t a l and the evaporated f i l m s can be a t t r i b u t e d t o i n t e r n a l s t r a i n s In the f i l m s and i s used as a q u a l i t a t i v e measure of the c r y s t a l l o g r a p h i c p e r f e c t i o n of the f i l m s . T h e / r e l a t i o n between the a b s o r p t i o n c o e f f i c i e n t a of a s i l i c o n specimen of t h i c k n e s s d and the t r a n s m i s s i o n t of the ,.(77) -ad specimen and mount may be w r i t t e n asi V ( 1 - r , ) ( l - r p ) e t = f ( r i ) 1 * g -2«d 1 ' ^ where r ^ and r 2 are the r e f l e c t i v i t i e s o f the f i r s t and second specimen s u r f a c e s and f ( r ^ ) i s a f u n c t i o n of the r e f l e c t i v i t i e s of a l l other i n t e r f a c e s t r a v e r s e d by the beam. I n t e r f e r e n c e 57 fringes due to multiple r e f l e c t i o n s inside the specimen were obtained, giving an indic a t i o n of the thickness of the sample (see section 2.6). They were e a s i l y averaged so phase factors were neglected i n equation 2-4. In the small spectral range under investigation (0.6 to 1.8 \x) the absorption c o e f f i c i e n t a of s i l i c o n was small and a l l other materials were transparent. Thus the v a r i a t i o n of the r e f r a c t i v e indices and hence the v a r i a -t i o n of the r e f l e c t i v i t i e s of a l l materials were n e g l i g i b l e . Since only the r e l a t i v e shape of the absorption curves was of i n t e r e s t , the transmission data were normalized so that t_ = 1 n i n the spectral range where the specimens were transparent. This avoided the introduction of the effect of substrates and interfaces with only a small error. The expression used to —ttd (78 calculate a was t = e with an estimated error i n a of 10?^ w The measurements were carried out.at room temperature using a Cary spectrophotometer. The evaporated specimens were a l l approximately 1 LI thick. The single c r y s t a l s i l i c o n specimen was prepared from a ( i l l ) p-type, 100 J l -cm, s i l i c o n wafer and thinned down to a thickness of 1 n by jet chemical polishing using an HNO^/HF mixture. The results are shown i n Figure 2-13. As the substrate temperature i s raised, the absorption edge becomes sharper, however i n a l l cases, i t i s broader than the absorption edge of single c r y s t a l s i l i c o n i n d i c a t i n g a large density of dislocations and grain boundaries even i n the single c r y s t a l films« V (cm ') 5000 4000 3000 2000 WOO ABSORPTION COEFFICIENT SINGLE CRYSTAL 1100°C W50°C 990 C 950'C SUBSTATE TEMP, TYPE OF FILM 880°C AMORPHOUS 950°C POLYCRYSTALLINE 990°C POLYCRYSTALLINE WITH PREFERRED ORIENTATION 1050 C ORIENTED SINGLE CRYSTAL 7700C ORIENTED SINGLE CRYSTAL 880°C 1JJ=1-24 QV 1-8 1-6 1'4 1-2 1-0 WAVELENGTH (JJ) Figure 2-13 The Ef f e c t of Substrate Temperature on the Absorption Edge of S i l i c o n 00 59 2.10 Summary An electron beam method of evaporating s i l i c o n films on sapphire substrates was described i n the preceding sections. The evaporation was carried out from a high r e s i s t i v i t y ( > 200 fl-cm) p o l y c r y s t a l l i n e s i l i c o n source i n a t y p i c a l vacuum -7 of 7 x 10 mm Hg. The evaporation rates used ranged from o 200 - 600 A/min. The thickness of the films was 0.5 to 2 u. The films obtained were of (111) orientation and exhibited single c r y s t a l d i f f r a c t i o n patterns when the substrate temperature was i n the range 1050 to 1100°C. The films were high r e s i s t i v i t y ( > 400 fl -cm) p-type. The c a r r i e r mobility i n the single c r y s t a l f ilms was of the order of 20 - J>0 cm /vo l t sec and the minority c a r r i e r l i f e t i m e was t y p i c a l l y 1 - 2 p-sec. The o p t i c a l absorption edge of the films was found to be broader than the absorption edge of single c r y s t a l s i l i c o n at a l l substrate temperatures. The low c a r r i e r mobility of the f i l m s , the low minority c a r r i e r l i f e t i m e as well as the broadening of the op t i c a l absorption edge seem to indicate the presence of a large number of crystallographic defects i n the fi l m s . 60 3. STUDY OP THE CHARACTERISTICS OP THE SILICON/EVAPORATED SiO x INTERFACE Evaporated s i l i c o n oxide films have "been used as the ins u l a t i n g layers i n the s i l i c o n t h i n - f i l m t r a n s i s t o r s described i n t h i s work as well as i n CdS and CdSe t h i n - f i l m t r a n s i s t o r s . The e l e c t r i c a l properties of these devices were found to depend to a large extent on the properties of the semiconductor/insulator interface. This chapter contains the results of a study of the gross cha r a c t e r i s t i c s of the silicon/evaporated s i l i c o n oxide interface interpreted on the basis of a simple physical model. The method used i n the study of the properties of the , interface i s the MOS (metal/oxide/semiconductor) t e c h n i q u e . ' This involves the study of the capacitance of the semiconductor surface as a function of the applied normal e l e c t r i c f i e l d . This technique i s p a r t i c u l a r l y easy to use i n the study of oxide covered surfaces since the metal/oxide/semiconductor sandwich provides a convenient capacitor. The essence of the MOS technique l i e s i n a comparison between an idealized t h e o r y a n d experi-mental observations: conclusions regarding the nature of the interface are based upon interpretation of the deviations between, the two. The MOS technique has been used very successfully i n the study of the Si/thermally grown 810^ system. It has been shown on tlie1 basis of numerous experiments on that system that: (l). The charge i n the surface states i s p r a c t i c a l l y independent of surface potential, 61 (2 ) The charge i n the s u r f a c e s t a t e s i s p o s i t i v e f o r (3) both n-and p-type s i l i c o n and i s independent of the oxide t h i c k n e s s o r the doping l e v e l , ^ 8 ^ The s u r f a c e s t a t e charge d e n s i t y i s t y p i c a l l y 2 - 5 x 1 0 ^ 0 . - 2 . ( 8 0 ) , ( 8 1 ) The main ob j e c t of the i n v e s t i g a t i o n r e p o r t e d i n the next s e c t i o n s i s the e v a l u a t i o n of evaporated s i l i c o n oxide f i l m s as p a s s i v a t i n g l a y e r s on the s u r f a c e of s i n g l e c r y s t a l s i l i c o n and i n p a r t i c u l a r the d e t e r m i n a t i o n of the e f f e c t i v e s u r f a c e s t a t e d e n s i t y at the s i l i c o n / e v a p o r a t e d s i l i c o n oxide i n t e r f a c e . 3.1 P r i n c i p l e s o f the MOS Method F i g u r e 3-1. I t c o n s i s t s of an evaporated aluminum f i e l d p l a t e ( r e f e r r e d to as the "gate")t the oxide d i e l e c t r i c , and the s i l i c o n s u b s t r a t e . Contact t o the back o f the s i l i c o n s u b s t r a t e i s through an evaporated aluminum e l e c t r o d e . Consider a MOS s t r u c t u r e based on a p-type semiconductor. I f the v o l t a g e The MOS s t r u c t u r e i s i l l u s t r a t e d s c h e m a t i c a l l y i n Oxide - A l Gate A l F i g u r e 3-1 The MOS S t r u c t u r e a p p l i e d to the f i e l d p l a t e , V &, i s nega t i v e , h o l e s are a t t r a c t e d to the v i c i n i t y of the i n t e r f a c e so t h a t the semiconductor i s much 6 2 l i k e a metal and the capacitance of the MOS structure is approximately the same as the capacitance of the oxide layer alone. On the other hand i f the applied voltage i s made posi t i v e , holes are repelled from the v i c i n i t y of the interface, leaving behind a space charge region of uncompensated ionized acceptor ions. This region w i l l be referred to as the depletion region. Because the depletion region adds to the thickness of the d i e l e c t r i c , the capacitance decreases. Upon further increase i n the positive applied voltage, electrons are attracted to the v i c i n i t y of the interface and form an extremely narrow inversion layer. Additional charge induced i n the semiconductor by further increase i n the applied voltage w i l l almost e n t i r e l y appear i n the inversion region and therefore the depletion region stops increasing i n s i z e . Correspondingly the capacitance reaches a minimum value. In the case where the measurement frequency i s low enough i n comparison with the generation rate of minority c a r r i e r s , the electrons w i l l be able to follow the variations of the ac measurement signal, and the capacitance w i l l r i s e again to the (82 ) value of the oxide capacitance. ' The maximum width of the depletion region, however, i s independent of frequency. In the following discussion only the high frequency c h a r a c t e r i s t i c s w i l l be considered. In the absence of surface states and work function difference between the metal and the semiconductor, the capaci-tance of the device can be assumed to be due to two capacitances i n s eries, one due to the oxide and the other due to the space charge at the s i l i c o n surface. Thus the t o t a l capacitance per 63 unit area i s : C C S 0 where C Q i s the oxide capacitance per unit area and C g i s the space charge capacitance per unit area. The relationship between the gate voltage V^, the s i l i c o n space charge density Q g per unit area and the surface potential 0 defined i n Figure 3-2, i s s given by: V G = 0 S - 5fl . (5.2) o The t h e o r e t i c a l relationship between 0 a , Q and C s s s fart \ f o r s i l i c o n has been calculated by Whelan. From t h i s relationship and equations (3-1) and (3-2), knowing the oxide capacitance,one can calculate a t h e o r e t i c a l curve f o r the capacitance vs gate voltage (C-V) f o r a given doping i n the s i l i c o n substrate. The effect of the work function difference 0..„ between the metal and the semiconductor and of the surface state MS charge per unit area Q at the insulator/semiconductor interface ss i s simply additive to that of the applied gate voltage, and results i n a s h i f t of the C-V curve along the voltage axis. If the charge i n the surface states i s independent of surface potential, t h i s charge can simply be determined from the d i s -placement between the.theoretical and experimental C-V character-i s t i c s . The experimental gate voltage i s given by: VG = 0 S " C^ + (0MS - S") ' (5-3) o o 64 where the quantity in brackets represents the offset between the experimental and theoretical curves. 3.2 Experimental Procedure Boron-doped ( i l l ) silicon wafers* were used. The resistivity of the silicon was 1.5 n .-cm. The lapped wafers were cleaned and chemically polished in a mixture of 4 parts HF to 10 parts HNO .^ Aluminum was evaporated on the back side of the wafers and alloyed in a nitrogen atmosphere for 5 minutes at 570°C, and the wafers were then allowed to cool down to room temperature in the nitrogen atmosphere to prevent formation of oxide on the front side of the wafer. The oxide layers were evaporated from pellets of silicon monoxide** at a rate of 5 - 1 0 A/sec using a modified Drumheller type source. The gates consisted of circular aluminum dots 350 \x in diameter evaporated onto the oxide through a beryllium-copper photo-etched mask. A total of 36 devices were fabricated in four batches. The capacitance-voltage characteristics of the resulting MOS devices were usually obtained at room temperature and in the dark. Figure 3-3 shows a simplified diagram of the C-V measuring equipment. An ac signal (10 mV rms) is super-imposed on a dc bias and applied to the MOS device* The termina-tion resistor R is a much lower impedance than the capacitor and the voltage appearing across i t is thus proportional to the MOS capacitance. This voltage is amplified, converted to dc and applied to the vertical channel of an x-y recorder. The bias * Texas Instrument Co. Inc., Dallas, Texas. ** "Select Grade", Kemet 0o o, Cleveland, Ohio. 65 Metal V G > ° E p (Metal) Oxide 0 S " Semiconductor (P-type) E E. l % E Inversion Depletion Figure 3-2 The Energy Bands i n an MOS Structure Under Applied Gate Bias R DC Bias + AC Signal (100 kHz) 2 MOS Capacitor Tuned Amplifier &• N u l l Detector* T AC-DC** Converter DC Bias-I X-Y Y X Recorder J l * GR Type 1232-A ** Moseley Type A - l *** Moseley Type 135 Figure 3-3 Diagram of C-V Measurement Equipment 66 voltage i s e l e c t r o n i c a l l y swept about any d e s i r e d average value such t h a t a C-V curve i s traced i n about 100 sec. The measure-ment frequency was 100 kHz. In most cases the curves followed the high frequency c h a r a c t e r i s t i c s . Some of the samples were sel e c t e d f o r more p r e c i s e measurements u s i n g a General Radio 1615-A Capacitance Bridge. The t h i c k n e s s of the oxide l a y e r s and t h e i r i n d i c e s o r e f r a c t i o n were determined u s i n g an L119 Gaertner e l l i p s o m e t e r . ^ The d i e l e c t r i c constant of the oxide was measured by applying a b i a s l a r g e enough to produce a strong accumulation l a y e r at the semiconductor s u r f a c e , such a l a y e r a c t s as a metal electrode and only the oxide capacitance i s measured. 3.3 Experimental R e s u l t s Figure 3-4 shows the experimental and t h e o r e t i c a l capacitance-voltage c h a r a c t e r i s t i c s f o r a t y p i c a l sample. The two curves are approximately p a r a l l e l throughout the e n t i r e range of v a r i a t i o n of the capacitance, l e n d i n g support to the assumption that the charge i n the surface s t a t e s i s independent of surface p o t e n t i a l . Thus the h o r i z o n t a l displacement between a p a i r of p o i n t s corresponding t o the same value of capacitance Q on the two curves 'immediately'.yields the value (-0M g + o i n t h i s case 3.6 V. The metal-semiconductor work f u n c t i o n f o r p-type 1 6 —I s i l i c o n w i t h about 10 cm~^ i m p u r i t i e s i s approximately - 0 . 7 v . On t h i s b a s i s 7 7 ^ = 2.9 7 and therefore = 3.6 x 10 1 : Lcm~ 2. C o q In a l l cases the charge i n the surface s t a t e s was found to be A _c U Co EXPERIMENTAL C-V CHARACTERISTIC SAMPLE & 3.1 P-TYPE SILICON NA - WWcm3 t0x-0 2190ji ^ -6 C0= 0.020x10 F/cmz X-Y RECORDER TRACE * BRIDGE MEASUREMENTS THEORETICAL C-V CHARACTERISTIC -8 -4 VQ (VOLTS) (EXPERIMENTAL) 8 Figure 3*4 Determination of the Surface State Density by Comparison of the Experimental Characteristic with the Theory for P-type S i l i c o n 68 p o s i t i v e and independent of the oxide thickness. However i t was observed that the effective surface charge density was consistently larger f o r the oxides evaporated i n low vacuum. The charaeteris-- 7 _R t i c s of two samples evaporated at 5 x 10 mm Hg and 5 x 10 mm Hg respectively are l i s t e d i n Table 3-1. In some of the samples a hysteresis i n the C->V char-a c t e r i s t i c s was observed. The hysteresis can be attributed to limited migration of the space charge i n the oxide during t r a c -ing of the C-V curve or to electronic trapping effects within the oxide. The effect of the ambient on the C-V characteristics was also observed. Figure 3-5 shows the C-V curve before and after exposure to water vapour and vapour from a water solution containing NaCl. The s h i f t i n the ch a r a c t e r i s t i c a f t e r exposure to water vapour was found to be reversible under heat treatment at 120°C. In the case of exposure to NaCl vapour the s h i f t i s considerably larger and was found to be only p a r t i a l l y reversible under heat treatment with applied gate voltage* The adsorbed ionic charge density can be estimated from the s h i f t of the char a c t e r i s t i c C-V curve. In the case of water vapour the ioni c 11 -2 charge density i s approximately 10 cm and i n the case of 11 -2 sodium contamination i t i s 3 x 10 cm . 3.4 Summary The e f f e c t i v e surface state density at the Si/evaporated 11 —2 SiO interface i s of the same order of magnitude (3-4 x 10 cm ) as that at the Si/thermally grown S i 0 5 interface. Furthermore, Sample # Pressure During Evaporation mm Hg Rate of Evaporation 0 A/sec Thickness 0 A Optical Refractive Index Relative Permittivity Effective Surface State Density cm"2 3.1 5 x 10"7 5 2190 2.03 5. 3.6 x 10 1 1 4.2 5 x 10~5 5 2260 1.85 4.8 9 x 10 1 1 Table 3-1 Characteristics of Typical MOS Samples -10 -8 -6 -4 -2 0 V6 (VOLTS) (EXPERIMENTAL) —j Figure 3-5 E f f e c t of Ambient on the C-V Characteristics 71 the surface state density i s larger with an oxide evaporated i n poor vacuum than with one evaporated i n good vacuum. This result i s i n agreement with the experimental observations made on the threshold voltage of the TFTs (see section 4 . 2 ) . The larger surface state densities i n the oxides evaporated under poor vacuum are probably due to the presence of excess ions within the oxide. Water vapour and i n p a r t i c u l a r high mobility ions 'like sodium appear to have a considerable effect on the semi-conductor surface potential and are probably the cause of the d r i f t and i n s t a b i l i t i e s observed i n the threshold voltage of the TFTs (see section 4.5). 4. SILICON THIN-FILM .TRANSISTORS 72 4,1 Devioe F a b r i c a t i o n The devioes were f a b r i c a t e d by evaporation onto sapphire substrates (60° o r i e n t a t i o n ) . The photograph of an a c t u a l device i s shown i n Figure 4-1. The method and the system used i n the d e p o s i t i o n o f the s i l i c o n t h i n f i l m s were described i n s e c t i o n 2.4 and 2 . 5 . Most of the devices were f a b r i c a t e d on predominantly s i n g l e c r y s t a l f i l m s unless otherwise noted. The . system used i n the d e p o s i t i o n of the metal electrodes and the i n s u l a t o r f i l m s i s an 18" glas s b e l l - j a r Veeco evaporator. The" system i s evacuated by means of a 4" o i l d i f f u s i o n pump and a l i q u i d n i t r o g e n cooled t r a p . A movable substrate holder and shutt e r are f i t t e d i n s i d e . t h e b e l l j a r and can be operated from outside the vacuum system. A photograph of the evaporation system i s shown i n Figure 4-2. The thickness of the evaporated f i l m s was monitored d u r i n g evaporation by means of c a l i b r a t e d /CC\ I C n \ quartz c r y s t a l ^ o s c i l l a t o r s f i t t e d i n s i d e the vacuum system close to the substrate. A separate vacuum c y c l e was used f o r eaoh evaporation. The electrode and i n s u l a t o r patterns of the experimen-t a l TFTs were produced by means of photo-etched beryllium-copper masks mounted close to the substrate i n a j i g which permitted the adjustment of the substrate r e l a t i v e to the mask. The souroe-drain gap was defined by means of a 20 p. tungsten wire stretched aoross the source-drain mask and the gap width was 0.16 cm. 73 The most c r i t i c a l dimensions of the insulated-gate transistor are the thickness of the insulator, the l a t e r a l spacing of the source-drain gap and the positioning of the gate. The semiconductor thickness i s not p a r t i c u l a r l y o r i t i c a l except when the semiconductor r e s i s t i v i t y i s so low that i t s thickness must be kept to a minimum. The area of the semiconductor and insulator and the thickness of the metal electrodes need be controlled but are not usually c r i t i c a l . S'Ox Figure 4-1 Photograph of a S i l i c o n Thin-Film Transistor 4.1.1 The source-drain contacts The operation of the s i l i c o n TFT requires an ohmic source contact to the inversion (n-type) layer, i . e . a minority c a r r i e r (electron) i n j e c t i n g contact with respect to the p-type f i l m (see section 1 .4). Aluminum electrodes were found to make (86) i n j e c t i n g contacts to the p-type s i l i c o n f i l m s . The experi-mental V-I cha r a c t e r i s t i c s of these contacts are discussed i n section 4 .2 . 1 . The aluminum (99.999$ purity) c l i p s were evaporated 74 Figure 4-2 Photograph of the A l , SiO Evaporation Setup 75 —6 from tungsten wires i n a vacuum of 10~ mm Hg at a r e l a t i v e l y o fast rate ( » 1000 A/min). The thickness (oi the:source and o drain electrodes was t y p i c a l l y 1000 A. The exposure of the s i l i c o n films to the atmosphere p r i o r to the evaporation of the source-drain contacts was kept a minimum i n order to reduce the formation of the oxide f i l m which normally covers the s i l i c o n surface and which may hinder the transport of c a r r i e r s especially at low temperatures. Failure to achieve good i n j e c t i n g contacts at the source can give r i s e to a low transconductance and to the peculiar (28) "crowded"v ; c h a r a c t e r i s t i c s i n which the transconductance, instead of increasing with gate "bias, l e v e l s o f f and decreases towards zero as the family of c h a r a c t e r i s t i c V D - I D curves crowd together at a maximum value of,1^. A poor contact at the drain electrode i s le s s serious hut i t y i e l d s an S-shaped char-a c t e r i s t i c i n the neighborhood of the o r i g i n . 4.1.2 The in s u l a t i n g layer The s i l i c o n oxide SiO in s u l a t i n g layers were 'evaporated from iV p e l l e t s of s i l i c o n monoxide* The source heater was a modified Drumheller^ 8 4^ type source consisting of a tantalum canister with a tantalum screen. The source temperature was measured by means of a thermocouple inserted i n the center of the c a n i s t e r . The SiO layers were t y p i c a l l y o x 1000 - 2000 A thick and were evaporated from a source at a temperature of about 1200°C to 1250°C r e s u l t i n g i n rates of o deposition of 3 to 10 A/sec. The pressures used during * "Select Grade", Kernet Co., Cleveland, Ohio. 76 evaporation ranged from 5 x 10""'' mm Hg to 3 x 1 0 " 7 .mm Hg. The low frequency r e l a t i v e p e r m i t t i v i t y of the oxide was found t o vary between 4.8 and 5 (see s e c t i o n 3.3). I n s u l a t i o n breakdown f i e l d s i n excess of 10 vplt/cm were obtained' and the d i e l e c t r i c l o s s tangent at 1 kHz was t y p i c a l l y between 0.01 and 0.03. 4.1.3 The gate electrode The d e p o s i t i o n conditions of the aluminum gate electrode were i d e n t i c a l t o those of the source-drain eleotrodes. 4#2 Experimental R e s u l t s 4.2.1 Y I o h a r a o t e r i s t i c s of the source-drain contacts The t y p i o a l volt-ampere c h a r a c t e r i s t i c s from source to d r a i n are shown i n Figure 4^3 e Before a p p l i c a t i o n of the oxide the c h a r a c t e r i s t i c i s e s s e n t i a l l y the same as t h a t f o r back t o back diodes. A f t e r a p p l i c a t i o n of the oxide the charac-t e r i s t i c i n d i c a t e s a conducting path from souroe to d r a i n due to the formation of an i n v e r s i o n l a y e r , 4.2.2 Operating o h a r a o t e r i s t i c s of the s i l i c o n TFTs The measurements reported here were c a r r i e d out w i t h the devices i n vaouum and i n the dark. The ambient pressure was maintained i n the one to ten micron range by means of a r o t a r y vacuum pump, Aoourately p o s i t i o n e d platinum wire probes were used t o make e l e c t r i c a l contacts to the t r a n s i s t o r s . The V D - ID o h a r a o t e r i s t i c s were obtained u s i n g a Tektronix 575 t r a n s i s t o r curve t r a c e r . Figure 4-4 shows a set of d r a i n current vs d r a i n 77 voltage characteristics for one of the transistors fabricated. The unit shown has a maximum transconductance of 60 umho * The dynamic output resistance derived from the saturated portion of the ourve is 150 kP, The voltage amplification factor calculated from the product of these two quantities is 9. The input capacitance under operating conditions is 40 pf for a gate width of 50 u. The calculated gain-bandwidth product is 0.25 MHz, and the dc input resistance is larger than 10 1 0 SI. Some of the devices built with the same geometry exhibited transconductances of up to 100 umho , voltage gains of 20 and gain-bandwidth products of 1 MHz. Most of the devices fabricated were depletion mode devices, i .e . was negative. However, i t was found experimen-tally that the magnitude of V T could be oontrolled between 4 and 12 volts by proper choice of the oxide insulator. If the oxide was deposited in good vacuum (5 x 10 mm Hg) and at fast o , . rate (10 A/sec), the resulting |Vj| value was small. An example of the oharaoteristios of this type of devioe is shown in Figure 4-4. If the oxide layer was evaporated in poor vacuum r o (5 x 10 mm Hg) and at slow rate (3 A/sec) the resulting | V T value was large. Figure 4-5 shows the V-Q - I D characteristics for a device with Vq, = -10 Vv Similar effects were observed on the MOS structure investigated in chapter 3. The TFT characteristics exhibit good,saturation as shown in Figures 4-4, 4-5 and 4-6(a), (b). The finite incremental source-drain resistance in the saturation region is most pro-bably due to spaoe-charge-limited currents in the pinched-off r e g i o n / 5 1 ^  78 ID(HA) Figure 4-3 » X* Characteristics of the Source-Drain Contacts Some of the derides "built on high resistivity single crystal or polycrystalline silicon failed to saturate and exhibited characteristics similar to the plate characteristics of a vacuum triode as shown iri Figure 4-7. This behavior can be attributed to the fact that a conducting channel is not formed and the device operates as a space-charge-limited triode. ( 15>>(87) 7 9 TFT # 1 Figure 4-4 Operating V D - Characteristics for a S i l i c o n TFT (EV/div. horizontal, 50uA/div. v e r t i c a l , gate voltage 0.5V/step); S i thickness tx 0.5u, SiO thickness 0 . 2 n , A l Electrodes thickness =r O.lu. TFT #6 Figure 4-5 Operating V D - I D Characteristics f o r a S i l i c o n TFT (2V/div. horizontal, 20uA/div. v e r t i c a l , gate voltage lV/step) 80 F i g u r e 4-8 shows the c h a r a c t e r i s t i c curves of a t r a n s i s t o r w i t h d r a i n v o l t a g e extended i n t o the breakdown r e g i o n . A " s o f t " (gradual) breakdown i s apparent w i t h a hardening of the knee as the gate v o l t a g e decreases. T h i s breakdown i s most l i k e l y to occur between source and d r a i n and begins i n the r e g i o n of maximum f i e l d near the d r a i n . The s o f t breakdown c h a r a c t e r i s t i c i s caused by the g e n e r a t i o n of impact i o n i z e d h o l e - e l e c t r o n p a i r s i n the h i g h f i e l d of the d r a i n r e g i o n . Since these h o l e s and e l e c t r o n s a c t as a s h i e l d i n g plasma, the Onset (8 of severe avalanohing i s spread out over a wider v o l t a g e range. The average breakdown f i e l d observed i n the d e v i c e s t e s t e d v a r i e d between 1.5 x 10^ to 2.5 x 10^ volt/cm. These v a l u e s are of the same order o f magnitude as the ones obtained i n MOS t r a n s i s t o r s , but are much s m a l l e r than the f i e l d r e q u i r e d f o r avalanohing i n b u l k s i l i c o n (2 x 1 0 5 v o l t / c m ) . T h i s i s probably due to the f a c t t h a t the breakdown i n the TFT i s a su r f a c e e f f e c t , dominated by imperfections a f f e c t i n g the s u r f a c e channel, r a t h e r than a b u l k e f f e c t . 4.2.3 Comparison o f the s i m p l i f i e d theory w i t h experiments In t h i s s e c t i o n , the elementary theory presented i n s e c t i o n 1*5 and the c h a r a c t e r i s t i c s c a l c u l a t e d from i t ( s e c t i o n 1,6) are compared wi t h experimental data taken on some of the f a b r i c a t e d d e v i c e s . Experimental data were obtained f o r the f o l l o w i n g c h a r a c t e r i s t i c s J (a) I D vs V & w i t h Y D as a parameter ( t r a n s f e r c h a r a c t e r i s t i c s ) , (b) g m vs V & w i t h V"D as a parameter and 81 TFT # 5 Figure 4-6 S a t u r a t i o n - 1^ C h a r a c t e r i s t i c s (a) 5V"/div. h o r i z o n t a l , 50uA/div. v e r t i c a l , gate voltage l V / s t e p (b) 5V/div. h o r i z o n t a l , lOOp-A/div. v e r t i c a l , gate voltage 2V/step 82 TFT # 9 D I D Characteristics f o r a TFT Fabricated Figure 4~7 Operating V D on a Po l y c r y s t a l l i n e S i l i c o n Film (lV/div. horizontal, lOpA/div. v e r t i c a l , gate voltage lV/step) TFT # 16 Figure 4-8 Operating V D - 1^ Characteristics f o r a TFT Showing the Breakdown Region (gV/div. horizontal, lOOuA/div, v e r t i c a l , gate voltage lV/step) 83 (c) g d Q vs VQ w i t h V-Q = 0, The t r a n s f e r c h a r a c t e r i s t i c s were obtained at dc and were recorded d i r e c t l y u s i n g an x-y r e c o r d e r . The channel conductance as a f u n c t i o n of dc gate v o l t a g e was obtained by g r a p h i c a l l y d i f f e r e n t i a t i n g the dc V^ - I D curves near the o r i g i n . I n order t o check the accuraoy o f t h i s method the channel conductance was a l s o measured by a p p l y i n g a s m a l l ac v o l t a g e (100 Hz) i n s e r i e s w i t h the s o u r c e - d r a i n and d e t e r -mining the ac c u r r e n t . R e s u l t s obtained from these two methods agreed w i t h i n 5$. The transconductance was measured by superim-. posing a s m a l l ac s i g n a l ( l kHz) on the dc b i a s between gate and source. The ac s i g n a l s used i n a l l measurements were s m a l l e r than 5 mV rms. The ac channel c u r r e n t s were determined by measuring the v o l t a g e a c r o s s a s m a l l r e s i s t a n c e R 10 ohms) i n s e r i e s w i t h the channel. A narrow band d e t e c t i o n system was used throughout the measurements. The detected s i g n a l was converted t o dc and a p p l i e d to the y channel of an x-y r e c o r d e r . F i g u r e 4-9 shows a s i m p l i f i e d diagram o f the transconductance measurement setup. G Tuned* A m p l i f i e r & N u l l D e t e c t o r u J AC-DC** Converter Y X Recorder * GR Type 1232-A ** Moseley Type A - l *** Moseley Type 135 F i g u r e 4-9 S i m p l i f i e d Diagram o f the Setup Used i n the Trans-Conductance vs Gate Voltage Measurements. 84 From the t r a n s f e r c h a r a c t e r i s t i c s , a p l o t of \j I D g vs VQ can be obtained and "is shown f o r TFT #2 i n F i g u r e 4^10. L i n e a r dependence of / i p g on the gate v o l t a g e i s observed over a range of gate v o l t a g e s i n agreement w i t h the theory. Departure from l i n e a r i t y i s observed at low and h i g h gate v o l t a g e s . From the slope of the p l o t , knowing the oxide capacitance and the dimensions of the device one can determine the e f f e c t i v e m o b i l i t y of the c a r r i e r s i n the channel from equation (1-7). The e f f e c t i v e m o b i l i t y i s g i v e n by: F o r the d e v i c e under c o n s i d e r a t i o n , the experimental e f f e c t i v e 2 " m o b i l i t y i s approximately 5 cm / v o l t - s e c . The b e s t d e v i c e s f a b r i c a t e d had e f f e c t i v e m o b i l i t i e s as h i g h as 10 om / v o l t - s e c . The agreement between the i d e a l theory and the measurements of transconductance i s l e s s s a t i s f a c t o r y , as can be observed i n F i g u r e 4-11. The transconductance has a maximum near the s a t u r a t i o n gate v o l t a g e and i n s t e a d of remaining constant i n the ss a t u r a t i o n r e g i o n i t decreases a t h i g h gate v o l t a g e s . A disagreement i s a l s o i n d i c a t e d i n the g^Q vs VQ. curve as shown i n F i g u r e 4-12. The conductance i s v i r t u a l l y zero up to the t h r e s h o l d v o l t a g e V^, then r i s e s g r a d u a l l y and s a t u r a t e s at h i g h gate v o l t a g e s . S i m i l a r departures from the (27) theory have been observed by Sahr '' i n MOS t r a n s i s t o r s f a b r i c a t e d on bulk s i l i c o n . _ l l _ 8 10 Figure 4-10 Experimental Plot of y/^g V S YQ VG ( V 0 L T S ) Figure 4^11 Experimental Transconductance vs Gate Voltage Characteristics Figure 4-12 Experimental Channel Conductance vs Gate Voltage 8 8 The departure from theory at low gate voltages might he attributed to: (1) n o n - l i n e a r i t i e s due to contact e f f e c t s , (2) changes i n the surface mobility, and ( 3 ) the presence of surface traps which as they are gradually f i l l e d with increasing•gate voltage allow more of the charge generated i n the semi-conductor by the gate voltage to contribute to the conduction mechanism. Linear - 1 ^ c h a r a c t e r i s t i c s were observed at small source-drain voltages i n d i c a t i n g that non-linearities due to the contacts can be excluded. Changes i n the surface mobility i n s i l i c o n at (31) low surface f i e l d s have not been reported. The f i l l i n g of surface traps i s therefore the most l i k e l y mechanism which can account f o r the observed discrepancies at low gate voltages. Trapping effects imply a transconductance which i s frequency dependent, as predicted by Haering,^^ who showed that f o r the case of constant mobility the magnitude of the small signal transconductance near zero source-drain voltage i s an increasing function of frequency and the output current leads the output voltage ( i . e . tan > 0 ) regardless of the bias conditions. This behavior arises from the fact that at frequencies which are lower than the c h a r a c t e r i s t i c frequencies of the traps, the transconductance i s reduced since a f r a c t i o n of the induced c a r r i e r s i s always trapped. However, at higher frequencies, the traps are unable to follow the gate voltage variations and have no e f f e c t . 89 In order to confirm the presence of traps, measure-ments of the transconductance as a function of frequency were carried out at zero source-drain voltage. Th^ measurement setup is the same as shown in Figure 4—19 except that a high sensitivity detector (Princeton Applied Research, Lock-in Amplifier Model HR-8) was used to monitor the small- signal source-drain current. The results obtained on TFT #16 are shown in Figure 4-13. As Observed the transconductance is an increasing function of frequency confirming the presence of traps,* however due to the small signals and the small transconductances involved, the measurements had to be restricted by the sensitivity of the measuring equipment to a range of frequencies below 50 kHz prev-enting a complete characterization of the traps. In order to characterize the traps a detailed study of the source-drain conductance is carried out in the following sections. At high gate voltages, under high inversion conditions, most of the surface traps are f i l l ed . The observed reduction in conductance and transconductance with increasing gate voltage can be attributed to the increasing reduction of carrier mobility (91) due to surface scattering and is discussed in section 4.4. (02) Sah and Paov have also attributed some of the decrease of the transconductance in the saturation region in MOS transistors to effects associated with the bulk charge due to ionized impurities * The dielectric relaxation effects, which contribute a decrease in g^ due to the detrrease of the oxide capacitance with increas-ing frequency, were estimated from measurements on an Al/SiO / A l sandwich. The oxide capacitance was found to decrease by 1$ per decade of frequency in the range 10* to 105 Hz. TFT #: 16 9m<f) gm (100) 10* 10J JO* 10* FREQUENCY f (Hz ) Figure 4-13 Normalized Transconductance and Phase as a Function of Frequency 91 and i t s v a r i a t i o n as a function of surface potential. 4.3 The Source-Drain Conductance 4.3.1 Theoretical model to account f o r trapping effects on the source-drain conductance In investigating the surface trapping effects, the assumptions made i n section 1.5 w i l l he taken as v a l i d , except (90) (93) (94) for assumption 4 and instead c a r r i e r t r a p p i n g ^ / M : - " u ' w i l l !be used to account for the observed source-drain conductance ch a r a c t e r i s t i c s . The traps w i l l be assumed to l i e at the s i l i c o n / insulator interface and w i l l be specified by a single energy l e v e l i n the forbidden gap and by t h e i r e f f e c t i v e density and t h e i r capture cross-section f o r electrons. Assuming that the states communicate with the conduc-t i o n band then the rate per unit area at which electrons are trapped i s proportional to the number of free electrons and the number of empty states and i s given by: •S£t = Sv n- <I t - n t ) (4-2) where S i s the effective cross-sectional area of the traps, v i s the thermal v e l o c i t y of free electrons, n^ i s the volume density of free electrons, i s the surface density of traps and n^ i s the surface density of trapped c a r r i e r s . The product S(N^. - n^) i s the probability that an electron i s captured by a state. S i m i l a r l y the rate per unit area at which the electrons are emitted from the traps i s proportional to the number of traps and the density of c a r r i e r s n' which would be present i n 92 the semiconductor i f the Fermi l e v e l was at the trap l e v e l and i s given by: # e = Sv nj_ n t , (4-3) and E n i = N c e k T ' ( 4 " 4 ) where N i s the e f f e c t i v e volume density of free c a r r i e r s \n c the conduction band and E i s the i o n i z a t i o n energy of the traps. The net rate of change of trapped c a r r i e r s i s therefore: * = Sv n« (U x - n. ) - Sv ni n. . (4 - 5(a)) IT, , ' ,s.t c t t I t At equilibrium the rate of change of trapped c a r r i e r s must be zero and therefore: n£ (N t - n t) =n- n t , (4-5(b)) or n c ( N t - n t } = n l n t ' ( 4 " 6 ) .h where nn - \ (y)dy i s the surface density of c a r r i e r s , h 0 n c = j ~ n c ( y ; i s the e f f e c t i v e thickness of the inversion layer, and n l = I n l d 3 r* ^ z e r 0 a P P l i e < ^ gate voltage, equation (4-6) 0 becomes n (1 - f. ) = n, f. , (4-7) co to l to where f, = n, /N. i s the i n i t i a l occupancy of the traps, n TO t O u CO i s the i n i t i a l density of free electrons and n^ i s the i n i t i a l density of trapped c a r r i e r s . 93 The tod;al charge per unit area induced due to an applied gate voltage i s given by: qAn = q(An c + An,.) = C Q V Q, (4-8) or q(An c + An t) = q [ ( n 0 + n^ .) - ( n Q 0 + n ^ ) ] = C Q Y Q . (4-9) If the gate to source voltage i s s u f f i c i e n t l y negative to deplete the i n i t i a l charge, the channel w i l l be cut-off. The voltage at which t h i s happens i s the gate threshold voltage given by: 7 T " " c£ <noo + nto> ' ( 4 - 1 0 ) and therefore q(n c + n t) = C Q (V Q - V T) . (4-11) At equilibrium, with an applied gate voltage, the number of f i l l e d traps,given by equation (4-6), i s : n. = n N. — 4 . (4-12) t n + n, c l Substituting f o r n^ . into equation (4-11) we get: q ( n c 2 + + n ^ ) = - V T ) ( n c + n ^ . (4-13) The charges can be expressed i n terms of the following effective voltages• 94 qN. V + = -w* , (4-15) qn, \ = no • (4-16) Substituting into equation (4-13) we get: V o 2 + V c [ ( V t + V " ( VG " V ] " V V G - " V = 0 ' (4-17) and V c = I [ < W ' ( W ] + I\l E V V T ) ' ( V V 1 } ] 2 + 4 V 1 ( V V T } • * ' (4-18) The source-drain conductance at zero source-drain voltage i s given by: S d 0 - * n o X " °o »n I V o • ( 4" 1 9 ) This expression reduces to equation (l-8(b)) provided i s small and (V^ - V T)^> (V 1 + V^.), i . e . i n the case of small trap densities and large trap i o n i z a t i o n energies. From t h i s model one can also predict that the tempera-ture dependence of the conductance w i l l be determined by the temperature dependence of the mobility and the io n i z a t i o n energy (i m p l i c i t i n n^) of the surface traps. The temperature dependence of the surface mobility of electrons i n s i l i c o n has been i n v e s t i - . (qc) _ i i c gated by Leistiko et a l v ^ y who found a T ' J dependence at high temperatures ( > 100°C). While surface mobility i s highly dependent on surface treatment i t can be assumed that a decrease, of at least no increase i n m o b i l i t y , i s to be expected with .  95 ( Q C ) increasing temperature. ^ ' At low dc gate voltage, the tempera-ture dependence of the conductance w i l l ;be dominated hy the ionization of traps which donate charge to the semiconductor surface thus increasing the number of mobile c a r r i e r s and there-fore the conductance with increasing temperature. The slope of the conductance vs l/T curve should give the i o n i z a t i o n energy of the traps. At higher gate voltage more traps should be f i l l e d , the e f f e c t i v e i o n i z a t i o n energy should decrease and the temperature dependence of the mobility should become more ef f e c t i v e . When a l l the traps are f i l l e d the conductance should r e f l e c t only the mobility change as a function of temperature. By comparing the experimental results with the theory presented above one can determine the effective density of traps, t h e i r i n i t i a l occupancy as well as t h e i r i o n i z a t i o n energy. However, i n order to completely characterize the traps, an estimate of t h e i r dynamic response i s necessary. A method of determining the electron-emission time constant from the trap i s discussed below, It involves measurements of the large signal transient response of the source-drain conductance. Considering equation 4-5(a), the large signal (step response) solution of t h i s equation remains exponential as long as the following two conditions are f u l f i l l e d : n^ < n^ and n^ (97) i s not too small compared to N^. ' The time constant of the process under these conditions i s simply the. electron emission time constant given by: r e = ( B v n j T 1 . (4-20) 96 The above conditions can be maintained over a considerable portion of the amplitude of the relaxation process i f a large positive voltage pulse i s applied to the gate. At the leading edge of the pulse, electrons drop into the unoccupied surface traps and due to the large value of n' established by the positive voltage c step the charging of the states i s fast and equilibrium i s rapidly established between the trapped and mobile electrons. At the termination of the pulse, the excess trapped electrons, i n i t i a l l y repel from the surface an equal number of free electrons and the surface conductance drops abruptly. The subsequent emission of the trapped charge can be measured as a relaxation of the surface conductance to i t s equilibrium value p r i o r to the application of the external f i e l d * When only one set of states i s involved, the i n i t i a l portion of the curve (where n' i s small compared to i t s f i n a l value) i s exponential and can be used to determine the emission time constant. The temperature dependence of the relaxation time can also be used to estimate the i o n i z a -t i o n energy of the traps. Several sets of states may be involved i n the charge emission process. Unless the states are very close i n energy, however, each w i l l dominate the relaxation process at a d i f f e r e n t applied gate voltage and can be singled out accordingly. 4.3.2 Comparison of the modified theory of the source-drain conductance with experiments The experimental measurements were carried out under vacuum and i n the dark on f i v e of the devices fabricated. The1 97 source-drain conductance was measured as a function of a dc applied gate voltage (see section 4.2.3). Measurements of the temperature dependence of the conductance were carried out with the sapphire substrate re s t i n g on a large copper block provided with a heater and a cooling c o i l through which l i q u i d nitrogen could be c i r c u l a t e d . By means of t h i s setup, the temperature of the substrate could be accurately controlled between -200°C and 200°C. The transient reponse of the source-drain conductance to a positive voltage pulse applied to the gate was observed using the c i r c u i t shown i n Figure 4-14.^^ The measurement propedure was as follows: with the pulse applied to the gate and the dc measuring voltage shorted out, the. r e s i s t o r R^ i s adjusted u n t i l the si g n a l on the CRO i s a minimum. Under these conditions, the displacement current i n the MOS capacitor i s evenly di s t r i b u t e d across the two input terminals of the d i f f e r -e n t i a l amplifier. When the dc measuring voltage i s switched on, the trace on the oscilloscope represents very nearly the true (97) f i e l d - e f f e c t s i g n a l . 7 The r e s i s t o r s R^ and R 2 were kept small to prevent the time constant of the c i r c u i t from influencing the relaxation time measurements.^ 8^ The dc measuring voltage was t y p i c a l l y 1-2 v o l t s . To estimate the constant parameters i n equation 4.19, t h i s equation was f i t t e d to the experimental re s u l t s obtained on the f i v e devices investigated. The f i t was . f a i r l y good i n a l l f i v e cases. The estimated trap densities were between 1 1 - 2 4 - 7 x 10 cm and t h e i r i n i t i a l occupancy varied between 0.7 and 0.85. Figure 4-15 shows the t h e o r e t i c a l f i t t i n g of the experimental conductance c h a r a c t e r i s t i c presented i n Figure 4-12 98 Pulse m) Generatorr CRO and D i f f . A m p l i f i e r ll r—U Figure 4-14 C i r o u i t Used i n Measuring Transient Response of the Souroe-Drain Conductance f o r TFT #2. For t h i s device the constants and t r a p p i n g para-meters were estimated to be: N t * 6 i 10 1 1 cm" 2 , n « 2 x 10 1 1 em"2 , oo * n^ as 6 x 10 1 0 cm"2 • For a l l the devices, i n v e s t i g a t e d , the conductance was found to increase w i t h temperature at aero gate voltage and became r e l a t i v e l y l e s s dependent on temperature at gate voltages ranging from 6 to 10 v o l t s i n agreement wi t h the theory. 4 Figure 4-15 Theoretical and 10 Y CofMn ^LTS) THEORETICAL CURVE FOR Vf4'4V. V{+Vt=4-5V.Vj = 0-4V 'do TFT#2 jun = 5cm / VOLT-sec EXPERIMENTAL POINTS imenttal Channel Conductance vs Gate Voltage C h a r a c t e r i s t i c 8 (VOLTS) 100 Experimental temperature dependence data was obtained for both increasing and decreasing substrate temperatures from -50°C to 150°C, The points for increasing and decreasing temperatures f a l l on one smooth curve in three of the samples investigated indicating a stable oxide. In two cases, however, a large hysteresis was observed between the results obtained for increas-ing temperatures and those obtained for decreasing temperatures. This hysteresis is most probably due to ionic charge migration (QQ) within the o x i d e . T h e trap ionization energies at zero gate voltage ranged from 0.16 to 0.22 eV. The temperature dependence of the conductance for TFT #2 is shown in Figure 4-16. The electron emission time constant V in the samples investigated was estimated to be between 10 and 20 u.sec. The observed transient response for TFT #3 is shown in Figure 4-17(a)* and an expanded view of the relaxation waveform for TFT #2 is shown in Figure 4-17(b) from which the relaxation time is estimated to be TT — 10 p,.sec. The temperature dependence of the emission time constant for that device was also measured. The value of the ionization energy (0.18 eV) determined from the slope of the "C vs 1/T plot agrees fairly well with the value determined from the temperature dependence of the con-ductance (Figure 4-16) at zero gate voltage. 4.4 Surface Mobility As mentioned in section 4.2.3,. the observed reduction of g d o with increasing gate voltage is due to the reduction of * Similar waveforms were observed by Miksic et a l ^ 1 ^ ^ in their CdS TFT (unit #l). 1 0 1 21- 1 1 1 1 1 1 1 1 J 1 i . ^ 2 3 * ' 1000° K1 T Figure 4-16 Temperature Dependence of the Channel Conductance 102 Figure 4-17 (a) Transient Response of the Source-Drain Conductance to a Repetitive Pulse (500 p,sec/div. horizontal) (b) Relaxation Waveform at the Termination of the Pulse (5 usec/div. horizontal) Figure 4-18 Temperature Dependence of the Electron Emission Time Constant 104 c a r r i e r mobility caused by surface scattering. The experimentally observed g d Q i s used i n t h i s section to determine the effe c t i v e surface mobility at high surface f i e l d s . A reduction of the surface c a r r i e r mobility r e l a t i v e to the bulk i s to be expected i f the transverse f i e l d (normal to the surface) i s s u f f i c i e n t l y high and i f i n addition the surface i s a diffuse scatterer ( i . e . the c a r r i e r s are randomized thermally upon impinging at the surface). The effect of surface scattering i n semiconductors was discussed by S o h r i e f f e r ^ 1 ^ 1 ^ who extended the treatments of F u c h s ^ ^ 2 ^ and Sondheimer^ 1^ ^  on metal films by incorporating the effects of the surface potential b a r r i e r . (Such effects are inslgnificspit i n metals, where the thickness of the space charge layer i s of the order of an interatomic spacing.) Assuming a l i n e a r potential gradient at the surface and complete diffuse scattering Schrieffer showed that at constant high transverse f i e l d s the c a r r i e r mobility i s inversely proportional to the f i e l d strength. In addition, i t is. generally assumed that as the f i e l d near the surface i s decreased the mobility approaches the corresponding bulk mobility. Recent experiments on the conductivity of inversion layers i n p- and n-type s i l i c o n indicate that: (a) the ef f e c t i v e mobility of the c a r r i e r s i n the inversion layer i s i n general dominated by a combination of specular and diffuse s c a t t e r i n g , ^ ' - ' 1 0 * ' (b) the e f f e c t i v e mobility i s constant at low surface f i e l d s ( < 1 .5 x 10^ volt/cm) l (this obser-vation was used as an assumption i n deriving 105 equation ( 4 - 1 9 ) ) and is lower than the hulk m o b i l i t y / 9 5 ^ (c) the effective mobility at high fields follows a modified Schrieffer formula / 1 0 4 ^ The experimental effective mobility at high gate voltages was obtained from equation ( 4 - 1 9 ) and is given by; H n = ~ % 2 ~ , ( 4 - 2 1 ) o L c where the constant parameters in V c were determined at low gate voltages as discussed in section 4 . 3 . 2 , Figure 4 - 1 9 shows the effective mobility for TFT #2, as a function of 1 /F , where F s s is the surface field normal to the channel and is approximately C V given by F —2—£ and e . is the permittivity of silicon, s e a ± s i The experimental results can be expressed in the form: n^ = o^ * > ( 4 - 2 2 > s where Uq can be interpreted as a specular scattering term arid v s / F g as a diffuse scattering term, v g being an effective surface carrier velocity. The values of uQ and v g for the sample under consideration are given in Figure 4 - 1 9 . Using this interpretation, * The form of this equation is suggested by the work of Fuchs^1^2^ whp assiimed that the effective surface mobility can be written ^eff = P-h>. + ( 1 " p ) d^ ' where/ is the bulk mobility, nd is the diffuse scattering limited mobility and p is the probability that a carrier striking the surface wil l be specularly scattered. F i g u r e 4-19 Surface M o b i l i t y as a F u n c t i o n of 1/F 107 which was found v a l i d i n the case of MOS t r a n s i s t o r s , the samples examined i n d i c a t e that e l e c t r o n s i n the i n v e r s i o n l a y e r undergo s p e c u l a r as w e l l as d i f f u s e s c a t t e r i n g . The r e l a t i v e percentage of each v a r y i n g from d e v i c e t o device depending on the s u r f a c e c o n d i t i o n s . 4.5 S t a b i l i t y Under i d e a l c o n d i t i o n s the d r a i n c u r r e n t of an i n s u l a t e d - g a t e TFT should be u n i q u e l y determined by the v o l t a g e s a p p l i e d to the gate and drain independently of d u r a t i o n o f a p p l i c a t i o n . While such s t a b i l i t y i s approached i n many of the vacuum encapsulated u n i t s others e x h i b i t an i r r e v e r s i b l e d e t e r -i o r a t i o n of the transconductance and a gradual: s h i f t i n the t h r e s h o l d v o l t a g e p a r t i c u l a r l y when exposed to a humid atmosphere or t o thermal and e l e c t r i c a l s t r e s s e s . Some of the u n i t s a l s o e x h i b i t h y s t e r e s i s loops i n the d r a i n c h a r a c t e r i s t i c s as observed on a c o n v e n t i o n a l curve t r a c e r and i l l u s t r a t e d i n F i g u r e 4-20. The slow d r i f t and other i n s t a b i l i t e s i n the charac-t e r i s t i c s can be a t t r i b u t e d to e l e c t r o n i c t r a p s and i o n i c d e f e c t s ^ 1 0 " ^ w i t h i n the oxide and to mobile i o n i c charge i n the surf a c e or i n the i n t e r i o r of the oxide. I t i s b e l i e v e d , at l e a s t i n the case o f the r m a l l y grown s i l i c o n d ioxide f i l m s , t h a t the i o n i c d e f e c t s are oxygen v a c a n c i e s ^ f ^ 1 0 7 ^  which give r i s e t o a space charge w i t h i n the oxide f i l m s . T h i s space charge can be a l t e r e d by thermal and e l e c t r i c a l s t r e s s e s . The mobile p o r t i o n o f the charge i s assumed to r e s u l t from contamina-t i o n of the oxide by h i g h m o b i l i t y i o n s f o r example s o d i u m ( ^ 8 ) 108 or from metal i o n s ^ " ^ ^ originating from the gate electrode. In evaporated s i l i c o n oxide films an added source of i n s t a b i l i t y i s the hygroscopicity of the oxide. The observed hysteresis loops may also be attributed to i n t e r n a l heating effects or to an insulating layer having a range of d i e l e c t r i c relaxation times. Some of the d r i f t and i n s t a b i l i t i e s can be overcome by reducing the mobile charge density and by n u l l i f y i n g the effects of the space charge within the s i l i c o n oxide films. The f i r s t objective can be achieved by careful processing and improved cleanliness and by proper choice of the metal electrodes to prevent metal ion migration. The second objective can be accomplished by high temperature b i a s ^ ^ ^ * (107) treatments which can lock an interface charge that w i l l not decay at device operating temperature, or by heat treatments of the devices i n a hydrogen( 1 09)*(HO) atmosphere: t h i s process e f f e c t i v e l y reduces density of acceptor surface states by introducing donor st a t e s . ( - ^ 9 ) An alternative solution of the s t a b i l i t y problem can also be found i n the use of new insulating layers. It has recently been claimed that sputtered or chemically deposited s i l i c o n n i t r i d e ( 1 1 1 ) i S more ef f e c t i v e as a passivating layer than thermally grown S±0^ i n MOS tr a n s i s t o r s . 4.6 Summary The f a b r i c a t i o n and operation of the evaporated s i l i c o n t h i n - f i l m transistors were described i n the preceding sections. Devices with transconductances up to 100 (imho and 109 Figure 4-^ 20 Hysteresis loops in the Drain Characteristics of the TFT (IV/div. horizontal, 10 pA/div. vertical, gate voltage IV/'step) gain-bandwidth products up to 1 MHz were obtained. The experi-mental results were compared with the elementary field-effect theory presented in Chapter 1. Some of the discrepancies between theory and experiment at low gate voltages were explained by taking into account trapping effects. A characterization of the traps by a method which involves measurements of the source-drain conductance, its temperature dependence and its transient response was discussed. The typical trap densities obtained by 11 -2 this method are of the order of 4 - 7 x 10 cm . The ioniza-tion energies of the traps ranged from 0.16 to 0.22 eY and the electron emission time constants were between 10 and 20 usee at zero gate voltage. At higher gate voltages, the discrepancies between theory and experiment were attributed to the surface scattering effects on the mobility. The effective mobility was found to be dominated by a combination of specular and diffuse scattering. The i n s t a b i l i t i e s of the TFTs were also discussed. I l l 5. CONCLUSION S i l i c o n t h i n - f i l m t r a n s i s t o r s having u s e f u l g a i n were f a b r i c a t e d by evaporation techniques compatible w i t h those used i n making t h i n f i l m passive components. The s i l i c o n TFTs are promising t h i n - f i l m a c t i v e elements but s u f f e r , at the present stage of t h e i r development, from r e l a t i v e l y low transconductance. In the course of t h i s i n v e s t i g a t i o n , the f a c t o r s a f f e c t -i n g the f a b r i c a t i o n , the design and the performance of these TFTsj i n p a r t i c u l a r the p r o p e r t i e s of the evaporated s i l i c o n f i l m s and of the Si/evaporated SiO i n t e r f a c e , were discussed. A method of evaporating s i l i c o n by e l e c t r o n beam heating was described. The f i l m s obtained were high r e s i s t i v i t y ( > 400 £l-cm) p-type and e x h i b i t e d s i n g l e c r y s t a l d i f f r a c t i o n patterns at substrate temperatures i n the range 1050°C to 1100°c/. The deposited f i l m s were of (111) o r i e n t a t i o n . The low c a r r i e r m o b i l i t y (20 - 30 cm / v o l t - s e c ) i n the f i l m s , the low m i n o r i t y c a r r i e r l i f e t i m e ( 1 - 2 usee) as w e l l as the broadening of the o p t i c a l absorption edge were a t t r i b u t e d to the l a r g e d e n s i t y of c r y s t a l l o g r a p h i c defeots i n the f i l m s . The e f f e c t i v e surface s t a t e d e n s i t y at the Si/evaporated S i O x i n t e r f a c e was found t o be of the same order of magnitude (3 - 4 x 10 cm ) as that at the S i / t h e r m a l l y grown S i 0 2 i n t e r f a c e . The: surfaoe p o t e n t i a l of the 51/evaporated SiO st r u c t u r e was a l s o found to be p a r t i c u l a r l y s u s c e p t i b l e to water vapour and contamination by sodium i n d i c a t i n g that the evaporated SiO l a y e r s do not provide good p a s s i v a t i o n of the s i l i c o n surface i n s p i t e of the low surface s t a t e d e n s i t i e s observed. 112 The s i l i c o n TFTs exhibited transconductances i n the range of 50 to 100 Limho. These low values were attributed to the low eff e c t i v e surface mobility which i s most probably due to the large density of defects i n the s i l i c o n f i l m s . The observed effective mobilities were between 5 - 10 cm /volt-sec as com-p pared to 100 - 200 cm /volt-sec f o r a t y p i c a l MOS t r a n s i s t o r . Surface traps were found to af f e c t the behavior of the devices at low gate voltages and the c a r r i e r mobility was dominated by surface scattering effects at high gate voltages. The characterization of the traps by a method which involves measurements of the source-drain conductance, i t s temperature dependence and i t s transient response was discussed. The i n s t a b i l i t i e s observed i n the c h a r a c t e r i s t i c s when the devices were exposed to the ambient atmosphere are common to insulated-gate f i e l d - e f f e c t transistors and are attributed to the in s u l a t i n g oxide layer. These i n s t a b i l i t i e s were more pronounced i n evaporated SiO due to the hygroscopicity of the oxide. The f i r s t objective of any further work on the s i l i c o n TFTs should be an investigation of the parameters a f f e c t i n g the quality of the s i l i c o n films deposited on sapphire substrates and the determination of the best combination of these parameters to obtain high c a r r i e r mobility i n the f i l m s . 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