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UBC Theses and Dissertations

Self-aligned gallium arsenide MESFETs for microwave integrated circuits Sutherland, David B. 1988

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S E L F - A L I G N E D G A L L I U M A R S E N I D E M E S F E T s F O R M I C R O W A V E I N T E G R A T E D C I R C U I T S b y D A V I D B . S U T H E R L A N D B . A . S c , Q u e e n ' s U n i v e r s i t y , 1 9 8 6 A T H E S I S S U B M I T T E D I N P A R T I A L F U L F I L M E N T O F T H E R E Q U I R E M E N T S F O R T H E D E G R E E O F M A S T E R O F A P P L I E D S C I E N C E i n T H E F A C U L T Y O F G R A D U A T E S T U D I E S D e p a r t m e n t o f E l e c t r i c a l E n g i n e e r i n g We a c c e p t t h i s t h e s i s a s c o n f o r m i n g t o t h e r e q u i r e d s t a n d a r d T H E U N I V E R S I T Y O F B R I T I S H C O L U M B I A J u l y 1 9 8 8 © D a v i d B . S u t h e r l a n d , 1 9 8 8 In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of British Columbia, I agree that the Library shall make it freely available for reference and study. I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the head of my department or by his or her representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission. Department The University of British Columbia 1956 Main Mall Vancouver, Canada V6T 1Y3 DE-6G/81) ABSTRACT A r e f r a c t o r y s e l f - a l i g n e d gate f a b r i c a t i o n p r o c e s s f o r g a l l i u m a r s e n i d e MESFETs has been developed and a p p l i e d t o a sample and h o l d c i r c u i t . The p r o c e s s has been shown t o reduce the p a r a s i t i c end r e s i s t a n c e of MESFETs which can be a l i m i t i n g f a c t o r i n t h e i r microwave performance. A mask s e t was designed t o be compatible w i t h Cascade Inc. probes which allowed on c h i p microwave measurements t o be made. Usable g a i n was measured up t o 18GHz on FETs and 5GHz on b u f f e r a m p l i f i e r s w i t h the microwave probes a t the Communications Research Centre i n Ottawa O n t a r i o . The microwave probes were a l s o used t o t e s t sample and h o l d o p e r a t i o n . The maximum t e s t e d sampling r a t e was l i m i t e d by t h e t e s t equipment t o 2 5 0 MHz. The f a b r i c a t i o n p r o c e s s i n c l u d e d a plasma e t c h f o r p r o d u c i n g an undercut ' T' gate s t r u c t u r e f o r s e l f - a l i g n e d i o n i m p l a n t a t i o n . A method of s p u t t e r i n g a t h e r m a l l y s t a b l e a l l o y o f TiW r e f r a c t o r y metal was developed t o p r o v i d e s u i t a b l e S c h o t t k y c o n t a c t s t o GaAs. I t was found t h a t a r a p i d thermal anneal f o l l o w i n g the s e l f - a l i g n e d implant maintained s u i t a b l e TiW/GaAs Sc h o t t k y c h a r a c t e r i s t i c s and y i e l d e d MESFETs with reduced end r e s i s t a n c e when compared t o those f a b r i c a t e d by the more c o n v e n t i o n a l s e l e c t i v e implant p r o c e s s . A t e c h n i q u e was developed t o reduce the gate r e s i s t a n c e of s e l f - a l i g n e d MESFETs u s i n g an evaporated metal o v e r l a y e r . A l s o , procedures f o r f a b r i c a t i n g a i r b r i d g e s u s i n g a s i n g l e e v a p o r a t i o n and M e t a l - I n s u l a t o r - M e t a l (MIM) c a p a c i t o r s u s i n g s i l i c o n n i t r i d e as the d i e l e c t r i c were developed. The e f f e c t o f gate r e s i s t a n c e on the microwave performance of the s e l f - a l i g n e d MESFETs was i n v e s t i g a t e d by modeling w i t h the EEsof Inc. microwave software package, Touchstone. The modeling showed t h a t s e l f - a l i g n e d MESFETs are capable o f g i v i n g g r e a t e r h i g h frequency g a i n than are s e l e c t i v e implant d e v i c e s w i t h the same d e s i g n geometry. The o p e r a t i o n o f the sample and h o l d c i r c u i t was s i m u l a t e d u s i n g a v e r s i o n o f SPICE t h a t i n c l u d e d the Sussman F o r t GaAs MESFET model. The s i m u l a t i o n s showed t h a t the sample and h o l d c o u l d be used f o r g i g a h e r t z sampling. i i i TABLE OF CONTENTS P a g e ABSTRACT i i LIST OF FIGURES v i i ACKNOWLEDGMENT x 1. INTRODUCTION 1 1.1 GaAs MESFET T e c h n o l o g i e s 1 1.2 Microwave Performance 6 1.3 The Sample and Hold 8 1.4 Sample and Hold Performance 8 1.5 Sample and Hold S t r u c t u r e s 9 2. SAMPLE AND HOLD DESIGN AND LAYOUT 11 2.1 The Sampling Gate 12 2.2 The Hold C a p a c i t o r 14 2.3 B u f f e r A m p l i f i e r s 16 2 . 4 Layout 17 3. FABRICATION 19 3.1 S p e c i a l S t r u c t u r e s 19 3.1.1 F i n e L i n e R e s i s t P r o f i l e s 19 3.1.2 S e l f - a l i g n e d 'T' Gate S t r u c t u r e 21 3.1.3 Post-anneal Gate T h i c k e n i n g 24 3.1.4 A i r b r i d g e s 2 6 3.1.5 MIM C a p a c i t o r s 29 i v Page 3.2 The R e f r a c t o r y Metal/GaAs Contact 3 1 3.2.1 E f f e c t o f a Furnace Anneal 3 3 3.2.2 E f f e c t o f Rapid Thermal Anneal 34 3.2.3 E f f e c t o f Change of TiW Composition 3 5 3.3 The Microwave I n t e g r a t e d C i r c u i t F a b r i c a t i o n Process 3 6 4. MEASUREMENT AND TESTING 4 1 4.1 S t a t i c Measurements 4 1 4.1.1 The TiW/GaAs Schottky J u n c t i o n 4 1 4.1.2 Sheet R e s i s t a n c e o f Implanted Layers 4 3 4.1.3 Ohmic Contact R e s i s t a n c e 4 5 4.1.4 Source S e r i e s R e s i s t a n c e 4 5 4.1 . 5 Sheet R e s i s t a n c e o f TiW F i l m s 4 8 4.1.6 I s o l a t i o n 4 9 4.1.7 MESFET C h a r a c t e r i s t i c Curves 5 0 4.1.8 T h r e s h o l d V o l t a g e 5 1 4.1.9 Low Frequency Transconductance 5 3 4.2 Microwave Measurements 5 5 4.2.1 S-Parameters o f MESFETs 5 5 4.2.2 S-Parameters o f the B u f f e r A m p l i f i e r Stage 5 8 4 . 3 T e s t i n g o f the Sample and Hold C i r c u i t s 6 0 v Page 5. ANALYSIS AND MODELING 6 3 5.1 Modeling o f MESFETs 6 3 5.1.1 S c a t t e r i n g parameters 6 5 5.1.2 Maximum Gain of MESFETs 6 6 5.2 S i m u l a t i o n o f Sample and Hold O p e r a t i o n 6 9 6. CONCLUSION 7 1 REFERENCES 7 2 APPENDIX A - F a b r i c a t i o n Procedure 7 8 APPENDIX B - Input L i s t i n g s f o r Modeling 84 APPENDIX C - Microwave Gain D e f i n i t i o n s 9 1 v i L i s t of F i g u r e s F i g u r e D e s c r i p t i o n Page 1.1. Recessed gate f a b r i c a t i o n p r o c e s s 3 1.2. R e f r a c t o r y s e l f - a l i g n e d gate f a b r i c a t i o n p r o c e s s 4 1.3. S e l e c t i v e implant f a b r i c a t i o n p r o c e s s 5 1.4. A h i g h frequency e q u i v a l e n t c i r c u i t f o r a GaAs MESFET i n the common-source c o n f i g u r a t i o n 6 1 . 5 . B a s i c s t r u c t u r e of sample and h o l d 8 1.6. MESFET sampling s w i t c h 1 0 2.1. Sample and h o l d schematic diagram 1 1 2.2. T r i p l e gate sampling FET c r o s s - s e c t i o n 1 3 2.3. I n t e r d i g i t a t e d c a p a c t i t o r l a y o u t 1 5 2.4. Cross s e c t i o n o f M e t a l I n s u l a t o r Metal (MIM) c a p a c i t o r 1 6 2 . 5 . Sample and h o l d w i t h b u f f e r a m p l i f i e r s 1 7 2.6. Mask s e t o v e r a l l l a y o u t 1 8 3.1. SEM showing r e s i s t p r o f i l e of 1 l i n e s w i t h 2/-/m gaps 2 0 3.2. P r o d u c t i o n of 'T' gate s t r u c t u r e f o r s e l f - a l i g n e d implant 2 2 3.3. SEM showing 'T' gate s t r u c t u r e f o r s e l f - a l i g n e d i o n i m p l a n t a t i o n 2 3 3.4. Procedure f o r d e p o s i t i n g a metal o v e r l a y e r on s e l f - a l i g n e d gates 2 5 3.5. TiW gate w i t h A l o v e r l a y e r 2 6 3.6. A i r b r i d g e f a b r i c a t i o n by a c o n v e n t i o n a l t e c h n i q u e 2 7 3.7. A i r b r i d g e f a b r i c a t i o n by s i n g l e e v a p o r a t i o n and l i f t o f f 2 8 v i i 3.8. SEM o f a i r b r i d g e 2 9 3.9. SEM of MIM c a p a c i t o r 3 0 3.10. Doping p r o f i l e t a i l o b t a i n e d from the mercury c o n t a c t probe on a sample annealed a t 800°C f o r 25 minutes w i t h TiW encapsulant 3 4 3.11. Doping p r o f i l e o b t a i n e d from the mercury c o n t a c t probe on a sample g i v e n an RTA a t 850°C f o r 60s w i t h TiW encapsulant 3 5 3.12. Doping p r o f i l e o b t a i n e d from the mercury c o n t a c t probe on a sample s p u t t e r e d w i t h W f o i l on the TiW t a r g e t then g i v e n an RTA a t 950°C f o r 5s 3 6 3.13. The microwave i n t e g r a t e d c i r c u i t p r o c e s s employing s e l f - a l i g n e d MESFETs 3 7 3.14. A s e l f - a l i g n e d microwave FET 4 0 3.15. A completed sample and h o l d a m p l i f i e r 4 0 4.1. (kT/q) l n ( I ) v s . V f o r a s e l f - a l i g n e d TiW/GaAs Schottky j u n c t i o n 4 2 4.2. I v s . V f o r TiW ( s o l i d ) and Ti/Pd/Au (dashed) Schottky j u n c t i o n s t o GaAs 4 3 4.3. Pad t o pad r e s i s t a n c e v s . pad s e p a r a t i o n f o r ohmic c o n t a c t s t o n + implanted t r a n s m i s s i o n l i n e 4 4 4.4. C u r r e n t d i s t r i b u t i o n s f o r end r e s i s t a n c e measurement 4 6 4.5. R e n d = d V d s / d l g v s . 1/I d f o r s e l e c t i v e implant and s e l f - a l i g n e d MESFETs 4 7 4.6. Measured r e s i s t a n c e o f TiW and of TiW w i t h A l o v e r l a y e r v s . number o f squares 4 9 4.7. I-V c h a r a c t e r i s t i c s f o r a s e l f - a l i g n e d d e p l e t i o n mode MESFET w i t h 0.8 ^m gate l e n g t h and 200^m gate width 5 0 4.8. I-V c h a r a c t e r i s t i c s f o r a s e l f - a l i g n e d enhancement mode MESFET w i t h 0.8 gate l e n g t h and 200^m gate width 5 1 4.9. - / l d v s . V g s f o r a) a d e p l e t i o n MESFET and b) an enhancement MESFET 52 v i i i 4.10. Low frequency transconductance ( g m ) v s . gate b i a s ( V g s ) f o r a 100 /JUI wide s e l f - a l i g n e d MESFET 54 4.11. Mean w i t h st a n d a r d d e v i a t i o n l i m i t s of |S2i| i n dB f o r s e l f - a l i g n e d FETs ( s o l i d curves) and s e l e c t i v e implant FETs (dashed curves) 56 4.12. Smith c h a r t p l o t s of mean w i t h st a n d a r d d e v i a t i o n l i m i t s of a) S u and b) S22 from 2 t o 18GHz f o r s e l f - a l i g n e d FETs ( s o l i d curves) and s e l e c t i v e implant FETs (dashed curves) 57 4.13. |S 2 1| i n dB f o r b u f f e r a m p l i f i e r c i r c u i t implemented w i t h s e l f - a l i g n e d FETs .58 4.14. Smith c h a r t p l o t s o f a) S u and b) S 2 2 from 0.1 t o 5GHz f o r b u f f e r a m p l i f i e r c i r c u i t 59 4.15. Sample and h o l d l a y o u t and p r o b i n g c o n f i g u r a t i o n used f o r t e s t i n g 60 4.16. O s c i l l o s c o p e t r a c e s o f i n p u t and output s i g n a l s from a sample and h o l d w i t h guard gates b i a s e d a t -0.8V 62 5.1. Lumped element model of MESFET 64 5.2. | S 2 i | v s . frequency from model ( l i n e s ) and measured data (points) 65 5.3. S X 1 and S 2 2 from 2 t o 18GHz from model ( s o l i d l i n e s ) and measured data (cross-hatch) 66 5.4. Maximum g a i n o f s e l f - a l i g n e d MESFETs from model ( l i n e s ) and measured data from s e l f - a l i g n e d and s e l e c t i v e implant d e v i c e s ( p o i n t s ) 67 5.5. Simulated i n p u t and output waveforms f o r a sample and h o l d under the t e s t c o n d i t i o n s of s e c t i o n 4.2 68 5.6. Simulated i n p u t and output waveforms f o r a sample and h o l d f o r 2.7GHz sampling o f a 360MHz s i g n a l 70 C . l . Power g a i n b l o c k diagram .....91 i x Acknowledgement The work on the sample and h o l d c i r c u i t was supported by the Defence Research E s t a b l i s h m e n t , Ottawa. I thank my s u p e r v i s o r , Dr. L. Young, f o r h i s guidance and f o r s u g g e s t i n g many of the i d e a s of t h i s work. Mr. H i r o s h i Kato i s t o be thanked f o r h i s c o l l a b o r a t i o n on f a b r i c a t i n g d e v i c e s . I a l s o thank David Hui f o r w r i t i n g software r o u t i n e s t h a t were used t o prepare some of the f i g u r e s i n t h i s t h e s i s . x 1. INTRODUCTION The o b j e c t o f the work d e s c r i b e d i n t h i s t h e s i s was to examine the a p p l i c a t i o n o f a g a l l i u m a r s e n i d e s e l f - a l i g n e d i m p l a n t a t i o n technology t o microwave d e v i c e s and i n p a r t i c u l a r t o a GaAs sample and h o l d c i r c u i t . Devices were f a b r i c a t e d u s i n g a r e f r a c t o r y metal gate p r o c e s s . S t a t i c and microwave c h a r a c t e r i s t i c s were measured and compared t o those obtained from d e v i c e s f a b r i c a t e d by the more c o n v e n t i o n a l s e l e c t i v e implant p r o c e s s . Modeling was used t o determine the u l t i m a t e performance t h a t can be achieved w i t h the technology. 1 . 1 GaAs MESFET Techno l o g i e s The m a j o r i t y o f work on GaAs s e l f - a l i g n e d f a b r i c a t i o n t e c h n o l o g i e s has been r e l a t e d t o the development o f enhancement mode MESFETs f o r d i g i t a l l o g i c c i r c u i t s . The f i r s t GaAs d i g i t a l l o g i c approaches, B u f f e r e d FET L o g i c (BFL) and Schottky Diode FET L o g i c (SDFL), implemented o n l y d e p l e t i o n mode d e v i c e s . These approaches were s u c c e s s f u l i n a c h i e v i n g h i g h speeds u s i n g GaAs [ 1 , 2 ] however, h i g h power d i s s i p a t i o n prevented t h e i r use i n VLSI a p p l i c a t i o n s . The low power GaAs l o g i c approach o f D i r e c t Coupled FET L o g i c (DCFL) u s i n g Enhancement-Depletion FET L o g i c (EDFL) r e q u i r e s the development of a c o n s i s t e n t f a b r i c a t i o n technique f o r enhancement mode d e v i c e s [ 3 ] . Enhancement mode de v i c e s r e q u i r e v e r y t i g h t c o n t r o l o f the t h r e s h o l d v o l t a g e ( t y p i c a l l y 0 . 1 - 0 . 2 V ) i n order t o a l l o w f o r adequate v o l t a g e swing and 1 n o i s e margins [ 4 ] , A l s o i t i s necessary t o make the unmodulated channel of an enhancement mode d e v i c e s h o r t because i t i s d e p l e t e d by s u r f a c e s t a t e p i n n i n g of the Fermi l e v e l and i s t h e r e f o r e h i g h l y r e s i s t i v e [5]. The most important methods used t o reduce the unmodulated channel r e s i s t a n c e are the r e c e s s e d gate and the s e l f - a l i g n e d i m p l a n t a t i o n t e c h n o l o g i e s . In the r e c e s s e d gate p r o c e s s ( f i g u r e 1 . 1 ), a s i n g l e implant i s used t o dope a c t i v e r e g i o n s n type or a wafer w i t h an n type e p i t a x i a l l a y e r i s used. A window i s opened over channel r e g i o n s u s i n g the p h o t o r e s i s t p a t t e r n t h a t i s used t o d e f i n e the gates of the MESFETs. The channel i s etched so t h a t MESFETs w i t h the d e s i r e d t h r e s h o l d v o l t a g e are o b t a i n e d when the Schott k y gate metal i s d e p o s i t e d . A d i f f i c u l t y w i t h the r e c e s s e d gate p r o c e s s i s t h a t t h e ga t e r e c e s s e t c h must be w e l l c h a r a c t e r i z e d i n o r d e r t o g i v e r e p r o d u c i b l e t h r e s h o l d v o l t a g e s o f MESFETs [ 6 ] . Two b a s i c t y p e s o f s e l f - a l i g n e d implant t e c h n o l o g i e s f o r GaAs MESFETs have been demonstrated. One, the " S e l f - A l i g n e d I m p l a n t a t i o n f o r N ^ - l a y e r Technology," or SAINT pr o c e s s [ 7 ] uses a temporary gate s t r u c t u r e t o b l o c k the s e l f - a l i g n e d implant. The gate i s removed f o r the p o s t - i m p l a n t anneal, then a second gate i s d e p o s i t e d t o form the Schottky c o n t a c t . The o t h e r p r o c e s s uses a r e f r a c t o r y metal gate which must w i t h s t a n d the h i g h temperature p o s t - i m p l a n t anneal. The r e f r a c t o r y s e l f - a l i g n e d gate p r o c e s s ( f i g u r e 1.2) i n v o l v e s u n d e r c u t t i n g a 'dummy1 gate [8] so as t o l e a v e a sma l l l a t e r a l gap between t h e s e l f - a l i g n e d s o u r c e / d r a i n n + implant and the gate i t s e l f . T h i s i s done t o decrease gate c a p a c i t a n c e and t o i n c r e a s e the r e v e r s e breakdown v o l t a g e of the Schottky c o n t a c t s w h i l e m i n i m i z i n g the l e n g t h o f the unmodulated channel. The reduced l e n g t h o f the unmodulated channel can be expected t o i n c r e a s e the d e v i c e transconductance over t h a t a c h i e v e d u s i n g a s e l e c t i v e implant f a b r i c a t i o n technology ( f i g u r e 1.3). For a MESFET f a b r i c a t e d u s i n g a s e l e c t i v e implant p r o c e s s , the l a t e r a l gap between the s o u r c e / d r a i n n + implant and the gate i s d e f i n e d by the mask l a y o u t and cannot be reduced beyond the l i m i t s s e t by l i t h o g r a p h y and mask alignment. - pattern for device wells - implant - anneal P.fl. K* region 3.1. GaAs substrate Au6e 4, p.n. - pattern for ohmic contacts - evaporate and l i f t o f f AuGe - alloy n 1 p.fl. 1 IS - pattern for Schottky gate - etch channel - evaporate and l i f t o f f gate source Schottky gate drain —'-isr- '— completed MESFET F i g u r e 1.1. Recessed gate f a b r i c a t i o n p r o c e s s 4 P.R. K" region S.I. BtAs substrate - pattern for device wells - implant channel n~ - anneal - sputter TiW gate metal - pattern and l i f t o f f Al dummy gates fi P.R. U N* region Tl-N* region - undercut dummy gates - pattern and implant source/drain n' TU pte MlBt i I _ J 1 1 1 II  w - pattern and l i f t o f f AuGe ohmic contacts - alloy - completed MESFET F i g u r e 1 . 2 . R e f r a c t o r y s e l f - a l i g n e d gate f a b r i c a t i o n process 5 P.R. H" region S.I. GaAs substrate — pattern and implant device wells n" - anneal N* region tr region P.R. pattern and implant source/drain n AuGe i 1 - pattern for ohmic contacts 1 - evaporate and l i f t o f f AuGe 1 - alloy Schottky gate i i 1 11 1 ( - pattern and l i f t o f f Schottky gate - completed MESFET F i g u r e 1 . 3 . S e l e c t i v e i m p l a n t f a b r i c a t i o n p r o c e s s 6 1 . 2 . Microwave Performance An e q u i v a l e n t c i r c u i t t h a t was used by L i e c h t i [9] f o r high - f r e q u e n c y modeling o f the GaAs MESFET i n the common-source c o n f i g u r a t i o n i s shown i n f i g u r e 1 . 4 . The f i g u r e shows both th e i n t r i n s i c model as w e l l as the e x t r i n s i c model which i n c l u d e s p a r a s i t i c elements. GATE rg O — A W 1 INTRINSIC MODEL -dg R d DRAIN A V V 0 ' d s SOURCE SOURCE F i g u r e 1 . 4 . A h i g h frequency e q u i v a l e n t c i r c u i t f o r a GaAs MESFET i n the common-source c o n f i g u r a t i o n . U s i n g t h e i n t r i n s i c model shown i n f i g u r e 1.4 and assuming the feedback c a p a c i t a n c e C d g i s v e r y s m a l l and can be ne g l e c t e d , the c u t o f f frequency /T where the c u r r e n t through C g s i s equal t o g B V i s g i v e n by 2 n C ge 2 rr T [ 1 . 1 ] Here T = L / V e i s the c a r r i e r t r a n s i t time through the channel, i s the e l e c t r o n s a t u r a t i o n d r i f t v e l o c i t y and L i s the modulated channel l e n g t h . The maximum frequency of o s c i l l a t i o n / r o a x where u n i t y power g a i n i s a c h i e v e d i s g i v e n by: d e [1.2] E q u a t i o n 1.2 can be g e n e r a l i z e d [9] f o r the n o n - u n i l a t e r a l e x t r i n s i c GaAs MESFET model as 1^2 d e R + R + R + R . ( 2nf R C ) g >• e d e T g d g [1.3] I t can be seen t h a t the l e n g t h o f the gate L and the source s e r i e s r e s i s t a n c e R B are c r i t i c a l i n d e t e r m i n i n g the frequency response o f a MESFET. The r e f r a c t o r y s e l f - a l i g n e d gate t e c h n i q u e can y i e l d MESFETs w i t h low source s e r i e s r e s i s t a n c e [10]. A l s o , s e l f - a l i g n e d gates can be made s m a l l e r u s i n g o p t i c a l l i t h o g r a p h y than can those f a b r i c a t e d by s e l e c t i v e implant o r r e c e s s e d gate t e c h n i q u e s s i n c e the a c t u a l gate l e n g t h i s undercut from the mask gate l e n g t h . As a r e s u l t , s e l f - a l i g n e d d e v i c e s have a p p l i c a t i o n i n microwave c i r c u i t s . R e f r a c t o r y gate metal can be more r e s i s t i v e than the gate m e t a l i z a t i o n s used i n o t h e r p r o c e s s e s and as a r e s u l t , the e f f e c t i v e gate s e r i e s r e s i s t a n c e R g may be g r e a t e r . P l a t i n g the r e f r a c t o r y gate metal may be d e s i r a b l e i f the e f f e c t of the gate r e s i s t a n c e on the microwave performance of the d e v i c e i s s i g n i f i c a n t . 8 1 . 3 The Sample and Hold The b a s i c s t r u c t u r e o f a sample and h o l d c i r c u i t c o n s i s t s o f a sampling s w i t c h and a h o l d c a p a c i t o r ( f i g u r e 1 . 5 . ) sampling switch hold node Input hold . capacitor' Output F i g u r e 1 . 5 . B a s i c s t r u c t u r e o f sample and h o l d The most common a p p l i c a t i o n o f sample and h o l d c i r c u i t s i s i n analogue t o d i g i t a l c o n v e r s i o n . A sample and h o l d i s used a t the f r o n t end of an analogue t o d i g i t a l c o n v e r t e r (ADC) t o r e l i e v e some o f the a p e r t u r e time problems a s s o c i a t e d w i t h ADCs. The s h o r t a c q u i s i t i o n time o f the sample and h o l d p r o v i d e s a c o n s t a n t s i g n a l l e v e l p e r i o d f o r A/D c o n v e r s i o n t o take p l a c e . 1 . 4 Sample and Hold Performance The main measures of a sample and h o l d ' s performance are i t s a c q u i s i t i o n time, i n p u t impedance, droop r a t e , and output impedance. The a c q u i s i t i o n time i s the key performance s p e c i f i c a t i o n o f a sample and h o l d . I t i s the time r e q u i r e d t o s t o r e on t h e h o l d c a p a c i t o r the l e v e l of the s i g n a l p r e s e n t at t h e sample and h o l d i n p u t . The a c q u i s i t i o n time l i m i t s the maximum sampling frequency of the sample and h o l d . The importance o f the sample and h o l d i n p u t impedance depends upon the impedance of the i n p u t s i g n a l path. For example, i f t h e i n p u t s i g n a l i s p r e s e n t e d t o the sample and h o l d on a h i g h impedance l i n e and i s r e q u i r e d t o supply the c u r r e n t t o charge the h o l d c a p a c i t o r , then the frequency response o f the sample and h o l d may be v e r y l i m i t e d . The droop r a t e i s the r a t e of decay of the h o l d node p o t e n t i a l . I t can become important i f i t approaches the sampling r a t e . The output impedance i s important i f the sample and h o l d must d r i v e c u r r e n t t o a l o a d . . I f the h o l d c a p a c i t o r i s d i r e c t l y connected t o the output, then the l o a d may a f f e c t the droop r a t e . 1.5 Sample and Hold S t r u c t u r e s The most common types of sampling switches used i n sample and h o l d s are diode b r i d g e s and FETs. A major disadvantage o f the diode b r i d g e arrangement i s the f a c t t h a t the d i o d e b r i d g e must be v e r y w e l l b alanced t o g i v e an a c c u r a t e sampled r e p r e s e n t a t i o n o f the i n p u t s i g n a l a t t h e output. V a r i a t i o n s i n c h a r a c t e r i s t i c s a c r o s s a wafer s u r f a c e c o u l d t h e r e f o r e cause i n t e g r a t e d diode b r i d g e s t o g i v e i n c o n s i s t e n t r e s u l t s . A l s o , complementary s t r o b e p u l s e s are r e q u i r e d t o p r e v e n t p u l s e feedthrough from b e i n g observed on the output. GaAs diode b r i d g e sample and h o l d s have been d e s c r i b e d by P o u l t o n e t a l [11] and by Wong and Fawcett [12]. The MESFET sampling s w i t c h ( f i g u r e 1.6) i s o f t e n implemented i n GaAs f o r h i g h speed sampling. The advantages of a MESFET over the diode b r i d g e arrangement are t h a t i t r e q u i r e s o n l y a s i n g l e sampling p u l s e and t h a t i t i s not as s e n s i t i v e t o f a b r i c a t i o n n o n u n i f o r m i t i e s . One disadvantage of u s i n g a MESFET as t h e sampling gate i s t h a t i t s gate t o source c a p a c i t a n c e ( C g s ) a c t s as a v o l t a g e d i v i d e r w i t h the h o l d node c a p a c i t a n c e . As a r e s u l t , the sampling p u l s e i s f e d through t o t h e h o l d node t o a c e r t a i n e x t e n t . GaAs MESFET sampling switches are d e s c r i b e d by Akers e t . a l . [13] and Swierkowski e t a l [14]. F i g u r e 1.6. MESFET sampling s w i t c h 2. SAMPLE AND HOLD DESIGN AND LAYOUT The sample and h o l d c i r c u i t f o l l o w e d t h a t used by B a r t a and Rode [15]• The c i r c u i t c o n s i s t e d o f a GaAs MESFET sampling gate f o l l o w e d by a h o l d c a p a c i t o r and a b u f f e r a m p l i f i e r stage ( f i g u r e 2.1). The l a y o u t was m o d i f i e d from t h a t o f R u t h e r f o r d [16] i n order t o a l l o w h i g h frequency t e s t i n g o f sample and h o l d performance u s i n g Cascade Inc. probes. The probes a l l o w on c h i p microwave measurements t o be made but r e q u i r e a r e g u l a r c o n t a c t pad arrangement. B u f f e r a m p l i f i e r v b i t o o *T i n Sampling gate Pula« i n Hold Capacitor rt < > R F o u t + 0 F i g u r e 2.1. Sample and h o l d schematic diagram. 11 12 The sample and h o l d c i r c u i t was designed f o r implementation i n both s e l e c t i v e and s e l f - a l i g n e d implant i n t e g r a t e d c i r c u i t t e c h n o l o g i e s u s i n g e i g h t mask l e v e l s . 1) R e g i s t r a t i o n f o r subsequent l e v e l alignment. 2) n~ implant FET channels. 3) TiW s e l f - a l i g n e d gates, MIM bottoms. 4) n + implant FET s o u r c e s / d r a i n s . 5) AuGe/Ni ohmic c o n t a c t s . 6) D i e l e c t r i c MIM i n s u l a t o r . 7) S c h o t t k y d i o d e s , MIM t o p s , a i r b r i d g e f o o t i n g s . 8) Au p l a t i n g a i r b r i d g e body, bonding pad t h i c k e n i n g . 2.1 The Sampling Gate B a r t a and Rode addressed "the problem o f p u l s e feedthrough w i t h a MESFET sampling gate by the use of a t r i p l e gate sampling MESFET as shown i n f i g u r e 2 .2. They found t h a t feedthrough o f the sampling p u l s e t o t h e i n p u t and t o the h o l d node o f the sample and h o l d was s m a l l e r when the p u l s e was a p p l i e d t o the c e n t r e 'sampling* gate r a t h e r than the outer •guard 1 g a t e s . R u t h e r f o r d showed u s i n g SPICE s i m u l a t i o n s t h a t t h e r e d u c t i o n i n p u l s e feedthrough c o u l d be a t t r i b u t e d t o momentary forward c o n d u c t i o n of the guard gates which remove c a r r i e r s d i s p l a c e d by the p u l s e . F o r comparative purposes, s i n g l e and t r i p l e g ates, a l l o f 1+m l e n g t h , were i n c l u d e d i n the sample and h o l d l a y o u t s . 13 Guard gates Sampling gate Ohmic contact nnn Source N Channel S.I. 6a As substrate F i g u r e 2.2. T r i p l e gate sampling FET c r o s s - s e c t i o n . Another e f f e c t examined by R u t h e r f o r d was t h a t o f s i g n a l p r o p a g a t i o n on the gate. TiW gate metal i s q u i t e r e s i s t i v e (=*3n/square ) and b e i n g over the channel i t has approximately IfF/Mm 2 c a p a c i t a n c e p e r u n i t area depending on gate b i a s . The t r a n s m i s s i o n l i n e n a ture o f the gate causes a phase s h i f t of an a p p l i e d s i g n a l a l o n g i t s width. The e f f e c t i s not important f o r s m a l l width gates such as those used i n d i g i t a l i n t e g r a t e d c i r c u i t s , but becomes important f o r analogue and power MESFETs. SPICE s i m u l a t i o n s show t h a t a p u l s e i n p u t would take about 2Ops t o propagate 100/jm along a gate of l e n g t h 0.5/jm. To reduce t h i s phase s h i f t e f f e c t , t he sampling gate d e s i g n e d by R u t h e r f o r d was d r i v e n by a c o n t a c t pad which was connected a t the c e n t e r o f the gate's 60 jjm width. The t - j u n c t i o n s t r u c t u r e o f the sampling gate was not compatible w i t h t h e Cascade Inc. microwave probes because i t r e q u i r e d the source c o n t a c t pad of the sampling gate t o be s p l i t . T h i s r e s t r i c t i o n on c o n t a c t pad l a y o u t made i t necessary t o d r i v e the gate of the sampling MESFET from one end i n the present d e s i g n . 2.2 The Hold C a p a c i t o r The i n p u t time c o n s t a n t of the sample and h o l d l i m i t s the s i g n a l frequency t h a t can be sampled. The i n p u t time c o n s t a n t i s approximately g i v e n by the product o f the sampling MESFET channel r e s i s t a n c e and the c a p a c i t a n c e of the h o l d node. The v a l u e o f the h o l d c a p a c i t a n c e was chosen t o g i v e an input time c o n s t a n t of 25ps f o r both the t r i p l e and s i n g l e sampling gate arrangements. The h o l d node c a p a c i t a n c e i s approximately h a l f due t o p a r a s i t i c and d e p l e t i o n l a y e r c a p a c i t a n c e and h a l f due t o the f i x e d h o l d c a p a c i t a n c e . A 60Mm wide FET t y p i c a l l y has a channel r e s i s t a n c e i n the o r d e r o f 100 Q . The h o l d node c a p a c i t o r f o r such a sampling FET was then s e t t o 0.13pF i n o r d e r t o g i v e a t o t a l node c a p a c i t a n c e o f 0.25pF. I f the v a l u e o f the h o l d c a p a c i t o r were reduced s i g n i f i c a n t l y from t h i s v a l u e , n o n l i n e a r i t i e s i n the d e p l e t i o n l a y e r c a p a c i t a n c e might cause s i g n a l d i s t o r t i o n . In a d d i t i o n , p u l s e feedthrough and the s i g n a l droop r a t e would i n c r e a s e . Two types of h o l d node c a p a c i t o r s were i n c o r p o r a t e d i n t h e sample and h o l d l a y o u t s . The f i r s t c o n s i s t e d of 2 pm wide i n t e r d i g i t a t e d f i n g e r s of Schottky metal w i t h 2^m gaps ( f i g u r e 2.3) . 15 GND F i g u r e 2.3. I n t e r d i g i t a t e d c a p a c t i t o r l a y o u t . The second was a metal i n s u l a t o r metal (MIM) s t r u c t u r e ( f i g u r e 2.4). An MIM c a p a c i t o r r e q u i r e s l e s s s u b s t r a t e area than an i n t e r d i g i t a t e d c a p a c i t o r o f equal v a l u e but i s more d i f f i c u l t t o f a b r i c a t e . P i n h o l e s i n t h e d i e l e c t r i c c o u l d cause s h o r t i n g o f i t s t e r m i n a l s . The TiW m e t a l i z a t i o n c o u l d be used as the MIM bottom p l a t e o r AuGe/Ni c o u l d be employed as i n R u t h e r f o r d ' s d e s i g n . AuGe tends t o become q u i t e rough a f t e r a l l o y i n g t o form ohmic c o n t a c t s so t h e y i e l d o f these c a p a c i t o r s i s q u i t e low as r e p o r t e d by B a r t a and Rode [15]. TiW on the o t h e r hand remains smooth even a f t e r a n n e a l i n g and t h e r e f o r e was used i n t h i s d e s i g n . 16 F i g u r e 2.4. Cross s e c t i o n o f Metal I n s u l a t o r M e t a l (MIM) c a p a c i t o r . 2.3 B u f f e r A m p l i f i e r s A sample and h o l d c i r c u i t can be as simple as a sampling s w i t c h and a h o l d c a p a c i t o r . However, i f the impedance of the s i g n a l source i s h i g h , i t may be ne c e s s a r y t o add a b u f f e r a m p l i f i e r i n f r o n t o f t h e sampling s w i t c h t o p r o v i d e the c u r r e n t needed t o charge the h o l d c a p a c i t o r . S i m i l a r l y , i f the sample and h o l d i s r e q u i r e d t o d r i v e s i g n i f i c a n t c u r r e n t t o the output, a b u f f e r may be needed so t h a t the h o l d c a p a c i t o r s e e s a h i g h impedance a t the output. T h i s i s the case i n A/D c o n v e r s i o n where sample and h o l d ' s are added i n f r o n t o f f l a s h q u a n t i z e r s which have l a r g e i n p u t c a p a c i t a n c e [17]. A sample and h o l d w i t h i n p u t and output b u f f e r s i s shown s c h e m a t i c a l l y i n f i g u r e 2.5. 17 i n p u t b u f f e r s a m p l i n g s w i t c h o u t p u t b u f f e r h i g h impedence i n p u t h o l d node low impedence o u t p u t h o l d c a p a c i t o r F i g u r e 2.5. Sample and h o l d w i t h b u f f e r a m p l i f i e r s . An output b u f f e r a m p l i f i e r was implemented i n the d e s i g n t o g i v e about 3dB g a i n and t o i n s u r e t h a t the h o l d node droop r a t e was u n a f f e c t e d by the l o a d . The a m p l i f i e r was a b u f f e r e d FET l o g i c i n v e r t e r w i t h feedback and has been examined by Hornbuckle, Van T u y l and E s t r e i c h [18-21]. A s i m i l a r a m p l i f i e r c o u l d have been added b e f o r e the sampling gate but was not because t h e sample and h o l d has a h i g h i n p u t impedance as i s . The sample and h o l d appears as a 0.25pF c a p a c i t o r through lOOfi. P r o v i d e d the i n p u t s i g n a l path has s u f f i c i e n t c u r r e n t d r i v e , t h e b u f f e r would o n l y serve t o i n c r e a s e c i r c u i t complexity. 2.4 Layout The pad arrangements f o r sample and h o l d s , an i s o l a t e d b u f f e r a m p l i f i e r and d i s c r e t e MESFETs were designed t o be compatible w i t h the Cascade Inc. microwave probes. 18 F i g u r e 2.6. Mask s e t o v e r a l l l a y o u t Elements 1-8 on the c h i p l a y o u t shown i n f i g u r e 2.6 were f o r implementation i n a s e l f - a l i g n e d gate t e c h n o l o g y whereas 9-11 were s e l e c t i v e l y implanted. 12-14 were d i a g n o s t i c elements i n c l u d i n g Van Der Pauw c r o s s , f a t FET, t r a n s m i s s i o n l i n e , and r i n g - d o t s t r u c t u r e s . A TiW stepped r e s i s t o r was i n c l u d e d so t h a t the r e s i s t i v i t y o f the s e l f - a l i g n e d gate m e t a l i z a t i o n c o u l d be determined. 3. FABRICATION 3.1 Spec ia l Structures Before performing a f u l l f a b r i c a t i o n run, experiments were conducted to develop procedures for making s tructures that were required for the sample and holds . 3 .1 .1 Fine Line Res i s t P r o f i l e s The most common technique for pat tern ing meta l izat ions on GaAs i s l i f t - o f f . The l i f t - o f f process involves opening windows i n a layer of p o s i t i v e phototores i s t by exposure to UV l i g h t followed by development. The metal i s deposited on the wafer by evaporat ion. The wafer i s then soaked i n a photores i s t s t r i p p e r such as acetone. The metal that was deposited on top of the photores i s t i s l i f t e d o f f leaving behind metal only where the windows were opened to the substrate . D i f f i c u l t i e s can a r i s e i n l i f t - o f f i f the s idewal l p r o f i l e of the patterened photores i s t i s rounded or tapered. Evaporated metal w i l l then form a continuous f i l m which may not l i f t o f f or may leave metal 'wings 1 on the edges of the defined p a t t e r n . I t i s therefore most des i rab le to create an undercut or reverse tapered s idewal l r e s i s t p r o f i l e . This can be done us ing techniques that involve two l e v e l s of r e s i s t or d i e l e c t r i c a s s i s t ed l i f t - o f f [22], however a chlorobenzene technique was employed i n t h i s work. 19 20 An overhang s tructure can be created i n a s ing le layer of r e s i s t by soaking the r e s i s t i n a developer i n h i b i t o r such as chlorobenzene p r i o r to development. The surface layer of the r e s i s t i s modified by the soak so that i t develops slower than the underlying r e s i s t so as to leave an overhang. Figure 3.1 i s an SEM of a 1 pm r e s i s t p r o f i l e produced using the chlorobenzene technique. I t shows good v e r t i c a l s idewal ls and undercut. Figure 3 .1 . SEM showing r e s i s t p r o f i l e of l^m l i n e s with 2 / J I P . gaps. 21 3.1.2 S e l f - a l i g n e d 'T* Gate S t r u c t u r e A " I " gate s t r u c t u r e i s not necessary f o r the r e f r a c t o r y s e l f - a l i g n e d gate p r o c e s s . A r e f r a c t o r y gate w i t h v e r t i c a l s i d e w a l l s may serve both as the mask f o r the heavy n + s o u r c e / d r a i n implant and as the Schottky gate i t s e l f [23]. I t i s advantageous however i f a T gate s t r u c t u r e ( f i g u r e 3.2) i s used t o l e a v e a l a t e r a l gap between the n + r e g i o n s and the r e f r a c t o r y g ate. The e f f e c t . o f the gap i s t o decrease gate c a p a c i t a n c e , reduce MESFET s h o r t channel e f f e c t s , and i n c r e a s e t h e r e v e r s e breakdown v o l t a g e [24] so t h a t l a r g e r v a l u e s o f V d s may be switched when compared w i t h MESFETs f a b r i c a t e d w i t h no T gate s t r u c t u r e . The l a t e r a l gap a l s o h e l p s t o reduce gate o r i e n t a t i o n s e n s i t i v i t y [25,26]. The t e c h n i q u e used t o produce the T gate s t r u c t u r e was s i m i l a r t o t h a t used by S a d l e r and Eastman [10] except t h a t a CF 4 plasma e t c h o f the TiW was used t o produce the undercut r a t h e r than a r e a c t i v e i o n e t c h . 22 Sputter TiU -Rl-P.R. P.R. GsRs substrate GsRs substrate Pattern For dummy gates EuBporate RI LlFtoFF Etch TiU in CF, pi asms 4 F i g u r e 3.2. P r o d u c t i o n o f 'T' gate s t r u c t u r e f o r s e l f - a l i g n e d implant. The most c r i t i c a l a s pect of t h i s p r o c e s s was i n d e t e r m i n i n g the d u r a t i o n of the plasma e t c h r e q u i r e d t o g i v e s u i t a b l e undercut. The s i t u a t i o n was c o m p l i c a t e d when the c o m p o s i t i o n and t h i c k n e s s of the r e f r a c t o r y metal was changed. For t h i s reason, the wafer was o p t i c a l l y checked p e r i o d i c a l l y during the etching process to determine an appropriate etch time. An SEM of a ' T ' gate s tructure produced using the described process i s shown i n f igure 3.3. F igure 3.3. SEM showing ' T ' gate s tructure for s e l f - a l i g n e d ion implantat ion. 24 3.1.3. Post-anneal Gate T h i c k e n i n g For the b e s t microwave performance o f a MESFET, i t i s d e s i r a b l e t h a t the r e s i s t i v i t y o f the gate metal be small as d i s c u s s e d i n s e c t i o n 1.2. The s i m p l e s t way t o o b t a i n a h i g h l y c o n d u c t i v e gate would be t o l e a v e the 'dummy' gate o f the 'T' gate s t r u c t u r e i n p l a c e d u r i n g and a f t e r a n n e a l i n g the s e l f - a l i g n e d s o u r c e / d r a i n n + implant. U n f o r t u n a t e l y , severe i n t e r d i f f u s i o n and a l l o y i n g o f metal occured d u r i n g the a n n e a l i n g c y c l e when e i t h e r Cr or Pd/Au dummy gates were used. S a d l e r [27] r e p o r t e d s i m i l a r e f f e c t s when A l , N i , Au, or Pt 'T' gate t o p s were l e f t i n p l a c e d u r i n g a n n e a l i n g . As a r e s u l t , A l dummy gates were used t o serve as the n + implant mask, then they were removed f o r the anneal. G e i s s b e r g e r e t a l . [28] d e p o s i t e d metal on top of s e l f - a l i g n e d gates a f t e r a n n e a l i n g by p l a n a r i z i n g a l a y e r of SiON then p a t t e r n i n g and e v a p o r a t i n g an o v e r l a y e r o f Au. R u t h e r f o r d [16] suggested an e l e c t r o p l a t i n g t e c h n i q u e t h a t r e q u i r e d a l l MESFET gates t o be c o n t a c t e d by a removable metal i n t e r c o n n e c t web and a l l areas where p l a t i n g was not d e s i r e d t o be masked o f f . In t h i s work, an e v a p o r a t i o n method u s i n g two l e v e l s of p h o t o r e s i s t was developed f o r o b t a i n i n g a metal o v e r l a y e r on the s e l f - a l i g n e d g a t e s . The technique i n v o l v e d p l a n a r i z i n g and hardbaking a lower l e v e l o f r e s i s t i n order t o prevent the o v e r l a y e r from c o n t a c t i n g the n + r e g i o n s and t o a l l o w l i n e width and alignment t o l e r a n c e s on the o v e r l a y e r t o be r e l a x e d . The procedure i s o u t l i n e d i n f i g u r e 3.4. 25 P . R . m - T i U CeR> substrate P . R . CeRs kubfcirete S p i n o n p h o t o r e s i s t H a r d b a k e P l a n a r i r e r e s i s t i n 0. e t c h 2 - R i -P . R . \ P . R . P . R . TiU CBRS mbi trBie S p i n o n u p p e r l e v e l o f p h o t o r e s i s t P a t t e r n p h o t o r e s i s t u s i n g g a t e m a s k E v a p o r a t e a n d l i f t o f f A l o v e r l a y e r D i s s o l v e l o w e r l e v e l o f r e s i s t F i g u r e 3 . 4 . Procedure f o r d e p o s i t i n g a metal o v e r l a y e r on s e l f - a l i g n e d g a t e s . An SEM o f a TiW s e l f - a l i g n e d gate w i t h an A l o v e r l a y e r i s shown i n f i g u r e 3 . 5 . The s t r u c t u r e was not symmetric because p r e c i s e alignment o f the A l t o the TiW was not p o s s i b l e . The y i e l d o f gates w i t h the o v e r l a y e r was low due to poor adhesion o f the A l t o the TiW. I t i s p o s s i b l e t h a t the p l a n a r i z a t i o n e t c h was not s u f f i c i e n t t o c l e a r the r e s i s t from the t o p o f t h e TiW gate. 26 F i g u r e 3.5. TiW gate w i t h A l o v e r l a y e r . 3.1.4. A i r b r i d g e s A i r b r i d g e s are an i n t e g r a l p a r t o f most m o n o l i t h i c microwave i n t e g r a t e d c i r c u i t (MMIC) p r o c e s s e s . They are used f o r making conne c t i o n s t o the top e l e c t r o d e o f MIM c a p a c i t o r s , f o r s p i r a l i n d u c t o r s , and as a second l e v e l o f m e t a l i z a t i o n f o r i n t e r c o n n e c t s . A i r b r i d g e s are used because t h e r e i s l e s s p a r a s i t i c c a p a c i t a n c e a s s o c i a t e d w i t h them than t h e r e i s f o r m e t a l i z a t i o n s on a d i e l e c t r i c l a y e r . The most common technique f o r pr o d u c i n g a i r b r i d g e s u t i l i z e s two l e v e l s o f r e s i s t , an e v a p o r a t i o n , an e t c h , and an 27 e l e c t r o p l a t i n g s t e p [29]. T h i s procedure i s o u t l i n e d i n f i g u r e 3.6. EwBporated Tl P.R. F i r s t leuel P.R. P.R. GaRs Substrate A S V -Pet tern photoresist For a i rbr idge Footings EuBporate Ti ( lBBBS) Socond l M l P.R. P.R. Elec t ropla ted flu F i r s t leoet P.R. Befit Substrate Second leuel P R . P.R V -Pattern tecond I sue! photoresist for Birbr ldge bodies Elec t rop la te exposed t i t o n l u t with gold Goflt S u b s t r a t e A y^-Dissolve upper level photoresist In A c e t o n e E t c h t i t f t n i u * In HF Di t to !we lower level photoresist i n Deetone F i g u r e 3.6. A i r b r i d g e f a b r i c a t i o n by a c o n v e n t i o n a l technique. A t e c h n i q u e was developed t o produce a i r b r i d g e s u s i n g two l e v e l s o f r e s i s t and a s i n g l e e v a p o r a t i o n and l i f t o f f ( f i g u r e 3 .7 ) . The procedure i n v o l v e d a hardbake t o prevent the lower l e v e l r e s i s t from b e i n g d i s s o l v e d when the second l e v e l was a p p l i e d . The chlorobenzene treatment was not a p p l i e d t o the lower l e v e l o f r e s i s t so t h a t i t s edge p r o f i l e was rounded t o g i v e good metal s i d e w a l l coverage. Pattern photoresist For Birbri.dcjfc Footings H&rdbeke r e s i s t Pat tern second teuel photoresist For e i rbr idge bodies EuBporBte Ru F i g u r e 3 .7 . A i r b r i d g e f a b r i c a t i o n by s i n g l e e v a p o r a t i o n and l i f t o f f . Gold a i r b r i d g e s c o u l d be made up t o l/urn t h i c k w i t h t h i s t e chnique g i v i n g them a sheet r e s i s t i v i t y of about 0.050/square [30]. T h i c k e r metal i s sometimes used t o improve mechanical s t r e n g t h f o r l o n g span a i r b r i d g e s . The sheet r e s i s t i v i t y i s not normally a concern, p a r t i c u l a r l y f o r s h o r t span i n t e r c o n n e c t s such as those employed i n the sample and h o l d c i r c u i t . An SEM of an a i r b r i d g e f a b r i c a t e d u s i n g the l i f t o f f method i s shown i n f i g u r e 3.8. F i g u r e 3.8. SEM o f a i r b r i d g e . 3.1.5 MIM C a p a c i t o r s M e t a l - i n s u l a t o r - m e t a l (MIM) c a p a c i t o r s are used e x t e n s i v e l y i n MMIC designs f o r RF t u n i n g and b y p a s s i n g . The MIM c o n s i s t s o f a t h i n l a y e r of d i e l e c t r i c sandwiched between two metal p l a t e s . S i n c e the d i e l e c t r i c i s g e n e r a l l y much t h i n n e r than the bottom metal p l a t e , the top metal p l a t e must be connected w i t h an a i r b r i d g e i n o r d e r t o a v o i d s h o r t i n g . An MIM w i t h t h i c k d i e l e c t r i c can be f a b r i c a t e d without the use of an a i r b r i d g e [31], however such an element r e q u i r e s more area. The MIMs f a b r i c a t e d i n t h i s work used a plasma enhanced chemical vapor d e p o s i t i o n of approximately 800& of s i l i c o n n i t r i d e f o r the d i e l e c t r i c l a y e r . The top e l e c t r o d e o f the MIM was evaporated as an a i r b r i d g e f o o t i n g and TiW was used as the lower e l e c t r o d e . F i g u r e 3.9 shows an SEM of an MIM c a p a c i t o r t h a t was f a b r i c a t e d as d e s c r i b e d . F i g u r e 3.9. SEM of MIM c a p a c i t o r 3 1 3.2 The R e f r a c t o r y Metal/GaAs Contact The most c r i t i c a l aspect of the s e l f - a l i g n e d implant p r o c e s s i s t h a t of the h i g h - t e m p e r a t u r e - s t a b l e r e f r a c t o r y metal gate which must e x h i b i t good Schottky c h a r a c t e r i s t i c s a f t e r p o s t - i m p l a n t a n n e a l i n g a t temperatures of 8 0 0°C or g r e a t e r . An e l e m e n t a l r e f r a c t o r y metal such as tungsten i s the most e a s i l y c h a r a c t e r i z e d f o r r e p r o d u c i b l e d e p o s i t i o n by s p u t t e r i n g . Tungsten has the d e s i r a b l e p r o p e r t i e s of low e l e c t r i c a l r e s i s t i v i t y and h i g h temperature chemical s t a b i l i t y on GaAs [32], however i t was found t o c r a c k and p e e l due t o thermal s t r e s s when annealed [33]. An a l l o y of T i Q 3W0 ? w a s r e p o r t e d by Yokoyama e t a l . [ 3 4 ] t o g i v e b e t t e r adhesion t o GaAs than pure tungsten. Mukherjee e t a l . [35] found t h a t i f the a l l o y was too r i c h i n t i t a n i u m , a GaAs/Ti r e a c t i o n degraded the q u a l i t y o f the S c h o t t k y b a r r i e r . C o n s i d e r a b l e work on o t h e r m a t e r i a l s f o r the s e l f - a l i g n e d p r o c e s s such as r e f r a c t o r y metal s i l i c i d e s and n i t r i d e s has been p u b l i s h e d [36-41]. A l s o , pure tungsten has been used f o r s e l f - a l i g n e d gates without adhesion problems when i t was s p u t t e r e d under p a r t i c u l a r c o n d i t i o n s t o reduce s t r e s s [ 4 2 ] . In t h i s work, an a l l o y of TiW was used as the r e f r a c t o r y metal. A procedure i n v o l v i n g the MSI E l e c t r o n i c s Inc. mercury c o n t a c t probe was d e v i s e d t o t e s t the e f f e c t s of v a r i o u s a n n e a l i n g parameters on the TiW/GaAs i n t e r f a c e without r e q u i r i n g a complete f a b r i c a t i o n run t o be conducted. The mercury c o n t a c t probe i s used f o r C-V p r o f i l i n g without r e q u i r i n g e l e c t r o d e s t o be evaporated on samples [ 4 3 ] . I n s t e a d , two mercury e l e c t r o d e s are t e m p o r a r i l y drawn i n t o c o n t a c t w i t h t h e implanted s u r f a c e o f a specimen. The mercury c o n t a c t s t o the s u r f a c e a c t as two S c h o t t k y d i o d e s p l a c e d back t o back [44]. The s e r i e s c a p a c i t a n c e of the two Schottky j u n c t i o n s was measured between the mercury c o n t a c t s w i t h a Hewlett Packard model 4275A LCR meter. S i n c e the area of one c o n t a c t was much g r e a t e r than t h a t o f the other, the measured c a p a c i t a n c e was v e r y c l o s e t o the c a p a c i t a n c e of the s m a l l c o n t a c t j u n c t i o n . A r e v e r s e b i a s was a p p l i e d t o the s m a l l c o n t a c t t o allow c o n v e n t i o n a l C-V curves and doping p r o f i l e s t o be made. The f o l l o w i n g t e s t procedure allowed doping p r o f i l e s of implanted wafers annealed w i t h TiW p r e s e n t on the s u r f a c e t o be o b t a i n e d w i t h a minimal number of p r o c e s s i n g s t e p s . 1) E t c h wafer s u r f a c e 2* 3^m. 2) Implant without p a t t e r n i n g (blanket implant 3 x l 0 1 2 c m ~ 2 ) . 3) L i g h t chemical e t c h . 4) S p u t t e r w i t h TiW. 5) Anneal w i t h TiW as encapsulant u s i n g t e s t parameters. 6) Remove TiW i n CF 4 plasma. 7) O b t a i n doping p r o f i l e w i t h mercury probe. 33 3.2.1 E f f e c t of a Furnace Anneal T e s t s u s i n g the mercury probe were made on TiW e n c a p s u l a t e d q u a r t e r wafers t h a t had been annealed i n the furnace a t 8 00°C f o r 25 minutes. The TiW s u r f a c e on removal from the f u r n a c e appeared t o be o x i d i z e d . A r e s i d u a l f i l m was observed on the GaAs s u b s t r a t e s u r f a c e a f t e r the o x i d i z e d TiW was removed i n a CF 4 plasma. To prevent o x i d a t i o n o f the TiW s u r f a c e d u r i n g a n n e a l i n g , hydrogen gas was added t o the n i t r o g e n flow i n the f u r n a c e . The gases flowed f o r 15 minutes w i t h the s u b s t r a t e s i n a l o a d l o c k b e f o r e the boat was pushed t o the heated p a r t of t h e f u r n a c e . Another w a i t was allowed a f t e r t h e boat was p u l l e d from the heated p a r t of the f u r n a c e . U s i n g t h i s procedure, o x i d a t i o n o f the TiW s u r f a c e d u r i n g a n n e a l i n g was g r e a t l y reduced. A f t e r a CF 4 plasma e t c h of the TiW, a r e s i d u a l s u r f a c e f i l m on the s u b s t r a t e was observed even on samples annealed i n the r e d u c i n g atmosphere. The f i l m was presumed t o be evidence o f a h i g h temperature GaAs/TiW r e a c t i o n r a t h e r than o x i d a t i o n . Doping p r o f i l e s c o u l d be o b t a i n e d from some areas of the samples which were a p p a r e n t l y c l e a r e d of the s u r f a c e f i l m . The p r o f i l e s showed o n l y a t a i l o f a c t i v a t e d dopant as seen i n f i g u r e 3.10. 34 F i g u r e 3.10. Doping p r o f i l e t a i l o b t a i n e d from t h e mercury-c o n t a c t probe on a sample annealed a t 8 00°C f o r 25 minutes with TiW e n c a p s u l a n t . 3.2.2 E f f e c t of Rapid Thermal Anneal S i m i l a r r e s u l t s were observed f o r q u a r t e r wafers s u b j e c t e d t o a r a p i d thermal anneal (RTA) a t 950 °C f o r 5 seconds. By v a r y i n g the RTA time and temperature, i t was found t h a t t h e amount o f a c t i v a t e d dopant observed u s i n g the mercury probe c o u l d be i n c r e a s e d . The b e s t r e s u l t s were o b t a i n e d u s i n g the RTA a t 850°C f o r 60s as shown i n f i g u r e 3.11. The area under Gaussian curves f i t t e d t o doping p r o f i l e s o b t a i n e d at 6 p o s i t i o n s on two wafer q u a r t e r s gave an a c t i v a t e d dose of 1 . 6 x l 0 1 2 ±0.4xl0 1 2cm~ 2 o r 40110%. 35 l x io . 1 .2 .3 D E P T H (MICRONS) F i g u r e 3.11. Doping p r o f i l e o b t a i n e d from the mercury c o n t a c t probe on a sample g i v e n an RTA a t 850 °C f o r 60s wi t h TiW enc a p s u l a n t . 3.2.3 E f f e c t o f Change o f TiW Composition F u r t h e r improvement i n doping a c t i v a t i o n was ob t a i n e d by i n c r e a s i n g t h e t u n g s t e n c o n t e n t o f the s p u t t e r d e p o s i t e d TiW. The t u n g s t e n c o n t e n t o f the s p u t t e r e d f i l m was i n c r e a s e d by a t t a c h i n g a p i e c e o f tun g s t e n f o i l t o the s p u t t e r i n g t a r g e t u s i n g c o n d u c t i v e epoxy. The f o i l which covered approximately 50% o f t h e s u r f a c e area o f the t a r g e t was expected t o p r o p o r t i o n a t e l y reduce the amount o f t i t a n i u m i n the d e p o s i t e d f i l m . The mercury c o n t a c t t e s t procedure was conducted on samples s p u t t e r e d w i t h the TiW t a r g e t and W f o i l i n p l a c e then annealed i n t h e RTA. The r a p i d thermal anneals were conducted on samples without e n c a p s u l a t i o n but w i t h a GaAs wafer i n p r o x i m i t y t o p r o v i d e some a r s e n i c o v e r p r e s s u r e . I t has been found t h a t s i g n i f i c a n t o u t - d i f f u s i o n o f a r s e n i c o c c u r s when a c a p l e s s RTA i s performed w i t h no a r s e n i c o v e r p r e s s u r e [45]. The a c t i v a t e d dose measured from two wafer q u a r t e r s g i v e n an RTA a t 950°C f o r 5 seconds was 2 . 8 x l 0 1 2 ± 0 . 2 x l 0 1 2 c m " 2 o r 70±5%. .2 . 3 tteplh ( B l c r e n ) F i g u r e 3.12. Doping p r o f i l e o b t a i n e d from the mercury c o n t a c t probe on a sample s p u t t e r e d w i t h W f o i l on the TiW t a r g e t then g i v e n an RTA a t 950°C f o r 5s. 3.3 The Microwave I n t e g r a t e d C i r c u i t F a b r i c a t i o n P r o c e s s The GaAs s u b s t a t e s were i n i t i a l l y e tched about 3 to remove any damage caused by the s u p p l i e r ' s p o l i s h i n g p rocess [46]. The alignment mask was then used t o p a t t e r n the wafer q u a r t e r s f o r the r e g i s t r a t i o n e t c h . The subsequent p r o c e s s i n g s t e p s a r e o u t l i n e d i n f i g u r e 3.13. The metal o v e r l a y e r on the s e l f - a l i g n e d gates i s not shown i n f i g u r e 3.13 because the procedure was not conducted u n t i l a f t e r t h e d e v i c e s were measured. D e t a i l s o f the p r o c e s s are g i v e n i n appendix A. 37 5 i I i con n i i r i de 5.1. GaRs substrate a) Substrate c leaned, etched, and about 300A s i l i c o n n i t r i d e depos i t ed . 1 n region 5(1 icon n i t r i d e ^ 5.1. GaFIs substrate b) P h o t o r e s i s t patterned f o r device w e l l s then implanted n " , TiU n region 5.1. EaRs substrate c) Annealed i n furnace w i t h s i l i c o n n i t r i d e cap. Cap removed and about 3 000A of TiW sputtered on sur f ace . 3 [ P . R . O P . R . R l -P . R . n reg i 5.1. Gafls substrate d) Pat terned f o r dummy gates and MIM bottoms. About 5000A A l evaporated on sur f ace . F i g u r e 3.13. The microwave i n t e g r a t e d c i r c u i t p r o c e s s employing s e l f - a l i g n e d MESFETs. RI TiU I n i i ^ wwwMmy///////^ n region 5.1. GaRs sub&trate A l l i f t e d o f f . B n region 5.1. GaRs substrate f ) Undercut etched i n CF„ plasma. B PR-^ n regions ' ^ reg i on g) Pat terned and implanted n + . RuGe b) Removed A l , annealed i n RTA, pat terned and evaporated AuGe ohmic c o n t a c t s . Figure 3.13. continued i ) L i f t e d o f f AuGe, a l l o y e d t o form ohmic contac t s , and depos i ted s i l i c o n n i t r i d e d i e l e c t r i c . P R . n reg ions n r e g i o n j ) R e s i s t de f ined f o r H I M and s i l i c o n n i t r i d e etched. Ti/Pd/Ru _1_ i n reaions n r e g i o ' X) T i / P d / A u Schottky metal evaporated, and l i f t e d o f f . MESFET MIM RuEe Schottky diode 1) Au a i r b r i d g e s evaporated, sample and holds completed. F i g u r e 3.13. c o n t i n u e d 4 0 Scanning electron micrographs of a microwave FET and a sample and hold c i r c u i t fabricated using the described s e l f - a l i g n e d technique are shown i n figures 3.14 and 3.15 respectively. 100/jm Figure 3.14. A s e l f - a l i g n e d microwave FET. 2 00/L/m Figure 3.15. A completed sample and hold amplifier. 4. MEASUREMENT AND TESTING 4.1 S t a t i c Measurements S t a t i c measurements were made on MESFETs and diagnostic structures using a Hewlett Packard model 4145A semiconductor parameter analyzer. The measurements were used to evaluate the benefits of using the s e l f - a l i g n e d process rather than the se l e c t i v e implant process. Also, measured parameters were used i n the modeling of devices (chapter 5). 4.1.1 The TiW/GaAs Schottky Junction Measurements on the TiW/GaAs Schottky junction were made to determine whether suitable c h a r a c t e r i s t i c s existed a f t e r the rapid thermal anneal of the s e l f - a l i g n e d n + implant. I t i s desirable that the Schottky gate of a MESFET have a large b a r r i e r height and low reverse leakage current [47]. Enhancement mode MESFETs which operate with the gate forward biased require the b a r r i e r to be s u f f i c i e n t l y high to allow an adequate voltage swing [48]. The reverse leakage current i s important i n microwave devices f o r low noise applications [49]. The current-voltage r e l a t i o n s h i p of a diode neglecting series resistance i s given by I for V >> q kT [4.1] Plots of the logarithm of forward diode current I versus 41 42 a p p l i e d v o l t a g e V f o r TiW Schottky gates were l i n e a r f o r c u r r e n t s from 30nA t o IOO/LJA. The sl o p e o f the l i n e a r p o r t i o n o f such curves gave an i d e a l i t y f a c t o r o f n = 1.20±0.05 and a r e v e r s e leakage c u r r e n t of I r = 6 ± 2nA a t a r e v e r s e b i a s of -0.5V. The s t a t e d v a l u e s are the mean and es t i m a t e d standard d e v i a t i o n f o r data c o l l e c t e d from 10 MESFETs on two qu a r t e r wafers. k T l n ( I ) -800 -.5000 / 1 I I T — 1/ ' s l o p s «= n • 1 . 20 I -2500/div ( V) 2.000 F i g u r e 4.1. (kT/q) ln(I/amps) v s . V f o r a s e l f - a l i g n e d TiW/GaAs Sc h o t t k y j u n c t i o n . The b a r r i e r h e i g h t s o f Schottky c o n t a c t s were compared by o b s e r v i n g t he 'knee' i n the diode c u r r e n t - v o l t a g e r e l a t i o n s h i p when p l o t t e d on an a p p r o p r i a t e c u r r e n t s c a l e [50]. The knee v o l t a g e o b t a i n e d f o r TiW/GaAs c o n t a c t s was s l i g h t l y h i g h e r than was o b t a i n e d w i t h the Ti/Pd/Au c o n t a c t s which d i d not undergo thermal p r o c e s s i n g ( f i g u r e 4.2). (cnA) 10.00 1.000 / d i v 0000 -.5000 1 1 1 / / / / ll II II If VF .2500/div ( V) 2.000 F i g u r e 4.2. I v s . V f o r TiW ( s o l i d ) and Ti/Pd/Au (dashed) Sc h o t t k y j u n c t i o n s t o GaAs. 4.1.2 Sheet R e s i s t a n c e of Implanted Layers Although thermal a n n e a l i n g must not damage the TiW/GaAs Sch o t t k y i n t e r f a c e , i t must be s u f f i c i e n t t o a c t i v a t e the implanted donors and thus reduce the sheet r e s i s t i v i t y of the source, d r a i n and o t h e r r e g i o n s doped n + . The sheet r e s i s t i v i t y o f n + doped r e g i o n s was measured u s i n g both Van der Pauw c r o s s and t r a n s m i s s i o n l i n e s t r u c t u r e s . The Van der Pauw c r o s s i s a f o u r t e r m i n a l s t r u c t u r e i n which two t e r m i n a l s are used f o r c a r r y i n g c u r r e n t w h i l e the o t h e r two are used as v o l t a g e probes [51]. U s i n g the Van der Pauw technique at 10 l o c a t i o n s on two q u a r t e r wafers f a b r i c a t e d by the s e l f - a l i g n e d p r o c e s s gave sheet r e s i s t a n c e s o f 190±4 0 o/square f o r r e g i o n s doped n + ( 2 . 0 x l 0 1 3 ions/cm 2) and 1700 ± 3 0 0 n/sguare f o r r e g i o n s doped n (3.0x10 ions/cm ). S a d l e r [27] o b t a i n e d sheet r e s i s t a n c e s of 270 fi/square and 1600 fi /square on n + and n~ r e g i o n s r e s p e c t i v e l y . The sheet r e s i s t a n c e of the n + doped l a y e r was a l s o o b t a i n e d from t r a n s m i s s i o n l i n e -measurements a t 10 l o c a t i o n s on two q u a r t e r wafers. The t r a n s m i s s i o n l i n e s t r u c t u r e c o n s i s t e d o f a s e r i e s o f ohmic c o n t a c t pads w i t h mask sp a c i n g s of 2,4,6,8, and lO^m on the n + implanted l a y e r . A p l o t o f pad t o pad r e s i s t a n c e v e r s u s s p a c i n g i s shown i n f i g u r e 4.3. From the s l o p e o f t h e f i t t e d l i n e , t h e n + sheet r e s i s t a n c e was found t o be RB h= 200 ± 60 n/square. K o H p 1 1 1 1 1 1 1 1 1 ' ' 1 r ~ 0 0.02 OJW 0.06 0.08 0.1 0.12 0.14 Number of Souorva F i g u r e 4.3. Pad t o pad r e s i s t a n c e v s . pad s e p a r a t i o n f o r ohmic c o n t a c t s t o n + implanted t r a n s m i s s i o n l i n e . 4 5 4.1.3 Ohmic Contact R e s i s t a n c e The 'y' i n t e r c e p t o f the f i t t e d l i n e i n f i g u r e 4.3 r e p r e s e n t s t h e r e s i s t a n c e of two ohmic c o n t a c t s i n s e r i e s . The p r o d u c t o f c o n t a c t r e s i s t a n c e and pad width gave a normalized c o n t a c t r e s i s t a n c e o f 0.4 ± 0 . 2 C5mm. Contact r e s i s t a n c e s of 0.3 fimm have been r e p o r t e d by Murakami and P r i c e [52]. 4.1.4 Source S e r i e s R e s i s t a n c e One xeason f o r f a b r i c a t i n g MESFETs u s i n g t h e r e f r a c t o r y s e l f - a l i g n e d gate p r o c e s s was t o make t h e source s e r i e s r e s i s t a n c e s m a l l . The source s e r i e s r e s i s t a n c e can be measured by p a s s i n g forward c u r r e n t through the S c h o t t k y gate c o n t a c t of the MESFET w h i l e u s i n g the d r a i n c o n t a c t as a v o l t a g e probe [53]. The 'end' r e s i s t a n c e of the MESFET i s then d e f i n e d as d e R « [4.2] e n d d I 9 where V d s i s t h e d r a i n - s o u r c e v o l t a g e t h a t r e s u l t s from c u r r e n t I g b e i n g passed from gate t o source. S i n c e t h e gate c u r r e n t i s d i s t r i b u t e d a l o n g the l e n g t h of the channel ( f i g u r e 4.4), then th e end r e s i s t a n c e as d e f i n e d i n c l u d e s a c o n t r i b u t i o n from the r e s i s t a n c e o f the c o n d u c t i n g channel R c h. R . = R + a R [4.3] • n d e c h Here a i s a c o n s t a n t t h a t i s determined by the c u r r e n t d i s t r i b u t i o n i n the channel. The end resistance as measured i n t h i s way i s then an overestimate of the source series resistance. Several techniques for determining the source serie s resistance [53-55] require knowledge of the nature of the channel doping p r o f i l e i n order to eliminate the e f f e c t of the channel resistance on the measured end resistance. Lee et a l . [56] have shown that the contribution of the channel resistance can be determined d i r e c t l y by measuring the d i f f e r e n t i a l end resistance f o r various values of drain current I d applied. Sou rce Gat. Dr8 i n R.. Rcn Figure 4.4. Current d i s t r i b u t i o n f o r end resistance measurement. The measured drain-source voltage when both gate and drain currents are applied i s given by Yds = (Id-rlg)Re + Id Rch + l g ( n k T / q I d ) + Rd Id [4.4] where and R d are the source and drain s e r i e s resistances r e s p e c t i v e l y [56]. From equation 4.2 we f i n d 47 R*nd = R e + ^ k T / q i d ) [4.5] The source series resistance may then be found by f i t t i n g a l i n e of slope nkT/q to a p l o t of R e n d vs. l / l d . End resistance measurements were made at 10 locations on two se l f - a l i g n e d and two s e l e c t i v e implant quarter wafers. The value of the source series resistance obtained using t h i s technique was R e = 38± 7Q for s e l e c t i v e and R g = 5 ± l f i for s e l f - a l i g n e d devices. Figure 4.5. Rend = dV d s /dig vs. 1/I d for s e l e c t i v e implant and s e l f - a l i g n e d MESFETs. 48 4.1.5 Sheet R e s i s t a n c e o f TiW F i l m s The speed of s i g n a l p r o p a g a t i o n on the gate o f a MESFET i n c r e a s e s as the r e s i s t i v i t y o f the gate metal i s reduced [57-60]. The sheet r e s i s t a n c e o f the s p u t t e r e d TiW f i l m was measured u s i n g the stepped r e s i s t o r p a t t e r n i n c l u d e d on the c h i p l a y o u t . The s t r u c t u r e c o n s i s t e d o f s i x c o n t a c t s , two f o r a p p l y i n g c u r r e n t t o the TiW r e s i s t o r and f o u r as v o l t a g e probes a l o n g t h e l e n g t h o f the r e s i s t o r . The stepped r e s i s t o r p a t t e r n was a l s o used t o measure sheet r e s i s t a n c e a f t e r the o v e r l a y e r o f A l was evaporated on top o f the TiW. The measured r e s i s t a n c e R = V V I ,. . i s p l o t t e d M e a s u r e d ' a p p l i e d c i n f i g u r e 4.6 a g a i n s t the number of squares between the v o l t a g e probes used. The measured sheet r e s i s t i v i t i e s a re a p p l i c a b l e a t low f r e q u e n c i e s . At h i g h f r e q u e n c i e s , the e f f e c t i v e t h i c k n e s s o f the m e t a l i z a t i o n s becomes s m a l l e r as a r e s u l t of the s k i n e f f e c t . The s k i n depth 6 o f a m a t e r i a l w i t h r e s i s t i v i t y p and p e r m e a b i l i t y LJ i s g i v e n by 1^2 f P 1 6 = ( " / M J [4.6] where / i s the s i g n a l frequency [61]. The s k i n depths of A l and TiW a t 40GHz are 4100A and lOOOOA r e s p e c t i v e l y . P r o f i l o m e t e r scans r e v e a l e d t h a t the TiW f i l m was 3700 ± 2 00& t h i c k and the A l o v e r l a y e r was 400OA ± 200 A t h i c k . As a r e s u l t , the s k i n e f f e c t o n l y becomes important f o r the metal f i l m s a t f r e q u e n c i e s g r e a t e r than 40GHz. The s l o p e s o f the l i n e s i n f i g u r e 4.6 gave sheet r e s i s t a n c e s o f R s h = 0.87 ± 0.06 ^/square f o r the TiW m e t a l i z a t i o n and R B h= 0.11±0.01 fi/square f o r TiW w i t h the A l o v e r l a y e r . S a d l e r [27] r e p o r t e d a sheet r e s i s t a n c e of R = 3.7 fi/square on a 2000A" TiW f i l m . The lower r e s i s t i v i t y of the TiW f i l m i n t h i s work may be a r e s u l t o f the enhanced tu n g s t e n c o n t e n t o f the s p u t t e r d e p o s i t e d f i l m . The bulk r e s i s t i v i t y o f T i i s e i g h t times t h a t o f W [62]. o 0 20 40 Numbar of Squares F i g u r e 4.6. Measured r e s i s t a n c e o f TiW and of TiW w i t h A l o v e r l a y e r v s . number o f squares. 4.1.6 I s o l a t i o n T r a n s m i s s i o n l i n e s t r u c t u r e s 48 0^ m l o n g and separated by 30/jm o f s e m i - i n s u l a t i n g GaAs were used t o measure the i s o l a t i o n p r o v i d e d by the s e m i - i n s u l a t i n g GaAs s u b s t r a t e . A c u r r e n t of 50 200 ± 50nA was measured when a pot e n t i a l of 10V was applied across the transmission l i n e contacts. This i s t y p i c a l of the i s o l a t i o n achieved i n many GaAs f a b r i c a t i o n processes [ 6 3 ] . 4.1.7 MESFET C h a r a c t e r i s t i c Curves Drain current c h a r a c t e r i s t i c s for a t y p i c a l depletion mode MESFET fabricated by the s e l f - a l i g n e d process are shown i n figure 4.7. Id (mA) 50.00 5.000 /div 0000 0000 Vgs (V) 0 . 0 - 0 . 5 - 1 . 0 - 1 . 5 - 2 . 0 3000/div ( V) - 2 . 5 3.000 Figure 4.7. I-V c h a r a c t e r i s t i c s f o r a s e l f - a l i g n e d depletion mode MESFET with 0.8/jm gate length and 2 00^ /m gate width. The channel implant dose used for depletion mode MESFETs was 3.0x10 cm . Enhancement mode MESFETs were fabricated u s i n g a l i g h t e r channel implant dose of 2.0x10 cm'2 . Drain c u r r e n t c h a r a c t e r i s t i c s f o r such a MESFET are shown i n figure 4.8. I d (mA) V g « (V) 0.6 .0000 3.000 V d s .3000/div ( V) F i g u r e 4.8. I-V c h a r a c t e r i s t i c s f o r a s e l f - a l i g n e d enhancement mode MESFET w i t h 0.8^m gate l e n g t h and 200Mm gate width. 4.1.8 T h r e s h o l d V o l t a g e P l o t s o f the square r o o t of the d r a i n c u r r e n t -/T& v e r s u s the a p p l i e d gate-source v o l t a g e V g s were near l i n e a r f o r 0.5 mA < I d < 5mA. The t h r e s h o l d v o l t a g e V h w a s determined by f i t t i n g a l i n e t o such p l o t s and e x t r a p o l a t i n g t o V l ^ = 0. Sample p l o t s are shown i n f i g u r e 4.9 f o r enhancement and d e p l e t i o n mode d e v i c e s . Measurements o f 10 MESFETs on 2 q u a r t e r wafers gave V . = -1.7 ±0.2V f o r the d e p l e t i o n mode d e v i c e s . F i g u r e 4.9. -/T^ v s . Vg s f o r a) a d e p l e t i o n MESFET a n d b) a n e n h a n c e m e n t MESFET. 5 3 4.1.9 Low Frequency Transconductance The transconductance of a MESFET, g B , can be related to the channel resistance (R C h ) and source and drain series resistances (R s and R d ) by d l d C l / ( R » + R d + R c r , ) ) g = — — - = Vds m dV dVga Vds f-dReh ( R » + R d + R c h ) Z [ dVge The small source and drain series resistances associated with s e l f - a l i g n e d MESFETs should therefore r e s u l t i n improved device transconductance when compared with s e l e c t i v e implant MESFETs. The measured transconductance of 10 MESFETs from two se l f - a l i g n e d and two s e l e c t i v e implant quarter wafers gave g m - 140 ± 10 mS/mm and g m = 100 ± 10 mS/mm respectively. A sample curve of g m vs. gate bias f o r a s e l f - a l i g n e d MESFET i s given i n figure 4.10. [4.7] F i g u r e 4.10. Low frequency transconductance (gffi) v s . gate b i a s ( v g s ) f o r a 100pm wide s e l f - a l i g n e d M E S F E T . 55 4.2 Microwave Measurements Microwave measurements were made u s i n g an HP 8 5 1 0 network a n a l y z e r and a Cascade Inc. model 54 automated microwave p r o b i n g apparatus a t the Communications Research Centre i n Ottawa O n t a r i o . The microwave probes are copla n a r waveguides t h a t b r i n g a 50Q c h a r a c t e r i s t i c impedance t o the d e v i c e bonding pads [64]. Because the probes allowed c a l i b r a t i o n o f the measurement system r i g h t a t the probe t i p s , i t was not nece s s a r y t o de-embed d e v i c e measurements from bond w i r e s and f i x t u r e e f f e c t s . The p r o b i n g arrangement allowed on-wafer measurement of d e v i c e s and c i r c u i t s w i thout r e q u i r i n g c h i p s t o be d i c e d , mounted, and bonded t o microwave j i g s . Microwave measurements were made on the s e l f - a l i g n e d d e v i c e s b e f o r e the A l o v e r l a y e r was evaporated on the TiW g a t e s . 4.2.1 S-Parameters o f MESFETs The s c a t t e r i n g parameters o f 80 MESFETs from two q u a r t e r wafers f a b r i c a t e d by the s e l f - a l i g n e d p r o c e s s and two q u a r t e r wafers f a b r i c a t e d by the s e l e c t i v e implant p r o c e s s were measured u s i n g t h e Cascade Inc. p r o b i n g s t a g e . Estimated s t a n d a r d d e v i a t i o n s from the mean magnitude and phase of these parameters were computed f o r both types o f d e v i c e s . F i v e s e l f - a l i g n e d and e i g h t s e l e c t i v e implant MESFETs were excluded from the computations due t o apparent f a b r i c a t i o n f a i l u r e s such as s h o r t e d gates. F i g u r e 4.11 shows the mean magnitude of the measured forward t r a n s m i s s i o n c o e f f i c i e n t S 2 1 w i t h d e v i a t i o n l i m i t s i n dB from 2 t o 18GHz. The s e l f - a l i g n e d d e v i c e s ( s o l i d curves) showed g r e a t e r g a i n i n the 50n system than d i d the s e l e c t i v e implant d e v i c e s (dashed curves) w i t h V g s = OV and V d s = 4V. Smith c h a r t p l o t s o f S x l and S 2 2 are shown i n f i g u r e 4.12 a) and b) r e s p e c t i v e l y . The measured S-parameters f o r the s e l f - a l i g n e d d e v i c e s were more un i f o r m than those of the s e l e c t i v e implant d e v i c e s . T h i s i s l i k e l y a r e s u l t of the s e n s i t i v i t y o f the source s e r i e s r e s i s t a n c e t o misalignment of the gate f o r s e l e c t i v e implant d e v i c e s . e.ooo 3 j > 3.000 -2.000 1 1 1 k > s N \ N \ s \ j X 1 s*. 1 1 2.000 10.00 FHEQ-GHZ 18.00 F i g u r e 4.11. Mean w i t h st a n d a r d d e v i a t i o n l i m i t s o f |S2 | i n dB f o r s e l f - a l i g n e d FETs ( s o l i d curves) and s e l e c t i v e implant FETs (dashed c u r v e s ) . F i g u r e 4.12. Smith c h a r t p l o t s o f mean w i t h st a n d a r d d e v i a t i o n l i m i t s o f a) S and b) S 2 2 from 2 t o 18GHz f o r s e l f - a l i g n e d FETs ( s o l i d curves) and s e l e c t i v e implant FETs (dashed c u r v e s ) . 58 4.2.2 S-Parameters of the B u f f e r A m p l i f i e r Stage The b u f f e r a m p l i f i e r was needed i n the sample and h o l d c i r c u i t t o p r e s e n t a s u f f i c i e n t l y h i g h impedance t o the h o l d node t o pr e v e n t s i g n a l droop, and t o p r e s e n t the b u f f e r e d output s i g n a l t o a 50Q l i n e . An i s o l a t e d b u f f e r a m p l i f i e r implemented w i t h s e l f - a l i g n e d FETs was i n c l u d e d on the c h i p l a y o u t . The measured S-parameters f o r f i v e b u f f e r a m p l i f i e r s were averaged and the r e s u l t s a re shown i n f i g u r e s 4.13 and 4.14. F i g u r e 4.13 shows t h a t the a m p l i f i e r p r o v i d e d g a i n i n a 50O system up t o 2.6GHz. The i n p u t impedance o f t h e a m p l i f i e r i s n e a r l y an open c i r c u i t and the output i s v e r y c l o s e l y matched t o 50O as seen i n f i g u r e 4.14. 6.000 JO 1.000 F i g u r e 4.13. '21 2 . 5 5 0 F R E Q - G H Z 5 . 0 0 0 i n dB f o r b u f f e r a m p l i f i e r c i r c u i t implemented w i t h s e l f - a l i g n e d FETs. 59 F i g u r e 4.14. Smith c h a r t p l o t s o f a) S ^ and b) S 2 2 from 0 . 1 t o 5GHz f o r b u f f e r a m p l i f i e r c i r c u i t . 4.3. T e s t i n g of the Sample and Hold C i r c u i t s U s i n g t h r e e microwave probes, a s i n u s o i d a l s i g n a l was a p p l i e d t o the RF i n p u t of the sample and h o l d , a p u l s e t r a i n was f e d i n t o the sampling gate, and the sampled v e r s i o n of the i n p u t s i g n a l was observed a t the output on a sampling o s c i l l o s c o p e ( f i g . 4.15). F i g u r e 4.15. Sample and h o l d l a y o u t and p r o b i n g c o n f i g u r a t i o n used f o r t e s t i n g . O s c i l l o s c o p e t r a c e s of a 10MHz s i n u s o i d a l s i g n a l a p p l i e d a t the sample and h o l d i n p u t , an 80MHz p u l s e t r a i n f e d i n t o the sampling gate, and the sampled output s i g n a l are shown i n f i g u r e 4.16 a ) . The sample and h o l d output s i g n a l was a sampled r e p r e s e n t a t i o n of the i n p u t s i n u s o i d . The droop of the h e l d s i g n a l l e v e l i n the 12ns sampling p e r i o d was l e s s than 2% o f t h e amplitude o f the s i g n a l . The feedthrough of the sampling p u l s e t o the sample and h o l d output was lOOmV wit h a IV p u l s e a p p l i e d t o the sampling gate. F i g u r e 4.16b) shows the i n p u t and output s i g n a l s when the i n p u t frequency was i n c r e a s e d t o 3 6MHz and the sampling r a t e was i n c r e a s e d t o 250MHz. The maximum t e s t e d sampling r a t e was l i m i t e d by the a v a i l a b l e p u l s e g e n e r a t o r . The minimum r i s e and f a l l time t h a t c o u l d be o b t a i n e d w i t h the T e k t r o n i x 115 p u l s e g e n e r a t o r was 0.8ns. As a r e s u l t , t h e p u l s e t r a i n became n e a r l y s i n u s o i d a l f o r sampling f r e q u e n c i e s g r e a t e r than 250MHz. S i m u l a t i o n s conducted by R u t h e r f o r d [16] showed lower feedthrough o f the sampling p u l s e t o the output o f a sample and h o l d implemented w i t h a t r i p l e gate r a t h e r than a s i n g l e gate sampling MESFET. T h i s e f f e c t was not observed when the two t y p e s o f sample and h o l d were measured. The guard gates of the sample and h o l d were not c o n t a c t e d by a microwave probe i n the arrangement used t o measure the d e v i c e s . I t i s suspected t h a t t h e low frequency ' b i a s ' probe used a c t e d as an RF choke t o any momentary c u r r e n t which would otherwise be induced i n the guard gate c o n t a c t . As a r e s u l t , the e f f e c t of the guard gates on t h e RF output of the sample and h o l d was suppressed. Because o f t h e probe stage c o n f i g u r a t i o n , i t was not p o s s i b l e t o use a 62 f o u r t h microwave probe f o r the guard gate c o n t a c t w h i l e s u p p l y i n g the b i a s e s V d d and V. s t o the c i r c u i t . s t robe i n > i npu t > output > i npu t > output > F i g u r e 4.16. O s c i l l o s c o p e t r a c e s o f i n p u t and output s i g n a l s from a sample and h o l d . The sample and h o l d was implemented w i t h s e l f - a l i g n e d FETs. 5. ANALYSIS AND MODELING Modeling o f the microwave performance o f MESFETs was done u s i n g the EEsof Inc. software package, Touchstone. The modeling was p r i m a r i l y i n t e n ded t o determine the e f f e c t of the gate r e s i s t a n c e on the s e l f - a l i g n e d d e v i c e performance and t o e s t i m a t e the improvement t h a t can be expected f o r gates g i v e n a metal o v e r l a y e r . The MESFET model used by Touchstone i s the same as t h a t shown i n f i g u r e 1.4. A v e r s i o n of SPICE t h a t i n c l u d e d t h e Sussman F o r t GaAs MESFET model [65,66] was used t o s i m u l a t e "the sample and h o l d d e v i c e s . 5.1. Modeling of MESFETs The p o t e n t i a l a l o n g the width o f a s e l f - a l i g n e d gate i s not g e n e r a l l y u n i f o r m because o f the gate's t r a n s m i s s i o n l i n e n a t u r e . A lumped element model was used t o approximate the e f f e c t o f a d i s t r i b u t e d gate r e s i s t a n c e and c a p a c i t a n c e . The lumped element model ( f i g u r e 5.1) c o n s i s t e d o f e i g h t MESFETs, each h a v i n g the p r o p e r t i e s o f a 1/8 s l i c e o f the s e l f - a l i g n e d MESFET. 63 64 output p o r t F i g u r e 5.1. Lumped element model o f MESFET. The transconductance of each o f the MESFET elements was s e t t o 1/8 o f the low frequency v a l u e measured i n s e c t i o n 4.1.9. The source and d r a i n s e r i e s r e s i s t a n c e s , R s and R d , were g i v e n v a l u e s e i g h t times g r e a t e r than the end r e s i s t a n c e measured from the d e v i c e s i n s e c t i o n 4.1.4. The v a l u e of the gate s e r i e s r e s i s t a n c e R g f o r 1/8 of the gate width was determined from t h e measured sheet r e s i s t a n c e o f the TiW f i l m ( s e c t i o n 4.1.5). The gate-source c a p a c i t a n c e C g s was g i v e n a v a l u e c o r r e s p o n d i n g t o the c a p a c i t a n c e per u n i t a r e a t h a t was found from C-V measurements ( s e c t i o n 3.2.3) w i t h zero b i a s a p p l i e d t o the S c h o t t k y c o n t a c t . The o t h e r c a p a c i t o r s i n the model o f t h e MESFET (namely C d g , C d c , and C d s ) were g i v e n v a l u e s 1/10 t h a t o f C g s . R d s and R^ were chosen t o g i v e a good f i t of the S-parameters o b t a i n e d by the model t o those t h a t were measured f o r the s e l f - a l i g n e d MESFETs i n s e c t i o n 4.2.1. The i n p u t l i s t i n g w i t h the v a l u e s o f the components used i n the lumped element model f o r Touchstone i s i n appendix B. 65 5.1.1 S c a t t e r i n g parameters The lumped element model was used t o o b t a i n S-parameters f o r MESFETs w i t h gate s e r i e s r e s i s t a n c e R g c o r r e s p o n d i n g t o TiW gates and f o r MESFETs w i t h TiW gates w i t h an A l (or Au) o v e r l a y e r . S-parameters o b t a i n e d from modeling and from measurements o f s e l f - a l i g n e d MESFETs are shown i n f i g u r e s 5.2 and 5.3. The e f f e c t o f the gate o v e r l a y e r i s seen p r i m a r i l y i n 2.000 10.00 FREQ-GHZ 18.00 F i g u r e 5.2. |S 2 1| v s . frequency from model ( l i n e s ) and measured d a t a ( p o i n t s ) . 66 .2 .5 1 2 - r F i g u r e 5 . 3 . S X 1 a n d S 2 2 f r o m 2 t o 1 8 G H z f r o m m o d e l ( s o l i d l i n e s ) a n d m e a s u r e d d a t a ( c r o s s - h a t c h ) . 5 . 1 . 2 M a x i m u m G a i n o f M E S F E T s T h e m a x i m u m a v a i l a b l e g a i n o f a t w o p o r t d e v i c e i s a c h i e v e d w h e n a s i m u l t a n e o u s c o n j u g a t e m a t c h o f i n p u t a n d o u t p u t p o r t i m p e d a n c e s i s p r o v i d e d . T h e m a x i m u m a v a i l a b l e g a i n i s n o t a l w a y s a t t a i n a b l e b e c a u s e t h e r e q u i r e d t e r m i n a t i o n s may c a u s e t h e d e v i c e t o b e u n s t a b l e . I n t h i s c a s e , t h e i n p u t o r o u t p u t l o o p o f t h e d e v i c e h a s a n i m p e d a n c e w i t h a n e g a t i v e r e a l p a r t w h e n c o n j u g a t e l y m a t c h e d t e r m i n a t i o n s a r e p r o v i d e d . The n e g a t i v e r e s i s t i v e i m p e d a n c e y i e l d s a s o u r c e o r l o a d r e f l e c t i o n c o e f f i c i e n t ( r c o r TL ) w i t h m a g n i t u d e g r e a t e r t h a n u n i t y . A b r i e f summary of power g a i n s and t h e i r r e l a t i o n s h i p to S-parameters i s g i v e n i n Appendix C. F i g u r e 5.4 shows the maximum a v a i l a b l e g a i n o f s e l f - a l i g n e d d e v i c e s as determined from measured S-parameters and from the lumped element model. The maximum s t a b l e g a i n i s p l o t t e d i n p l a c e o f the maximum a v a i l a b l e g a i n where \TC\ > l or \TL\ > 1. Data from the measured s e l e c t i v e implant d e v i c e s i s a l s o i n c l u d e d . The model o f the s e l f - a l i g n e d d e v i c e w i t h a gate o v e r l a y e r gave g r e a t e r h i g h frequency g a i n than was measured from the s e l e c t i v e implant d e v i c e s . 2.000 20.00 FREQ-GHZ 40.00 F i g u r e 5.4. Maximum g a i n o f s e l f - a l i g n e d MESFETs from model ( l i n e s ) and measured data from s e l f - a l i g n e d and s e l e c t i v e implant d e v i c e s ( p o i n t s ) . By modeling the v e l o c i t y o f c a r r i e r s through the channel of a GaAs MESFET, Maloney and Frey [67] gave a t h e o r e t i c a l r e l a t i o n s h i p between the c u t o f f frequency and the gate l e n g t h L . The model gave / T = 25GHz f o r L = 0.8 pm. The parameters used i n the Touchstone model of the s e l f - a l i g n e d MESFET gave / = -J^Q—= 27GHz. A c u t o f f frequency o f / T = 30GHz 9 ° was o b t a i n e d by Chao e t a l . [68] from a MESFET w i t h L = 0.3pm. Morgan and Howes [69] have shown t h a t i f the p a r a s i t i c elements o f a MESFET (R B, Rd, R g, and C d s ) are so s m a l l t h a t they can be n e g l e c t e d , then the maximum frequency of o s c i l l a t i o n / m a x i s g i v e n by [69]: 33 / (GHz) = [5.1] L (pm) From f i g u r e 5.4, fmaM > 4 0GHz f o r the s e l f - a l i g n e d MESFET modeled w i t h an A l o v e r l a y e r on the gate. S i n c e L at 0.8pm, eq u a t i o n 5.1 i n d i c a t e s t h a t the e f f e c t o f p a r a s i t i c s on t h e microwave performance o f the MESFET i s s m a l l . North e t a l . [29] o b t a i n e d / m < x x = 2 0GHz w i t h s e l e c t i v e implant MESFETs w i t h L = 0.5pm. 69 5.2. Simulation of Sample and Hold Operation The values f o r Rg, Rd, Rs, C g s , Ca g, and Cds used for modeling with Touchstone were used i n the SPICE simulations of the sample and hold. A lumped element model was also used. Simulation of the sample and hold under the t e s t conditions of section 4.2 gave an output waveform (figure 5.5) s i m i l a r to that observed i n figure 4.16. 0 10 20 30 40 SO Tlm« ( n a ) Figure 5 .5 . Simulated input and output waveforms for a sample and hold under the t e s t conditions of section 4.2. Simulation at higher sampling frequency (figure 5.6) showed that the a c q u i s i t i o n time of the sample and hold could be as small as T = lOOps i f a gate overlayer was evaporated on a l l the MESFETs i n the c i r c u i t . An a c q u i s i t i o n time of 70 T = 500ps was o b t a i n e d by Wong and Fawcett [3-2] u s i n g a diode b r i d g e scheme. Swierkowski e t a l . [14] achieved T = 2 0Ops u s i n g a GaAs MESFET sample and h o l d . - 0 . 2 0 1 2 3 4 s Tim* ( n » ) F i g u r e 5.6. Simulated i n p u t and output waveforms f o r a sample and h o l d f o r 2.7GHz sampling of a 3 60MHz s i g n a l . Complete i n p u t l i s t i n g s f o r the SPICE s i m u l a t i o n s are i n c l u d e d i n appendix B. 6. CONCLUSIONS A g a l l i u m a r s e n i d e m o n o l i t h i c microwave i n t e g r a t e d c i r c u i t f a b r i c a t i o n p r o c e s s employing MESFETs w i t h s e l f - a l i g n e d g ates was developed. The s e l f - a l i g n e d implant y i e l d e d MESFETs w i t h lower source s e r i e s r e s i s t a n c e and l a r g e r transconductance than MESFETs f a b r i c a t e d by s e l e c t i v e i m p l a n t a t i o n . A l s o , the f a b r i c a t i o n o f enhancement mode d e v i c e s was demonstrated. Measured microwave s c a t t e r i n g parameters o f the s e l f - a l i g n e d MESFETs were more uniform a c r o s s the GaAs wafer s u r f a c e and between wafers than were those measured from s e l e c t i v e implant MESFETs. Modeling showed t h a t the maximum a v a i l a b l e g a i n o f the s e l f - a l i g n e d MESFETs would be s u p e r i o r t o t h a t o f t h e s e l e c t i v e implant MESFETs i f the r e s i s t a n c e of the gate m e t a l i z a t i o n was reduced. A method o f r e d u c i n g the r e s i s t a n c e o f the s e l f - a l i g n e d gates by e v a p o r a t i n g a metal o v e r l a y e r was demonstrated. A GaAs sample and h o l d c i r c u i t was f a b r i c a t e d u s i n g the s e l f - a l i g n e d p r o c e s s . The c i r c u i t was t e s t e d t o a sampling r a t e o f 250MHz. S i m u l a t i o n s were used t o show t h a t the sample and h o l d would be capable of s t a t e - o f - t h e - a r t performance i f a g ate o v e r l a y e r was evaporated on the MESFETs i n the c i r c u i t . 71 REFERENCES 1. R.L. Van T u y l , C. L i e c h t i , R.E. Lee, and E. Gowan, "GaAs MESFET L o g i c w i t h 4GHz C l o c k Rate," IEEE J . S o l i d State C i r c u i t s , SC-12, no. 10, pp. 485-496, (1977). 2. R.C. Eden, B.M. Welch and R. Zucca, "Low Power GaAs d i g i t a l IC's U s i n g Schottky Diode FET L o g i c , " ISSCC Tech. D i g e s t , pp. 68-69, (1978). 3. R.A. K i e h l , P.G. F l a h i v e , S.H. Wemple, and H.M. Cox, " D i r e c t - C o u p l e d GaAs r i n g O s c i l l a t o r s w i t h S e l f - A l i g n e d g a t e s , " IEEE E l e c . Dev. L e t t . , EDL-3, no. 11, pp. 325-326, (1982). 4. K. Suyama, H. Shimizu, S. Yokogawa, Y. Nakayama, A. Shibatomi, "An MSI GaAs I n t e g r a t e d C i r c u i t U s i n g Ti/W S i l i c i d e Gate Technology," Japanese J o u r n a l of A p p l i e d P h y s i c s , v o l . 22, sup. 22-1, pp. 341-344, (1983). 5. T. Andrade, J.R. Anderson, "High Frequency D i v i d e r C i r c u i t U s i n g Ion-Implanted GaAs MESFETs," IEEE E l e c . Dev. L e t t . , EDL-6, no. 2, pp. 83-85, (1985). 6. T. Usagawa and H. Okuhira, "Photo-CVD SiN A s s i t e d S e l f - A l i g n e d M e t a l Contact Technology f o r High-Speed GaAs D e v i c e s , " Japanese J o u r n a l of A p p l i e d P h y s i c s , v o l . 27, no. 4, pp. 653-657, (1988). 7. K. Yamasaki, K A s a i , T. M i z u t a n i , and K. Kurumada, " S e l f - A l i g n e d I m p l a n t a t i o n f o r n + - L a y e r Technology (SAINT) f o r High-Speed GaAs I C s , " E l e c t r o n i c s L e t t . , V o l . 18, No. 2, pp. 119-121, (1982). 8. R.E. Lee, H.M. Levy, and R.P. Bryan, " S e l f - A l i g n e d Gate GaAs IC w i t h 4 GHz C l o c k Frequency," IEEE Trans. E l e c . Dev., ED-32, No. 4, pp. 848-850, (1985). 8. R. Van T u y l and C. L i e c h t i , "High-Speed I n t e g r a t e d L o g i c w i t h GaAs MESFETs," IEEE J . S o l i d S t a t e C i r c u i t s , SC-9, no. 10, pp. 269-276, (1974). 9. C A . L i e c h t i , "Microwave F i e l d - E f f e c t T r a n s i s t o r s , " IEEE Trans. MTT, MTT-23, p. 279, (1976). 10. R.A. S a d l e r and L.F. Eastman, "High-Speed L o g i c a t 300K w i t h S e l f - A l i g n e d Submicrometer-Gate GaAs MESFETs," IEEE E l e c . Dev. L e t t . , EDL-4, No. 7, pp. 215-217, (1983). 11. K. P o u l t o n , J . Corcoran, and T. Hornak, "A 1-GHz 6 - b i t ADC System," IEEE J . S o l i d S t a t e C i r c u i t s , SC-22, No.6, pp. 962-970, (1987). 72 73 12. B. Wong and K. Fawcett, "A P r e c i s i o n Dual Bridge GaAs Sample and Hold," IEEE GaAs IC Symp., pp.87-89, (1987). 13. N.P. Akers and E. V i l a r , "RF sampling g a t e s : a b r i e f review," IEE P r o c , V o l . 133, No. 1, pp. 45-49, (1986). 14. S. Swierkowski, K. Mayeda, G. Cooper, and C. McConaghy, "A Sub-200 p i c o s e c o n d GaAs Sample-And-Hold C i r c u i t f o r a Multi-Gigasample/Second I n t e g r a t e d C i r c u i t , " IEEE IEDM-85, pp. 272-275, (1985). 15. G.S. B a t r a and A.G. Rode, "GaAs Sample and Hold IC Using a 3-Gate MESFET Switch," IEEE GaAs IC Symp., pp. 29-32, (1982) . 16. W. R u t h e r f o r d , " G a l l i u m A r s e n i d e I n t e g r a t e d C i r c u i t Modeling, Layout, and F a b r i c a t i o n , " M.A.Sc. T h e s i s , U n i v e r s i t y o f B r i t i s h Columbia, pp. 51-54, (1987). 17. K. deGraaf and K. Fawcett, "GaAs Technology f o r Analogue t o D i g i t a l C o n v e r s i o n , " IEEE GaAs IC Symp., pp. 205-208, (1986) . 18. R.L. Van T u y l , "A M o n o l i t h i c I n t e g r a t e d 4-GHz A m p l i f i e r , " IEEE ISSC Conf., pp. 72-73, (1978). 19. D. Hornbuckle, "GaAs IC D i r e c t Coupled A m p l i f i e r s , " IEEE Trans. MTT Symp. Dig., pp. 387-389, (1980). 20. R.L. Van T u y l , D. Hornbuckle, and D.B. E s t r e i c h , "Computer Modeling o f M o n o l i t h i c GaAs ICs," IEEE Trans. MTT Symp. Di g . , pp. 393-394, (1980). 21. R.L. Van T u y l and D. Hornbuckle, " M o n o l i t h i c GaAs D i r e c t Coupled A m p l i f i e r s , " IEEE Trans. E l e c . Dev., ED-28, pp. 175-182, (1981). 22. C E . W e i t z e l and D.A. Doane, "A Review o f GaAs MESFET Gate E l e c t r o d e T e c h n o l o g i e s , " J . Electrochem. S o c , V o l . 133, No. 10, pp. 409C-416C, (1986). 23. J.H. M a g e r l e i n , D.J. Webb, A. C a l l e g a r i , J.D. Feder, T. F r y x e l l , H.C. G u t h r i e , P.D. Hon, J.W. M i t c h e l l , A.T.S. Pomerene, S. S c o n t r a s , G.D. S p i e r s , J.H. G r e i n e r , " C h a r a c t e r i z a t i o n o f GaAs S e l f - A l i g n e d R e f r a c t o r y - G a t e MESFET I n t e g r a t e d C i r c u i t s , " J . A p p l . Phys., V o l . 61, No. 8 , pp. 3080-3092, (1987). 24. H. M. Levy and R.E. Lee, " S e l f - A l i g n e d Submicrometer Gate D i g i t a l GaAs I n t e g r a t e d C i r c u i t s , " IEEE E l e c . Dev. L e t t . , EDL-4, No. 4, pp. 102-104, (1983). 25. N. Yokoyama, H. Onodera, T. O h n i s h i , and A. Shibatomi, " O r i e n t a t i o n E f f e c t o f S e l f - a l i g n e d Source/Drain P l a n a r GaAs S c h o t t k y B a r r i e r F i e l d E f f e c t T r a n s i s t o r s , " Appl. Phys. L e t t . , V o l . 42, No. 3, pp. 270-271, (1983). 74 26. H. Peng, "The E f f e c t of S t r e s s on GaAs D e v i c e s , " M.A.Sc. T h e s i s , U n i v e r s i t y of B r i t i s h Columbia, pp. 14-20, (1988). 27. R.A. S a d l e r , " F a b r i c a t i o n and Performance o f Submicron GaAs MESFET D i g i t a l C i r c u i t s by S e l f - A l i g n e d Ion I m p l a n t a t i o n , " Ph.D. T h e s i s , C o r n e l l U n i v e r s i t y , (1984). 28. A.E. G e i s s b e r g e r , I . J . Bahl, E.L. G r i f f i n , and R.A. S a d l e r , "A New R e f r a c t o r y S e l f - A l i g n e d Gate Technology f o r GaAs Microwave Power FETs and MMICs," IEEE Trans. E l e c . Dev., ED-35, No.5, pp. 615-622, (1988). 29. R. North, S. Dindo, and D. Madge, "A M a n u f a c t u r i n g Process f o r G a l l i u m A r s e n i d e M o n o l i t h i c Microwave I n t e g r a t e d C i r c u i t s , " Can. J . Phys., V o l . 65, pp. 885-891, (1987). 30. P. Wolf, "Microwave P r o p e r t i e s o f S c h o t t k y - B a r r i e r F i e l d - E f f e c t T r a n s i s t o r s , " IBM J . Res. & Dev., V o l . 14, pp. 125-141, (1970). 31. A. Gupta, W.C. P e t e r s e n , and D.R. Decker, " Y i e l d C o n s i d e r a t i o n s f o r Ion-Implanted GaAs MMICs," IEEE Trans. E l e c . Dev., ED-30, No. 1, pp. 16-18, (1983). 32. S.D. Mukherjee, D.V. Morgan, M.J. Howes, J.G. Smith, and P. Brook, J . Vac. S c i . Tech., V o l . 76, p. 138, (1979). 33. R.A. S a d l e r , Ph.D., ITT GaAs Technology Center, v e r b a l communication. 34. N. Yokoyama, T. Mimura, M. Fukuta, and H. Ishikawa, "A S e l f - A l i g n e d S ource/Drain P l a n a r Device f o r U l t r a h i g h Speed GaAs MESFET VLSI," ISSCC Tech. D i g . , pp. 218-219, (1981). 35. H.M. Levy and R.E. Lee, "A Submicron S e l f - A l i g n e d GaAs MESFET Technology f o r D i g i t a l I n t e g r a t e d C i r c u i t s , " IEEE Trans. E l e c . Dev., ED-29, p. 1687, (1982). 36. M. S u z u k i , Y. Kuriyama, and M. Hirayama, "A New S e l f - A l i g n e d GaAs FET With a Mo/WSi T-Gate," IEEE E l e c . Dev. L e t t . , EDL-6, No. 10, pp. 542-544, (1985) 37. S.P. Kwok, "Comparison of Low Temperature and High Temperature R e f r a c t o r y M e t a l / S i l i c i d e s S e l f A l i g n e d Gate on GaAs," J . Vac. S c i . Tech. B, Vol.4, No.6, pp. 1383-1391 (1986) . 38. N. U c h i t o m i , M. Nagaoka, K. Shimada, T. M i z o g u c h i , and N. Toyoda, " C h a r a c t e r i z a t i o n of R e a c t i v e l y S p u t t e r e d WN F i l m as a Gate Metal f o r S e l f - A l i g n m e n t GaAs MESFETs," J . Vac. S c i . Tech. B, V o l . 4, No. 6, pp. 1392-1397 (1986). 39. Z. Zhongde, N. W. Cheung, Z. J . Lemnois, M. D. Strathman, J . B. Stimmell, "Tungsten S i l i c i d e S c h o t t k y Contacts on GaAs," J . Vac. S c i . Tech. B, V o l . 4, No. 6, pp. 1398-1403 (1986). 75 40. A.E. G e i s s b e r g e r , R.A. S a d l e r , F.A. Leyenaar, and M.L. Balzan, " I n v e s t i g a t i o n of R e a c t i v e l y S p u t t e r e d Tungsten N i t r i d e as High Temperature S t a b l e S c h o t t k y Contacts to GaAs," J . Vac. S c i . Tech. A, V o l . 4, No. 6, pp. 3091-3094 (1986). 41. A.E. G e i s s b e r g e r , R.A. S a d l e r , M.L. Balzan, and J.W. C r i t e s , "TiW N i t r i d e Thermally S t a b l e S c h o t t k y Contacts to GaAs: C h a r a c t e r i z a t i o n and A p p l i c a t i o n t o S e l f - A l i g n e d Gate F i e l d - E f f e c t T r a n s i s t o r F a b r i c a t i o n , " J . Vac. S c i . Tech. B, V o l . 5, No. 6, pp. 1701-1706, (1987). 42. J.Y. J o s e f o w i c z and D.B. Rensch, "High-Temperature S t a b l e W/GaAs I n t e r f a c e and A p p l i c a t i o n t o MESFETs and D i g i t a l C i r c u i t s , " J . Vac. S c i . Tech. B, V o l . 5, No. 6, pp. 1707-1715 (1986). 43. D.L. R e h r i g and CW. Pearce, " P r o d u c t i o n Mercury Probe C a p a c i t a n c e - V o l t a g e T e s t i n g , " Semiconductor I n t e r n a t i o n a l , V o l . 3, p. 151, (1980). 44. A. Lederman, "Vacuum Operated Mercury Probe f o r CV P l o t t i n g and P r o f i l i n g , " S o l i d S t a t e Tech., No. 9, pp. 123-126, (1981). 45. T. Hara and J . C Gelpey, "Capless Rapid Thermal A n n e a l i n g o f S i l i c o n Ion Implanted G a l l i u m A r s e n i d e , " Japanese J . App. Phys., v o l . 26, No. 2, pp. L94-L96, (1987). 46. J . F . Wager and A . J . McCamant, "GaAs MESFET I n t e r f a c e C o n s i d e r a t i o n s , " IEEE Trans. E l e c . Dev., ED-34, No. 5, pp. 1001-1006, (1987). 47. L . C Zhang, S.K. Cheung, C L . L i a n g , and N.W. Cheung, "Thermal S t a b i l i t y and B a r r i e r Height Enhancement f o r R e f r a c t o r y Metal N i t r i d e Contacts on GaAs," A p p l . Phys. L e t t . , V o l . 50, No. 8, pp.445-447, (1987). 48. R.F. Broom, H.P. Meier, and W. Walter, "Doping Dependence o f the Schot t k y B a r r i e r Height o f T i - P t Contacts t o n-GaAs," J . A p p l . Phys., V o l . 60, No. 5, pp. 1832-1833, (1986). 49. 0. A i n a and K.P. Pande, "Schottky Contact B a r r i e r Height M o d i f i c a t i o n by Ion I m p l a n t a t i o n of A l i n t o GaAs," J . A p p l . Phys., V o l . 56, No. 6, pp. 1717-1721, (1984). 50. C. C a n a l i , L. Umena, F. F a n t i n i m A. S c o r z o n i , and E. Zanoni, "Increase i n B a r r i e r Height o f Al/n-GaAs Con t a c t s Induced by High C u r r e n t , " IEEE E l e c . Dev. L e t t . , EDL-7, No.5, pp. 291-293, (1986). 51. L . J . Van der Pauw, "A Method f o r Measuring S p e c i f i c R e s i s t i v i t y and H a l l E f f e c t of Di s k s of A r b i t r a r y Shape," P h i l . Res. Rep., V o l . 13, No. 1, pp. 1-9, (1958). 76 52. M. Murakami and W.H. P r i c e , "Thermally S t a b l e , Low R e s i s t a n c e NilnW Ohmic Contacts t o n-Type GaAs," Appl. Phys. L e t t . , V o l . 51, No. 9, pp. 664-666, (1987). 53. P.L. Hower and N. G. B e c h t e l , "Current S a t u r a t i o n and S m a l l - S i g n a l C h a r a c t e r i s t i c s o f GaAs FETs," IEEE Trans. E l e c . Dev., V o l . ED-32, No. 5, pp. 213-220, (1973). 54. H. Fuku i , " D e t e r m i a t i o n of the B a s i c Device Parameters of a GaAs MESFET," B e l l S y s t . Tech. J . , V o l . 58, No. 3, pp. 711-797, (1979). 55. S. Chaudhuri and M. Das, "On the Dete r m i n a t i o n o f Source and D r a i n S e r i e s R e s i s t a n c e s o f MESFETs," IEEE E l e c . Dev. L e t t . , EDL-5, pp. 244-246, (1984). 56. K.W. Lee, M. Shur, A. V a l o i s , G. Robinson, X. Zhu, and A. Van der Z i e l , "A New Technique f o r C h a r a c t e r i z a t i o n of the End R e s i s t a n c e i n Modulation-Doped FETs," IEEE Trans. E l e c . Dev., V o l . ED-31, No. 10, pp. 1294-1398, (1984). 57. P.H. Ladbrooke, "Some E f f e c t s o f Wave Pr o p a g a t i o n i n the Gate o f a Microwave MESFET," E l e c t r o n i c s L e t t . , V o l . 14, No. 1, pp. 21-22, (1978). 58. Y. Wang and M. Bahrami, " D i s t r i b u t e d E f f e c t i n GaAs MESFETs," S o l i d S t a t e E l e c t r o n i c s , V o l . 22, pp. 1005-1009, (1979). 59. R.L. Kuvas, " E q u i v a l e n t C i r c u i t Model of FET I n c l u d i n g D i s t r i b u t e d Gate E f f e c t s , " IEEE Trans. E l e c . Dev., ED-27, No. 6, pp. 1193-1195, (1980). 60. W. H e i n r i c h and H.L. H a r t n a g e l , "Wave Prop a g a t i o n on MESFET E l e c t r o d e s and I t s E f f e c t on T r a n s i s t o r Gain," IEEE Trans. MTT, MTT-35, No. 1, pp. 1-8, (1987). 61. J.D.Kraus, " E l e c t r o m a g n e t i c s , " T h i r d E d i t i o n , McGraw-Hill, New York, p. 449, (1984). 62. L . J . G i a c o l e t t o , " E l e c t r o n i c s Designers Handbook," Second E d i t i o n , McGraw-Hill, New York, p. 2-12, (1977). 63. D.A. Nelson, Y. Shen, B. Welch, "The E f f e c t s o f Proton Implant on GaAs I s o l a t i o n P r o p e r t i e s , " J . Electrochem. S o c , V o l . 134, No. 10, pp. 2549-2552, (1987). 64. E. W. S t r i d , "mm-Wave Wafer Probes Span 0 t o 50GHz," IEEE Trans. MTT, MTT-30, No. 4,pp. 177-183, (1987). 65. S.E. Sussman-Fort, S. Narasimhan and K. Mayaram, "A Complete GaAs MESFET Computer Model f o r SPICE," IEEE Trans. MTT, MTT-32, No. 4, p. 471, (1984). 77 6 6 . S.E. Sussman-Fort, J.C. Hantgan and F.L. Huang, "A SPICE Model f o r Enhancement and Depletion Mode GaAs FETs," IEEE Trans. MTT, MTT -34, No. 11, pp. 1115-1119, (1986). 6 7 . T.J. Maloney and J . Frey, "Frequency Limits of GaAs and InP FETs at 3 0 0 K and 7 7 K with Typical Active Layer Doping," IEEE Trans. E l e c t . Dev., ED-23, p. 519, (1976). 6 8 . P.C. Chao, W.H. Ku, P.M. Smith, W.H. Perkins, "0.2 Micron Length T-Shaped Gate Fabrication Using Angle Evaporation," IEEE Elec. Dev. Lett., EDL-4, No. 4, pp. 122-124, (1983). 6 9 . D.V. Morgan and M.J. Howes, "Microwave S o l i d State Devices and Applications," Peter Peregrinus Ltd., New York, p. 1 1 3 , ( 1 9 8 0 ) . 7 0 . G. Gonzalez, "Microwave Transistor Amplifiers, Analysis and Design," Prentice-Hall Inc., Englewood N.J., pp. 9 2 - 9 4 , ( 1 9 8 4 ) . APPENDIX A - F a b r i c a t i o n Procedure The d e t a i l s o f the developed f a b r i c a t i o n p r o c e s s are l i s t e d as f o l l o w s : 1) S c r i b e 3 i n c h wafer. 2) Degrease i n b o i l i n g acetone f o l l o w e d by r i n s e i n b o i l i n g methanol and blow dry. 3) GaAs e t c h i n 8:1:1/H 2S0 4:H 20 2:H 20 f o r 2m45s - removes 3pm o f GaAs from wafer s u r f a c e . 4) R i n s e i n De-Ionized (D.I.) H 20 cascade f o r 4min and blow d r y . 5) Cleave wafer i n t o q u a r t e r s . 6) Oxide e t c h i n 10% NH4OH f o r 15s and blow dry. 7) Plasma d e p o s i t s i l i c o n n i t r i d e . i ) NH 3 plasma p r e c l e a n . Parameters: Gas: NH 3 Temp: 300°C P r e s s u r e : 500mTorr Power: l00W/500cm 2 NH 3 Flow: 42.5sccm/min Time: lmin i i ) S i l i c o n n i t r i d e d e p o s i t i o n . Parameters: Gases: He, S i H 4 , NH 3 Temp: 300°C P r e s s u r e : 1500mTorr Power: 100W/500cm2 He Flow: 500sccm/min Time: 4min S i H 4 Flow: 540sccm/min NH 3 Flow: 42.5sccm/min 8) S p i n on S h i p l e y 1400-30 p h o t o r e s i s t (PR) a t 4700rpm f o r 30s. 9) S o f t bake a t 95°C f o r 25min. 78 79 10) Expose under r e g i s t r a t i o n mask #1 a t 25mW/cm2 f o r 45s. 11) Post exposure bake a t 95°C f o r 20min. 12) Develop i n MF312 deve l o p e r f o r 50s. 13) R i n s e i n D.I. H 20 cascade f o r lmin and blow dry. 14) Remove n i t r i d e from r e g i s t r a t i o n marks i n B u f f e r e d HF f o r 30s. 15) R i n s e i n D.I. H 20 cascade f o r lOmin and blow dry. 16) E t c h r e g i s t r a t i o n marks i n 5:2:240/NH 4OH:H 2O 2:H 2 0 f o r 50s. 17) R i n s e i n D.I. H 20 cascade f o r 4min and blow dry. 18) Remove PR i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol and blow dry. 19) ..24) P a t t e r n f o r implant w i t h n" mask #2 same as steps 8-13. 25) Channel implant 29 . 12 Parameters: S p e c i e s : S i Dose: 2.0 - 3.0x10 Energy: 90 - 125 KeV 26) Remove p h o t o r e s i s t i n 80°C m i c r o s t r i p . 27) R i n s e i n D.I. H 20 cascade f o r 4min. and blow dry. 28) T h i c k e n s i l i c o n n i t r i d e as i n 7) (time=2min). 29) Furnace anneal channel implant a t 850°C f o r 25min. 30) Remove s i l i c o n n i t r i d e . i ) With B u f f e r e d HF f o r 7min and lOmin D.I. cascade r i n s e . i i ) CF 4 plasma. Parameters: Gas: CF 4 Temp: 100°C P r e s s u r e : 300mTorr Power: 100W/500cm2 CF. Flow: 140sccm/min Time: 2min 80 31) L i g h t e t c h i n l:l:240/NH 4OH:H 2O 2:H 2O f o r 3sec. 32) D.I. r i n s e f o r 4min i n cascade bath. 33) Oxide e t c h i n 10% NH4OH f o r 15s and blow dry. A 'T' gate s t r u c t u r e w i t h s u i t a b l e undercut f o r s e l f - a l i g n e d i o n i m p l a n t a t i o n was ob t a i n e d u s i n g s t e p s 34)..43) : 34) S p u t t e r TiW r e f r a c t o r y gate metal. Parameters: B i a s s p u t t e r mode Gas: Argon Power: 2 00W/180cm2 P r e s s u r e : 2 0mTorr Time: 2 0min P a t t e r n i n g o f l^m l i n e s was ach i e v e d u s i n g s t e p s 35)..40) 35) S p i n on S h i p l e y 1400-30 p h o t o r e s i s t a t 4700rpm f o r 35s. 36) S o f t bake a t 70°C f o r 25min and a l l o w t o c o o l . 37) Soak i n chlorobenzene f o r 7min and blow d r y . 38) Expose under TiW dummy gate mask #3 a t 25mW/cm2 f o r 45s. 39) Develop i n MF-312 deve l o p e r f o r 60s. 40) Ri n s e i n DI water cascade f o r lmin. and blow dry. 41) Evaporate 5000A A l . 42) L i f t o f f metal i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry. 43) Undercut e t c h i n CF 4 plasma. Parameters: Gas: CF 4 Temp: 100°C Pr e s s u r e : 300mTorr Power: 100W/500cm2 CF 4Flow: 140sccm/min Time: 15min 44) ..49) P a t t e r n f o r n + implant w i t h mask #4 as ste p s 8-13. 81 50) S o u r c e / d r a i n implant. Parameters: S p e c i e s : 2 9 S i Dose: 1.0 - 2 . 0 x l 0 1 3 Energy: 130 - 150 KeV 51) Remove p h o t o r e s i s t i n 80°C m i c r o s t r i p . 52) R i n s e i n D.I. H 20 cascade f o r 4min. and blow dry. 53) Remove A l dummy gates i n 50% H 3P0 4 a t 55°C f o r 2min. 54) R i n s e i n D.I. H 20 cascade f o r 4min. and blow dry. 55) Anneal s o u r c e / d r a i n i n RTA a t 950 °C f o r 5s (ca p l e s s anneal w i t h GaAs wafer i n p r o x i m i t y ) . A metal o v e r l a y e r on the TiW gates was evaporated as d e s c r i b e d i n s t e p s 56)..67). These s t e p s were a c t u a l l y performed a f t e r c o mpletion o f t h e d e v i c e s but would be b e t t e r done a t t h i s p o i n t i n t h e f a b r i c a t i o n . E v a p o r a t i n g Pd/Au would be p r e f e r r e d t o A l as was used here. 56) S p i n on S h i p l e y 1400-30 p h o t o r e s i s t a t 4700rpm f o r 30s. 57) S o f t bake a t 95°C f o r 25min. 58) Hardbake i ) ramp oven from 140 °C t o 150 °C over 20min. i i ) l e t c o o l t o 120°C over 20min. 59) P l a n a r i z a t i o n e t c h i n 0 2 plasma. Parameters: Gas: 0 2 Temp: 100°C P r e s s u r e : 3 00mTorr Power: 100W/500cm2 0 2 Flow: 2 00sccm/min Time: 60min 60) ..65) P a t t e r n second l e v e l o f r e s i s t f o r l i f t o f f u s i n g TiW dummy gate mask #8 as i n s t e p s 35-40. 66) Evaporate 5000A" A l . 82 67) L i f t o f f metal i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry. 68) ..73) P a t t e r n f o r l i f t o f f w i t h ohmic mask #5 as i n steps 35-40. 74) Evaporate 2 000A AuGe then 300& N i . 75) L i f t o f f metal i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry. 76) A l l o y ohmic c o n t a c t s i n furnace a t 425°C f o r 2min. 77) T e s t FETs. Steps 7 8 ) . . I l l ) were f o r fo r m a t i o n o f the s i l i c o n n i t r i d e d i e l e c t r i c l a y e r and the MIM top p l a t e . 78) Plasma d e p o s i t s i l i c o n n i t r i d e . Parameters: Gases: He, S i H 4 , NH 3 Temp: 3 00°C P r e s s u r e : 1500mTorr Power: 100W/500cm2 He Flow: 500sccm/min Time: 8min S i H 4 Flow: 540sccm/min NH3 Flow: 42.5sccm/min 79) S p i n on Waycoat HRN 200 n e g a t i v e p h o t o r e s i s t . 80) Softbake a t 60°C f o r 20min. 81) Expose a t 25mW/cm2 f o r 10s. 82) Develop i n xylene f o r 90s. 83) Rin s e i n i s o p r o p y l a l c o h o l and blow d r y . 84) E t c h n i t r i d e i n HF t o l e a v e i s l a n d s a t MIM s i t e s . 85) Ri n s e i n D.I. water cascade bath f o r lOmin. 86) Remove p h o t o r e s i s t i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry. 83 Steps 87-95 are not r e q u i r e d f o r MIMs but f o r S c h o t t k y diode c o n t a c t s and s e l e c t i v e implant g a t e s . 87)..92) P a t t e r n f o r l i f t o f f u s i n g Schottky p l a t e t l as i n s t e p s 35-40. 93) Oxide e t c h i n 10% NH 40H. 94) Evaporate 3000A o f Ti/Pd/Au Schottky metal. 95) L i f t o f f metal i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry. A i r b r i d g e s were f a b r i c a t e d i n s t e p s 96)..111). 96) S p i n on S h i p l e y 1400-30 p h o t o r e s i s t a t 4700rpm f o r 30s. 97) S o f t bake a t 95°C f o r 25min. 98) Expose under Schottky mask #7 a t 25mW/cm2 f o r 45s. 99) Develop i n MF312 deve l o p e r f o r 50s. 100) R i n s e i n DI water cascade f o r lmin. and blow dry. 101) Hardbake i ) ramp oven from 140 °C t o 150 °C over 20min. i i ) l e t c o o l t o 12 0°C over 2 0min. 102) ..107) P a t t e r n second l e v e l o f r e s i s t f o r l i f t o f f u s i n g Au p l a t e mask #8 as i n s t e p s 35-4 0. 108) Evaporate Au a i r b r i d g e s . 109) L i f t o f f metal i n b o i l i n g acetone f o l l o w e d by b o i l i n g methanol r i n s e and blow dry . 110) Remove lower l e v e l r e s i s t i n hot m i c r o s t r i p . 111) R i n s e i n D.I. water cascade f o r 4 min. and blow dry. 112) T e s t sample and h o l d a m p l i f i e r s . APPENDIX B - Input L i s t i n g s f o r Modeling B . l Touchstone Input ! Lumped element model of s e l f - a l i g n e d MESFET DIM FREQ GHZ RES OH IND NH CAP PF LNG MIL TIME PS COND /OH ANG DEG VAR G = » 0.0025 A/V) T = • 6 ( T ps) C l = 0.035 pF) G l « 1E-8 A/V) RI •= 20 Ohms) C2 = 0.004 < c d g pF) C3 - 0.004 pF) C4 - 0.004 ( c d 6 pF) R4 - 4000 Ohms) RS = 24 ( R . Ohms) RG = 5 (or RG = 0.63 f o r gate w i t h A l or Au o v e r l a y e r ) 84 RD = 24 (Ohms) L=0 (nH) CKT SRL 4 2 R ARD L=0 SRL 3 1 R ARG L=0 FET2 3 4 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 6 2 R ARD L=0 SRL 5 3 R ARG L=0 FET2 5 6 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 8 2 R ARD L=0 SRL 7 5 R ARG L=0 FET2 7 8 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 10 2 R ARD L=0 SRL 9 7 R ARG L=0 FET2 9 10 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 12 2 R ARD L=0 SRL 11 9 R ARG L=0 FET2 11 12 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 14 2 R ARD L=0 SRL 13 11 R ARG L=0 FET2 13 14 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 16 2 R ARD L=0 SRL 15 13 R ARG L=0 FET2 15 16 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS SRL 18 2 R ARD L=0 SRL 17 15 R ARG L=0 FET2 17 18 0 G AG T A T F A F CGS AC1 GGS AG1 RI AR1 CDG AC2 CDC AC3 + CDS AC4 RDS AR4 RS ARS DEF2P 1 2 TRA OUT TRA DB[S21] GR1 TRA DB[S12] GR2 TRA DB[GMAX] GR3 J TRA SB1 TRA S l l TRA S22 ! TRA SB2 FREQ SWEEP 2 40 2 GRID RANGE 2 40 2 GR1 -2 8 1 GR2 -40 0 4 GR3 0 20 2 87 B.2 S p i c e Input Sample and h o l d - t e s t c o n d i t i o n s * C y c l e C o n t r o l s .OPTIONS ITL4=1000 ITL5=0 LIMPTS=2000 NOPAGE .WIDTH OUT=80 * • A c t i v e Elements * •Sampling Switch BSWI 10 20 3 RSAG12 60 * * F i x e d Hold Node Capacitance CHOLD 3 0 13OFF * • A m p l i f i e r BIN 4 3 0 RSAG12 67 BFB 4 5 0 RSAG12 23 BLPU 2 4 4 RSAG12 45 BPU 2 4 6 RSAG12 90 Dl 6 7 TD4 66 D2 7 8 TD4 66 D3 8 5 TD4 66 BPD 5 1 1 RSAG12 90 •Standard A c t i v e Element Models •model i s f o r 1 um s l i c e of MESFET or DIODE * .MODEL RSAG12 GASFET(VT0=-1.7, VBI=1.23, RG=1, ALPHA=2.3, + BETA=9E-5, LAMBDA=0.055, CGS0=1.0FF, CGD=0.1FF, CDS=0.05 + IS=2.0E-15, RD=600, RS=600, TAU=3.0PS) * .MODEL TD4 D(IS=1.24E-14, RS=1300, N=1.2, TT=2PS, CJ0=8.0E + VJ=0.72, EG=1.42, BV=8, IBV=lE-3) * •Independent Sources VDD 2 0 DC 5.25 VSS 1 0 DC -2.25 VIN 10 0 SIN(-0.65 0.32 36MEGHZ) VCTRL 20 0 PULSE(-3.0 -1.9 700PS 700PS 700PS 700PS 3700PS) • T r a n s i e n t A n a l y s i s Parameters •.TRAN TSTEP TSTOP <TSTART TMAX U I O .TRAN 100PS 50NS * •Output Parameters .PRINT DC V(10) V(3) V(5) .PRINT TRAN V(10) V(20) V(3) V(5) .END 89 Sample and h o l d - u l t i m a t e performance * C y c l e C o n t r o l s .OPTIONS ITL4=1000 ITL5=0 LIMPTS=2000 NOPAGE .WIDTH OUT=80 * • A c t i v e Elements •Sampling Switch BSWI 10 20 3 RSAG12 60 * • F i x e d Hold Node Capacitance CHOLD 3 0 13OFF * • A m p l i f i e r BIN 4 3 0 RSAG12 67 BFB 4 5 0 RSAG12 23 BLPU 2 4 4 RSAG12 45 BPU 2 4 6 RSAG12 90 DI 6 7 TD4 66 D2 7 8 TD4 66 D3 8 5 TD4 66 BPD 5 1 1 RSAG12 90 * •Standard A c t i v e Element Models •model i s f o r 1 um s l i c e o f MESFET or DIODE * 90 .MODEL RSAG12 GASFET(VTO=-l.7, VBI=1.23, RG=0.1, ALPHA=2.3, + BETA=9E-5, LAMBDA=0.055, CGS0=1.0FF, CGD=0.1FF, CDS=0.05FF, + IS=2.0E-15, RD=600, RS=600, TAU=3.0PS) * .MODEL TD4 D(IS=1.24E-14, RS=1300, N=1.2, TT=2PS, CJO=8.0E-15, + VJ=0.72, EG=1.42, BV=8, IBV=lE-3) * •Independent Sources VDD 2 0 DC 5.25 VSS 1 0 DC -2.25 VIN 10 0 SIN(-0.65 0.32 360MEGHZ) VCTRL 20 0 PULSE(-3.0 -2.9 70PS 20PS 20PS 20PS 370PS) * • T r a n s i e n t A n a l y s i s Parameters .TRAN 10PS 5NS * •Output Parameters .PRINT DC V(10) V(3) V(5) .PRINT TRAN V(10) V(20) V(3) V(5) .END APPENDIX C - Microwave Gain D e f i n i t i o n s Mtsm Input matching networ*< out Output matching network 50 CI F i g u r e C . l . Power g a i n b l o c k diagram. The g a i n s (or power r a t i o s ) a r e r e l a t e d t o the s c a t t e r i n g parameters of the MESFET by [70]: ou t Transducer power gain in 50-ohm system GT = \S2I\2 [ C . l ] Transducer power gain for arbitrary T c and TL 0 - l r c i J ) | s 2 1 | l 0 - i r t | l ) l(i - s „ r c ) ( i -s12TL)-sns2lrcrL\2 [C.2] Power gain with input conjugate matched G = |s 2 1 | J(i-|r t | J) |s21|J | i-s 22rj(i-|5;, | :) i - | 5 n | J (for 1^  = 0) [C.3] Available power gain with output conjugate matched l^.l2(>-|rcj') = |52,[2 | » - S „ r c | J ( l - | 5 „ | l ) 1- |S 2 2 | 2 (forr c = 0) [C.4] 9 1 92 Unilateral transducer | 5 2 , t : ( < - i r c l2 ) ( i - | r j 2 ) power gain ™ 11 — S n r c | : ! 1 — S ^ r j 2 L " J Maximum unilateral _ _ | S ; i | 2 O transducer power gain TUm»» (l — | S M | 3 ) ( l — |S 2 J | 2 ) [C-6] Maximum available power gain 5 {k-jiS-\) [C . 7 ] Maximum stable _ |S 2 i l .. _ power gain |s | 2 | ' -! where k i s the s t a b i l i t y f a c t o r as g i v e n by: 1 - 1 S , , | 2 - | S : : | 2 + 1 A | \ , 2 |S 1 2S 2 1| > ! f o r s t a b i l i t y [C.9] here | A | = | S n S 2 2 - S , 2 S 2 1 | [ C I O ] and rc and r t are the source and l o a d r e f l e c t i o n c o e f f i c i e n t s and can be r e l a t e d t o impedances by: r = Z c ~ z ° c z + z C o [ C . l l ] r - Z l ~ z° ^-zTTT t c . i 2 ] 

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