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OVNI (Object Virtual Network Integrator) : a new fast algorithm for the simulation of very large electric… Linares-Rojas, Luis R. 2001

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OVNI: (Object Virtual Network Integrator) A New Fast Algorithm for the Simulation of Very Large Electric Networks in Real Time by LUIS R A F A E L LINARES-ROJAS Elec. Eng., Universidad Central de Venezuela, Caracas, Venezuela, 1981 M.A.Sc.,The University of British Columbia, Vancouver, Canada. 1993 A THESIS S U B M I T T E D IN PARTIAL F U L F I L L M E N T OF T H E R E Q U I R E M E N T S FOR T H E D E G R E E OF D O C T O R OF P H I L O S O P H Y i n T H E F A C U L T Y OF G R A D U A T E STUDIES (Department of Electrical & Computer Engineering) We accept this thesis as conforming to the required standard T H E U N I V E R S I T Y OF BRITISH C O L U M B I A August 2000 © Luis Rafael Linares-Rojas, 2000 In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of British Columbia, I agree that the Library shall make it freely available for reference and study. I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the head of my department or by his or her representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission. Department of EL . € i C T 2 (CAL AMP Cor\?CTT&&. €.N6lK€.€:^.lO<^ The University of British Columbia Vancouver, Canada Date AOq. 3 / y "2.GOO DE-6 (2/88) ABSTRACT A portable fast algorithm for solving power electric and electronic networks, and its implementation in the real-time simulator OVNI, are introduced. The implementation of OVNI, object virtual network integrator, on an off-the-shelf hardware platform, a 400 MHz Pentium-II workstation is presented. Simpli-fied fast-models, based on those used by the EMTP 1 , are included for the net-work elements: lumped resistors, capacitors, inductors —both linear and non-linear— and a constant parameters transmission lines model. Real-time mod-els for HVDC rectifying and inverting bridges, and for the corresponding PI-controllers, using node hiding, were created specially for OVNI and reported in this thesis. Core saturation and zero sequence flux in three phase core transform-ers are modelled. Fast non-linear models are included for current and potential transformers. A fast modelling scheme to account for switching operations is presented, and its successful implementation on an industrial product, reported. Multilayer segmentation of the network, topological segmentation followed by M A T E 2 segmentation, the node hiding technique, and a history sources lim-ited encapsulation scheme are introduced. Two fast asynchronous commutation modelling techniques —DSDI3 and BIFE 4 — to eliminate spikes and numerical oscillations are introduced. Industrial real-time test cases are included for power system protective relays, and for high-voltage DC bridges and their correspond-ing controllers. 1 Acronym for Electromagnetic Transients Program. 2 Mul t i -Area Thevenin Equivalent. 3 Double Step, Double Interpolation. 4 Backward Interpolation, Forward Extrapolation. C O N T E N T S Abstract ii Contents iii List of Tables x List of Figures xi Preface xxii Acknowledgements xxv Dedication xxvii Part I Motivation 1 1. Introduction 2 1.1 Research Claim and Contributions 9 Part II The Problem 10 2. The Problem 11 2.1 Real-Time Simulations 11 2.2 Digital Real-Time Simulations [1] 12 2.3 Frequency Bandwidth, Integration Rule, and Accuracy Limitations 13 2.4 Hard Real Time versus Soft Real Time Simulations 15 2.5 Network Size. Critical Complexity Network, CCN 16 Part III The Solution 19 3. Integration Rules in OVNI 20 3.1 Introduction 20 3.2 Accuracy and Stability 21 3.3 Frequency Response [2] 21 3.4 Choosing OVNI's rule • • • • 23 3.4.1 Calvino's second order rule 25 tit Contents 3.4.2 Trapezoidal versus backward Euler's 25 3.4.3 Backward Euler's, a "lossy" rule 29 3.5 Improved performance of OVNI and backward Euler's . . . . . . . 30 3.6 A single-phase power system test case 30 4. Digital Solution, Element Models 36 4.1 Solution versus Simulation 36 4.2 General purpose ODE-solvers 36 4.3 Discretizing the Network, not the Equations 37 4.4 Discrete-time model for an Element [3] 38 4.5 Basic models in the prototype 40 4.5.1 On Notation 41 4.5.2 Lumped Elements [3, 4] : 41 4.5.3 Transmission Lines [3, 5] 42 4.5.4 Single-phase non-linear core Transformer 49 4.5.5 Three-phase non-linear core Transformer 49 4.5.6 Switches 49 4.5.7 HVDC Modules 50 4.5.8 HVDC-current-loop Controller 50 4.5.9 Metal Oxide Varistors (MOV) 51 4.5.10 Measuring Transformers, ITs 52 5. Segmentation and OVNI 54 5.1 Introduction 54 5.2 The Tasks of the Simulator 54 5.3 Precalculation of Network Matrices 57 5.4 The Complexity Index, a metric 58 5.5 Sparsity and the Solution 58 5.6 Divide et Impera. Segmentation 59 5.7 Topological Segmentation 60 Contents 5.8 The Need for Topological Independent Segmentation, forwarding MATE [6] 63 5.9 On Notation 67 5.10 Multi-Area Thevenin Equivalent, MATE 67 5.11 MATE and Diakoptics [7, 8] 73 5.12 MATE and the Compensation Method 74 5.13 Node Hiding and Element Models 74 5.14 Node Hiding. A numerical example 77 6. Sources, Links and Expanded MATE 82 6.1 Introduction 82 6.2 Precalculation of Source Values 82 6.3 Current Sources 85 6.4 Voltage Sources . . . 86 6.4.1 Grounded Voltage Sources —GVS 86 6.4.2 An example on Grounded Sources, MATE versus Norton 88 6.4.3 Ungrounded Voltage Sources, UVS 90 6.4.4 Voltage Sources "Ownership" 91 6.5 Extended MATE 92 6.5.1 Extended MATE: A numerical example 94 7. Switches and Asynchronous Commutation 98 7.1 Introduction 98 7.2 Switch Closing, Collapsing Nodes 99 7.3 Expanding a System of Linear Equations 101 7.4 Closing a Switch without collapsing a Node 102 7.4.1 A Numerical Example 103 7.5 Switch openings 104 7.6 Asynchronous Commutation in OVNI 107 7.6.1 Double Step-Double Interpolation, DSDI 109 7.7 DSDI's OVNI Modified Tasks Schedule 110 V Contents 7.8 Single Step and Double Step Interpolation Details 114 Part IV OVNI Element Models 117 8. OVNI Element Models 118 8.1 Introduction 118 8.2 Current Transformers 118 8.3 Coupling-Capacitor Voltage Transformers 124 8.3.1 Potential transformer and reactors 124 8.3.2 Simplified equivalent circuit 126 8.3.3 CCVT model for real-time simulation 127 8.3.4 Potential Transformer Model, PT 128 9. The HVDC Model 132 9.1 Introduction 132 9.2 The three-phase linear transformer model 133 9.2.1 Single-phase transformer model 133 9.2.2 The three-phase transformer matrix/model 136 9.2.3 Adding the 6-valve bridge and the smoothing reactor . . 139 9.3 History sources in the hvdc-module 141 9.3.1 Examples 142 9.4 Hvdc matrices 142 9.5 Interface of the hvdc model and OVNI 144 10. HVDC-bridge Controller 146 10.1 Block View of the Controller 146 10.2 Stage One: The DC filter 147 10.3 Proportional-Integrative Block 148 10.4 Cycle position monitor and the Valve Scheduler 150 10.5 Cycle Ramp Synchronizer • 154 10.6 Modulating the firing angle 156 Contents 10.7 Filtering the angle reference voltage 158 11. Modelling saturation in power transformers 161 11.1 Saturation in single phase units 161 11.2 Saturation in three-phase units 162 11.3 Keeping track of a phase-leg's flux 164 11.4 Modification of the HVDC-module model to include saturation 165 11.5 History sources introduced by magnetization modelling 168 11.6 Effect of the saturation modelling in the primary current . . . . 169 Part V Implementation 171 12. OVNI, the simulator's engine 172 12.1 Introduction 172 12.2 Input Data File 172 12.3 Names in OVNI 173 12.4 From nodes to the network 174 12.5 Classes in OVNI 178 12.5.1 The Element Class, elm.t 178 12.5.2 The history source class, hsr_t 180 12.5.3 The subblock class, sub.t 181 12.5.4 The block class, blk.t 181 12.5.5 The clock object, tck 182 12.5.6 The simulation object, sim 183 12.5.7 The network class, net 183 12.6 How classes within OVNI relate to each other 184 12.7 Main tasks of the simulator's engine 184 12.7.1 Initialization • • , 185 12.7.2 Simulating the case 185 \ti i Contents 13. OVPP, The Preprocessor 189 13.1 Introduction 189 13.2 The Preprocessor Input File 189 13.2.1 General Data 190 13.2.2 Lumped Elements 190 13.2.3 Intrablock "links" and Switches 191 13.2.4 Transmission Lines 193 13.2.5 Grounded Voltage Sources 194 13.2.6 High Voltage DC rectifier/inverter, HVDC 194 13.2.7 HVDC Controllers 196 13.3 Classes in the Preprocessor 197 13.3.1 The UsU Class 198 13.3.2 The nodListJ class 198 13.3.3 The sub.t class 199 13.3.4 The subblock list, subList.t, class 199 13.3.5 The blkJ class 199 13.3.6 The block list, blkLisU, class 200 13.4 Main Tasks of the Preprocessor 201 13.4.1 Creation of a list of all the nodes 202 13.4.2 Grouping Subblocks 204 13.4.3 Calculate Subblock Matrices 206 13.4.4 Grouping Blocks 208 Part VI Validation 209 14. Validation Tests 210 14.1 Introduction 210 14.2 Integration Issues 211 14.3 Asynchronous Commutation 212 14.4 Speed 215 Contents 14.4.1 Relay Testing 215 14.4.2 HVDC Systems 216 14.4.3 MATE vs. Conventional Solution 217 14.4.4 Cholesky vs. LU Decomposition 219 14.5 Accuracy 222 14.5.1 HVDC Module and its controller model 222 14.5.2 Relay Testing 237 Fart VII Conclusions 242 15. Conclusions and Future Work 243 15.1 Future work 245 IK LIST OF TABLES 9.1 (Matrix "node") Connection nodes for transformers x, y, and z. Rows are the transformers, and columns are the nodes 138 14.1 Solution time, per integration step, in microseconds 216 14.2 Solution time (in microseconds) . . . with the MATE segmentation algorithm 218 14.3 Solution times . . . with standard unsegmented algorithm, 219 14.4 Solution times of Cholesky method versus LU 221 14.5 Solution time for a single-block network . . . using precalculation for the link matrices 221 5C LIST OF FIGURES 1 An HVDC test case 4 2 A protective relay test case 5 3 Multilayer segmentation: Topological segmentation, followed by MATE-Diakoptics Segmentation. 6 4 All element models look and behave the same from the point of view of the simulator's core 8 5 Front end and back end interfaces to OVNI's core 9 6 An observer watching over and controlling a system. . 11 7 From discrete to continuous, through D/A converters and amplifiers. 12 8 Magnitude distortion introduced by Trapezoidal rule at frequen-cies up to 40% the Nyquist's 14 9 Usefulness of the simulation results for: a) a hard real time sim-ulation; b) a soft real time simulation 15 10 Typical configuration of power networks used in protective relay testing. . 16 11 Critical Complexity Network targeted for relay testing. It in-cludes two multicircuit transmission links, and MOV protection. 16 12 Target Network for HVDC controllers testing. The controllers triggering the gate signals, used in tuning the simulator, are not shown, but were included in the simulation 17 13 Frequency response, magnitude, for the rules: trapezoidal, back-ward Euler's, Simpson's, Gear's second order, Calvino's second order 23 X/ ' List of Figures 14 Frequency response, phase shift, for the rules: trapezoidal, back-ward Euler's, Simpson's, Gear's second order, Calvifio's second order 24 15 Error in magnitude introduced by trapezoidal and Backward Eu-ler's rule, up to 40% of the Nyquist's frequency. 26 16 Time delay introduced by backward Euler's rule at each frequency up to Nyquist's 28 17 Single phase power system with a short circuit on the receiving end, to test the different integration rules 31 18 Solution obtained by the EMTP with the CDA option activated with an integration step At = 50 ps 32 19 Solution obtained by the EMTP with the CDA option activated with an integration step At = 70 /is 32 20 Simpson's rule solution with At = 5//s. Voltages at all the nodes in the network in Fig. 17 . 33 21 Trapezoidal rule solution with At = bOps. Voltages at all the nodes in the network in Fig. 17 33 22 Backward Euler's rule solution with At — 50yus. Voltages at all the nodes in the network in Fig. 17 34 23 Gear's second order rule solution with At = 50/i.s. Voltages at all the nodes in the network in Fig. 17 34 24 Backward Euler's rule solution at an expanded integration step. At = 70 /is 35 25 A test case for relay testing 37 26 Discretization process 38 27 a) Lumped inductor, and b) its discrete time domain model cor-responding to the trapezoidal integration rule 39 28 Lumped losses in the transmission line model 43 29 Single phase lossless transmission line 44 30 Single phase lossless transmission line model 44 x i i List of Figures 31 Lossy single phase transmission line 44 32 History voltage source equivalent circuit 45 33 Lossy line equivalent circuit 45 34 Equivalent circuit for mode "i" 47 35 Multiphase transmission line model in phase-domain, [g] is a matrix, all the other parameters are vectors 48 36 OVNIs HVDC module: a) detailed view; b) block view 50 37 Modelling the voltage clipping effect of the MOV 52 38 Tasks in OVNI's simulation cycle 55 39 A typical power electric system 61 40 a) Simple single-phase power system; b) Discrete-time equivalent circuit for system in (a) 62 41 a) Power network topology; b) Corresponding conductance ma-trix [G]. . 63 42 Relay testing case with blocks identified 63 43 A partial view of an HVDC-controller test case with two topolog-ical blocks 64 44 Circuit with an ungrounded voltage source 65 45 An OVNI's link. 66 46 a) Network with MATE 'S subblocks delineated; b) Subblocks con-nected by links, after MATE 68 47 A link's voltage source and resistance, and the directions assumed positive for current and voltages 70 48 MATE's Thevenin equivalent rendering for each of the subblocks. Nodes a b e d represent docking ones 72 49 Node Hiding: Internal nodes and external nodes 75 50 Complete network with the node hiding region delineated. Ex-ternal nodes: (1) and (2). Internal nodes: (3) and (4) 78 51 Hiding zone: an element's model. See external nodes (1) and (2), and internal nodes (3) and (4). . 79 X N ' List of Figures 52 "External" network, as seen by OVNI, with hidding region rep-resented as a "black-box" 79 53 The n prestored samples of a sinusoidal source 83 54 Wraparound of prestored source's samples 84 55 A current source in OVNI: its nodes 85 56 Precalculated time matrices corresponding to grounded voltage sources in a subblock 87 57 Network with one grounded voltage source accounted for as a link. 88 58 Ungrounded voltage sources in OVNI: a) a link; b) not a link. . 91 59 Voltage sources "ownership", in OVNI 92 60 KCL nodal equations and KVL voltage sources equations, getting ready for standard MATE 92 61 Extended matrices and vectors for the subblock with UVS's. Ex-tended MATE 94 62 Subblock with and ungrounded voltage source 95 63 Samples output stream, and asynchronous commutation 98 64 Short and long integration steps. Non real-time simulation. Data are issued as soon as they are available 99 65 Short and long integration steps. Filler time slices. Data output stream in a real time simulation 100 66 Closing a switch between nodes i and j 102 67 • Case to illustrate how to avoid collapsing nodes 103 68 Switch opening event: signal, and actual opening 105 69 Zero crossing and actual opening of a switch 105 70 Six valve rectifier circuit 106 71 Voltage before smoothing reactor 106 72 Non real time backtracking 107 73 Simple non regressive backtracking. 107 74 Accurate but too expensive backtracking 108 y / V List of Figures 75 BIFE: Backward interpolation, forward extrapolation 109 76 DSDI used in OVNI. The most expensive step takes one regular integration step with precalculated matrices, plus one inexpensive linear interpolation I l l 77 OVNI's modified flowchart to include DSDI. Elements handle three instances of their histories: h n e x t , h n o w , hbefore. When they "decide" to backtrack, they discard h n e x t , and interpolate between the other two 112 78 Linear interpolation between points (a, r0) and (6, rj,). bt is the per unit backtracking necessary 115 79 Interpolation across the double step span 115 80 Equivalent circuit of current transformer (minus the ideal trans-former) referred to the burden side 119 81 Piecewise linear representation of magnetization in flux path. . . 121 82 Secondary current match between OVNI's model and EMTP's discrete elements one. Both simulation coincide completely. . . . 123 83 Coupling Capacitor Voltage Transformer, CCVT. 124 84 Lumped parameter high frequency equivalent circuit of a two winding transformer 125 85 High frequency model of a reactor 125 86 High frequency equivalent circuit for a two winding transformer. 126 87 Frequency response (ZShort) of a two winding transformer. Mea-sured and synthesized responses 127 88 Synthesized RLC network used to approximate Zshort{^)i multiple peak high-accuracy synthesis. 127 89 Simplified model to represent only the main peak delivers accept-able accuracy. 128 90 PT's frequency response, 201og(Vrout/Vrin) dB versus frequency in hertz 129 X V List of Figures 91 Approximated PT's frequency response, as rendered by the two polo continuous time Laplace transfer function 130 92 Equivalent circuit used to approximate the response of the PT. . 130 93 Approximated PT's frequency response, as rendered by the two polo discrete time Backward Euler transfer function 131 94 Six valve module modelled for OVNI and its three parts: a) the three-phase transformer; b) the six-valve bridge; c) the smoothing reactor 132 95 Matrix precalculation scheme for blocks used in OVNI [9]. . . . 133 96 a) Single-phase transformer, Zsc referred to the primary; b) Zsc referred to the secondary 134 97 Internal versus external node identification 135 98 Including the subnetwork's matrix into the network's matrix. . . 136 99 Node numbering in the hvdc module 137 100 Y d l l three-phase connection of single phase units 138 101 Procedure to incorporate the single phase units Yt matrices into the module's Yn matrix 139 102 Status of the bridge as a bitwise variable 140 103 The vector of precalculated [Y] matrices 140 104 Discrete time model of the hvdc 6-valve module 141 105 A single phase discretized short circuit inductance 142 106 Total nodal currents for 'Ydll ' connection 143 107 Hvdc module with a Y d l l ' transformer connection 143 108 Total nodal currents for Y d l l ' connection 143 109 Inputs and output of the simplified current controller 146 110 Controller model block diagram 147 111 RC equivalent circuit for the PI block. 148 112 A full-wave valve bridge, with valves and phases identified. . . . 151 X V f ' List of Figures 113 a) Firing time points when alpha is zero; b) Firing points when alpha is not zero 151 114 The ramp signal and the model's variables for a = 0 152 115 Data structure to select next valve to be fired, when the ramp so requests 152 116 The ramp signal and the model's variables for a = 0, when gate signals are issued for Yy and Yd modules 153 117 Scheduling the next valve to be fired: index, iNextValveToFire; and arrays: aValveGroup and aValveSequence 153 118 Firing walls and initial value of the tick ramp counter at the beginning of each reference cycle 154 119 Filtering the angle reference voltage signal 159 120 Discretized version of the reference angle voltage filter 159 121 Reference angle voltage Vac and its fundamentals obtained by the filter described in this section 160 122 Magnetization branch in a single-phase transformer (non-linear) 161 123 a) Magnetization of a transformer core (typical); b) Two-segments piecewise magnetization curve used 162 124 Saturation modelling for a single phase transformer 162 125 Non-saturated three phase core transformer 163 126 Three phase core transformer with phase-a's leg saturated. . . . 164 127 Non-saturated magnetization in three phase core transformers. . 165 128 Phase voltages and non-saturated magnetization currents. . . . 166 129 Including the non-saturated magnetization matrix, [Gns], into the HVDC-module [G] matrix 167 130 Modelling saturation in the core 168 131 The six history sources introduced to model magnetization in the transformer 169 List of Figures 132 Primary current with a linear core under steady state conditions, OVNI's model and EMTP simulation. The large spikes belong to OVNI's before DSDI, §7.7. Microtran/EMTP avoids them using CDA [10] 170 133 Primary current with a saturated core under steady state con-ditions, OVNI's model and EMTP simulation. See caption to Fig. 132 170 134 Standard abbreviations in OVNI 173 135 Hungarian notation prefixes as used in OVNI 173 136 Structure that represented originally a node in OVNI 174 137 Node array inside a subblock object 174 138 A node registration item, an element of the node registry array. 175 139 Network registry of nodes, and their spatial relationship with the nodes, subblocks, blocks, and the network 175 140 The external history source class, hsr_t 176 141 Relationship among the elements, their history sources and the subblock's 176 142 The element abstract class, elm.t 177 143 The subblock class, sub_t 181 144 The blk.t class, template for every block in the network 182 145 Header of the clock object, the ticker, tck.t 183 146 Services provided by the simulation object 183 147 Container/contained relationship of classes in OVNI 184 148 Initialization Task of the Engine 185 149 General structure of the preprocessor input file 191 150 Section on general data for a case with an integration step of fifty microseconds and a total simulation time of fifty miliseconds. . . 192 xvii i List of Figures 151 Section on lumped elements: including one resistor of 2017 con-nected between nodes TOPO and BURRO; an inductor of 20 mH, and a capacitor of 20pF 192 152 This switch data section includes a single switch: the one between nodes TOTUMA and COBIJA, a switch open at the beginning of the simulation, with two open operations, one at seven hundres microseconds, the other at twelve hundres microseconds 193 153 In this case, only one three phase transmission line has been in-cluded in the network 194 154 HVDC controller data 196 155 Every node is represented by a 'nod_t' structure and registered in a cell of the list 'nodList_t' 197 156 A cell in the list.t class 198 157 The "head" cell and the circular linked list defined by list.t. . . 199 158 Methods and data items in the list.t class 200 159 Methods and data items in the nodList.t class 201 160 Each node in the network list is an instance of this structure. . . 202 161 Methods and data items in the subJ class 203 162 Methods and data items in the subListJ class 204 163 Interaction of classes in OVPP during node registration 205 164 Interaction of classes in OVPP during assembling of subblocks. . 206 165 Interaction of classes in OVPP during subblock matrix calculation. 207 166 Interaction of classes in OVPP during block grouping 209 167 A two-diode full wave rectifier case 212 168 For the two-diode retifier, current in the load 212 169 DSDI output for two-diode rectifier case 213 170 A six-valve three-phase rectifier group 213 171 EMTP algorithm results for the six-valve rectifier 214 172 DSDI results for the six-valve three-phase case 214 XIX List of Figures 173 One of the six sections in the test network used to benchmark MATE 217 174 Six node sections connected in a ring 218 175 Solution times, in microseconds, for MATE algorithm 219 176 Solution times for the standard unsegmented algorithm 220 177 In percentage, how much faster MATE is compared to the stan-dard unsegmented algorithm 220 178 Solution time for precalculated MATE link matrices 221 179 Percentage grains of precalculating the link matrices vs vs. cal-culating them on the run 222 180 Single module, six-valve test case used to validate the HVDC module under steady state 224 181 Primary current, steady-state, linear transformer core. EMTP/MICROTRAN and Dumbo (DU-99) 224 182 Primary current, steady state, linear transformer core. EMTP/Microtran and Dumbo. A detail view 225 183 DC voltage in steady state: EMTP/Microtran and Dumbo. . . . 225 184 Voltage before and at steady state: EMTP/Microtran and Dumbo. Initialization: two cycles for Dumbo 226 185 Zoom on the primary current, steady state, linear transformer core. EMTP/Microtran and Dumbo 227 186 Primary current, steady state, non-linear transformer core. EMTP/Microtran and Dumbo 227 187 Detail of primary current with non-linear core. EMTP/Microtran and Dumbo 228 188 DC voltage, with non-linear transformer core. EMTP/Microtran and Dumbo 228 189 12-valve case to validate behaviour of HVDC model under AC faults 229 190 DC current, as calculated by: a) Microtran; b) Dumbo. . . . . . . 230 X X List of Figures 191 Angle reference voltage for a) Microtran; b) Dumbo. Observe the small phase error before the fault, and the large error during the shortcircuit 231 192 Angle reference voltage for Microtran and Dumbo near the end of the fault 231 193 A double bridge, twelve valve case used to explore the HVDC module during and after a low impedance fault on the DC side. 232 194 Fault current (DC-side): a) EMTP/Microtran; b) Dumbo. . . . 233 195 Angle reference signals for EMTP/Microtran and Dumbo. Before, during, and after the DC fault 233 196 During the DC fault period: a) Firing angle reference voltage, Vac for Microtran; b) Reference voltage Vac, for Dumbo; c) Voltage across valve zero in the YyO bridge, as obtained by Microtran. . 234 197 Valves zero and two of HVDC module YyO 235 198 Twelve valve, double bridge inverter case used to investigate com-mutation failure modelling 236 199 DC current before, during, and after the AC single phase fault, in the inverter 236 200 Protective relay test case, with two multi-circuit segments and MOV protection of series compensation 237 201 Voltage on phase b at FAULT1 237 YX i PREFACE This research began as a quest for an algorithm to solve power system networks that was fast enough as to perform real-time equipment testing. Testing of the algorithm focused on two cases provided by industry: a pro-tective relay test case, and an HVDC controller test case. The work took the EMTP's algorithm as a starting point. The EMTP turned out to be more than sixty times too slow for the second case mentioned above, and fourteen times too slow for the first case. In the first of the test cases, that algorithm spent more than two-thirds of the time solving the nodal equation system, [G][v] = [h]1. To accelerate the solution process, precalculation of all possible [G] matrices (and of their triangular decompositions) was considered. It is easier to visualize the obstacles ahead of this approach through an example (which will be detailed later in this thesis): a 1000-node network with 1000 switches would require several trillions of Earth-sized planets covered with RAM chips (continents and oceans as well) to provide for storage to such set of matrices. However, conveniently segmenting the same network, would bring down the memory requirements to less than 180 kilobytes. Segmentation was introduced in three different forms: the one suggested by the time delay provided by transmission lines (topological segmentation), the new Multi-Area Thevenin Equivalent (expanded and presented in this thesis in its full potential for the first time), and the also new node-hiding procedure. The combination of those segmentation strategies was labelled multi-layer seg-1 Where [G] is the network bus conductance matrix; [v] is the vector of nodal voltages, to be computed; and [h] is the vector of total nodal currents. X X I I Preface mentation. This segmentation yielded the performance looked for. To eliminate the voltage spikes produced by switch or valve openings that occur between simulation points, a new mechanism was introduced, the new double-step and double-interpolation procedure, a technique that backtracks to the occurrence of the switching event, and then advances by a double step to fall back in synchronism with the real-time train of samples. Buttressing the algorithm's robustness and stability, a careful integration-rule study shed new light into the effect (in the time-domain) of the phase shift that the backward Euler integration rule introduces (in the phase-domain). The result of this work is a very fast and stable algorithm with no loss of generality. During testing, as reported in this thesis, the algorithm delivered real-time performance for the demanding test cases outlined above, and it did so on an off-the-shelf PC-Pentium 400 MHz workstation. This thesis is divided in several parts, as follows: 1. Motivation. A brief account of the events that triggered this research; 2. The problem. A description of the challenge to overcome at the outset of the work; 3. The Solution. This is the main part of the thesis, it contains its contri-butions, which are scattered among several chapters: Chapter 3 presents a new look at the backward Euler integration rule; Chapter 5 introduces, in its general format, precalculation riding on top of a multi-layer form of network segmentation (topological segmentation, the new Multi-Area Thevenin Equivalent concept, and the also new node-hiding segmenta-tion strategy); Chapter 6 describes the precalculation subtleties of peri-odic sources used in OVNI, and extends and generalizes the multi-area Thevenin equivalent concept to produce the very efficient tool that bring the performance needed to meet the real-time deadline targeted (less than fifty microseconds for the test case described above); Chapter 7 presents, among other things, the new double step with double interpolation back-XXI I i Preface tracking algorithm used to eliminate the voltage spikes introduced by opening of switches between the instants where the simulation solves the network, it does that with a mimimum overhead that keeps the whole simulation within the real-time deadline; 4. New Models. Chapters 8, 9, 10, and 11 include measuring transformer models, some non-linear element models with fast topology-change, and a minimal functionality controller, the last two as examples of the imple-mentation of the node hiding strategy on an element model, and on the creation of two element models that interact with one another; 5. Implementation. Chapters 12 and 13 describe the implementation of the simulator core and of its preprocessor with some minimal detail; 6. Validation Tests. Chapter 14 shows several test cases where the simulator delivered results whose accuracy is compared with those of the EMTP, those results were obtained within the real-time bandwidth targeted; 7. Conclusions. Finally, Chapter 15 closes the thesis with a summary of conclusions. XXIV ACKNOWLEDGEMENTS "No book published is ever solely the work of the author. Assistance comes from a variety of sources in as many different ways," wrote Jean M. Auel at the introduction to her best-selling novel The Clan of the Cave Bear. This cannot be more true than in the case of a thesis. So many people have contributed in one way or another to help me reach this goal, from my mother, Rita Elena, who decided to teach her three year old son to read and write, and both my wonderful elementary school teachers, Sra. Rojas and Prof. Hernandez, to my father Rafael Jose, who insisted on integrity, curiosity, and originality as the hallmark of a true human being. My recognition and gratitude to Prof. Marti, who put in my hands this most critical part of the OVNI project, and who always believed in my skill to somehow pull the proverbial rabbit out of the hat and produce an ever faster and faster algo-rithm. I want to acknowledge him for his financial support, for sharing his impres-sive knowledge and intuition with me, but above all I want to thank him for his trust. To Prof. Dommel, whose prompt advice and guidance during the first years of my research widened my horizons in this his land, the land of the electromagnetic transients analysis, I want to acknowledge and thank his kindness and support,. To Mrs. Doris Metcalf, Ms. Cathleen Holtvolg, Ms. Katy Brindamour, Mrs. Gail Schmidt, Ms. Anne Coates, Mr. Alan Prince, and Mr. Ken Madore, thanks for their friendship and patience. To Prof. Donaldson and Prof. Davies for trusting me with the young minds of the students of ECE 263, 370, 373 and thus providing me with a necessary retreat from the intense research activity (albeit for a few hours). XXV For all the help in preparing and setting the slides for the final presentation, thanks to my daughter Jazmin Carolina, to my son Ivan Jose, and to my colleague and friend Richard Rivas. My appreciation and recognition goes to my friend Mr. Jesus Calvino-Fraga, who interfaced OVNI with the real-world, and to my friend Mr. Jorge Hollman who ported OVNI to his multi-PC cluster which allowed the simulator code to perform at maximum efficiency. I would also like to thank my friend and colleague, Dr. Salvador Acevedo, for sharing his power electronics knowledge with me, and for his patience and tolerance in having his model turned inside out and upside down to accommodate OVNI's interface and the corresponding node simplification schemes. Thanks for the many productive discussions about the nachos-problsm. To this wonderful land, to Canada, to her people, to her future, thanks for wel-coming my family and myself, and for providing the platform on which all this has been possible. Last but not least, I thank my wife Maria Josefina, for her almost inexhaustible patience, for her love, her support, and for kick-starting me when I needed it most. To you all, my gratitude. May God bless you all! Luis R. Linares-Rojas. X X V / / dedicate this thesis to these three wonderful women Maria Josefina, my wife Jazmin Carolina, my daughter Rita Elena, my mother X X VI I Part I MOTIVATION 1-1. INTRODUCTION This thesis describes an efort to develop a general purpose digital simulator for electric and electronic power networks, suitable for real-time closed-loop equipment tests under flexible constraints of bandwidth and network complexity. Simulation of an electric network can be viewed as the process to determine its state at a certain number of points along the time axis. If the network is described by its circuit theory representation, its state can be obtained as the solution to a set of non-linear coupled partial diferential equations [11]. Using nodal analysis, for instance, this mathematical representation includes one of such equations for each node in the network. Even for a smal network, with only a few tens of nodes, the solution task is rather demanding. When the solution needs to be obtained within the constraints of a real-time simulation1, the problem becomes even more chalenging. The Engineering community has been able to reduce the complexity of the problem of determining the state of the network, at the price of reducing the scope of the solution as wel, by classifying the network's behaviour into oper-ational areas of interest, and applying suitable simplifying assumptions to each of those areas separately. The most important of those areas are: steady-state power flow [12, 13, 14], slow transients [15], fast transients [4], short-circuits [16, 14], and real-time equipment testing. This thesis presents an atempt to a unified solution, and explores its va-lidity on two counts, fast transients simulations, and real-time simulations for equipment testing; away from analog simulations and into the realm of digital 1 i.e., a few microseconds. 1. Introduction 3 simulations. For each of the areas of interest mentioned, industry counts on specialized software based on the corresponding assumptions and restrictions. In particular, for insulation coordination analysis, the standard tool, the E M T P 2 [4], is built around the widest of the assumption sets, and uses a powerful discretization process for the problem that provides the seed for the work presented in this report. It is then convenient to establish the place of the E M T P in current power engineering practice. During the last decades, the electromagnetic transients program — E M T P — has been gaining ground that used to be the sole domain of the expensive and bulky analog network simulator T N A 3 [17], transients computations in power systems. Today, the E M T P is the standard tool for this kind of simulations. Even if already existing T N A s remain in service, most new needs are covered by E M T P installations. Cost and room use are two main areas where the E M T P has clear advantage when compared with the T N A . Another advantage is enhanced flexibility: very accurate models for system components can be developed and incorporated into the E M T P . Such is the case of the power transmission line, whose distributed parameters nature is not representable with the scaled-down analog models avail-able in a T N A 4 . In spite of those advantages, in cases when testing some device requires real-time interaction between the device and the power system it is connected to, the analog simulator T N A is very often still the answer. However, if a computer program is to attain real-time performance while simulating a power network, the program has to be capable of solving the system equations fast enough to encompass the bandwidth required for the equipment under test. In both, protective relay tests, and in H V D C controller tests, a bandwidth between 2,000 Hz and 4,000 Hz is considered adequate [18, 19, 9]. 2 Electromagnetic Transients Program 3 Transients Network Analyser. 4 Hybrid simulators include the best of both worlds, digital and analog, but at very high costs. 1. Introduction 4 iimf.c.RLCfttttf \ 130il.c.RLCflH««. 100km trarwniuton Ik 11th f c. RLC Utar 13th Te. RLCfiltar/ Th«v«rwi •gutvatam 0 ( ^ 1 ) * \ i vj/ non-lM»af COM r—' r—- r—< imoothmg rMctot w i n -' i f * ? * ! nm l.c.RLCfflWf \ 13th !.c. RLC Wltr. - W L , "Tour a i m ; >ofi*»« Thavtnio aquivaiam F i g . 1; A n H V D C test case. Using the trapezoidal integration rule as a reference, and keeping the maximum distortion error introduced by the rule under 10%, an integration time-step between 50/xs and 100/is is then necessary [10]. To perceive the performance improvement needed, two important test cases were simulated wi th Microtran's E M T P 5 : the H V D C test case in F i g . 1, and the protective relays test case whose one line diagram is shown in F i g . 2. Both cases were run on a 200 M H z Pentium Pro workstation. For the first case, the E M T P used an average 6 of 3120/xs7, that is, an improvement in speed of thirty to sixty times is necessary for real-time performance. For the second case, an improvement factor between seven and fourteen was found needed. In spite of the strict speed requirements, the new breed of microchips and computer architectures has been attracting researchers [18, 20, 21, 22, 23, 19, 24, 25, 26, 9, 27] into t rying to produce a digital real-time simulator. Most of those researchers have chosen a hardware approach. Some mimic the topology of the power network wi th a convenient arrangement of D S P ' s [18, 27] (some tried 5 U B C ' s P C version of the E M T P . 6 The critical step is —most likely— much larger than this, but internal probing into the E M T P ' s simulation cycle was not available. 7 Actually, more than that, since capacitive snubbers and harmonic filters were not included in this simulation. 1. Introduction 5 sys-1 ©\ _,v_rtm_ BUSt 250 km coupted 150 km 1r FAUL2 coupled M O V BUS3 B U S 4 -OH r © Fig. 2: A protective relay test case. this approach with transputers in the past [20, 21]), others rely on expensive and sophisticated super-computer architectures [24] to meet real-time deadlines for reduced size test cases8. Some other researchers [22] have attempted a tran-sient stability analysis of a power network by splitting the simulation loop into spawned parallel child processes, where each of these processes is assigned a node in a hypercube architecture system, according to a sophisticated mapping pattern. The results reported in [22] show a speedup of 45% when moving from one to two processors, but an additional gain in speed, for the linear part of the problem, with four processors of only 15%. If more than four processors were used, the additional overhead actually increased the total execution time. In hardware based solutions like those in [18, 20, 21], the close match between the particular network to be solved and the physical connection of boards (or transputers, in the past) may render the solution inflexible9. Besides, depending on customized hardware platforms, the upgrading cycle to new and faster hard-ware may be much slower than in the case of commercially available off-the-shelf computer systems. In the work that occupies us, an algorithmic-software-based method is intro-duced. By going back to the original set of non-linear coupled partial differen-tial equations,.a global view is obtained. The increased level of complexity of 8 Even though they originally employed supercomputers, the Mitsubishi group, with which we performed common work in 1995, has recently switched to a P C solution for the hardware [26]. 9 As of this writing, [27] implemented an elegant solution around this problem. 1. Introduction 6 Fig. 3: Multilayer segmentation: Topological segmentation, followed by MATE-Diakoptics Segmentation. the representation is dealt with by fragmenting the network into smaller quasi-decoupled fragments. Two fragmenting techniques are combined into a two step process, topological segmentation [9], and MATE segmentation [28, 29], Fig. 3. Further simplification and efficiency are achieved by hiding, or shading away, certain nodes, and so reducing the effective size of the network fragments even more. Also, as the smaller network fragments contain a reduced number of swi-tches, ergo a reduced number of switching states, and contain fewer nodes, after node hiding, they become suitable for some judicious precalculation without loss of generality in the solution [29]. Apart from the speed-related issues of the solution algorithm, growth-security was also considered. The fast changing evolutionary process of real-time model development for network elements imposes the need to incorporate simplicity and flexibility in the interface between those element models and the integrator proper. That is, we need to plug-in and out new models as old ones become obsolete, as painlessly and reliably as possible. Some of those models may rep-resent a centre of fast-changing topology to the integrator, as in the case of the HVDC model [30], or complex internal representations that must not perturb 1. Introduction 7 the core of the simulator with their details, as in the case of the time domain frequency dependent transmission line model [31, 32]. Even models that include non electrical issues, such as the synchronous generator model [33], must be incorporated seamlessly and used within a common model-integrator-interface. This goal was achieved by object-oriented design techniques [34]. All models, present and future, are to be connected to the core through a common and unique interface, Fig. 4. This means that they all look and behave the same, as far as the core is concerned. In OOP 1 0 parlance, that common interface is provided by a "defined" generic element, (an abstract class named elm_t), that comprises all the behaviour groups11 of interest to the integrator core. The re-sult is that all models turn out to be a particular case of that abstract class, with the additions and refinements that are unique to the model in question: the models are classes that inherit the behaviour defined for the elm_t class. The solution presented here relies on a fast solution algorithm, and has the advantages of enhanced flexibility and upgradability: it is not hardwired to the configuration of the network to be simulated, and its core (NI) is written in C++. The algorithm is easily portable to faster hardware platforms, as they become available, with the only concern in real-time applications of the adaptation of port-cards, amplifiers, and the corresponding synchronization signals. During the research cycle of this project, the core was developed on Intel platforms, run on Sun workstations (for portability tests), moved to IBM RISC System/6000 Model 560 machines, where it delivered real-time performance for the first time, with the first version of the integrator. More recently, the integrator was ported back to Intel machines of later vintage, workstations of the Pentium series, Pentium Pro 200 MHz, and lately to a Pentium II 400 MHz. That the simulator delivered real-time performance12 on these inexpensive platforms is a sign of the efficiency of the underlying algorithm. The integrator is portable. 1 0 Object Oriented Programming [34]. 1 1 In O O P parlance, behaviour of an object describes one of the routines that can be applied to the object. 1 2 Wi th in the target bandwidth and network size and configurations. 1. Introduction 8 transformer model — transmission ' line model HVDC model "generic element" (class elm_t) Fig. 4: All element models look and behave the same from the point of view of the simulator's core. The design allowed the exploration of avenues for improved efficiency: latency [2], dependent on the relatively different time constants of different sections of the network; and backtracking, to cope with switching not produced at one of the time points of the simulation [35]. The integrator solution must respond as well to events generated at both interface ends, see Fig. 5. On the side of the user, OVNI interacts with OUI, OVNI's user interface [36, 37] (due either to configuration changes in the net-work, or to the connection or removal of probes, voltmeters, ammeters, oscillo-scopes, etc.). On the hardware end, OVNI interacts with OV-XI [36, 38], the back-end hardware interface with the real world (opening or closing signals, or gate signals for controlled rectifier groups). 1. Introduction 9 OVNI's User Interface OVNI's External Interface HARDWARE EQUIPMENT UNDER TEST Fig. 5: Front end and back end interfaces to O V N I ' s core. 1.1 Research Claim and Contributions. Our summarized claim is that "Real-time simulation of realistic power networks is possible using stock computer hardware." To demonstrate that claim, this thesis introduces as contributions: a) the use of backward Euler integration rule as a preferred method, and demonstrates its validity; b) a multi-layer segmenta-tion scheme with: topological segmentation (introduced by lines time delay), an extended multi-area Thevenin equivalent concept segmentation, a node-hiding technique; c)a double-step double-interpolation technique to syncronize the sim-ulation both with switching operations and with the real-time output stream with very low overhead. Other central contribution was the implementation of the simulator around the OOP paradigm in C++, which is both efficient enough for real-time per-formance, and extensible to allow new models to be added without modifying the core. Also, a set of models was developed that prove the speed advantages of the proposed solution algorithm. The resulting simulator was tested on two real problems for real-time power networks simulation: a protective relay testing case, and an HVDC controller testing case. Part II T H E P R O B L E M 10. 2. THE P R O B L E M 2.1 Real-Time Simulations Real-time simulations stem from a situation like the one depicted in Fig. 6. An observer interacts with a system. The observer perceives the behaviour of the system, sends controlling signals to it, and watches the system's response to those signals; all this in a continuous cycle. Fig. 6: An observer watching over and controlling a system. The system could be an aeroplane, then the observer would be a pilot; or the system could be a power electric network, and the observer would be a protective relay, or an HVDC controller perhaps. In either case, if the purpose of the interaction is to evaluate the capability of the observer to perform under different circumstances, providing the observer with the real system (i.e., the aeroplane or the actual power system) is out of the question. The evaluating 11. 2. The Problem 12 agency presents the observer instead with a substitute system, a simulated one, where mistakes or malfunction will not result in an unthinkable catastrophe. To produce a meaningful evaluation of the performance of the observer, the simulated system needs to make the observer believe that it is interacting with the real system. The simulator, the agent in charge of creating such an illusion, must receive the observer signals, process them, calculate and release the correct behaviour of the system; and do it all "fast enough" to create that illusion. Such is the task of a real-time simulator. 2.2 D i g i t a l R e a l - T i m e Simulat ions [1] When the simulator is a digital one, by its own nature it cannot produce a continuous behavioural signal. Instead, the digital simulator issues a sequence of samples spaced "close enough" in time as not to miss any significant ripple in the behaviour of the system being simulated. It produces a discrete time simulation. Between the digital simulator and the observer stands a digital to analog converter and amplifying block, Fig. 7. This block fills in the gaps between the discrete samples produced by the digital simulator, and delivers a continuous time signal to the observer. Fig. 7: From discrete to continuous, through D/A converters and amplifiers. 2. The Problem 13 2.3 Frequency B a n d w i d t h , Integration Ru le , and A c c u r a c y L i m i t a -tions The samples issued by the simulator must be close enough to one another as to include up to the highest frequency component of interest in the behaviour of the system. According to Nyquist sampling theorem [39], the relationship between the frequency of the fastest frequency component, the Nyquist frequency, fNy, and the time distance of the samples is such that at least two samples of each cycle of that component are present in the discrete signal. The time between two consecutive samples, the simulation step or integration step, At, relates to fpfy according to Eq. (1). The smaller the integration step At, the wider the bandwidth of the solution produced by the simulator, but the higher the performance requirements on the simulator. For a given integration step, At, the theoretical bandwidth of the simulation is given by the Nyquist frequency, f^y fNy - (2) For an integration step At = 50/is, the theoretical bandwidth would be ^ = 2 x 5 0 x l O - ° = 1 M ° ° h e I t Z ( 3 ) This bandwidth holds only if the samples are taken out through observation of the correct continuous signal. In the case of a digital simulator, the samples are produced by a painstaking numerical integration process of the equations that describe the system. The accuracy of the integration process depends on the integration rule utilized, and on the size of the integration step. The theo-retical bandwidth suggested by Eq. (2) is drastically reduced by the distortion introduced by the integration rule. As will be seen in the next chapter, the 2. The Problem 14 EMTP's trapezoidal rule introduces a magnitude distortion according to Fig. 8. Magnitude Error for Trapezoidal Rule 0 0.1 0.2 0.3 0.4 frequency 0/1, f/fNy Fig. 8: Magnitude distortion introduced by Trapezoidal rule at frequencies up to 40% the Nyquist's. In protective relay tests, also in HVDC controller tests, the range of frequen-cies of interest goes up to 2,000 Hz. Depending on the tolerated distortion, see Fig. 8 and Eq. (2), the integration step in those test cases should be no larger1 than At — 50/xs for error < 3% At = 100/us for error < 10% These two results coincide with the recommendations in [17]. 1 If trapezoidal rule of integration is used. 2. The Problem 15 2.4 H a r d R e a l T i m e versus Soft R e a l T i m e Simulat ions From what has been said so far, it is evident that the simulator is in a race to do all of its duties by the time deadline imposed by the frequency response desired and the integration rule applied. That is the real-time deadline. When the simulator fails to meet that deadline, the value of the simulation suffers. In some cases, the value of the simulation decreases with the extent by which the simulator failed to meet the real time deadline. In other cases, the value of the simulation is null if not produced within the deadline boundaries. The first kind is. labelled soft real-time simulations; the second kind, hard real-time simulations [40] , see Fig. 9. value of simulation 100 HARD REAL-TIME real-time deadline 100'. value of simulation SOFT REAL-TIME it-real-time deadline Fig. 9: Usefulness of the simulation results for: a) a hard real time simulation; b) a soft real time simulation. For instance, when a real-time controller for a bread toaster misses its real-time deadline, it produces browner toasts, not quite the perfect one, but edible enough. The value of the simulation has been reduced, but some benefit can still be obtained from it; a sample of soft real-time simulation, Fig. 9b. On the other hand, when an auto-pilot landing real-time controller for aircrafts fails to meet its real-time deadlines, even if by a minor margin, the catastrophic results render the simulation completely invalid; this is a hard-time simulation indeed, Fig. 9a. During the first years of the project, OVNI was considered a hard-real time 2. The Problem 16 (%)— VA 'nr - -0 OLD-VA ITT ' O T P vW -© Fig. 10: Typical configuration of power networks used in protective relay testing. simulator, however, recently, under the light shed by experience some consider-ation was given to whether it could be a soft-real-time simulator under certain conditions. In particular, when a critical event occurs between two output bursts (the ones at the ends of their corresponding integration steps), the distinction between outputting the correct value at the critical moment, or the extrapolated one at the proper time, was proven irrelevant in all of the test cases [35]. 2.5 Ne twork Size. C r i t i c a l C o m p l e x i t y Network , C C N The size of the power network to be simulated is given by the number of nodes and branches —one branch per lumped element or switch, 2n branches per n-phase transmission line in the discretized equivalent network [3, 4]. The com-putational effort necessary at each simulation step grows with the size of the network [41, 4]. In any real-time simulator, associated with a particular arrangement of hard-sys-1 250 km 150 km coupled BUS1 FAUL2 coupled VC2 BUS3 BUS4 sys-2 Fig. 11: Critical Complexity Network targeted for relay testing. It includes two mul-ticircuit transmission links, and MOV protection. 2. The Problem 17 ware and software, there is always a limit in the complexity of the network that can be simulated in real-time. That is defined as the critical complexity network, C C N . Even very crude solution algorithms are capable of real-time performance for three or four-node networks. OVNI's algorithm segmentation lends itself naturally to a multi-machine solution; i.e., a segment of the network is solved in a module, a workstation working in parallel with others in charge of different segments of the network. Thus, networks of arbitrary size can be simulated by adding additional workstations. The efficiency of the algorithm is normalized, in what follows, by the critical complexity network associated with a single module configuration, a single workstation. nth f.c. RLC filter \ 13th f.c. RLC fitter. 3-phase Thevenln equivalent 100km transmission link 11th I.e. RLC fi 13th f.c. RLC filter/ \ i w non-linear cort — L — l mn 4- YyO nth I.e. RLC (liter ft smoothing reactor valve + snubber 13th I.e. RLC filter, non-linear < \ l ^ nor-imo U3C i Ydi 1 ft ft ft 3 1 YyO 1th f.c. RLC 13th f.c. RLC filter. I- JEST • a i " Dyl i 3-phase Thevenkn equivalent Fig. 12: Target Network for HVDC controllers testing. The controllers triggering the gate signals, used in tuning the simulator, are not shown, but were included in the simulation. In its minimal hardware configuration, single module, two real-time test tasks have been targeted and explored for the present report; namely: protective relay testing, and HVDC controllers testing. For the first case, the critical complexity network must include sufficient detail to cover the relay's protection zone and the simulated fault or operating switches. The network outside that zone may be represented by compact multiphase coupled-impedance Thevenin's equivalent circuits [4, 33]. 2. The Problem . 18 The compromise between performance and accuracy sketched in § 2.3 reduces the configuration of the network to be simulated to one like that in Fig. 10, which is similar to the reported test case in [18]. A more demanding test net-work, including multicircuit transmission links (capability included in OVNI's prototype) was used instead, the network shown in Fig. 11. For HVDC controllers testing, the CCN includes two multiphase Thevenin equivalents for the surrounding AC-networks (one on the rectifier side, and an-other on the inverter side), a two-pole DC-transmission link, a 12-valve rectifying substation including the two corresponding three phase transformers, and a 12-valve inverter substation with its two three-phase transformers, Fig. 12. Part III THE SOLUTION 1 3 -3 . INTEGRATION RULES IN OVNI 3.1 In t roduct ion Digital simulation pivots around the integration rule chosen to solve the dif-ferential equations that describe the system being simulated. Ironically, this integration rule is also the weakest link in the entire simulation process [41]. Ever since the introduction of the EMTP 1 in the late sixties by Dommel [3], the trapezoidal integration rule became de facto the standard rule when it comes to digital solution of electric power networks [4]. That choice has been later substantiated and made more robust by the introduction of the Critical Damping Adjustment (CDA) by Marti and Lin [19] in the late eighties. Currently, the trapezoidal integration rule is tacitly accepted as the underlying platform under every attempt to achieve digital real-time simulation [18, 9, 17, 23, 42, 24, 25, 26, 27]. Even the ubiquitous fifty microseconds targeted deadline is but the consequence of: • The needed 2 kHz bandwidth, associated with the tests described in the previous chapters. • A tolerated magnitude distortion of 3%. • The use of the trapezoidal integration rule. In this chapter, several promising integration rules are examined, and OVNI's deviant choice is justified. 1 The Electromagnetics Transients Program. 2.0. 3. Integration Rules in OVNI 21 3.2 A c c u r a c y and Stab i l i ty The validity and convenience of an integration rule in a real-time simulator is given by its accuracy, its stability, and its simplicity. In loose terms, the accuracy states how close the numerical solution, produced by the integration rule, is to the actual exact solution along all of its simulation or solution time span. The stability of a rule signals that the numerical solution will stay within a certain "distance" of the exact solution; that is, that it will not drift away eventually toward infinity. The simplicity of the rule has an impact on the overall performance of the simulation. To evaluate the first aspect of an integration rule performance, even if both using different methods, [41] and [19] both recur to a differential equation whose exact solution is known: a first order one. In this thesis a different approach will be used to probe more deeply into the nature of the rules, but for the same reasons as those of the previous two authors, a first order system, the voltage/current relationship in an inductor is used. To normalize the results, a unit inductance was used (i.e., L = 1 henry), Eq. (4). = d £ ) = di^ y ' dt dt y 1 To perceive and quantify the distortion introduced by an integration rule on a solution wave, the effect of the rule on frequency components ranging between DC and Nyquist's frequency is readily studied in the following sections. However, in order to gain a fresh insight into the behaviour of the rules under scrutiny, instead of finding the Z-domain transfer function corresponding to each rule, and mapping the z variable to the frequency domain, as in [19], a different approach is used in this chapter. 3.3 Frequency Response [2] When the integration step, At, is kept fixed, as in our case, the bandwidth of the solution spans up to the Nyquist frequency, f ^ y = To explore how 3. Integration Rules in OVNI 22 an integration rule responds to each frequency within this bandwidth a simple experiment was set up. A variable frequency sinusoidal voltage source is set to feed a one-henry inductor, L — IH. At each frequency, the current wave, magnitude and phase shift, was obtained through the integration rule under scrutiny and compared with the actual exact phasor solution to the equation Eq. (4). Actually, at each frequency, the effective admittance of the inductor, as ren-dered by the integration rule, is calculated; i.e., the quotient of the phasor representing the current wave obtained by the rule, and the phasor representing the voltage wave applied by the source. That admittance, Ye(u), can then be compared with the exact admittance of the inductor, Yx(ui). n M = (5) UJ Li Then, the quotient a complex number, is plotted, in magnitude and angle along the spectrum up to the Nyquist's frequency. The closer that quo-tient stays to the real unit, magnitude one, phase zero, the more accurate the integration rule is. The procedure is simple enough. However, as the frequencies get closer to Nyquist's, the reduced number of samples per cycle of the solution imposes an additional complication. A filter is used to extract and smooth out the sinusoidal wave corresponding to the particular frequency. The filter, described by Eq. (6), produces the value of the current at any point in time, t, even between the samples delivered by the integration rule, which are represented by the sequence2 id(k • At) for k = 0,1,2,...; where At is the sampling span or integration step. 2 In our case, the sum spans up to the last sample produced by the simulation —a finite sum, but the infinite span was kept in Eq . (6) above as an indication of the distortion incurred when handling a finite number of samples—, and the cycle calculated by filtering was chosen as close as possible to the centre of the sequence. 3. Integration Rules in OVNI 23 The distorted admittance (with respect to the exact one), in magnitude and phase, as produced by each of the five studied integration rules (trapezoidal, Simpson's, Gear's second order, backward Euler's, Calviho's second order [38]) is shown in Figs. 13 and 14. Amplitude Frequency Response 1 I 1 i 1 i i i , . i i i , i — (Simpson? j ; , i . -1 _i i L_ L • f • - -L u 1 i 1 r i i i i i i i ! 1 _ i - - - r~ " _ -4 -1 r - J " J " i f \ \ J-' . / , T / "I S» I * - r i i i i i i i i j . J i -1 " < r t r i i i T 1 l l 1 1 _ -L _i : i i _ _ J - - ' - i i i ~ r \ - A +--""' 1 1 1 r i n i i r T H IX Trapezoidal i N . 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 frequency 0/1, f/fNy Fig. 13: Frequency response, magnitude, for the rules: trapezoidal, backward Euler's, Simpson's, Gear's second order, Calvifio's second order. 3.4 Choosing OVNI's rule From the response depicted in Figs. 13 and 14, Simpson's rule, with zero phase shift and the closest to unity magnitude response, seems to be the best choice. Its magnitude response, Fig. 13, drifts toward infinity, however, at frequencies close to Nyquist's. In other words, Simpson's rule although apparently accurate, is unstable. This last statement needs to be bounded. Simpson's needs very small3 integration steps to remain stable (This, evidently, brings the significant high 3 As compared with the steps used by the other rules. 3. Integration Rules in OVNI 24 90-80-70-60 -> 5 0 " 40 -' 30 -20-10-0 ' -ioi-Phase Frequency Response I / / I 7 I / ' / BEulpi Gear tSimpson Trapezoidal 0.4 0.5 0.6 frequency 0/1, f/fNy Fig. 14: Frequency response, phase shift, for the rules: trapezoidal, backward Euler's, Simpson's, Gear's second order, Calvifio's second order. frequency components of the signal into the "finite" response region of the rule). In the single phase power system used to compare performance of the rules in §3.6, Simpson's rule needed up to ten times smaller integration steps than the other rules in order not to go ballistic. Simpson's is thus disqualified. Gear's second order rule, while maintaining a more even magnitude response along the spectrum, introduces a relatively large magnitude distortion at the most important low-frequency range, fig. 13. Even worse, Gear's rule shifts the different frequency components by a different amount along the time axis, see Fig. 14, distorting thus the shape of the wave, and smoothing out abrupt changes, or even creating false spikes on its own; see §3.6. Gear's rule is also eliminated. Three rules remain to be reviewed: Calvifio's second order, trapezoidal, and Backward Euler's. 3. Integration Rules in OVNI 25 3.4.1 Calvi f io ' s second order rule This rule merits a separate section. It combines a closer to ideal response for the most important low frequency components, both in magnitude, and in phase shift. Overall, however, it reaches the 3% error at about the same frequency as Trapezoidal, and so it imposes the same integration step on the simulator for this accuracy limit. At the same time, the rule raises the computational burden of the simulator by up to three times, increasing effectively the computation time per step. In a case like the one in Fig. 11, where the rule's computational costs accounts for 15% of the total integration time per cycle using trapezoidal rule, the percentage used by Calvifio's rule —assuming that the rest of the simulation process remains unaffected— could reach 35% of the cycle. And the whole cycle would then consume 30% more time. The non zero phase shift of this rule endows it with power loss characteris-tics and improved stability, same as Gear's, or B.E. However, its non straight line phase characteristic penalizes it with the same distortion as Gear's when the integration step is not kept reasonably small: uneven frequency component shifting along the time axis. 3.4.2 Trapezoida l versus backward Euler ' s Trapezoidal and backward Euler's rules show a different strength each: trape-zoidal has an ideal zero phase shift, but the magnitude response of backward Euler's is significatively better, as witnessed by the relative magnitude error plot in Fig. 15. Now we turn our attention to the weaknesses of those two rules. For the trapezoidal rule, take the voltage/current equation for an inductor, Eq. (4), and integrate it along the interval (t — At,t), Eq. (7) The right hand side is an exact definite integral, after approximating the left (7) 3. Integration Rules in OVNI 26 Relative Error 0.2 0.3 frequency 0/1, t/fNy Fig. 15: Error in magnitude introduced by trapezoidal and Backward Euler's rule, up to 40% of the Nyquist's frequency. hand side with a trapezoidal rule area [3]. v(t) + v{t - At) At = Li(t) - L i ( t - At) (8) Assuming that the Z-transform of voltage v(t) and current i(t) in the inductor are V(z) and I(z) respectively, Eq. (8) can be written in the Z-transform domain [39]. o r V(z)[l + z-l] = £l{z)[l-z-i] The impedance transfer function in the Z-domain is (9) Z{z) V{z) 2Lz-\ (10) I(z) At z + 1 with a pole at p = —1. But that pole, once inserted into the natural or transient discrete time response of Eq. (11), shows an oscillatory never decaying response. This phenomenon was identified by [43, 19] and labelled critical unstability. 3. Integration Rules in OVNI 27 n(k) = C.pk fork = 0,1,2,... (11) Marti and Lin [19] identified the problem and buttressed the trapezoidal rule with an intelligent switching to the more stable Backward Euler's, albeit only when those critical undampened oscillations were detected, and only for two integration steps. That procedure, Critical Damping Adjustment (CDA), is the standard arrangement in EMTP solutions today. The price for the added stability, however, is too high for real-time simulations, the integration step where CDA is found necessary incurs in twice as many computations as a regular step. So, it seems CDA is out of the question in our quest. Finally, we consider the Backward Euler's rule apparent liability, its non zero phase shift response, Fig. 14. Traditionally, that phase response has been asso-ciated with the same sort of distortion produced by Gear's rule; i.e., wave shape distortion produced by uneven "lateral" displacement of the wave's frequency components along the time axis. In what follows, we will see that that assertion is not quite correct. Figure 14 shows that B.E. shifts each frequency component by a different angle, but let us look more carefully into it. The component at frequency / , according to Fig. 14, is shifted by an angle 9 given by Eq. (12), but this 9 phase shift is displacing the component a certain amount of time to the right on the time axis; i.e., the component is being "delayed" by 5 seconds. To translate 9 into <5, it is necessary to keep in mind that the time span equivalent to one degree in a fundamental frequency component corresponds to three degrees in a triple frequency component, and so on with higher frequency components, as in Eq. (13). 0=J-9O° (12) JNy i = x . 9 0 » . J L = i = as) /„„ 360° 4 / w „ 2 3. Integration Rules in OVNI 28 In other words, every frequency component is shifted the same amount of time, S — At/2. Conclusion: The wave shape should not suffer on the account of the phase shift alone. The effect is only to delay the wave by one half the integration step. To validate experimentally this conclusion, and using the same circuit arrangement as for the frequency response, each frequency component actual time delay was determined and plotted in Fig. 16 for an integration step At = 50 ps. The deviations from the predicted 25 ps stems from the 2,880 samples per cycle used to represent every frequency component. The difference between backward Euler and Gear's rule is that the latter's phase characteristic is not straight line crossing zero at DC. Every rule with a "curved" phase response will suffer the same distortion penalty as Gear's. That is not the case with Backward Euler's Rule. Backward Euler introduced delay at Dt=50us 25.21 1 1 1 1 , 1 1 r- 1 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Irequency 0/1,1/fNy Fig. 16: Time delay introduced by backward Euler's rule at each frequency up to Nyquist's. There are still, however, a positive and a negative side to the non zero phase response of B.E. 3. Integration Rules in OVNI 29 3.4.3 Backward Euler's, a "lossy" rule An important implication of backward Euler's phase response, Fig. 14 is that the equivalent admittance of the inductor, as represented by the rule, has not only an imaginary part, but a real part as well. The rule represents the inductor by an inductor in parallel to a resistor. In other words, the rule's representation of the inductor (and of the capacitor too) incurrs in active power losses not present in the actual circuit. It may be said [39] that that power drainage is responsible for the absolute stability of this rule: it dampens out an otherwise never dying oscillation. But those power losses also subdue somehow the different frequency components of the wave. It can be shown [39] that the trapezoidal rule represents an inductor L, by an equivalent approximate inductor Le whose value depends on the frequency L ^ ) = L - uAt/2 ( 1 4 ) Along the same lines, backward Euler's rule represents the same inductor L by a parallel arrangement of an equivalent inductor Le with the same value as the approximate inductor introduced by the trapezoidal rule above, in Eq. (14), but with the addition of a parallel resistor Re with the value fl, = ft (15) Observe that the parallel resistor value in Eq. (15) does not depend on the frequency of the signal, the way the equivalent inductance Le in Eq. (14) does. It follows that the rule drains from each frequency component a power that is proportional to the square of the amplitude of the voltage component; i.e., "smaller" components get less damped that "larger" ones. It is this lossy characteristic that is responsible for reducing the "spikiness" of the response, not the phase shifting. The end result is absolute stability and reduced numerical spikes. The physical spikes in the response do not get masked, or shifted, the way Gear's rule does, they are slightly damped by the 3. Integration Rules in OVNI 30 lossy characteristic of the rule. See the simulations in § 3.6. 3.5 Improved performance of OVNI and backward Euler's Summarizing, backward Euler's rule is more stable and its magnitude response is more accurate than the contender's. If the ^ time delay is tolerable, which was the case in the simulations run to validate OVNI, backward Euler's rule improves the overall performance of the simulator like this: • The number of floating point operations necessary to update some sources4 becomes null, considering that such updating accounted for 15% of the simulation time during each integration step for the case in Fig. 2, the benchmark case I, the performance improvement in this updating stage is (16) nc + nL where nc is the number of capacitors, and ni the number of inductors in the circuit. • More importantly, as the 3% magnitude distortion barrier is reached by backward Euler's at a frequency 50% higher than the one at which trape-zoidal reaches 3% error, Fig. 15, the integration step can be 50% larger for the same amplitude distortion, stretching thus the real-time deadline and the performance requirements of the final algorithm. This produces the equivalent effect of a fifty percent performance improvement on the original algorithm. 3.6 A single-phase power system test case To observe each of the rules at work, the simple single-phase reduced power network in Fig. 17 was solved separately with each of the rules. The simula-tion proceeded at5 At = 50 /xs, up to 40 ms. At t = 17 ms the receiving end 4 Associated with capacitive elements. See chapter on models, 4. 5 For all the rules, except Simpson's. 3. Integration Rules in OVNI 31 of the transmission line is shorted by the switch illustrated. As a reference, the simulations produced by the EMTP with critical damping adjustment, for 50 us and for At = 70 /xs are included in Figs. 18 and 19. Those two figures show the voltage at nodes flag and glen.6 It is interesting to observe how the EMTP+CDA solution deteriorates when changing the integration step from 50 to 70 /is, Figs. 18 and 19, which does not happen so drastically, as expected, for the plain backward Euler solution, Figs. 22 and 24. Fig. 17: Single phase power system with a short circuit on the receiving end, to test the different integration rules. Simpson's rule proved unstable when At = 50 /J,S was used. It was necessary to reduce the integration step to five microseconds to obtain stable results, at least up to 40 ms. The results obtained with each of the four rules are presented in the or-der from higher "spikiness" to lower: Simpson's, trapezoidal, backward Euler's, Gear's. The curves in Figs. 20 up to 24 illustrate the material exposed in the first part of this chapter. From Simpson's extreme unstability and spikiness, to Gear's phase distortion smoothing of the actual physical spikes (and introduc-tion of false ones). Finally, in Fig. 24, to illustrate the increased magnitude accuracy of B.E., the system is solved at At = 70 ps. Compare those results with the ones in Fig. 22. 6 Voltages for the same nodes (with no additional labelling) are presented for the other rules in Figs. 20 to 24. 3. Integration Rules in OVNI 32 v[GLEN](d[FLAGK1) f l a g , ' •• • : h M f / \ \ ! . ! 5 1 0 1 5 2 0 2 5 3 0 3 5 T i m e ( m s ) Fig. 18: Solution obtained by the EMTP with the CDA option activated with an integration step At = 50 fj,s. Fig. 19: Solution obtained by the EMTP with the CDA option activated with an integration step At — 70 us. 3. Integration Rules in OVNI 33 Simpson's Rule al Dl = 5us 800 15 20 millisec Fig. 20: Simpson's rule solution with At = 5us. Voltages at all the nodes in the network in Fig. 17 800 Trapezoidal 15 20 miilisec 35 40 Fig. 21: Trapezoidal rule solution with At = SOps. Voltages at all the nodes in the network in Fig. 17 3. Integration Rules in OVNI 34 Backward Euler 8001 15 20 25 millisec Fig. 22: Backward Euler's rule solution with At = 50/xs. Voltages at all the nodes in the network in Fig. 17 Gear's 2nd Order 600 400 2001 ! oi -200 -400 -600 -800, — 1 — — 1 ' '\ 1 1 / ~ \ ' / 1 I ' \ ' ' / / 1 ' \ /i / V V 1 I \ ; \ if \ 1 1 / 1 / / / \ \ ii - - \ 1 / \ 1 i i 1 \ i i 1 -i 10 15 20 25 millisec 30 35 40 Fig. 23: Gear's second order rule solution with At = 50/xs. Voltages at all the nodes in the network in Fig. 17. 3. Integration Rules in OVNI 35 Fig. 24: Backward Euler's rule solution at an expanded integration step. At = 70 u-s. 4. DIGITAL SOLUTION, ELEMENT MODELS 4.1 Solution versus Simulation In the context of this thesis, solution of a network is a one-time-point issue,1 and simulation of the same network is an effort related to a sequence of time-points. To solve an electric2 network is to establish by whatever means, empirical or computational, the voltages in the nodes of the network, and the currents in the branches between those nodes. In a work of the nature that occupies us here, the method will be, of course, computational. To simulate an electric network is to solve the network along a segment of the time axis. This process, by force of the tools selected, is discrete3 in nature. To simulate the network is then reduced to solving it at a certain convenient number of points along the time interval of interest. 4.2 General purpose ODE-solvers Once digital simulation is agreed upon (versus TNAs analog one), the process becomes one of solving the differential equation set that represents the behaviour of the network along the corresponding time interval. It is at this point where a question arises naturally, whether a regular all-purpose differential-equation-solver could do the job. After considering the tedious and error prone task of putting together the tens, hundreds, or perhaps thousands, of equations, 1 The author is familiar with the standard use of 'solution' as applied to the closed form time expression of voltages and currents in the network, when such a closed form analytical expression is obtainable. In this work, however, solution stands for time-point solution, which lends itself to the discrete-time nature of the process to be implemented. 2 In this report, no difference is made between electric and electronic circuits. 3 As opposed to continuous simulation, like the ones obtained with T N A s , analog simulators. 36. r 4. Digital Solution, Element Models 37 and feed those equations to a differential-equation-solver, the answer begins to outline itself. Furthermore, a minor modification in the network could imply a major change in the set of equations. When, even after surmounting the equation building difficulty, a generic DE-solution algorithm was put to the test, simulation times obtained (even for moderate-size systems) fell well behind those delivered by the EMTP, and abysmally far behind from the deadlines imposed by real-time simulation under the bandwidth targeted. This result should come as surprise to nobody, considering the task at hand. sys-1 vWjirm_ FAUL1 250 km 150 km BUS1 coupled FAVL2 coupled M Q V S I •f* BUS3 BUS4 500 k V sys-2 BUSS Fig. 25: A test case for relay testing. As a sample of the performance aimed at, one of the benchmark test cases for OVNI, the target network for protective relay tests, Fig. 25, represents solving a set of forty differential equations coupled in forty unknown voltages, and doing so in less that thirty microseconds4, a very demanding task indeed. 4.3 D i sc re t i z ing the Network , not the Equat ions Granted the need for a completely new tool, one faces the sometimes formidable job of putting together the set of coupled differential equations that describe the electric network (same as for a generic DE-solver), and then discretizing the equations through some convenient integration rule, according to what was said in the last chapter. The inversion of those two steps, starting point of OVNIs algorithm, was introduced by Prof. Dommel [3]. First, discretize each 4 To allow for the necessary hardware communication overhead. 4. Digital Solution, Element Models 38 element, or rather its voltage-current characteristic equation. Then, represent the discretized v-i equation by a convenient array of resistors and sources. And finally, assemble the network using those discrete-time models for each of the original elements, see Fig. 26. integration "discrete" network N E T W O R K E L E M E N T S volt-curr. characteristic for the element. discrete-time (sources and R's). Fig. 26: Discret izat ion process. The resulting discretized network contains only resistances and sources, re-gardless of the original nature of the elements. Putting together the discretized network, and building the corresponding network equations becomes an issue of elegant simplicity. The manner in which an element model is developed is outlined in the fol-lowing section for one element, as an example. 4.4 Discrete-time model for an Element [3] The discussion [3] in this section (§ 4.4) belongs in an appendix, but, given the flow of ideas in this discussion, it was included in-line with the rest of the text for the convenience of the reader. To illustrate what was just said in the previous section, let us consider an element, a linear inductor, Fig. 27a, and put it through the process outlined above, Fig. 26. The v-i equation for that inductor, relates the voltage across the inductor, v(t), with the current through it, i(t), as in Eq. (17). Integrating both sides of this last equation along the time interval between t — At and t, we obtain 4. Digital Solution, Element Models 39 V(t) m—t—TYYs—z n i(t) Fig. 27: a) Lumped inductor, and b) its discrete time domain model corresponding to the trapezoidal integration rule. Eq. (18). v(t) = Ld-M (17) t I t v(t)dt = L.i(t) -L-i(t- At) (18) t-At If a numeric integration rule, let us say backward Euler's, is used to approxi-mate the left hand side, and reorganizing the terms, the current in the inductor at the end of the interval, i(t), appears as a function of the voltage across the inductor at the same point in time, v(t), and the values corresponding to the initial point of the time interval (t — At), that is, to the history of the inductor, Eqs. (19) and (20).. i(t) = ^ -v{t)+i{t- At) (19) E i(t) = g • v(t) - h(t) (20) But this last equation describes the current in the inductor as the sum of a current proportional to the voltage in the inductor with a historic current, or in circuit form, that the inductor behaves like a resistor with a conductance of At/L in parallel to a current source, h(t), that depends on historic values: a history source, Fig. 27. Granted the relative compactness of the discretization and modelling process for the linear inductor, doing the same for some network components have proved to be tasks challenging enough as to be the central 4. Digital Solution, Element Models 40 topic of doctoral theses in their own right [44]. OVNI is expected to grow that way, along the years, but to furbish its two probing tasks of equipment testing (protective relays and controllers for high-voltage-direct-current converters) a basic set of streamlined discrete-time models was included, as reported in the next sections, and in chapters 9, 10, and 11. Two groups of elements, lumped and transmission lines, have been borrowed, adapted, streamlined and optimized to take advantage of OVNI's architecture, from the ubiquitous EMTP, all other elements have been developed specifically for OVNI. 4.5 Basic models in the prototype Once the main tasks of the simulator are introduced in the next chapter, it becomes evident, in the case illustrated in Fig. 25, that element models are re-sponsible for 14.7% of the total time of simulation. OVNIs core stands on its Own, separate from the element models. However, to test the core for its benefits and liabilities, it was necessary to furnish that core with a few basic element mod-els, namely: resistors, inductors, capacitors (both linear and non-linear ones), single-phase and multi-phase transmission lines (both models differ significantly, the first one is not a particular case ofthe latter), metal-oxide-varistors (MOV), single-phase transformer units (including the modelling of their core saturation), three-phase transformer units (with modelling of saturation produced by zero sequence set of magnetomotive forces), HVDC rectifying modules and their cor-responding firing angle controllers, and switching operations5. Given its final use, those basic models are streamlined and optimized in its execution to deliver maximum performance. Implementation of those models within the frame of high-pluggability6, for OVNI, is an issue in itself described in detail in a later chapter. 5 Switching operations are an intrinsic function of the core. 6 The convenient removal of an obsolete model, and substitution with a better —more accurate or faster— one. 4. Digital Solution, Element Models 41 4.5.1 O n N o t a t i o n In what follows the element under study is connected between nodes k —initial node— and m —final node—. Time advances in discrete steps of fixed and pre-determined size At. At the end ofthe current step, v(t) is the voltage across the element and i(t) the current through it. The values v(t—At) and i(t — At) corre-spond to the end of the previous step (which are known, of course). The models listed in the following sections correspond to the backward Euler's integration rule. Expressions corresponding to the trapezoidal rule are obtained readily applying its approximation to the integral on the left-hand side of Eq. (18). 4.5.2 L u m p e d Elements [3, 4] The resistor is simply represented by a resistance between k and m. The lin-ear inductor and the linear capacitor are modelled by the equivalent circuit in Fig. 27b. The parameters g (equivalent discrete conductance), and h(t) (history current source) in that figure are given, for backward Euler rule, by Eqs. (21) for the inductor. At 9 L = T hL(t) = -i(t-At) (21) But from Fig. 27b, the history term h(t) can be written in terms of the inductor voltage at the previous time step, as h(t) = h(t - At) - g -v(t - At). For the capacitor, the same model in Fig. 27b is obtained, but with the parameters given by Eqs. (22). C 9 C = At hc(t) = ^-v(t-At) (22) From Fig. 27b and equations (21) and (22) it is seen that the behaviour of the model depends on the element state at the previous step: its history, h(t). 4. Digital Solution, Element Models 42 The equivalent conductances corresponding to the trapezoidal rule are given in Eq. (23). At 9 L = 2L 9c = ft (23) The history values corresponding to the trapezoidal rule of integration (rule which is used in the DSDI procedure, to be introduced in chapter 7) were sim-plified by Martiin [45] as hL(t) = hL(t - At) - 2gL • v{t - At) (24) hcit) = 2gc-v(t- At) - hc{t - At) (25) To update the history source value hs(t), with this simplified model, it is only necessary to keep track of the previous value of the source hs(t — At), since the voltage across the element is to be calculated at each time step anyway. 4.5.3 Transmiss ion Lines [3, 5] Transmission lines and their models are at the centre of OVNI strategies to exploit the network sparsity, as will be seen in chapter 5. Given the distributed parameter characteristic of the power transmission line, modelling it is not as straightforward as for lumped L and C elements. In what follows, it is assumed that the line parameters are independent of frequency, a necessary compromise between performance and accuracy adequate for a large number of applications [46]. It will also be assumed that both inductance and capacitance are uniformly distributed along the line [47]. The per metre values for those parameters are: L, in H/m; C, in F/m. Shunt conductance is assumed negligible and series resistance is treated as lumped into two loss-equivalent resistances at each end of the line. Each of those resistances is equal to one half the total series resistance of the line. If R, Vt/m, is the series resistance per metre of the line, and I the 4. Digital Solution, Element Models 43 m k HT/2k--—tyvV-c A A /oss/ess line vk m T"1 m =—VA—: m m Fig. 28: Lumped losses in the transmission line model. total length in metres, the total series resistance is RT = R • l- The previous simplification leaves a lossless transmission line surrounded by two RT/2 resistors as in Fig. 28. 4.5.3.1 Lossless Single Phase Transmission L ine M o d e l Dommel demonstrated [3] that the single phase lossless transmission line in Fig. 29 can be represented by the equivalent circuit in Fig. 30, where Zc = y/L/C is the surge or characteristic impedance of the line, in f2. History sources hm(t) and hk(t) depend on the voltage and current at the other end of the line r seconds before [3] —r = / • VLC is the travelling time of the line, in seconds— according to Eqs. (26). vm{t - T) . . hk{t) = + im(t - T) hm(t) = Vj^f^-+ ik(t - T) (26) That is, the behaviour of this model depends on the state of the line r seconds before: its history. This model remains applicable to lines whose length is such that r > At. The model is exact, it does not depend on the selection of numeric integration rule since none is used. A decision that affects the accuracy of this model is that of the interpolation scheme for cases where r is not a multiple of A i . 4. Digital Solution, Element Models 44 'k ^ lossless line 'm m K m Fig. 29: Single phase lossless transmission line. Fig. 30: Single phase lossless transmission line model. 4.5.3.2 Lossy Single Phase Transmission L ine M o d e l Combining the model in the previous section with the lumped resistances pro-posed in Fig. 28, one arrives at the model sketched in Fig. 31. If the history current sources in Fig. 31 are transformed into equivalent voltage sources, the circuit becomes the one shown in Fig. 32. The history voltage source is, for node k ek{t) = vm{t -r) + Zc- im(t - T) (27) me k-k—MA m- Rt/2 A M — m <-Fig. 31: Lossy single phase transmission line. 4. Digital Solution, Element Models 45 Fig. 32: History voltage source equivalent circuit. It depends upon the voltage of the fictitious node m'. To reduce the workload of the simulator it is convenient to hide this node (as well as node k', on the right side) inside the model. Voltage at ml can be written / R v m ( * ~ r ) = vm(t ~T)~ — • lm(t - T) Substituting Eq. (28) into Eq. (27) we finally obtain R e*(t) = vm(t - T) + Ze- im(t - T) (28) (29) with an analogous expression for em(t). Converting the voltage sources back into current sources, the complete lossy line equivalent circuit of Fig. 33 is obtained, where the history current sources are given in terms of historic values of current and voltage at the real nodes of the line according to Eq. (30) and Eq. (31). 'k 'm k 1 1 I 1 :—m «-— Fig. 33: Lossy fine equivalent circuit. hk(t) hm(t) ~ tm[t r)+ ^ zc + % 1 Z + Ei-z/ c -r 2 vm{t - r) vk{t - r) (30) (31) 4. Digital Solution, Element Models 46 4.5.3.3 Multi-phase transmission line If the two ends of an n-phase transmission line are named k —the sending7 end— and m 8 —the receiving end—, the state of the line is given by two vectors of voltages [vk(t)] and [um(*)] and two vectors of currents and [im(t)]. The parameter characterization of this line includes two full matrices of size nxn, one with the inductances per metre, in H/m, [L]; and another with the capacitances per metre, in F/m, [C], [47]. If the phase quantities given by the four vectors in the previous paragraph are transformed according to Wedepohl's [48] modal component transformation (Eqs. (32)), two vectors of modal voltages [Vk(t)] and [V (^t)] —one for each end of the line— and two vectors of modal currents [Ik{t)\ and [im(t)] —same as with the voltages— are obtained where transformation matrices [S] and [Q]9 depend on the physical configuration of the conductors in the line [48]. The modal transformation diagonalizes the matrices [L] and [C], [49], into matrices [Ld] and [Cd]. Voltages and currents for each mode are related in the same way that voltages and currents in the single-phase line are related [3, 48]. An equivalent circuit can be established for each mode like the one in Fig. 34, where Vki = voltage of mode i at sending end k. Vmi = voltage of mode i at receiving end m. 7 The names sending end and receiving end have historical roots in times when power networks used to be mostly radial. 8 Actually both k and m are vectors whose entries identify the individual nodes on each end of the line. 9 In O V N I these matrices are determined in a preprocessing step (i.e., outside the real-time loop) by M T - L I N E , part of the Microtran suite. [Vm(t)} lh(t)} [Ut)\ [S\-lMt)] [S\-l[Vm{t)) [QWikit)] [Q)-l[im(t)] (32) 4. Digital Solution, Element Models 47 177* * 1 1 / » „ , i 1 ™ < 'ki vki mi | | * /m/ ci vmi Fig. 34: Equivalent circuit for mode "i". Iki = current of mode i at sending end k. Imi = current of mode i at receiving end m. ZCi = characteristic impedance for mode i. Hki = history current source on sending end k for mode i. Hmi — history current source on receiving end m for mode i. In terms of and C ^ 1 0 , the characteristic impedance for mode i is z« = Vl <33> The speed of propagation for waves of mode i along the transmission line is y/LdiCdi ^ ^ from which it follows that if / is the total length of the line, the travelling time for mode i is n = — = I • yjLdiCdi (35) History current sources Hki and Hmi depend on modal current and modal voltage at the other end of the line T* seconds before according to Eqs. (36) and (37). Hki(t) = V m i { t ~ T l ) + Imi(t - n) (36) Hmi(t) = V k i { t ~ T i ) + Ut - n) (37) 1 0 The i-th element in transformed inductance and capacitance diagonal matrices [Ld] and 4. Digital Solution, Element Models 48 Equations (36) and (37) define the entries of two modal-history-source vec-tors, one for the sending end [Hk(t)] and another for the receiving end [Hm(t)]. These two vectors are transformed back to the time domain through the corre-sponding inverse transformation, two history current source vectors are obtained for each phase —one for each end of the line—. [M*)l = [Q][Hk(t)\ (38) [hm(t)} = [Q][Hm(t)] (39) Applying the same inverse transformation to the decoupled modal-characteristic-conductance matrix [Q? (40) the full [g] matrix is obtained. Matrix [g] is the transmission line contribution11 to the network bus conductance matrix [G] in Eq. (45). In the phase domain, the multiphase transmission line can be visualized by the vector/matrix-parameter equivalent circuit in Fig. 35. [g] = [Q] l/Zcl 0 ••• 0 0 i / z c 2 . . . 0 0 0 Fig. 35: Multiphase transmission line model in phase-domain, [g] is a matrix, all the other parameters are vectors. At both ends of the line. 4. Digital Solution, Element Models 49 4.5.4 Single-phase non-linear core Transformer A new simplified model for a single phase transformer with a non-linear mag-netic core whose characteristic has been piecewise linearized was prepared for this project. This model does not consider the frequency dependency of the transformer's characteristics like the one developed by Suthep and Marti [50], whose incorporation into OVNI is part of an ongoing effort. The complete description of this model is included in chapter 9, along with that of the HVDC module created within the frame of this project as well. 4.5.5 Three-phase non-linear core Transformer A combination of three single phase transformers modelled according to §4.5.4 provides the flexibility necessary to describe any connection group. In particular, inside the HVDC module to be described in chapter 9, two groups are detailed, namely YyO and Ydll . The three phase model is more than a conglomerate of single phase models. It incorporates the effect of zero sequence flux linkages in the magnetic circuit of three phase units. The complete description of the saturation modelling, for positive, negative, and zero sequence flux linkages, is postponed until chapter 11. 4.5.6 Switches Along the simulation, some time steps bring more computational burden to the simulator than others; namely, those steps when a topological change in the network occurs. That is, when a switch or set of switches operates. Since all steps need to be of the same length, it is the computationally longest step (CLS) the one that defines the real-time bandwidth of the simulation. OVNI goes to great lengths to reduce the size of that longest step, CLS. For the solution method chosen, as described in chapter 5, the topology of the network is described by certain matrices and either their inverses or their LU decompositions. When a switching operation occurs, it is necessary to rebuild and invert (or triangularize) those matrices, an expensive process. 4. Digital Solution, Element Models 50 Switches i n O V N I are represented in one of three different forms, depending on the necessities of the simulation: as an ideal switch, wi th infinite impedance when open and zero impedance when closed; as a low-high resistance branch; or as a l ink between two M A T E sub-blocks (See chapter 5). 4.5.7 H V D C Modules To allow for the fast-switching network modelling targeted in chapter 2, high voltage direct current converters modules are included in O V N I . gate firing signals gate firing signals 6 . M (b) Fig. 36: OVNIs HVDC module: a) detailed view; b) block view. To optimize the interaction between the rectifier or inverter group and the integrator, the model targetted a six-valve module, F i g . 36. The module includes the AC-s ide filters (11th and 13th harmonics [51]) , a three phase transformer (including saturation modelling), six valves (thyristor groups) wi th their cor-responding R C snubbers (used to model physical snubbers, not to compensate numerical issues), and a smoothing reactor. The description in detail of this model developed for O V N I , is postponed unti l chapter 9. 4.5.8 HVDC-current-loop Controller Even though the H V D C module model prepared for O V N I targets the testing of H V D C controllers, during the design and test of the H V D C module itself (par-ticularly its commutation failure modelling features) the need for some minimal-functionality controller became evident. A constant current loop, proportional 4. Digital Solution, Element Models 51 integrative controller was prepared and optimized, and its details are described in chapter 10. 4.5.9 Metal Oxide Varistors (MOV) In the series compensation modules included in the test case for protective relays shown in Fig. 25, metal oxide varistors (MOV) are connected in parallel with the series capacitors as a protection against overvoltages. To represent the freezing effect of the voltage across the protected condenser when that voltage reaches the knee value is accomplished by a computationally very efficient tactic12: let us consider the capacitor's voltage current relationship, which can be integrated on both sides along the time axis between the points (t — At) and t, approximating the integral with backward Eulers Rule: i(t) -At = C • v(t) -C -v{t- At) (42) i(t) = ^t-v(t)-^-v(t-At) = g-v(t)-h(t) (43) As was seen in a previous section, this last expression can be represented as a circuit by the parallel of a resistor with conductance g, and a current source h(t), whose value depends on the previous voltage of the capacitor, v(t — At), Fig. 27b. Also, from Eq. (42), the voltage can be written as v(t) = + v(t - At) = ^ + v(t - At) = f • i{t) + £ • h(t) (44) This last expression implies the expected result that under a constant current i(t) = K, the voltage grows linearly. It also implies that, still under constant current, if one refrains from updating the history source, h(t), the voltage does not change. 1 2 Backward Euler's rule is used in this section. 4. Digital Solution, Element Models 52 MOV v(t) under constant current knee c discretization 9 conditionally updated history source voltage clipping effect time Fig. 37: Modelling the voltage clipping effect of the MOV. The voltage clipping effect of MOVs is then simulated simply by checking the voltage across the protected condenser, and, if the voltage has reached the knee-value for the varistor, skip the updating of the corresponding history source. If anything, the activation of the varistor will reduce the execution time of the corresponding integration step, albeit by a minimal amount. 4.5.10 Measuring Transformers, ITs It is not what happens in the network, but what the instrument transformers make of it that determines the reaction either of the protective relay, of the HVDC controller, or of any other monitoring device. Hence, it is essential to model accurately the non-linear characteristics of those transformers. Apart from the special case of ferroresonance, measuring transformers have no impact on the solution of the power network [52]. It follows that the network can (and is) solved apart from the current and voltage instrument transformers. After that, the currents and voltages in the network are put through the men-tioned transformers-non-linear characteristics to obtain the output which will be amplified for the monitoring or controlling devices to see. At first, this decoupling between the network solution, and its instrument transformers' suggested the possibility of modelling the IT's on separate pro-cessing units, perhaps DSP boards. However, given the impressive improvement 4. Digital Solution, Element Models 53 in processing speed provided by the hardware industry, and for the sake of sim-plicity and maintainability, it became evident the convenience of running the IT's models not as special processes, but as integral parts of the main solution mechanism. Two non-linear models were created for this project, as reported in [53]. The details of those models, one for current transformers, and another for potential transformers and CCVTs, are detailed in chapter 8, in the part on new element models developed during this project according to OVNI's guidelines for models construction. 5. SEGMENTATION AND OVNI 5.1 In t roduc t ion The solution adopted in this project is presented in stages. First, without con-sidering either node hiding, Topological Segmentation, or MATE's Segmentation. Then Topological Segmentation, followed by MATE Segmentation, and finally Node Hiding. 5.2 The Tasks of the Simulator Once the original network has been conveniently discretized into a DC-resistive network, as was seen in the previous chapter, the simulation proper begins. A modified nodal analysis method [54] was selected as the framework on top of which the solution algorithm proceeds. At each integration step five stages or tasks can be identified, see Fig. 38. 1. Updating History and External Sources. Even if all sources in the dis-cretized network are DC during each integration step, most sources change value from step to step. Some change according to an external rule, ex-ternal sources. Others obtain a new value that depends on the previous history of voltages and currents in the elements whose models those sources are part of, history sources, as was seen in the last chapter. It follows that at each time step all sources need to be updated: external sources, accord-ing to their external rule, and history sources, by the elements themselves, according to their own internal rules. 2. Accumulating Nodal Currents. As a first approximation, to simplify the first description of the solution method, for the time being let us waive the 5"t 5. Segmentation and OVNI 55 acknowledge swiching eventi (c) solve for node voltages (d) output (e) <J) < ^ " ^ ) Fig. 38: Tasks in OVNI's simulation cycle. two-layer segmentation scheme as well as the node hiding technique1. Also, in this first discussion, let us assume that all voltage sources have been transformed into equivalent current sources through multi-phase Thevenin's to Norton's equivalents conversions. The next step toward the solution of the network at this time step is to add up all the current sources into nodal currents, in vector [ha] in Eq. (45), where a is the total of nodes in the network. In what follows, subscripts indicate the dimensions of arrays. [Goa] M = [ha] (45) 3. Handling Topology-Changing Events. The simulator acknowledges events that produce changes in the topology of the network during the current 1 Both to be described later in this chapter. 5. Segmentation and OVNI 56 integration step and rebuilds the discretized network conductance matrix [GQQ], according to switch positions and to the status of any other topology changing device —diodes, thyristors, piecewise nonlinear elements. 4. Solving for Nodal Voltages. Finally, solve Eq. (45) for the nodal voltages [va]. This step involves either the LU-decomposition or the inversion of the [Gaa] matrix, and correspondingly, backward substitution or matrix multiplication applied to the nodal current vector [ha\. The first part 2 can be skipped in those integration steps where there is no topological change detected in task (3) above. 5. Outputting Results. Make the requested voltages and currents available for output at the corresponding data ports. Submitting a first non-segmented implementation of the tasks listed above to a profiler, and using test case RT-092, see Fig. 11, it was found that the simulation step execution time was partitioned as follows: • Updating history sources, 14.7 %. • Accumulating Nodal Currents, 19.6 %. • Updating Topology and Solving for nodal voltages, 65.8 %. This partition of the execution time shows that tasks (3) and (4), updating topology and solving for nodal voltages, are the ones taking the lion's share (almost two thirds) out of the simulation loop time. In this work, a significant effort has been expended to improve the performance of these two tasks, not only from an algorithmic point of view but also at the implementation level. In this context, and to alleviate the computational burden of those tasks of the simulation3, let us now consider the precalculation of network matrices. 2 LU-decomposition, or matrix inversion. 3 A t the reduced price of moving much of that burden out to a preprocessing stage. 5. Segmentation and OVNI 57 5.3 P reca lcu la t ion of Network Matr ices To free the simulator of the enormous burden of matrix rebuilding and trian-gularization —or inversion— at every time step at which a topology change is detected —tasks (3) and (4) in section 5.2 on page 54—, precalculation and storing of matrices for every possible topology can be considered. The promise of this option, however, hits the wall of feasibility in a way better described by an example. Let us consider a 1000 node network that includes 1000 switches. The admittance matrix of this network, using double precision, occupies 1000 x 1000 x 8 = 8,000, OOObytes, that is, almost eight megabytes4 for a single topology matrix. Now, with 1000 switches, the network has as many as 2 1 0 0 0 possible topologies. If a matrix is to be precalculated and stored for each one of those topologies, it will need an amount of memory better described as follows: using high density DIMM 128 megabytes chips, at an average of 20 cm2 per 128 megabytes, the space it occupies in an average Pentium II motherboard5, and also assuming that all the surface of the Earth could be covered —oceans as well— with a single layer of such chips, the total memory on the Earth surface6 would then be in the order of 3.26 x 1019 megabytes. It would still be necessary to have 8.17 x 10301 megabytes, that is, 2.51 x 10282 Earth-sized planets so covered, to prestore every possible topology matrix for the network in question. While the sparsity of those matrices, as seen in section 5.5, reduces the necessary storage to about 0.4% of the original value, we are still left in need of 1.00 x 10280 Earth-sized planets so covered. Even under the sobering indications shed by the previous discussion, and to allow us to examine the prestorage possibility under a different light, it is 4 7.629 megabytes, since one megabyte is defined not as one million bytes, but as 2 2 0 = 1048576 bytes. 5 PCPartner VIB878DS Series. 6 Assuming that the Earth is a perfect sphere with radius equal to its equatorial and polar average: 6367 km (according to the Random House Webster's Unabridged Dictionary, 1996.) 5. Segmentation and OVNI 58 convenient to introduce a metric, the complexity metric. 5.4 The C o m p l e x i t y Index, a metr ic The computational effort of solving a network grows with the square of the number of its nodes, a. The memory requirements incurred to reduce that effort through precalculation of key network matrices grow with the power of two raised to the number of switches in the network, o. In this work, the complexity index of a network is introduced, and defined for coupled networks7 as follows ( = 2 f f x a 2 (46) For a network segmented into several decoupled subnetworks, the complexity index is defined as the sum of the complexity indices of each of its n subnetworks, each calculated as per Eq. (46). 71 ( = 2 " x a | + 2 f J x ^ + - + 2"n x ^ = ^ 2 f f ' x aj (47) In Eq. (47), i = 1, 2, 3, • - • , n identifies the corresponding decoupled sub-network. 5.5 Sparsi ty and the Solu t ion In general, most nodes in a power electric network are terminal to no more than three branches. This translates, for the discretized network, into a nodal analysis admittance matrix with an average of four non-zero elements per row8. As one considers larger networks (i.e, with a greater number of nodes) the sparsity of the matrix, defined as the percentage of null elements in the admittance matrix, grows. Using the first two sentences in this section as a guide, a network with one thousand nodes would have a matrix with an occupancy (the complement to 100 of sparsity) in the vicinity of 7 As opposed to networks consisting of several decoupled subnetworks. 8 Even for three phase coupled branches, the occupancy per row is still only in the vicinity of five. 5. Segmentation and OVNI 59 number of nonnull elm occupancy — x 100 = total number of elm 1 0 0 0 X 4 =0.4% (48) 1000 x 1000 A very sparsely populated matrix indeed, with a sparsity of 99.6 %. This enormous sparsity can be exploited to reduce the computational bur-den of the simulation, as well as the storage required, as described by Tinney [55]. The EMTP applies this technique in solving power electric networks [4]. However, the convenience of this very efficient storing algorithm is curtailed, at execution time, by an intense address-computation overhead. So, even with the time savings provided by skipping operations involving null elements in the ma-trices, timings fall short of the real time deadlines associated with the targeted bandwidth (as stated in a previous chapter). A different approach to exploiting sparsity is used in this project as described in this chapter and the next one. 5.6 Divide et Impera. Segmentation Roman general Julius Caesar, c. 100-44 B.C., advised divide et impera9. OVNI follows this advice to the letter. From the complexity index c, defined in section 5.4, it follows that a smaller (one with fewer nodes) and simpler (one with fewer switches) network can be solved more rapidly, and with a reduced allocation of computational resources. Not a surprising result. To meet the desired real-time deadline, using a two-layer segmentation process, OVNI breaks the original network into a set of smaller decoupled subnetworks, each one with fewer nodes and switches than the original one. The exponential dependency of c on the number of nodes a, and on the number of switches a, Eqs. (46) and (47), suggests the advantage of such segmentation process. A numerical example is in order. Consider the same 1000 node network with 9 Lat in for divide and rule, sometimes rendered instead as divide and conquer. 5. Segmentation and OVNI 60 1000 switches introduced in section 5.3. According to Eq. (46), the complexity index of that network is 10002 x 2 1 0 0 0 = 1.07 x 10307 If such network could be broken into 3-node pieces with 3 switches each (332 of them plus a 4 nodes/4 switches one), the complexity index of the segmented network would be, as per Eq. (47) 332 x 32 x 23 + 42 x 24 = 24160 The complexity index has come down by more than 300 orders of magnitude. Prestoring the corresponding matrices in double precision (8 bytes per datum) would require 24160 x 8 = 193280 bytes That is, less than 190 kilobytes! Admittedly, this segmentation example into 3-node subnetworks seems a bit forced, and optimistic, but it serves as an indication of the benefits to be gained through segmentation, and to bring precalculation back into the realm of feasibility. Besides, in the cases run to validate the different aspects of this project, it became evident that in three phase power networks many of the subnetworks obtained during the segmenta-tion process, to be described later, do have 3 nodes (a fact that is exploited in the implementation). Summarizing, segmentation reduces the size and the number of the matrices to be considered in the solution. But the question remains, how to segment the original power network? 5.7 T o p o l o g i c a l Segmenta t ion Figure 39 shows a typical power electric system, with power generation plants, load centres, and substations, all linked together by transmission lines. Electric signals travel along a transmission line at a speed close to that of light, but even at that speed, given the considerable length of these most visible parts of power 5. Segmentation and OVNI 61 Fig. 39: A typical power electric system. networks (very often in the hundreds of kilometres), electric phenomena at one end of a line does not reach the other end instantaneously. As an approximate numerical example, let us consider a 300 km transmission line; approximating the propagation velocity of signals on that line to the speed of light (and using c = 3x 108 m/s)10, also neglecting the differences in velocity of the different transmission modes as described by Eq. (35), one obtains the time delay with which the line passes a signal from one end to the other, r = 1 ms, the travelling time. But in our current bandwidth of interest, with integration steps of fifty microseconds, one millisecond equates to some twenty steps. That is, whatever happens in one of the areas in Fig. 39 linked by a 300 km transmission line will not have any effect on the neighbouring areas until twenty computational cycles later. Hence, the transmission line decouples the areas it links. An alternative way of visualizing this decoupling introduced by transmission 1 0 Given the approximate nature of this example, no more accurate value was used for the speed of light, c. 5. Segmentation and OVNI 62 Fig. 40: a) Simple single-phase power system; b) Discrete-time equivalent circuit for system in (a). lines in power electric networks, and the one that triggered the possibility in the mind of the author, is to take a simple power network with one single phase transmission line linking two areas as in Fig. 40a, and apply the discretization process outlined in the previous chapter to it, Fig. 40b. The decoupling intro-duced by the line is evident in the discretized network, where the line's model is effectively breaking the system into two blocks. In this work, block is defined as each of the parts into which the transmission link topology breaks the power network, see Fig. 41a. This topological segmentation breaks the original problem implicit in tasks (3) and (4) in section 5.2, into several smaller problems of the same shape as that represented by Eq. (45). The sparsity of the network is exploited by this segmentation scheme by the reorganization of the nodes according to the topology boundaries defined by the transmission lines as illustrated in Fig. 41b. It was observed that the size of those blocks ranges, for a typical power network, between 3 —the majority of the blocks— and 12, in multiples of 3 5. Segmentation and OVNI 63 Fig. 41: a) Power network topology; b) Corresponding conductance matrix [G]. sys-1 (E~th\\ 3ph Th. V _ / equivalent 250 km FAUL1 coupled fault 150 km BUSP FAUL2 8US2. \ coupled $US3 MUV 500 kV 100 km 3-phase Tlieveninl equivalei sys-2 ¥3 BUS5 BUS4 3-node block 3-node block Fig. 42: Relay testing case with blocks identified. nodes11. This simplifies the allocation of memory to the corresponding matrices in a way where memory address calculations are minimized, as discussed in the chapters dedicated to implementation details. For instance, the relay testing case in Fig. 42 exhibits two 3-node blocks, one 6-node block, and one 9-node block12. 5.8 T h e Need for Topological Independent Segmentation, forwarding M A T E [6] When one of the blocks introduced by topological segmentation in the previous section grows past a critical size (defined by its number of nodes, branches, and 1 1 Considering only those nodes which are not terminal to any voltage source. 1 2 W i t h line protection interruptors closed. This issue is dealt with through M A T E segmen-tation, as discussed later in this thesis. 5. Segmentation and OVNI 64 \ 1 » l . c . flLCM 3 - p n a M Ttmunm a q u i v a l a n l 1 1 ft ft \ 1 3 « n t e . S L C M "I. : 1 TTS ft ft ft ft Rfl f fl r j [ M fl m. n s n r Ov' i Fig. 43: A partial view of an HVDC-controller test case with two topological blocks. sources), as in the case of the HVDC-controller testing case depicted (partially) in Fig. 43, the need for a segmentation scheme independent on the presence of transmission lines becomes evident. The MATE concept (Multiarea Thevenin Equivalents) introduced in [6] provides a framework for arbitrary system subdivi-sion along any convenient connecting branches. The concept has been extended in this thesis to achieve maximum solution generality and maximum computa-tional efficiency. Instead of presenting MATE, the multi-area Thevenin equivalent segmenta-tion concept in its extended form, an introductory simple numerical example is described. In the next section MATE, in its basic form, is described more rigorously. Finally, MATE's relationship to Classic Diakoptics is established. In EMTP's original algorithm, ungrounded voltage sources were not in-cluded. To include an ungrounded voltage source (i.e., one not connected to the reference or ground node) we can attach to it an unknown current, Ix, and use the relationship between the voltages at the nodes of the source, as im-posed by the source itself, as an additional equation13 [54]. All of this, however, expands the dimension of the problem. 1 3 Additional to the nodal equations themselves. 5. Segmentation and OVNI 65 block a ) S i e m e n s ' r e f block b Fig. 44: Circuit with an ungrounded voltage source. Let us begin with the simple circuit in Fig. 44, with one ungrounded voltage source. Including the current ix through the voltage source among the unknown nodal voltages, va and Vb with respect to the reference node, the two nodal equations plus the v-source equation are presented in matrix form in Eq. (49). 2 0 0 5 1 -1 0 Va " 3 " Vb 7 _ 4 _ (49) If the voltage source were not present, the system would consist of two com-pletely decoupled blocks described by the upper-left partition of Eq. (49), as in Eq. (50), where the first equation describes the left-hand decoupled block and the second equation the right-hand one, blocks a and b in Fig. 44 respectively. (50) After multiplying the first row by the inverse of 2, and the second row by the inverse of 5, the unitary matrix appearing on the left hand side delivers the nodal voltages if the voltage source is not present. Let us call those voltages Ea and Eb respectively, which are but the Thevenin voltages corresponding to those nodes for each of the decoupled blocks. 2 0 Va 3 0 5 Vb 7 5. Segmentation and OVNI 66 Ea 3/2 _7/5_ If the same process of scaling each row is applied to the top two in the original Eq. (49), and then the two first rows are used to nullify the coefficients of the third row corresponding to nodal voltages, one obtains Eq. (51). 1 0 1/2 0 1 -1/5 0 0 -7/5 ' 3/2 Vb = 7/5 . 3 9 / 5 . (51) From the equation represented by the last row, obtaining the current ix through the voltage source linking the two otherwise decoupled blocks of the network is simple enough. Once so obtained, ix can be used to complement the Thevenin voltages of the nodes and produce the actual nodal voltages as in Eq. (52): [*«] (52) But any arbitrarily chosen conductor can be considered as a null voltage source. That source can be used both as a link that joins and as a boundary that separates any two parts of the network. Such connecting branches are called links in this work, and include, in general, a resistor Rx in series with a voltage source Vx (either or both can be null), as in Fig. 45. Va Ea 1/2" U 1 = 3/2 1/2" Vb Eb . _ 1 / 5 . I ' x J — _7/5_ . - 1 / 5 . "from" node-V "to" node Fig. 45: An OVNI's link. 5. Segmentation and OVNI 67 5.9 O n N o t a t i o n Before continuing, let us agree on a few notational issues. In what follows, the number of nodes in a network (or subnetwork) is a; also, nodes are identified in the global network by the first few letters of the alphabet, ab c— The number of links14 in the network is ip, and link branches are identified by the letters, j k I.... Uppercase letters stand for known quantities, lowercase letters for unknown ones. Magnitudes introduced by the segmentation process exhibit a curly hat. Physical quantities present in the original network are written without a hat. As for matrices and vectors, all vectors described are assumed to be column vectors; i.e. a row vector is indicated as a transposed column vector. Vectors display their dimension as a subscript. Matrices, also, carry their dimensions as subscripts in the order row first, column last. When a matrix is transposed, its subscripts change order. As an example, [Yaa} is a known admittance matrix of dimensions corre-sponding to the total number of nodes in the network, a; as it has no hat, is a known it corresponds to the original network. On the other hand, jz v impedance matrix introduced by the segmentation process with dimensions cor-responding to the number of links in the network, ip. As a third example, [Cav] is a connection matrix to be defined later, with a row for each node in the net-work, and a column for each link. The transposed of this last matrix is written [C* a ] . Observe that the subscripts are not part of the name of the matrix, but merely an indication of its dimensions. 5.10 M u l t i - A r e a Thevenin Equivalent , M A T E Once the segments into which the network is to be broken have been delineated, Fig. 46a, the branches connecting those segments are labelled links by Marti [6]. The result of the segmentation process can be seen in Fig. 46b, a cluster 1 4 Branches connecting the segments produced by M A T E , the Mult i -Area Thevenin Equivalent. 5. Segmentation and OVNI 68 of subblocks15 connected by links. In that figure, the line between any two subblocks, let us say A and B, represents possibly several links connecting some nodes in subblock A to some nodes in subblock B. Fig. 46: a) Network with M A T E ' S subblocks delineated; b) Subblocks connected by links, after M A T E . To solve any of the subblocks, let us say A, independently from the rest of the network, we include all link current contributions, to the subblock's own current sources [l£]. But the link current contributions, j^J, is related to the link currents vector through a connection matrix [C£v] according to Eq. (53) . = K J [«J (53) The connection matrix [C£v] has a row per each node in subblock A, and a column for every link in the whole network. That is, each element of that connection matrix relates a node in the subblock to a link in the network. That element is zero if the link does not touch the corresponding node; it is +1 if the link arrives in the node; it is -1 if the link leaves the node (To impose some regularity of formation on matrices related to this segmentation process, the author found it convenient to assign a direction to each link; a direction that coincides with the link's assumed current direction). 1 5 In O N V I , M A T E segmentation is applied after topological segmentation, hence it is applied to some (possibly all) of the blocks generated by topological segmentation. This is the reason why M A T E segments are called subblocks. 5. Segmentation and OVNI 69 Now we can write modified nodal equations corresponding to subblock A 1 6 , as shown in Eq. (54) below. [GL] M = [tf ] + (54) Putting together all the matrix equations of the form of Eq. (54), one for each subblock, into a single matrix equation for the segmented network (hence the hat on the corresponding conductance matrix, indicating that it is the block-diagonal matrix corresponding to the segmented cluster produced by the method, Fig. 46), one obtains Eq. (55) —written first in explicit form to illus-trate its block-diagonal nature, then in a more compact form, Eq. (56)—. G otot 0 0 0 G?. 0 0 aa 0 GZ aa yA ua IA iA V'a = IB + ~iB IC ic (55) (56) [Va] = [Ia] + [Ta] However, as the links contribution vector, [ia], is an unknown, it belongs in the left hand side of the equation. Also, substituting Eq. (53), into Eq. (56) after the vector [ia] has been moved to the left side, one obtains Eq. (57). [va] - [Catp] [iv] = [Ia] (57) The system in Eq. (57), however, has more unknowns (a 4- ip) than equations (a). The <p additional necessary equations are provided by the ip links' voltages relationships. For one of such links, represented in Fig. 47 including its voltage source and resistance, the corresponding K V L 1 7 expression can be written as in Eq. (58). Vlink + Rx-ix = Vx (58) (59) A. 1 6 In Eq . ( 5 4 ) , which applies only to subblock A, a is the total number of nodes in subblock 1 7 Kirchoff's voltage law. 5. Segmentation and OVNI 70 IX "from". Rx V x •Wr-0-Vlink "to' Fig. 47: A link's voltage source and resistance, and the directions assumed positive for current and voltages. The set of all the links equations, of the form of Eq. (59), can be rewritten in matrix form as: KJ + [KP] K] = [Vv] (60) The vector of link voltages K ] can be related to the nodal voltages [va] by the connection matrix [B^] according to Eq. (61), below. V<P. — [B(pa. Va, (61) Each element of that matrix relates a node (indicated by the column index) of the network to a link (identified by the row index) as follows: • the element is zero if the corresponding link is not connected to the node; • the element is +1 if the link arrives in the node; • the element is -1 if the link leaves the node. In short, this matrix is nothing but the transposed [Cav>]: (62) Applying Eq. (62) to Eq. (60) we arrive at the <p additional equations in Eq. (63), where tances. R, is a diagonal matrix with the corresponding links resis-R J KJ + [ £ J K] = [vv] (63) 5. Segmentation and OVNI 71 Equations (57) and (63) comprise the complete set of necessary equations to solve for the unknowns: R<ptp (64) aa 0 0 0 CB aa 0 0 0 nc aa r~>At ^<pa nBt ^tpa fCt ^ipa IA IB xa IC (65) As l ^ a a j is block diagonal, its inverse is also block diagonal with Homer Brown's bus impedance matrices [15] occupying the space formerly used by the subblock; i.e., [ZL] = [GL]'1 (66) Premultiplying each subblock's nodal equations by its bus impedance matrix, given by Eq. (66), we obtain zL o 0 0 ' aa 0 0 o z*. 0 0 < 0 CB 0 -CB 0 0 7C aa 0 0 0 Cc 0 0 0 1 1 r*At r*Bt ^<pa r<ct VA ' IA' > IB \ / 1{p 4 UA ^ aa 0 o 0 UB ^aa 0 0 0 uc riBt uV a ret ^Va _ y A r*A ^aa^atp _7fl f<B aar^aip _yC f<C ^aa^ay) R, VP yA rA 7B TB aa a z£„lS! (67) (68) In Eq. (68), [UAa] is the unitary matrix with dimensions equal to the number of nodes in subblock A. Each of the first three rows in Eq. (68) can be written as in Eq. (69) below, which shows that if there were actually no links with other 5. Segmentation and OVNI 72 Fig. 48: MATE'S Thevenin equivalent rendering for each of the subblocks. Nodes a b c d represent docking ones. subblocks18, the voltages of the nodes in subblock A would be given simply by the product [ZAa.IA]. Thus we conclude that this product is nothing other than the Thevenin voltages of the subblock's nodes, Eq. (70). This last discussion also implies that the elements in the product [ZAaCAv] are the subblock's Thevenin impedances as seen by the network's links, as in Eq. (71). In summary, we have K] = KVal + [**] (69) [E^] = [ZAaIA] (70) = [ZLCtp] (71) The network nodal voltages can then be written as [va] = [E*] + [ZS,] [i*] (72) On the other hand, the last row in Eq. (68), after a manipulation that will be used explicitly in the section on node hiding, can be simplified to: M = [vv - CJXI (73) [Vi = [Vv ~ C^E*] (74) That is, if iv = 0. 5. Segmentation and OVNI 73 The solution of this last smaller system of equations yields the <p link currents, [ip], that, once substituted into Eq. (72), produce the corrected nodal voltages, [va]. The matrix Zvv will be the object of further study later in this thesis. In the next two sections, the relationship between MATE and Kron's Diakop-tics is discussed, along with a comment on the compensation method. Let us now meet the imagery behind the equations, as generated by MATE: Equation (72) depicts each subblock as a multisource Thevenin equivalent with as many self resistances as there are docking-nodes19 in the subblock, and a Thevenin mutual coupling stage, as in Fig. 48. 5.11 M A T E and Diakopt ics [7, 8] It was at a point well into the process of developing OVNI that the connec-tion between MATE and Kron's Diakoptics became clear, after a comment by Dr. Dommel triggered several weeks of bibliographical research through the work of Kron; using both Kron's [7] own original tensor analysis on the subject, and Brumeller's [8] exploitations on Kron's work. The result of those weeks of work is summarized in this section. Kron takes the original network and separates it into an equivalent network and a removed network. Then he reasons that if current sources are applied to the equivalent network, sources that inject into it the very same currents that were fed before by what is now the removed network, and —at the same time— the removed network is excited by voltage sources that apply to it the same voltages that appeared in it when it was part of the whole original network; then all voltages and currents in the two new networks (equivalent and removed) will be the same they were in the original one. Using tensor analysis, Kron arrived indeed at equations equivalent to Eqs. (57) and (63) 2 0 obtained in the previous section, which are known as the Diakoptics 1 9 Nodes to which links axe connected 2 0 W i t h Vv = 0, since Kron does not consider voltage sources in the removed network but for the ones applied to it to compensate for its removal from the rest of the network. 5. Segmentation and OVNI 74 fundamental equations21, minus the Thevenin equivalent interpretation, and mi-nus the extensions to be described in chapter 6, both of which smooth out the implementation of the segmentation process. 5.12 M A T E and the Compensation Method When MATE is applied to isolate a nonlinear element from the linear part of the network, and using connecting links with no resistance or voltage source, we obtain the EMTP compensation method [4]. 5.13 Node Hiding and Element Models During tasks (3) and (4) described in Sec. 5.2, OVNI solves a form of Eq. (45) for the nodal voltages of the network. If some of those nodes could be hidden away from the integrator, OVNI, the latter's task would be a simpler and faster one. At some point a solution for those hidden nodes will be necessary. However, if the solution for the hidden nodes could be assigned to code written specifically for the topology and characteristics of the region comprising these nodes, two gains would be obtained: the hiding is in itself a form of segmentation with the advantages seen in Sec. 5.6; and the customized code would bring increased efficiency. But customized code sounds like anathema in a work set to achieve a gen-eral purpose simulator. This does not need to be so. The models for system elements22 include more often than not many nodes, a few of which are connec-tion nodes to other elements in the network, physical or externa] nodes23, the rest having been introduced by the modelling process, model or internal nodes2i, see Fig. 49. The element model is a region of the network with known topology and characteristics for which customized code can be written, and the internal nodes are good candidates to be hidden away from the main network solver, 2 1 Actually, a complimentary form of the Diakoptics fundamental equations, since the origi-nal ones relate to loop currents method, and not to nodal analysis, as noted by Brumeller. 2 2 See section 4.5.3.3 on page 46 for the multi-phase transmission line model, as an example. 2 3 Also called nodes type a, or simply a-nodes, in this work. 2 4 Also, b nodes. 5. Segmentation and OVNI 75 Fig-. 49: Node Hiding: Internal nodes and external nodes. OVNI. But the hidden nodes have to have some impact on the network, that impact is studied in what follows. For a particular hidden-node region, let us identify the external node quan-tities by the subscript a, and the internal node quantities by the subscript b. The voltages25 of the external nodes of the region are in the vector [va] and the corresponding nodal currents26 in [ha]. For the internal nodes, voltages are and currents [/i0]. Nodal equations can be written for all those nodes: Gaa Gab Gba Gbb Now, for a moment, let us assume that the voltages of the external nodes are known (they are calculated by the integrator core, OVNI, and passed as data down to the hiding region code). From the second matrix equation in Eq. (75), h ] = [Gbb]-1 ([h] - [Gba}[Va}) (76) This means that if the total current contributions to internal nodes, [fib], are known, the hidden-node region can use Eq. (76) to determine, from the given and known value of [va] the voltages of the internal nodes, [t/0]. Equation (76) 2 5 W i t h respect to the reference node. 2 6 Before hiding some of the nodes. Va ha Vb hb (75) 5. Segmentation and OVNI 76 can be custom coded for the region (the element model). Let us now write the equation for the external nodes implicit in Eq. (75), [Gaa] [Va] + [Gab] [vb] = [ha] (77) Substituting the expression for internal nodes voltages in Eq. (76) into Eq. (77), [Gaa] [va] + [Gab] [Gbb]~l [hb] - [Gab] [Gbb]-X [Gba] [va] = [ha] (78) ([Gaa] - [Gab] [G^]-1 [Gba]) [va] = [ha] - [Gab] [Gw]"1 [hb] (79) This means that the hidden-node region contribution to the external network conductance matrix is the modified matrix in Eq. (80) with dimension equal to the number of external nodes, a. [Ghaadden] = {{Gaa} - [Gab] [Gbb]-1 [Gba]) (80) From Eq. (79), the hiding of the nodes modifies the current contribution from the hiding zone into the external nodes according to [hhaidden] = [ha] - [Gab] [G,*}-1 [hb] (81) Summarizing, the contribution of the region to the general network is: [Ghaadden] [va] = Kidden] (82) As the general network solver, the integrator knows nothing about hidden nodes. Managing the matrices defined by Eqs. (80) and (81) is the sole task of the subregion's code, customized and optimized. At each time step, OVNI solves for all external nodes in the network, through topological and MATE segmentation schemes, according to the combined implementation described in the next chapter. Then, those external nodes voltages are passed down to the hidden-node regions (element models), which use Eq. (76) to obtain the internal nodes voltages, necessary to update the region's history sources. Next, the re-gion updates all its sources, independent and history ones, and accumulates the corresponding contributions to internal and to external nodes into [hb] and [ha] 5. Segmentation and OVNI 77 respectively. Before releasing the contribution of the region to OVNI, the region corrects [ha] as in Eq. (81). Finally, the subregion checks for any internal topo-logical changes (switching) and produces and passes to OVNI the corresponding [G^ r f d e n] matrix. Given the reduced size of a hidden-node region, it is likely to include a small number of switches, which implies a few possible topologies, with a few possible reduced matrices [G^ 6 "] • This means that all those matri-ces can be precalculated and prestored before the actual simulation begins with enormous gains in speed, and only a minor penalty in memory usage. As an example of how element models can take advantage of node hiding to improve the overall performance of the simulator, part of the work described in this thesis included the implementation of an HVDC module model according to the guidelines described above. The resulting model and its implementation in OVNI are described in Chapter 6. To test the mentioned model it was necessary to create a basic firing-angle controller, which is described in Chapter 7. The manipulation described in Eqs. (75) to (79), but only for equation sys-tems where the equations to be eliminated have a zero right hand side, was introduced by G. Kron [7]. In this sense the reduction described in this section is a generalization of Kron's Reduction and such is the name used for it hence-forth, Generalized Kron's Reduction. The concept of node hiding is also used in other modelling approaches where the internal structure of the element is reduced down to its external nodes. For example, Marti's frequency dependent transmission line model [44], or the Ward Equivalent technique used in stability analysis [56]. The Node Hiding concept as presented here, however, does not have the limitations of the Ward Equivalent described in [56]. 5.14 N o d e H i d i n g . A numerical example At this point, in order to clarify and settle ideas, a numerical example of the node hiding technique seems convenient. Consider the 4-node circuit in Fig. 50 (where all values are either amperes or Siemens, as appropriate). To validate the solution obtained through node hiding, let us first solve the network with 5. Segmentation and OVNI 78 reference hidingregion < Fig. 50: Complete network with the node hiding region delineated. External nodes: (1) and (2). Internal nodes: (3) and (4). standard nodal analysis. The equations for the complete system are: 6 -1 -1 -2 ' Vl 3 " -1 5 -2 0 V2 10 -1 -2 4 -1 2 -2 0 -1 4 0 (83) And the solution of this system defines the nodal voltages 2.479 V2 3.948 V3 3.630 2.147 (84) Let us now use node hiding instead. In Fig. 51, the subnetwork chosen to be the hidden-node region (presumably an element's model) has its external and internal nodes clearly identified. In Fig. 52, the hidden-node region is represented as a black-box to emphasize the opacity of the zone as seen by the simulator, who is in charge of the external (and reduced) network, as seen in this figure. The contribution to the external nodes relayed from currents fed into internal nodes of the hiding region is, as 5. Segmentation and OVNI 79 reference' . reference '„ hiding region Fig. 51: Hiding zone: an element's model. See external nodes (1) and (2), and internal nodes (3) and (4). hiding region Fig. 52: "External" network, as seen by OVNI, with hidding region represented as a "black-box". per Eq. (81), ^relayed -1 -2 4 -1 - l 2 0.8 Relayed -2 0 -1 4 0 1.066... amps (85) The external network, minus the hidden-node region (HR), has two nodes: (1) and (2), and the conductance matrix (also minus HR): 3 -1 -1 3 [Gex] — (86) 5. Segmentation and OVNI 80 The hidden-node region contributes the matrix [GHR] t o t n e external sys-tem. This matrix is computed at a preprocessing stage from the hiding region's "whole" matrix (the one that describes HR with all its nodes, and not connected to the outside world): 3 0 ! -1 -1 [GHR] — From Eq. (80), [GHR] — 3 0 0 2 -1 -2 -2 0 0 2 -2 0 -1 -2 4 -1 -2 0 -1 4 4 -1 - l -1 -2 .1.4 -1 4 -2 0 -0.8 (87) 0.93 (88) The total external network is represented by the sum of [GEX] and [GHR]'-[G] = 4.4 -1.8 -1.8 3.9333 (89) Current contribution from HR is given by Eq. (81): 0 0.8 0.8 + = 5 1.06666 6.06666 [h-HR] = The external solver receives Eq. (90) results and solves (90) 4.4 -1.8 Vl 3 0.8 = + -1.8 3.933 V2 5 6.0666 (91) The external solver "sees" only Eq. (91), and computes: «i = 2.479 V v2 = 3.948 V (92) 5. Segmentation and OVNI 81 Which are the same results obtained in Eq. (84) from the standard solution. At this point HR takes those values in Eq. (92) provided by the simulator and uses Eq. (76) to find its internal node voltages: 3^ 4 -1 "7 2 -1 -2 2.479 ) . 2.630 U 4 -1 4 [ 0 -2 0 3.948 ) ' 2.147 (93) All tasks in Eqs. (88, 90, and 93) are under the charge of HR, leaving the simulator's core the much lighter burden of solving Eq. (91). When HR is an element model, its topology is of predictable and limited change nature, ergo its matrices and operations in Eqs. (88, 90, and 93) can be greatly optimized. This will be examined further in chapter 9. 6. SOURCES, LINKS AND EXPANDED M A T E 6.1 In t roduct ion Two main issues of the solution are described in this chapter: the representation of current and voltage sources in OVNI; and an extension of MATE to handle more efficiently ungrounded voltage sources that are not part of a link. In this sense, this chapter deals with the first task of the simulator, as seen in Sec. 5.2 6.2 Preca lcu la t ion of Source Values Sources in OVNI fall into one of these categories: • DC sources, • Time-periodic sources1. For the second category, periodic sources, determination of their values at each time step requires some computational effort (from a minimum of time-boundary testing, in the case of a square wave, up to the expensive and sophis-ticated numerical involvement of a sine wave2) To reduce the impact of source updating, source values are calculated and stored in tables before the simulation begins. Those tables are made available to the integrator during the simulation. The first attempt to do this was to use one cycle of the source's signal. To represent one cycle of a periodic source with a period of T seconds, see Fig. 53, 1 Sinusoidal, sawtooth, square wave, triangular sources, etc. 2 On a Pentium II, a sine computation takes the numerical coprocessing subblock of the C P U up to 30 times that of a sum's [57]. 82. 6. Sources, Links and Expanded MATE 83 value (AA/) time axis ^ \ n-th sample Fig. 53: The n prestored samples of a sinusoidal source. in a simulation with an integration step At, n samples are necessary, as given by Eq. (94), where "int" is the integer part function. This simplification, however, brings the problem of sample mismatch at the end of the cycle in cases where the integration step is not a divisor of the source's period. Observe sample n in Fig. 54, the last one of the source's prestored samples (if only one-cycle of the source is so treated). At the next integration step, identified in that figure as n+l, the integrator expects the correct value for the source, Kij/u- Instead, the table index wraps around and produces the value labelled Vwr(mg in the figure. The sampling mismatch is effectively reducing the frequency of the source's wave, and introducing higher frequency components. In short, this method distorts the signal of the represented source. The reduction in the source's effective frequency, in percentage, is given by Eq. (95), where n is the number of prestored samples as calculated by Eq. (94). (94) (95) 6. Sources, Links and Expanded MATE 84 value (AA/) right / wrong time axis Fig. 54: Wraparound of prestored source's samples. In a simulation with At — 50/iS, a 60 Hz source is represented by its n = 334 samples. Its frequency decreases 0.2% in the process, down to 59.88 Hz. At this rate, in only ten cycles of simulation, the source's phase lags 7.2°. The additional distortion implied by the introduction of high frequency components is of relatively little consequence, being very small to begin with, and further damped by the frequency response characteristics of the integration rule used in the solution process, see § 3.4. To avoid the mismatch discussed above, the preprocessor in OVNI prestores in the source's table, not the number of samples that fit into one source cycle, but the number of samples n that fit in the least common multiple (LCM) of the source's period T, and the dominant integration step At, Eq. (96) Where, to make a valid use of the integer function "1cm", both T and At are truncated to microseconds with no fractional part. For instance, in the case of A i = 50/us, and a source frequency of 60 hertz, the preprocessor should store 1000 samples, and not just 334. That is, in this case it takes three source's cycles to resynchronize the precalculated table with the simulation discrete samples stream. But that table, in double precision n = lcm(r, Ai) A i + 1 (96) 6. Sources, Links and Expanded MATE 85 IEEE format, occupies more than 64 kilobytes. If the source is an odd one, with a frequency different from the rated frequency, Eq. (96) can be used. If, instead, the source is just one of many with that frequency in the network under simulation, it may be considered to change instead the integration step At up or down to the nearest divisor of the period associated with that frequency, Eq. (97). &tadj = (97) i n t (zb) For the same case introduced in the last paragraph, and using Eq. (97), an adjusted integration step could be calculated as Atadj — 50.048 or 49.898/is. Using this adjusted integration step reduces the number of necessary samples per source (to only 334 in the example that occupies us; i.e., in double precision, slightly more than two and a half kilobytes worth of memory). This is all accomplished without a significant change in the bandwidth of the simulation. also source _ current source node "from" f J\ 'to' node V y / 7 o o t e \ ^ ^ a / drain node Fig. 55: A current source in OVNI: its nodes. 6.3 Current Sources The simulator uses a variant of nodal analysis to solve each one of the fragments into which the network has been broken by the multi-layer segmentation process described in sections 5.7 and 5.10. Nodal analysis accounts for current sources in a natural way, their values are computed at each time step, and those val-ues are duly accumulated into the corresponding nodal current vector —[ha] in Eq. (45)— at the proper time. The two nodes of a current source are identified, in this work, as the drain 6. Sources, Links and Expanded MATE 86 node and the source node, according to Fig. 55. 6.4 Voltage Sources In this work, voltage sources were the original motivation to explore Ho's mod-ified nodal analysis [54]. Later, in the light of MATE, new possibilities entered the picture. However, given the strict speed requirements on the simulator, ad-ditional options were explored and implemented. In OVNI different3 internal representations of voltage sources are used depending on the answer to these few questions: • Is the current in that source needed? • Is one of the nodes of the source connected to the ground or reference node? That is, the source is grounded. • Is the source part of a user-defined MATE boundary? In the next few sections, the different options used are introduced. 6.4.1 Grounded Voltage Sources — G V S Inclusion of a voltage source in MATE'S solving scheme, § 5.2, creates a new link4 equation and its corresponding unknown current. Inclusion of a voltage source in Ho's modified nodal analysis [54] introduces the current in the source as an additional unknown, along with the corresponding equation. In short, a voltage source inclusion in OVNI's solution scheme seen so far expands the system of equations by one more row and one extra column. In exchange for the additional work the method delivers the current (and implicitly, the power too) for that voltage source. That is true even for grounded voltage sources (GVS)5 3 All of this remains transparent to the user. 4 Granting that the source is part of a segmenting user-defined boundary. 5 A source connected between ground —or the reference node— and a certain node that is called here the GVS node or, more often, the &-node —k as in fcnown. 6. Sources, Links and Expanded MATE 87 / 2 3 #ofGVS in subblock #nonGVS nodes in subblock * / [n „ J * nortorr 1 2 3 Fig. 56: Precalculated t ime matrices corresponding to grounded voltage sources i n a subblock. However, MATE's equations are redundant in the case of a GVS, since they imply calculation of the voltage of every node in the subblock, including the ungrounded nodes of GVS's; and the voltages of GVS-nodes are already known. So, in cases where neither current nor power in a GVS is needed, a different and more efficient path of computation is taken. First, we order the nodes in the subblock in such a way that all the nodes which are terminal to GVS's6 occupy the last k positions among the subblock's nodes. The other nodes in the subblock occupy the first u positions7. Nodal equations can be written for the subblock as Guu Guk vu hu Gku Gkk Vk hk (98) As Vk, the voltage vector of the GVS nodes with respect to the reference node, is known, the first row of Eq. (98) can be written [Guu][vu] + [Guk}[vk] = [K] [Guu][vu\ = [hu] - [Guk}[vk] (99) 6 Labelled by O V N I known nodes or A>nodes 7 Named by O V N I unknown nodes or u-nodes) 6. Sources, Links and Expanded MATE 88 The product on the far right in Eq. (99) is the vector of Norton equivalent current sources corresponding to the k GVS in the subblock, feeding the u non-GVS nodes, [hnorton]. Vectors [vk] and [hnortcm] = [Gufc][i;fc] are both precalculated and stored as matrices. The [ufc]'s precalculated matrix has as many rows as there are GVS nodes in the subblock, k. [/wtonj's precalculated matrix has one row per non-GVS node in the subblock, u. Both matrices have as many columns as the least common multiple8, n, of the numbers ni, n 2 , . . . , of prestored samples for each GVS in the subblock. See Fig. 56. n = lcm(ni,n 2 ,n 3 , . . . ,nk) (100) 6.4.2 A n example on Grounded Sources, M A T E versus N o r t o n To contrast the efficiency of the approach in § 6.4.1, when compared with MATE solution for grounded sources, a simple numerical example is included in this section. In the simple network with one grounded voltage source, GVS, shown in Fig. 57, both solutions are compared. subblock A ground subblock B Fig. 57: Network with one grounded voltage source accounted for as a link. First, let us solve the problem considering that every voltage source in the network is a MATE link. This assumption produces the two subblocks outlined 8 To avoid voltage distortion due to sample/step mismatch, as was seen in section 6.2 6. Sources, Links and Expanded MATE 89 in Fig. 57, where subblock A is linked to ground by the 2V source/link and to subblock B. by the 3V source/link. The modified nodal analysis equations, reorganized according to MATE in-put requirements are in Eq. (101), where the first two rows correspond to sub-block A, the next two rows to subblock B, and the last two rows to the links x and y. 7 -3 0 0 1 0 0 -3 3 0 0 0 1 v2 0 0 0 11 -6 -1 0 4 0 0 -6 13 0 0 u4 -9 1 0 -1 0 0 0 3 0 1 0 0 0 0 Xy 2 (101) Manipulating Eq. (101) according to MATE, § 5.10, produces 1 0 0 0 0.2500 0.2500 Vl 0 0 1 0 0 0.2500 0.5833 V2 0 0 0 1 0 -0.1215 0 V3 -0.0187 0 0 0 1 -0.0561 0 U 4 -0.7009 0 0 0 0 -0.3715 -0.2500 2.9813 0 0 0 0 -0.2500 -0.5833 ly 2 The last two rows in Eq. (102) are MATE'S link equations that, once solved, yield the currents in the two links ix = -8.0354A iy = 0.0152A These link currents, inserted into the Thevenin equations represented by the four first rows of Eq. (102) result in the node voltages ui = 2.00517 u2 = 2.00007 u3 = -0.99497 u4 = -1.15157 6. Sources, Links and Expanded MATE 90 Now, if instead of making a link out of the grounded voltage source, subblock A absorbs and transforms it according to § 6.4.1 —the subblock's nodal current vector is null, since it is computed with the subblock disconnected from the rest of the network and there are no current sources in this subblock—. 7 -3 0 -3 3 2 0 (103) This is the same as Eq. (98), from which the simplification in Eq. (99) is [7][fi] = [0] - [-3][2] (104) With this simplification of subblock A, Eq. (101) is reduced to 7 0 0 1 6 0 11 -6 -1 vz 4 0 -6 13 0 -9 0 0 0 0 lx 3 (105) Thus the MATE equation in Eq. (102) becomes Eq. (106), where the link system of equations has been reduced in dimension. 1 0 0 0.1429 0.8571 0 1 0 -0.1215 Vz -0.0187 0 0 1 -0.0561 -0.7009 0 0 0 -0.2644 -2.1242 This MATE system produces the same results reported above, minus the current through the grounded voltage source, but with fewer operations than were necessary to solve the original system in Eq. (102). 6.4.3 Ungrounded Voltage Sources, U V S When an ungrounded voltage source occurs in a branch designated by the user as a MATE segmentation boundary (i.e., as a link branch), Fig. 58, the solution for the source falls in line with the basic MATE algorithm, as seen in § 5.10 on page 67. 6. Sources, Links and Expanded MATE 91 ungrounded not-a-link ungrounded a-link O—1—W^~0—i—VA subblock A subblock B Fig. 58: Ungrounded voltage sources in OVNI: a) a link; b) not a link. If the ungrounded source, however, is not within a link branch, Fig. 58, its solution falls with the Extended MATE algorithm, seen in § 6.5 on page 92. 6.4.4 Voltage Sources "Ownership" In a network that has been broken, first into blocks (topological segmentation, § 5.7), then into subblocks (MATE segmentation, § 5.10), the issue of where voltage sources belong is not trivial. From what was said in § 6.4.1 and § 6.4.3, the dealing with voltage sources belongs with the solution of a block or of a subblock, as follows: • Grounded Voltage Sources (GVS) belong inside the corresponding sub-block, which is the responsible for including them in the solution. • Ungrounded Voltage Sources (UVS) Two cases: — Link Sources (ULS). In the case when the source is part of a MATE's user defined boundary, the source is dealt with as one of MATE's links and handled directly by the enclosing block. - Non-link Sources (UNLS). In the case when the source is not part of a MATE's user defined boundary, the source, obviously, belongs inside a subblock, and it is solved for inside that subblock. 6. Sources, Links and Expanded MATE 92 Voltage sources grounded — ungrounded in subblock. link not link in block, in subblock. Fig-. 59: Voltage sources "ownership", in OVNI. Figure 59 summarizes this section. 6.5 Extended M A T E Before the need for an extension to MATE is established, let us begin by revis-iting its imagery. In this section, the subscript convention introduced in § 5.9 to indicate a matrix or vector dimensions is not used; subscripts to matrices and vectors indicate the subblock they belong to. Fig. 60: KCL nodal equations and KVL voltage sources equations, getting ready for standard MATE. Consider a topological block that has been segmented into two subblocks by a set of MATE'S links. The block's nodal K C L 9 equations plus its links K V L 1 0 can be represented pictorically as in Fig. 60. A subblock A is in search of its nodal voltages [va], and is described by • its bus admittance matrix [Ya], • its nodal currents vector [ha], 9 Kirchoff's Currents Law. 1 0 Kirchoff's Voltages Law. 6. Sources, Links and Expanded MATE 93 • and its connection matrix [Ctt]. The block works to determine its links currents [ix]. The links themselves are described by • the links resistance matrix11 [Rx], and • the links voltage sources vector [Vx]. After a preprocessing stage outlined by chapter the subblock A is described by its bus impedance matrix [ZA] (the inverse of [Vo]), its Thevenin impedance matrix [ZTO] (i-e-, the product of [ZA] and [CA]), and its Thevenin voltages vector [Ea] (product of [ZA] and [ha]). This convenient way of MATE's for identification of matrices and vectors in the problem stems from a basic assumption: that a subblock can only contain current sources or GVS's. In this section, MATE is extended to override those restrictions; albeit at the price of losing the physical meaning of matrices and vectors in the solution. Let us first see what the extension is, then explore its use in a short numerical example. The extensions necessary to deal with a subblock that includes UVS's —like the subblock A in Fig. 62— are (for that subblock, see Fig. 61) • Extend its nodal voltage vector [va] with a vector of UVS's currents at the bottom [isa], to produce the extended vector [v*]. • Extend its nodal current vector [ha] with a vector of UVS's voltages at the bottom [vsa], to produce the extended vector [hi]. • Extend its connection matrix [Ca] at the bottom with as many null rows as there are UVS's in the subblock, to generate the extended connection matrix [C*]. 1 1 A diagonal matrix with one entry per link. 6. Sources, Links and Expanded MATE 94 extended Ya matrix extended vectors Ca, Va, ha Fig. 61: Extended matrices and vectors for the subblock with UVS's. Extended • Extend its admittance matrix [Ya] with the internal UVS's connection matrix [Csa], as in Fig. 61, to generate the extended matrix [Y*]. • Finally, ignore the names of vectors and matrices in this subblock and build the extended matrices indicated in what follows —whose names are kept for the sake of mnemotecnic association, since they are not impedances or voltages anymore—, and then proceed as in standard MATE. The matrices are: - Extended or pseudo bus impedances, [Z*] = [Y*]~l, - Extended or pseudo Thevenin impedances [Z^a] = [Z*][C*], a n d - Extended or pseudo Thevenin voltages [El] = [Zl][h*a]. 6.5.1 Ex tended M A T E : A numerical example In Fig. 62, a single block network has been broken into two subblocks by the 4-ohm 3-volt link. The subblock on the right, A, includes an ungrounded voltage source (UVS). In this example, there are two voltage sources: one is part of a link, the 3-volt source; the other, is ungrounded and part of a subblock. MATE. 6. Sources, Links and Expanded MATE 95 ungrounded not-a-link ungrounded a-link Fig. 62: Subblock with and ungrounded voltage source. (107) Introducing the currents in the voltage sources, ix and ik, as in the figure, the nodal equations are Node (1): 2ux + tx = 5 Node (2): 3v2 - ix - ik = 0 Node (3): 5v3 - 3v4 + ik = 0 Node (4): 3u4 - 3u3 + 4u4 = 4 The voltage sources introduced two unknowns, their currents ix and ik. They introduce two equations as well UVS source: v2 — v\ = 5 Link source: v2 — v% + Mk = 3 Solving the system of seven equations comprised by Eq. (107) and Eq. (108) we obtain (108) v4 = 0.7573 V; ix = 8.9587 A; ik = 0.1033 A. The equations, written in matrix form and including the UVS equation in subblock A's equations according to extended MATE, are ui = -1.9793 V v2 = 3.0207 V t>3 = 0.4337 V 6. Sources, Links and Expanded MATE 96 2 0 1 0 0 0 Vi 5 0 3 -1 0 0 -1 v2 0 - 1 1 0 0 0 0 lx 5 0 0 0 5 -3 1 0 0 0 0 -3 7 0 Vi 4 0 1 0 -1 0 4 3 (109) Premultiplying the rows corresponding to subblock A by the pseudo bus im-pedance matrix of the subblock; and also premultiplying the rows corresponding to subblock B by the subblock's pseudo bus impedance matrix, Eq. (109) be-comes 1 0 0 0 0 -0.2 Vl -2 0 1 0 0 0 -0.2 V2 3 0 0 1 0 0 0.4 lx 9 0 0 0 1 0 0.2692 V3 0.4615 0 0 0 0 1 0.1154 Vi 0.7692 0 1 0 -1 0 4 ik 3 (110) The link matrix in this case has a single element. It is calculated from the pseudo-Thevenin impedances to produce the system of equations, 1 0 0 0 0 -0.2 Vl -2 0 1 0 0 0 -0.2 V2 3 0 0 1 0 0 0.4 lx 9 0 0 0 1 0 0.2692 V3 0.4615 0 0 0 0 1 0.1154 Vi 0.7692 0 0 0 0 0 4.4692 ik 0.4615 (111) From the last equation, the link's current, is readily obtained as 0.4615 ik = —— = 0.1033 A 4.4692 6. Sources, Links and Expanded MATE 97 That value is then substituted in the other equations to determine the re-maining voltages and current. This process produces the same results for nodal voltages and currents in voltage sources (links' and UVS) as the ones obtained at the beginning of this section from the network equations, as expected. Vl -2 -0.2 -1.9793 " 3 -0.2 3.0207 . ^ — 9 — 0.4 [0.1033] = 8.9587 0.4615 0.2692 0.4337 0.7692 0.1154 0.7573 7. SWITCHES AND ASYNCHRONOUS COMMUTATION 7.1 In t roduc t ion When a switch operates, it alters the topology and size of the network. When a switch opens1, it creates two nodes where there was only one. When a switch closes, it collapses one of its two nodes. In this chapter, representation of swi-tches and their associated switching operations in OVNI are presented. The pros and cons of node collapsing are revised. In real time simulations of the kind targeted in this work, the calculated samples of some signals are issued to the external devices2 in an evenly time-spaced stream of samples. More often than not, open switching operations do not occur at the moment of issuing the samples, i.e. asynchronous commutation, Fig. 63. A technique to cope with the voltage or current spikes generated by those asynchronous opening of switches is introduced in this chapter. signal (current) stream of synchronous samples issued by the simulator Fig. 63: Samples output stream, and asynchronous commutation. 1 A n ideal switch. 2 D / A , amplifiers, etc. 7. Switches and Asynchronous Commutation 99 7.2 Swi t ch Clos ing , Col laps ing Nodes If switches are modelled as either ideal conductors —when closed—, or as perfect insulators —when opened—, the general topology of the network (as reflected in the system's matrix) is modified with each switching operation. That is, the number of nodes in the problem is reduced each time an ideal switch closes, and viceversa. In non real-time simulations, such situations can be exploited to speed-up those simulation intervals when switches are closed. In this case, the system becomes somewhat smaller and so does its matrix, which is now easier to triangularize or to invert, as necessary, Fig. 64. signal t datum issued as , computet switch operation collapsing or birth of nodes soon at 1 •it is h y ' _ *- y * y ' (7/770 3X7S cpt cpt cpt cpt computation time (cpt) Fig. 64: Short and long integration steps. Non real-time simulation. Data are issued as soon as they are available. The integration step that takes the longest time to compute is the one that takes precedence over all others in a real-time simulation. That is, to preserve the frequency spectrum of the output signal channeled through the digital-to-analog converters, amplifiers, and out to the real world, samples are issued at equally distanced intervals along the time axis, as in Fig. 65. In that figure some integration steps take longer to compute than others (long steps), but there is always a filler time slice added to wait for the real time deadline. That filler is used by the hardware to transmit the data. It follows that a main target in this project has been the reduction of the long integration step depicted in Fig. 64. Precalculation of matrices, as was seen 7. Switches and Asynchronous Commutation 100 in sections 5.3 to 5.10, was advanced with such a goal in sight. The collapsing —or re-insertion— of nodes introduces an overhead on the long integration steps that, in theory, could be compensated by the reduction in computation burden during the short integration steps. However, as the length of that long step is the determining factor of the bandwidth of the simulation, that overhead becomes overwhelming. signal real time deadline computation time (cpt) Fig. 65: Short and long integration steps. Filler time slices. Data output stream in a real time simulation. Thus, in real time simulations it may not be to our advantage to reduce the number of nodes and the order of the system's matrix. In fact, such a re-arrangement is a costly one because of the management overhead (i.e., nodes reallocation, matrices re-dimensioning, and so). Also, in our efforts, addresses are sometimes precalculated for components in structures and arrays, and off-setting such positions in memory, when the number of nodes is reduced —or increased— during the simulation, carries with it a penalty in execution time terms. The approach used has been instead to distribute the computational burden more evenly over the integration steps. The short steps become longer, but the dominant long steps become much shorter, with an improved simulation bandwidth as a result. In short, the size of the matrices, and the number and position of allocated nodes, remains unchanged along the simulation as seen in § 7.4. 7. Switches and Asynchronous Commutation 101 7.3 Expanding a System of Linear Equations As a basic framework, let us consider the possibility of introducing additional pseudo equations —and their corresponding pseudo unknowns— into systems of linear equations. The added equation will introduce a repeated unknown, that is, an unknown that is already in the system and associated with an existing equation. In this way, the new pseudo unknown solution value equates the value of the unknown it is mirroring. Let us clarify this with an example. Consider a system of algebraic linear equations represented by the matrix equation in Eq. (113). The system's solution is included to the right of the equation. 10 -5 -3 X\ 10 Xi = 1.5364 -5 7 -1 %2 = 0 => x2 = 1.0927 (113) _ -3 -1 9 . X 3 . . ~ 6 . £3 = -0.0331 Let us introduce a pseudo unknown, X 4 , that mirrors x2. This is done by means of a fourth equation whose mutual terms with all the equations but that of the mirrored unknown are the same as in the original equation. The new equation has no coupling with the original equation and viceversa. The coefficient of the pseudo unknown in the new equation is equal to the coefficient of the mirrored unknown in the original equation. The expanded system is shown in Eq. (114). 10 -5 -3 0 -5 7 - 1 0 - 3 - 1 9 0 -5 0 - 1 7 As expected, the value of the pseudo unknown £ 4 , is the same as that for the legitimate unknown x2. The introduced pseudo unknown could well be the voltage of a would-be collapsed node four, and as such it would share the same voltage as node two. Xi 10 Xi = 1.5364 X2 0 x2 = 1.0927 X3 -6 X3 = -0.0331 X 4 0 X 4 = 1.0927 (114) 7. Switches and Asynchronous Commutation 102 7.4 Clos ing a Swi tch wi thout collapsing a Node In the previous section, the possibility for introducing fictitious equation-unknown pairs that mirrored equations-unknowns already in the system was presented. In this section, that possibility is used to keep constant the dimensions of the network matrices when there is a switching operation. This constancy allows for a simplified and more efficient addressing scheme for use of precalculated matrices in the subblocks of the network. In a network, when an open switch between nodes i and j closes, the only two equations to modify are the equations for those two nodes. The process can be summarized more clearly in pseudo code as follows. Let [A], be the nodal analysis bus conductance matrix associated to an n node network. If nodes i and j are welded together by the closing of a switch, each element akp of matrix [A] changes according to the process described in Fig. 66. for k = 1 . . . n; that is, for every row k if k 7^  i and k ^ j then O'ik Ojfc + (Xjk Ojk <— Oik endif endfor G>ii ^ da ~\~ Ojj 2(Zjj Ojjj ^ da for every do aij f- aji«— 0.0 Fig. 66: Closing a switch between nodes i and j. Coefficients for self terms for both nodes i and j, an and a;j-, become the sum of their former values minus the former coupling between the two nodes, a^ and aji. Then, the coupling between the two nodes becomes zero and all other elements in both equations are now the sum of the equations' corresponding coefficients. 7. Switches and Asynchronous Commutation 103 7.4.1 A Numerical Example In this section, a numerical example illustrates the procedure described in § 7.4 to avoid collapsing nodes when a switch bridging them closes. Consider the circuit in Fig. 67, with a switch between nodes 2 and 4 originally open. Fig. 67: Case to illustrate how to avoid collapsing nodes. Let us begin writing the nodal equations before the switch closes. All four nodes display linearly independent equations, Eq. (115). (115) 5 -3 0 0 V\ 0 -3 20 -5 -8 -9 0 -5 11 -6 v$ 7 0 -8 -6 21 Vi 17 Once the switch closes, if we choose to collapse the two nodes connected by the switch, 2 and 4, into a single one, 2, the network has now only three nodes, and its nodal equations are in Eq. (116). The solution to this system is on the right of the equation. 5 -3 0 Vl 0 -3 25 -11 V2 = 8 0 -11 11 _ _ 7 _ vi = 0.7377 V v2 = 1.2295 V i/ 3 = 1.8659 V (116) Applying now the procedure that was described in § 7.4 to keep constant 7. Switches and Asynchronous Commutation 104 both the number of nodes and the dimension of the matrix in Eq. (115) produces Eq. (117) that correctly predicts that the voltages of nodes 2 and 4 will be equal once the switch is closed. Thus we have 5 -3 0 0 ' Vl " 0 ' = 0.7377 V -3 25 -11 0 v2 8 v2 = 1.2295 V 0 -5 11 -6 Vi 7 —r vz = 1.8659 V -3 0 -11 25 . V i . 8 = 1.2295 V (117) Let us now recapitulate. It goes without saying that solving the smaller system in Eq. (116) is simpler that solving the larger system in Eq. (117). How-ever, as it is the size of the larger of the two the one that imposes its weight on the bandwidth of the real time simulation and, more important, it is the additional burden of building, triangularizing, and changing addresses for the smaller matrix that is being avoided here. OVNI uses the constant size subblock procedure in § 7.4 in its preprocessing stage to generate and prestore constant size subblock matrices of the type of the one in Eq. (117). 7.5 Switch openings In power networks, when an AC-switch is signaled to open, it waits until the next time that the current through it goes through zero3, see Fig. 68. In EMTP simulations the detection of the zero crossing occurs when the current through the switch waiting for opening changes sign, at b in Fig. 69. To avoid computational overhead, the actual zeroing of the current through the switch is not made until the next integration step after the zero crossing is detected, at c in Fig 69. This is an acceptable and efficient solution, given small enough integration steps, in most cases. In power electronics circuits, however, and in situations where the slope of the current just before the change of sign is large, this approach triggers spurious voltage spikes in highly inductive 3 We will refer to this moment as the zero crossing of the current in the switch. 7. Switches and Asynchronous Commutation 105 current through a switch 4 Fig. 68: Switch opening event: signal, and actual opening. neighbouring networks. To perceive the way such spurious spikes come to be, consider a situation where the current slope in Fig. 69 between points a and b is very steep. When the zero crossing is detected at point b, the value of the current has already drifted far away from zero4. If that value at b is issued to the rest of the network as the current in the switch, when the current is zeroed at c, the effective derivative of the current will be too big. That high current derivative is bound to produce voltage spikes in nearby inductive elements. Such was the case of the HVDC 4 Actually, under a rapid changing current situation like this, the current at o is also far from zero, and nulling the current at b would still produce voltage spikes, but those would be legitimate voltage spikes that should appear in the actual circuit. current through a switch that is waiting for an opening a\ time datum issued at time b b Fig. 69: Zero crossing and actual opening of a switch. 7. Switches and Asynchronous Commutation 106 Fig. 71: Voltage before smoothing reactor. rectifier bridge illustrated in Fig. 70, where the voltage at the load, and the spikes produced by the solution method, are illustrated in Fig. 71. In short, the simulator has to honor the request to open the switch as soon and exactly at the point where the zero crossing occurs. As the zero crossing is not evident to the simulator until the change of sign is detected, the zero crossing will already be in the past. A possible solution, in non real-time simulations, is to backtrack to the actual moment when the zero crossing occurred [57, 58], and issue the data at that particular moment in time, with the time stamp of the actual zero crossing itself. The result is a shortened integration step right at the opening of the switch. After that, the simulation proceeds at the regular 7. Switches and Asynchronous Commutation 107 sk fo 1 jnai to watch rzero crossing ze V / •o crossing ^ \ \ > detected J? A / At A 3W shifted train of At A samples A ' : • V Y K y — t i m e At At ^ Fig. 72: Non real time backtracking. t a ^\ short step * A \ 6 ^ long step * A ^ regular step 1 A \ T v. / \ A A J "me yv \ v v zero crossing regular step " Fig. 73: Simple non regressive backtracking. integration step; i.e., all future samples are slightly shifted to the left, Fig. 72. 7.6 Asynchronous Commutation in OVNI In real-time simulations, however, it is not possible to go back in time, to back-track. In OVNI a compromise was made, see Fig. 73. Instead of releasing the completely wrong value at b1, a lesser evil approach is taken, the correct value at the zero crossing, Y(b) is issued slightly later, at b'. But even this can be too expensive. To obtain the data at the zero crossing, b in Fig. 73, not only the trivially zeroed current in the switch in necessary, but 7. Switches and Asynchronous Commutation 108 first attempt, not re/eased second attemp (an expensive step) Fig. 74: Accurate but too expensive backtracking. the voltage at every node, and the history sources —and any other sources as well— at the same point b. In short, we could go back to a, and advance by the now known smaller Atshort to point b. But to do this, the network matrices would need recalculation since they depend on the integration step size. As the reduced integration step Ats/^ size is not known before the simulation, such matrices cannot be precalculated. That is, two complete step computations are necessary to produce the data to be issued at b —one of those computations is even more expensive than a regular one—. As a result, the bandwidth of the simulation is likely to fall to half its targeted value —far less, actually, given the additional overhead of matrix calculation and triangularization or inversion—. After the data just calculated, at b, is issued at b', the simulator would have to advance the enlarged integration step A t / ^ to fall back in step (at c) with the real time samples stream, Fig. 73. This results in another expensive recalculation of matrices. See Fig. 74 A simpler and shorter approach is taken by OVNI. A linear interpolation of voltages and history source values between points o and b' produces the state 7. Switches and Asynchronous Commutation 109 a regular step (detects zero crossing) / regular advance / A to pivot point Qk back to regular steps / A backward forward linear interpolation linear extrapolation Fig. 75: BIFE: Backward interpolation, forward extrapolation. of the network at b, the zero crossing, much faster. The problem is now how to advance from b up to c in Fig. 73. One possibility, see Fig. 75, is to use the available matrices for A i and advance computationally from b to d, and then use linear extrapolation to reach the values needed at c, where they are issued. Then the simulation resumes. Such a solution produces satisfactory results and was reported in [35]. A disadvantage with this technique, however, is the prediction involved in the procedure (even though small). An improvement to that technique, which does not involve prediction is presented next. This technique will be called the inverse Critically Damped Adjustment, inverse CDA or "ADC, or simply "DSDI" (Double Step Double Interpolation). The process is described below. 7.6.1 Doub le Step-Double Interpolat ion, DSDI OVNI uses, as was seen in § 3.5, the backward Euler integration rule5 to dis-cretize the equations of the network. From chapter 4, let us compare the discrete time equivalent conductance of 5 Abbreviated in what follows as BE. 7. Switches and Asynchronous Commutation 110 an inductor, L, in a simulation with an integration step, At, where BE was used to discretize the differential equations, Eq. (118), with the equivalent conductance produced by the trapezoidal rule of integration6, for the same inductor using the same integration step, Eq. (119). It follows that, for the inductor, TR produces a conductance half the value of that produced by BE. But this can also be interpreted as if one uses an integration step twice as big with TR than with BE, both rules produce the same equivalent conductance [10]. This situation applies for all discretizations in the network and we can say that if one uses an integration step twice as big with TR, than with BE, both rules produce the same network matrices. Up to the zero crossing, OVNI has been integrating with BE, and its as-sociated precalculated network matrices. OVNI is at b—after the backtracking obtained with linear interpolation between a and V—. Now, using now a double sized integration step, and TR as integration rule, it advances past c, up to d in Fig. 76 with the same precalculated matrices already available. The next output point, c, is reached by a safe interpolation between b and c'. 7.7 D S D I ' s O V N I Mod i f i ed Tasks Schedule To accommodate for the double step double interpolation scheme (DSDI), the solution tasks described in § 5.2 need to be revised and extended. In particular, the updating of history sources —as a request issued by the simulator to the element models— has to include additional functionality, as follows. Refer to Fig. 77, where a flowchart of the tasks of the simulator, which in-cludes DSDI, is illustrated. The best way to describe the operation of the DSDI as implemented by OVNI is to go through the flowchart. First —assuming that 6 The trapezoidal rule of integration is referred to in what follows as TR. At 9BE = —r (118) At (119) 7. Switches and Asynchronous Commutation 111 regular step (detects zero crossing) backward linear interpolation long forward step with trapezoidal rule back to regular steps A /. A backward linear interpolation Fig. 76: DSDI used in OVNI. The most expensive step takes one regular integration step with precalculated matrices, plus one inexpensive linear interpolation. all history and independent curent sources have been evaluated already, or given initial values if this is the first time step—, accumulate nodal curents into the vector [Eh]. Second, solve the nodal system of equations, [G][v] = [T,h], for the external nodes voltages, v. Third, check to see if this is the time for a double step —that is, if flag interpolateDoubleStep7 is set—. Let us assume, in this first run, that this is not the case, that this is a regular step. Fourth, update ele-ment history sources for the next step. Then determine internal node voltages, and let the elements check for internal switch opening operations. If such an event occurs, the coresponding element sets a flag interpolate*, and determines the percentage of backtracking necessary to hit the exact point where the zero crossing occured in the curent through the just opened switch. That percent-age9 is bt. As part of the same block in the flowchart, a separate method is activated, that of checking for switch opening events in the prescheduled events 7 Represented in the flowchart by an asterisk enclosed into a circle. 8 Represented in the flowchart by an asterisk. 9 Actually it is a per unit value. See next section for a detailed discussion of this item. 7. Switches and Asynchronous Commutation 112 for every time step \ 1 (1) Accum cur ulate nodal rents. \ I (2) Solve for nodal voltages. yes (4) Update history sources. . w -> 7k -> bt (5) yes )fc "interpolate", i.e., activate the first half of the DSDI procedure. 'interpolateDoubleStep", i.e., activate the second half of the DSDI procedure. (9) Interpolate for voltages in double step 1/2 -bt/2 c c (10) Interpolate forh and advance single step Clear® May set* andbt - if it detects zero crossing in a current through a switch waiting to be opened, activate the % flag, and compute backtrack, bt. drops the just calcu-lated histories and interpolates between the previous two. (7) Interpolate for voltages K. bt NJ A/ (8) Interpolates forh and advance double step\ Clear M / 2dt Set (g) M -Fig. 77: OVNI's modified flowchart to include DSDI. Elements handle three instances of their histories: h n e x t , h n o w , / i & e / o r e - When they "decide" to backtrack, they discard hnext, and interpolate between the other two. 7. Switches and Asynchronous Commutation 113 list —either with the input data case, or by a controlling device under test—. If an external switch opening is detected, a corresponding bt backtracking is calculated, along with the setting of the same interpolate flag. Fifth, check if the interpolate flag is set, that is, if a switch opening operation was encoun-tered in the previous task. In this first run let us follow the main path of the flowchart; i.e, assume no switch opening was met, then: Sixth, the node voltages and any other output variables are made available for the D/A converters and amplifiers for output. Input logical signals from the real world are received and the corresponding switching events are scheduled by the event handler. Let us assume instead that a switch opening occurred in the fourth task above, then the test in the fifth task will branch the execution into: Seventh, if several switches opened, use the backtracking percentage bt, corresponding to the zero crossing that occurred the last. Using the last two calculated values for nodal voltages, interpolate for the ones corresponding to the moment of the chosen zero crossing. Eighth, request each element to discard the most recently calculated history sources values, and interpolate between the previous two values —which the element has to keep at each time step—. The element interpolates too for internal nodes voltages and from that interpolated point in time updates the history source advancing with the formula corresponding to the trapezoidal rule of integration; i.e., a double step (step (3) in Fig. 76. The integrator clears the interpolate flag, and sets the flag interpolateDoubleStep. Now, task number six outputs the voltages and signals just interpolated (value at point b' in the figure of reference). Now the simulator is at the top of the flowchart again, but with a set inter-polateDoubleStep flag. It goes through tasks number one and two, and obtains external node voltages at point d in Fig. 76. When the simulation reaches task three this time, it branches into tasks number nine and ten, following a clearing of flag interpolate by the simulator, it performs a new double set of interpolations —but using not bt, but [| - —: one interpolation for external node voltages, and another for the elements history sources and internal node voltages. From 7. Switches and Asynchronous Commutation 114 the interpolated values of their history sources, and using the backward Euler's rule of integration, the elements advance a single step and reenter synchronism with the output stream of data. The elements, and the switching events han-dler, check for any switch opening occurring between the point b in F i g . 76, and the recently interpolated values. If a switch opening condition is met, the corresponding element at c, or the switching events handler, reactivates the flag interpolate. The simulator now clears flag interpolateDoubleStep, which brings the simulation back either to the normal backward Euler's single stepping — i f interpolate was not just set—, or to the first half of the D S D I procedure — i f an A C switch opening was just detected and the interpolate flag was activated—. 7.8 Single Step and Double Step Interpolation Details Only A C switches waiting for an opening operation have their currents monitored for a zero crossing, either inside the model where they reside, or among the corresponding block's links, or even perhaps wi th one of a subblock's switches. D C switches operate synchronously wi th the simulation stream and are not subject to the problems tackled by the D S D I procedure. When an A C switch has been "marked" for opening, its model (if it is part of one), or the switching events handler of the simulator (if it is not), keeps a computational eye on its current waiting for a zero crossing. Such a current wi l l be referred to, in what follows as the reference current. In F i g . 78a, a zero crossing in a reference current has just occurred between points o and 6; i.e., between values ra and r-(,10. How far back into the last integration step the zero crossing, and the interpolation, w i l l have to go is given by the backtracking, bt. bt = — ^ — = = 0.25 (120) r b - r a -12 v Once a backtrack has been found necessary, either in tasks four or ten in 1 0 In the first implementations of OVNI—before DSDI—, this zero crossing was detected by a painful extraction of the sign bit within the I E E E double precision floating point representation of both values, and a subsequent digital and operation. Given the relative timings of Intel's Pentium fmul, floating point multiplications, a simple test for ra x rb < 0 is fast enough. 7. Switches and Asynchronous Commutation 115 Fig. 78: Linear interpolation between points (a, r a ) and (6, rb). 6t is the per unit backtracking necessary. Fig. 77, all other variables (voltages and history source values) are interpolated for in tasks seven and eight, according to Eq. (121) and Fig. 78b. yc = Vb + (ya - yb)bt ( 1 2 1 ) Then, at the next pass through the loop in Fig. 77, after voltages and history values have already been determined for the double step point d, in Fig. 79, an interpolation is performed in tasks nine and ten, with a modified backtrack factor dbt that relates to the available bt in Eq. (120) above according to Eq. ( 1 2 2 ) , using the same form of Eq. ( 1 2 1 ) . Thus (1-W)A< = 1 W 2At 2 2 v ' 7. Switches and Asynchronous Commutation 116 Ve = Vd + (Vc ~ Vd)dht (123) Finally, if during task number ten a new switch opening is detected between b' and c in Fig. 79 u, a modified backtracking factor, mbt is established in the same way as bt was obtained in Eq. (120). 1 1 Not between b' and the point obtained at the end of the double step advance, point c' in Fig. 76. Part IV OVNI ELEMENT MODELS 117-8. OVNI E L E M E N T MODELS 8.1 In t roduct ion Several new models developed during this project allowed for the testing of OVNI's performance under the two test cases targeted in chapter 2: protective relay testing, and HVDC controller testing. This part of the report describes those models. The models are: • metal oxide varistors (MOVs) already described in § 4.5.9 on page 51; • measuring transformers, introduced in § 4.5.10 and detailed in the follow-ing two sections, § 8.2 and § 8.3; • HVDC modules, detailed in chapter 9, included to illustrate the general for-mat that element models developed for OVNI should follow, in particular that model shows how to implement the "node hiding" concept introduced in this thesis, § 5.13, inside a model to streamline the simulation; • a simplistic HVDC controller model was developed only to explore the HVDC module functionality, and is described in chapter 10 as an example of an OVNI model that interacts directly with another element model, all within the frame of OVNI's solution. 8.2 Cur ren t Transformers A non-iterative model for the current transformer (CT) that incorporates the saturation characteristics of the CT's core was presented in [53]. In this model, the secondary current of the CT, is, is calculated from the primary current, ip 8. OVNI Element Models 119 —determined by the integrator core—, and from the present saturation state of the CT magnetic core. Fig. 80: Equivalent circuit of current transformer (minus the ideal transformer) re-ferred to the burden side. A. Equivalent Circuit Figure 80 shows an equivalent circuit of the current transformer with all quan-tities referred to the secondary side. In that figure: • i'v— primary current referred to the secondary side. • %Ft— current in phase with the fundamental component of the voltage in-duced in the core; i.e., current through resistor Rpe, for the approximation of iron core losses. • im= magnetizing current through non-linear inductor. • is= secondary current. Since the CT perceives its primary current as applied by a current source, the primary leakage impedance, Z\, does not affect the results; therefore it is not needed. The current in the primary can be written as the sum of three component currents, Eq. (124). Each of those components can be expressed as a function of the flux linkages in the transformer core, A, which leads to a single equation for is (the output of the model) as a function of i'p (input from the integrator). 8. OVNI Element Models 120 i'P = *Fe + im + h (124) B. Core Loss Branch The voltage across the core loss resistance is also the voltage induced by the magnetic flux linkages, A, in the core. v = RFe • iFe (125) » " § <126> Integrating Eq. (126), then applying the trapezoidal rule to approximate the voltage integral, and finally substituting Eq. (124) into the resulting expression, the right-hand side of Eq. (126) becomes {Xnew - A0w)/(At); and the left-hand side becomes RFei^Fe-new + i>Fe-oid)/2, where subscripts "new" and "old" refer to the values at the present time step t and the preceding time step (t — Ai), respectively. ^Fe-new = C-Fe. ' Xnew + hpe-old (127) where hpe-oid is a history term evaluated as follows h>Fe-old = —CFe ' XFe - iFe-old (128) where the constant coefficient is defined as c* = jds ( 1 2 9 ) C. Magnetizing Branch The non-linear relationship between magnetization current, im, and flux link-ages, A, for the magnetizing branch can be approximated by the piecewise linear curve, Fig. 81. With the operating point in the linear segment starting at (A s t a r t , istart), a n d defining L as the slope of that segment, im — istart = ~f ' (A — Ktart) (130) 8. OVNI Element Models 121 Fig. 81: Piecewise linear representation of magnetization in flux path. Defining the known constant km for each segment, as in Eq. (131), Eq. (130) can be rewritten as in Eq. (132). km — istart 1 A start L A + km (131) (132) D. Secondary side branch If the secondary leakage impedance is combined with the burden into a total secondary impedance Rs + JU)LS = (R2 + Rburden) + i^(-^2 + -^(mrden) the voltage v, in Eqs. (125) and (126) is also dis v = Rsis + juLs • — dt (133) (134) Eliminating v from Eqs. (134) and (126), integrating the resulting expression and applying the trapezoidal integration rule Anew ^old — Rn • new Is—old + LS Is—new I's—old (135) At 2 ' ~" 2 Defining the history term hs as in next equation, we can solve for is-new as in Eq. (137) and obtain 8. OVNI Element Models 122 hs-oid = —csX0id — dgis-oid (136) is—new = CsXnew + hs—0id (137) with the two constants \t ds = cs ^ 2 CS = L I R ' A t d s = c°\ ~ L s I (138) (139) E . Secondary current as function of p r imary current From Eqs. (124, 127, 132 and 137) we obtains i'p = iFe + im + is= {^Fe + + A + (hFe + km + hs) Express the flux linkages, A, as a function of the secondary current, is, from Eq. (137), and the desired expression of is = f(i'p) is obtained as follows is = h (i'p - hFe - hm - hs) + hs (140) where ki is the constant defined as k i = °-\ (141) CFe+Z+Cs If the history terms (h'a) are known from values at the preceding time step, the secondary current can be obtained from the primary current from Eq. (140) with only one multiplication and four additions. F . U p d a t i n g his tory terms Once the new secondary current ia-new has been calculated at time t, all history terms need to be updated to advance the solution by At. In the updating calculations, the term cs • Xnew is used instead of Xnew, and is obtained from Eq. (137), CgX-new — is—new s^—o/d (142) 8. OVNI Element Models 123 The history term for the secondary side branch follows from Eq. (136), hs—new ~ ~esXnew — dsis—new (143) The history term for the core loss branch is obtained from the formula ^Fe-new — &Fe (c»A n e w) — hpc-old (144) which follows from Eq. (128) when iFe-new is replaced with its expression from Eq. (127). The constant kpe is defined as kFe = 2cF e (145) These updating formulas add another two multiplications and three additions to the effort required in each time step, for a total of three multiplications and seven additions. There is also a check needed to see if cs • XneW in Eq. (143) has moved the operating point into another segment in the piecewise linear representation of the magnetization curve. o.i 0.2. 0.3 0.4 OS °G> v \0 Fig. 82: Secondary current match between OVNI's model and EMTP's discrete ele-ments one. 8. OVNI Element Models 124 G . Va l i da t i on of the model Figure 82 compares the result of this algorithm with the one obtained with the standard EMTP solution method. Both answers are practically identical. The case used for this test was taken from a field test comparison described in [59], where six segments were used to represent the magnetization curve. For the duplication of test results described in [60], simulation results with a two-segment representation were almost as accurate as those from more detailed representations. In the two-segment case, the knee point seems to carry more weight than all other parameters of the saturation curve. wau VOLTAGE usve Fig. 83: Coupling Capacitor Voltage Transformer, CCVT. 8.3 Coup l ing-Capac i to r Vol tage Transformers Figure 83 shows a simplified schematic of a coupling capacitor voltage trans-former. A detailed wide frequency band model of a CCVT is complicated due to the magnetic and capacitive interactions in the various parts of the compo-nent magnetic devices (tuning reactor, potential transformer, and ferroresonance suppresor) [61, 62]. 8.3.1 Po ten t i a l transformer and reactors Figure 84 shows a lumped parameter equivalent circuit for a single phase two-winding transformer [50]. Terminals 1-3 are input, and 2-4, output. This model is valid for frequencies up to hundreds of kilohertz. Several stray capacitances in-8. OVNI Element Models 125 Fig. 84: Lumped parameter high frequency equivalent circuit of a two winding trans-former. side the device have been included: winding to winding (CHL), turn to turn (CH, CI) and winding to ground (CHG, C L Q ) , together with the frequency dependent leakage impedance (Zieak(u)) and the core magnetization branch (Zm(u>)) which is possibly nonlinear and frequency dependant. It is convenient to relocate the core magnetization branch across the outside terminals of the winding closest to the core (usually the low-voltage winding). Then this branch can be modelled in as much detail as desired and allowed by the simulation time constraints. Saturation and hysteresis characteristics of the branch can influence the low frequency response of the solution [63]. CHQ/2 Z leak U <W2 H r Zm(co) Fig. 85: High frequency model of a reactor. In devices, like the tuning reactor and the ferroresonance suppressor in 8. OVNI Element Models 126 Fig. 83, that have only one coil, the equivalent circuit, Fig. 85, is half the equivalent circuit for a two winding transformer shown in Fig. 84. In a reactor the magnetization branch Zm is the main impedance in the circuit. However, re-actors are designed and built so that they do not saturate and both Z[eak and Z m can be modelled as linear frequency dependent R-L branches. Those branches can be synthesized in a similar way as Zieak in the two winding transformer. Fig. 86: High frequency equivalent circuit for a two winding transformer. 8.3.2 Simpl i f ied equivalent c i rcui t A circuit transformation can be used to move C H L , the capacitance that bridges both sides of a two winding transformer, to one side [64], as in Fig. 86. The resulting circuit has a capacitance in parallel with Zieak plus additional capaci-tances in parallel with CH and C L . Once the outermost capacitances at ports 1-3 and 2-4 have been removed (computationally), the impedance Zieak in parallel with C#x/a is the short cir-cuit impedance measured at a short circuit test. Chimklai and Marti [50] present a method to obtain, from simple measurements, the various capacitances in the equivalent circuit, as well as the short circuit impedance ZShwt {Zieak in parallel with CHL/O). In Fig. 87, a typical measured short circuit impedance response can be seen. 8. OVNI Element MnAvl* 127 7 5 K \OOK ^ \ HA Fig. 87: Frequency response (Z3hort) of a two winding transformer. Measured and synthesized responses. Fig. 88: Synthesized RLC network used to approximate Z,/iort(w), multiple peak high-accuracy synthesis. It is shown in [50] that Z,hort(u) (Fig- 87) can be matched very accurately with a number of RLC blocks as in Fig. 88, one block per resonant peak. 8.3.3 C C V T m o d e l for rea l - t ime s i m u l a t i o n A very accurate C C V T model can be obtained by combination of the PT model described above with corresponding models for the tuning reactor, ferroreso-nance suppression circuit and the Cs of the capacitive divider, in a similar manner to that suggested in [63]. However, in the suit of tests targeted by this simulator, the accepted bandwidth (once the distortion of the integration rule has been accounted for) is only of 2 to 4 kHz. 8. OVNI Element Models 128 (a) Fig. 89: Simplified model to represent only the main peak delivers acceptable accuracy. It was considered that under these conditions it is sufficient to approximate the first resonant region in Fig. 87. A very reasonable approximation of this region can be achieved with a simple RLC combination, as in Fig. 89. In this minimal approximation, HQ and L 0 can be taken as the 60Hz values, while C\ is calculated to match the first resonance peak. This procedure delivers a two port model that is independent of the burden. For cases where the burden is known, see § 8.3.4 for a convenient and efficient alternative. 8.3.4 Po ten t i a l Transformer M o d e l , P T For cases where value of the burden to the PT is known, a simpler approach is used. This model for the potential transformer (PT), used in OVNI, was presented in [65]. The model approximates the PT's non-flat frequency response in Fig. 90 by a two-pole transfer function of the form The output voltage is computed, in the time domain, as a function of the input voltage and the magnetization history of the PT's core. From the fre-quency response in Fig. 90, the two finite poles are: pi = 251 rad/sec and P2 = 628 rad/sec. The constant k = 950. Figure 91 shows the magnitude re-Vout(s) Vin(s) = k-(s + pi){s + p2) s (146) 8. OVNI Element Mor/e/s 129 10 0 -10, •30 I •30 •40 •90 40 •TJ e a m r e d by m l n g a i l g n a l g e n c r a j o f ! : : • • i; : i i l l : h i 10 100 1000 Frequency [Hz] 10,000 Fig. 90: PT's frequency response, 201og(Vout/Vin) dB versus frequency in hertz. sponse of the approximating function in the continuous time domain rendered in the frequency domain by a Laplace transform. With backward Euler's rule, the z-transform of the transfer function is pro-duced by the substitution in Eq. (146) of s = After some manipulation, the z-domain transfer function for B.E. is kz(z - l)z H(z) = (147) k\Z2 + k2z + 1 where ki = 1 - p2At -pxAt + pip2A?t, k2 =piAt + p2At - 2, and k3 = k • At. The magnitude of the resulting discrete time function response can be seen in Fig. 93. In the bandwidth targeted by this simulator the response approximates satisfactorily the one of the real PT in Fig. 90. The transfer function used in simulating the PT's nonlinear frequency char-acteristics is equivalent to feeding the input voltage as VS0UTCe in Fig. 92, and computing the source's current according to Eq. (148). That current is stripped of its units and its magnitude equates the output voltage of the PT. 8. OVNI Element Models 130 L a p l a c e t r a n s f o r m o f H Fig. 91: Approximated PT's frequency response, as rendered by the two polo contin-uous time Laplace transfer function. = r ' v ^ ~ t r • u (* " A *) + IT • *(* " At) + T- • *(* " 2A«)] (148) Fig. 92: Equivalent circuit used to approximate the response of the PT. In the equivalent circuit in Fig. 92, the conductance g = k^/ki, and the history current source h(t) = & • v(t - At) + • i(t - At) + i • i(* - 2At). The model includes, as in equation above, four multiplications and three additions per integration step. 8. OVNI Element Models 131 Backward Euler 5, Fig. 93: Approximated PT's frequency response, as rendered by the two polo discrete time Backward Euler transfer function. 9. THE HVDC MODEL 9.1 I n t r o d u c t i o n The HVDC model described in this chapter is the result of a team effort [30] in which this author was responsible for developing the solution algorithm to achieve real-time performance. The idea behind the model is to represent a six-valve module like the one on Fig. 94, with the same technique introduced in [9]; i.e., to consider a valve operation in the same way that switching operations were included in [9]. That is, for every possible switch/valve open/close combination, the corresponding block/module conductance matrix is precalculated and prestored for fast re-trieval during the simulation proper. All those matrices are prestored in a vector of matrices. That vector is indexed by an integer variable, iVlvStatus, whose internal bit representation corresponds to the open/close state of each one of the switches/valves in the block/module, Fig. 95. Fig. 94: Six valve module modelled for OVNI and its three parts: a) the three-phase transformer; b) the six-valve bridge; c) the smoothing reactor. At a first attempt, MATE alone was used to separate several of those six valve modules in a 24 valve case, but still the timings —even if significantly faster than the EMTP's 3120 /xs/step on a 200 MHz Pentium Pro workstation— (c) / Y Y Y \ \B2_. 9. The HVDC Model 133 fell in the vecinity of 770^sec/step1. Then, OVNI's Node Hiding scheme was applied to each module, as described in § 5.13 on page 74. It was this last technique, implemented as described in this chapter, that brought the timings down to 81 sec/step. On OVNI's current 400 MHz machine, performance falls comfortably within the real-time deadline targeted. SW1 STATUS 1 0 1 sw# 2 1 0 Fig. 95: M a t r i x precalculat ion scheme for blocks used i n O V N I [9]. 9.2 T h e three-phase linear transformer mode l Starting with a linear single-phase unit, the 3-phase transformer model is built. Hence, it is convenient to begin with that single-phase transformer model. 9.2.1 Single-phase transformer model The single-phase transformer model takes into account: a) the short circuit impedance, or rather, its inverse, Y, and b) the transformers ratio, a. See Figs. 96. From Fig. 96a, the current in the primary can be written in terms of the voltages as: h = Y (VI - aV2) = YVi - aYV2 (149) 1 Results obtained in a previous work programmed in Ada95. 9. The HVDC Model 134 Fig. 96: a) Single-phase transformer, Zsc referred to the primary; b) Zsc referred to the secondary. From Fig. 96b, the corresponding expression for the secondary current is: h = a2Y (V2 - Vi/a) = -aYVx + a2YV2 (150) In matrix form Eqs. (149) and (150) can be expressed: Y -aY Vi h -aY o?Y v2 h (151) If no node in the single phase transformer is grounded, and they are connected to nodes a, b, c, and d, as indicated in Figs. 96, voltages Vi and V2, as well as the primary and secondary currents can be written in terms of the voltages of each of those four nodes with respect to the reference node (ground), wherever it may be in the adjacent network. Thus we have Vi = va-vb, ia = h, h = i2 (152) V2 = Vc-Vd, Ib = -Iu h = -I2 In this case the 2 x 2 matrix in Eq. (151) becomes the 4 x 4 matrix in Eq. (153), which makes no assumptions on the way the single-phase transformer is connected within the network. Y -Y -aY aY ' V." 'la -Y Y aY -aY vb h -aY aY a2Y -a2Y vc h aY -aY -a2Y a2Y _ A (153) 9. The HVDC Model 135 9.2.1.1 Transformer D a t a For each of single-phase units in a three-phase bank, this data is to be collected: • kVi, rated kilovolts on primary. • kV~2, rated kilovolts on secondary. • MVA, rating of single-phase unit. • Zsc, short circuit impedance in percentage. The short circuit impedance is assumed to be purely inductive. The short circuit or series inductance is (where f, is the frequency in hertz): The transformer's ratio, regardless of which side is high-voltage, is, for the purpose of this model given by a = ^ (155) kV2 y ' Three conductances are then calculated from the Lsc and o values thus obtained; namely: gn, gx2, and g22, defined as follows (using Backward-Euler integration rule, where At is the discretization integration step chosen): 9. The HVDC Model 136 At 0n - 7—> 012 = 0-011. 022 = a 0ii (156) (157) Then the single-phase unit [Y] matrix can be written simply as: 011 -011 -012 012 -011 011 012 -012 —012 012 022 —022 _ 012 —012 —022 022 J 9.2.2 T h e three-phase transformer m a t r i x / m o d e l In general, a 4-node subnetwork represented by its 4 x 4 [Ys] matrix, and con-nected to a surrounding network at nodes m, n, p, and q, (as indicated in Fig. 97) contributes to the networks [Yn] matrix as sketched in Fig. 98, and outlined in the C-code in the listing in Fig. 101. Subnetwork Matrix m n p q Network [Yn] Matrix Fig. 98: Including the subnetwork's matrix into the network's matrix. As an example of the way to include the subnetworks admittance matrix, 9. The HVDC Model 137 [Ys] into the network's [Yn], let us detail the inclusion of one of the elements. In the subnetwork illustrated in Fig. 97, the nodes identified by the subnetwork as 1, 2, 3, and 4, are actually (from the point of view of the network) nodes 7, 3, 2, and ground. The element Ys(l, 3) has to be added to the network's Yn(7,2). a rrrr\ • I 6 i i V 1 1 7, k i i i i _ 5 Fig -. 99: Node numbering in the hvdc module. 9.2.2.1 A complete three-phase example As a complete numerical example, let us build the Y-matrix of an hvdc-module, Fig. 99, minus the 6-valve bridge, and minus the smoothing reactor. Each single-phase units data is: 50 MVA, 100/230 kV, Zsc = 10%, 50 Hz, and the discretization will be done using backward Euler's integration rule and an integration step of At — 50 u,s. Using the formulas in Eqs. (154,155 and 156) L- = ^ x i ^ x d 5 o = 0 - 0 6 3 6 7 / f <158> a = ^ = 0.4348 (159) 230 v ' gu = 50 x 10"6/63.67 x 10"3 = 0.7854 mS 012 = 0.4348 x 0.7854 = 0.3415 mS (160) g22 = 0.43482 x 0.7854 = 0.1485 mS The single-phase transformer matrix is, according to Eq. (157) 9. The HVDC Model 138 a or 1 b or 2 c or 3 d or 4 1 or x 1 0 6 8 2 or y 2 0 7 6 3 or z 3 0 8 7 Tab. 9.1: (Matrix "node") Connection nodes for transformers x, y, and z. Rows axe the transformers, and columns are the nodes. 0.7854 -0.7854 -0.3415 0.3415 -0.7854 0.7854 0.3415 -0.3415 -0.3415 0.3415 0.1485 -0.1485 0.3415 -0.3415 -0.1485 0.1485 (161) Now, with three of those single phase units, let's call them transformers x, y, and z, in a Ydll connection, we can add each of their contributions to the module's matrix [YN]- In Fig. 100, the details of the connection to the module nodes are shown. Those nodes are tabulated in Table 9.1, the matrix "node". The process is better described by the C-code in the listing in Fig. 101. ground. 9^3 •vw-J 4 Fig. 100: Ydl l three-phase connection of single phase units. The resulting matrix for the nine node module is 9. The HVDC Model 139 f o r ( t r = 1; t r <= 3; tr++ ){ f o r ( row = 1; row <= 4; row++ ){ f o r ( c o l = 1; c o l <= 4; col++ ){ extNodel = n o d e [ t r ] [ r o w ] ; / / Network node number. extNode2 = n o d e [ t r ] [ c o l ] ; / / Network node number. Ym[ extNodel ] [ extNode2 ] += Yt [row] [ c o l ] ; } } } Fig. 101: Procedure to incorporate the single phase units Yt matrices into the mod-ule's Yn matrix. 0.7854 0 0 0 0 0 0.7854 0 0 0 0 0 0.7854 0 0 0 0 0 -0.3415 0.3415 0 0 0 0 -0.3415 0 0 0.3415 0 0 0 0.2969 0 0 0 0 0 -0.3415 0.3415 0 0 0.3415 0 0 0 -0.3415 0 0 0 0 0 0 -0.3415 0.3415 0 0 -0.1485 0.3415 0 -0.3415 0 0 -0.1485 -0.1485 0 0 0 0 0 0 0 -0.1485 -0.1485 0 0.2969 -0.1485 0 0.2969 0 0 0 (162) 9.2.3 A d d i n g the 6-valve bridge and the smoothing reactor Each one of the six valves in the bridge is modelled as a resistor with one of two possible values depending on whether the valve is open (OFF) or closed (ON). The values chosen for the resistance are 1 mf2 when the valve is conducting (ON) or 1 Gft when it is not conducting (OFF). The combination of ON/OFF values states for the six valves is what we call the status of the bridge. The current status of the bridge is kept in an integer variable (status) where the six least significant bits store the state of each of the 9. The HVDC Model 140 six valves. Those bits are set to one for ON valves, and reset to zero for OFF valves. See Fig. 102. ° i A , « \ STATUS 5 4 3 2 1 1 0 0 0 ,1 1 V*Jv»3/*Op*n-0 BIT/VALVE STATUS m 14 V t l v O l l C l o — d Wv» lltclo—d Vmtv* 5 It clottd Fig. 102: Status of the bridge as a bitwise variable. For 6-valves there are 26 = 64 possible combinations of ON/OFF states (even if some are not possible under normal conditions). For each of those 64 combi-nations one can precalculate (during the preprocessing stage) the corresponding [Y] matrix of the whole module. The 64 matrices thus obtained are stored in a vector of matrices with 64 elements, subscripted from 0 to 63, see Fig. 103. It is worth noting that the variable "status" contains in the first six bits of its binary representation the OPEN/CLOSE status of each of the valves in the bridge. That variable "status" when interpreted as a digital integer indexes the proper [Y] matrix to be used to represent the module at any time-step. Vector ot Matrices (Precalculated) p 1 1 ^35 STATUS (35) (Active (Y] matrix) Fig. 103: The vector of precalculated [Y] matrices. 9. The HVDC Model 141 The smoothing reactor contributes to each of the sixty four matrices with its discrete equivalent conductance, according to the selected integration rule. For the backward Euler's rule, the equivalent conductance of that reactor is 9 smooth = j (163) •^smooth This conductance value will be added to positions —according to Fig. (99)— (9, 9) and (6, 6), and subtracted from positions (6, 9) and (9, 6) in each of the [Y] matrices calculated above. 9.3 H i s t o r y sources i n the hvdc-module Now that the resistive contribution of the hvdc-module to the network's [Y] ma-trix, in any of its sixty four possible o n / o f f valve combinations has been taken care of, let us focus our attention on the current history sources. In the hvdc module, there is one history source from the discrete model of the smoothing reactor, and one history source for each single-phase transformer unit, corre-sponding to the discretization of its short circuit inductance, see Fig. 104. 4 5 Fig-. 104: Discrete time model of the hvdc 6-valve module. Before considering the accounting of each of those history sources into the 9. The HVDC Model 142 total nodal currents, let us examine the history source in the single-phase trans-former unit as depicted in Fig. 105. The short circuit inductance equivalent discretized history source contributes to the total nodal currents of node "a" with a value of plus-/it, and to node "c" with minus-rit; it also contributes to nodal currents of node "c" with minus-a-rit, and to node "d" with plus-o • ht. The voltage across the short circuit inductance that is used to update the history source ht is VL , as expressed in Eq. (164) 9 . 3 . 1 Examples To illustrate the whole process of history current accumulation into the nodes of the hvdc-module, let us consider the two transformer connections included in the code: YyO and Ydll. In Fig. 107 the Ydll connection shows clearly where the different single-phase units are connected within the module. From there and according to what was said in the previous section, the nodal current vector for the YyO connection is shown in Fig. 106. 9 . 4 H v d c matrices The 9 x 9 (or 10 x 10) G-matrix (the Y-matrix is real, thus it is a G — conductance— matrix) of the hvdc module relates the total nodal currents, [h], in the module with the voltages of its nodes, [v], according to Eq. (165). Fig. 105: A single phase discretized short circuit inductance. vL = va - vb - a (vc - vd) (164) 9. The HVDC Model 143 node 1 2 3 4 5 6 7 8 9 10 h x hy 0 - a h x -ahy "s a(hx+hy +hz) Fig. 106: Total nodal currents for 'Ydll' connection. ground ^ Q Fig. 107: Hvdc module with a 'Ydll' transformer connection. [G] [v] = [h] (165) From all the nodes in the model, only the first five will remain visible to the solver, let us call them "a" nodes, and the rest "b" nodes. Making use of this definitions, and subscripts, Eq. (165) can be written using a matrix partition as in Eq. (166). node 'noda 1 2 3 4 5 6 7 8 9 0 -ah 2 h s - a h ^ ahy Fig. 108: Total nodal currents for 'Ydll' connection. 9. The HVDC Model 144 Gab Va Gba Gbb (166) Next, and using the Generalized-Kron's reduction, the system of equations in Eq. (166), becomes the reduced one in Eq. (167). [Grea] [va] = [hred] (167) where Gred — Gaa - GabG^b Gba hred = ha — GabGbbhb 9.5 Interface of the hvdc model and O V N I At each time step, the driver determines the voltages for the "a" nodes, as defined above, based on the history values hA calculated by the module in the previous step; i.e., OVNI calculates v\. Next, it is the module's model turn again. It receives vA, the voltages of the "connection-nodes", and counting on the availability of the hs history values calculated by the model itself during the previous time step, the model proceeds to establish the voltages for the "6" nodes: VB = G^1 {hb - GbaVa) (169) Now, with all the modules nodes voltages, VA and VB (just calculated), the model computes HA and /i# for the next time step. Before returning the hA vector to OVNI, it includes the effect of the reduced nodes like this: Kew <- / C e u - GabG^hb (170) where h%ev is the value of the currents vector ha, before accounting for the in-ternal nodes contributions in vector hb] h™w is the vector once the contributions have been included, and ready to be exported to OVNI as external source's his-tory terms; the matrix product GabGbbl is precalculated and identified as GmiX in the code. 9. The HVDC Model 145 Finally, the module's model returns to OVNI, the core. 10. HVDC-BRIDGE CONTROLLER To explore some of the limitations and capabilities of the HVDC-bridge model developed previously, a basic current control loop model was introduced. This model incorporates a simple proportional-integrative amplifier, receives as input the DC-output current of the rectifier group and, as synchronization signals, the input voltages to the bridge groups, and issues the gate signals corresponding to each of the twelve valves in a pair Yy/Yd transformer-bridge group, see Fig. 109. synchronization, voltages CONTROLLER , current input gate signals Fig. 109: Inputs and output of the simplified current controller. 10.1 B l o c k V i e w of the Cont ro l le r The controller strives to maintain the DC current at a desired value, the refer-ence value. The controller adjusts the firing angle of the valves as it considers 10. HVDC-bridge Controller 147 necessary to achieve that goal. In Fig. 110, a block schematic is shown that illustrates the general struc-ture of the controller modelled. The D . C . raw current, read from one of the H V D C bridges after smoothing, is put through a filter to keep only the D . C . component. The filtered D . C . current is compared against a reference value, and the difference is labelled the error for the purposes of the PI amplifier, the next stage. The PI block produces the raw or apparent needed change in the firing angle, Aa*. This proposed change in alpha is then clipped, if necessary, to keep the firing angle within the limits imposed by the user. Next, in the cycle-position stage, the controller determines whether, including the proposed change, it is time to trigger the next valve. If triggering time conditions are met, the valve-scheduler takes over, produces the necessary gate signal, and activates the ramp-cycle synchronizer that, using as input voltages on the primary of the transformer-group, reset the ramp-cycle counters. raw DC current reference voltage(s) *\ DC filter] DC current jsi signal ^conditioning c u r r e n t Proportionals Integral Aa* Block reference DC clean preference cycle-ramp synchronizer valve-scheduler l< (activate) Y to valves gate pulse CLIPPER limits enforcer Aa f v> cycle-mo position nitor Fig. 110: Controller model block diagram. 10.2 Stage One: T h e D C filter The signal that needs to be kept at the chosen reference value, is the output current of the rectifying HVDC-bridge. Regardless of the smoothing effect of the 10. HVDC-bridge Controller 148 inductive stage in the bridge, the output current still contains some harmonics that need to be filtered out before the current is put to the controller. To extract the DC component from the current, a simple RC filter was used. 10.3 Proport ional- Integrat ive B l o c k In this stage1, and using as input the error (e), that is, the difference between the DC component of the HVDC bridge output current and the reference value, the necessary change in the firing angle is computed as sketched in Eq. (171). ^ = I DC ^reference (171) Aa* = Kp€ + Kt f e • dt To discretize the second part of Eq. (171), one can observe that it describes the current voltage relationship of the series RC circuit fed by a current source, as illustrated in Fig. Ilia. In that circuit, the current has a value of epsilon, e; the voltage is delta alpha asterix, Aa*; the resistance has a value Kp; and the capacitance a value l/Ki. - V v \ — | =© 4= 1 / * c V R • R c i—Wv W\— i © * © Fig. Ill: RC equivalent circuit for the PI block. Once discretized, the equivalent circuit of the PI block appears in Fig. Illb. If the backward Euler's integration rule is used to discretize the circuit, Rc and e(t) are given by Eq. (172). 1 Even if in analog control systems the Pi-block is implemented by an amplifer with the appropriate feedback, and as such has been referred to as the "Pi-amplifier" in that context, in the case of a digital controller, the use of the name block seems more appropriate. 10. HVDC-bridge Controller 149 R = KP Rc=f = Kr.At (172) e(t) = Vc(t - At) From the circuit in Fig. Illb, the voltage across the capacitor can be deter-mined as VC = V - R-i (173) Combining Eq. (173) with Eq. (172c), the history voltage source e(t) is ex-pressed e(t) = V(t -At)-R-i{t - At) (174) We know that the total voltage, V, is but delta alpha asterix, the correction in the firing angle. We also know that the current, i, is the error e. Simplifying our notation for values in the previous integration step by applying an apostrophe to them2, Eq. (174) becomes e =A'a - Kpe' (175) where A'a is the correction of the firing angle at the previous time step; and e' is the error at the previous time step. The total voltage across the RC group, V, is then calculated v = e + (R + Rc)i = e + RT-i (176) Substituting previous equations into Eq. (176), the last one becomes Eq. (177). A a = A'a - Kp • e' + (Kp + Kr • At) e (177) where A'a — Kp • e' is called hist in the code since it depends on previous step's values of error and angle change; also (Kp + Kr • At) is the value of the resistor RT in the code. 2 That is, for any function of time, a; = f(t), x = x(t), and x' = x(t - At). 10. HVDC-bridge Controller 150 At every time step, the necessary change in the firing angle is then computed, Aa = hist + RT-e (178) Now all that remains is an efficient formula to update that history value, hist. At the previous time step the correction is also given by Eq. (179), i.e. A'a = hist' + RT • e' = hist' + Kp.e' + K:.e' (179) Substituting this into the definition of hist implicit in Eq. (177), the updating formula for the history value hist is hist = hist' + Kj At e' = hist' + Rc e' (180) At every time step Eqs. (178, 180) are used. The first one to determine the necessary change in firing angle, the other one to calculate the hist value that will be used at the next time step. 10.4 C y c l e pos i t ion moni tor and the Valve Scheduler The controller issues gate signals both for the six valves of a YyO-transformer-bridge module as for the six valves of a Ydll-transformer-bridge module, as intimated by Fig. 109. However, to simplify the explanation of the cycle position monitor (and of the valve scheduler), it is better to review the process when applied only to one of the modules, let us say the YyO one. After the method is explained, the combined effect of both types of bridges is accounted for. In what follows, and to simplify the description of the processes, valves in the bridge are numbered from zero to five, and connected to phases A, B, and C of the transformer secondary according to Fig. 112. Further down this section, when need arises to refer to valves in both types of modules, YyO and Ydll, the valves will be labelled: YQ, YI, Y2, Y3, Y±, and Y5 for the YyO module; and D0> Di, D2, Dz, £>4, and £>5 for the Ydll module. Figure 113 shows the voltages in phases A, B, and C, connected to the bridge as depicted in Fig. 112. In Fig. 113a, also, if firing angle is set to zero degrees (this controller is symmetric in the sense that the same firing angle is 10. HVDC-bridge Controller 151 A-B-C -Fig. 112: A full-wave valve bridge, with valves and phases identified. applied to all valves), valves need to be fired at the time points and sequence there indicated. Time points which are separated by the constant (under no controller modulation) interval of sixty degrees (translated into time units, to be sure). valve 0 valve 2 valve 4 valve 0 valve 0 valve 2 valve 4 valve 0 0 O005 OOi 0015" 0.02 Fig. 113: a) Firing time points when alpha is zero; b) Firing points when alpha is not zero. This effect can be produced by two separate but combined data processes: a counter, tick, that goes from zero to sixty degrees, the reference, held in variable tickRef (with some modification, to be seen), and is compared at each time step 10. HVDC-bridge Controller 152 against its limit, sixty. When the counter, tick, hits the limit, a valve needs to be fired; which valve to fire, is the question answered by the second data process, an infinite periodic sequence, 0, 1, . . . , 5, 0, 1, . . . , 5, etc., simulated by an array of six elements, aValveSequence, and an index that wraps around, iNextValveToFire. These two data processes can be visualized, the first by a saw-tooth ramp, as in Fig. 114; and the second one, by a circular array, see Fig. 115. Uick tickRef > fir ( f 1 i i 1 e fire fire fire fire ) 1 2 3 4 F i g . 114: T h e ramp signal and the model 's variables for a = 0. Fig. 115: D a t a structure to select next valve to be fired, when the ramp so requests. If a Yd-module is controlled by the same control unit than the previous Yy-module, gate signals have to be issued each 30°, one for the Yd-module, and next one for the Yy-module, according to the sequence: DQ, YQ, DI, Y\, D2, Y2, D^, 10. HVDC-bridge Controller 153 /Mick fire DO fire fire fire YO D1 Y1 f 1 fire D2 Fig. 116: The ramp signal and the model's variables for a = 0, when gate signals are issued for Yy and Yd modules. F 3 , -D4, Y±, L>5, K 5, and repeat. That is twelve possibilities. In this case tickRef is 30°, and aValveSequence is complemented by a parallel array: aValveGroup, that indicates if the next valve to be fired is in a Yd-module, zero-code, or in a Yy-module, one-code. In this case, the index variable, iNextValveToFire, wraps around at 11 down to zero. See Figs. 116 and 117. Fig. 117: Scheduling the next valve to be fired: index, iNextValveToFire; and arrays: aValveGroup and aValveSequence. 10. HVDC-bridge Controller 154 10.5 C y c l e R a m p Synchronizer At the beginning of each cycle of the input voltage, the position of the tick counter within the cycle of the reference signal needs to be determined. To do so, the reference point a = 0 in Fig. 113a, is obtained as the moment when the two voltage reference signals, voltages of phases a and c, are equal and positive. In the first implementation of the controller, a semi-infinite bus with constant frequency is assumed at the primary of the transformers feeding the bridges, under that assumption synchronization becomes a simple task of keeping track of the number of integration steps that have passed by, and comparing the count with the number of steps per cycle, i.e. no need for the additional input sketched in Fig. 109. However, under more general conditions, that signal may come from a less ideal source and present some higher harmonic content that forces upon us the introduction of some kind of filtering to extract the fundamental of the voltages in phases a and b before comparing them. For details of this reference fundamental extraction see § 10.7. at the end of this chapter. There, a simplified and sufficiently accurate filtering scheme with high computational efficiency is described. This was the filter adopted for this controller. A tick value of tick at the, beginning of a cycle FIRING WALLS (firing angle) Fig. 118: Firing walls and initial value of the tick ramp counter at the beginning of each reference cycle. In the previous section, to determine when to fire a valve, we used a step counter, tick, incremented at each time step, and checked if it had hit one of 10. HVDC-bridge Controller 155 the vertical edges of the sawtooth wave we used to explain the operation of the firing process in Figs. 112 and 116, repeated here as Fig. 118 for convenience. Let us call those vertical edges firing-walls. So the process of firing is reduced to counting steps, and waiting for the counter, tick, to reach the next firing-wall. At the beginning of a cycle, that is when va is equal to vb and positive, we determine how far from the next firing-wall the tick counter is. This process also sets the index iNextValveToFire at the right position within the arrays in Fig. 117, above. All this process was implemented in the method CalcTicklniCycle of the class ctl_t, the class that describes any controller entity. The name of the method stands for " Calculate the value of Tick at the Initial moment of the Cycle". As input, it takes the firing angle a, and returns two values: the correct value for tick, and the position for index iNextValveToFire. Depending on whether the firing angle is in the intervals between one and 30°, or between 30° and 60°, or any of the other 30° wide intervals shown in Fig. 118, the two output values are calculated as in the following code listing: int clt_t::CalcTicklniCycle( double alpha ).{.'• // It returns the position of "tick" at beginning of cycle, // and sets up index INextValveToFire. i f ( 1 <= alpha £& alpha < 30 )( INextValveToFire =0; return int( 30.5 - alpha ); }else i f f alpha < 60 ){ iNextValveToFire = 0; return int( 60.5 - alpha ); }else i f ( alpha < 90 ){ INextValveToFire « 0; return int( 90.5 - alpha ); Jelse i f f alpha < 120 ){ iNextValveToFire - 0; return int( 120.5 - alpha ); )else i f ( alpha < 150 ){ iNextValveToFire - 0; return int( 150.5 - alpha ); lelse i f f alpha < 180 ){ iNextValveToFire = 0; return int( 180.5 - alpha ); }else{ // Error condition! ) ) 10. HVDC-bridge Controller 156 10.6 M o d u l a t i n g the firing angle At each time step, and using the formulas in Eqs. (178) and (180), the controller determines the necessary change in the firing angle, Aa. This change in alpha is the "time distance" that the firing walls need to be displaced to the right, or, what is equivalent, by how much we need to move the tick counter to the left (easier, since it is a single operation). Then, the tick counter is compared versus the next firing wall, if there is a hit a request to fire is issued as seen in previous sections. This functionality is implemented in the method SenseAnd-SetUpGateSignalsQ, the core ofthe controller, in the listing that follows. // This code does not use DC prefiltering. // First, the proportional/integrative section: error = hvdc[ ilnHVDC ].GetldcO delAlpha •+= Rt * error + hist; hist += Rc * error; // Clipping,To respect min and // max values of alpha. newAlpha = alpha + delAlpha; i f ( newAlpha > alphaMax ){ delAlpha = alphaMax - alpha; }else i f ( nevAlpha < alphaMin ){ delAlpha = alphaMin - alpha; } // Yes, alpha goes in degrees, // but time here i s discrete, // so convert delAlpha into // "steps". delAlphaSteps = ... // Now, let's check i f the "ramp" // hit the firing wall! - iRef; // In amperes. // Accumulate change. // Update history term. an array with all the hvdc modules in the system. hvdcfj i l n H V D C which HVDC's output current is controlled by the CTL unit. method that delivers the output DC current of that HVDC module. tick++; // Up goes the ramp! i f ( tick - delAlphaStep >= tickRef ){ // Bang! Time to FIRE! alpha += delAlpha; // Change in firing angle accepted! delAlpha — 0; // We can start accumulating change again, tick = 0; // Reset the "ramp". // Now, let's schedule...what valve to fire!? activeGroup = aValveGroup[ iNextValveToFire ]; activeValve = aValveSequence[ INextValveToFire ]; // Point to next valve, for the next time step. i f ( -H-iNextVal veToFire > 11 ) // Wrap around, 0..11 valves! iNextValveToFire = 0; (CONTINUES...) 10. HVDC-bridge Controller 157 (...COMES FROM PREVIOUS PAGE) // Now issue the gate signals. // Sets the b i t i n the "gateSgnl" of the "activeGroup" // (Odelta, l=wye) corresponding to the "activeValve". gateSgnl[ activeGroup ] |= 1 « activeValve; //To control the pulse width, we reset the counter, // which, incremented every time step, is used to decide // when to turn the gate signal off for that "activeValve" // of that "activeGroup". pulseWidthCounter[ activeGroup ][ activeValve ] = -1; } // Ends IF fir i n g wall was hit! I — L gateSgnl[][] bits(valves) ^ • v ^ 5 4 3 2 1 0 delta (0) 0 0 1 1 0 1 wye(1) 1 0 0 1 1 0 gate signals are efficently passed to the HVDC bridges, as bits encased into a convenient integer variable, gateSgnl. Next, the controller gets synchronized with the voltage signals at the primary of the transformer, as was seen in a previous section, and, finally, the controller checks for gate pulses due for termination in each of the twelve valves, as in the listing on the next page. Now some final implementation notes. To simplify the counting of degrees at each step, during initialization the controller calculates the coefficient steps Per Degree = 1.0/(360 * FREQ * deltaT) Also during initialization, the controller converts the counter limit, 30°, into 10. HVDC-bridge Controller 158 f o r ( g r o u p =0; g roup < 2; group-H- ){ / / F o r D o r Y c o n n e x t i o n s , f o r ( v a l v e = 0; v a l v e < 6; v a l v e ){ / / F o r e a c h v a l v e , / / I f t h e p u l s e r e a c h e d i t s l i m i t i n w i d t h . . . i f ( ++pulseWidthCounter [ g roup ] [ v a l v e ] >=> p u l s e W i d t h ){ p u l s e W i d t h C o u n t e r [ g roup ] [ v a l v e ] = - 3 0 0 0 0 ; / / L a r g e n e g a t i v e ! g a t e S n g l [ g roup ] &= - ( 1 « v a l v e ) ; / / T u r n s o f f g a t e s i g n a l ! } } } integration step count and puts it in variable tickRef. tickRef = integer jpart-of (30 * steps Per Degree + 0.5) 10.7 Filtering the angle reference voltage In this work a simplified and computationally highly efficient filter was used to extract the fundamental component out of the angle reference voltage (VAC — VA - Vc), a parallel RLC filter, as illustrated in Fig. 119, tuned to the AC network rated frequency. The bandwidth should be narrow enough as to filter out the high frequency components introduced in this voltage by the switching of the valves; but chosen appropriately, it can include both 60 and 50 Hz with the same parameter values. It was chosen to tune it to f0 = 50 Hz, with a bandwidth B = 34.3 Hz, with half power frequencies at f\ = 35.7 Hz, and / 2 = 70 Hz respectively. In this type of filter, the resonance frequency in rad/sec is given by Also, the bandwidth B can be calculated: 1 B = u2 - ui = — 10. HVDC-bridge Controller 159 Fig. 119: Filtering the angle reference voltage signal. The resonance frequency is the geometric mean of the half power frequencies: From all said above, and the last three equations, the filter parameters chosen were: R = 45.81 fi; L = 0.1 H; C = 101.32 fiF. Fig. 120: Discretized version of the reference angle voltage filter. In Fig. 120, the discretized version of the filter can be seen. The input signal (voltage between phases o and c of the primary of the transformer) is fed into this filter as a current ij^ and the filtering proper is achieved in only two sums and one multiplication: Vfiltered = Req{hc + + */iv), 10. HVDC-bridge Controller 160 where i/jv is numerically identical to VAC-Using backward Euler's as the integration rule, during initialization of the controller the constant discrete equivalent conductances for the capacitor, gc, and for the inductor, gL, are calculated a$ ^ 9 = R ' 9 c = Xt> 9 L = T Then, also during preprocessing (i.e., at initialization), the equivalent resis-tance is determined according to 7? 1 9 + 9L + 9C At every time step, the two history sources seen in Fig. 12 and used in the filtering equation are updated according to hL = h'L - gL -v' he = 9c • v\ where v' is the previous time step value of the filtered voltage. The effect of this filter can be appreciated in Fig. 121, where voltage Vac is compared to the output of the filter, its fundamental. : : —\ . . . . . . A" V . . . . . . . A-"\\ t -T 0 1 a O . I M o I T a i r s o . i a o . ias o . i a 0 . 19s 0.2 Fig. 121: Reference angle voltage Vac and its fundamentals obtained by the filter de-scribed in this section. 11. MODELLING SATURATION IN POWER TRANSFORMERS The transformer model described in the HVDC multi-state model section of this report is a linear one; i.e., saturation in the core is not considered. To incorpo-rate the effect of magnetic saturation, two different situations were considered, namely: three-phase banks of single-phase units [4]; and three-phase units with coils mounted on a three-leg core [66]. 11.1 Sa tura t ion i n single phase units When the three-phase transformer is a bank of single phase units, independence of magnetic paths in each of the three phases simplifies modelling of saturation in the core. Magnetization of the core is accounted for, in this case, by a non-linear inductor connected across the low-voltage side of the single-phase unit, as in Fig. 122. Fig. 122: Magnetization branch in a single-phase transformer (non-linear) Given the magnetization characteristic of power transformers for these appli-cations, see Fig. 123a, magnetization currents when the core is not saturated can be safely neglected. Hand in hand with the previous modelling compromise goes the accuracy and convenience of representing the magnetization characteristic of the core by a two slope curve, as in Fig. 123b. U t . 11. Modelling saturation in power transformers 162 slope = Isoi Fig. 123: a) Magnetization of a transformer core (typical); b) Two-segments piecewise magnetization curve used. Summarizing: a magnetization branch is not included in the equivalent cir-cuit unless saturation is detected during simulation; once saturation is sensed, an inductor is introduced as shown in Fig. 124, with the value of the slope in the saturated part of the characteristic in Fig. 123. Data required from the user includes, the flux-linkages value for the saturation knee in Fig. 123, Xsat, and the slope of the saturated part of that curve, Lsat, that is: LSat = ^r, forX > Xsat (181) close, if flux is in saturated region Fig. 124: Saturation modelling for a single phase transformer. 11.2 Satura t ion i n three-phase units When coils for the three phases are mounted on a three-phase magnetic core, interaction of magnetic flux among the three legs and the surrounding media creates a more complicated scenario. In this case, the non saturated three phase unit is modelled by its open circuit test values: F0° and Y+, the open circuit admittance for zero sequence, and the open circuit admittance for positive (and 11. Modelling saturation in power transformers 163 negative) sequence. An approximation is made since F0°c >> Y0+Cl, when the phase self and mutual admittances are calculated according to Eqs. (182), we can safely neglect and write the magnetization non-saturated matrix as in Eq. (183). Saturation in three-phase units is modelled by V _ Y°+2Y+ ^ Y° / s - 3— ~ ~T Ym — _ Y°-Y+ 3 Y° (182) [Yns] XI 3 YI 3 Y° L 3 XI 3 XI 3 XI 3 XI 3 XI 3 XI 3 . (183) A non-saturated three phase transformer unit is represented by the models of each of the phases with a coupled group of magnetization admittances that shunts the three phases to ground, as in Fig. 125. coupled group Fig. 125: Non-saturated three phase core transformer. Flux in each phase in monitored and, if in a particular phase, flux enters the saturated region of the magnetization characteristic, a saturated magneti-zation equivalent inductance, with the same value as described in Eq. (181), is 1 For three-leg cores. 11. Modelling saturation in power transformers 164 introduced in shunt with that phase, as illustrated in Fig. 126, for the case of phase-a's leg saturation. Fig. 126: Three phase core transformer with phase-a's leg saturated. So, all counted, there are eight possible [Y] matrix contributions for three phase unit, be it a three phase core device, or a bank of single phase units. The eight possibilities account for all possible saturation states in the three legs, magnetically independent or not. 11.3 K e e p i n g track of a phase-leg's flux To determine whether a core leg is saturated, it is necessary to keep track of each leg's flux linkages at every time step. To do this, beginning with the phase voltage, v(t), at the end of the last processed integration step, starting with Faraday's Law (see Eq. 184); then integrating both sides along the time interval between (t — At) and t, and using the backward Euler's integration rule to approximate the definite integral on the left side, we obtain the discrete equation on the right hand part of Eq. (184). The last expression in Eq. (184), once reorganized as in Eq. (185) can be v = — =• v(t) • At « X(t) - X(t - At) (184) 11. Modelling saturation in power transformers 165 used to keep track of the phase's flux linkages at each time step, provided one knows the flux linkages at the previous time step, and the current voltage across the phase coil (on the side on which Lsat, and Xsat were specified). If the leg-flux linkages just calculated happen to jump over the saturation knee defined by A s a t , the saturated inductor Lsat needs to be introduced in the model shunting the corresponding phase (as in Fig. 126, for the case where saturation of the leg corresponding to phase a was detected). Fig. 127: Non-saturated magnetization in three phase core transformers. 11.4 Mod i f i ca t i on of the H V D C - m o d u l e model to include saturat ion First, let us consider the non-saturated magnetization branch, NSB (only for three-leg cores), and its relationship with the linear HVDC-module model, Fig. 127 From the open circuit test data provided by the user, Y° and Y+, one deter-mines the coupled group of L's, the NSB, as represented by the admittance A(i) = A(t - At) + v(t) • At (185) 0 HVDC module matrix [Yns], Eqs. (186, 187, and 188). Ys = Y° + 2Y+ (186) 3 Y°-Y+ (187) 3 11. Modelling saturation in power transformers 166 [Yns] = V Y Y Ym Ys Ym Y Y Y l m * m 1 s (188) The inductance matrix, or rather its inverse, [L] \ is readily obtained from Eq. (188) result as explained in Eq. (189) below. [L] = 2 T T / • [Yn8] Where / , in hertz, is the frequency of the open circuit test. (189) a • V 7 • tit • Fig. 128: Phase voltages and non-saturated magnetization currents. As we are representing the non-saturated magnetization phenomenon by a group of coupled inductances as seen in Fig. 127, the relationship between phase voltages (grouped in vector [v]) and non-saturated magnetization currents (grouped in vector [i]) is: Va ia Vb ; W = ib ic_ (190) Where [L] is the inductance matrix whose inverse has been obtained in Eq. (189). Integrating Eq. (190) between instants (t- At) and t, and simplifying notation: [v] = [v(t)\ and [v1] — [v(t — At)}, same for currents. J [v] • dt = [L] ([»] - [i']) t - A t (191) 11. Modelling saturation in power transformers 167 Next, we approximate the left-hand side integral in Eq. (191) using backward Euler's rule, and obtain Eq. (192). [v] • At = [L] ([i] - [i']) (192) Premultiplying Eq. (192) by [L] _ 1 , from Eq. (189), and solving for [i], the non-saturated currents at the end of the active integration step: [i] = At-[L]~l [v] + (193) Defining the matrix [Gn$] and the vector [hns] as in Eq. (194), Eq. (193) can be rewritten in its canonical form, shown in Eq. (195). [Gns] = At • [L]-1; [ M = -K] (194) [»] = [Gn.][v] - [hns] (195) Inclusion of this [Gns] matrix into the [G] matrix of the HVDC-module is illus-trated in Fig. 129. 0 1 2 3 4 Coupled group of L's \ representing non-saturated magnetization. Fig. 129: Including the non-saturated magnetization matrix, [Gns], into the HVDC-module [G] matrix. When any leg becomes saturated, an inductor with a value Lsat, supplied by the user (see § 11.1 in this chapter, pag. 161), is connected between either node 0, 1, or 2 (depending on which leg became saturated) and ground. See Fig. 130. In this case the equivalent conductance, using the backward Euler's integration rule: 11. Modelling saturation in power transformers 168 9sat — (196) 0 HVDC module non-saturatedt magnetization X Fig-. 130: Modelling saturation in the core. is added to the diagonal element in the module's [G] matrix, corresponding to that node. The inclusion of the three switches outlined in Fig. 130, raises the number of possible status of the whole extended module (that is, including the magnetization effect) from 26 up to 29. To represent the status of the extended module, three more bits will be necessary in the status word, which brings the number of precalculated C7-matrices per HVDC module up to: Those matrices continue to be 5 x 5 ones, which in double precision repre-sentation amount to: a small memory investment for the enormous performance benefit obtained. 11.5 H i s t o r y sources in t roduced by magnetizat ion model l ing Six new current history sources need to be included and updated by the model. One for each saturated branch, and three from the coupled group of non-saturated magnetization model, as shown in Fig. 131. 2 ( 6 + 3 ) = 512 matrices 5 x 2 x 8 x 512 = 40,960 bytes = 40 kbytes i l . Modelling saturation in power transformers 169 Fig. 131: The six history sources introduced to model magnetization in the trans-former. Each of the saturated branch history sources, hs, is updated, after using back-ward Euler's rule for discretizing the corresponding inductance, by the formula in Eq. (197), where gsat is defined in Eq. (196) for inductor k, where A: = 0,1,2. hneXt,teP = ^ _ ^ . ^ ( l 9 ? ) For the non-saturated modelling group, the three history sources, connected as in Fig. 131, are updated by Eq. (198) —again using backward Euler's. [hneXt,teP] = [ M _ r g ^ j ( l 9 g ) 11.6 Effect of the saturat ion model l ing i n the p r imary current In Fig. 132 below, the current in the phase a of the primary of an HVDC module transformer is shown ignoring saturation of the core, that is, a linear core transformer is assumed. In Fig. 133, for the same situation depicted in Fig. 132, the saturation of the transformer core has been modelled as described in this report, and occurrence of peaks and valleys in that current corresponds to the expected results. 11. Modelling saturation in power transformers 170 Fig. 132: Primary current with a linear model and EMTP simulation. DSDI, §7.7. Microtran/EMTP core under steady state conditions, OVNI's The large spikes belong to OVNI's before avoids them using CDA [10]. Fig. 133: Primary current with a saturated core under steady state conditions, OVNI's model and EMTP simulation. See caption to Fig. 132. Part V IMPLEMENTATION 17/-12. OVNI, THE SIMULATOR'S ENGINE 12.1 Introduction The best, up to date, and most complete description of the core is the code itself. As the next best thing, this chapter describes succinctly the implementation of the inte-grator proper. OVNI is an OOP application written in C++1. Each one of the major parts of the solution: clock, network, events, blocks, subblocks, elements, history sources, etc., is represented in OVNI as an object, an instantiation of some class, as described in what follows. 12.2 Input Data File Data to the engine comes in human readable format. That data file is created by OVPP, the preprocessor, described in the previous chapter. The file presents several labelled "environments2." Each environment starts with the keyword . B E G I N followed by a label that identifies the particular environ-ment: G E N E R A L , E L E M E N T S , B L O C K S , E V E N T S , etc. Each environment finishes with the keyword . E N D and the same label used in the opening .BEGIN of that environment. Inside most environments, there are subenvironments, for instance, in the E L E M E N T S environment there is a subenvironment for transmission lines, . B E G I N L I N E S E N D L I N E S , and inside again a separate subsuben-vironment for each particular line: . B E G I N L I N E - 3 E N D L I N E - 3 . Data items inside environments begin with a label separated by a colon from its value, for example: charac_impedance_per_mode: 7 2 4 6 1 5 6 1 5 . All of this makes the input file easy to read for the user, if need arises, but not to write, which is the complex job of OVPP. ' The first version of its core was written originally in Ada95 [67]. 2 Which are akin to LaTeX's environments [71]. (71-12. OVNI. the simulation engine 173 12.3 Names in O V N I A uniform hungarian [70] notation was used in labelling variables and types in the core's code. Variable names begin with a lowercase letter, functions with an upper-case one, constants enjoy a full uppercase name, type descriptors end with an underscore-tee. The different entities isolated by the solution are abbreviated by a three letter code, as follows in the extract from the code included in Fig. 134. / / • • • T T A N D A R n A f i T V F V T A T T f l M ' ? , .. / / // BLK = b l o c k . // CHM = c h a m e l e o n . // CSR c u r r e n t s o u r c e . // ELM = e l e m e n t . // EVN = e v e n t ( s w i t c h i n g e v e n t , e t c . ) // HSR = h i s t o r y s o u r c e . // LNK l i n k . // NET = n e t w o r k . // NOD = n o d e . // NTJM = number (as i n number o f i t e m s , e x . : numNod, n u m B l k , e t c . ) // PAR = ( s u f f i x ) p a r a m e t e r ( t o a f u n c t i o n , when name i s a m b i g u o u s . ) // SCH = s w i t c h . // SIM = s i m u l a t i o n . // SRC = s o u r c e . T Fig. 134: Standard abbreviations in OVNI. The hungarian notation prefixes adapted for use in the code can be seen in Fig. 135, below. / / V A R I A B L E NAMES CONVENTIONS / / T h i s p r o g r a m u s e s t h e " H u n g a r i a n " c o n v e n t i o n t o name i t s v a r i a b l e s . / / I n p a r t i c u l a r , v a r i a b l e s whose names s t a r t w i t h a l o w e r c a s e : // p = p o i n t e r s . E x . : pNod , i s a p o i n t e r t o a node s t r u c t u r e . // a = a r r a y . E x . : aNod , i s an a r r a y o f node s t r u c t u r e s . // apNod , a r r a y o f p o i n t e r s t o node s t r u c t u r e s . // i = i n d e x i n t o a n a r r a y . E x . : i N o d , i n d e x i n t o an a r r a y o f n o d e s // g g l o b a l v a r i a b l e . // m = m o d u l e v a r i a b l e . ( G o b a l w i t h i n t h e m o d u l e ) . // c = c o u n t . E x . : c N o d P e n d , c o u n t o f n o d e s t h a t n e e d p r o c e s s i n g // e = e l e m e n t o f a n a r r a y . // d d i f f e r e n c e b e t w e e n two v a r i a b l e s o f t h e same t y p e . // X = p a r a m e t e r t o a f u n c t i o n . U s e d when t h e r e i s a m b i g u i t y . ' I I Fig. 135: Hungarian notation prefixes as used in OVNI. Also, modular variables (those visible only within a C++ file) begin with a lower-case m letter. Global variables, when they exist at all, exhibit a lowercase g as the first letter of their names. As an example, the network node registry array, to be 12. OVNI, the simulation engine 174 introduced in the next section, is a module visible variable within the netj file: mapNodZer. It is a module visible (m), aray (a), of pointers (p) to nodes (nod), indexed from zero up (zer). 12.4 F r o m nodes to the network The simplest and most basic entiy in OVNI's description of the network is the node. A node was represented originaly by the structure in Fig. 136. Two pieces of data define the state of a node, its voltage, v (defined with respect to the reference node), and its total curent, h. s t r u c t n o d _ t { d o u b l e re- / / T o t a l c u r r e n t e n t e r i n g t h e n o d e . d o u b l e V ; ) ; / / V o l t a g e t o r e f e r e n c e n o d e . i Fig. 136: Structure that represented originally a node in OVNI. The network simulated in OVNI is a conglomerate of nodes associated accord-ing to a connectivity matrix defined by the elements. Nodes connected galvani-caly,3 but not including both ends of any link, are clustered together into an aray which is put inside a subblock entity, an instantiation of the class subj, as in Fig. 137: Node array inside a subblock object. Fig. 137. Regardless of where the actual nodes are (each as an element of an aray in one of the subblock objects described later in this chapter), to keep track of each one of them, the network (unique instantiation of the class netj) maintains an aray of pointers to the nodes which is initialized right before the simulation begins, the That is, not connected to both ends of the same transmission line. 12. OVNI, the simulation ensine 175 II NOD_T / / Every node i n the network i s accounted for i n an a r r a y , mapNodZer, / / which i s a data member of the "net" c l a s s . Each node corresponds / / to one element i n t o t h i s a r r a y . In t h i s implementation the a r r a y ' s / / name i s 'mapNod' (an a r r a y of p o i n t e r s to s t r u c t u r e s ~nod_t). / / The t o t a l number of ex terna l nodes i n the network (nodes which are / / v i s i b l e to the core of the i n t e g r a t o r , as oppossed to nodes i n s i d e / / the models themselves) . Ground, or reference node, corresponds to / / the zero th element, mapNodZer[0]. Example: to r e f e r to the a c t u a l / / name of the node whose index i s 6 . . . mapNodZer[6]->name. / / A l s o , ground/reference node i s ass igned b lock #-1, and sub-block #-1, / / which of course i s a n o n - e x i s t i n g b l k / s u b . (See d e f i n i t i o n s above). s t r u c t nod_t { char sName[MAX_LENGTH_N0DE_NAMES+1]; / / A c t u a l name of the node, i n t i B l k ; / / Which t o p o l o g i c a l b lock i t belongs i n . i n t iSub; / / Which sub-block i n s i d e that ' b l o c k ' . i n t iPosInSub; / / R e l a t i v e p o s i t i o n of node w i t h i n sub-b lock . REAL *pH; / / Po in ter to a c t u a l node current f i e l d . Fig. 138: A node registration item, an element of the node registry array. network nodes registry, mapNodZer. The array element is seen in Fig. 138, and the network mapNodZer Fig. 139: Network registry of nodes, and their spatial relationship with the nodes, subblocks, blocks, and the network. 12. OVNI. the simulation ensine _ l_76 II H S R _ T / / E v e r y e x t e r n a l h i s t o r y s o u r c e i s o n e i n s t a n t i a t i o n o f t h i s c l a s s . c l a s s h s r t { p r i v a t e : R E A L v a l u e ; / / A c t u a l v a l u e o f t h e c u r r e n t s o u r c e . R E A L * p N o d F r o m H ; / / P o i n t e r t o a c t u a l ' f r o m ' n o d e c u r r e n t f i e l d . R E A L * p N o d T o H ; / / P o i n t e r t o a c t u a l ' t o ' n o d e c u r r e n t f i e l d , p u b l i c : R E A L * G i v e A d r H s r () { r e t u r n l v a l u e , - } ; v o i d S e t F r o m N o d H ( R E A L * p ) { p N o d F r o m H = p ; } ; v o i d S e t T o N o d H ( R E A L * p ) { p N o d T o H = p , - } ; v o i d D r a i n A n d P o u r ( ) { * p N o d F r o m H - = v a l u e ; * p N o d T o H + = v a l u e ; } ; i Fig. 140: The external history source class, hsrj. registry array itself and its spatial relationship with the nodes, in Fig. 139. The next most basic entity in OVNI is the history source, an object instantiated from the class hsrj, seen in Fig. 140. History sources are allocated at the request of the corresponding element, and clustered together into an array under the supervi-sion of the network object itself. Each history source is granted access to the current field of each of its nodes (the h field in Figs. 136 and 137). And, when fulfilling the request for allocation, the network provides the client element with access to the "value" field of the source. This allows for the element updating of its history sources without the overhead of message passing imposed by a more orthodox OOP4 approach. See Fig. 141. Fig. 141: Relationship among the elements, their history sources and the subblock's 12. OVNI. the simulation engine 177 In increasing order of complexity, our attention now turns to the element class, to the models of the physical elements that embody the network. Element models, in their immense and ever growing variety, are not part of the simulator core. But being the intense centers of activity they are, the data exchange with the core, and a generic outline to a highly efficient implementation of models was provided in a previous chapter (under the heading of node-hiding). That outline is implemented as / / E L M _ T / / E v e r y e l e m e n t i n O V N I i s a d e s c e n d a n t o f t h i s c o m m o n a b s t r a c t c l a s s . // c l a s s e l m _ t { p u b l i c : v i r t u a l v o i d R e a d D a t a ( F I L E * f ) v i r t u a l v o i d U p d a t e H s r ( ) ; p r o t e c t e d : I N T c N u m X N o d ; // N u m b e r o f e x t e r n a l n o d e s . I N T c N u m X H s r ; // N u m b e r o f e x t e r n a l h i s t o r y s o u r c e s . I N T * a X N o d I d ; // E x t e r n a l n o d e s , a s i d ' d b y t h e n e t w o r k . p C o n s R e a l _ t * a p X N o d V ; // P o i n t e r s t o t h e X - n o d e s v o l t a g e s . R E A L * * a p X H s r ; // P o i n t e r s t o t h e e x t e r n a l h i s t o r y s o u r c e s . v o i d G e t B a s i c D a t a ( F I L E * f ) i Fig. 142: The element abstract class elmj. an abstract5 class elmj, Fig. 142, from which more concrete ones will be derived as descendants, inheriting in the process the service definitions necessary for the op-eration of the core. The core will exchange messages and services with the elements through the common interface provided by that abstract class. Every element model is kept track of by a pointer in an element registry array maintained by the network object, mapElm. The relationship of those elements to the external nodes they are connected to, and to the external history sources they are contributing to the net-work, is seen in Fig. 141. Subblocks are associated to one another either by links (in the MATE sense), or by transmission links. Subblocks connected by links are said to belong in the same block, according to the convention established in the discussion on MATE segmen-tation. In this sense, a block can be perceived as a cluster of subblocks. In OVNI's 4 Object Oriented Programming. 5 In OOP parlance, an abstract class is one from which no actual objects are created. 12. OVNI. the simulation engine 178 current implementation, a block is an instance of class blkj, and contains an array of subblocks, aSub. The links that determine the cluster of subblocks identified as a block are described by a simple structure with fields that identify the subblocks and nodes it is connected to, its resistance (if any), and its associated voltage source (if any). Such links are grouped in an array inside each corresponding block object. Independent voltage sources associated to links are part of the block, they are ac-counted for as an array of structures with vectors of precalculated values, with an associated number of samples, and the ubiquitous time index. Grounded voltage sources belong inside subblock objects, and include not only the array of precalcu-lated values, the number of samples, and the time index, but also all the precalcu-lated components outlined in section 9.4.1. 12.5. Classes in O V N I Several of the classes in the engine have a unique instantiation: network, clock, simulation, event handler. They were developed originally as Ada83 modules that became ADT's modules in C++.- All other classes spawn multiple objects represent-ing every block, history source, element, etc. This last group is implemented as C++ classes.6 OVNI's classes description begins with the entity of the problem space that suggested OOP technology as a convenient paradigm to implement the solution, the element. 12.5.1 The Element Class, elm_t Decades of EMTP experience have made it clear that an application of the nature of OVNI's is bound to start with a core, presented in this thesis, and develop with contributions of element models coming from several sources, and at different times in the future. As model developers plug their creations into OVNI, the core must be able to continue to operate and remain unchanged. That unburdens model developers, and protects the core from careless unwilling introduction of errors7 into its main code. OOP promise of encapsulation provides for such protection. However, given 6 They were Ada95 tagged records, in the original conception of the solution. 7 The euphemistically called bugs. 12. OVNI. the simulation ensine 179 allow for (in theory) all future possibilites of the needs of models, as supplied by the core. This need is provided by OOP's polymorphism, that makes it possible for OVNI to deal with all element models, present and future, as if they were "forms" of an abstract sort of element, an abstract class in OOP parlance, an elmj. All ele-ments, included and to be developed, are instances of classes that derive their func-tionality from that abstract class. Class elmj is a common ancestor to all element classes in OVNI. Interaction between the core and the element models include: requests by the core (the client) for the element (the server) to update the external history sources that the element contributes to the network around it; request by the chamaeleonic (non-linear) element (the client) to the core (the server) to update the corresponding subblock conductance matrix due to the element's recent topological change; request by the element (client again) to the core (server) to provide the addresses (without permission to write) of the voltage fields of the nodes that the element is connected to; request by the element (client) to the core (server) to provide the addresses (with writing permission) of the current fields of the history sources that the element will have to update at every time step, when so required by the core (see the first service listed here.) The interaction between an element and the rest of the network occurs at the so called external nodes. The element keeps track of the number of nodes that connect it to the rest of the network (external nodes), the number of history sources that the element contributes to those external nodes (external history sources), and identifica-tion of each of those nodes, and of each of those history sources. In the current implementation, to improve the performance of the solution, elements are kept abreast of the nodes voltages and allowed to update the corresponding external history sources without incurring into method calling overhead. In short, elements are provided by the core with pointers to constant values that take them to the nodes (which belong inside a certain subblock object) voltage fields directly, but prevent them from modifying those values unwittingly. Otherwise, the element would have to request the corresponding information service from the network, that would pass the message to the block in question, who in turn would advance the message down to the subblock that contains the node, a lengthy and expensive message passing. The pro of the taken approach is improved efficiency, the cons include the waiving 12. OVNI. the simulation enzine 180 of some independence between the classes. But that last price has been kept at a minimum by making the data accessed by the element, atomic, that is, of an unstruc-tured type (floating point values). 12.5.1.1 Methods provided by elmj In Fig. 142, a view of the abstract ancestor class of all the elements in O V N I , elmj is included. In that figure, the arguments common to all elements in O V N I can be identified: the number of connection nodes (external nodes), the number of history sources the element contributes to the network (external history sources), an array of pointers to the external nodes voltages (visualized in F ig . 141), necessary for the element during the updating of its history. Two services are provided by the class elmj: a) ReadData, a request issued to the element during the initialization of the case that the element acknowledges by reading its data from the input file, and initializing all o f its data structures. A t that stage also, the element requests of the network, netj, the addresses of the voltage fields corresponding to the connection nodes of the element, and the addresses of the current fields of the history sources that the element is feeding into the network; b) UdateHsr, a request issued by the network during the simulation, at each time step, to take the nodal voltages and recompute the history sources of the ele-ment (at this stage, also, the element decides its topological changes, i f any, and notifies the network, through the corresponding messages —see the section on the network, b e l o w — of the necessary changes affecting the corresponding subblock matrices. 12.5.2 The history source class, hsr_t History sources, even i f conceptually belonging within the element models, are rep-resented as objects of the class hsrj, and are grouped together inside the network object, ready to service the network in its request for accumulating nodal currents. The link with the corresponding element model is made once, at the initialization stage, when the source provides the element with the address of its current field, see Fig . 140. 12. OVNI, the simulation engine 181 Fig. 140. 12.5.3 The subblock class, sub_t Each of MATE's subblocks, as described in a previous chapter, is implemented as an instantiation of class subj, Fig. 143. c l a s s sub_t{ p u b l i c : / / Gets sub's data from f i l e ' f v o i d I n i t ( F I L E * f, // Already opened and p o s i t , f i l e . i n t iB lkCode , // P o s . e n c l o s i n g b lock i n net . i n t iSubCode ) ,- // Pos .of subblock i n e n c l o s i n g b l o c k . v o i d UpdateEthO ; // Update Thevenin's v o l t a g e s . const REAL** G e t P t r Z M a t r i x O ; // D e l i v e r s address of Z mat. const REAL * G e t P t r E t h V e c t o r ( ) ; // D e l i v e r s address of Eth vec . / / Given the enveloping b l o c k ' s l i n k s currents i n vec tor 1 a L n k V o l t s ' , / / do c a l c u l a t e the subblock ' s nodes vo l tages . v o i d CalcNodeVolts ( const REAL* aLnkCurr ); / / To al low the b lock to r e g i s t e r i t s l i n k s , the b lock passes / / the number of l i n k s , and the two a l l o c a t e d and i n i t i a l i z e d / / v e c t o r s 'aLnkNod' and ' a L n k E n t e r s ' . v o i d R e g i s t e r L n M INT cNumLinkPar, INT *aLnkNodPar, BOOL *aLnkEntersPar ); / / T o hook up a new 1 aZ' matr ix by the corresponding chameleon elm. v o i d HookUpMatrix( REAL **aNewZMat ) ; p r i v a t e : INT i B l k ; // In which b l k i s t h i s sub. INT iSub; // What sub i s t h i s i n that b l k . INT cNumNod; // Number of nodes i n sub. INT *aNodId;. // Net ' s i n d e n t i f i e r s for the nodes. REAL *aNodV; // Nodes vo l tages (1..n). REAL *aNodH; // Nodes t o t a l current s ( l . . n ) . REAL **aZ; // Z matr ix , i . e . inv ( G[] ) . REAL *aEth; // Thevenin vo l tages (1..n) INT cNumLnk ; // Number of l i n k s i n b l o c k . INT *aLnkNod; // Links connect ion nodes i n sub. BOOL *aLnkEnters; // TRUE = Link enter t h i s sub. BOOL chameleon; // TRUE = t h i s subblock i s a cham. T Fig . 143: The subblock class subj. 12.5.4 The block class, blk_t Subblocks are clustered into an array inside the corresponding block, together with the corresponding links, etc. As can be seen in Fig. 144. 12. OVNI. the simulation eneine 182 c l a s s b l k _ t { p u b l i c : b l k _ t ( F I L E * f , I N T i B l k C o d e ) ; v o i d H o o k C h a m M a t r i x ( I N T i S u b , R E A L * * p N e w M a t r i x ) ; v o i d H o o k V o l t T o L n k ( I N T i L n k , R E A L * p ) ; v o i d C a l c N o d e V o l t s ( ) ; p r o t e c t e d : I N T b l k l d ; / / I d e n t i f i c a t i o n c o d e o f t h i s b l o c k . I N T c N u m L n k ; / / N u m b e r o f " l i n k s ' i n t h i s b l o c k . I N T c L n k C l o s e d ; / / N u m b e r o f c l o s e d l i n k s i n t h e b l o c k . l n k _ t * * a p L n k ; / / A r r a y o f p o i n t e r s t o ' l i n k s ' i n t h i s b l k . / / O p e n ' l i n k s ' a r e a t t h e b o t t o m o f t h e a r r a y . l n k _ t * * a p L n k I d ; / / S a m e a s ' a p L n k ' , b u t i n v a r i a b l e . T o i d . t h e m . / / T h e f o l l o w i n g a r r a y s a r e i n d e x e d a c c o r d i n g t o t h e o r d e r o f l i n k s / / a s i n ' a p L n k ' , t h a t i s c l o s e d l i n k s a t t h e t o p . R E A L * * a L n k M a t ; / / ' l i n k ' m a t r i x f o r t h e b l o c k . R E A L * a L n k C u r r ; / / A r r a y o f l i n k s c u r r e n t s . R E A L * a L n k V o l t ; / / R H S o f l i n k c u r r e n t e q u a t i o n s y s t e m . R E A L * a C h o l D i a g ; / / A u x i l i a r y v e c t o r u s e d i n s o l v i n g l i n k s e q u a t i o n s . / / T h i s a r r a y f o l l o w s t h e o r d e r i n ' a p L n k l d ' . R E A L * a L n k C u r r U n s o r t e d ; / / S a m e a s ' a L n k C u r r ' b u t w i t h t h e o r d e r o f / / t h e l i n k s a s c r e a t e d b y t h e p r e p r o c e s s o r . I N T c N u m S u b ; / / N u m b e r o f ' s u b - b l o c k s ' i n s i d e t h i s b l o c k . s u b _ t * * a p S u b ; / / A r r a y o f p o i n t e r s t o s u b - b l o c k s . b o o l e a n c h m C h a n g e d ; / / T R U E = o n e o f b l o c k ' s c h a m e l e o n s c h a n g e d ! b o o l e a n s w t E v e n t O c c u r r e d ; / / T R U E = a l i n k j u s t c l o s e d o r o p e n e d , b o o l e a n I n k M a t J u s t R e b u i l t ; / / T R U E = a L n k M a t h a s n o t b e e n t r i a n g u l a r i z e d . v o i d S o r t L n k O ; / / P u t s c l o s e d l i n k s f i r s t i n a r r a y ' a p L n k ' . v o i d B u i l d L n k M a t () ,• / / B u i l d t h e l i n k s m a t r i x . v o i d H a n d l e T o p o l o g y C h a n g e s () ,- / / W h e n l i n k s o p e r a t e o r c h a m e l e o n s c h a n g e Fig . 144: The blkj class, template for every block in the network. 5.5 The clock object, tck The clock is a single instantiated object, implemented thus as an ADT walled inside its implementation file "tck.cpp", and interfaced to the rest of the core by its header "tck.h", as in Fig. 145. The clock unit defines its own integer arithmetic, which allows it to count, with one microsecond steps, up to 3.2xl0974 trillion years. This accounts for the non-measurability of the continuous simulation premise, that is, on-line monitoring of power networks, envisaged as one of the applications of this thesis. 12. OVNI, the simulation engine 183 typedef long count t; // 0..999 999 999 (1 b i l minus one) // Note: t h i s type does not enforce // these l i m i t s , so i t ' s up to prog v o i d TckResetCounter( ) ; // Sets to zero the counter . v o i d TckAdvanceCounter() ; // Advance count by o n e . v o i d TckGetCounter // R e t u r n s . . . (count_t i x H i g h , // high nine d i g i t s of t i c k e r , count_t i xMid , // and middle nine d i g i t s , count_t StxLow) ,• // and l e a s t s i g n i f . nine d i g i t s . v o i d TckSetMax // Sets the maximum t i c k l i m i t a t : (count_t xHigh, // high nine d i g i t s o f t i c k e r , count_t xMid, // and middle nine d i g i t s , count_t xLow); // and l e a s t s i g n i f . nine d i g i t s . boolean TckCountBelowMax(),- // TRUE = S imulat ion has not ended. Fig. 145: Header of the clock object, the ticker, tckj. 12.5.6 The simulation object, sim The simulation is the top level object, right under the director8. As a single instantiation entity, it was implemented as an ADT encapsulated inside a C++ file, sim.cpp, and providing services to the rest of the implementation as defined in its header sim.h, which is included in Fig. 146. v o i d S i m l n i t i a l i z e // Reads f i l e / n e t w r k , rese t s t imer . ( char *nameInFile, // Name of input f i l e (the netwkr) . char *nameOutFile, // Name of the mai l output f i l e . char *nameLogFile ),• // Name of the e v e n t / l o g f i l e . v o i d SimDoTheLoops(); // Loop along time a x i s , doing the // s i m u l a t i o n proper . T Fig . 146: Services provided by the simulation object. 12.5.7 The network class, net The network, net, under the command of the simulation object, sim, and in continu-ous consulting with the clock object, tck, and with the event handler object, is the great activator in OVNI's core. It (the net) contains the array of node registry, that points into every external node in the system, mapNodZer; the array of elements in the system, mapElm; the array of blocks, mapBlk; and several other bits. 8 The OOP section of the code that issues the cues for the object-actors to perform. 12. OVNI. the simulation engine 184 12.6. H o w classes within O V N I relate to each other Up to this point, most of the classes and entities in OVNI have been introduced, and some inkling of the way they relate to each other has been intimated. In Fig. 147, the inclusion relationship is sketched. There the simulation, sim, commands the network, net, to consult the event manager, evn, and the clock keeper, tck, at the highest level of the process. The network, net, contains the elements (as forms of elmj), the blocks (as instantiations of blkj), the history sources (instantiations of hsrj). The blocks contain the subblocks (instantiations of subj), the links (of type Inkj). The sub-blocks contain the nodes, the grounded voltage sources, the independent current sources, and the non-link switches. 12.7. M a i n tasks of the simulator's engine In a previous chapter of this thesis, the main tasks were revised. In this section the implementation of those tasks, as services requested by some object and provided by some other object among those described in the fist part of this chapter, follows. director i container Fig . 147: Container/contained relationship o f classes in O V N I . 12. OVNI, the simulation eneine 185 12.7.1 Initialization During initialization, the director activates the simulation, sim, through the service request Simlnitialize,9 and passes to it the names of three files: the input data file, the log file, and the output file (used to validate the solution, or to keep record of some variable, not in real time simulations). The simulation checks the existence of the input file, and opens the three files. The simulation reads the general data associated with the present run and ini-tializes the clock, tck, through the service TckSetMax and TckSetDeltaT. Next, the simulation requests the network, net, to read its data and initialize its data structures, through the service request Netlnitialize. The network proceeds to read its data, and sets up its internal structures for registration of nodes, for history sources, for elements, for blocks, etc. Finally, the network signals each element to read its data and proceed with model initialization, through the request pElm->ReadData (where pElm is a pointer Netlnitialize ReadData service client >. server . request Fig. 148: Initialization Task of the Engine, to a particular element). 12.7.2 Simulating the case The centre of activity of the core is the loop itself, the set of subtasks that are 9 The "dot" notation is conspicuously absent of this first stage, since the objects involved (sim, net, tck, evn) were implemented as ADTs and not as instantiations of a class. As a matter of notation, in such cases, OVNI 's code maintains the three letter acronym of the object as the prefix of all its methods (service requests). 12. OVNI. the simulation engine 186 executed at each simulation time step. At this stage, right after the initialization task, the director requests of the simulation object to SimDoTheLoops. Each of the subtasks comprised by this service request was a major issue of the project and de-serve its own subsection, as follows. 12.7.2.1 Updating History Sources At the begining of each simulation step, the network net, traverses its register of elements in the case, and requests of each to update the history sources that belong to it. This is done through the service request UpdateHsr. During the service to this request, each element goes through some common steps: a) Grab its external nodes voltages —available to it directly since the registra-tion part of the initialization—; b) Through the node hiding equations described in chapter 5, determine the voltage of its internal nodes for the current time step; c) Determine the necessary changes to its topology, if any, and submit (if neces-sary) a request to the network to receive a new "contribution" matrix and to "hook" it to the corresponding subblock matrix; d) Calculate the external and internal history sources, and again through the node hiding equations mentioned above, refer all of them to equivalent external history sources that are then delived directly to the corresponding history source object —'the element has direct acess to its history sources value fields since the registration stage of the initialization, as was seen in a previous section of this chapter—•. 12.7.2.2 Accumulat ing nodal currents Once the value for each current source in the case is known (independent and history souces), the version of the nodal analysis method used in the core solution requires that the currents being fed to each node are summed into a node total, the nodal currents. Each node accumulates this total current in its h field, see Fig. 137. At this stage, in service of the request NetAccumNodalCurrents (issued by the simulation object sim) first the network net, clears the current fields of all the 12. OVNI. the simulation eneine 187 external nodes in the case (the network gains access to them, through the data in its node registration record array mapNodZer), then the net requests of each of its reg-istered history source objects, the service DrainAndPour. Each history source was given direct access to its two nodes /i-fields during the registration stage of the ini-tialization, so the history source can add its value to the /z-field of its destination node and subtract it from the corresponding field of its origin node. 12.7.2.3 Solving for nodal voltages The task of solving for voltages at the nodes has been the major concern at the out-set of this project, it befits this task to end the description of the implementation of the core. The simulation sim, issues the service request NetCalcNodalVoltages to the network net. The network traverses its registry of topological blocks and requests of each one of them to determine the voltages of the nodes it encloses through the service request CalcNodeVolts. II (4) / / It i s the b locks who know how to c a l c u l a t e the node vo l tages , g i -/ / ven the node cu r ren ts . As b locks are contained i n the network, / / the l a s t one commands each of i t s b locks , one a f te r another, or / / a l l at the same t ime, i f t h i s procedure i s spawned among severa l / / p rocessors . There must not be any data content ion , s ince the / / only wr i t t en data i s that of nodes vo l tages , and those vol tages / / belong i ns ide each b l o c k ' s sub-b locks . vo id NetCalcNodalVol tages!) / / Determine the vol tage of each node. { i n t i ; . f o r ( i = l ; i<=mcNumBlk; i++) / / Requests to each block to . . . mapBlk [ i ] ->CalcNodeVol ts( ) ; / / . . .compute i t s nodes vo l tages . ) I The block10 so activated enters in its MATE computation cycle (as described in a previous chapter): a) If during the previous integration step the event handler evn issued a topol-ogy change signal, the block reshufles its links, to keep the closed ones at the top of its list, which allows for the same Cholesky solution method procedure to be applied to each of the open-close-links combinations. To do this without losing track of which link is which, the block maintains two arrays of pointers to the enclosed links, 1 0 If the block contains a single subblock (no internal subsegmentation), it issues the subblock the service request apSub[ 1 ]->CalcNodVolt(), and that is all that is necessary at this stage. 12. OVNI. the simulation engine 188 links, a fixed one, that is set and left during the initialization process, that is used to access the currents and state of the link at any moment, and a movable one, that is reshufled to keep on top pointers to the closed links (the so called active ones). In this case also, the block needs to recompute its links matrix, by quick polling its contributing subblocks according to the latest topology as determined by the links status. Another possibility contemplated at this stage is that there was no external event serviced, but one of the internal chamaeleon (non linear) elements changed topology, in this case the block simply recomputes its links matrix; b) The block signals each of its subblocks to establish the latter's Thevenin voltages of its nodes, service apSub[i]-> UpdateEthQ; c) The block polls each of its subblocks to contribute with the corresponding recently calculated Thevenin voltages to its right hand side vector of the links cur-rent system of equations; d) The block solves the links system of equations for the links currents; e) Finally the block passes the links currents to each of its subblocks and re-quests of it to produce the corrected nodal voltages, subblock method apSub[i]->CalcNodeVolts(apLnkCurrUnsorted); 13. OVPP, THE PREPROCESSOR 13.1 In t roduct ion The simulator's core was implemented in two main modules: the preprocessor, OVPP, described in this chapter; and the engine, OVNI, described in the next chapter. The preprocessing stage of the simulator, OVPP, is an OOP 1 application built around one custom designed circular double-linked list class, list.t, and five descendent classes: the node-list object-class, the subblock class, the subblock list class, the block class, and the block list object-class. The preprocessor was developed2 in C++ and compiled on the target machine with the GNU g++ compiler. The operative word in the design of the simulator has been precalculation. Most of the precalculation involved has been moved to the preprocessing stage to keep the engine lean and fast. This chapter begins with a description of the raw data input file to the preprocessor, and continues with a description of the preprocessor proper. 13.2 T h e Preprocessor Input F i l e The input data to the preprocessor is in human readable form for the convenience of the case creator. It is in a free format text file with the extension OVP. The basic template of such file can be generated with the included utility OV-TMP. The indentation shown in the following example is there to make reading easier 1 Object Oriented Programming [34] 2 Originally O V N I began as an O O P project developed on Ada95 [67], but delays in the availability of industrial strength compilers forced the move toward C++ . [68] 13. OVPP, The Preprocessor 190 for the human user, it is not necessary for the program, but recommended. The significant data in the file begins with the keyword .BEGIN.FILE. Be-fore that keyword, any comment can be included for identification purposes. The data in the file is divided into nine sections3: GENERAL DATA, LUMPED, LINES, HVDC, CONTROLLERS, COUPLED, SOURCES, SWITCHES, OUT-PUT. Each section ends with the keyword .END followed by the corresponding section label. Some of the data items are preceded by a label, included by the utility O V - T M P 4 . Each of those labels explains the meaning of the following data item (see Fig . 149 on p. 191). 13.2.1 General Data The GENERAL.DATA section includes two data items: the one labelled "deltaT:" for the integration step in seconds; the other identified "totalTime:" for the total simulation time, also in seconds. 13.2.2 Lumped Elements Following the respectable tradition ofthe E M T P (see chapter 1), even though all element models, with the single exception of the distributed transmission line model, are represented as lumped equivalents, O V N I refers to lumped linear resistors, inductors, and capacitors, as lumped elements. This section begins counting the total number of lumped elements (linear resistors, inductors, and capacitors) in the network 5, "number.of Jumped:". For each lumped element, a line 6 that includes (see Fig. 151), without labels, an uppercase letter R, L, or C , depending on the nature ofthe element; a parameter, in ohms, milihenrys, or microfarads, depending on the nature of the element; 3 This number of sections will increase as more models are attached to the simulator. 4 The preprocessor input file, * . O V P , is to be generated by OVNI's graphic user interface, OUI [37] 5 In a future version of the preprocessor this data item, along with the similar ones for other element types, will be dropped. 6 A separate line is not absolutely necessary, given the free format of the file, but highly convenient for the human reader. 13. OVPP, The Preprocessor 191 .BEGIN F I L E .BEGIN GENERAL_DATA .END GENERAL_DATA .BEGIN LUMPED .END LUMPED .BEGIN COUPLED .END COUPLED .BEGIN LINES .END LINES .BEGIN CONTROLLERS .END CONTROLLERS .BEGIN HVDC .END HVDC .BEGIN SOURCES .END SOURCES .BEGIN OUTPUT .END OUTPUT .END F I L E Fig. 149: General structure of the preprocessor input file. and the two nodes that the element is connected to, each node as a string of up to six letters (The ground or reference node can be entered as either GND, GROUND, or EARTH.) 13.2.3 Intrablock " l inks" and Switches Switches in OVNI can be represented by either a MATE intrablock link, or an ideal or resistive intrasubblock switch. Two data sections accommodate each of those categories. The SWITCHES section includes labels for: " num-ber _of_switches:", and for each of the switches included in this section: "ini-tial_node:" (a seven character string name), and "final_node:", for the two nodes 13. OVPP, The Preprocessor 192 . B E G I N G E N E R A L - D A T A d e l t a _ t : 5 0 . O e - 6 t o t a l _ t i m e : 5 0 . O e - 3 . E N D G E N E R A L _ D A T A 1 • • • i Fig. 150: Section on general data for a case with an integration step of fifty microsec-onds and a total simulation time of fifty miliseconds. .BEGIN LUMPED number_of_lumped: 3 R 2 0 . 0 TOPO BURRO L 2 0 . 0 PERRO GATO C 2 0 . 0 MAKO T I Z A .END LUMPED 1 - - - - - - - — r\ Fig. 151: Section on lumped elements: including one resistor of 20Q, connected be-tween nodes TOPO and BURRO; an inductor of 20mH, and a capacitor of 20pF. of the switch; a flag "initiallyjclosed_yes/no:" that indicates the initial status of the switch; the number of open operations prescheduled for this switch, "num-ber _of.openings:"; and the number of close operations, "number_of.closings:"; then, after the label "open:" and separated by spaces, a list of the times for each opening operation; same as for open operations, for close operations there is the label "close:", see Fig. 152. Intrablock links include a few additional fields: "ohms:", the resistance of the link, in ohms; "volts_are_DC_yes/no:", a flag that indicates if the voltage source associated with this link is DC or sinusoidal AC; "volts:", amplitude of 13. OVPP, The Preprocessor 193 .BEGIN SWITCHES number_of_swicches: 1 .BEGIN SWITCH-0 init i a l _ n o d e : TOTUMA final_node: COBIJA initially_closed_yes/no: no number_of _openings: 2 nun\ber_of _closings: 3 open: 700e-6 1200e-6 close: 300e-6 1000e-6 5000e-6 .END SWITCH-0 .END SWITCHES Fig. 152: T h i s switch data section includes a single switch: the one between nodes TOTUMA a n d COBIJA, a switch open at the beginning of the simulation, with two open operations, one at seven hundres microseconds, the other at twelve hundres microseconds. voltage wave (or value of DC one); "hertz:", frequency of source, if it is an AC one, zero otherwise; "radians:", phase shift in radians of the AC voltage sine wave; and "frozen_closed_yes/no:", a flag that identifies this node as a mock up switch, one that will never open7. 13.2.4 Transmiss ion Lines For transmission lines, the constant parameter model is included. The LINES section starts with the number of transmission lines in the network, "num-ber _ofTines:", followed by a line section for each line included. The line section presents five fields, labelled: "number_of_phases:"; "Zc:", fol-lowed by a blank space separated list of values for the characteristic impedance, in ohms, of each of the transmission modes8 of the line; "delay:", followed by a list of the delays, in seconds, for each of the transmission modes; "nodes:", a list of strings for the nodes listed phase by phase, and send end to receiving end (fol-lowing each node is a yes/no flag that requests for the current in that particular 7 As is the case when a link is introduced to separate two sections of a block where there is no switch. 8 In the order mode zero, mode one, etc.. 13. OVPP, The Preprocessor 194 phase/node to be computed and output), see Fig. 153; "q-matrix:", the modal transformation matrix9 corresponding to the line geometrical configuration. . B E G I N L I N E S n u m b e r _ o f _ l i n e s : 1 . B E G I N L I N E - 0 n u m b e r _ o f _ p h a s e s : 3 Z c : 6 3 7 . 9 2 7 8 . 7 3 2 8 . 1 d e l a y : 0 . 5 e - 3 0 . 3 5 e - 3 0 . 3 5 e - 3 n o d e s : N I n o N4 y e s N2 n o N5 n o N3 n o N6 n o q - m a t r i x : 0 . 5 9 2 4 2 8 8 5 5 - 0 . 4 1 2 3 3 6 2 0 - 0 . 7 0 7 1 0 6 7 8 0 . 5 4 5 9 4 5 5 2 0 0 . 8 1 2 3 7 7 7 4 0 . 0 0 0 0 0 0 0 0 0 . 5 9 2 4 2 8 8 5 5 - 0 . 4 1 2 3 3 6 2 0 - 0 . 7 0 7 1 0 6 7 8 . E N D L I N E - 0 . E N D L I N E S Fig. 153: In this case, only one three phase transmission line has been included in the network. 13.2.5 G r o u n d e d Voltage Sources Voltage sources in the simulator are included by one of two devices: as a per-manently closed link, § 13.2.3, with the corresponding voltage source; or, in cases where the source is grounded and we do not care about its current, as a "grounded voltage source" that is included inside a subblock, for an improved performance of the simulator. A grounded voltage source includes: the single non ground node the source is connected to, "node:"; a flag to indicate if the source is DC or AC sinusoidal, "DC_source_yes/no:"; and the same fields already described in § 13.2.3, "volts:", "herts:", and "radians:". 13.2.6 H i g h Vol tage D C rect if ier / inverter , H V D C HVDC modules data sections, HVDCs, include: • "controlled_by:", identifies the controller that triggers this module's valves. 9 Generated by M T L i n e , or a similar utility program. 13. OVPP, The Preprocessor 195 • "transformer_Y/D:", indicates whether the three-phase transformer in the module has a YyO or a Dyll connection; • "dc_line_reactor?_y/n:", a flag that signals if this module includes a smooth-ing reactor; • "dc_reactor_valuein_mH:", value of the smoothing reactor; • "nodes:", to which five nodes this module is connected to, five strings (of no more than six characters each) separated by blank spaces; • "starting_Mode:", a list of six strings (each either ON, or OFF), corre-sponding to the initial status of the six valves in the module; • "MVA:", capacity of the three-phase transformer in the module; • "KV1:", line voltage rating of the transformer primary, in kilovolts; • "KV2:", line voltage rating of the secondary; • "Zsc%:", short circuit impedance10 in percentage; • "holding.current:", minimum value of the current through a valve at which a closed valve so remains; • "threshold_voltage:", minimum value of a valve voltage at which it starts to conduct; • "Tq:", recovery time for the valves, in seconds, the time the valve needs to vacate its depletion zone around the junction; • "number_of_failures:", number of preprogrammed simulated valve failures, for testing of controlling schemes. For each failure, include a line that specifies the instant of the failure, which valve will fail1 1, the number of Or reactance rather. Valves are identified by an integer from one to six. 13. OVPP, The Preprocessor 196 integration steps that the failure will be sustained, and the type of failure (misfire, follow through). . B E G I N C O N T R O L n u m b e r _ o f _ c o n t r o l l e r s : 1 . B E G I N C O N T R O L - 1 K p : 0 . 0 0 0 1 K i : 0 . 0 0 0 0 0 5 r e f e r e n c e _ c u r r e n t : 1 8 0 0 f i r i n g A n g l e : 1 5 a l f a _ m i n : 5 a l f a _ m a x : 1 7 0 p u l s e _ w i d t h : 90 s e n s e d H V D C : 1 n u m b e r O f C o n t r o l l e d H V D C : 2 c o n t r o l l e d _ H V D C : 1 2 p r i n t _ o u t p u t _ c o n t r o l l e r _ y e s / n o : n o p r i n t _ r a r a p _ y e s / n o : n o p r i n t _ a l f a _ y e s / n o : n o p r i n t _ w y e _ g a t e s _ y e s / n o : n o p r i n t _ d e l t a _ g a t e s _ y e s / n o : n o p r i n t _ D C _ c u r r e n t _ y e s / n o : n o p r i n e _ p r e _ r e a c t o r _ v o l t a g e _ y e s / n o : n o . E N D C O N T R O L - 1 . E N D C O N T R O L Fig. 154: HVDC controller data. 13.2.7 H V D C Control lers The original purpose of the HVDC model was to provide for a scenario to test the corresponding controllers. However, to test and verify the model it-self, it was necessary to develop and model a simplified controller, a propor-tional/integrative controller targeted on a given reference value for the DC cur-rent, and modifying the firing angle of the module valves. The data describing the controller includes the fields: "Kp:", proportional constant; "Ki:", integrative constant; "reference-current:", desired value for the DC current; "firingAngle:", initial firing angle for the gate signals, in de-13. OVPP, The Preprocessor 197 grees; "alfa_min:", minimum possible setting for the firing angle a, in degrees; "alfa_max:", maximum possible setting for the firing angle, a, in degrees; "pul-seWidth:", width of gate firing pulses, in degrees; "sensedHVDC:", what HVDC module's DC current is being monitored and controlled; "numberOfControlled-HVDC:", how many HVDC modules are triggered by this controller; "con-trolled JTVDC:", a list of the numbers that identify all the HVDC modules fired by this controller. For in depth studies of the process of control, a few additional output signals can be requested as illustrated in Fig. 154. e n u m n o d T y p e _ t { L U M P E D , SOURCE, L I N E ) ; s t r u c t n o d _ t { n o d T y p e _ t n o d T y p e ; c h a r n a m e [ 7 ] ; i n t i B l k ; / / W h a t b l o c k c o n t a i n s i t ( 1 . . c N u m B l k ) . i n t i S u b ; / / w h a t s u b b l o c k i n s i d e t h a t b l o c k . b o o l p e n d i n g S c n d P a s s ; / / T R U E = p e n d i n g f o r a s e c o n d p a s s . Fig. 155: Every node is represented by a 'nod.t' structure and registered in a cell of the list 'nodList_t'. 13.3 Classes i n the Preprocessor As was mentioned in § 13.1, the preprocessing stage of the simulator, OVPP, was built around an ancestor class, HstJ, a double link circular list class. Four other application specific classes inherit their basic methods and data elements from the list.t class. Those are: nodListJ, a list-class derived as public from UstJ with all the nodes12 in the network; sub.t, a class —a public descendant of list-t— that describes the activities associated with a subblock in the network13; subListJ, a list of all subblocks in the network; blkJ, to describe blocks in the 1 2 External nodes, as defined in § 5.13. 1 3 A subblock in the sense seen in § 5.10 on page 67. 13. OVPP, The Preprocessor 198 network; and MkListJ, a list of all the blocks in the network, a description of the segmented network that, once set up, is ready for output. The best way to describe the functionality of each of the object classes in-troduced above is to present its data and method elements. 13.3.1 The list.t Class The original ancestor of the hierarchical family of classes in OVPP is UstJ, a double-link circular list [69]. It is build around a basic unit of data, the list-cell, a structure with the type definition shown in Fig. 156. t y p e d e f v o i d * p t r _ t ; / / A g e n e r i c p o i n t e r . s t r u c t c e l l _ t { c e l l _ t ' p P r e v C e l l ; / / P t r . t o p r e v i o u s c e l l . c e l l _ t * p N e x t C e l l ; / / P t r . t o n e x t c e l l . p t r _ t p C o n t e n t s ; / / P t r . t o d a t a h o o k e d t o c e l l . ) ; t y p e d e f c e l l _ t * p C e l l _ t ; / / P t r . t o a c e l l . Fig. 156: A cell in the list.t class. The list.t class contains a hook to hang the actual list of cells, the head of the list, a pointer to the "head" cell, a neutral-no-data cell that serves as a binding between the first cell and the last cell, as seen in Fig. 157. The public methods available to the client of the list.t class are listed, and described very briefly, in Fig. 158. 13.3.2 T h e nodList.t class The nodeList is a linked list that inherits as public from the ancestor list.t, § 13.3.1. Its cells contain each one of the external nodes in the network. Its interface is presented in Fig. 159. Each element within this list is represented by a structure of the type in Fig. 160. 13. OVPP, The Preprocessor 199 Fig. 157: The "head" cell and the circular linked list defined by list.t. 13.3.3 T h e sub.t class Each subblock in the problem is represented in the preprocessor by sub.t, a linked list of nodes (each node is identified by the integer code generated during the registration that specifies the position of the node within the network list nodList.t, see § 13.3.2.) In Fig. 161, the methods and data items of the subblock class, sub.t. 13.3.4 T h e subblock l is t , subList.t, class All the subblocks in the network are included in the list subList, an instantiation of the class subList.t, public descendant of the list.t class, Fig. 162. During the process of subdivision of the network nodes (in nodList) into subblocks, accord-ing to the MATE criteria, the nodes are registered (by the nodList itself) with the subblock list, subList), that passes the node to its corresponding subblock object, see § 13.3.3. 13.3.5 T h e blk.t class Each block in the problem is represented in the preprocessor by blk.t, a linked list of subblocks (subJ instantiations) (identified by the integer code generated during the registration that specifies the position of the subblock within the 13. OVPP, The Preprocessor 200 c l a s s l i 3 t _ t { p r o t e c t e d : p C e l l _ t p H e a d ; / / H e a d o f t h e l i n k e d l i s t { S e e F i g . XI.9) . i n t c N u m C e l l ; / / C u r r e n t n u m b e r o f c e l l s i n t h e l i s t , p u b l i c : l i s t _ t ( ) ; / / C o n s t r u c t o r . - l i s t _ t ( ) ; / / D e s t r u c t o r . p C e l l _ t N e w C e l l ( p t r _ t p D a t a , p C e l l _ t p P r e v C e l l ; p C e l l _ t p N e x t C e l l ) ; / / ' N e w C e l l * c r e a t e s a n d i n i t i a l i z e s a n e w c e l l , i t d o e s n o t l i n k i t . i n l i n e b o o l I a L i s t E m p t y {) ,- / / T R U E = t h e l i s t c o n t a i n s n o c e l l s , i n l i n e i n t G e t N u m C e l l s ( ) ; / / R e t u r n s t h e n u m b e r o f c e l l s , i n l i n e p C e l l _ t G e t H e a d O ; / / R e t u r n s p t r . t o t h e h e a d c e l l , i n l i n e p C e l l _ t G e t F i r s t C e l l ( ) ,- / / R t n . p t r . t o f i r s t c e l l , i n l i n e p C e l l _ t G e t L a s t C e l l ( ) ; / / R t n . p t r . t o l a s t c e l l . p C e l l _ t G e t N e x t C e l l ( p C e l l _ t p C e l 1 ) ; / / R t n . p t r . t o n e x t c e l l t o g i v e n o n e . ^ p C e l l _ t G e t P r e v C e l l ( p C e l l _ t p C e l l ) ; / / R t n . p t r . t o p r e v i o u s c e l l . v o i d I n s C e l l ( p C e l l _ t p C u t O f f C e l 1,- p t r _ t p D a t a ) ; / / I n s e r t i n f r o n t o f a c e l l . v o i d D e l C e l l { p C e l l _ t p C e l l ) ; / / D e l e t e a c e l l f r o m t h e l i s t . p C e l l _ t G e t C e l I C o n t a i n s ( p t r _ t p D a t a J ; / / R t n . p t r . t o c e l l w i t h t h i s d a t a . i n t G e t C e l I P o s { p C e l l _ t p C e l l ) ; / / R t n . p o s i t i o n o f t h i s c e l l i n t h e l i s t . p C e l l _ t G e t C e l l A t P o s ( i n t p o s ) ; / / R t n . p t r . c o c e l l a t p o s i t i o n ' p o s " . v o i d i n s I n F r o n c ( p t r _ t p D a t a ) ; / / I n s e r t i n f r o n t o f t h e l i s t . v o i d i n s A t E n d ( p t r _ t p D a t a ) ; / / I n s e r t t h i s d a t a a t t h e e n d o f t h e l i s t . Fig. 158: Methods and data items in the list.t class. network subblock list subListJ, see § 13.3.4. The methods and data items in the block, blk.t, class are parallel to those in the subblock class, subJ in Fig. 161, with the differences corresponding to the contents of the block class (subblocks instead of nodes). 13.3.6 T h e block l is t , blkList-t, class All the blocks in the network are included in the list blkList, an instantiation of the class blkListJ, public descendant of the list.t class. This class mimics the functionality of the subblock list (subList), with the difference that the first one contains blocks, into which subblocks are registered, while the latter contains subblocks into which nodes are registered. During the process of subdivision of the network subblocks (in subList) into blocks, according to the connectivity provided by the links and the decoupling introduced by the transmission lines, the subblocks are registered (by the subList itself) with the block list, blkList), that passes the subblock to its corresponding block object. 13. OVPP, The Preprocessor 201 c l a s s n o d L i s t _ t : : p u b l i c l i s t _ t ( p u b l i c : n o d L i s t _ t ; / / C o n s t r u c t o r . i n t P u t N o d f c h a r *sName, n o d T y p e _ t e N o d T y p e ) ; i n t G e t N u m N o d e s ( ) ; p N o d _ t G e t N o d P t r ( i n t i P o s ) ; p N o d _ t G e t N o d P t r ( c h a r * s N a m e ) ; i n t G e t N o d P o s ( c h a r * s N a m e ) ; c h a r * G e t N o d N a m e ( i n t i P o s ) ; n o d T y p e _ t G e t N o d T y p e ( i n t i P o s ) ; n o d T y p e _ t G e t N o d T y p e ( c h a r * s N a m e ) ; v o i d S e t N o d P e n d i n g ( i n t i P o s ) ; b o o l P e n d N o d L e f t ( ) ; i n t G e t F i r s t N o d I n S u b ( i n t * i S u b ) ; i n t G e t N e x t N o d l n S u b ( ) ; } ; Fig. 159: Methods and data items in the nodList.t class. The methods and data items of this blkLisLt class are parallel to those in subListJ, with the differences due to the nature of the contents of each list. At the beginning of the preprocessing, once all the elements have been loaded from the input data file, each one of them is given the opportunity to register their external nodes into the network node list nodeList. The elements regis-ter their nodes by requesting the service "PutNode" from the nodeList object. That service returns to the element the numeric code that identifies the reg-istered node in the network. The registration service provided by "PutNode" also requires from the element a categorization of the node as belonging to a LUMPED element, or to a LINE, or perhaps to a grounded voltage SOURCE. 13.4 M a i n Tasks of the Preprocessor The goal of the preprocessor is the creation of the input file to the engine, to OVNI. In that file, the network has already been broken into blocks, and these into subblocks. That file identifies each element (or part of it), and every node 13. OVPP, The Preprocessor 202 enum nodType_t{LUMPED, SOURCE, LINE}; struct nod_t{ nodType_t eType; char sName; int iBlk; int iSub; bool bPend; }; Fig. 160: E a c h node i n the network list is an instance of this structure. as belonging to this or that subblock, which is part of the corresponding block. Besides all that, the conductance matrices for each subblock corresponding to every possible open/close switch combination within the subblock (or an indication of the "chameleonic" non linear element associated to it) need to be calculated (precalculated, if you will, since this is the preprocessing stage.) Such goal is broken in the following sections into "tasks". The tasks are described as message exchange between the objects in the application, under the prompt of the director (the hub of the preprocessor, a task scheduler.) 13.4.1 Crea t ion of a list of a l l the nodes The first task the preprocessor tackles is the creation of a list of all the nodes in the network, nodList. The director (hub) prompts every element in the sys-tem, apElm\\, to register its nodes with the list nodList through the method "nodList.PutNod". In this task, the elements are clients, and the list of nodes is the server. The service provided, PutNod, takes a node as described below, and returns to the client a numeric global-network identification code for the node14. Nodes passed for registration through the PutNod method, are identified by 1 4 Nodes carry two identification codes, the global network code, and another that identifies it within the subblock that contains it. 13. OVPP, The Preprocessor 203 s t r u c t c h m _ t ( i n t c N u m N o d e s ; i n t * a i P o s N o d I n S u b ; }; t y p e d e f c h m _ t * p C h m _ t ; c l a s s s u b _ t : p u b l i c l i s t _ t { i n t i B l k ; b o o l b P e n d ; p C e l l _ t p P i r s t S r c N o d e ; d o u b l e * * a M a t r i x ; d o u b l e * " a G a b ; l i s t _ t I C h m ; v o i d C r e a t e M a t r i c e s ( ) ,-p C h m _ t G e t P t r C h m d n c i C h m ) : p u b l i c : s u b _ t ( ) ; v o i d P u t N o d f i n t i N o d P o s , n o d T y p e _ t e T y p e ) ; i n t N o d P o s I n S u b ( i n t i N o d P o s ) ; i n t L i s t P o s O f N o d l n S u b f i n t i N o d P o s I n S u b ) ; v o i d A d d M a t r i x E l m f i n t r o w , i n t c o l , d o u b l e v a l u e ) ; i n t N u m N o d e s ( ) ; i n t N u m S r c N o d e s ( ) ; i n t N u m N o n S r c N o d e s ( ) ; i n t A d d C h m f i n t c N u m N o d , i n t • a i N o d P o s I n S u b ) ; / / A d d a c h a m e l e o n w i t h n n o d e s i n p ( ] . i n t N u m C h m O ; / / R e t u r n s t h e n u m b e r o f c h a m e l e o n s . i n t N u m N o d I n C h m { i n t i c h m ) ; / / N u m b e r o f n o d e s i n c h a m e l e o n . i n t G e t P o s I n S u b O f C h m N o d ( i n t i C h m , i n t i N o d P o s I n C h m ) ; / / C h a m e l e o n s a r e n u m b e r e d 1 . . , / / S u b b l o c k n o d e s a l s o l... b u t n o d e s / / i n s i d e a c h a m e l e o n a r e 0 . . . d o u b l e G e t G a a E l m l i n t r o w , i n t c o l ) ; / / R e t u r n s a n e l m o f [ G a a ] . d o u b l e G e t G a b E l m ( i n t r o w , i n t c o l ) ; / / R e t u r n s a n e l m o f ( G a b ] . ) ; / / A c h a m e l e o n i s s e e n i n s i d e a s u b b l o c k . / / N u m b e r o f n o d e s i n t h e c h a m e l e o n . / / A r r a y o f p o s i t i o n o f t h e n o d e s w i t h / / R e p r e s e n t s a s u b b l o c k . / / W h a t b l o c k c o n t a i n s t h i s s u b b l o c k . / / S u b b l o c k p e n d i n g f o r i n c l u s i o n i n b l o c k . / / P t r . t o c e l l w i t h f i r s t s r c . n o d e . / / [ G a a G a b ) R e c t a n g u l a r m a t r i x . / / [ G a b ] , { j u s t p t r s i n t o ' m a t r i x ' ) . / / L i s t w i t h a l l c h a m e l e o n s i n b l o c k . Fig. 161: Methods and data items in the subJ class. their string-name, and characterized as either: lumped, source, or line nodes, depending on whether they are terminal to a grounded voltage source, or to a line, or to something else. A line identifier takes precedence over any of the other two. A source identifier takes precedence over the lumped identifier only. Ideal voltage sources are not tolerated connected to a line node15. See Fig. 163. Each cell of the nodList double-linked list, contains a node represented by the structure in Fig. 155. 1 5 Use a link-source in such a case. 13. OVPP, The Preprocessor 204 s t r u c t c h m _ t ( i n t c N u m N o d e s ; i n t ' a i P o s N o d l n S u b ; ) : / / A c h a m e l e o n i s s e e n i n s i d e a s u b b l o c k . / / N u m b e r o f n o d e s i n t h e c h a m e l e o n . / / A r r a y o f p o s i t i o n o f t h e n o d e s w i t h t y p e d e f c h m _ t * p c h m _ t ; c l a s s s u b _ t ; p u b l i c l i s t _ t { i n t i B l k ; b o o l b P e n d ; / / R e p r e s e n t s a s u b b l o c k . / / W h a t b l o c k c o n t a i n s t h i s s u b b l o c k . / / S u b b l o c k p e n d i n g f o r i n c l u s i o n i n b l o c k . p C e l l _ t p F i r s t S r c N o d e ; d o u b l e * ' a M a t r i x ; d o u b l e " a G a b ; l i s t _ t I C h m ; / / P t r . t o c e l l w i t h f i r s t s r c . n o d e . / / [ G a a G a b ) R e c t a n g u l a r m a t r i x . / / [ G a b ) , ( j u s t p t r s i n t o ' m a t r i x - ) . / / L i s t w i t h a l l c h a m e l e o n s i n b l o c k . v o i d C r e a t e M a t r i c e s ( ) ; p C h m _ t G e t P t r C h m l i n t i C h m ) ; p u b l i c : s u b _ t ( ) ; v o i d P u t N o d f i n t i N o d P o s , n o d T y p e _ t e T y p e ) ; i n t N o d P o s I n S u b l i n t i N o d P o s ) ; i n t L i s t P o s O f N o d I n S u b ( i n t I N o d P o s I n S u b ) ; v o i d A d d M a t r i x E l m ( i n t r o w , i n t c o l , d o u b l e v a l u e ) ; i n t NumNodesI) ; i n t N u m S r c N o d e s ( ) ; i n t N u m N o n S r c N o d e s ( ) ; i n t A d d C h m f i n t c N u m N o d , i n t * a i N o d P o s I n S u b ) ; / / A d d a c h a m e l e o n w i t h n n o d e s i n p ( ) . i n t N u m C h m f ) ; / / R e t u r n s t h e n u m b e r o f c h a m e l e o n s , i n t N u m N o d I n C h m ( i n t i C h m ) ; / / N u m b e r o f n o d e s i n c h a m e l e o n , i n t G e t P o s I n S u b O f C h m N o d d n t i C h m , i n t i N o d P o s I n C h m ) ; 13.4.2 G r o u p i n g Subblocks The list of nodes knows whether any of its nodes has been associated to a subblock, or block. The director (hub) requests of the list nodList to provide a non grouped node, along with the identifier of a subblock that has not been created yet (information the nodList has, since its nodes keep the code of the subblocks and blocks they belong, if they do, or an invalid code if they don't. See Fig. 164.) In this case the client is the hub, and the server method is "nodList.Get-FirstNodlnSub". The two data items received by the hub are the active node, iNodActive, and the subblock under creation, iSublnCreation. The active node is presented by the hub to each element. The element checks / / C h a m e l e o n s a r e n u m b e r e d 1... / / S u b b l o c k n o d e s a l s o 1 . . , b u t n o d e s / / i n s i d e a c h a m e l e o n a r e 0 . . . d o u b l e G e t G a a E l m ( i n t r o w , i n t c o l ) ; / / R e t u r n s a n e l m o f [ G a a ] . d o u b l e G e t G a b E l m l i n t r o w , i n t c o l ) ; / / R e t u r n s a n e l m o f [ G a b ] . >; Fig. 162: Methods and data items in the subList J class. 13. OVPP, The Preprocessor 205 Fig. 163: Interaction of classes in OVPP during node registration. if it is connected to the node. If it is, the element adopts the subblock under creation as its own, and so it records it. In this case, also, the element notifies that all the other element's nodes16 are to be marked as pending for more possible elements connected to them and part of the same subblock. In short, as pending to be proposed as active nodes during the next step. The notification to the list of nodes is made by the element through the method "nodList.SetNodPending." Now the director keeps asking of the nodList for another node in the current subblock (which it produces as one of the nodes already marked as pending), though the method "nodList.GetNextNodlnSub." This node becomes the active node and is subject to the same process as the first one was. This goes on until there is no pending node left in the nodList, which means that the subblock is complete. Every time the nodes list, nodList, is asked by another node in the block being 1 6 W i t h the very important exception of transmission line nodes, which are grouped as left group, and right group. In this case each group is treated as a separate lumped element. 13. OVPP, The Preprocessor 206 elements Fig. 164: Interaction of classes in OVPP during assembling of subblocks. assembled, nodList registers that node with the list of subblocks, subList, that in turn sends the node to one of its component object subblocks, an instantiation of class sub.t. At this point, the hub asks the nodList for another first node in a non created subblock, and the process continues, until no unaligned node is left. 13.4.3 Calcula te Subblock Mat r i ces Now that the subblocks have been partitioned, and properly organized within the subList object, it is time to determine the conductance matrix of each of 13. OVPP, The Preprocessor 207 those subblocks. That goal is reached through three subtasks, as follows. See Fig. 165. nod ID code in sub Fig. 165: Interaction of classes in O V P P during subblock matrix calculation. 13.4.3.1 Refer element nodes to subblocks In this task, the director prompts each element in the network to obtain the subblock relative identification code for each one of its external nodes. This will allow, further down the road, for the elements to contribute their conductance matrix into the subblock's at the correct positions. Each element, a client, request from the subblock list, subList, the server, for each node identified by its global code, and its subblock (which the element obtained in the previous task, see § 13.4.2), what is the subblock id code for that node. The service invoked is "subList.NodPosInSub."17 1 7 The reason for the name of the method is that the id code for the node is but the relative position of that node inside the subblock. 13. OVPP, The Preprocessor 208 13.4.3.2 A d d Element Cont r ibu t ions to Subblocks Now each element is directed by the hub to pour its conductance matrix contri-bution into the corresponding subblock's, by the service provided by the list of subblocks, "subList.AddMatrixElm." 13.4.3.3 Associate Chameleons to Subblocks The completion of the subblocks matrices is delayed for subblocks that include non linear elements, called chameleons in OVNI and in OVPP. In this task, the hub prompts each one of the elements that if it is itself a chameleon, to come forward and request inclusion into its corresponding subblock from the subList, via the service "subList.AddChm." The subList object passes the chameleon's inclusion request down to the corresponding block object, again through the service provided by the method "blk.AddChm." 13.4.4 G r o u p i n g Blocks Now that the subblocks have been dealt with, the director starts the grouping of subblocks into blocks, as established by the links provided in the data file. To do this, the hub goes through the same steps followed to form the subblocks, but using subList instead of nodList, since before we were grouping nodes, and now we are grouping subblocks. The connectivity of subblocks is governed by links, in the very same way connectivity of nodes is defined by elements. Then it follows that the director will use links as elements were used before, see Fig. 166. Putting it all together, first the director lets each link in the network to request from the nodList to which subblocks it is connected. Then the subList is asked by the director to provide the first non aligned subblock (i.e., a subblock not included into any block yet), and the corresponding new block id code. The service is "subList.GetFirstSublnBlk." That subblock becomes the active subblock, which is presented to each link in the network. The link, in turn, checks if it is connected to the active subblock, if it is, record the block being 13. OVPP, The Preprocessor 209 DIRECTOR Fig. 166: Interaction of classes in OVPP during block grouping. assembled as its own and requests from subList to mark the other subblock the link is connected to as "pending." At the end of this stage, all subblocks linked to the active one have been marked as pending and will be part of the same block being grouped. Now the director asks of the subList for another subblock within the same block being assembled, the service is "subList.GetNextSublnBlk." This subblock becomes the active one and goes through the same process as the first one. The hub keeps asking for more subblocks in the current block, until none is left, the blocks have been assembled. At each time the subList provided a subblock in the current block, subList registers the subblock with the list of blocks blkList, that passes the registration 13. OVPP, The Preprocessor 210 request down to the corresponding block object, and instantiation of class blkJ. At the end of this task the list of blocks has been filled, and the blocks know which subblocks belong in them. The program is ready for output. Part VI VALIDATION 14. Validation Tests 14. VALIDATION TESTS 14.1 In t roduct ion Validation of an algorithm for real time simulation of any kind of system involves two aspects: validation of its accuracy and validation of its speed. Those are the two main aspects considered in this chapter. However, OVNI's accuracy and speed are built on: a) a judicious choice of back-ward Euler's integration rule, supported and improved by b) the double step double interpolation backtrack-advance procedure; c) precalculation and triggering of new states made possible by d) topological segmentation, e) MATE segmentation, and f) the node hiding element model streamlining strategy; where MATE segmentation allowed for the efficient choice of Cholesky's algorithm to obtain links currents. This chapter's organization follows, as close as possible, the order of the topics listed in the previous paragraph. In the next section, Sec. 14.2, a quick review of the tests on integration rule issues reported in chapter 3. Following it, Sec. 14.3, test cases that illustrate the drastic effect of DSDI on two switching circuits. Then, in section 14.4, the aspect of 'speed' mentioned on the first paragraph of this section. That speed exploration includes subsections for timings corresponding to the two target cases outlined in chapter 1, the relay test case (Sec. 14.4.1), and the HVDC controller case (Sec. 14.4.2). That speed section also includes a subsection, 14.4.3, that reviews the performance advantages of MATE segmentation and the associated precalculation. Subsection 14.4.4 explores Cholesky's perormance by itself. To end this chapter, in section 14.5, a suit of tests that explores the accuracy of ONVI's simu-lation on different situations associated with the main two test cases, is included Part1 of the tests reported in this chapter were run on a Pentium II 200 MHz workstation with 32 Mbytes of RAM, 2 Gbytes hard drive at the Real Time Simulation ' The reason for the duality of the hardware platform is historic. As the project evolved, the tests to assert real-time performance were applied to the then current version of the simulator on the available workstation, and the results published. To keep match between the published results (albeit slower than the ones obtainable with the newer and faster hardware platform), the same 200 M H z machine results were kept in those sections of this thesis report. 14. Validation Tests 213 Laboratory at UBC, CICSR 043, as specified in the section describing the particular test; some of the tests were run on an AMD-K6(2) 400 MHz workstation with 256 Mbytes of RAM, and 15 Gbytes hard drive, as indicated in the corresponding section. The most critical performance tests were confirmed by measurements done separately at Mitsubishi Corporation, Tokyo, Japan; and at Electricite de France, Direction des Etudes et Recherche at Clamart, Paris, France. 14.2 In tegra t ion Issues OVNI's integration process profits from the stability and accuracy of the backward Euler's integration rule, as established in chapter 3. The associated tests were included in that chapter. In particular the experiments that advanced backward Euler's as a rule with no phase shift associated distortion, Figs. 14 and 16, and the tests on a simplified single-phase power network that explored the possibility suggested by Fig. 15, that with backward Euler's rule an integration step almost 50% larger can be used for the same 3% magnitude distortion (which provides a speed advantage to OVNI), Figs. 22 and 24. In cases where switching operations occurs off synchronism with the sampling process, the anomalous introduction of inverse currents through opening switches, and the consequent opening of non-zero currents, was solved by the introduction of the double step double interpolation procedure, in section 7.6.1. The tests that explore that procedure are included in the next three pages, under section 14.3. 14. Validation Tests 214 14.3 A s y n c h r o n o u s C o m m u t a t i o n To explore the validity of the DSDI resynchronization shift to accommodate asyn-chronous commutation, two cases already presented in [35] are included. First, a relatively simple two-diode full wave rectifier circuit, Fig. 167. And next, a six-valve three-phase rectifier group, Fig. 170. T D2 1 N-Fig. 167: A two-diode full wave rectifier case. Both cases were run first on the EMTP algorithm to illustrate the occurrence of large spurious current spikes in the diodes as a result of asynchronous commutation of the diodes. Fig. 168: For the two-diode rectifier, current in the load, current in diode one, current in diode two. Observe the current spikes of almost ten thousand amperes, when the load current peaks at less than five amperes. 14. Validation Tests 215 Fig. 169: DSDI output for two-diode rectifier case, a) Current in the load; b) Current in diode one; c) Current in diode two. For the two-diode rectifier, with voltage sources of 200 Vrms, 60 Hz, a load of 50 ohms, and a reactor of 1 mH [35], the EMTP algorithm's results for: load current, current in first diode, and current in second diode, are illustrated in Fig. 168. The same circuit, once the DSDI resynchronization shift has been included in the solution, produced, for the same currents just mentioned, the spike-free results presented in Fig. 169. Fig. 170: A six-valve three-phase rectifier group. 14. Validation Tests 216 i bad/A MIA W3/A 0 0 2 0 0 3 0 0 * 0 0 5 U s e e Fig. 171: EMTP algorithm results for the six-valve rectifier: a) Load current; b) Valve one current; c) Valve three current. For the six-diode case in Fig. 170, the asynchronous commutation of diodes one and two produced, in the EMTP algorithm, the spikes illustrated in Fig. 171. The solution with DSDI of the same six-valve case generated the spike free results shown in Fig. 172. 10 8 itoaoYA 6 YVYVWYWYVYYYVY1 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 10, 5 V1/A 7 W 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 10. 5 W3/A 0 7 V X rvx 7 V \ 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 t/sec Fig. 172: DSDI results for the six-valve three-phase case, a) Load current; b) Valve one current; c) Valve three current. 14. Validation Tests 217 14.4 S p e e d The performance of the final product, the software that embodies the algorithm devel-oped during this project, is to be measured, not as overall simulation speed (i.e., how many seconds of computing time it takes to take so many seconds of real time.) but as the speed associated with the integration step that takes the longest to compute, the slowest integration step, the critical step. The time consumed by that critical step can be related by the complexity of the computations involved, or perhaps to the refresh-ing of the associated cache. To predict what will be the conditions that produce such a critical step in a sim-ple case is possible. However, in a more realistic case, observation and measurement of the execution time of each time step of the simulation is desirable. Such measure-ments were possible thanks to the fine grain time routines created by Mr. Jesus Calvino-Fraga. The timings obtained were also subjected to validation (in the most critical cases reported in this thesis) by the research centre of L'Electricite de France, Direction des Etudes et Recherches, at Clamart, Paris, France, under the direct super-vision of the author. Independently, the same set of timings were corroborated by Mitsubishi Corporation of Japan. Both agencies accepted the accuracy validation against the EMTP as an acceptable method. To validate performance, the two target systems introduced at the begining of this thesis are used, the case for protective relay testing, and the case for HVDC con-trollers testing. 14.4.1 R e l a y T e s t i n g The relay testing case in Fig. 200 was the workhorse on top of which every single test of OVNI's solution was tried at one point or another. This configuration was pro-posed by the industry, and includes two segments of two three-phase transmission lines running along the same right-of-way, coupled to each other (a six-phase coupled group), one segment before a fault site, and another after it. It also includes series capacitive compensation and metal oxide varistor protection. On the right healthy side of the system, a three-phase transmission link brings in an equivalent three-phase Thevenin for the network "on the right." The same applies for the network "on the left." 14. Validation Tests 218 This configuration has been running for weeks on the single workstation version of the hardware solution bn top of which OVNI runs, this single workstation hard-ware implementation, thanks to Mr. Jesus Calvino-Fraga [38]. In this implementa-tion, the switches that simulate single, dual, and three-phase faults at the bus of contingency, are wired to the simulator as three physical switches. It runs, on that single 400MHz, Pentium Pro workstation at 35 microseconds per step, well within the targeted bandwidth to accommodate for the necessary data exchange overhead. The same case, in an illustration of the flexibility of OVNI's solution algorithm and code, has been running also on the parallel processing five-workstation version of OVNI, a hardware implementation possible thanks to Mr. Jorge Hollman [71]. There, Mr. Hollman prepared the 234-node test case in Fig. 179, and run it on the five 400MHz Pentium PC cluster. The solution times generated by OVNI on this parallel processing platform were 46 microseconds per integration step for the case just men-tioned (this case would run on a single machine at 164 microseconds per step.). 14.4.2 H V D C Systems The extended HVDC substation model, including saturation and zero sequence mod-elling and nine AC filters rendered the timings shown in the table below. These tim-ings were obtained on a Pentium Pro 200 MHz workstation (the inclusion of the filters and the saturation models amounted to about 1% of the model's history sources updating time.) [30] Case Description # valves Microtran (us) DU-99(us) l Monopolar 6-pulse converter 6 459 26 2 Monopolar 12-pulse converter 12 983 46 3 Bipolar 6-pulse coverter 12 897 51 4 Bipolar 12-pulse converter 24 3,120 81 Table 14.1 Solution time, per integration step, in microseconds, of four HVDC cases. Comparison between the EMTP and OVNI's prototype solutions times on a Pentium Pro 200 MHz. 14. Validation Tests 219 Fig . 173: One o f the six sections in the test network used to benchmark M A T E 14.4.3 M A T E vs . C o n v e n t i o n a l S o l u t i o n To constrast the speed of MATE segmentation with the standard unsegmented one, the same network was run on the same hardware, with both methods. The network was built linking together network sections like the one in Fig. 173. Every node in the section is grounded through a resistor, and connected to every other node in the section through some other resistor. Also, there is a current source from ground to every node in the section. In Fig 173, one of such sections, with six nodes, is illus-trated. Each section (subblock) is connected to two other sections through two links, see Fig. 174. Each link includes a voltage source in series with a resistor. The sec-tions are so connected in a ring (i.e., the last section is linked to the first one.) Tests were run with networks consisting from two to six sections, where each section had from two to six nodes. The resulting timings are given in Tables 14.2, for MATE, and 14.3, for the standard unsegmented solution. The performance differences can be better appreciated in the 3 D graphics included in the following pages: Fig. 175 (solu-tion times for MATE segmented algorithm for different networks with sections from two up to six nodes); Fig. 176 (solution times for a standard unsegmented solution algorithm); and Fig. 177 (percentage of improvement from the standard to the MATE's algorithm for the 36 networks tested in this section). 14. Validation Tests 220 Fig. 174: Six node sections connected in a ring. nodes in each subblock 1 -Q 3 2 2 3 4 5 6 2 2.9 3.5 4.2 4.3 5.4 3 5.1 5.3 6 6.9 7.8 4 6.7 6.8 6.9 8.4 9.5 5 8.2 9.1 10.2 11.3 12.2 $ 11.5 11.7 12.7 13.1 13.3 Table 14.2. Solution time (in microseconds) for a single-block network with several subblocks, and of varying nodes per subblock, with the M A T E segmentation algorithm. 14. Validation Tests 221 nodes in each subblock 2 3 4 5 6 2 15.7 24.6 38.6 55.5 75.7 J 31.7 56.3 88 136 191 4 57 106 172 260 375 5 91.7 173 287 445 649 6 142 262 446 697 1,033 Table 14.3. Solution times in microseconds with standard unsegmented algorithm, for networks formed by <row> number of sections (subblocks), where each section Fig . 175: Solution times, in microseconds, for MATE algorithm, corresponding to a network o f so many (2..6) subblocks with a given amount (2..6) o f nodes per block. 14.4.4 C h o l e s k y vs . L U D e c o m p o s i t i o n At every time step, and in each of the topological blocks, the simulator needs to solve a system of algebraic equations. The system whose solution produces the currents in the block's MATE links. In cases where the subblocks included in the block do not 1200^. - -10001 , -solution 8 0 0 i ' time (us) 8004. -400 • • 2 2 no1 ,desPer lbblo >c* Fig 176: Solution times for the unsegmented standard solution algorithm corresponding to a network with so many subblocks (1..6) with a number o f nodes in each subblock (1..6). % gain F i g 177: In percentage, how much faster M A T E is compared to the standard sgmented algorithm for the kind o f networks studied. unset contain non linear elements or switches, the links matrices can be precalculated, but in general that is not so2. The solution of the links system was first approached with a robust and efficient L U decomposition algorithm with partial pivoting. The results were satisfactory but » in the current implementation, the links matrices are never precalculated. But it may be conven.ent to do so in a future revision. 14. Validation Tests 223 size (n x n) LU (usee) Cholesky(us) 2x2 3.9 1.3 3x3 5.1 2.1 4x4 6.3 3.8 5x5 8.8 4.6 6x6 13 6.4 7x7 17.2 8 8x8 22 11 9x9 27.3 14.7 lOx 10 33.1 17.6 11 x 11 41.5 22.2 12x12 49 26.4 Table 14.4. Solution times of Cholesky method versus LU decomposition, in microseconds. left room for improvement in cases where HVDC module controllers were included. To stretch the performance of the engine, an alternative solution method was revised: Cholesky's. Cholesky works only on system whose equation matrix is positive defi-nite. That a matrix A is positive definite means, geometrically, that when the rota-tional transformation implied by the matrix A is applied to a vector V in the same hyperdimensional space where the matrix rotation is defined )a geometrical interpre-tation of space), the resulting vector turns out to be closer than ninety degrees from the original one. In the more succinct notation of vector analysis [73]: v-A • v>0 Where the dot represents matrix vector multiplication, and also vector dot product. Another interpretation to a matrix A being positive definite is that given in chapter 11 of [73], a matrix whose eigenvalues are all positive. But a positive eigenvalue im-plies a decaying natural response mode, which is always the case for the networks simulated here. Summarizing, Cholesky is safe to apply in the case of interest. The advantages in speed of the modified implementation with no pivoting used in this 14. Validation Tests 224 work of Cholesky's versus LU decomposition is patent in the tests run below. Those tests were performed on systems with 2, 3,... 12 links. In each case, Cholesky's algo-rithm beat LU decomposition by a factor close to two. This suit of tests was run on a AMD-K6 II 400MHz workstation, and compiled with Visual C++ version 5.0 with all optimizations switches on (release version). 14.4.5 P r e c a l c u l a t i o n vs . L i v e C o m p u t a t i o n In cases where all the subblocks in a block have fixed topology, i.e. they contain neither switches nor non-linear elements (no chamaeleons), the link matrices corre-sponding to every possible open-close link combination can be precalculated. In this case, the matrices inverses are prestored. The same 36 cases used to benchmark the previous two sections are used for this section too. The solution times obtained are included in Table 14.5. Graphically, the solution times can be seen in Fig. 178, and the improvement in percentage, with respect to non-precalculated MATE, in Fig. 179. nodes in each subblock 2 3 4 5 6 2 0.9* 1.7 2 2.9 3.8 3 0.95* 2.6 3.3 4.1 4.8 4 2.6 3.3 4.3 5.3 6.3 5 3.4 4.2 5.3 6.6 7.7 6 4.3 5.5 5.8 8 9.2 Table 14.5. Solution time (in microseconds) for a single-block network with several subblocks, and of varying nodes per subblock, using precalculation for the links matrices. (*) Under the granularity of the timer routines. 14. Validation Tests 225 Fig . 178: Solution time for precalculated M A T E link matrices, corresponding to blocks with subblocks from two to six, and with two to six nodes per subblock. F ig . 179: Percentage gains o f precalculating the links matrices vs. calculating them on the run, both within M A T E ' s framework, for different number and sizes o f 14 Validation Tests 226 14.5 A c c u r a c y To validate the accuracy of a simulation algorithm and its software, the ideal valida-tion tool would be the actual system being simulated. A contrast between the pre-dicted behaviour of the system as simulated, versus the observed behaviour of the real system. In the case of a simulator for an electric power network for the kind of tests targeted in this project, such procedure is out of the question: It is impractical to sub-ject the actual power network of a province (or part of) to this or that contingency that can be contrasted against the one predicted by the simulator. The next best path3, and the one used in this case, is to validate the accuracy of the simulator against an already thoroughly validated simulator (albeit a non real time one), the EMTP in this case. The EMTP is the industry standard for transients simu-lation in power electric networks. The EMTP brings with it more than three decades of validation at hundreds of sites all over the world. For this section, the tests associated with separate issues of the algorithm, mod-els, solution process, etc., are included in separate subsections. 14.5.1 H V D C M o d u l e a n d its C o n t r o l l e r M o d e l The HVDC module model, the corresponding controller model, in OVNI's implemen-tation were tested and validated for steady state and under fault operating conditions by performing comparisons with the Electromagnetic Transients Program EMTP (Microtran® Version). This section presents a detailed description of these test cases. These simulations do not include asynchronous switching compensation techniques to reinitialize the solution during current commutations and, therefore, present the char-acteristic spikes of fixed time step solutions. Simulations illustrating the effective-ness of such compensation techniques are presented in a separate section. The validation tests reported in this section were performed in comparison with Microtran® version 2.08h, with the version of the simulator's code dubbed DU-994. Both programs were run on a Pentium Pro 200 MHz workstation under Windows 95. The five test cases included in this suite are: a) Steady-state; b) Saturation Model for 3 Another possibility would have been to contrast the simulator against a TNA simulation, but the EMTP, as intimated in the introduction to this thesis, has substituted the TNA for most applications. 4 Acronym coined at the UBC-RT Lab after the author commented on the non-AI nature of the version used as driver for these tests. That version was nicknamed "Dumbo." So are labelled the test curves. . 14. Validation Tests 227 the three-phase transformers including zero sequence flux; c) AC fault; d) DC fault; e) Commutation failure. 14.5.1.1 S t e a d y - S t a t e V a l i d a t i o n T e s t To assess the HVDC model validity under steady state, a single HVDC six-valve case was set up and run on DU-99, and on the EMTP/Microtran®. In this test, saturation modelling of the transformer was turned off. Saturation model validation is presented in Section 14.5.1.2. Signals on both sides of the model, as calculated by DU-99, were compared with the corresponding ones obtained with EMTP/Microtran®, namely: primary current of the transformer, Fig. 181, and 182; and DC voltage at the load, Fig. 183 and 184. Apart from the commutation spikes, the match between the two programs is very good. The reason why the commutation spikes do not appear in Microtran's output is that Microtran does not plot the first half step of the combined trapezoidal/backward Euler's CDA implementation. The HVDC model uses only the backward Euler's rule at full-size integration steps and all simulation steps are plotted. 14. Validation Tests 228 Fig. 180: Single module, six-valve test case used to validate the HVDC module under steady state. 1.000 -1,000 t I I I I I I ; I EMTP/Microtran NDufnbo ; r ~ I i I i I I i i 125 130 135 140 145 150 155 T ime (ms) Fig. 181: Primary current, steady state, linear transformer core. EMTP/MICROTRAN and Dumbo (DU-99). 14. Validation Tests 229 f - - -I I I I I I I ] T " " -1 | Di jmbo | I / : : i i | ! \ i J L i k ; _^7Tr^ \ T ! i E M T P / M i c r o t f a n ; - I I . _ L ... ... .. .. 1 142 143 144 145 146 147 148 149 Time (ms) Fig. 182: Primary current, steady state, linear transformer core, EMTP/Microtran and Dumbo. A detail view. 282 284 286 288 290 292 Time (ms) Fig. 183: DC voltage in steady state: EMTP/Microtran and Dumbo. 14. Validation Tests 230 300,000 200.000 Sane valves are no!. AH valves are firing, firing yet in 1st eye- but firing-angle. reference signal has From 3rd cycle on, steady state is reached not reached steady state j • 40 T ime (ms) 60 Fig . 184: Voltage before and at steady state: EMTP/Micro t ran and Dumbo. Initialization, two cycles for Dumbo. 14.5.1.2 S a t u r a t i o n o f T r a n s f o r m e r C o r e To assess the validity of the proposed model for three-leg three-phase transformers, the same single HVDC six-valve case used for steady state assessment (Fig. 180) was simulated with nonlinear inductors in the EMTP/Microtran case file, and compared with the results produced by DU-99 with the saturation module enabled. Signals on both sides of the model, as calculated by DU-99, were compared with the corresponding ones obtained with the EMTP/Microtran, namely: primary current of the transformer, Fig 186 and 187; and DC voltage at the load, Fig. 188. Output voltage change was not observable as compared with the case with no saturation. This was expected, given the relatively low impedance between the bridge and the ideal sources of the Thevenin equivalent of the AC power group. Saturation distor-tion of primary current is noticeable, as can be seen by comparing Fig. 185 from the validation test for steady state with no saturation, against Fig. 186 and 187. 14 Validation Tests 231 Fig. 185: Zoom on the primary current, steady state, linear transformer core. EMTP/Microtran and Dumbo. Note: Both coincide but-[or *fre spikes introduced by Dumbo without DSDI activated, Sec. 7.7, Microtran avoids them using CDA. !- y-1 T 1 T 140 150 160 170 Time (ms) Fig. 186: Primary current, steady state, non-linear transformer core. EMTP/Microtran and Dumbo. See note in caption for Fig. 185. 14. Validation Testa 232 1.000 500 0 140 145 150 T I M E (-ms) Fig. 187: Detail of primary current with non-linear core. EMTP/Microtran and Dumbo. See note to Fig. 185. 300,000 250,000 200,000 230 235 240 Time (ms) Fig. 188: DC voltage, with non-linear transformer core. EMTP/Microtran and Dumbo. See note to Fig. 185. 14. Validation Tests 233 14.5.1.3 S i n g l e P h a s e A C F a u l t To validate the performance of the HVDC module during faults on the AC side of the bridge, a 12-valve rectifier case, Fig. 189, was prepared. The test case was run both on DU-99 and on Microtran. The DC current leaving the HVDC module, IDC, can be seen in Fig. 190, which shows both Microtran's and DU-99 results. CONTROLLER ,Iref=1800A Fig . 189: 12-valve case to validate behaviour o f H V D C model under A C faults. The small initial one degree firing angle difference is due to Microtran taking the reference angle from the ideal sources versus DU-99 taking the reference angle from the primary of the tranformers. That difference becomes greatly amplified under the large currents imposed by the short circuit on the AC side. In Fig. 191, the "ideal" reference voltage for firing angle used by Microtran is compared to the "actual" sub-station reference voltage used by DU-99 to synchronize its gate signals. The small initial error, rounded to one degree, incurred by Microtran becomes a huge 18 degree 1 8 0 0 6 0 0 4 0 0 2 0 0 1 0 0 0 5 0 0 6 0 0 4 0 0 2 0 0 i , j / : j " - j " ZorleA ] • i " i ' " " i :.: i \ • Zone B • [ i ! i ; ! 1 ; • I 1! III HI It T( i^oneC ; j | j • i | 1 ; ; ; i : : : . . . [ 1 ! i i i i i ; i i i i Fig. 190: DC current, as calculated by: a) Microtran; b) Dumbo. Note: Microtran version used did not have variable control signal implemented. firing angle error during the fault, as seen in Fig. 191. In Fig. 190b, which shows the DC current as calculated by DU-99, one can iden-tify three zones of interest against the uniformity of Microtran's results in Fig. 190a. In zone A of Fig. 190b, DU-99's controller is still firing the bridge's valves using the angle reference obtained at the last going-up zero crossing of the reference voltage, Fig. 191, which is the same as Microtran is doing. This is the reason for the match between both results in this zone. Zone B starts when, into the faulted period, the reference voltage crosses zero going up again. At that point, DU-99 notices the shift of almost 18 degrees, and corrects its firing signals to maintain the prescribed fifteen degrees, while Microtran continues to use the same reference, introducing an effective firing angle off by the above mentioned 18 degrees. Right after the fault ends, see 14. Validation Tests 235 i , -| / \ --Vy Duml \\ refere _A\ /_ / —I \ o's / ! \ ^ c e / / ! v\ —j — _ _ -I / Microtrai J referenct J \\ir > \ \ \ ' f \ | \\ f 18 deg \ \ J difference. \ \ j t-aun Begins \ f \ V y / 1 \ 1 \ / • 190 200 210 220 230 240 T i m e ( m s ) Fig. 191: Angle reference voltage for a) Microtran; b) Dumbo. Observe the small phase error before the fault, and the large error during the shortcircuit. Fig. 192, DU-99 continues to use its previous angle reference, and then, past the fault end, at the next going-up zero crossing of its reference, DU-99 readjusts its firing angles correspondingly to keep the desired fifteen degrees. i 1 1 1 1 i / Dumbo's! last \ • i " ^ synch before \ Dumbo "rejalizes" the reference / point has cjhanged / r " ~ ^ T 1 fault end£ \ i \ i \ i \ fault ends i_! i j i / i / V 1 I i i i 290 295 300 305 310 315 320 T i m e ( m s ) Fig. 192: Angle reference voltage for Microtran and Dumbo near the end of the fault. 14. Validation Tests 236 14.5.1.4 D C F a u l t The case used to validate the HVDC module against the EMTP/Microtran was the twelve valve double bridge Yy/Yd case illustrated in Fig. 193. A switch across the DC load simulated a low impedance short-circuit. To observe the recovery of the model after a DC fault removal, the switch simulating the short circuit opens after a short time. In Fig. 194, the DC current across the smoothing reactor is shown before, during, and after the DC short circuit was applied at t = 0.2 sec. and removed at t = 0.3 sec. CONTROLLER ,Iref=l800A 300ohm Fig. 193: A double bridge, twelve valve case used to explore the HVDC module during and after a low impedance fault on the DC side. EMTP/Microtran predicts a slightly smaller DC current during the fault. The reason for that lies in the way Microtran measures the firing angle of the valves. Microtran's reference angle is taken from the voltage between phases A and C of the ideal sources in the Thevenin equivalent representing the external system. DU-99 uses instead, as angle of reference, the phase of the voltage between 14. Validation Tests 237 J U u . - u . _ _ 1 _ + _ , _ 1 1 J 1 _ 1 U I I I Dumbo's ^ ^ ^ ^ ^ ^ >^ EMTP/Microtran's I / I / V 200 300 Tim« (m») Fig. 194: Fault current (DC-side): a) EMTP/Microtran; b) Dumbo. phases A and C of the primary of the three-phase transformer, see detail in Fig. 193. The phase difference between the two references used by the two programs is less than one degree under steady state conditions, that is, before the fault (after it as well), Fig. 195. However, during the high currents period of the fault, both references drift away from each other as shown in Fig. 195 and 196. And, Microtran's firing at fifteen degrees from its ideal reference is translated into an effective firing angle of more than forty degrees, Fig. 196, this reducing the feeding DC voltage, and the pre-dicted current. L - i L I _ i l _ i I —Z. L - J -200 220 240 260 280 300 320 Tim e (m 8) Fig. 195: Angle reference signals for EMTP/Microtran and Dumbo. Before, during, and after the DC fault. 14. Validation Tests 238 235 240 245 250 255 260 Time (ms) Fig. 196: During the DC fault period: a) Firing angle reference voltage, Vac for Microtran; b) Reference voltage Vac, for Dumbo; c) Voltage across valve zero in the Yyo bridge as obtained by Microtran. 14 Validation Tests 239 14.5.1.5 Commutation Failure In a case with two bridges (twelve valves) operating as an inverter fed by an 800 kV dc voltage source and a resistor (Thevenin equivalent of the rectifier group), during an AC single phase fault, the first valve of the YyO bridge group fails to open, and prevents its next-in-sequence to operate: a commutation failure scenario. In Fig. 197, current through both valves is shown; the failed attempt of valve zero to go off, and of valve two (Valves are numbered 0, 1, 2, 3, 4, and 5, in the normal firing sequence) to take over, is illustrated. The configuration of the test case is shown in Fig. 198. The proportional-integrative controller is set at 1880 A, with Kp = 0.0001 and Ki = 0.00001. Firing angle begins at 115 degrees, and is left to the care of the controller to maintain the reference DC current. The AC single phase to ground fault is simulated by the switch included in Fig. 198. 14. Validation Tests 240 Vac A angle sw (fault) reference i CONTROLLER Iref-I880A kp=O.OOOT ki=0.00001 a=H5 345kV,50Hz 15mH Gate signals 0.6H jnnrv . 300ohm _ eookVDC Fig. 198: Twelve valve, double bridge inverter case used to investigate commutation failure modelling. Figure 199 shows the steady state obtained by the controller on the inverter, with the settings mentioned before. This figure also illustrates the recovery of the controller-module group after the fault is cleared. 1 1 1 1 1 1 1 1 1 1 1 1 1 I-1 1 V f 1 t 1 1 i 4 0 0 6 0 0 T i m e (m • ) Fig. 199: DC current before, during, and after the AC single phase fault, in the inverter. sys-1 FAUL1 K— I M t " BUS1 t n f coupled fault coupled "1 FAUL2 BUS3 BUS4 500 kV Sy S . 2 8US5 Fig. 200: Fault event simulation for relay testing, with two multi-circuit segments and MOV protection of series compensation. 14.5.3 R e l a y T e s t i n g The accuracy of the simulator was put to the test case in [9], a case proposed by in-dustry, Fig. 200. The two segments of the power network neighbouring the transmis-sion system where the relay is to operate are represented by three-phase Thevenin equivalents. The case includes two segments of six phase links (two coupled three-phase lines running along the same right of way). One segment, 250 km, before the fault; the other, 150 km, to the right of the fault site ending in a series compensating capacitors protected by MOVs. The system is linked, on the right, by a 100 km three-phase line to the equivalent of the power network labeled sys-2, and directly on the left, to the power system labeled sys-1. The voltage on one of the "healthy" phases (b) at the bus of the fault, when plot-ted both by the EMTP and by OVNI, are shown on Fig. 201. To the naked eye, there seems to be no diference. When subject to some numerical scrutiny, it turns out to be a diference 0.0005 % between the two solutions5 [67]. Fig.201: Voltage on phase b at F A U L T 1. 5 Up to 0.0025 %, if the percentage is taken with respect to the EMTP value at each time, instead of using the maximum value of the EMTP's solution as percentage reference. Part VII CONCLUSIONS 15. CONCLUSIONS AND FUTURE WORK This project began as a quest for a low cost real time simulator for power networks. Even though the solution has the potential of tackling simulations traditionally solved with load flow, stability programs as well, once the necessary element models have been attached to the core developed in this work, the focus has been kept on achieving real time on two counts: testing protective relays, and testing HVDC controllers. A bandwidth of 2 kHz at a maximum 3 % magnitude distortion was taken as sufficient. Backward Euler's integration rule was found clean of the traditional blame attached to it, namely: it was found that it delays all frequency compo-nents of the signal it processes by the same time shift, half the integration step used. In short, backward Euler's rule, with a magnitude response distortion better that trapezoidal's, and also more stable, was chosen as the rule for the integrator. The integration step necessary under this conditions ranges in the vicinity of 70/Jsec/step. The real time deadline. To meet the deadline mentioned in the previous paragraph, precalculation was presented in a way that does not preclude the generality of the solution, nor taxes the system memory requirements beyond reasonable limints. To make precalculation a viable option, a three level segmentation scheme was introduced: (a) topological segmentation, followed by (b) MATE, (the multi-area Thevenin equivalent concept) with critical fast topology changing elements (or areas under certain conditions) being used as node shrouds under (c) the node hiding technique introduced in this thesis. Once MATE segmentation was set in place, Cholesky's linear system solution method was included to find MATE's links currents, which brought a reduction 15. Conclusions and Future Work 244 by half of that particular step. The MATE concept was extended to take advantage of the presence of grounded voltage sources, and methods to optimize the building of the MATE's links matrix and to process links was introduced. Also included was a procedure to cope with ideal switch operations without collapsing or creating nodes in the network. Several new models were created for this project: an HVDC module model, as a sample of the benefits of node hiding (node hiding brought the HVDC sim-ulations, already using MATE, from the vicinity of one thousand microseconds per step, down to within the real time deadline); a controller for HVDC valves. A novel technique for modelling the effect of zero sequence magnetic flux in the three-phase core of the HVDC model was also introduced. To cope with asynchronous operation of switches, the ADC (or DSDI) method of backtracking was introduced. This non iterative procedure prevents the oc-currence of numerically induced spikes in the solution. The problem described in the introductory chapter, and detailed in the "problem" part of this report, has been successfully resolved: real time sim-ulation of an electric network for equipment testing on inexpensive off-the-shelf hardware platforms. Performances of 35 //sec/step for protective relay testing cases, and of 27 /isec/step for HVDC controllers testing cases, were achived on a single Pentium Pro 400 MHz workstation. The non hardware specific algorithm and code produced make it easy to move on to newer and faster machines as they become available. The solution algorithm, and its code, segment the network in a way that allows for "coarse grain" paralellization, as shown in the results in [73], where the algorithm solved a 234-node power network at a rate of 45 //sec/step on a parallel cluster of five Pentium type processors. A method to investigate the frequency response, and stability of "hybrid" in-tegration rules that have no closed form transfer function to which a Z-transform process can be applied, has been introduced. 15. Conclusions and Future Work 245 Last but not least, demonstration of the advantages of backward Euler's rule as the main one in the simulator gives the solution presented in this report a touch of elegant simplicity and stability. 15.1 Future work The author is currently investigating the possibilities of taking advantage of the presence of voltage sources as a simplifying factor to reduce further the complexity of the network. The models created by Dr. Kwok-Wai in [33] need to be attached to OVNI to pursue load-flow type of simulations. Further study of latency exploitation [2], to account for the coupling of neigh-bouring zones running at different integration steps is necessary, and its imple-mentation in OVNI is necessary. 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