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Parasitic substrate effects in gallium arsenide monolithic MESFETs Shulman, David Dima 1992

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PARASITIC SUBSTRATEEFFECTS INGALLIUM ARSENIDE MONOLITHICMESFETSDAVID DIMA SHULMANB.Sc., Technion — Israel Instituteof Technology, 1983M.Sc., Technion — IsraelInstitute of Technology,1986A THESIS SUBM1ITbDIN PARTIAL FULFILLMENTOF THEREQUIREMENTS FORTHE DEGREE OF DOCTOROF PHILOSOPHYinTHE FACULTY OF GRADUATESTUDIES(The Department of ElectricalEngineering)We accept this thesis as confonningto the requiredstandardTHE UNIVERSITY OFBRITISH COLUMBIAJune 1992©David Dima ShulmanSignature(s) removed to protect privacyIn presenting this thesis in partial fulfilment of the requirements for an advanceddegree at the University of British Columbia, I agree that the Library shall make itfreely available for reference and study. I further agree that permission for extensivecopying of this thesis for scholarly purposes may be granted by the head of mydepartment or by his or her representatives. It is understood that copying orpublication of this thesis for financial gain shall not be allowed without my writtenpermission.(Signature)__________________________________Department ofE€L1ThC5IterrThe University of British ColumbiaVancouver, CanadaDate .DE-6 (2/88)Signature(s) removed to protect privacySignature(s) removed to protect privacyAbstractThe present large scale GaAsintegrated circuit industry is based on thefabrication of metal-semiconductor field-effect-transistors(MESFETs) on semi-insulating GaAs substrateswhich providethe device isolation. High-resistivityin semi-insulating GaAs is achieved by thedelicate balancebetween shallow donors and acceptors,and deep levels. The semi-insulating substrates,however, donot provide perfect isolationand do allow crosstalk betweenneighboring MESFETs. One source ofthe crosstalk is sidegating, usuallydefined as the change in drain currentof one MESFET as a resultof applying a negative potential toa nearby contact of another MESFET.In addition, the interactionof each MESFET with thesemi-insulating substrate is strong enough toaffect the electrical propertiesof the device, the most importantbeing the change of the output conductancewith frequency. Thiswork is concerned with the abovetwo parasitic effects with the mainfocus on sidegating, which isthe major obstacle for developinglarge scale GaAs integrated circuits.Electron injection into thevicinity of a MESFET from a nearby contactvia a semi-insulatingsubstrate is known to produce thesidegating effect. This process is known as singleinjection, becausethe injection is due to asingle carrier type. In this work wepresent a novel study of sidegatinginthe frequency domain(AC sidegating) and a new mechanismof DC sidegating in which holesareinjected into a semi-insulating substratefrom the gate of a MESFET andelectrons are injected intoa semi-insulating substratefrom a nearby contact. This processis known as double injection.We distinguish betweenhigh- and low-level double injectionwhere the low-level injection isreferred to a condition in whichthe excess carrier concentrationis much smaller than the majoritycarrier concentration insemi-insulating GaAs, while thelow-level injection is referred to aconditionin which the concentration ofinjected excess carriers exceedsthe majority carrier concentrationinsemi-insulating GaAs.High-level double injection resultsin a drastic variation of aMESFET drain current at voltageslower that those predicted by thesingle-carrier injection model.It also results in hysteresisin current11voltage characteristics as observed in experiments.It is shown that sidegating may occur under conditions of low-level double injection, becauseof the resultant excess trapped charge distribution which produces non-linearpotential profiles acrossthe semi-insulating substrate. The contributionof hole injection and recombination processes to thenon-linear potential profile is discussed.We found that AC sidegating at least up to and including the kHz range is related toDC sidegating,in a way that upon increasing a negative sidegate voltagethe AC drain current is decreasing. Uponapplying small negative or positive sidegate voltages, thuspreserving the conditions of low-levelinjection, this work predicts a strong sidegatingeffect in the kHz-MHz range due to the decreaseby a few orders of magnitude of the resistance ofsemi-insulating substrates. This is because semi-insulating GaAs transfonns in this frequency range fromwhat is called a “lifetime semiconductor”,in which quasi-neutrality of free carriersis preserved, to a “relaxation semiconductor”, in whichseparation of electrons and holes in space existsthrough zero local recombination. The presenttreatment predicts that thisform of AC sidegating will be only weakly sensitive tohole injection,and will increase and start at lower frequencieson decreasing the distance between the MESFETs.The peculiar electrical properties of the semi-insulatingGaAs in the frequency-domain are used toexplain the frequency dependence of theoutput conductance of GaAs MESFETs on semi-insulatingsubstrates. One result of the modeldeveloped in this thesis for the output admittanceof GaAsMESFETs is that while the magnitudeof the admittance can change by a factor of twoor three, thevariation of its phase is negligible.The results of this work indicate that deviceperformance is strongly influenced by thepropertiesof the semi-insulating substrate. Oneresult is that device characteristics are not determinedsolely bythe most dominant trapin the undoped SI substrate EL2, but also by recombinationcenters (whichare not EL2) and shallower traps.111Table of ContentsAbstract.List of FiguresGlossaryAcknowledgementsIntroduction2 AC Sidegating2.1 Introduction2.2 AC Sidegating in GaAs n-i-n structures.2.2.1 Experimental Procedure2.2.2 Results2.2.3 Discussion2.3 AC Sidegating in GaAs MESFETs2.3.1 Modeling2.3.2 Detemiination of model parameters2.3.3 Comparison with experimental results2.3.4 Discussion2.4 Summary3 The3.13.25562.67817172223243032323232333643485858596270717171768384GaAs MESFETs 8585858993IIviXiXIIrole of minority carriers in the sidegatingeffectIntroductionSidegating effect under conditionsof low-level injection3.2.1 Introduction3.2.2 Sidegating model3.2.3 Detailed analysis3.2.4 Discussion3.3 Evaluation of hole injection3.4 High-level double carrier injectionin the sidegating effect3.4.1 Introduction and Model3.4.2 Experiments3.4.3 Analysis and Discussion3.5 Summary4 Low-frequency transportin semi-insulating GaAs4.1 Introduction4.2 Analysis and results4.3 Discussion4.4 Applications to AC sidegating4.5 Summary5 Modeling frequencydependence of the output conductanceof5.1 Introduction5.2 Modeling5.3 Comparison withexperimental and numerical data5.4 Summaryiv6 Conclusions95References99A Potential distribution in the uniformchannel 106B Potential distribution in the exponentiallytapered channel 107VList of Figures1.1 Sources of parasitic effects in GaAsMESFETs on a SI substrate. Lines 1—4visualize interaction mechanisms betweentwo MESFETs on a SI substrate,which can be sources of sidegating:1—2 interaction between the source/drain tothe sidegate, 3 interaction between thesideate to the gate on a doped channel, 4interaction between the sidegate tothe portion of the gate on a SI substrate (thedashed line shows the edgeof the active channel area): Line 5 showsdrain-to-source leakage current,which contributes to the increase of an outputconductance of a MESFET32.2 Signal attenuation at low frequenciesfor the 20gm long structure (for sidegatevoltage VSG = —6V)measured using the low-frequency measurementsetup 72.3 Signal attenuation vs.negative sidegate voltage at lkHz(pluses),lOkHz(x-marks), and lOOkHz(circles) measuredusing the low-frequencymeasurement setup for 3mlong structure 82.4 Signal attenuation vs. negativesidegate voltage at lkHz(pluses),lOkHz(x-marks), and lOOkHz(circles)measured using the low-frequencymeasurement setup fori4mlong structure92.5 Signal attenuation at radiofrequencies for the 201im long structure(for sidegatevoltage = —6V) measuredusing the high-frequency measurementsetup. . . 102.6 Signal attenuation at radiofrequencies for the 450[tm long structure(for sidegatevoltage = —6V) measuredusing the high-frequency measurementsetup. . . 112.7 Physical system correspondingto the differential equation2.4 which is used forinvestigating frequency-dependent transientsin SI GaAs. At t=0 the switch isclosed and the DC biasing voltage V0and the sinusoidal input V(t) are appliedto a bar of SI GaAs, which isinitially biased at V132.8 Schematic AC current-voltagecharacteristics for space-charge-limitedconduction in SI GaAs at two frequenciesf2 > f1. The currentwill be confinedin the triangle bounded by thelines formed by the DC traps-filled-limitvoltage,the trap-free square law and theohmic conduction152.9 Schematic space charge distributionin a GaAs MESFET operatingin thesaturation region with a negative gatebias182.10 Distributed network for a GaAsMESFET in the saturation region202.11 Experimental (dashed line)and calculated (solid line) dependencesof ACsidegating on the gate bias for adepletion-mode GaAs MESFEToperating atVDD= O.5V, —3V, 100kHz.Parameters: cb = 15.4fF, Tb =1.1GI1, r5 = 0.06Gl, c = 15ff.Zero bias gate capacitance is 90ff242.12 Experimental (dashed line) and calculated(solid line) dependencesof AC sidegatin on the gatebias for a enhancement-mode GaAsMESFET operating at VDD = 0.5V, VSG= —1V, 100kHz. Parameters:cb= 17ff, rb= 2.8GfZ, r5= 0.15G,c 15ff. Zero bias gate capacitanceis10ff252.13 Experimental (dashed line)and calculated (solid line) dependencesofAC sidegating on the gate biasfor a depletion-mode GaAsMESFET atVDD= 3V, VSG —1V,100kHz. Parameters:Cb= 17ff,Tb= 2.8Cfl, r5 = 0.l5G, C 15fF26vi2.14 Experimental (dashed line) andcalculated (solid line) dependences of ACsidegating on the drain-to-sourcevoltage for a depletion-mode GaAs MESFEToperating at VG = OV, VSG = —2V,100kHz. Parameters: cb = 16.3ff,r =3.2Gf, r3 = 0.17G, c = 15ff, rh32101, c33 84ff272.15 Experimental (dashed line) and calculated(solid line) dependencesof AC sidegatin on thesidegate bias for a depletion-mode GaAsMESFET operating at VG = OV, VDD = 0.5V,10kHz. Parameters:Vchs= 175Q, C33 = 90ff, C3 =15ff282.16 Experimental (dashed line) andcalculated (solid line) frequencydependence of sidegating for depletion-modeGaAs MESFEToperating at VG = OV, VDD = 0.5V, VSG= —1V. Parameters:Tchs= 175f1, C33 = 90ff, Cb = 17ff, Tb2.8011, Ts = 0.15011, C = 15ff. . .. 293.17 Typical drain and gatecurrents as a function of sidegate voltage(VD= 2 V, VG = 0 V). Themeasurements were performed in the dark ondepletion-mode MESFETs fabricated byion implantation into a SI substrate. Thetypical threshold voltage was —0.6 V.The gate length was l[tm and width4im.The gate-source andgate-drain distances were 2im. The ohmiccontact of theadjacent MESFET, which servedas a sidegate in our measurements, wasplacedparallel to the source at a distanceof 8im and was 23tm from the gate343.18 Hole injection from Schottky gate.(a) For a small sidegate voltage. (b)For alarge sidegate voltage353.19 Schematic band diagramof the gate-sidegate structure in equilibrium373.20 Concentration profile oftrapped and free excess carriersin the 20gm longmodel structure. The solidline corresponds to trapped carriers, dashedline toelectrons, and dashdots to holes.The carrier densities are normalized totheequilibrium electron concentrationThe sidegate voltage is —5V,theequilibrium electron concentrationis 7 x106crn3,the equilibrium holeconcentration is 2 x i05 Cm3,the electron mobility is 4 x i03crn2/Vsec,the hole mobility is 400 Cm2/Vsec,and the lifetime is 1 nsec. EL2is assumedto be 0.75eV from theconduction band, its density1016cm3,and the ratio ofits capture cross sections for holesand electrons i0. The recombinationcenter is assumed to be 0.65eVfrom the conduction band, withdensity10i5Cm3,and the ratioof its capture cross sections 100403.21 Concentration profile of trappedexcess carriers as in Fig. 3.20, butonly in thevicinity of hole injecting edge(x=0). The charge profilechanges polarity ataround0.4gm413.22 Electric field profile in theinvestigated structure with thesame parameters as inFig. 3.20, but for differentdensities of recombination centers: dotscorrespondto1016cm3,dashed line to1015cm3,and solid line to i014 m3423.23 Potential profile corresponding tothe conditions described in Fig.3.22 433.24 Electric fieldprofile in the investigated structurewith the same parameters as inFig. 3.20, but for differentvalues of the minority carrier injection(n): dotscorrespond to i,=l, dashed line to 0.5,and solid line to 0443.25 Potential profilecorresponding to the conditionsdescribed in Fig. 3.24453.26 Schematic superimpositionof the potential profile acrossthe investigatedstructure in the presenceof a sidegate voltage Vo(dashed line), and for zeroapplied voltage (solid line). W1designates the widthof the substrate-channeldepletion layer46vii3.27 Drain (solid line), gate(circles), and sidegate (asterisks)currents vs. sidegatevoltage (VD = 2V, VG =OV). The gate current changesits polarity at about—3V. The gateand sidegate currents coincide atthe voltages more negativethan-8V513.28 Channel punch-throughin low pinch-off GaAs MESFETs(VD= 2V, VG: OV to —O.2V): (a) gate currentincreases rapidly when aMESFET is nearly pinched offas a result of applying anegative sidegatevoltage. (b) the correspondingsidegate current523.29 Hole injection and acorresponding energy-band diagramfor a (a) quasi-neutralMESFET, (b) MESFETwith a large negative sidegate voltageapplied. Thecombination of theinversion layer, n-channeland semi-insulating substratecreates a P-N-P lookslike structure543.30 (a) Cross section of theinvestigated three-terminalstructure consisting of twoMESFETs. Using a Schottky(gate) and an ohmic contact (source/dram)of oneMESFET together with anohmic contact of the other MESFET,the structureacts as a surface-barriertransistor with a gate operatingas an emitter. (b) Anequivalent bipolar transistorstructure with a long collectorregion 553.31 Measured currents vs.collector voltage characteristics.The solid linecorresponds to the emitter (gate)current‘Eand the dashed line to the collector(sidegate) current1c.The leakage currentIL(designated by dots)is thecurrent between base and collectorwhen the emitter is floating563.32 Calculated holeinjection ratio, defined as(I — IL)/iEfor the emitter-basebias of 0.1 V (solid line)and 0.2 V (dashed line).‘E”Cand‘Lare defined incaption of Fig. 3.31573.33 Schematic layoutof the mirror-image structureof two MESFETs thatwereused in the sidegatingmeasurements. The channelwidth, gate length,gate-source and gate-drain spacingswere 4 pm, 1 pm, 2 pm and2 pmrespectively. The dotted areais the active layer areaof the MESFETs. Whenone of the MESFETs wasbiased, the other’s ohmiccontact served as asidegate. The sidegatewas 8 pm from the source and23 pm from the gate. . . . 603.34 Drain, gate and sidegatecurrents as a function of sidegatevoltage(VD=2V,VG=OV)613.35 Drain current versussidegate voltage for aMESFET with a floating gate(VD:1—5V)623.36 Hysteresisin the drain current (VD = 2V, VG= OV), and in the gate-sidegatecurrent (source and drainare floating). The solidline represents a decreasing(more negative) sidegatevoltage, while the dotted linerepresents the oppositedirection633.37 Schematic energy-banddiagram of a MESFET gateon a SI substrate653.38 Hysteresisin the gate-sidegate structuresunder increasing illumination(VSG= OV, drain and sourceare floating). The solidline corresponds to thedataobtained in the dark,dashed line corresponds tothe data obtained withroomlights, and the open circlescorrespond to the dataobtained under microscopelamp illumination. Resultsobtained in the dark orwith room lights showhysteresis, while thoseobtained under directillumination show no hysteresis.. . 683.39 Schematic topview of the area (designatedby gray pattern) thatis affected byhole injectionfrom the gate on a SI substrate69viii4.40 Schematic equilibrium band diagramof the semi-insulating structureof a lengthL between zero-field points in the vicinityofN+and Schottky contacts724.41 Concentration profile of excess trappedand free carriers in the 50tmlongmodel structure at 1Hz with nohole injection (i=O). The solidline correspondsto trapped carriers, dashed lineto electrons, and dots to holes. Theamplitudeof AC applied voltage is 5OmV,the equilibrium electron concentration is7 x10bcm3,the equilibriumhole concentration is 2 x i05 cm3,theelectron mobility is 4 x iücm2/Vsec,the hole mobility is 400cm2/Vsec, andthe lifetime is 10 nsec. The deepdonor is assumed to be 0.75eV from theconduction band, its density 2x1016cm3,and with the capturecross sectionof 1 x lO3cm2for electronsand 1 x lO6cm2for holes . The deepacceptoris assumed to be 0.65eVfrom the conduction band, withdensity5 x1015cm3,and with the capture crosssection of 1 x lO3cm2for holesand 1 x 10’6cm2for electrons754.42 Concentration profile oftrapped and free excess carriers at1MHz with no holeinjection. The rest of theparameters are given in Fig. 4.41764.43 Concentration profileof trapped and free excess carriers at1Hz in the presenceof hole injection (i=1). The restof the parameters are given in Fig. 4.41774.44 Concentration profile of trappedand free excess carriers at 1MHzin the presenceof hole injection (=1). The restof the parameters are given in Fig.4.41 784.45 Frequency dependenceof the conductance of the SI structurecalculated usingeq. (4.64). The dashedline corresponds to the conductancein the presence ofhole injection (ij=l) andthe solid line to the conductancewhen no holeinjection occurs(i=O).The rest of the parameters aregiven in Fig. 4.41 794.46 Frequency dependenceof the capacitance of theSI structure calculated usingeq. (4.64). The dashedline corresponds to the capacitancein the presence ofhole injection(7t1) and the solid line to the capacitance when no holeinjection occurs (i=0). The restof the parameters are given inFig. 4.41 805.47 Schematic cross sectionof a MESFET and an AC potentialprofile across thedrain-substrate-source region. LFcorresponds to the profile atlow frequencies,HF at high frequencies865.48 Small-signal equivalentcircuit of a GaAs MESFET atlow frequencies 895.49 The impact of the devicestructure on the frequencydependence of the outputadmittance. The first rowshows MESFETs with a p-typeburied layer. A deep player reduces the frequencydependence, while a shallow player may increase it.The second row shows theeffect of the gate location onthe frequency-dependentoutput admittance: placing gatecloser to the source enhancesthe frequencydependence, whileplacing it closer to the sourcemay reduce the effect915.50 Drain conductancevs. frequency. Resultsof the present model(solid line) are superimposedon numerical results (dashedline) [7],and experimental data(circles) [20]. Parametersused: T = 300 K,ND= 1017cm3, NA = 6x 1015cm3,VDS = 2.5V, VDST= 1.45V,1sg =1dg= lzrn, 1 = 1.2,um, ex 1O7cm3,p lO5cm, for trap at 0.69eV;N1 = 5 x 1016cm3, =2 x 1014cm2,0p1= 2 x 1O8cm2for trapat 0.5 eV;N2 = 5x 1015cm3,a = 5 x 103cm2,,°2 =5 x 107cm2.. . . 92ix5.51 Drain conductance vs. frequency at 325K and 375 K. Results of the presentmodel (solid line) are superimposed onexperimental data (circles andasterisks)after Canfield et. al [4]. Parameters used: NEL2 = 5x1016cm3,NA =5 x 1O15cm,1sg = 1dg == litm, VDS= 3V, VDST = 1.6V93xGlossaryMESFET — metal-semiconductorfield-effect-transistorSI — semi-insulatingVLSI — very-large-scale integrationLSI — large-scale integrationIC — integrated circuitTFL — trap-filled-limitSCL — space-charge-limitedMMIC — monolithic microwaveintegrated circuitJ — electric current densityI-V — current-voltageDC — direct currentAC — alternate current— minority carrier injectionratioT — carrier lifetimeq — magnitude ofthe electronic charge— electron mobility— hole mobility— equilibrium electron concentration6n — excess electron density— equilibrium hole concentration— excess hole densityxiAcknowledgementsI would like to thank my supervisor ProfessorLawrence Young for his help and support duringthe course of this work.Kerry Lowe from BNR (Ottawa) is thanked for providing the testdevices used in this research.This work is dedicated to my parents.xiiChapter 1IntroductionIn present GaAs technology, MESFETsare the only devices which have approachedthe VLSIlevel of integration.This is due to the simplicity of their fabrication:all we need is two ohmiccontacts (source and drain) and aSchottky contact (gate) on a conductivelayer (channel). However,with all its simplicity a MESFETexhibits numerous parasitic effects.This work is concerned withparasitic effects in GaAs MESFETintegrated circuits, which hinder high-levelintegration.The VLSI level ofintegration requires the fabrication of MESFETson semi-insulating (SI) substrates, which makes theGaAs technology especially attractive becausethey reduce the interconnectcapacitances and makedevice isolation simple. The MBE-grownbuffer layers are currently toocostlyfor use in the VLSI technology[1]. But the SI GaAs does not act asa mere mechanical supportwith high resistivity, and doesallow leakage currents through the SIsubstrate between neighboringdevices, as well as the leakagecurrent between source and drainof each device. These currentsoriginate effects which affect deviceperformance. Rather than review theseeffects here, the readeris referred to the recentlypublished text book on GaAsintegrated circuits by Long andBurner [2].In addition, there are reviewarticles on the parasitic effectsin GaAs integrated circuits byRocchi[3] and more recently byKoyama et at. [4] and Salmon[5]. Many effects in GaAsMESFETs wereinvestigated using the techniquesthat had already beendeveloped for Si devices. Butit is importantto stress that thereis a significant difference in thetreatment of substrate effects inGaAs and Sidevices. Probably themost fundamental differenceis associated with the relaxationtime in Si and SIGaAs substrates. While therelaxation time of a typicalSi substrate is in the range of picoseconds,therelaxation time of a SIGaAs substrate is typicallyin the range of milliseconds-microseconds.Thismeans that the charge injectedinto the bulk SI GaAswill not disappear as fast as in Sisubstrates.Consequently, the parasiticsubstrate effects willoccur beyond the conventionalsilicon transistorbandwidth, but inside thebandwidth of GaAsMESFETs.Additional parasitic effectsare associated with aSchottky MESFET gate. It isinteresting tonote that Schottky junctionshave never been usedin the VLSI Si technology, and theirmost popular1usage found place in the earlier digital LSI technology(TTL). In comparison to p-n junctions manyproperties of Schottky junctions are muchless understood. A Schottky gate is, however, an essentialpart of the GaAs MESFET technology, and, therefore,its contribution to the parasitic effects inGaAs MESFETs should be considered.The major parasitic effect in GaAs integrated Circuitsis sidegating, the change in drain currentas a result of applying a negative potential to anearby contact (sidegate). The earlier attempts toexplain this effect suggested electron injection into thedevice channel-substrate interface as the mainsource of sidegating [6]. This explanation was basedon the one-dimensional Lampert’s model ofhigh-level carrier injection into the insulatorwith traps, according to which the current increasessharply at a certain threshold voltage [7].Considering high trap densities in SI GaAs and typicaldistances between a MESFET and asidegate, this model has difficulty in explaining the low voltagesat which sidegating is often observed.To overcome this difficulty conduction through surfacestateswas suggested [8, 9]. While someof the reported experimental results regarding sidegatingcouldbe explained in terms of surfaceconduction, there are many reports of sidegatingin large-geometrydevices and in layout arrangements in whichthe sidegating should have been greatly reducedif thesurface had played a major role, butinstead a strong effect was observed. According to thetherecent review paper by Salmon, circuitmanufacturers have developed processes,which control thesurface properties, so that, “the surface componentof backgating is negligible compared with thebulk backgating” [5].Sidegating is a complicated phenomenon,in which several mechanisms of transferringchargeinto the vicinity of the MESFET channelmay occur. In certain structures, and,depending on substrateproperties, one of the mechanismscan prevail, but on the other handsome mechanisms can occursimultaneously. Fig. 1.1 visualizessome of the sources of parasitic effects inGaAs MESFETs ona SI substrate, that are discussedin this work.Although the present work has focusedon GaAs MESFETs, many of the results areapplicable forother devices that incorporate SImaterial. MESFETs are used here as a probeof parasitic phenomenaoccurring in SI substrates. Beingsimpler than other GaAs-based transistors, theyprovide a tool for2SEMI-INSULATING SUBSTRATEFigure 1.1: Sources of parasitic effects in GaAs MESFETson a SI substrate. Lines 1—4 visualize interactionmechanisms between two MESFETson a SI substrate, which can be sources of sidegating: 1—2interactionbetween the source/drain to the sidegate, 3 interactionbetween the sidegate to the gate on adoped channel, 4 interaction between the sidegate tothe portion of the gate on a SI substrate(the dashed line shows the edge of theactive channel area). Line 5 shows drain-to-sourceleakage current, which conthbutes to the increaseof an output conductance of a MESFET.understanding of the interaction with the SIGaAs of more complicated devices such as HEMTs[10]and HBTs [11].Although measurements by the authorare reported throughout this work, the emphasisis noton the measurement techniques, buton the analysis and modelingof the experimental results. Thereason for this is that many of the resultsin this work are similar to those reported byother researchlaboratories during the last decade.Since the general behavior of thedevice is known, the major taskfor researchers is the understandingand interpretation of this behavior. The emphasis wasput onan analytical treatment, since it usuallyprovides more insight into device physics thando numericalmethods. The present state of theGaAs MESFET technology stillrequires understanding of thebasic phenomena occurringin the integrated circuits, and, therefore,in my opinion, such analysisshould precede, or at least be inparallel to, numerical analyses. For example,in order to simplifycomputation many numerical analysesof sidegating do not consider the continuityequation for holes,and thus eliminate from thediscussion many effects predicted by the analyticalanalysis, which takesthe participation of holesinto account. An additional reasonfor analytical modeling is to make resultsuseful for circuit designers by providingclosed-form expressions through which a clearrelationshipis established between design goalsand physical device parameters.2P29DEVICE 1DEVICE 23In Chapter 2 the experimental investigationand R-C network modeling of AC sidegating arereported. In Chapter 3 the sidegating under conditionsof low-level injection into the SI substrateand the role of double injection in the sidegating effectare discussed. In Chapter 4 the extensionof the low-level analysis to the frequencydomain is presented. This frequency-domain analysisconfirms and provides a new interpretation for the experimentalresults shown in Chapter 2. Chapter5 shows how the frequency-domainanalysis is applied to modeling of the frequency-dependent outputconductance of GaAs MESFETs. Finally, conclusionsare presented in Chapter 6.4Chapter 2AC Sidegating2.1 IntroductionCrosstalk between GaAs MESFETs on SI GaAssubstrates can severely affect device isolation andis a major obstacle to the miniaturization of GaAs integratedcircuits. An important source of crosstalkis sidegating. Most reports of sidegating have beenfor DC conditions [12—14]. The results have beensubject to different interpretations [12,15, 8] . AC measurements and their analysis may provide atool to decide which of various postulatedmechanisms is currently occurring. Recently Chen et al.[161addressed AC sidegating (at 40MHz and 2GHz). They concluded thatit must be consideredin designing GaAs monolithic microwave integratedcircuits. Thus modeling of sidegating, whichwill predict at least the trends in device behavior,is needed in designing GaAs integrated circuits.The need to extend the investigationof sidegating to the frequency domain is fuliher shown by thefollowing.As with silicon CMOS technology, inwhich the development of digital circuits was followedby the development ofanalog circuits, to provide an interface between the digital circuitryand theexternal world, the implementation of complexdigital-analog systems on a GaAs single chip maysoon be at issue. An understanding ofthe interaction between the analog and digital portions ofthe system will then be required. The investigationof this interaction is expected to be particularlytroublesome at low frequencies, at which anomaliesin GaAs monolithic MESFETs are observed. Athigh frequencies understanding crosstalk is importantbecause of the tendency to combine microwaveor RF circuits with their digitalcontrol circuits, e.g. RF switches with a driver circuit.Sidegatingin GaAs digital integrated circuits has beeninvestigated by applying a pulse train to thesidegate,but only the DC componentof the pulse waveform has been considered[16, 17]. The effect, forexample, of the pulse train repetition rateon sidegating has not been examined.52.2 AC Sidegating in GaAs n-i-n structuresMESFET interaction has usually been simulatedby applying a negative potential to a sidegatecontact on the semi-insulating GaAssubstrate and examining its effecton a nearby device located onthe same substrate, rather thanhaving two MESFETs. According to theTFL model [12] sidegatingis caused by electron injectioninto the channel-substrate interface of a MESFET andthis processoccurs due to the space-charge-limitedconduction between the sidegate and thedrain. Therefore, thesidegate-SI-drain interaction dominatessidegating, and, consequently, in thepresent section a simplerstructure (n-SI-n) has been investigated,which avoids the complex electrical field distributionunderthe MESFET that otherwisecomplicates the analysis and the interpretationof the experimental results.2.2.1 Experimental ProcedureThe measurements wereperformed on planar structures of ohmic contactson semi-insulatingGaAs substrates. Both the inputcontact, which represent the sidegate,and the output contact, whichrepresent the drain, weren+Si implanted directly into SI substrate.The two electrodes were separatedby distances of 3 zm to 450m of semi-insulating material.For measurement between 100Hzand 100kHz, the input of thesample was connected to asignal generator, while the output wasconnected to a Princeton AppliedResearch(PAR) 5204 lock-inanalyzer via a PAR 113low-noise amplifier, which was usedin order to bring the signal to the leveldetectable by the lock-inanalyzer.A different experimental arrangementwas used for measuring thesidegating between 500kHzand 500MHz: the sidegatewas connected through a high frequencyprobe to the HP 8656 signalgenerator, while the outputwas connected through anotherhigh frequency probe to a HP 8558spectrum analyzer.Note that amplification of thesignal in these two experimental set-upsis different. In the low-frequency set-up thevoltage gain of the low-noise amplifieris set to 2 x 1O and its input is shuntedbya 150 !l resistor. Theoutput resistance of the amplifier is 600Q and it is connected to thePAR lock-inanalyzer with an input impedanceequivalent to a 1 MIlresistor in parallel with a 30 pF capacitor.In the high-frequency set-up the outputis connected to a 50 l inputof the spectrum analyzer.6zCzFigure 2.2: Signal attenuation at low frequenciesfor the 2Opm long structure (forsidegate voltage VSG = —6V)measured using the low-frequency measurementsetup.2.2.2 ResultsThe measured signal attenuationthrough the semi-insulating substrateis piotted as a function offrequency for the range 100Hz- 100kHz in Fig. 2.2. Thelinear fit exhibits 20dB per decade changeof the output signal level with frequency.The signal attenuation at low frequenciesfor structureswith distances of 3m and 14itmbetween the contactsis plotted as function of a sidegate voltagein Figs. 2.3 and 2.4. The3 m long structure showsstronger sidegate voltage dependencethan the10 im long structure at the samerange of applied voltages.This effect becomes more pronouncedfor lower frequencies.The measured RFsignal attenuation is plotted ys.frequency for the range of 500kHz -500MHzin Fig. 2.5. The outputsignal level increased 20dBper decade with frequency.Another setFREQUENCY (Hz)7z0zzCDFigure 2.3: Signal attenuationvs. negative sidegate voltage at lkHz(pluses),lOkHz(x-marks), andlOOkHz(circles) measured using the low-frequencymeasurement setup for 31tm long structure.of measurements (Fig.2.6) at radio frequencies was performedon the structure with two contactsseparated by 450 tm.2.2.3 DiscussionSeveral mechanisms contribute to thecrosstalk phenomena. For a givenarrangement of conductors if the spacing is small, the electricand magnetic fields of the conductorswill overlap sufficiently,so that a wave propagatingin one of them willinduce a wave in the others. Thus partof the ACsidegating is caused by the couplingbetween two metal pads throughan air and a dielectric material[18, 19]. Capacitivecoupling is of course directlyproportional to the frequency andwill increase20dB per decade withit (see Figs 2.2 and 2.5).-90-4 -3.5 -3 -2.5-2 -1.5 -1 -0.5 0SIDEGATE BIAS (V)8-45-50-zo60-65-70zctc1 -75-80-85-5SIDEGATE BIAS CV)Figure 2.4: Signal attenuation vs.negative sidegate voltage at lkHz(pluses),lOkHz(x-marks), andlOOkHz(circles) measured usingthe low-frequency measurement setupfor l4pm long structure.Another mechanism contributing to. thesidegating involves the conductioncurrent through theinsulating substrate with traps. Atlow voltages an ohmic currentwill be observed. With increasingapplied voltage the injectedcarriers fill up the traps in thesubstrate arid as the voltage reaches acertain threshold (trap-filled-limitvoltage), at which all thetraps are full, a steep rise in thecurrentwill occur [201. According toLee et al. [12] a trap-filled space-charge-limitedcurrent is observed insemi-insulating GaAs samples.The more detailed modelsof this phenomenon proposed by Léhovecet al. [21] andHorio et at. [22] suggest thatthe space-charge-limited currentthrough the semiinsulating GaAs increases abruptlywhen the sidegate voltage exceeds a certainthreshold and causesthe substrate resistanceto be reduced over a certainrange of voltages. Avalanche breakdown [8]can also produce a thresholdeffect.-4.5 -4 -3.5 -3-2.5 -2 -1.5-19-40-50-60-70-80ci,-90-100-10l0Figure 2.5: Signal attenuation at radio frequenciesfor the 20,um Long structure (forsidegate voltage VSG = —6V) measuredusing the high-frequency measurement setup.However, the models proposed toexplain the sidegating in semi-insulatingGaAs concentrateon the investigation of DC current-voltagecharacteristics only. Semi-insulating GaAsis known tocontain both electron and hole traps[23]. The dependence of the space-charge-limitedconductionupon frequency is expected to beinfluenced by the effects oftrapping [24, 25]. The frequencydependence arises from the finite timeconstant associated with thecharging and discharging of thetraps in semi-insulating GaAs.We will consider only one electrontrap, commonly referred to asEL2, which is the most important trapin determining the properties of semi-insulatingGaAs [261.The trap filling can be analyzedusing the Shockley-Read-Hallmodel for recombination through asingle level, which, of course, neglectshot electron andfield enhanced detrapping effects, whichconceivably may be important in thepresent situation. The rate equation ofthe full traps on a single+++++106 l0 108FREQUENCY (Hz)10—55 I I I I II I I liii-60, -65-70--80-85-90-95I I I I I II106 10108 10FREQUENCY (Hz)Figure 2.6: Signal attenuation at radio frequenciesfor the 450im long structure (forsidegate voltage VSG = —6V) measuredusing the high-frequency measurement setup.level is given by [27]:NT = NT[(cn +e)(1— f)— (Cpp + en)fj;(2.1)whereNT= density of traps,f= fraction of traps occupied by electrons, n, p= electron and holedensities, e, e = emission rates forelectrons and holes, c, c7, = capture probabilitiesfor electronand holesThis equation can be simplifiedwhen the concentration of one carrier largelyexceeds theconcentration of the other. Thisis true for the single carrier high injectioninto the substrate.Furthermore, for EL2 the emissionrates for electrons are much greater than thatof the holes [28].Next, we express theelectron concentration around its steady state value: n(t)= no+n(t). Under11these conditions the trap filling equation reduces to:• dflT—= —(n + n1)cnT + flCNTdt (2.2)= —[no+In(t)+ nh]CnflT +[n0+ In(t)]cNT;whereT= NTf,n1 = electron density if theFermi level were at the trap energy level.For small variations in electron concentration aroundits steady state value [no>> zn(t)j thetime constant associated with the traps isgiven by [291:= 1/c(no + n1).(2.3)Since the steady state electron concentrationcan be much greater than its equilibrium value thetime constant associated with the small variationsin electron density also can be muchlarger thanthe emission time constantin equilibrium. Under these conditions thetime constant does not varywith time. However, it is important to stressthat the electron density and consequentlythe timeconstant vary across the region betweentwo electrodes. If the electron concentrationis 1 x1013,using the equilibrium EL2 emissiontime constant given by [28], the time constantcan be estimatedto be about 20 1us.For large transient variations in electronconcentration the exact solutionof 2.2 is complicated.However, assuming n0 >> n1, sothat we can write n0 no + n1,which is true for high appliedvoltages or for traps lying belowthe Fermi level, the solutionof equation 2.2 for n(t) =cos (wt) is given by:nT(t) = NT + [flT(0) — NTjexp{—c[(no+ni)t+ flmaxSfl(Wt)/Wj}(2.4)whereT(0) = initialdensity of the full traps. Thephysical system corresponding to the eq.2.4is shown in Fig. 2.7.Equation 2.4 allows an examinationof the trap filling time and showsthat it is frequency-dependent. At high frequencies thetransient response of the traps isnot affected by the variationsin free electron density because flmas/Wis small, but at low frequencies thevariations in the free12V(t)SIGaAsV0Figure 2.7: Physical system corresponding tothe differential equation 2.4 whichis used for investigatingfrequency-dependent transientsin SI GaAs. At t=O the switch is closedand the DC biasing voltage V0and the sinusoidal input V(t) are applied to abar of SI GaAs, which is initially biased at V1.electron ‘density are important in determiningthe transient response. For a very shortperiod of timesin(wt) wt and the timeconstant is given by:= 1/c(no + fli +‘flmar).(2.5)For large t the exponential decaywill be determined by exp[—cn(no + ni)t].Thus the trap fillingtime constant will vary withtime under transient conditions.This time constant can be in thenanosecond range at theinitial stage of transientresponse and will be equal to r8 asapproachingthe steady state. The chargeon the deep level adjusts with atime constant T which variesfrom r0to i-s. In the frequencydomain this means that for frequencies f >>1/(2iri-) the deep level cannotfollow the variations inthe electron concentration, whichrespond very fast to the changesin theapplied voltage. However,the time constant r is both time andspatially distributed and thereforethere will be atransitional frequency region in whichthe traps will partly respond.The chargeinjected into the semi-insulatingsubstrate is equal to the freeand trapped charge. At lowfrequencies[f<<1/(2irr)j the quasi-thermal equilibriumbetween the free and trappedelectrons is maintained.Therefore, the appliedvoltage modulates both thefree and trapped charge.However, only freeelectrons contribute tothe conduction. Thus the low-frequencycurrent-voltage characteristicswill bet=O++Vi13similar to the static ones, includinga steep rise in the current at the trap-filled-limitvoltage. At highfrequencies [f>> l/(27rT)] the trapscannot follow the changes in theapplied voltage. Therefore,only the free charge is modulated and thesubstrate behaves as a trap-free material.Thus the high-frequency current-voltage characteristicswill exhibit a trap-free square law without a steep rise in thecurrent at any voltage. Therefore theset of dynamic current-voltage characteristicswill be confinedin the triangle formed by the trap-filled-limit,trap-free square, and Ohm’s laws asshown in Fig.2.8. This can be interpretedin terms of the frequency-dependent trap-filled-limitvoltage, whichwill be confined by the DC trap-filled-limitvoltage in its upper low-frequency limit, andby thevoltage in which the transitionfrom the Ohm’s law to the trap-free squarelaw occurs in its lowerhigh-frequency limit. Thus the substratesmall-signal resistance will exhibit a frequencydependenceat moderate frequencies, butwill act as a simple resistance at low and highfrequencies (neglectingthe electron transit-time effects).This frequency dependence is expected to occurin the megahertzrange, which is above the frequencylimit (100kHz) of our low-frequency experimentalarrangementthat was used to investigatethe AC sidegating as a functionof sidegate voltage.The above analysis shows that thesemi-insulating GaAs can be representedas a bias andfrequency dependent conductanceand capacitance in parallel. The impactof the resistive componentwill be more pronouncedfor low frequencies and for lower resistance. Theresistance can be reducedfor example by:1. decrease in the sidegate - outputpad separation2. increase of the magnitudeof the applied negative biasvoltageThus, one might observethis effect at low frequenciesfor the structures with a short separation.The experimental resultsbetween 1kHz - 100kHz forthese structures are shown inFigs. 2.3 and2.4. At these frequencies theconduction in the substrateis not expected to be frequencydependent.The measured DC voltage atwhich the decrease of a small-signalresistance occurs is l.6VandO.3V for thel4m and 3m long structures respectively.At 1kHz and 10kHz thecouplingvariation with the sidegatepotential is clearly shown.This dependence is stronger for theshorterstructure. At 100kHz thesidegating is dominated by thecapacitive coupling and therefore exhibitsa weaker bias dependence.14c-)VOLTAGEFigure 2.8: Schematic AC current-voltage characteristicsfor space-charge-limited conduction in SI GaAs attwo frequencies f2 > f1.The current will be confined in the triangle boundedby the linesformed by the DC traps-filled-limit voltage, the trap-freesquare law and the ohmic conduction.The capacitance between twolong metal electrodes located on the dielectricsubstrate is determined by the ratio between the metal padwidth and the separation distance [19].A larger separationbetween the sidegate and the outputcontact weakens the coupling by decreasing thecapacitanceand increasing the resistancebetween the two electrodes. Italso increases the voltage required toinitiate the trap-filled space-charge-limitedconduction in the semi-insulating GaAssubstrate. For theapplied voltages well below thetrap-filled-limit voltage, ohmic currentthrough the semi-insulatingsubstrate is expected. One mayanticipate typical parallel RC network bias-independentbehaviour inthe frequency domain under theseconditions. However, the experimentalresults which are showninFig. 2.6 indicate different frequencydependence: output signal levelincreases with frequencyuntil itsaturates at approximately 40MHz andincreases again at higher frequencies(above 150MHz). Onepossible explanation of the experimentaldata is by the frequency dependenceof the conductivity insemi-insulating materialwhich stems from the potentialfluctuations resulting from the non-uniformdistribution of donors andacceptors and the lack ofscreening by free carriers. Potential fluctuationsTRAP - FREESQUARE LAWincreasingfrequency15in p-n Si junctions have been discussed by Shockley [30],who pointed out that this phenomenon isimportant in highly-compensated material. Potential fluctuationsexisting in compensated and lightlydoped semiconductorswere discussed in more detail by Shklovskii and Efros [31]. Recently thistheory was applied to the semi-insulating GaAs by Pistoulet etat. [32]. According to their model theAC conductivity starts from rDC,grows as w3 (s close to 1) over a wide range of frequencies andthen saturates as w continues to increase. Jonscher et a!. [33]also indicate the frequency-dependentconductivity of semi-insulating GaAs.The experimental data presented in Fig. 2.6 for large sidegate- output separation behaves below150MHz qualitatively similar to the data shown by Pistoulet etat.. The high frequency response (above about150MHz) is determined by the increasing capacitivecoupling.In conclusion the AC conductivity in thesemi-insulating substrate was investigated over a widerange of frequencies. Analysis of themechanisms conthbuting to the AC sidegatingshows thatfor short distances between the ohmiccontacts on the same semi-insulating GaAs substrate,thecapacitive-resistive coupling will be predominant.The resistive coupling, which probablystemsfrom the trap-filled space-charge-limitedconduction through the semi-insulatingsubstrate, is biasdependent and will be important for largesidegate voltages and for low frequencies.The resistivecoupling is also expected to be frequency-dependentat moderate frequencies, whichare estimatedto be in the megahertz range.At low applied voltages, where the capacitivecoupling prevails, theexperimental arrangement can be used formeasuring the capacitance between the inputand outputelectrodes following the procedure describedin Ref. [34] applied to the two-terminalstructure.For larger distances the coupling is reduced,and the AC sidegating will be characterizedinterms of the inherent AC conductivity propertiesof semi-insulating GaAs as described inRef. [32].The frequency dependence inthis case stems probably from the potentialfluctuations exhibited incompensated and semi-insulatingmaterials as a result of the non-uniform distributionof donors andacceptors and the absence of screeningby free carriers.The relationship between DCand AC sidegating mechanisms has yetto be established . Thisrelationship is not obvious: the trap-filledspace-charge-limited current is not theonly conductionmechanism that should be considered.Additional mechanisms are possible andsome of them can be16obscured by others. For example, becauseof the possible surface conductionbetween the devices,the space-charge-limited currentthrough the substrate can be masked.In this case one can expect asmaller resistance at DC than at some higherfrequencies where the surface stateswill not respond.This work shows that the frequency-domainmeasurements and analysis are important toolsin thecrosstalk investigation, which allow theseparation of the various effects contributingto the sidegating.2.3 AC Sidegating in GaAsMESFETsMESFET interaction has been simulated byapplying a negative potential to asidegate contact onthe SI GaAs substrate and examiningits effect on a nearby MESFET locatedon the same substrate,e. g. [6]. This interaction requiresan understanding of both theconduction mechanism throughthe SI GaAs substrate and the electricfield distribution under theMESFET gate which depends onthe bias voltages. Improvementsin GaAs technology, such ashigher “quality” SI substrates, bettercontrol of fabrication steps, introductionof new processing techniques and newdevice structures willeventually reduce sidegating. Oneaim of the present analysis is to seekconditions for minimizationof sidegating through an understandingof the relation of thesidegating to theelectric field distributionin the MESFET channel as determined bythe bias voltages.The analytic expressionfor AC sidegating, derived in section2.3.1 by using a distributed network,relates it in a simple manner to gateand sidegate voltages. The modelparameters are evaluated inSection 2.3.2. The experimental dataare presented in Section 2.3.3. Theresults of this work arediscussed in Section ModelingAn equivalent circuit, which is distributedso as to be applicable tohigh frequencies, was used.To include substrate effects, iti particularconduction through the SI substrate, a4-terminal networkrepresentation of theMESFET is required, where the fourthterminal represents the nearestsidegatecontact. The elements of the equivalentcircuit are closely related to MESFETphysical parameterscorresponding to the shape of thespace charge distributionin the device as shown in Fig.2.9. Theactive layer is bounded by a Schottkybarrier contact and a SIsubstrate. The space charge regions,170 LsLIIxGATEI In+n+SOURCE n - channelDRAINchannel -atedep1etioregionSEMI-INSULATING GaAsFigure 2.9: Schematic space chargedistribution in a GaAs MESFEToperating in the saturation region with a negativegate bias.which are responsible for thechannel current modulation, are modified as aresult of applying avoltage to the gate and to the sidegatecontact and are affected by the surface stateson the GaAssurface. Several assumptionshave been made.1. A channel is assumed to be uniformlydoped in order to relate in a simplemanner the elementsof the equivalent circuit to the biasvoltages. Ion implantation into SI GaAssubstrate is themost widely used technique forfabrication of GaAs integrated circuitsand our measurementswere performed on low pinch-off ion-implantedGaAs MESFETs. However, in suchdevices aGaussian profile can be approximated byan effective uniform doping profile [35].2. The parasitic capacitancesand resistances associated withgate-drain and gate-source regionshave been omitted in the distributednetwork. This is because the surfacedepletion layer thatexists in these regions causes a seriesresistance and a gate capacitance tobe added to the intrinsicMESFET [36] only at low frequencies(below 10kHz) where the surfacestates can respond [37].At higher frequencies the gate-drainand the gate-source regions can berepresented by pureresistances and the drain resistanceis simply added to theexternal load resistance. The absenceof the source resistance in the networkcan be justified becauseit is virtually grounded to the18AC grounded gate through thegate capacitance at high gate bias voltages.With decrease inthe gate bias the gate capacitancedecreases and thus cannot serve as an AC ground, but thechannel resistance becomes larger and the sourceresistance can be neglected with respect toit. It is important to stress that the sourceresistance must be considered for the MESFET withdouble-gate excitation (gate and sidegate)since the gate is not AC grounded in this case.3. The distance between thesidegate and the source is assumed to be muchlarger than the drain-to-source distance. This allows the regionbetween the sidegate and the MESFETchannel to berepresented as a uniform R-C network.4. The shunt leakage resistanceof the gate depletion layer is neglected.This resistance mayintroduce a large time constant whichmay affect the analysis at low frequencies.In the linear mode of MESFET operationfor small drain-to-source voltages the intrinsicMESFETcan be represented by an R-C transmissionline [38, 39] with the channel resistance rhand the gatecapacitance c3 per unit length asparameters. Shulman and Young [40]have suggested that the regionof semi-insulating material betweentwo ohmic contacts can be modeled as aR-C network. Thus aR-C network, where the resistancer5 represents the conduction through theGaAs SI substrate, theseries capacitance cbrepresents the space charge regionformed at the substrate-channel interface, theresistance Tb represents the conductionthrough the substrate-channel interface,the parallel capacitancec5 describes the couplingbetween the sidegate electrodeand the MESFET channel, wasadded tothe circuit. In saturationthe longitudinal MESFET cross-sectioncan be roughly divided into tworegions according to the electricfield distribution in the channel.We assume that the electron velocitysaturates when the electric fieldreaches E5 at distance i. from thesource, which corresponds to theboundary between two regions inthe device. The resultantnetwork is shown in Fig. 2.10.Thenetwork parameters in the firstregion (0 < x< 1) are evaluated as follows. The gate depletionlayerthickness at distancex from the source is given by:d(x) = — VG— V(x)j/qND,(2.6)where is the permittivityof GaAs, IV is effective uniformdonor density, VB is the built-in voltage,VGis the gate potential relative tosource and V(x) is thechannel potential at distance x from the19Drain-Figure 2.10: Disthbuted networkfor a GaAs MESFET in the saturation region.source, which is E5x.The channel resistance and gate capacitancecan be approximated as:1Th(X)= qNDw{a — d(x)]k I E3k2 1(2.7)qNDwa(k — 1)[1+214(k—w1c(x) [12(VBVG)Xj(2.8)where is the low-fieldelectron mobility, w isthe device width, a is the channelthickness,= qNDa2/2E is the pinch-offvoltage and k = — VG).Eqn. (2.7) and (2.8) canbe considered as first-orderapproximations of exponentialfunctions, so that we can write [38]rh(x) rh0e(2.9)andc(x)(2.10)whereTcho= qNDwa(k — 1)’(2.11)k2Ea= 2(k 1)’(2.12)= Ewk/a(2.13)-Gate1iOSidegate1Ls20and= 2(VB- VG)(2.14)The differential equation for thefirst region for the sidegate excitation is given by:02’v Ov— a— — rh(x){jw[c3(x)+ c5] + ys}V = Tch(X)(jWCs +y5)V59, (2.15)where the AC potentials of the channeland sidegate were designated correspondingly by vand v,andYs= [r5 +r&/(1+ jwcbrb)]. An analytic solution of (2.15), givenin Appendix B, can beobtained by assuming that wc,(x) >>wc,Ysand a = 3. The first assumption isreasonable for aMESFET operating at intermediate and highfrequencies and for relatively low substrate conductionbetween the sidegate terminal and theMESFET. The second requirement imposesl’, = 4(VB — VG),which corresponds to the condition that the gatedepletion layer at the source endis equal to half ofthe device thickness. This conditionmay appear to severely restrict ouranalysis since it becomesvalid only for one particular valueof the gate voltage. However, this gate biasingvoltage correspondsto the normal mode of MESFEToperation. Thus, the following analysiscan serve as indication ofthe sidegating dependence on the gatebias around its typical value. Furthermore, norestrictionswere made on the drain-to-sourcevoltage. Therefore, the sidegating behavior due to thevariationsin drain-to-source voltage can beinvestigated.In the second region (i<x< 1) the channel resistance and the gate capacitance are assumedto be constant and are given by Tchs = Tchoe1’and c =c0e(°”). The differential equationforthe second region is given by:02v— [jwQ33 + c5) + ys]rchsv(jWCs + Ys)Th5vsg .(2.16)The solution of the above equationis given in Appendix A. Combining (2.15)and (2.16) with theboundary conditions zero potential atz = 0 and x I and currentand potential continuity at x =yields the following expressionfor sidegate transconductance [i(l)/vsgj:— WC5+ y1A+pe/2)1[1— coth(p15)]—e(’’)[a/2 —pcoth(p13)]2mb— Aujwc0rhS/u2 (2.17)_e[_u(l_1)][u— a/2 —pcoth(p15)j—pcoth(pi3)—21wherep=+jwrchocjo,u = i.,/Tchs[JW(Cjs + c8) +y5]andA = [c/2 +pcoth(p13)]sinh[u(1 — la)] +ucosh[u(l —For practical device parameters eqn.(2.17) reduces to:mb(jwc8+ ys)/U.(2.18)2.3.2 Determination of model parametersThe method used to evaluate theMESFET equivalent circuit parameters wassimple and fast atsome expense of accuracy. Thechannel resistance was obtained from thecurrent-voltage characteristics of the MESFEToperating in the linear region using anHP 4145A semiconductor parameteranalyzer (SPA). The substrateresistance was evaluated from thesidegate current-voltage measurements using the SPA. Thesubstrate resistance measured between 0and -3 volts was 2GQ. Theresistance was drastically reducedbelow -3V. Interpretation of thesidegate current-voltage characteristics is difficult and canlead to significant errors in theresistance evaluation [41].Our DCmeasurements [42, 43] and the hysteresisobserved by other researchers[15] suggest the possibilityof double injection into the semi-insulatingsubstrate. Even a small amount ofhole injection from thechannel into the substratewill result in most of the resistancebeing near the hole-injectingcontact[41]. Consequently we assigned rb tobe 95% of the measured resistance.The coupling capacitance betweenthe sidegate and thechannel was estimated to be 15fFusingthe graphs of the characteristicimpedance of coplanarstrips given in [19]. Measurementsof the small-geometry MESFET gate capacitancefollowed a procedure similarto that in [34]. The sourceanddrain terminals were fed from a commonAC source. The AC currentthrough the gate was fed intoaKeithley 417 high speed picoammeter,whose output was connected to aPrinceton Applied Research5204 lock-in amplifier. Thecapacitance was evaluatedfrom the measurements ofthe capacitive partof the AC current through a Schottkybarrier. The measured gate capacitanceof the depletion-mode22MESFET for VG = —O.1V at1kHz was 80fF. The measurements atlower frequencies showed highervalues of the gate capacitance. This isconsistent with effects due to the presenceof the deep levelsin the device [44] and to the presenceof the surface states in the gate-sourceand gate-drain spacingswhich increase the effective gate capacitance[36]. To avoid these problems the measurements athigher frequencies are preferred, whichin our case were limited to 1kHz by the frequency responseof the system. The capacitance of ion-implanteddevices for the gate voltages lower andhigher thanVG= —O.1V were found by[45]c30(1 — VG/O.75V)’33,(2.19)where c30 is zero-bias gate capacitance.Measurement of the capacitanceassociated with a channel-substrate interface is difficult due to theexistence of a very high series resistancepresented by thesubstrate [46] and thereforeit was calculated using the equationfor the width of the channel-substratedepletion region as a functionof voltage given in [47].2.3.3 Comparison with experimentalresultsExperiments were performed onrecessed-gate depletion and enhancementmode ion-implantedGaAs MESFETs made at acommercial foundry. The gatelength of the transistors was 1pm andtheir width was 52 pm.The length of the regions between thegate and the source andbetweenthe gate and thedrain was 2 pm. The sidegatewas located parallel to the source at adistance 14pm. An HP 4145A SPA was used tobias a GaAs MESFET: the drainterminal was connected tothe parameter analyzerthrough the load resistor(l50ohm), while the gate was biaseddirectly andthe source was grounded.The sidegate was negativelybiased with respect to the sourceand wasconnected to the signalgenerator, while the drainwas connected to the lock-inamplifier. Figures2.11-2.16 compare the sidegatingexperimental data as a functionof frequency and variousbiasconditions with resultscalculated by (2.18). ACsidegating as a function of the gatebias for thedepletion mode MESFET operating atsmall drain-to-source voltage isshown in Fig. 2.11.Fig.2.12 shows the AC sidegatingdependence on the gatebias for the enhancement modetransistoroperating at small drain-to-sourcevoltage. The dependenceof AC sidegating on the gatebias for23-50I I I I-55-60W‘175I I I II-0.6 -0.5 -0.4 -0.3-0.2 -0.1 0 0.1 0.2 0.30.4GATE BIAS (V)Figure 2.11: Experimental (dashed line) and calculated(solid line) dependences of AC sidegating on the gatebias for a depletion-mode GaAs MESFEToperating at VDD = 0.5V, VSG = —3V, 100kHz.Parameters: cb = 15.4fF, r = 1.1G2, r3 = O.O6GQ,c8 = 15fF. Zero bias gate capacitanceis 90fF.the depletion mode transistoroperating at large drain-to-source voltageis shown Fig. 2.13. Thedependence of sidegating on the drain-to-sourcevoltage is presented in Fig. 2.14.The sidegatingexhibits less than 1dB variation over therange of 2-4 volts. AC sidegating as a functionof thesidegate bias is shown in Fig. 2.15.The sidegating increases below -3Vwhich corresponds to thethreshold voltage in the DC sidegatecurrent-voltage characteristics (see subsection2.3.2). Finallythe sidegating frequency dependenceis shown in Fig. DiscussionThe assumptions in the above analysisrestrict its validity atlow frequencies. Surface states associated with gate-source andgate-drain spacings may cause these regions torespond to the variations24z0.6GATE BIAS (V)Figure 2.12: Experimental (dashedline) and calculated (solid line) dependencesof AC sidegating on the gatebias for a enhancement-modeGaAs MESFET operating at VDD = O.5V, VSG= —1 V, 100kHz.Parameters: C6 = 17fF, 1b= 2.8G2, r3=0.15Gl, c = 15ff. Zero bias gatecapacitance is the sidegate potential. Arecent analysis of low-frequencydispersion of gate transconductancein GaAs MESFETs, which relatesit to the surface states, indicates thatit will be important below1kHz [48]. The frequency responseof the sidegating shown in Fig.2.16 can be roughly divided intotwo regions. The frequency responsebelow 5kHz is probably controlledby the surface states.Thefrequency response above10kHz is due to the capacitiveand resistive coupling between theside-gate and the MESFET channel.The present experimental dataconfirm the theory in that at higherfrequencies, in which MESFETsnormally operate, the sidegatinggrows aswi!2.The dependence of the sidegatingon the gate bias given by (2.18) originatesfrom the followingrelation:mb1/TchsCjs— d)(2.20)-950.1 0.2 0.30.4 0.525z0zrzFigure 2.13: Experimental (dashed line)and calculated (solid line) dependencesof AC sidegatmg on the gate bias for a depletion-modeGaAs MESFET atVDD = 3V, VSG—1V, 100kHz. Parameters: cb =17fF, r, = 2.8G2, r3 = O.15GQ, c3 = 15ff.Thus, a parabolic dependence of ACsidegating on gate bias with a maximum at thebias correspondingto a half-depleted channelis expected. Generally, this behaviorwas indeed observed for MESFETsoperating at small drain-source voltageas shown in Fig. 2.11 and 2.12. Sidegatingfor depletion modeGaAs MESFETs exhibits a maximumas a function of gate potential due to thefact that the conductivelayer in these transistors can changedrastically in thickness as it goes from afully open channel toa very thin layer as a result ofapplying a gate bias and the conditionof a half-depleted channel canbe reached. The channel in the enhancementmode transistors is already depleted forzero gate bias.This means that the fully open channelcan be achieved only at high gate voltages. Asa consequence,the gate bias for which maximumsidegating is obtained shifts tohigher voltages (see Fig. 2.12).Forlarge drain-to-source voltage the sidegatingincreases and eventually saturates with gatebias (see Fig.-74-0.6 -0.5 -0.4 -0.3-0.2 -0.1 0 0.1 0.2 0.30.4GATE BIAS (V)26-40I-45 . -e-0-55.-60-65-701 1.5 2 2.5 33.5 4DRAIN-TO-SOURCE VOLTAGE (V)Figure 2.14: Experimental (dashed line) andcalculated (solid line) dependences of AC sidegating on thedrain-to-source voltage for a depletion-mode GaAsMESFET operating at VG = OV, VSG = —2V, 100kHz.Parameters: cb = 16.3ff, rb = 3.2GQ, r3 = O.17G0, c =15fF, rChS 210Q, c5 84ff.2.13). The minimal thickness of thegate depletion layer in the high-field region is determined by thedrain voltage. This results in a conductive layerthat normally is well below half the device thicknessfor any gate bias. Therefore the sidegating doesnot exhibit a maximum as a function of gate voltagebut rather increases monotonicallywith it. Our calculated results show good qualitativeagreementwith data for devices biased far away frompinch-off. This is probably due to the slowly-varying R-Cproduct of the channel under these biasingconditions. At high gate voltages the leakage resistancemust be taken into account. At lowergate voltages near pinch-off our calculationsindicate lowersidegating, because eqn. (2.19) overestimatesthe gate capacitance in this region.Our experimental observations indicatethat, when the device is biased near pinch-off, ACsidegating diminishes drastically in magnitudeand is often accompanied by oscillations whichmakes27-.1zC.) -65Figure 2.15: Experimental (dashedline) and calculated (solid line)dependences ofAC sidegating on the sidegatebias for a depletion-mode GaAsMESFET operating at= 0V, VDD = 0.5V,10kHz. Parameters: rh, = 1752,c = 90fF, c = very difficult to performaccurate measurements.This abrupt decrease insidegating is due to avery large Tch8Cj5 product.Lehovec and Zuleeg [491evaluated the R-C productof the channel nearthe pinch-off region. Theysuggested that its large valueis due to verylow mobilities of electronsat the channel-substrateinterface caused by extensivetrapping. Therefore thechannel resistancewill be determined mostly by theproperties of the semi-insulatingsubstrate. The observedlow-frequency oscillations aresupporting evidence for thisinterpretation since they havebeen observedin semi-insulating GaAs [501.The sidegating dependson drain-to-source voltagesonly by way of channel-lengthmodulation.Therefore, the sidegatingin the saturation region, will notbe too sensitive to thevariations in drain-to-source voltage asindeed was observedin the experimental results shownin Fig. 2.14.-75-6 -5.5 -5-4.5 -4 -3.5 -3-2.5 -2 -1.5-lSIDEGATE BIAS (V)28-60-62-64Z -66z -z-70-72-74-76-78102FREQUENCY (Hz)Figure 2.16: Experimental (dashed line)and calculated (solid line) frequency dependenceofsidegating for depletion-mode GaAsMESFET operating at VG = 0V, VDD = 0.5V, VSG= —1V.Parameters: rhS = 175, c = 90fF, cb= 17fF, rb = 2.8G, i’3 = 0.15G2, c8 = 15fF.Fig. 2.15 shows a strong dependenceof AC sidegating on sidegate voltagesbetween -3 and -6volts. These experimental observationsare in qualitative agreement with themodeling results whichpredict that as the negative sidegatebias increases in magnitude thesubstrate resistance diminishes,thus increasing the sidegating intensity.The abrupt change in thesidegating as a result of applyinga sidegate voltage below -3V hasbeen taken as indicating the possibilityof the injection currentconduction in the semi-insulatingsubstrate. However, r5 is not theonly parameter that relates thesidegating to the sidegate bias: cbwhich represents the the space chargeregion at the channelsubstrate interface mayplay a significant role in determiningAC sidegating. When the sidegatevoltage increases inmagnitude more and more electronsare injected into the substrate. Due tothe injection effectsthe channel-substrate capacitancewill be probably higher than thatevaluated in10 101029this work. This could explain the large discrepancy between thecalculated results and the data athigh sidegate voltages. The networkparameters r3 and cb are expected to be frequency dependent.The substrate resistance is expected to besmaller at higher frequencies for short distances betweenMESFET and sidegate [401. The capacitance is expected to belarger at low frequencies because ofthe finite time constant associatedwith the charging and discharging of the trapsin semi-insulatingmaterial [51].In conclusion, distributed network analysishas been applied to the interpretation of thesidegatingeffect in GaAs MESFETs.Analytic expressions for the sidegating were derivedand using a simplemodel were related to the bias voltages.Results presented in Fig. 2.15 show that AC conductionthrough the substrate plays animportant role in determining the sidegating. The accuracyof thepresent model could be increased byretaining the same equivalent circuit but using more sophisticatedmodels for the network parameters. The experimentaldata presented in this thesis agree qualitativelywith the sidegating model expressedas a function of the frequency and biasvoltages. The sidegatingfor the MESFET operating in thesaturation region will not be sensitive to thevariations in the drain-to-source voltage. Themain conclusion which can be drawnfrom this work is that the sidegatingeffect can be reduced byapplying the lowest possible gate bias toMESFET or in other words, byoperating the device atlow current.2.4 SummaryThe mechanisms of crosstalkin n-SI-n GaAs structureswere investigated over a frequency rangeof lOOHz-500MHz. The sidegatingmechanism was found to be dependenton the frequency andon the distance between thesidegate and the output contacts.The crosstalk can be represented asa parallel RC network,where the capacitance is associatedwith the interaction of fringing fieldsaround the input and outputelectrodes.For shorter distances theresistive component represents a conductivepath through the semiinsulating GaAs substrate normallyassociated with the trap-filled space-charge-limitedcurrent. Ingeneral the resistance will bebias-dependent. Furthermore,it is expected to be frequency-dependent30because of the finite time constantassociated with the chargingand discharging of the traps insemi-insulating GaAs.For longer distances the capacitivecoupling is reduced. Also ahigher biasing voltage is requiredin order to initiate the space-charge-limitedcurrent for the distant input andoutput contacts. Thusat low voltages the resistivecomponent is associated with theohmic leakage current through thesubstrate. This resistanceexhibits a frequency dependent conductivity,which is a result of potentialfluctuations in the compensatedsemiconductor.At low frequencies the capacitivecoupling is reduced and theresistive coupling tends to prevail.At high enough frequenciescapacitive coupling dominatesdisregarding the distance between theinput and output electrodes.The bias and frequency dependenceof AC sidegating in GaAsMESFETs was modeledusinga distributed R-C network.The resultant analyticexpression for the sidegate transconductancewascompared with experimentalresults over the range of100Hz - 100kHz. They agreedin that thesidegating at small drain-to-sourcevoltage exhibits a maximum as afunction of gate bias, whileat large drain-to-sourcevoltage the sidegating increasesand eventually saturateswith gate voltage,and is not sensitive todrain-to-source voltage. Thepresent experimental measurementsshow thatAC sidegating (like DC)is greatly enhanced after anegatively biased sidegatereaches a threshold.Both experimental dataand the model show that ACsidegating increases approximatelyaswh/2athigh frequencies.31Chapter 3The role of minoritycarriers in the sidegatingeffect3.1 IntroductionA field-effect transistorhas been always a synonym toa unipolar transistor in theliterature [52,53]. This is not surprising,considering the natureof contacts, that constitutea MESFET: source anddrain are ohmic contactsand therefore are unable toinject holes, and Schottky contactspracticallydo not inject holesaccording to the earlystudies by Scharfetter [54] andYu and Snow[551.We,however, show in thischapter that the gate of aMESFET can inject holes andthis results in parasiticeffects that severelydegrade the MESFET performance.In Section 3.2 we investigatesidegating under conditionsof low-level injection,for which theexcess free holesand electrons are muchless than equilibriumhole and electron concentrationsrespectively. Without furtherassumptions we solveanalytically continuity equationsfor holes andelectrons plus Poisson’sequation. The resultsshow that the presence ofrecombination centersin theSI substrate and evenweak hole injection fromthe gate significantlyenhance sidegating. InSection3.3 we propose a mesurementtechnique to evaluate thishole injection, andour experimental resultsconfirm the participationof holes in sidegating.In Section 3.4 ouranalysis deals mainlywith high-level hole injectionand we discuss hysteresisin current-voltagecharacteristics, geometricaleffectsand process-relatedissues in sidegating as aresult of hole injection.3.2 Sidegating effectunder conditions of low-levelinjection3.2.1 IntroductionWeak sidegating hasbeen observed for small sidegatevoltages and currents bymany researchers,e.g. [8]. Inspite of the insulatingsubstrate the sidegateacts as if it were closeto the MESFETchannel, suggesting thatthere is a mechanismwhich transfers the appliedvoltage to thevicinity ofMESFET.32Most research has concentrated on strongsidegating accompanied by high-level electron injectioninto the substrates and predicting the magnitudeof a threshold voltage, at which a sharp decreasein the drain current occurs [22, 56]. Inthis chapter an analysis of weak sidegating is given, whichoccurs below the threshold voltage.In this range of voltage only low-level injection occursi.e. theinjected densities of free carriers aremuch less than the equilibrium free carrier densities. While therestrictions on the concentrationof injected minority carriers are harsh in the caseof an extrinsicsemiconductor, they are less severefor SI GaAs in which the equilibrium carrier densitiesof electronsand holes are not very different from each other.The low-injection regime is valid up to thevoltageat which a deviationfrom ohmic behavior occurs. For materialwith deep traps, the threshold isthe traps-filled-limit voltage or thevoltage, at which negative resistance appears[7].This thresholddepends on material properties such as trapdensities and distribution, minoritycarrier lifetime, andhomogeneity of the substrate. Thethreshold voltage could be measured and provided tocircuitdesigners as a designation of the “disaster”area, similar to providing maximum operatingdrainvoltages. The modeling of the low-injectionregion is more relevant to them, since it occursinthe operating region of transistors.The results of the analysis are provided withflexible boundaryconditions, which allow the investigationof a variety of physical situations.3.2.2 Sidegating modelMany numerical studies of isolationin GaAs integrated circuits, performedon symmetrical n-i-nstructures, have been publishedrecently[22, 57, 56]. Someof the studies deal with transport equationsfor majority carriers only, e.g. [56],while others provide more generalanalysis, but assume restrictiveboundary conditions such as ohmiccontacts at the edges of the structure [221.These studies do not consider theinteraction between gate and sidegate.Our measurementsshown in Fig. 3.17 andexperimental data by other researchers [58]indicate interaction between gatecurrent and sidegate voltage.The gate current consists of the saturationcurrent of a Schottky diodeand the current to a sidegate.Since the saturation current is small,changes in the gate current uponapplying sidegate voltagecan be easily observed. In Fig. 3.17 the gate currentis negative for sidegate331601o10_li0 -2 -4-6 -8 -10SIDEGATE VOLTAGE (V)Figure 3.17: ‘Trpical drain and gatecurrents as a function of sidegate voltage (VD= 2 V, VG = 0 V). Themeasurements were performedin the dark on depletion-mode MESFETsfabricated by ion implantation into a SIsubstrate. The typical threshold voltagewas —0.6 V. The gate length was1pm and width 4pm. The gate-sourceand gate-drain distances were 2pm.The ohmic contact of the adjacent MESFET,which served as a sidegatein our measurements, was placedparallel to the source at a distanceof 8pm and was 23pm from the gate.voltage between 0 and —2 Vand it is positive for sidegate voltagesmore negative than —2 V. Alsonoteworthy is a rapid increasein the gate current when the MESFETis almost pinched off.High Schottky barriers in MESFETsare beneficial, because theyincrease the noise marginin GaAs digital integrated circuits.But high barriers create an inversionlayer beneath the gate,which may inject holes underforward bias conditions, althoughthere is some controversy regardingthe magnitude of hole injection[59].Thus n-i-n structures, in whichhole injection is negligible,represent only one particularcase of channel-substrate interaction.These structures may representthe conductive path fromsidegate to drain and source,but not necessarily that fromsidegate tochannel.The channel region of theMESFET is sandwiched betweentwo closely spaced depletionregions,which are associated with the. Schottkybarrier and the channel-substrateinterface. Since the Schottkydepletion region is thin,the study of hole injection fromthe gate should be basedon thermionic1208040l08l01 01034(b)DistanceFigure 3.18: Hole injection from Schottky gate. (a)Fora small sidegate voltage. (b) For a largesidegate voltage.emission theory[60}. Figure 3.18(a) depicts thesituation for a small sidegate voltage,when thechannel is not depleted and a negligiblehole current is expected. The drain current decreasesuponapplying a negative voltage to a sidegate. Largernegative voltages cause a reach-through depletionof the channel as shown in Fig. 3.18(b). Asituation similar to reach-through has been analyzed byWager and McCamant [61], who showedusing thermionic emission theory that the holecurrent canGATE CHANNEL SUBSTRATEElectronEnergyA EFJp(a)EcEvEvJp.EF—35greatly exceed the electron current.We suggest that the sidegating is accompanied by an increaseinhole current at the gate. By applyinga negative voltage to the sidegate theconductive part of thechannel shrinks, allowing more holes toreach the substrate. As we shall see in the nextsection thehole injection creates a field overshoot causinga high voltage drop in the vicinityof the channel-substrate interface. Consequently,most of the additional applied voltagewill drop near this regioncausing an even stronger depletionof the channel. This will lower the hole injection barrierallowingfor many more holes to be injected.Thus this process is self-supporting andfor high enough voltageswill result in a reach-throughdepletion of the channel and a rapid increasein the gate (hole) current.An additional source of holesis the avalanche process due to high drain voltage.Electron-holepairs are generated in the channel.The holes are attracted to the substratedue to an assisting fieldat the channel-substrate interface,while the electrons “see” an energy barrierof approximately halfthe band-gap.3.2.3 Detailed analysisAn analytical study of the potentialdistribution in SI substrates hasbeen made by Ohno andGoto [62]. Their analysiswas based on the assumptionof local space-charge neutrality, butwereport an analysis free ofthis assumption. Manifacier andHenisch have investigated minority-carrierinjection into semiconductors withand without traps by solvinglinearized transport equations[63,64, 411. Their detailedanalysis was applied mainly tosemi-infinite and long structures.We haveextended the analysisof Manifacier and Henisch byincorporating both recombination centersandtraps into Poisson’s equation.We report a closed foimfor the space-charge, electricfield andpotential distribution in SI shortstructures.The schematic equilibriumband diagram of the structure analyzedin this paper is showninFig. 3.19. The sidegaten+region is assumed to inject onlyelectrons, while the othercontact isassigned a variable injectionratio Additional boundary conditions,which simplify the solution,are zero field at x 0and x = L [41]. Because of shortcarrier lifetimes in SI GaAs anddistancesbetween MESFETs in integratedcircuits, which are typically long incomparison to diffusionlength,recombination must beconsidered. Even though GaAsis a direct band-gap material, thepresence36GATE CHANNEL SUBSTRATESIDEGATEElectronEnergyDistanceFigure 3.19: Schematic band diagram of thegate-sidegate structure in equilibrium.of a high density of deep levelsin this material dominates the recombinationprocess[65]. Theinsulating properties of the GaAssubstrate are based on the balance betweenshallow donors andacceptors, and deep levels. Themid-gap deep donor EL2 with a concentrationof about1016cm3plays an dominant role in the compensationmechanism[26]. NeverthelessEL2 acts as a trap ratherthan a recombination center becauseof its small hole capture crosssection. SI GaAs may containhigh densities of deep acceptorsin addition to EL2[66, 67]. Wonget al. have proposed some ofthem as recombination centerswith an estimated concentrationof at least 5 x1015cm3[681. Anygeneral discussion of transportin semi-insulating GaAs should include adominant recombinationcenter in addition to EL2. Underconditions of low-level injectionthe recombination rate determinedby Shockley-Read-Hallmodel is given by [41]:fl+fle6p(321)— T(Pe+fle)where 6n,5pare excess free electrons and holes, ePeare equilibrium electron and holeconcentrations, and r is the lifetime. Thelinearized current density and continuityequations can be writtenas[63, 64]b / d6N1+ Fej\E +(3.22)II37- ‘1’ipe(E_)(3.23)ej+_1p(Pe6N+6P)=;O(3.24)___—Pe— 1+.Pe(Pe6N +6P) = 0(3.25)with= E/q/nr(ne +pe),(3.26)where- q is the magnitudeof the electronic charge,is electron mobility, e is thedielectric constant,and b is ratio of electron tohole mobility. The parameters61’J, 6P and Fe representexcess free carriersand equilibrium hole concentrationrespectively, normalized tothe equilibrium electronconcentration.The field is normalized tokT/qLD, the currentdensity to /tpkT(fle + Pe)/LDand X = X/LD,where=./[ekT/q2(n+ Pe)](3.27)Poisson’s equationcan be written for thegeneral case of non-interactingmultiple traps. Theconcentration of thejthtrap occupied byelectrons under steady-statecondition is given by[691Nt (cn+et)q =-p(3.28)cn+e+c,p+ewhere N is thethtrap density, e, e,are its emission ratesfor electrons and holes,c,c, arethe capture probabilitiesfor electrons and holes,and n, p are electronand hole concentrations.Inequilibrium the occupieddensity of thejthtrap is given byq=(3.29)iewhere n is equilibriumelectron concentration,and n is electron densityif the Fermilevel were atthe energy levelof thethtrap. The excess trappedcarrier density is(q — q).(3.30)38It can be expressed under low-levelinjection as6q = cp —(3.31)withNCfle(3.32)=N’e(333)(n+ne)(e+cne+e,+c,pe)In this work we consider only EL2 and a dominantrecombination center. The Poisson equation ismodified to include thesetwo traps:dE 1— l+FeP_N+6’+6C2(3.34)where 6Q, CQ are the concentrationscorrespondingly of the deep traps (EL2)and recombinationcenters occupied by electrons andnormalized to the equilibrium electron density.Carrier concentration, field, and potential profilesare obtained from eqs. (3.22)-(3.25), and (3.34):M cosh (X/i) — R cosh ((L — X)J)6N(X) =/sinh(L/)+Fecosh (x) + K cosh ((L — (3.35)sinh (L/)6P(X)= A[MPCcosh (X) + K cosh ((L — X))i/sinh (L.,/)(3.36)M cosh(X/) — Rcosh((L — X)’)1/7sinh(L\/)E(X) = A{’+i3) — M(1 +sinh (X) — K sinh ((L — X)/)+An(Pe + b) sinh (L’)(337)M sinh (X) + R sinh ((L — X)/)-R}+sinh(L,/)V(X)= ;(1+ cx)M —(1 + 3)An(Pe +b)F(cosh (Xv’)— i) + K[cosh ((L — X)1j)— cosh (L1/)]+i/sinh (L/) (3.38)— M(cosh (X/) — 1) — R[cosh((L — X)/) — cosh (LI)]+RX}/sinh (L/)3910102iO-10-10 -.- -•-- :------.10—13I I II0 2 4 6 8 1012 14 16 18 20MICROMETERSFigure 3.20: Concentration profile of trappedand free excess carriers in the 2Opm long modelstructure. Thesolid line corresponds to trapped carriers, dashedline to electrons, and dashdots to holes. The carrierdensitiesare normalized to the equilibrium electron concentrationThe sidegate voltage is —5V, the equilibriumelectron concentration is 7 x106cm3,the equilibrium hole concentration is2 x iO cm3,the electronmobility is 4 x iOcm2/Vscc, thehole mobility is 400 cm2/Vsec, and the lifetime is 1 nsec.EU isassumed to be 0.75eV from the conductionband, its density1016cm3,and the ratio of its capture crosssections for holes and electrons iO. The recombinationcenter is assumed to be 0.65eVfromthe conduction band, with density1015cm3,and the ratio of its capturecross sections 100.with p = [P(1+)+(i+fl)j/(1+P), = An(Pe+1)/(1+Pe),K = (b+Pe)—Fe,M = (1+3—Ab)/(1+a—A), R = ii(b—M)+M,A = J(1+Pe)/b(M+Pe).Thezeropotential reference point is taken at x=0(see Fig. 3.19). The parameter Ais determined by theapplied voltage at x=L.Fig. 3.20 shows the distributionof trapped and free carrier concentrations throughoutthe structurewith t’pical trap densities in SIGaAs (N1= 1016cm3,N2= 1015cm3) and foran appliedvoltage of —5 V. The MESFETwas assumed to inject holes only. The resultsshown on Fig.40101>-C,, 10°L)NCz10-1MICROMETERSFigure 3.21: Concentration profile of trappedexcess carriers as in Fig. 3.20, but onlyin thevicinity of hole injecting edge (x=0). Thecharge profile changes polarity at around 0.4pm.3.20 indicate that the local space-chargeneutrality is not preserved at any point alongthe structure.The investigated structure (seeFig. 3.18) represents only part of the two-terminal system,which isconfined between two zero-field points.This means that the total excess charge in thestructure iszero. Thus the total space-charge neutralityin the structure is preserved, even though localis not.Excess free carrier densities in the structureare below carrier equilibrium values inagreement withconditions of low-level injection. Thedensities of excess free carriersare far below the trapped carrierdensity, which means that only thetrapped carriers need be consideredin the Poisson’s equation.Fig. 3.21 presents a more detailedpicture of the trapped carrier concentrationin the vicinity ofthe hole injecting edge. Thetrapped charge is positive in thevery narrow region adjacent to theedge, but is negative throughout restof the structure. This is areason for an electric field overshoot0 0.2 0.4 0.6 0.81 1.2 1.4 1.6 1.8 24135302510500Figure 3.22: Electric field profile in theinvestigated structure with the sameparameters as in Fig. 3.20, butfor different densities of recombinationcenters: dotscorrespond to1016cm3,dashed line to1015cm3,and solid line about 0.4 i.imfrom the edge as shown in Fig. 3.22.This figure also illustrates the effectof theconcentration of recombinationcenters on the field profile, whilekeeping the EL2 trap density fixed at1016cm3.Reduction of therecombination center density resultsin a decrease of the field overshoot.In the remaining portionsof the structure the electric field isfar below the value anticipatedfor thecase of ohmic conduction (5V/20un= 2.5kV/cm). Fig. 3.22 showsthat for material with ahighdensity of traps most of theapplied voltage drops across theregion adjacent to the hole injectingedge, as expectedfrom the presence of the field overshootdepicted in Fig. 3.23.The effect of hole injectionon the field and potential profilesis shown in Fig. 3.24 and 3.25respectively. Holeinjection increases the field overshootand creates a non-uniform voltagedistribution across thestructure.2 4 6 8 1012 14 16 18 20MICROMETERS42-3.5-4.5Figure 3.23: Potential profile corresponding to theconditions described in Fig. DiscussionOur analysis indicates that the availability ofrecombination centers and hole injectionin thesubstrate significantly increase thevoltage drop in the vicinityof the channel-substrate interface, whichin turn may modulate the carrier concentrationin the channel or in otherwords cause sidegating.While the presence of a high densityof recombination centers is confirmedby experimental data [681,there are not many studies onhole injection into a SI substrate. Aswas mentioned, the existenceofthe inversion layer beneaththe gate due to the high Schottky barriermakes hole injection fromthegate into the channelpossible. Scharfetter has shown that theminority carrier injection inSchottkydiodes is negligible becauseof the small voltage drop across theneutral part of the Schottkydiodeover a wide range of currents[54]. He, however, considered epitaxial diodeswhich were long incomparison to thechannel thickness of about 0.1 — 0.2 um in modem GaAsMESFETs. Furthermore,0-0.5—1-1.5-2-2.5-3-4-50MICROMETERS4325E20.f\l5U—U105Od —:--MICROMETERSFigure 3.24: Electhc field profilein the investigated structurewith the sameparameters as in Fig. 3.20,but for different values of theminority carrierinjection (ij): dots correspond toij=1, dashed line to 0.5, andsolid line to 0.most MESFETs are fabricated byion implantation, which createsa non-uniform impurity profileand consequently a built-infield. This field will assistholes to move into the SI substrate,whileimpeding electrons.Zero field is assumed at theedges of the structure,which implies no space-charge inthe structurein equilibrium (zerocurrent). But the edges arelocated at the junctions between dopedand SI regions,which exhibit a built-infield and space-charge. Althoughour analytic results are thusnot valid inequilibrium, with structuressome tens of micrometers long,only a small error is introducedin theoverall potential profiles undernon-equilibrium conditions.This is because of a smallvoltage dropacross the heavily dopedregions. The depletion regioninto the channel is small andthe zero-fieldpoint at the edge ofthis region will not be far awayfrom the channel-substrateinterface. With44-0.5-2.5-3.5-4.520increase in applied voltagethere will be an extension of the depletionregion into the channel. Butthis extension will be small incomparison to the overall structure.So the boundary conditionsintroduce only a small error in theoverall potential profile acrossthe SI material.The extension of the depletionlayer into the channel uponincreasing a negative bias on thesidegate may be small in comparisonto the sidegate-gatedistance, but significant with respectto thechannel thickness. To obtain aquantitative picture we superimposea potential profile of channel-substrate junctionin equilibrium with a non-equilibriumpotential profile across the SI substrateasshown schematically in Fig.3.26. Over a wide rangeof biasing conditions the substrate space-charge density at the channel-substratejunction is a sum of densityof deep(Nda) and shallow(Nsa)acceptors[70]. The space-charge may beeven higher becauseof the possible presence of deep levelsat the channel-substrate interfacecreated by implantation damage.We assume an abrupt channel-MICROMETERSFigure 3.25: Potential profile correspondingto the conditions described inFig. 3.24.-1-1.5-50 2 4 6 810 12 14 16 1845CHANNELSUBSTRATESIDEGATEFigure 3.26: Schematic superimpositionof the potential profile across theinvestigatedstructure in the presenceof a sidegate voltage V0 (dashed line), andfor zero appliedvoltage (solid line). W1 designatesthe width of the substrate-channeldepletion layer.substrate junction with thedepletion layer consistingmostly of the substrate depletionregion, whichis consequently givenin equilibrium by:W1 1/2Vbj/q(Nda + Nsa)(3.39)where is the built-inpotential of the channel-substrateinterface, which is approximatelyequalto but less thanhalf the band-gap. The voltageacross the channel-substratejunction is given byeqn. (3.38) at x = W1.This voltage can be used in evaluatinga pinchoff voltage of ion-implantedMESFETs following theprocedures in[351.The width of the channeldepletion region is [71]— /‘bi_V(Wl))(17da+Nsa)340— Vq&h(Nh + Nda + Nsa)where Nh is the channeldonor density.We have presented aone-dimensional analysisof sidegating, which ignoresthe drain-sourcefield. The next questionthat we should ask ishow the gate can communicatewith the sidegatein the presenceof a large drain voltage. For aMESFET biasedin saturation, a high-field regionis established in thegate-drain region, while the fieldof about 2 — 3 kV/cm is sustainedin theWiL46gate-source region. Since thegate-sidegate field can be comparable to thatin the latter region, someof the holes that are injected fromthe gate towards the source canreach the substrate. To obtainquantitative results a two-dimensionalanalysis is needed.The phenomenon of sidegatingrecovery under conditions oflarge drain voltage has beendiscussed by several authors,who attributed it to hole injection from thechannel due to an avalancheeffect[72, 73]. In ourexperiments this phenomenon occurredonly upon applying a very high drainvoltage and was not correlatedwith the appearance of an excess gatecurrent. We suggest that it wasdue to inhibitionof the gate-sidegate communication:for large enough drain voltages, the fieldinthe gate-sourceregion increases and prevents frommost of the holes reaching the substrate.Our analysis does not takeinto account the non-linear velocity-field relationship.The resultspresented in this papershow that in the presence of hole injection theelectric field can only behigh only over a very narrow regionand in the remaining portions of the structureit is below itsohmic value. Consequently theelectron velocity can reach saturationonly in the vicinity of thehole-injecting electrode, whereit would probably result in an evenhigher voltage drop in this region.An increase in the voltage dropindicates that a larger portion of the sidegatevoltage will be in thevicinity of the channel thusenhancing sidegating.Gunn effect (instabilities due tointervalley electron transfer)has been invoked to explainsidegating and oscillationsin GaAs MESFETs[74].The present work indicates that becauseofthe very lowfield throughout almost theentire structure in the presence of holeinjection, intervalleyelectron transfer is unlikely tooccur. The experiments on semiconductorswith traps showed a greatlyreduced region of negative mobilityin I-V characteristics [75, 76] and, therefore,even at higher fieldsit is difficult to explain sidegatingin terms of the Gunn effect.As has been already pointedout Lee etal. [12] suggesteda mechanism of a charge transportin SIGaAs in sidegating effect.Their traps-filled-limit modelwas based on the high-levelinjection theoryof Lampert andMark[7]. This model qualitativelyexplains sidegating, but has somedifficulties inexplaining it quantitatively [8].Lampert theory is based oncarrier transport by drift only.In contrast,under conditionsof low-level injection both the diffusionand drift components of thecurrent areimportant. Low-leveland high-level analyses are just twoextremes of the injection phenomenoninto47semiconductor with traps; namely its smalland large-signal analyses. Another important differencebetween the above two analyses is that they treatdifferent geometries: while the Lampert theoryis applicable for long structures,our analysis has been applied to configuration of two relativelyclosely-spaced contacts,which is a typical case for integrated circuits. Still, both of thetheories areimportant as mentioned before: the resultsof the small-signal analysis should be useful for circuitdesigners, while large-signalanalysis is useful for predicting abrupt variations in I-V characteristics.In conclusion, sidegating in GaAs MESFETswas investigated using analytical techniques. One-dimensional expressions for carrier concentration,field, and potential profiles in a SI substrate wereobtained without some of the assumptions,which are usually made in analytic approaches, suchas local space-charge neutrality,neglect of recombination, and diffusion or drift component ofthecurrent. A variable boundary condition on thechannel side of the structure allowed investigationof injection into a SI substrate.Although only one-dimensional the present analysisprovides newinsight into device physics. In the presenceof hole injection it was shown that:1. The local space-charge neutralityis not preserved.2. Both diffusion and drift componentcurrents are important in transport in shortSI GaAs structures.3. The Gunn effect isunlikely to occur in short structures.The analysis was performedon a configuration of two closely-spaced contacts, butthe results,such as an appearance of the fieldovershoot in the presence of hole injection,are similar to thoseobtained for longer structures [41].Therefore, the low-injection analysismay explain the long-rangesidegating.In our physical model of sidegatinghole injection from the gate plays amajor role and this isconsistent with our experimentalobservations (see Fig. 3.17), which showed thatthe gate current isa better indicator of sidegatingthan the sidegate current.3.3 Evaluation of holeinjectionWhen sidegating occurs the negativesidegate voltage progressively depletesthe channel andreduces its electron concentration.Consequently, the potential barrierfor holes is reduced and more48holes are injected into the channel. Sincethe channel of low pinch-off ion-implanted MESFETsis very thin, few holes are lost due torecombination in neutral channel, and mostof them reachthe substrate. Furthermore, due to theimpurity profile of ion-implanted devices there isa built-in electric field, which assists holesto move into a substrate. The hole currentthrough the gatemay exceed the electron current in the gate-channel-SI-sidegatestructure. To show this consider theenergy band diagram in Fig. 3.18.Upon applying a negative bias to a sidegate the depletion edgeof the channel-substrate junctionis pushed into the channel. When two depletion regionsmergethe electron barrieris reduced allowing more electrons to be injectedinto the gate. The number ofavailable electrons, however, is limited by theirsupply from the sidegate determined by the resistanceof a SI region. Thus the maximumelectron current can be estimated from the electronohmic currentdensity through a SI substrate:Je= qneVa/L(3.41)where Va is the applied gate-sidegate voltage,and L is the distance between gate and sidegate.Onthe other hand wecan find the hole current from the thennionicemission theory [601, whichisapplicable here due to a very thinSchottky depletion region. Thus the maximumhole current densityis given by:Jpm= A;T2e_01T (3.42)where is the hole barrier height[77] and A is the effective Richardsonconstant for holes. For= 0.6eV,e= 107cm3,p,, = 4000cm2/Vsec,L = 20im and T’ 3Vthe hole and electroncurrents are 5.69 x iO— A/cm2,and 9.6 x 106A/cm2respectively.Clearly the maximum holecurrent will strongly depend onthe Fermi level at the surfaceof the channel. For instance,for= 0.55eV we obtainJpm= 3.9 x 103A/cm2.In low pinch-off MESFETs the distancebetween the edges of a Schottky gatedepletion region anda channel-substrate junctionis normally in the range of Debyelength. So even for a small decreaseinthe thickness of the undepletedchannel the channel electron concentrationdeviates drastically fromits equilibrium value [271. Themaximum electron concentrationin the channel can be expressed49as [781:no =n1exp(Uo)(3.43)withUo = sinh1(ND/2n){1 — O.5exp[—(d.— WG —(3.44)where LD is defined in (3.27), n,is intrinsic carrier concentration, d is the channelthickness, WG isthe thickness of a Schottky gatedepletion region, and Wj is the extension of the channel-substratejunction into the channel.The thermionic emission hole currentdensity can be expressed in temisof the maximum electron concentrationin the channel:J8= A;T2e_(P+vD_)/kT = A;T2Ne_E9/kT/,10(3.45)where N is the effective conduction banddensity of states in the conductionband, Eg is the energyband-gap, VD is the built-in potentialof the Schottky contact [771, and Vasis the applied voltageon a Schottky contact. Usingeqn. (3.43)-(3.45) it is possible to calculate thehole current from thegate into the substrate as a functionof a sidegate voltage by determiningwj from the sidegatingexperiment. Our calculationsof the hole current as a functionof wj reveal that the hole currentdensity does increase significantlywhen Wj is approaching d — wG, butit is still much smaller thanthe electron ohmic currentdensity. Upon increasing the negativesidegate voltage the condition ofchannel punch-through is achieved.With further increase in voltage thehole current increases rapidlyuntil reaching its maximum value,given by (3.42). Our analysis isconfirmed by the measurementsof the gate current inMESFETs that exhibited a gradual decreasein the drain current upon applyinga negative sidegate voltage.The measurements, which areshown in Fig. 3.27, indicate that asthedrain current is reduced with asidegate voltage, the gate andsidegate current increase andabovearound — 8V they coincide.This indicates that as the channelis progressively depleted, moreholesare injected from the gate, increasingthe gate current, and moreof these holes reach the substrate,where they recombine with theelectrons coming from thesidegate. As shown in Fig. 3.28.the gatecurrent and the correspondingsidegate current dependonly weakly on the gate bias. Thismay seemsurprising because the gate biasalters the thickness of the undepletedchannel and therefore should501 0-310-6—S•e.— 10-v -z10-s -10-s -*00**0 ***Oo ***00******10-10 00000******** -00 0000o8Q10-11-00 -10—12I I I II I-14 -12 -10 -8 -6-4 -2 0SIDEGATE VOLTAGE (V)Figure 3.27: Drain (solid line), gate(circles), and sidegate (asterisks) currents vs.sidegatevoltage (VD = 2V, VG = OV). The gatecia-rent changes its polarity at about —3V.The gate and sidegate currents coincide at thevoltages more negative than —8V.affect the voltage, at which punch-throughcondition occurs. However, it is probablydue to thetwo-dimensional nature of holeinjection through the channel, which involvesboth the gate-sidegateand drain-source interaction. Thehole injection is strongest in the regionwhere the drain-sourceelectric field is weakest, namely,between gate and source: By applyingmore negative gate bias thehole injection from the gate is enhanced, butthe electric field in the gate-sourceregion increases aswell, resulting in less holes beingable to get through the channel.Thus these two effects balanceeach other resulting in the gatecurrent rise occurring approximately at thesame sidegate voltage.In the above section we have proposed asidegating model based on holeinjection from thegate. The purpose of thefollowing section is to report experimentalresults [421 which confirm theparticipation of hole injection insidegating. So far, experimental observationof the participation of51180120FzU6000 -5 -10-15SIDEGATE VOLTAGE (V)(a)600.200H018060012040060200C/)SIDEGATE VOLTAGE(V)(b)Figure 3.28: Channel punch-throughin low pinch-off GaAsMESFETs (VD = 2V, VG : OV to — O.2V):(a) gate current increasesrapidly when a MESFET isnearly pinched off as a resultof applying a negative sidegate voltage.(b) the corresponding sidegatecurrent.holes in the sidegating effecthas been reported only whenlarge drain voltages were applied,and undersuch biasing conditions theholes are believed to be generated byimpact ionization in the channel,0 -5-10 -1552from where they can be injectedinto the SI substrate[72, 79, 73]. We report hole injection fromthe Schotiky gate when no drainvoltage is applied. Hole injection from theSchottky metal on a SIsubstrate has been reported previously[61]. In contrast, we focus on hole injectionfrom the Schottkymetal on the doped channel and show thatit can be significant for a large negativesidegate voltage.Minority carrier injection in epitaxialSchottky diodes increases with current under conditions ofhigh forward bias[54]. This is related to an increasein the electric field in the quasi-neutral regionof the diode. However, since thevoltage drop across this region is very smallin practical situations,the injection of minority carriers isnegligible. The situation is very differentin the Schottky gates ofMESFETs fabricated by shallowion implantation into SI GaAs substrates,illustrated by a schematicband diagram shownin Fig. 3.29(a). The structure consists of twoclosely spaced depletion regionswhich are associated with the Schottky barrierand the channel-substrate interface. Since theFermilevel is pinned at the channel surface at about0.8eV from the conduction band[61], there is aninversion layer beneath the gate, thatis, at the surface the number of holes exceeds thenumber ofelectrons. Under forward-bias conditions theholes are injected from the gate into the channelandare subject to an assisting field dueto a steep impurity profile.On applying a negative voltage tothe substrate, only a smallportion of the applied voltage drops acrossthe Schottky barrier, most isabsorbed at the channel-substratebarrier and in the SI region. As aresult, the two depletion regionsstart to merge, and the potentialbarrier for holes starts to decrease,causing more holes to be injectedinto the substrate, as shown inFig. 3.29(b). Manifacier andHenisch have shown that the holeinjection into a SI substrate mayresult in a very large electric fieldovershoot in the vicinity of thechannel [411. This will cause aneven higher voltage drop in thechannel-substrate depletion region,consequently extending it into thechannel and lowering further thehole injection barrier[80]. Thisprocess is self-regenerating. Athigh enough applied voltages it willresult in the punch-through ofthe channel and a rapidincrease in the gate current.To test the model, measurementswere performed on a structure consistingof two low-pinch-offMESFETs shown in Fig. 3.30.The MESFETs were fabricatedin a commercial foundry using directn andn+Si ion implantationinto undoped liquid encapsulatedCzochralski GaAs substrates. Thechannel width, gatelength, gate-source and gate-drain spacingswere 4 ,um, 1im, 2 m and 2 ,um,53GATEINVERSIONLAYERCHANNELP NDistanceFigure 3.29: Hole injection and a correspondingenergy-band diagram for a (a) quasi-neutralMESFET, (b) MESFET with a large negativesidegate voltage applied. The combinationof theinversion layer, n-channel and semi-insulating substratecreates a P-N-P looks like structure.respectively. The MESFETs had a thresholdvoltage of about —0.7 V and we estimated thechannelthickness to be0.15 pinand the maximum election concentration in the channel tobe1017cm3.The gate and ohmic contacts of device2, which were slightly forward-biased, and anegatively biasedSUBSTRATEPElectronEnergyJp(a)EcEFEvEcEV‘p.EF—(b)54C4I I IIDEVICE 123 urn2 urnBI I I IDEVICE 2SEMI-INSULATING SUBSTRATE(a)(b)Figure 3.30: (a) Crosssection of the investigated three-terminalstructure consisting of two MESFETs.Using a Schottky (gate) andan ohmic contact (source/drain)of one MESFET together with anohmic contact of the otherMESFET, the structure acts as asurface-barrier transistor with a gateoperating as an emitter. (b)An equivalent bipolar transistorstructure with a long collector region.ohmic contact of device1 were used to simulate theinteraction between MESFETs.Under theseconditions this three-terminalstructure functions as asurface-barrier transistor[81, 55] that featureshole injection basedon the punch-through of the channelas a result of applying anegative collector(sidegate) voltage. Sincethe channel width is muchsmaller than the emitter-basedistance, mostof the injected holesare collected by the substrate.Because of the large emitter-collectordistance,the injected holeswill recombine with the electronscoming from the collectorterminal. Thus thecurrent measured atthe collector contact is roughly thehole current of the Schottky diode.A moreE(GATE)C(SIDEGATE)lB(SOURCE)55x101°FC.)Figure 3.31: Measured currents vs. collectorvoltage characteristics. The solidline corisponds to theemitter (gate) currentJEand the dashed line to the collector (sidegate)currentIc.The leakage currentIL(designated by dots) is thecurrent between base and collectorwhen the emitter is floating.accurate estimate of thehole current is obtained by subtractingthe base-collector leakage currentfrom the measured collector current.The measured currents are presentedin Fig. 3.31. Thehole injection ratio, which is theratio of the hole-to-emitter current,is shown in Fig. 3.32 as afunction of collector bias and emitter-basebias as a parameter. Thehole injection is negligible forcollector bias betweenzero and— 1.5 V, but increasessignificantly for more negativevoltages, ingood agreement with themodel.-5 -4.5 -4 -3.5-3 -2.5 -2-1.5 -1 -0.5 0COLLECTOR VOLTAGE (V)560c)COLLECTOR VOLTAGE (V)0Figure 3.32: Calculated hole injection ratio, defined as(Ic — IL)/IE,for the emitter-base bias of0.1 V (solid line) and 0.2 V (dashed line).‘E”Cand‘Lare defined in caption of Fig. 3.31.-5 -4.5 -4 -3.5 -3-2.5 -2 -1.5 -1 -0.5573.4 High-level double carrier injectionin the sidegating effect3.4.1 Introduction and ModelWe have already noted that Leeet at. [12] found a correlation between substratecurrentand sidegating and explainedit by the traps-filled-limit model(TFL) [20]. According to Lee et at.[12] electron injection from the sidegateto the MESFET channel-substrateinterface is initiatedat a certain thresholdvoltage, determined by the sum ofsidegate and drain voltages. However,TFL model predicts thresholdvoltages larger than normally observed [8, 9].Also, some sidegatingexperiments have been reported, whereno dependence on drain voltage wasfound [8]. Furthennore,the oscillations which havebeen observed by several researchers (e.g. [741)and the recently reportedhysteresis in the sidegatecurrent [15] are difficult to explain interms of single carrier space-charge-limited conduction.In the above studies of sidegatingthe interaction between gate andsidegate has not beenconsidered, and measurements of thegate current were not reported.It has been established thatin Schottky barriers consisting of metalon n-type doped semiconductorunder forward bias minoritycarriers can be injected from themetal into the semiconductor [82],although there is some controversyregarding the magnitudeof hole injection in Schottky diodes[59]. Hole injection frompositivelybiased metal pads into thesemi-insulating GaAs substrateswas discussed by Wager and McCamant[61]. Goto et at. [83] analyzed thesidegating effect, based onthe numerical simulation of a structurethat included Schottkymetal on the SI substrate, andexplained it in terms of hole injectionfrom thegate. Their results didnot show hysteresis in I-V characteristicsand consequently in their analyticalmodel they did not try toexplain the instabilities oftenobserved in sidegating effect.Recently aseries of measurements byLiu et at. [58] showed that asmall portion of the gate thatoverlaps then-channel on to the SI substratecan play an important rolein the sidegating effect.Our physical modelis based on experimental observationsof strong dependence of the gatecurrent on the sidegatevoltage, and new results, whichrelate the gate current jumps to hysteresisin test devices [43].We propose that these phenomenaoriginate from double injectioninto the SI58substrate. We suggest that the gate,when biased positively withrespect to the sidegate, is a majorsource of hole injection frito theSI substrate.At low sidegate voltages low-level doubleinjection creates a non-linear potentialprofile across theSI substrate, resulting in asignificant portion of the sidegate voltagebeing applied on the channel-substrate junction.For a high enough sidegate voltage thetransit time of holes from the gate to thesidegateacross a SI substrate becomesless than their lifetime. The holes reach thevicinity of the electroninjecting sidegate, compensatethe negative space chargeformed there by the trapped electrons,and consequently cause a steeprise in the sidegate and gate currents.This is a high-level doubleinjection mechanism, whichis known to produce a negative resistancein I-V characteristics oftenexhibited through hysteresis andoscillations [20, 84]. Reductionof the space charge in the vicinityof sidegate results in many moreelectrons being injected into thechannel-substrate interface. Theinjected electron charge is compensatedby further extensionof the depletion layer into the channel,resulting in a sharp reduction of the draincurrent. Our experimentalresults confirm the importanceof hole injection as proposed byGoto et at. [83], but ourmodel suggests a new and more generalinterpretation of their results.3.4.2 ExperimentsWe now report some newexperiments which indicate doubleinjection in the sidegating effect.Low pinch-off (threshold voltage — O.7V)depletion mode ion-implanted GaAsMESFETs fabricatedat a commercialfoundry were used with gate length 1pm and width 4 pm. The gate-sourceand andgate-drain spacings were both 2pm. The sidegate was 8pm from the sourceand 23 pm from thegate. The layout of the teststructure is shown in Fig. 3.33.An HP 4145A semiconductorparameteranalyzer was used to obtainI-V characteristics at room temperaturein the dark.Fig. 3.34 shows MESFET drain, gate,and sidegate currents versussidegate voltage. Thedrainvoltage was 2V and thegate was grounded. The draincurrent gradually decreased startingfrom asidegate voltage of-3V. Jumps in the currents occurred ata sidegate voltage of about-6V. Correlationbetween gate and sidegatecurrents was apparent not only in thatjumps in each occurredat the same59Figure 3.33: Schematic layout of the mirror-image structureof two MESFETs that were usedin the sidegating measurements. The channel width, gate length,gate-source and gate-drainspacings were 4 pm, 1 pm, 2 pm and 2 pm respectively.The dotted area is the active layer areaof the MESFETs. When one of the MESFETswas biased, the other’s ohmic contact servedas a sidegate. The sidegate was 8 pmfrom the source and 23 pm from the gate.sidegate voltage, but alsoin that they then exhibited the same magnitude. Changesin drain voltages(VD : 0.5— 4V) had no effect on the sharp thresholdvoltage.The drain current as a function of sidegatevoltage for a MESFET with the gate floatingand thedrain voltages from 1 to 5V is presentedin Fig. 3.35. At drain voltages below 3V a softthresholdbehavior was exhibited with noevident current jumps. Also no jumps were observed inthe sidegatecurrent (not shown in Fig. 3.35).However, with increasing drain voltage a jumpin the drain currentappeared, which corresponded to the jumpin the sidegate current.The current between the grounded gate and thebiased sidegate as a function of a negativesidegatepotential, with the remaining electrodes floating,is shown in Fig. 3.36. This figure alsoshowsMESFET current-voltage characteristicswhen the source and drain are biased. Boththe gate anddrain currents exhibited hysteresis with the sametwo threshold voltages at about -5V and-6V. Thehysteresis behavior described here wasreproducible when long integration timeand small voltage60z4IzwcxD()wI—4CD4zDC-)wI.—“4CDw(I)10Figure 3.34: Drain, gate and sidegatecurrents as a function of sidegate voltage (VD = 2V, VG =OV).150I—Z100Li‘-‘500iO—8101010108100 —2SIDE GATE—4—6VOLTAGE (V)614003300zLIJD200Uz410000—2—4—6SIDEGATEVOLTAGE (V)Figure 3.35: Drain currentversus sidegate voltage for a MESFETwith a floating gate (VD : 1 — 5V).steps were used in themeasurements. For the sidegate positivelybiased with respect to the gateneither current jump nor hysteresiswere observed. Note that Li etat. have shown that the hysteresisin sidegating is an artifact of the voltage-controlledmeasurement and in the current-controlledcasethe current-voltage characteristicsexhibit negative resistance [15].We, however, haVe performedour measurements byapplying constant sidegate voltages,because these measurementsimitate thereal-life environmentin the GaAs integrated circuits, in which theworst-case sidegating is determinedby the negative voltagesupply (which ideally is a supplierof unlimited current).3.4.3 Analysis and DiscussionDouble injection into a semiconductorwith traps is known to produce anegative resistanceregime [20, 84], which exhibitscurrent jumps, oscillations and hysteresisas found in sidegating62108150100i0F—C.) c_)z501010010h1-1 -2 -3-4 -5-6 -7SIDEGATE VOLTAGE(V)Figure 3.36: Hysteresis inthe drain current (VD = 2V, VG = OV),and in the gate-sidegatecurrent (source and drain are floating).The solid line represents a decreasing(morenegative) sidegate voltage,while the dotted line represents theopposite direction.experiments. The followingobservations in our experiments,even if separately they donot provethe double injection mechanism,together provide strongevidence for it.I. Sidegate and gate currentswere found to be equal aftera threshold sidegate voltagewas reached.This indicates direct communicationbetween gate and sidegate.2. Hysteresis and currentjumps in the gate-sidegatestructure did not appear uponapplying a positivesidegate voltage, butonly under forward biasconditions (negative sidegate voltage),for whichhole injection from the Schottkygate is possible [821.3. Drain current-voltagecharacteristics exhibitedhysteresis with threshold voltagescorrespondingto the ones observedin a gate-sidegate structure.Thus MESFET characteristicsare directlyrelated to the transport mechanismbetween gate and sidegate.0634. Hole injection is not expected in MESFETs with afloating gate operating at low drain voltagesand, consistently, no jumps in the drainor sidegate currents were observed in our experimentunder such biasing conditions as shown inFig. 3.35.However, for larger drain voltages Fig. 3.35 shows jumpsin the drain current accompanied byjumps in the sidegate current. It is possible that the gateobtains an intermediate value between drainand source voltages, which cause it to beforward-biased. In this case there is no differencebetweenthese results and those shown in Fig.3.34. However, the prebreakdown impact ionization effects,observed by Tsironis [85] in GaAs MESFETsand epitaxial layers for drain voltages higher than 4-5volts, also may explain our observations. Thus,the prebreakdown impact ionization generatespairsof holes and electrons in the channel. Becauseof the energy barrier at the channel-substrate interfaceonly high-energy electrons can be injectedinto the SI substrate. By contrast, holes have an assistingfield at the interface and consequently are attracted bythe negatively biased sidegate andparticipatein the double injection process causing thecurrent jump.Fig. 3.34 shows that soft and sharp gate currentreduction corresponds to soft and sharp anddrain current reduction with a threshold at-3V and -6V respectively. It is difficult toexplain thesharp current reduction by electron injectionfrom the sidegate for a drain-sidegate distanceof 26km,a drain voltage of 2Vand a sidegate voltage of only -6V.For instance, a recent numerical analysis ofn-SI-n structures indicates that electron currentincreases significantly at about 1OV appliedon aS mone-dimensional structure [56].Even higher threshold voltages were obtainedfor two-dimensionalstructures. Furthermore, as alreadymentioned in subsection 3.4.2, the sharpthreshold voltage didnot change due to variations in adrain voltage. This is not expected from theTFL model, whichpredicts a decrease in the sidegatethreshold voltage with increasing drain voltage.Fig. 3.36 indicates that the draincurrent reduction is caused by thegate-source interaction.The current jumps and hysteresisin gate-sidegate structure were observedat an applied field of2.5kV/cm, which is toosmall to initiate impact ionization, thatcan also produce hysteresis in I-Vcharacteristics [15]. Furthermore,Fig. 3.34 shows clearly that the gatecurrent is a strong functionof sidegate voltage. Even before thecurrent jump, a sidegate voltage of -3Vis enough to reversethe gate current polarity, whichindicates abnormal MESFEToperation. If we consider a MESFET64EcEFEvDistanceFigure 3.37: Schematic energy-band diagram of aMESFET gate on a SI substrate.on a SI substrate as a combinationof three Schottky diodes, then the experiments show thatforhigh enough sidegate voltage the gate-sidegatediode is dominant. We, therefore, concentrateon thegate-sidegate interaction.As shown in Fig. 3.33 there is apart of Schottky metallization that is on aSI substrate. Fig.3.37 depicts the energylevels in equilibrium of a gate on aSI substrate. The Fermi level is pinnedat about 0.8 eV [601 from theconduction band and as a result aninversion layer is formed beneaththe gate. The thickness of the Schottkydepletion region is given by [861:‘Wdep/2cVD/qNEL2(3.46)whereVDis a Schottky built-in potential. For VD= 0.15eV andIEL2= 1016cm3we obtainWdep O.15im.If a negative bias is applied on the sidegatethe gate becomes forward biased.Sincethe Schottky depletionregion is thin we can discuss thetransport across the Schotiky contactin termsof thermionic emissiontheory [601. Under these conditions thehole injection from the metal wasshown largely to exceed the electroninjection [61]. Thus, the gate-SI-sidegatestructure acts as aP-I-N diode with a heavily compensatedintrinsic region.For low sidegate voltageswe deal with low-level double injectionbetween gate and sidegate.Under these conditions thepotential distribution across aSI substrate can be calculated using eqn.(3.38). Fig. 3.25 showsthe results of this calculation whichindicate that a significant portion oftheEnergyGATESI GaAs65voltage across a SI substrateis dropped in the vicinityof the hole-injecting boundary. Thispotentialprofile is a result of thedipole, consisting of positive andnegative excess trapped carriers, whichis formed in theclose neighborhood to thehole-injecting interface [80]. Three major contributorsto the formation of the dipoleare high trap densities, high ratioof electron to hole mobility, andlow lifetime in SI GaAs[41]. When only a small portionof the applied gate-sidegate voltage isdropped across a Schottkydepletion region, the resultsin Fig. 3.25 show that in the presenceof holeinjection a significant portionof the applied voltage isdropped across the channel-substrate interface.A gradual increase in the appliednegative voltage will result, consequently,in a gradual decrease inthe drain current asshown in Fig. 3.34 for low sidegatevoltages.During the double low-levelinjection a negative space-chargeregion is formed in the vicinityof sidegate by the electronstrapped in deep EL2 levels.For higher sidegate voltages thetransit timeof holes across a SI substratebecomes comparable to their lifetime.They reach the vicinity of asidegate electrode and reducethe negative space-charge.As a result many moreelectrons are injectedinto the substrate and reachthe channel-substrate depletionregion. The injected negativecharge iscompensated by the depletionof the channel, resulting ina strong decrease in thedrain current.During the injection processsome holes are captured bythe recombination centers.As a resulthole lifetime increases andconsequently a smaller voltageis needed to bring holes tothe sidegateelectrode. This is thesource of the appearance of anegative resistancein double injection processaccording to Lampert’stheory [20]. In our experimentsthe devices that exhibitedsharp sidegating alsoexhibited hysteresis. Wehave investigated an appearanceof hysteresis in the gate-sidegatestructures.The source and drainwere floating, the sidegatewas grounded, and the gatewas positively biased.The negative resistance regimestarted typically between 5to 6V and was accompaniedby a strongincrease in the current asshown in Fig. 3.38. Thelocation of the secondthreshold varied fromdeviceto device over the rangeof 6 to 1 8V. Neitherhysteresis, nor currentjumps were observedin gatesidegate structureswhen the gate was negativelybiased with respect tothe sidegate. According toLampert’s theory [20] thecurrent increase in the negativeresistance regime should beapproximatelygiven by the ratioof the recombination centerdensity to the equilibriumfree electron concentration.For a recombinationcenter density of 1015cm3and the electron concentrationof 107cm3in SI66GaAs we should expect an abrupt increase ofeight orders of magnitude in the current. But in ourexperiments we observed an increase of amaximum of five orders of magnitude in the current. Ourresults are in agreement with the studies ofGaAs P — I — N diodes reported by Weiserand Levitt[87], and Seiway andNicolle [88]. They found the appearance of a negative resistanceat voltagesand currents smaller thanthose predicted by the Lampert [201 or Ashley-Milnes[84] theories andexplained it in terms of an opticalfeedback mechanism suggested in GaAs byDumke [89, 84].Additional mechanisms of double injectionsuch as filament formation were proposedfor GaAs[84]. According toDumke’s model under increasing externalillumination the negative resistanceshould decrease and disappear. Weperformed this experiment on our gate-sidegatestructures and theresults, which confirm Dumke’s theory, areshown in Fig. 3.38. Nevertheless, the thresholdvoltagefor the end of a negative resistance regimein double injection process according to theLampert’sone-dimensional model for an insulatorwith length L [20]:Vth =L2/;(3.47)are in the range normally observed,e.g., taking L 23iim, = 320cm2/Vsec[90], and a typicalhole lifetime in high-resistivity GaAs r = lnsec[91] we obtain a threshold voltageof 8.3V.Geometrical effects in sidegatingbecome very important whenholes are injected from only asmall portion of the gate that is on aSI substrate. In this case the double injectionprocess occurs onlybeneath part of the channel, asvisualized in Fig. 3.39. Thus thesidegating effect can be analyzedusing an equivalent circuit consistingof two MESFETs in parallel. Oneof them will be cut off underconditions of strong double injection,while the other is not influenced byit. This may explain whythe MESFET in Fig. 3.34was not completely cut off aftera jump in the gate current had occurred.Not all gate-sidegate structureson the same wafer exhibited hysteresis.We suggest that thisis due to substrate inhomogeneityinvolving variations in the concentrationof the recombinationcenters either presentin the as prepared wafer or process-induced,for example as a resultof ionimplantation. In addition, doubleinjection is expected to be stronglydependent on the thickness ofthe oxide layer, whichis normally present between a gateand a SI substrate. The non-uniformityofthe oxide layer across thesubstrate can result in differentsidegating behavior for devices on the same6710-s10-aio-10-6Q 1010-s10-sC10-1010-1110-12Figure 3.38: Hysteresisin the gate-sidegate structuresunder increasing illumination (VSGOV,drain and source are floating).The solid line correspondsto the data obtained in thedark,dashed line correspondsto the data obtained withroom lights, and the opencircles correspond tothe data obtainedunder microscope lampillumination. Results obtainedin the dark or withroom lights show hysteresis,while those obtained under directillumination show no hysteresis.wafer. Therefore, thegate formation processingsteps, particularlyoxide removal beforedepositinga Schottky metal,can be important in determiningsidegating. In this case, thesidegating effectcanbe different fromone process run to another,even if identicalsubstrates are used.Since the negativeresistance in gate-sidegatestructures may appearat sidegatevoltages, forwhich a MESFET isalready cut off, it mayeasily be overlooked.But the hole injectionfrom thegate on a SI substrateis still present, resulting in asoft, but not necessarilya weak, sidegatingeffect.In conclusion, double injectionshould be consideredin investigating sidegatingassociated with asharp threshold behavior.We propose a physicalmodel, which accountsfor abrupt current variations0 24 6 810 12 1416 18 20SCHOTrKY GATEVOLTAGE (V)68GATEFigure 3.39: Schematic topview of the area (designated bygray pattern)that is affected byhole injection from the gateon a SI substrate.and hysteresis in sidegating.Our measurements of hysteresisare in general agreementwith Dumke’smodel for double injectionin GaAs. The predominantmechanism of double injection,however, isprobably to be determinedby device geometry andmaterial properties. The roleof hole injectionin enhancing soft sidegatingeffect was discussedthrough the analyticalexpression for the potentialdistribution across a SIsubstrate. Our modelaccounts for sidegatinglight sensitivity [13] becausephoto-generated hole-electronpairs will participatein the double injection process:the generatedholes will be attractedto the negatively biasedsidegate through a SIsubstrate, in a similarwayof attracting holes generated bya prebreakdown impactionization. It was shownthat a channelpunch-through may resultin significant hole injectionfrom the gate. Our analysisof hole injectiondoes not take into accountthe difference in the gateand sidegate areas, which canbe significant.Hole injection for small-areaSchottky diodes was shownby numerical analysisto be muchhigherthan that for the largecontact devices [92].More accurate treatmentwill require two-dimensionalSIDEGATE69analysis, which is beyond the present scope ofthis work. Our results show the need to include gatecurrent measurements in investigating thesidegating.3.5 SummaryDouble injection into the SI GaAs substratewas investigated as a mechanism of sidegating inGaAs MESFETs. We propose aphysical model for sidegating based on a seriesof measurements,which show change of gate current with sidegatevoltage and correlation between abrupt variations indrain, gate and sidegate currentsand instabilities in test devices. An analytical treatmentof carrier,field, and potential distribution in aSI substrate under conditions of low-level injectionshows that anelectric field overshoot may developin the vicinity of the MESFET when hole injection occurs.Thisresults in a large portion of theapplied voltage being dropped across the channel-substrateinterfaceand, consequently, in sidegating.Sharp sidegating, exhibited throughan abrupt decrease of the draincurrent, is explained by high-level doubleinjection.Measurements of currents in gate-source-sidegatestructures, when the gate is slightly forward-biased and the sidegate is negativelybiased with respect to the source, showedthat significant holeinjection from the gate occurs for large sidegatevoltages. This is in agreement with a proposedmodel, in which the presence ofan inversion layer under the Schottky gate dueto the pinning of theFermi level at the channel surface causeshole injection into the channel when the gateis positivelybiased with respect to the sidegate. Uponincreasing negative sidegate voltage thesubstrate-channeldepletion region is expanded, and consequently,the neural region of the channelis shrunk. Thisresults in more holes being injected into thesubstrate from the gate.70Chapter 4Low-frequency transport in semi-insulatingGaAs4.1 IntroductionIn silicon the presence of deep levels wasshown to introduce low-frequency dependence intothe capacitance and conductanceof a p-n or metal-semiconductor junction [29, 51, 69,44]. It isalso well known that many of theparameters of GaAs MESFETs on SI substratesexhibit low-frequency-dependent behavior. While the frequencydependence of some of the parameters(e.g.transconductance) has usuallybeen attributed to the surface states [481,it has been pointed outby many researchers, e.g. [93],that the frequency dependence of theoutput conductance is dueto the properties of theSI substrate. The analysis of transport inSI GaAs in the frequencydomain is therefore vital for understandingmany of the properties ofGaAs MESFETs at low-frequencies. Furthermore, this analysiscontributes to the understandingof crosstalk between twoadjacent MESFETs on a SIsubstrate [40, 94].4.2 Analysis and resultsWe assume that both deep donorsand deep acceptors are present in theSI GaAs one-dimensionalstructure confined betweentwo contacts: contact 2 is anohmic contact which can inject only electrons,while contact 1 is a Schottky contactwhich may inject holes and is assigned avariable injection ratio(j=0 corresponds tozero hole injection, and =1 tozero electron injection). The schematicequilibrium band diagram of thestructure is depicted in Fig.4.40. In Chapter 3 we reportedan analytical study of theDC charge, field and potentialdistribution in such structures [801.Ouranalysis was based on theinvestigation of minority-carrierinjection into semiconductorswith trapsby Manifacier and Henisch [64,41]. We assume that the deep levelsin the structure do not interactand thus separate rateequations can be written for each level.If we restrict the magnitudeof excesscharge densities to smallvariations around their equilibrium valuesthen the rate equation for a single71CONTACT 1CONTACT 2ElectronCEnergySemi-insulating GaAsfl+0Distance LFigure 4.40: Schematic equilibrium band diagramof the semi-insulating structure ofa length L between zero-fieldpoints in the vicinity ofN+and Schottky contacts.deep level is given by [29]:döN6N( + e + CpPe + e) + n1V — öPIVtc(4.48)where N is the density of a deeplevel, e, e are the emission rates of adeep level for electronsand holes,c, c, are thecapture probabilities of a deep levelfor electrons and holes, ande Pearethe equilibrium electron andhole concentrations, n1 is the electrondensity if the Fermi level wereat the energy level of the deeplevel. We decompose the excess freeelectron, free hole and trappedelectron densities respectivelyinto AC and DC components to yield:n(x) = bnd(x) +ön(x)eWf (4.49)öp(x) = bPdc(X) +6pac(x)eLi, (4.50)öNt(x)=6N(x) +JV(x)&wt. (4.51)72Substituting (4.49)-(4.51) into (4.48) to obtain:6N(x) = /36ac() — ae5Pac(x)(4.52)withD ATT TT(453)rD(1+jwr)r(1+jwr)nD A— TT TT(4.54)rD(1+jwr)pwhere indexes D and A designate deep donorsand deep acceptors respectively,1/T’4CAfle+e+CpDAPe+el)A(4.55)D,A D,A I DA= cDAN fli/ifle+i),(4.56)l/r1)A = CpNPAfle/(ne+DA)(4.57)For w = 0 a and yield DC solutions [801as expected. The linearized [63] time-dependentcontinuity equations for electronsand holes, and Poisson’s equationcan be written as:a2iv 8E AF)= qL(4.58)8X2kTr____OE Ab6F)= qL 06P(4.59)aX2_Fe_i+p(Fe5N+ikTôtdE 1dX — 1 + Fe[(1 + c46F — (1 +3)6N](4.60)withLD=5,/[kT/q2(n+pe)j,A = e/qpnr(n +Pe),where a and /3 are defined in(4.53)and (4.43), q is the magnitudeof the electronic charge, pis the electron mobility, jt,,, is the holemobility, b=r is the lifetime, is the dielectricconstant, 5N, 6F and Fe are the excess73free carriers and equilibrium hole concentrationrespectively, normalized to the equilibrium electronconcentration. The field is normalized to kT/qLD,the potential to kT/q, the currentdensity to,upkT(ne + Pe)/LDand the distance to LD.Substitution of (4.60) into (4.58)-(4.59) and decomposingthe excess electron and hole densitiesinto the DC and AC components yieldstwo coupled differential equations, which can be separatedinto DC and AC parts. For frequencies muchbelow the reciprocal of carrier lifetime the AC and DCsets of equations areidentical, except in the AC set and/3 are given by (4.53) and (4.54). As aresult excess carrier concentration andpotential profiles in the frequency domain arereadily obtainedfrom the DC solution for zerofield boundary conditions [801:6Nac(X)A[Mc0sh— Rcosh((L — X)/)+Fecosh (xj)+K cosh ((L —(4.61)/sinh(Lv”)6Pac(X)= A[MPecosh (X.J)+K cosh ((L — X)/)-,/sinh (L/’)(4 62)— Rcosh((L — X’)14/sinh (Lj)v(l+)M—(1+/3)( —A(P6+b)Fe(cosh(X/) — i) + K{cosh ((L — X)./r)— cosh (L/’)]+v”sinh(L/) (4.63)— M(cosh(X’)— 1) — R[cosh ((L — X))— cosh (L1/)}+RX},/Z sinh (L/)with v = [Pe(1+)+(1+/3)j/(1+Fe), = An(Fe+b)/(l+Fe),K =—PC,M = (1+/3—Ab)/(1+a—A),R ii(b—M)+M, \ Jac(l+Pe)/b(M+1e).Thenormalized admittance Y is obtainedfrom (4.63):= tlac/Vac(L) = G +jwC.(4.64)The distribution of excesstrapped and free carriers calculatedfrom eqs. (4.52), (4.61), (4.62)forthe hole injection ratio i=0is shown in Figs. 4.41—4.42for 1Hz and 1MHz correspondingly.Figs.74101010-11010 -- -- — - - — — -- -- — —— — —10-13 --.-10—16I I II —0 5 10 1520 25 30 3540 45 50MICROMETERSFigure 4.41: Concentration profile ofexcess trapped and free carriersin the 5Opm long model structure at 1Hzwith no hole injection (j=O). The solidline corresponds to trapped carriers, dashedline to electrons, and dots toholes. The amplitude of AC applied voltageis 5OmV, the equilibrium electron concentrationis 7 x106cm3,the equilibrium hole concentrationis 2 x iO cm3,the electron mobilityis 4 x iOcrn2/Vsec, the holemobility is 400cm2/Vsec, and the lifetimeis 10 nsec. The deep donor is assumed tobe 0.75eV from theconduction band, its density 2 x1016cm3,and with the capturecross section of lx 10’3cm2for electronsand1 x 106cm2for holes. The deepacceptor is assumed to be 0.65eV fromthe conduction band, with density5 x1015cm3,and with the capture crosssection of 1 x 103cm2for holesand 1 x 106cm2for electrons.4.43—4.44 show the distributionof excess trapped and free carrierscalculated for =1 at 1Hzand1MHz correspondingly.Fig. 4.45 shows conductanceas a function of frequency evaluatedfrom the real part of eq.(4.64) for=t0 and =1. Fig. 4.46 shows the capacitance as afunction of frequency evaluatedfromthe imaginary part of eq. (4.64).7510-s10-a10-i10-6CIDU10-1010-11Figure 4.42: Concentration profile of trappedand free excess carriers at 1MHzwith no hole injection. The rest of theparameters are given in Fig. DiscussionThe solution of the transport equationsin semiconductors was shown byvan Roosbroeckand Casey [95] to belargely dependent on whether dielectricrelaxation time is smaller or largerthan carrier lifetime, and,consequently, they classified semiconductorsinto lifetime or relaxationtypes. In the latter. no local spacecharge neutrality but rather charge separationthrough zeronet local recombination is established.When the local space chargeneutrality (6IV = .5F) is notassumed the solution of the continuityequations and Poisson’s equationunder conditions of low-level injection results in terms containing exp(tXy’)andexp(tXv’).The parametersand can be expressedin terms of a static screening length L3 andan ambipolar diffusionlengthLDa[96] respective1y:/ = LD/L8, LD/LDa.Manifacier and Henisch modified0 5 1015 20 25 30 35 4045 50MICROMETERS7610I I1010- •—---N1010 — —. —— —— —— ——10—13II I I0 5 10 1520 25 30 35 40 45 50MICROMETERSFigure 4.43: Concentration profile of trappedand free excess carriers at 1Hz in thepresence of hole injection (ij=1).The rest of the parameters are given in Fig.4.41.the criterion suggested byvan Roosbroeck and Casey [95]and classified semiconductors with trapsinto a lifetime or relaxation case accordingto the ratio LDa /L3 with a large ratiocorresponding tolifetime semiconductors and thesmall to relaxation semiconductors[96]. When frequencies approach1/TTboth excess trapped and free carriersbecome frequency-dependentthrough cr and (see eqs.(4.53)-(4.54)). Note that TT does notdepend on the trap densityand thus the frequency dependenceis not necessarily initiated by the trapwith largest density. Indeed,in our caserFis about O.O3sec,while T is about 0.4sec anddetermines the range of frequenciesin which frequency-dependentphenomena appear. Thus at1HzLDais about 3j1m and the absolute valueof L3 is about O.08itm.At 1MHz the ambipolar diffusionlength is the same but L3 changessignificantly and it now stands atabout 34gm. Consequently,SI GaAs exhibits lifetime-likebehavior at low, frequencies,but behaves7710-210-610-v10-810-Figure 4.44: Concentration profileof trapped and free excess carriers at 1MHzin thepresence of hole injection(=1). The rest of the parameters are givenin Fig. a relaxation semiconductor athigh frequencies. Note that the assumptionof local space-chargeneutrality results in the solution containingonly exp( tX./). which are frequency-independentatlow frequencies (much below the reciprocalof carrier lifetime).At 1Hz (see Figs. 4.41 and4.43) the distribution of excess trappedand free carriers in thebulk of SI GaAs is dominated byexp(tXv’Z’)since the diffusion length is muchlarger than thescreening length. When holeinjection occurs (see Fig.4.43) the electrons move so as toneutralize theinjected holes. The excess hole andelectron densities are bothpositive and have similar exponentialdistribution throughout the structure,which is expected for a lifetime semiconductor.But in contrastto the classical lifetime behaviorthe local space charge neutralityis not preserved due to thehighdensity of the traps in the SI substrate.At 1MHz the chargedistribution in the SI structureis becoming1 0-10-i10-s10-100 5 1015 20 25 30 3540 45 50MICROMETERS78L)FL)N0zFigure 4.45: Frequency dependence of the conductanceof the SI structure calculated using eq. (4.64).Thedashed line corresponds to the conductancein the presence of hole injection (17=1)and the solid line to theconductance when nohole injection occurs (17=0). The rest of the parametersare given in Fig. 4.41.less sensitive to the presence ofhole injection (see Figs. 4.42 and4.44). Since the screening lengthnow is larger than the ambipolar diffusionlength when hole injection occurs the effectof the latter onthe carrier distribution appearsonly within the distance LDa from thehole-injecting contact. Afterthis the material is dominated bythe zero net local recombination,which is typical of relaxationsemiconductors, resultingin 6P(X) PeN(X).[4lj. Normallyin SI GaAs Fe= Pe/fle< 1 andhence the excess hole and electrondensities have opposite signs with theelectron density being larger.This is observed in Figs. 4.42and 4.44. Since the zero field boundaryconditions dictate the totalexcess charge neutrality the excesscarrier density changes sign around the middleof the structure.Comparison between the carrierprofiles at lHzand 1MHz reveals that theratio of free to trappedcarriers increases with frequency.The charge injected into the SI structureconsists of a free and10-810-1 100 101 102 l0 10 iO106lO108lOFREQUENCY [Hz]791 0- I I10-8 -1 O-10-1010-110° 10’10210 10 iO106iO10810FREQUENCY [Hz]Figure 4.46: Frequency dependence of thecapacitance of the SI structure calculated using eq. (4.64). Thedashed line corresponds to the capacitancein the presence of hole injection (ij=l) and the solid line to thecapacitance when no hole injection occurs (=O). The restof the parameters are given in Fig. 4.41.trapped charge. At 1Hz most of the injectedcarriers will be trapped which results in low conduction.At high frequencies few injected carriers are immobilizedin traps and thus most contribute to thefree carriers resulting in higher conduction.Fig. 4.45 shows that at low frequencies theconductance is reduced in the presence of holeinjection. This is because the injected holes attract the muchmore mobile electrons to the vicinity ofa hole-injecting contact. At low frequencies thespatial distribution of injected free electrons resemblesthe distribution of free holes, as aresult of the attempt to preserve local space charge neutrality.Thisresults in a diffusion of theelectrons in the same direction as the holes, thus decreasingthe totalcurrent and, consequently, theadmittance [411. At higher frequencies this phenomenon iseliminateddue to the fact that thefree carrier distribution is detemined by zero localrecombination. This80results in the frequency responsebeing insensitive to hole injection.At low frequencies in thepresence of hole injection boththe hole and electron traps play an importantrole in determining thecharge distribution as shown inChapter 3 and in Ref. [80], and,therefore, their frequency responsesdetermine the frequencydependence of the conductance. Theconductance starts to increase at about0.4 Hz, which corresponds tothe time constant associated with thehole trap r. This is due tothe fact that a reductionin the hole trap density in the presenceof hole injection will increase theconductance [41]. Thisincrease saturates at about 5 Hz,which corresponds to the time constantassociated with the electron trapr. This is because atthis frequency the electron trap densitystarts to decrease, andthus compensates the reductionof the hole trap density. In the absenceofhole injection an ohmicconduction will dominate the transportin SI GaAs at low frequencies, andtherefore the frequency responseof the deep levels has almost noeffect on the conductance as canbe seen in Fig. 4.45.There is another bump on the conductancecurves, which occurs between Ikllz and 50 kHz. This frequency rangeis determined by the frequencies at which1/31= Ab and= A. The first frequencycan be evaluated to befiJ1/(TAb)2— 1/(rf)2/2ir, and thesecond one isf2/1/(rA)2 — 1/(r)2/27r. Note thatfi, f2depend on the traps characteristicsthrough r, and TT, and on themobility and lifetime through A.The conductance increases afeworders of magnitude in theMHz frequency range andthen saturates with frequency. Thesharpincrease begins at about0.5 MHz when L1/i1 1,and ceases at about 0.50Hz whenl/l1.Clearly, the frequency at which theconductance starts to increasedepends not only on the frequencyresponse of the deep levels, butalso on the distance betweentwo electrodes: it decreases asthedistance decreases. If hole trapsare not included in the simulation,or their density is greatly reducedthe discrepancy in the curvesdue to hole injectionvanishes. If several electron trapsare includedin the simulation, their effecton the admittance can be examinedin terms of their contributionto/3which dominates over a becausefor an electron trap 3 >>a due to the differencein the trapcapture cross-sections forholes and electrons. In theabsence of hole injection thetrap with thehighest density will normally bedominant at frequencies upto the corresponding 1/TT,after that thedominance is transferred to the trapwith the second largestdensity, which has a higherfrequencyresponse, etc. Thus in this casea low-density trap woulddetermine the admittance behaviorin a81certain frequency region,if it outlived rest of the higher-density traps. A shalioelectron trap willnormally have a higher frequency response thana deep electron trap, if both of them have similarcross sections for electrons. Therefore,inclusion of a shallower electron trap in addition to EL2willresult in the strong increase of the conductancestarting at higher frequencies.Fig. 4.46 depicts the frequency dependenceof the capacitance. In the presence of holeinjectionthe capacitance starts to decrease atabout 5 Hz, which corresponds to rand then saturates at about50 kHz, which correspondstof2discussed above. At low frequenciesthe capacitance increases withhole injection, because the latter forms atrapped charge dipole in the vicinityof the hole-injectingelectrode [80]. As in the case of conductance,not including hole traps in thesimulation results in thecurve which is insensitive to hole injection.The resultant shape of the curve issimilar to that shownin Fig. 4.46 in the presence of hole injection:namely it exhibits the transition of the capacitancefrom high to low values,which was observed in silicon p-n junctionswith deep traps [51, 69]. Asshown in Fig. 4.46 at higherfrequencies the capacitance becomesinsensitive to hole injection.The results presented in Figs. 4.45and 4.46 are in good agreementwith experimental data forSI GaAs [32], namely smallbumps on the conductance curves, thatcan be seen at low frequenciesand high temperatures and adrastic increase in the conductance athigher frequencies (Fig. 3in[32]), and a transition of thecapacitance from the high tolow values (Fig. 4 in [32]). AlthoughPistoulet et at. [32] explainedsome of the results in termsof their potential fluctuations theory,our work shows that the principalfeatures of their data for SI GaAscan be reproduced by solvingcontinuity and Poisson’s equationsin the frequency domain. The validityof our results becomesquestionable at frequencies abovethe reciprocal of carrierlifetime, which is about 20 MHzin ourcalculations. However, thesharp increase in the conductancewas shown to be dependenton thedistance between the electrodes andon the traps characteristics,and it is possible to show that bychanging these parameters thestrongly transitional regionof the conductance can be shifted tolowerfrequencies in which ouranalysis is definitely valid.Physically the sharp increasein the conductance in the MHzrange occurs probably due tothefact that the SI GaAs transformsin this frequency range from alifetime semiconductor to arelaxationsemiconductor. Because ofzero-field boundary conditionsonly a diffusion componentof the total82current plays a role in determining the conductance.At low frequencies there is quasi-neutrality ofexcess free carriers in the SI GaAs: the excessholes and electrons have similar distribution in space,and, consequently, the hole and electron diffusion currents have oppositesigns, decreasing the totalcurrent. With increasing frequenciesthe shape of the excess free holes and electrons change frombeing similar to a mirror image (with unequal magnitudes).Thus at higher frequencies the diffusioncurrents of holes and electrons sum up, increasing thetotal current.In conclusion, the free and trapped carrier profiles and thepotential profile in SI GaAs were foundto be frequency-dependent. At lower frequencies thematerial behaves like a l{fe:ime semiconductor,in which electrons are trying to neutralize the injected holes. Athigher frequencies charge separationoccurs, typical of relaxation semiconductors.It was shown that the local space charge neutrality isnot preserved in both low and high frequencies.It was found that up to about 100 kHz the admittancecan be represented by an equivalent circuitconsisting of a frequency-dependent conductance and amore strongly frequency-dependent capacitance.At low frequencies the conductance decreases, whilethe capacitance increases in the presenceof hole injection. At higher frequencies the conductanceincreases by a few orders of magnitude. This increaseoccurs at lower frequencies for shorterdistances between the contacts. The comparisonbetween the structures with two ohmic contacts andthe structures with one ohmic and one Schottkycontact reveals that their admittances differ atverylow frequencies but are very similar athigher frequencies.4.4 Applications to AC sidegatingThe above results indicate an increase of a feworders of magnitude in the SI GaAs conductivityin the kHz-MHz range, depending on thetrap parameters and device geometry. Theincrease in theconductivity will be higher and will be stretchedover a wider frequency range by decreasingspacingsbetween devices. Thus, in addition to theDC sidegating effect due to holeinjection or space-chargelimited currents in the SI substrate, discussedin Chap. 2, a strong AC sidegating effectmay exist.This effect has been overlooked,probably because for GaAs MMIC’s capacitivecoupling is assumedas the only way of crosstalk,while for GaAs digital integrated circuitsonly DC sidegatinghas beeninvestigated. However, for wide-bandwidthcircuits, such as operational amplifiers thiseffect cannot83be ignored. Furthermore, switchingwaveforms in digital circuitswill normally have higher frequencyhannonics besides DC components,which may affect significantly the crosstalkbetween devices. In[94] we analyzed AC sidegatingin GaAs MESFETs and the calculatedresults, shown there, whilethey agreed with trendsin the experimental data, underestimated themagnitude of the crosstalk.These calculations were basedon the parameters evaluated from DC measurements:specifically thesubstrate admittance wasevaluated from DC measurements.However, considering the frequencydependence of the admittanceof the GaAs SI substrate, presentedin this chapter, it is clear that theadmittance might havebeen a few orders of magnitude larger thanits DC value, resulting in a betteragreement of the calculationswith the experimental results.In the next Chapter we will seeapplications of the results derivedin this section to modeling ofthe output conductanceof GaAs MESFETs on SI substrates.4.5 SummaryBy extending to the frequencydomain the analysis of transportin semi-insulating GaAs two-terminal structures, inwhich one terminal injects onlyelectrons and the other may injectholes,closed form solutions were obtainedfor AC charge and potentialdistribution under conditions oflow-level injection. The presenceof deep traps results in frequencydependence of both the excessfree and trapped carriers.At low frequencies free electronsmove so as to neutralize injectedholes,but at higher frequenciescharge separation of free carriersthrough the zero local recombination,typical of relaxation semiconductors,occurs. The corresponding admittancecan be represented byan equivalent circuit consistingof a frequency-dependent conductancein parallel with a frequency-dependent capacitance.At very low frequencies theconductance decreaseswith increasing holeinjection. At higher frequenciesit increases and then saturateswith frequency. At low frequenciesthe capacitance is a stronglydecreasing functionof frequency. At higher frequencies theadmittancedepends only weaklyon the hole injection ratio.Although we focus onsemi-insulating GaAs, theequations presented are in ageneral form,which is applicable to thefrequency-dependent transportin a variety of other semiconductorsunderconditions of low-levelinjection.84Chapter 5Modeling frequency dependence of the output conductanceof GaAs MESFETs5.1 IntroductionThe output conductance of a GaAs MESFET is one ofthe major parameters, which determinedevice performance, and, consequently, its variationwith frequency has attracted the attention ofmany researchers recently [93, 97—99]. In these papers the outputadmittance is modeled as a singletime constant (zero-pole) function. Although thisfunction can be tailored to fit the variation withfrequency of the output admittance magnitude, the phasechange calculated using this approach isgreatly overestimated [93, 45], suggesting amore complicated behavior in the frequency domain.The numerical simulations of the output conductance dispersionprovide more understanding of thephenomenon [6, 100], but do not produce an adequatemodel for circuit simulation.5.2 ModelingThe frequency dispersion of the output conductance,expressed as a drain-lag effect in the timedomain [45], has been widely ascribed to thechannel-substrate interface [93, 97, 6,101]. To illustratethe channel-substrate interaction consider thecross-section of a GaAs MESFET shown inFig. 5.47.The conductive channel isbounded by the gate and channel-substrate depletionregions. The saturationcurrent in GaAs MESFETs, assuming aconstant electron concentration ND, is givenin the velocitysaturation region by:I qNDZVS(A — d — h)(5.65)where q is the magnitude of the electron charge,Z is the device width, d is the thickness of the gatedepletion region, h is the extensionof the channel-substrate depletion regioninto the channel, andv is the saturation velocity. Usingthe abrupt depletion region approximation,we evaluate d and hat the drain edge of the gate (l = +1, in Fig. 5.47):d= 4/2 - VDST — VG)(5.66)VqN85h— /2E(VBCS + VDST — VSB(ll))NA(5 67—vqND(NA+ND)where c is the permittivity, VBSC is the Schottky gate built-involtage,VDSTandVSBare the channeland substrate voltages respectively at l, VBCS is thebuilt-in voltage of the channel-substrate interface,VGis the gate voltage, and NA is the sum of densityof shallow and deep acceptors [70]. We canwrite the drain conductance as:fd__Gd= —qNDZv3T7+Ty(5.68)\UVDS CIVDSJThe first term in the brackets is due to the displacementof the velocity saturation point and theconsequent channel widening [1021. Thesecond term represents the modulation of the width of thechannel-substrate depletion layer through theSI substrate by a drain voltage, and can be interpretedas an electrostatic drainfeedback effect [1031. Although the potential profilein the channel changesGATESOURCE— i;DRAIN1sggDISTANCE FROM SOURCEFigure 5.47: Schematic cross section of a MESFETand an AC potential profile acrossthedrain-substrate-source region. LF corresponds tothe profile at low frequencies, HF athigh frequencies.n+n+Semi-insulating GaAs Substrate86with the drain voltage, its variation ismuch weaker than thatin the substrate, and, therefore, weassume that the modulation of his due to the latter only. Aswe shall see in the following analysis,the potential distribution acrossthe drain-substrate-source regionis frequency-dependent, as shownin Fig 5.47, and, thus, the modulationof the width of the conductive channel,and, consequently, theoutput conductance depend onfrequency.Our analysis is restricted todrain voltages which satisfy the conditionof low-level injection intothe substrate. In non self-alignedtransistors the typical distance betweensource and drain is about3—6 m, and for suchdistances two-dimensionalnumerical analysis of n-SI-n structurespredictshigh-level electron injectionoccurring at voltages larger than5 V [56]. Abrupt current increasein such structures hasbeen reported previously at lower voltages,but it has been attributed tosurface effects [104]. We, however,consider the SI region under thechannel, which is not normallyaffected by the surface states,particularly in large-geometrydevices. An analytic expressionforthe potential distributionin one-dimensional Si GaAsstructures has been obtained previouslybysolving the time-dependentcontinuity equations for holesand electrons and Poisson’s equationunderconditions of low-level injection,without further assumptionssuch as space charge neutralityandneglect of the diffusioncomponent of the current [105].The solution is restricted to therange offrequencies below thereciprocal of the carrierlifetime in GaAs, whichis sufficient for discussingthe frequency-dependenteffects in GaAs MESFETs.This restriction is not necessaryfor obtaininganalytic expressions, but greatlysimplifies them. For the boundaryconditions of zero field andzero hole current, the obtainedDC potential profile isalmost insensitive to the substrateproperties,exhibiting nearly lineardistribution [80]. But the ACpotential profile, given by inthe followingexpression, is frequency-dependentand is sensitive to thedensity and location in the energybandof the traps in the SI material[105].- Fcosh(x/)— cosh((l— x)/i)+cosh(1/i)V3b(x,w)=A{MIx—. +/sinh(1/i)P[(1 +a)M — 1— fi]cosh (x) — cosh ((1— x)) + cosh (l) —(5.69)An(Pe +b) v’sinh (l/)withii= [Pe(1 +a) + (1 + 3)]/(1 + Fe),87= An(Pe+b)/(1+Pe),M = (1+/3—Ab)/(1+a—A),= TT/[T(1 +jWTT)],/3 = TT/[Tfl(1+jWTT)],where1/TT = Cr4 fle + en + CpPe +e,i/Tn = CnNTfl1/(fle+fll),1/Tn = CPNTfle/(fle + ii1),w is the angular frequency, NT is the densityof a deep level, e, e are the emission rates of adeep level for electrons and holes, c, c,are the capture probabilities of a deep level for electronsand holes,e, peare the equilibrium electron and hole concentrations, Fe= Pe /e,n1 is the electrondensity if the Fermi level were at the energylevel of the deep level, 1 is the drain-source spacing.In(5.69) the distance x is normalized to /EkT/q2(ne + pa),and the parameter A can be determinedby the drain voltage.Substituting (5.69) into (5.68) and separatingthe obtained result into DC and AC parts yieldsthe AC component of thedrain admittance:Zv [17Sb(11,w) — VSb(ll,0)]/qCNNgd= VSb(l)\/2(NA + ND)(VBCS + VDST —VSB(l1))(5.70)The drain conductance is given bythe real part of (5.70). The parameter VDSTwill depend on thedevice geometry: in non self-aligneddevices biased in saturation most of thedrain voltage is droppedacross the gate-drain region, and, therefore, VDSTis only slightly higher than the saturationvoltage,but in self-aligned transistorsthis will not be the case [1061. Therefore,in this work VDST is usedas a fitting parameter. The DC componentof the output conductance can be evaluated fromDC I-Vcharacteristics, and the total outputconductance is thus obtained by summing upthe AC and DCcomponents. The resultingequivalent circuit of a MESFET is shownin Fig. 5.48. In Fig. 5.48R0 is: the DC output conductance, gis the transconductance,gis defined in eq. (5.70), RbandCsubrepresent the substrate admittance,which is due to the conduction between sourceand drainthrough the SI substrate [105].Note that the above equivalent circuit includesfrequency-dependent88GATE DRAINCsubSOURCEFigure 5.48: Small-signal equivalent circuit of a GaAs MESFETat low frequencies.elementsgd’Rsuband Csub, and in that it is differentfrom the previously proposed circuits, forexample, the ones suggested byScheinberg et a!. [1071and by Lee and Forbes [98). The outputadmittance is given by:Y0 = + +JtVCsub +gd(5.71)In comparison to other models ourmodel has a certain degree of predictability,since its inputs areparameters of the traps that are present inthe SI substrate and device geometry.5.3 Comparison withexperimental and numerical dataThe analysis of the AC potentialdistribution across the source-substrate-drainstructure underconditions of low-level injectionis valid for a wide rangeof drain voltages, and, therefore,it can beused for investigationof drain-lag effects and AC I-V characteristics.This is confirmed by the factthat the drain current overshootand the drain conductance dispersionwere observed at drain voltagesas low as 1 V [101, 991,indicating that these phenomenaare not originated, but perhaps enhanced,by high-level injectioninto the SI substrate. To test thevalidity of the model, we examinefirst ifit predicts the major trends indevice behavior.According to the model thefrequency-dependent component of thedrain conductance increaseswith the acceptor densityin the substrate in agreement with numericalsimulations [6]. However,controversial results have been reportedregarding the effect of a buried player beneath the channel:89while it is established that the buried layer improves DC characteristicsof GaAs MESFETs, there is noconsensus whether it reduces the AC/transient-dependenteffects [108, 1011. Our model predicts thata p layer slightly beneath thechannel will increase the frequency dependence of the drain conductancethrough the increase of the shallow acceptor density,while it will not affect the frequency-dependentpotential distribution in the substrate, altogethermaking the frequency dispersion of the outputconductance even worse. But a deepimplant, which provides in addition to the depletionlayer aconductive layer beneath the channel,will eliminate the frequency dependence. This is in agreementwith the reported experimental data: when a deepimplant was used no drain current transients wereobserved [109, 1081, but when a shallowimplant was used in order to keep the p-layer completelydepleted, the drain current transients increased[101].To examine AC I-V characteristics we replace theDC voltage VSB (li) in (5.67) by its AC valueevaluated from (5.69). The resultant eq. (5.65)yields a higher current, since17sb(li) increases withfrequencies in the low-frequency range. Thisis in agreement with the measured data,which indicatelarger saturation currents at kHz range [98, 99].According to the AC potential profile showninFig. 5.47, it is possible to devisestructures, for which the frequency-dependenteffects are reduced.Minimum effect will occur when the drainside of the gate is about the middle of thedrain-sourcedistance, that can be expressed as:(&+ Ig)/lcig1. Maximum effect will occurwhen the drain sideof the gate is about 1/4 from the drain,that can be expressed as: (l +ig)/ldg3. The predictionsof this simple analysis are in agreementwith experimental data of drain current overshootsas afunction of gate-drain and gate-source spacings[101]. The results of this analysis for MESFETswithand without p-type buried layerare visualized in Fig. 5.49.Direct comparison betweenour model and measured data requires knowledgeof substrateproperties. The analysisis further complicated by the fact, thatin the substrate region beneaththe channel, in addition tothe presence of the traps, originated in as-grownSI substrates, deep levelsmay be induced by processing[110]. Our model allows incorporation ofmultiple non-interactingtraps in the analytic expressionfor the AC drain conductance as describedin [80, 105]. We havecompared our resultswith the numerical and measured data extractedfrom [111, 100]. The numericalanalysis suggested thatin addition to EL2, there is a shallowerelectron trap, which plays a role in90BADGOODS G Dnfl+ jfl+LplayerSI SUBSTRATES G DS G Dnn+p layerSI SUBSTRATES GDFigure 5.49: The impact of the device structureon the frequency dependence of the outputadmittance. Thefirst row shows MESFETs with a p-type buriedlayer. A deep p layer reduces the frequencydependence, while a shallow player may increase it. The second rowshows the effect of thegate location on the frequency-dependentoutput admittance: placing gatecloser to the sourceenhances the frequency dependence, whileplacing it closer to the source may reducethe effect.the frequency-dependent effects [1001,and, consequently, we used similar parametersto those inthe numerical simulation.Our results, calculated by (5.70), arein very good agreement with thenumerical and measured data, asshown in Fig. 5.50. Not shown inFig. 5.50, but noteworthy, is thefact that the phase variation over thefrequency range 1 — io Hz , calculatedby (5.70), is less than 2°.We have examined the temperature effects byconsidering temperature-dependentemission ratesfor EL2 [1121: e = 2.83 xlO7T2exp(—0.814/kT)s’ and e = 1O3e, and thetemperaturenil___I÷iSI SUBSTRATEnn+n+SI SUBSTRATE91Cc-)Cdependence of the carrier concentration and theEL2 energy level. Fig. 5.51 shows drain conductanceversus frequency at two different temperatures, calculatedby (5.70) assuming only one deep level(EL2) in the substrate, together with the measureddata extracted from [99]. Our results reflect thetrend in device behavior, which is theshift of the frequency-dependent region of the drain conductanceto higher frequencies athigher temperatures. Experimental results indicate asmoother increase inthe drain conductance, suggestingpresence of additional traps in the substrate.6.565.554.543.532.52100FREQUENCY [HzlFigure 5.50: Drain conductance vs. frequency.Results of the presentmodel (solid line) are superimposed onnumerical results (dashed line) [7], andexperimental data (circles) [20]. Parameters used:T = 300 K,ND = lO’7cm3,NA= 6 x 1015cm3,VDS 2.5V, VDST= l.45V,= ldg1pm, 1 = 1.2pm,7 x 1Ocm,p 105cm3,for trap at 0.69 eV;N1 = 5 x 1016cm3,O1= 2 x 10’4cm2,0p1= 2 x 1018cm2,for trap at 0.5 eV;N2 = 5 x lO’5cm3,0n2 = 5X 1O’cm2,,p2= 5 10’7cm2.101 102 10 10 iO92EEL)z0U0106FREQUENCY [Hz]Figure 5.51: Drain conductancevs. frequency at 325 K and 375 K.Results of the present model (solidline)are superimposed on experimentaldata (circles and asterisks)after Canfield et. a] [41. Parameters used:NEL2 =5 x 1016cm3,NA = 5X lO’5cm3,1Idg= 1 = ljITfl, VDs 3V, VDsT1.6V.In conclusion, physically basedmodel of the frequency-dependentdrain conductance has beendeveloped. It allows anexamination of the impact ofdevice geometry and substrateproperties,particularly the presenceof multiple traps, on GaAs MESFETcharacteristics. The modelreflectsmajor trends in the output admittance,namely: low-frequencydependence, temperature dependence,negligible phase variation,dependence on drain voltages.Being analytical, it should beuseful forcircuit simulations.5.4 SummaryThe small-signal outputconductance of GaAsMESFETs on SI substrates isknown to exhibit2.5100 101 102 10 10 10593frequency dependence. So farthis phenomenon has been modeledusing equivalent circuits andnumerical techniques. In contrast,we propose an analytical physically-based model.The modelaccounts for alteration of the thicknessof the conductive channel through the channel-substratejunction modulation by the drain voltage.Because of the presence of deep levels theAC potentialdistribution across the SI materialbetween drain and source will be frequencydependent, and,consequently, will result in adifferent AC voltage drop across the channel-substrateinterface atdifferent frequencies. This willresult in a change of the output conductancewith frequency.A closed fonn for the AC potential distributionacross the SI material was obtained bysolvingthe continuity equations for holes andelectrons plus Poisson’s equation under conditionsof low-levelinjection and low frequencies withoutsome commonly used assumptions, such aslocal space-chargeneutrality, neglect of recombination,and diffusion or drift componentof the current. The solution forthe AC potential distributionis affected by the density and locationof deep levels in the SI substrate,and can be easily extended tothe general case of non-interactingmultiple traps. Thus, the modelprovides a tool for investigating theeffect of trap parameters on thefrequency characteristics. Itreproduces experimentally observedand numerically simulated results for theoutput conductance.Being analytical, the expressionfor the frequency-dependent outputconductance is suitable forincorporation in circuit simulators.94Chapter 6ConclusionsThe majority of text bookson semiconductor devices are based on the researchspanning thelast four decades on silicon. Manyconcepts developed for and commonly usedin the silicon devicetheory, such as space charge neutrality,neglect of recombination in short structures etc.are entirelymisleading when dealing with GaAs deviceson SI substrates. This is due to the fact thattrap densitiesin SI GaAs are much higher thanin Si, while carrier lifetimes are much shorter.Examining eqn.(3.34) leads to the conclusion, that undernon-equilibrium conditions space chargeneutrality in SIGaAs is rather an exception thana rule, and occurs only when theconcentrations of excess trappedholes and electrons are equal. VanRoosbroeck , who introduced the conceptof ambipolar transportto the semiconductor theory [113], based on local quasi-neutralityof the excess free carriers, wasthe one (with Casey),who classified some of the materials as relaxationsemiconductors, in whichseparation of the excess freeelectrons and holes is establishedthrough zero local recombination[95]. In addition, ambipolarapproach omits from the analysis thePoisson’s equation [1141. Thisomission is not justifiedfor SI GaAs, in which the excesstrapped carrier densities are much higherthan the excess free carrierdensities. The ambipolar approachis commonly used in analysis ofsilicon devices [114]. Incomparison to silicon SI GaAshas much higher resistivity and much shorterlifetimes. The clues for differenttreatment of such materials werediscussed by McKelvey [1151.But since at the time thesematerials were not a part of themainstream research effort, many of theconclusions regardingthem have been overlooked. Oneof the main conclusions of my work is thatmany concepts developedfor Si should be reexaminedwhen talking about the GaAs technology.The borrowing of concepts fromSi technology may lead to severeerrors in understanding GaAsdevices on SI substrates.In Chapter 1 the use of MESFETas a tool for investigatingof the interaction with the SIsubstrate of more complicateddevices was suggested. It is interestingto note that the gate,whichwas identified as one of themain players in the sidegating effectin MESFETs [43], wasalso foundto play a major rolein the sidegating effect in HEMTs[116]. Sidegating remains the majorobstacle95to fabrication of high density GaAs integratedcircuits [5]. This work contributes to understandingand modeling of this problem by:1. Identification of hole injection from the gate asone of the possible sources of sidegating. Thehole injection from the portion of the gate on a SI substratewas shown numerically by Goto et at.[83] and experimentally by Liu et at. [58] toplay an important role in sidegating. Our resultsshow the possibility of hole injection from the gate on a doped channeland also provide a newinterpretation of the results in Refs. [83] and [58], namely, appearanceof hysteresis as a resultof a strong hole injection into theSI substrate and the effect of weak hole injection on sidegating.2. Identification of the role of recombinationprocesses and, consequently, recombination centers(that are different from EL2)in sidegating.3. Application of the analysisof low-level injection reported first by Manifacier and Henisch[41]to sidegating problem. Low-levelanalysis has not been applied before to sidegating,since it isusually assumed that “nothing happens”under these conditions because the carrier transportisdominated by ohmic conduction. This workshows that even though the I-V characteristics maybe nearly ohmic, many physicalprocesses may occur under conditionsof low-level injectionresulting in such effects as non-linear voltagedistribution across a SI substrate. The processesleading to such behavior have been discussedin this work. The resultant non-linear potentialprofiles were used to explain sidegating atlow sidegate voltages and long range sidegating.4. Providing close form expressionsfor the potential distribution across a SI GaAs substrateandthe output admittance of GaAsMESFETs on SI substrates, which shouldbe useful in circuitsimulations.5. Extension of the low-levelinjection analysis to the frequency-domain.6. Application of the aboveanalysis to modeling the frequency dependenceof the output impedance.7. Investigation of sidegatingin the frequency domain (ACsidegating). It was shown that a strongsidegating effect may exist due to inherentproperties of SI GaAs. While it was shownthat holeinjection plays an important role in the DCsidegating effect, the sidegating effectin the kllzMHz range does not depend on hole injectionand does not require specific biasingconditions[105]. This effect will have mostimpact on wide-band circuits used in analogand mixed analog-96digital systems. The analysis of sidegatingin the frequency domain can also be used as a toolfor separating various processes occurringat the same time in sidegating effect, since they areexpected to have different frequencyresponses.The results presented in Chapters 3—5indicate that device characteristics dependstrongly on thesubstrate properties which,in turn, are determined by trap parameters.Under non-equilibriumconditions even shallow traps mayaffect the device characteristics. Thusdifferent combinationsof multiple trap parameters will resultin different device behavior [117]. Evenif the propertiesof the as-grown substrate are completelycontrolled, additional traps may be induced byprocessingsteps. Despite the difficulties in obtainingreproducible performance for devices onSI substrates, thecontinuation of this workis necessary because there will be always demandfor GaAs technology,particularly in optoelectroniccircuits [118]. The problems may not be solved,but understood, and,consequently, predicted (=modeled)and controlled. It is possible thatinnovative circuit techniqueswill contribute to this. Futurework may include:1. Measurements of and modelingthe hole injection from the gateof a GaAs MESFET. This meansmore studies towards understandingof the nature of Schottky contacts onGaAs, particularly theeffect of a Schottky contactarea on hole injection.2. Incorporation of the resultsof Chapter 4 in investigating crosstalkin GaAs integrated circuits.3. In Chapter 1 sidegatingwas presented as a three-dimensionaleffect. Therefore, the extensionof the existing one-dimensionalanalysis to two and threedimensions by numerical techniquesshould provide more insightinto sidegating.4. Extension of the low-levelinjection analysis into the timedomain.5. Extracting the trapparameters from the ACmeasurements of the conductivityof a SI GaAssubstrate.6. Identification and characterizationof recombination centers,which is according to mywork asimportant as an investigationof EL2.7. Sidegating isknown to be a temperature-dependenteffect [119], and, therefore,the resultspresented here should beanalyzed as a function oftemperature.978. In this work the effectof deep levels in the SI substrate on the drain conductancewas investigated.Their effect on the transconductance,which is known to degrade under high frequency operation[120], should be investigated.9. Implementationof the analytical model of the drain admittancein SPICE (circuit simulator).10. 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Cheshire, Shiva.105Appendix A Potentialdistribution in the uniformchannelThe solution of (2.16) isgiven by:v(x) = C + De + B/A,(A.72)where p = ,/rCh8[]W(C + c8) +ys],A = [jW(Cjs + c3) + ysjTchs ,B(jwc3+ Ys)TchsVsgand C,D are constants to be determinedby the boundary conditions.The current in the channel isgivenby:i(x) = —[1/rh3(Ov/ôx)j.106Appendix B Potential distribution in the exponentially tapered channelAssuming wc3(x)>> wc3,and o = j3, eqn (2.15) transforms into:Ov— — JWTchoCjoV = TchoC(JWCs + ys)vsg.(B.73)The solution is given by:v(x) = (jwc3+y3)evsg/jwcj0+Ee[(/2)x]+(B.74)where E and F are constants to be determined by the boundaryconditions. The current in the channelis given by: i(x) = —(1/rh0e)(Ov/Ox).107


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