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On the design of high-performance mm-wave CMOS VCOs

University of British Columbia

The increasing demand for higher data rates in wireless communication such as IEEE 802.15.3c wireless personal area networks (WPANs), wireless local area networks (WLANs), and next generation wireless systems, have made the development of radio-frequency (RF) and millimeter-wave (mm-wave) frequency integrated circuits (ICs) that operate in few tens of gigahertz more popular. In the context of high data rate wireless systems, the 5th generation (5G) of wireless systems is expanding its operation frequency to millimeter wave (mm-wave) bands where more signal bandwidth are available. To implement such circuits, the preferred technology is CMOS (complementary metal-oxide semiconductor) since compared to other technologies, it offers lower supply voltage, lower cost, higher levels of integration, and potentially lower power. Many CMOS solutions for RF and mm-wave applications have been proposed over the past few years and thanks to continuous reductions in feature size of CMOS devices into deep-submicron range, many efficient and high performance state-of-the-art RF and mm-wave receivers have been reported. However, efficient system integration at mm-wave frequencies in CMOS is still a challenging task. Voltage-controlled oscillators (VCOs) are indispensable in the operations of fully integrated transceiver architectures. In many cases, quadrature local oscillator (LO) signals are required for frequency conversion. Major challenges in particular in portable applications include the generation of such quadrature phase outputs with low power consumption. This also applies to emerging mm-wave applications, where one would like to achieve a wide tuning range while maintaining low-power consumption and low phase noise. In this work, we investigate several design techniques for achieving a high performance wireless receiver building block with a specific focus on LC-based VCOs. Based on the measurement results, one of the VCOs achieves an average PN of −111.9 dBc/Hz at 10 MHz offset over the entire frequency tuning range, and a TR of ~18%, from 50.1 to 59.8 GHz, resulting in a figure of merit incorporating the tuning range (FOMT) of –184 dBc/Hz. The VCO core consumes 6.2 mW from a 1-V supply and excluding the pads occupies a compact silicon area of 0.06 mm2.

Text

2019-09-01

Attribution-NonCommercial-NoDerivatives 4.0 International

http://hdl.handle.net/2429/66871

Electrical and Computer Engineering

University of British Columbia

UBCV

http://creativecommons.org/licenses/by-nc-nd/4.0/