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Iterative synthesis of a flat-staggered emitter-feedback transistor video amplifier

University of British Columbia

Bruun and Grinich have previously described video amplifier designs using resistance-capacitance feedback in the emitter lead for stages in the common-emitter configuration. Diffusion-type alloy-junction transistors which are well described by the Johnson-Giacoletto hybrid-π equivalent circuit, were used in both cases. The amplifier cascades described by Grinich produced Butterworth-type responses through use of pole-zero cancellation. The research reported here is concerned with an alternative design method using an iterative numerical procedure to obtain broadband amplifier cascades without the use of pole-zero cancellation. In addition, the method is sufficiently general to include both drift- and diffusion-type alloy-junction transistors. Equivalent circuits of the Johnson-Giacoletto hybrid-π type are reviewed and modifications necessary to treat emitter feedback amplifiers using the newer types of high-frequency transistors are developed. Transfer functions for stages and cascades of stages using either drift- or diffusion-types of transistors in the common-emitter configuration with emitter feedback are given. Special attention is given to the property of this type of amplifier that the zeros and poles of the transfer function are interdependent. Suitable parameters for defining this dependence are developed, and the problem of synthesizing for flat amplitude response, in spite of this dependence, is described. A numerical iterative method of solution is proposed. A numerical example of a three-stage amplifier design using a 2N384 p-n-p drift transistor for maximally-flat amplitude response with a passband from 40 cps to 6.5 Mc is given. The design is compared with an equivalent amplifier of the Butter-worth type obtained by the Grinich method. It is shown that an optimum interstage resistance giving maximum dc amplification exists when using this iterative method, but that there is no true optimum for Grinich designs. The theoretical designs obtained by the iterative method give an amplification of 49.6 db, 7.6 db greater than by the Grinich method for the particular value of interstage resistance used (300Ω). Phase linearity, delay, and step-response overshoot are comparable for the two designs. The numerical method shows good convergence properties, except when designing for very small or very large bandwidths, or for very small dc emitter currents or interstage resistances. An amplifier built according to the theoretical design, but fitted with an input impedance-matching pad and an output emitter-follower pair for connection to a 50-Ω line, is described. Test results indicate that the design values obtained using the modified Johnson-Giacoletto hybrid-π equivalent circuit and the iterative method are sufficiently accurate for construction purposes and that very little adjustment is necessary. Suggestions for further development of the method are given.

Text

2011-12-09

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http://hdl.handle.net/2429/39615

Electrical and Computer Engineering

University of British Columbia

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