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The design, simulation and fabrication of a gallium arsenide monolithic sample and hold circuit

University of British Columbia

This thesis describes work done towards the development of a gallium arsenide monolithic sample-and-hold circuit. The literature relevant to high-speed electronic sampling is reviewed, and the different types of highspeed sampling circuits are discussed. The requirements of a sampling circuit for use in a distributed sampling amplifier are analyzed, and it is found that the most important requirement is a high input impedance. A circuit suitable for monolithic integration is designed and analyzed using the computer program mwSPICE. The different fabrication technologies for gallium arsenide integrated circuits are discussed, with emphasis on the self-aligned gate technologies, which can give reduced parasitic source and drain resistances. The processing steps for the refractory metal self-aligned gate technology developed for this thesis at the University of British Columbia are given in detail. DC measurement procedures for MESFETs and Schottky diodes are given and results are presented for self-aligned gate MESFETs fabricated at UBC. These results indicate that the refractory metal self-aligned gate process developed at UBC should be suitable for the fabrication of the monolithic sample-and-hold circuit.

Text

2010-07-10

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http://hdl.handle.net/2429/26285

Electrical and Computer Engineering

University of British Columbia

Graduate