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Semi-insulating gallium arsenide-deep trapping levels, dislocations and backgating Tang, Wade Wai Chung


Work is reported on three topics relating to problems which hold back the development of GaAs integrated circuits. These topics are deep trapping levels in the starting semi-insulating GaAs, the effect of dislocations on device characteristics, and backgating. (The latter is the influence of voltages on nearby contacts on device performance). Deep trapping levels in undoped semi-insulating liquid-encapsulated— Czochralskl GaAs grown in the <100> direction were characterized using photocurrent deep level transient spectroscopy (photocurrent-DLTS). Three electron levels were found using photocurrent-DLTS in the temperature range 200K to 400K. By using Cr electrodes, instead of Au-Ge electrodes, it became possible to extend the experiment to a higher temperature range than previously used in this laboratory, and hence to observe the trap known as EL2. This trap has not previously been observed in undoped liquid-encapsulated-Czochralski GaAs by using photocurrent-DLTS. The possibility of an effect of dislocations on device characteristics was investigated using a dislocation etch procedure and measurements on an array of MESFET. Due to problems in controlling the fabrication processes, the scatter was such that no correlation between device characteristics and the distance to nearest dislocation would be established. However, scatter of threshold voltage was larger for devices fabricated on areas of honeycomb-like dislocations network as opposed to areas with unconnected wavy lines of dislocation. Backgating (which causes unwanted communication between devices) was investigated in conjunction with substrate conduction measurement. A model was proposed for the effect as present in the devices used in this experiment.

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