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Abstract

Recently, the interest in analog and mixed-signal IC test has been raised dramatically. The development of high speed and high performance analog/mixed-signal circuits embedded in a single chip with their digital peer keeps posing new challenges to VLSI test engineers. Built-in self-test (BIST) schemes have been recognized as capable of bringing improvements to analog and mixed-signal circuits testing. The power supply current monitoring as a structural testing methodology, which is applicable to both digital and analog/mixed-signal circuits testing, has recently been attracting more attention from both academia and industry. In this thesis, the power supply monitoring of analog and mixed-signal circuits testing is reviewed. A BIST scheme is presented for power supply rms current testing. A new built-in rms-to-dc converter is proposed. The RMS-to-DC computation is carried out in the current domain. The system generates a digital signature proportional to the RMS value of the supply current. The digital signature is critical for an effective on-chip decision. A new MOS current squarer/divider circuit required in the converter is also proposed and implemented in a standard 0.18 μm CMOS technology. Silicon measurement results illustrate that the total harmonic distortion is less than 1.1%. The RMS-to-DC converter has been implemented in the standard 0.35 μm CMOS technology. The total on-chip capacitance is only 74 pF. The effectiveness of the RMS-to-DC converter has been verified by simulation. The simulated relative error of the RMS-to-DC converter is less than 1% with a 100 KHz sinusoidal input signal. This circuit is suitable for BIST applications on analog and mixed-signal ICs.