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Embedded linearity test for ADCs Zhao, Zhurang

Abstract

Recent years have seen an unparalleled growth in the speed and complexity of VLSI circuits. Analog and mixed-signal circuits are going through a resurgence and continue to pose new challenges to VLSI test engineers. Analog-to-digital converters (ADCs) are one of the most frequently used mixed-signal circuits. ADCs are precision products and their test usually requires high quality test equipment. With the advances of ADCs, the required test equipment is becoming increasingly expensive. In this thesis, the linearity test problem of ADCs is approached with a built-in self-test (BIST) perspective. A novel embedded servo loop is proposed for testing the differential nonlinearity (DNL) and integral nonlinearity (INL) of ADCs. An integrator whose integration time is precisely controlled by a delay line is the key part of the servo loop circuitry. The analog part of the servo loop is very simple and does not need calibration while the digital part can be synthesized from a hardware description language (HDL). The servo loop does not alter the architecture and operation of the ADC under test and can be used to test any kind of ADC. The servo loop occupies a small area and is suitable for BIST application. The measurement results for DNL and INL are transformed into a digital representation, and the measurement resolution and error are determined by the delay of standard digital gates. Simulation results are reported for a embedded servo loop implemented in 0.35um CMOS technology.

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