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Real-time computer vision in software using custom vector overlays Edwards, Joseph James
Abstract
Real-time computer vision places stringent performance requirements on embedded systems. Often, dedicated hardware is required. This is undesirable as hardware development is time-consuming, requires extensive skill, and can be difficult to debug. This thesis presents three case studies of accelerating computer vision algorithms using a software-driven approach, where only the innermost computation is performed with dedicated hardware. As a baseline, the algorithms are initially run on a scalar host processor. Next, the software is sped up using an existing vector overlay implemented in the FPGA fabric, manually rewriting the code to use vectors. Finally, the overlay is customized to accelerate the critical inner loops by adding hardware-assisted custom vector instructions. Collectively, the custom instructions require very few lines of RTL code compared to what would be needed to implement the entire algorithm in dedicated hardware. This keeps design complexity low and yields a significant performance boost. For example, in one system, we measured a performance advantage of 2.4× to 3.5× over previous state-of-the-art dedicated hardware systems while using far less custom hardware
Item Metadata
Title |
Real-time computer vision in software using custom vector overlays
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Creator | |
Publisher |
University of British Columbia
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Date Issued |
2018
|
Description |
Real-time computer vision places stringent performance requirements on embedded
systems. Often, dedicated hardware is required. This is undesirable as hardware
development is time-consuming, requires extensive skill, and can be difficult
to debug. This thesis presents three case studies of accelerating computer vision algorithms
using a software-driven approach, where only the innermost computation
is performed with dedicated hardware. As a baseline, the algorithms are initially
run on a scalar host processor. Next, the software is sped up using an existing vector
overlay implemented in the FPGA fabric, manually rewriting the code to use
vectors. Finally, the overlay is customized to accelerate the critical inner loops by
adding hardware-assisted custom vector instructions. Collectively, the custom instructions
require very few lines of RTL code compared to what would be needed
to implement the entire algorithm in dedicated hardware.
This keeps design complexity low and yields a significant performance boost.
For example, in one system, we measured a performance advantage of 2.4× to
3.5× over previous state-of-the-art dedicated hardware systems while using far
less custom hardware
|
Genre | |
Type | |
Language |
eng
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Date Available |
2018-08-07
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Provider |
Vancouver : University of British Columbia Library
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Rights |
Attribution-NonCommercial-NoDerivatives 4.0 International
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DOI |
10.14288/1.0369726
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URI | |
Degree | |
Program | |
Affiliation | |
Degree Grantor |
University of British Columbia
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Graduation Date |
2018-09
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Campus | |
Scholarly Level |
Graduate
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Rights URI | |
Aggregated Source Repository |
DSpace
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Rights
Attribution-NonCommercial-NoDerivatives 4.0 International