@prefix vivo: . @prefix edm: . @prefix ns0: . @prefix dcterms: . @prefix dc: . @prefix skos: . vivo:departmentOrSchool "Applied Science, Faculty of"@en, "Electrical and Computer Engineering, Department of"@en ; edm:dataProvider "DSpace"@en ; ns0:degreeCampus "UBCV"@en ; dcterms:creator "Williams, Christopher A."@en ; dcterms:issued "2009-03-06T00:00:00"@en, "1994"@en ; vivo:relatedDegree "Master of Applied Science - MASc"@en ; ns0:degreeGrantor "University of British Columbia"@en ; dcterms:description """This thesis investigates the performance in the presence of CCI and multipath fading of three symbol timing recovery schemes, maximum likelihood (ML) non-data aided (NDA) and data-aided (DA) tracking loops, and a ML block symbol synchronizer, for QPSK, π/4—shift DQPSK, and 16—QAM modulation schemes. In the first part of the thesis, analysis of the three symbol synchronizers in a combined AWGN and CCI environment is performed, based on a linear assumption for small jitter, and expressions for RMS symbol timing jitter are presented for each technique, assuming Nyquist pulse shaping. Computer simulations are also performed in order to validate the results and provide bit-error rate (BER) performance of each synchronizer. CCI was found to be the chief limit on symbol timing jitter performance at high signal-to-noise ratios (SNR) for all three synchronizers. Simulations matched theory in most cases, except where the linear assumption is no longer valid. Simulation showed that for carrier-to-interference (C/I) ratios of ≥ 10 dB, CCI effects on symbol timing recovery result in negligible BER degradation over ideal sampling. The second part of the thesis investigates the three symbol synchronizers in a fading environment. Irreducable BER and RMS timing jitter estimates were made by computer simulation using π/4—shift DQPSK modulation in frequency non-selective Rayleigh and Ricean fading, as well as in frequency selective fading. Rayleigh fading had little effect on symbol timing jitter at high SNR unless the fading was extremely fast, that is where the fading bandwidth (B[sub F]) times the information symbol duration (T) product is relatively high (i.e. Β[sub F]Τ>0.1), and had no noticeable effect on irreducable BER for the range simulated. In frequency selective fading with a two-ray model, the synchronizers were observed to track the optimum sampling instant well at high SNR, for delay spreads of the two-ray model used of τ[sub d] < 0.2T. For more severe fading (i.e. τ[sub d]> 0.2T), the ML block synchronizer performed best, tracking the optimum sampling instant with no increase in the irreducable BER until τ[sub d] = T/2. The ML NDA technique was found to be the worst performer for frequency selective multipath fading, with double the irreducable BER in the worst case simulated."""@en ; edm:aggregatedCHO "https://circle.library.ubc.ca/rest/handle/2429/5609?expand=metadata"@en ; dcterms:extent "3179326 bytes"@en ; dc:format "application/pdf"@en ; skos:note "ANALYSIS AND EVALUATION OF THREE SYMBOLTIMING RECOVERY TECHNIQUES FOR DIGITALWIRELESS PERSONAL COMMUNICATION SYSTEMSbyCHRISTOPHER A. WILLIAMSB. A. Sc. (Hons.), The University of Waterloo, 1991A THESIS SUBMITTED IN PARTIAL FULFILLMENT OFTHE REQUIREMENTS FOR THE DEGREE OFMASTER OF APPLIED SCIENCEinTHE FACULTY OF GRADUATE STUDIESDepartment of Electrical EngineeringWe accept this thesis as conformingto the. equired standardThE UNIVERSITY OF BRITISH COLUMBIAJuly 1994© Christopher A. Williams, 1994Signature(s) removed to protect privacyIn presenting this thesis in partial fulfilment of the requirements for an advanceddegree at the University of British Columbia, I agree that the Library shall make itfreely available for reference and study. I further agree that permission for extensivecopying of this thesis for scholarly purposes may be granted by the head of mydepartment or by his or her representatives. It is understood that copying orpublication of this thesis for financial gain shall not be allowed without my writtenpermission.(Signature)___________________________Electrical EngineeringDepartment of_________________The University of British ColumbiaVancouver, CanadaJuly 22, 1994Date_____________ ____ ___DE-6 (2)88)Signature(s) removed to protect privacySignature(s) removed to protect privacyAbstractAbstractThis thesis investigates the performance in the presence of CCI and multipath fading ofthree symbol timing recovery schemes, maximum likelihood (ML) non-data aided (NDA) anddata-aided (DA) tracking loops, and a ML block symbol synchronizer, for QPSK, it/4—shiftDQPSK, and 16—QAM modulation schemes.In the first part of the thesis, analysis of the three symbol synchronizers in a combinedAWGN and CCI environment is performed, based on a linear assumption for small jitter, andexpressions for RMS symbol timing jitter are presented for each technique, assuming Nyquistpulse shaping. Computer simulations are also performed in order to validate the results and provide bit-error rate (BER) performance of each synchronizer. CCI was found to be the chief limit onsymbol timing jitter performance at high signal-to-noise ratios (SNR) for all three synchronizers.Simulations matched theory in most cases, except where the linear assumption is no longer valid.Simulation showed that for carrier-to-interference (C/I) ratios of 10 dB, CCI effects on symboltiming recovery result in negligible BER degradation over ideal sampling.The second part of the thesis investigates the three symbol synchronizers in a fading environment. Irreducahie BER and RMS timing jitter estimates were made by computer simulationusing it/4—shift DQPSK modulation in frequency non-selective Rayleigh and Ricean fading, aswell as in frequency selective fading. Rayleigh fading had little effect on symbol timing jitter athigh SNR unless the fading was extremely fast, that is where the fading bandwidth (BF) times theinformation symbol duration (T) product is relatively high (i.e. BT>O. 1), and had no noticeableeffect on irreducable BER for the range simulated. In frequency selective fading with a two-raymodel, the synchronizers were observed to track the optimum sampling instant well at high SNR,LiAbsracifor delay spreads of the two-ray model used of td < 0.21 For more severe fading (i.e. td> 0.27),the Ml. block synchronizer performed best, tracking the optimum sampling instant with noincrease in the irreducahie BER until td = T/2. The Ml. NDA technique was found to be the worstperformer for frequency selective multipath fading, with double the irreducable BER in the worstcase simulated.U’Table of ContentsAbstract .1Table of Contents ivList of Tables viiiList of Figures &Acknowledgments xiii1 introduction 11 .1 Modulation Schemes 21.2 Wireless Personal Telecommunication Channels 31.2.1 Co-Channel Interference (CCI) 31.2.2 Multipath Fading 41.3 Symbol Timing Recovery Techniques 71.3.1 Measures of Symbol Timing Recovery Performance 81.3.2 Symbol Timing Estimation Techniques 81 .3.3 Timing Recovery in Wireless Communication Channels 91.4 Thesis Research Objectives 101 .5 Organization of Thesis 112 Symbol Synchronization Principles 142.1 Introduction 142.2 The Symbol Timing Recovery Process 152.2.1 Cyclostationary Processes in Timing Recovery 152.2.2 Symbol Timing Jitter in Symbol Synchronization 16iv2.2.3 Effects of Symbol Timing Jitter on Receiver BER Performance 172.3 Maximum Likelihood Estimation 182.3.1 ML Non-Data Aided Estimation 192.3.2 ML Data Aided Estimation 202.3.3 ML Block Estimation 212.4 Analysis of Symbol Synchronization Techniques 232.4.1 Phase-Lock Loop Theory for the NDA Implementation 232.4.2 Phase-Lock Loop Theory for the DA Implementation 272.4.3 Symbol Block Synchronizers 292.5 Summary 313 Symbol Synchronization Analysis in CCI Channels 323.1 Introduction 323.2 System Model 333.2.1 Transmitter Model 333.2.2 Receiver Structure 343.2.3 Co-Channel Interference Model 353.3 Analysis of the ML Non-Data Aided (NDA) Synchronizer 373.4 Analysis of Data Aided Synchronizers 433.4.1 Maximum Likelihood Data Aided Synchronizer 433.4.2 Modified Maximum Likelihood DA Synchronizer Analysis 453.4.3 Results of ML and MML DA Jitter Performance Analysis 473.5 Analysis of the ML Block Synchronizer 493.6 Summary 524 Computer Simulation of Symbol Synchronization in CCI 54V4.1 Introduction .544.2 Computer Simulation System Description 544.2.1 Description of the ML NDA and DA Tracking Loop Simulations 564.2.2 Description of the ML Block Simulations 594.3 ML NDA Synchronizer Simulation Results 594.4 ML DA Simulation Results 664.5 ML Block Synchronizer Simulation Results 724.6 Summary 755 Symbol Synchronization in Multipath Fast Fading Channels 785.1 Introduction 785.2 Fading Models 805.2.1 Frequency Non-Selective (Flat) Fading Model Description.... 805.2.2 Frequency Selective Fading Model Description 825.3 Simulation Results and Discussion 835.3.1 Fast Frequency Non-Selective Fading 835.3.2 Fast Frequency Selective Fading 895.4 Summary 956 Conclusions and Suggestions for Further Research 976.1 Conclusions 976.2 Suggestions for Further Research 1016.2.1 Effects of CCI and multipath fading on tracking loop acquisition timeand cycle slipping 1016.2.2 Performance of fast acquisition digital tracking loops in fading andCCI 102vicE6.2.3 Effects of slow fading on system performance. 102Bibliography 103Appendix A: Derivation of ML NDA Synchronizer Timing Jitter in CCI.. 109Appendix B: Simulation Error in Timing Jitter Measurements 113vuList of TablesTable 1: Effect of symbol synchronization error on BER performancecompared to SNR for ideal timing, for coherently demodulatedBPSK (from [10]) 17Table 2: Effect of sampling rate on minimum possible jitter at high SNR(no noise 51Table 3: Simulation Error vs. excess bandwidth c, ML NDAsynchronization with QPSK modulation, C/I= 10 dB,2BLT=0.0065, and no noise 65Table 4: Simulation Error vs. excess bandwidth, ML DAsynchronization, for QPSK modulation, C/I= 10 dB,,2BLT=0.008, and no noise 71Table B.1: Simulation error in estimating normalized RMS Timing Jitter,128 samples per symbol 115VII’List of FiguresFigure 1: Signal constellations for modulation schemes under consideration. (a)QPSK, (b) it/4—shift DQPSK, (c) 1 6—QAM 2Figure 2: lS-54 TDMA half-rate frame structure (from [6]) 3Figure 3: A typical channel power delay spread profile for an urban environment . 6Figure 4: ML non-data aided symbol timing tracking loop [31] 19Figure 5: Data-aided symbol timing tracking loop. (DD) is decision device, (SPC)is parallel-to-serial converter for output data sequence, (NCC) isnumber controlled counter [31] 21Figure 6: Block diagram of ML block synchronization scheme 22Figure 7: Comparison of signal constellation for ML block synchronization using(a) symbol constellation, and (b) differential symbol constellation,for iv /4—shift DQPSK signalling 23Figure 8: A general symbol synchronizer as a PLL. F(f) is a loop filter, and VCCis a Voltage Controlled Clock 24Figure 9: Illustration of timing wave variance for (a) wide-sense stationary and (b)wide-sense CS inputs to the filter-square-filter ML NDAsynchronizer. 0 represents a possible bias in the estimationprocess 26Figure 10: Block diagram of the baseband system model. (a) Transmitter, (b)Channel, (c) Receiver 33ixFigure 11: ML NDA QPSK Synchronizer: Normalized RMS timing jitter vs. SNR,2BL=1 /1 00, and Butterworth G(f) with 11(107) bandwidth 41Figure 12: ML NDA Synchronizer for QPSK: Normalized RMS timing jitter vs.excess bandwidth a, SNR = 15 dB 42Figure 13: DA ML and MML Synchronizers for QPSK: Normalized RMS timingjitter vs. SNR, 2BLT=l/l00, a=0.35 48Figure 14: ML and MML DA Synchronizers for QPSK: Normalized RMS timingjitter vs. excess bandwidth a, for 2BLT=1I100, and no noise 49Figure 15: DA block synchronizer performance for QPSK: Normalized RMS timingjitter vs. SNR for a=0.35 and 16 samples/symbol 52Figure 16: Block diagram of model for computer simulation 55Figure 17: Typical sampling time error during acquisition for two simulations: MLDA QPSK synchronization with no noise, and SNR = 0 dB 57Figure 18: Simulation results for ML NDA QPSK scheme: Normalized RMStiming jitter vs. SNR, 2BLT=0.0065, a=0.35, and 128 samples?symbol 62Figure 19: Simulation results for ML NDA it/4—shift DQPSK scheme: NormalizedRMS timing jitter vs. SNR, 2BLT=0.0065, a=0.35, and 128samples/symbol 63Figure 20: Simulation results for ML NDA 16—QAM scheme: Normalized RMStiming jitter vs. SNR, 2BLT=0.0065, cz=0.35, and 128 samples?symbol 64Figure 21: Simulation results for ML DA QPSK scheme: Normalized RMS timingjitter vs. SNR, 2BLT=O.008, a=0.35, and 128 samples/symbol. 68xFigure 22: Simulation results for ML DA ir/4—shift DQPSK scheme: NormalizedRMS timing jitter vs. SNR, 2BLT=0.008, a=0.35, and 128samples/symbol 69Figure 23: Simulation results for ML DA 1 6—QAM scheme: Normalized RMStiming jitter vs. SNR, 2BLT=0.008, cz=0.35, and 128 samples!symbol 70Figure 24: ML Differential Symbol Block Synchronizer for ir/4—shift DQPSK:Comparison of 32 and 64 block length synchronizers in CCI,a=O.35, and 16 samples per symbol 73Figure 25: Bit error rate performance for block synchronizer and irI4—shift DQPSKmodulation scheme, a=O.35 and 16 samples/symbol 74Figure 26: Block diagram of fading process generation for simulation 81Figure 27: Block diagram of generation of a frequency-selective faded signal forsimulation 83Figure 28: Symbol timing recovery performance in frequency non-selectiveRayleigh and Ricean fading for the 3 synchronization schemes, nonoise 86Figure 29: Irreduciblelrreducible BER for fast flat fading channel, no noise 88Figure 30: Irreducible BER vs. sampling time offset from T!2 sampling instants forit/4—shift DQPSK with 2—ray frequency selective Rayleigh fadingmodel, with BFT=0.065 90Figure 31: Irreducible BER for 3 synchronizers in a frequency selective fast fadingchannel (-10 dB and -3 dB rays), including the BER for T!2sampling and for optimal sampling 92xiFigure 32: Irreducible BER for 3 synchronizers in a frequency selective fast fadingchannel (-10 dB and 0 dB rays), including the BER for T/2sampling and for optimal sampling 93Figure 33: Tracking performance of ML block synchronizer for Ic /4—shift DQPSKmodulation, without interference, and with frequency selectivefading 94Figure B. 1: Probability density function f(c), of timing jitter, with sampling instantsmarked 113XIIAcknowledgmentsI thank my parents Raymond and Beverly for their encouragement and continuous supportof all my endeavors, academic or otherwise. I would like to thank Dr. P. T. Mathiopoulos for hissuggestion of thesis topic, and for his valuable experience and guidance, without which this thesiscould not have been completed. I would also like to thank D. R Bouras for his helpful suggestions,as well as his contribution of much of the simulation code used in this thesis. Finally, I would liketo acknowledge the financial assistance provided by the Natural Sciences and EngineeringResearch Council (NSERC) of Canada, the Advanced Systems Institute (ASI) of British Columbia, and the University of British Columbia Faculty of Graduate Studies.xliiChapter 1: introduction1 IntroductionIn recent years there has been a dramatic increase in commercial interest toward digitalwireless personal telecommunication systems [1]. Interest has been generated by the promise ofmaking communication truly personal, in that users could communicate with anyone, virtuallyanywhere on the globe. Although complete integrated world coverage is not yet a reality, manysystems are currently in use or under development to provide wireless transmission of voice anddata for the personal user. Examples of such systems include pagers, cellular and cordless telephones [2], [3], cellular digital packet data (CDPD) [4], and indoor personal communication systems (PCS) [1].Virtually all these examples are now utilizing digital transmission technology. Digital networks are popular because of the increased capacity over analog systems, and the cheaper, smaller,and more power efficient receivers which may be used [31. However, digital transmission of signals adds a number of new complexities to system design. One such issue is that of symbol limingrecovery -- synchronizing the phase of the receiver’s symbol-rate clock with the received signal sothat recovery of the transmitted symbols may be achieved.Symbol timing recovery has been well studied in the past for the additive white Gaussiannoise (AWGN) channel, see for example [71, [8], [9], [10], [Il]. However, for the wireless communication system designer, the most serious sources of system degradation come from multipathfading - due to scattering of signals on terrain features, and co-channel interference (CCI) - due tointerference from other users in a frequency re-use network. This thesis concerns itself with theeffects of CCI and multipath fading channels on symbol timing recovery performance.IChapter 1. Introduction1.1 Modulation SchemesTwo genera] classes of modulation schemes are frequently used in wireless telecommunication environments, namely linear (quadrature) modulation, and continuous phase modulation(CPM). The linear schemes, such as L-ary phase shift keying (L-PSK) and L-ary quadratureamplitude modulation (L-QAM), usually possess a non-constant signal envelope, while CPM is afamily of schemes which maintain a constant signal envelope. Both classes are currently in use inwireless telephony, the North American digital cellular standard (IS-54) uses itI4—shft differentialquadrature phase shift keying (,t/4—shift DQPSK) as its modulation scheme, while the GSM European digital cellular system has chosen Gaussian Minimum Shift Keying (GMSK) as its modulation scheme [5], [6]. This thesis concerns itself with popular variations of linear modulationtechniques, which are perhaps the most common for digital transmission of information. Specifically considered here are 4-phase shift keying (quadrature-PSK or QPSK and it/4—shift DQPSK),and quadrature amplitude modulation (16—QAM), whose signal constellations are shown in Figure• . .I•...•........• . . ..••.(a) (b) (c)Figure 1: Signal constellations for modulation schemes underconsideration. (a) QPSK, (b) itI4—shift DQPSK, (c) 1 6—QAMThese modulation techniques are often used in wireless telecommunication networks inconjunction with a time-division multiple access (TDMA) scheme. TDMA splits a time interval2Chapter 1: Introduction(frame) into several time-slots, with each user occupying one or several time-slots in each framefor transmission or reception of signals. An example is the North American digital cellular standard (IS-54) TDMA specification [6]. TDMA is superior to frequency division multiple access(FDMA) schemes in that it allows more efficient use of channel bandwidth for intermittent datatransfers and allows mobile transmitters to operate in only a fraction of the total frame length.However, FDMA allows simpler implementation since breaking the frame into time-slots calls formore stringent synchronization requirements in the network [13].Half-rate TDMA frameSlot 1 Slot 2 j Slot 3 Slot 4 Slot 5 Slot 6Time slot324 bits in 6.67rnsFigure 2: IS-54 TDMA half-rate frame structure (from [6]).1.2 Wireless Personal Telecommunication ChannelsThe mobile wireless environment introduces new challenges to the reliable transmissionof digital information which are not seen in wire-line or optical communications. Chief among thesources of interference are co-channel interference and multipath fading, both of which will examined in this thesis.1.2.1 Co-Channel Interference (CCI)With the increased popularity of digital cellular networks and current research into anddevelopment of PCS, there is great economic pressure to increase network caller capacity to allowmore users on the limited bandwidth allotted to commercial use [1], [2]. In frequency re-use net-3Chapter 1: Introductionworks, a hasestation is responsible for servicing all mobile users within its assigned transmissionregion, or cell. Each hasestation is allocated a sub-set of the entire bandwidth associated with thenetwork. Basestations in neighboring areas are assigned other sub-sets of the network bandwidth.The simplest way to increase capacity is to reuse the frequencies assigned to a particular geographical location in another nearby location. Interference due to the common use of a radio channel isknown as co-channel interference (CCI), and is a major concern in frequency re-use systems. CCIis becoming a more prominent problem for cellular networks as they increase capacity by subdividing cells and moving them physically closer together [3], which is necessary for today’s callvolumes in urban areas. Network designers must carefully balance the added capacity availablethrough frequency reuse with the increased signal degradation due to CCI.An important measure of the level of CCI is the ratio of carrier power to interferencepower on a channel, known as the carrier-to-interference ratio (CII ratio), given as [3]:MC/i = (L) (EQ. 1.1)j= 1where M is the number of transmitters nearby which are using the same frequency as the transmitter under consideration, D is the distance to the 1rh transmitter, and R is the radius of coverage ofeach transmitter, depending upon the radiated power. The exponent y, due to path-loss, is typicallyequal to 4 [3]. Most wireless networks have specifications as to acceptable levels of CCI, based ona trade-off between the network capacity required and the allowable system degradation.1.2.2 Multipath FadingSince personal communication devices rarely have a direct line-of-sight path to a basestation transmitter, especially in urban areas, signals are scattered by terrain features. If the receiver is4Chapter 1: Introductionmobile, this caii cause a serious degradation of system performance, known as multipath fading.Fading is a major concern in the transmission of information over wireless channels [31, [13].Multipath fading may he modelled as a multiplicative interference [14], [3]:r(r) = f(t)s(t) (Eq. 1.2)where s(t) and r(t) are the transmitted and received signals, andf(t) is the complex multiplicativefading function, which may he modelled as a complex Gaussian process [3]:f(t) = rexp (JO) (Eq. 1.3)where r is a random process with Rayleigh or Ricean distribution and 9 is a random process withuniform distribution over (-ic,t] [13]. Fading may also be viewed as a form of modulation appliedto the signal. The phase term results in ‘random frequency modulation’ or ‘random FM’ of the signal which causes errors irrespective of the presence of AWGN. Therefore, fading causes a minimum achievable error rate, or ‘error floor’ on system performance [14].Rayleigh and Ricean fading can be characterized by the one-sided bandwidth of the fadingprocessf(t), given by [3]:2Vf (Eq.1.4)BF =where V is the velocity of the receiver [m/s],f is the carrier frequency [Hz], and c is the propagation velocity of the electromagnetic signal [mis]. The BFT product, the ratio of the fading bandwidth, BF, to the transmitted symbol rate, l/7 is an important measure of the amount of fadingpresent, indicating whether it is ‘slow’ or ‘fast’ fading. The boundary between the two classifications is a loose one, but a rule of thumb states that slow fading results from BFT 0.1), the fading is considered frequency selective [13]. It earns its name from the fact that for large tdT, different fre6Chapter 1: Introductionquencies within the signal bandwidth suffer different fading effects. At any instant deep amplitudefades may occur at specific frequencies only, instead of over the entire signalling bandwidth aswith frequency non-selective, or flat fading [3].Both frequency selective and non-selective fading may be encountered by a mobile wireless transceiver. Because of this, both Ricean and Rayleigh land-mobile fast fading, including bothfrequency selective and non-selective situations will be considered in this thesis.1.3 Symbol Timing Recovery TechniquesThere are a number of synchronization problems in digital communications, including carrier, frame, and symbol timing synchronization. The latter, also known as bit or symbol timingrecovery (STR), is the problem of synchronizing a receiver clock’s rate and phase with thereceived baseband data symbol sequence. Correct receiver synchronization is necessary for properrecovery of the received data. Errors in symbol synchronization can affect most aspects of systemperformance, including equalization and echo cancellation [18], [19], as well as bit error rate(BER) performance [201.Some telecommunication systems transmit clock information on a separate channel or byinserting a pilot-tone at the clock frequency [211, similar to inserting a pilot tone at the carrier frequency for carrier recovery and tracking [13]. These methods are inefficient, the former due to theadded bandwidth required to transmit a second signal, and the latter due to the increased powerrequired for the pilot-tone. In most cases symbol timing must be recovered from the received signal itself through a process of estimation.7Chapter 1: Introduction1.3.1 Measures of Symbol Timing Recovery PerformanceDifferent symbol synchronization schemes may be compared based on a number of met-des, including steady-state symbol timing jitter, acquisition time, and cycle slipping rate [7].Acquisition time is the amount of time required from the moment symbol timing recovery on a signal with unknown symbol clock phase is begun, until the clock phase is synchronized to thereceived signal. Timing recovery schemes can be evaluated by the average acquisition time, insymbols, which are required to recover the symbol clock phase [71. Cycle slipping is a reference toa non-linear effect observed in many recovery techniques, where the recovered clock effectivelyslips’ a symbol period, so that one or several clock periods are not registered by the recoveryscheme, [34), [35], [361. This is especially relevant in systems which employ a phase-lock loop(PLL) as a component of the recovery technique [9]. Symbol timing jitter is a measure of thesteady-state clock phase error associated with a particular recovery scheme, after acquisition hasbeen achieved. Timing jitter is usually measured as the root-mean-square (RMS) of the clockphase error, often normalized by the symbol rate [10]. This thesis concentrates on steady-stateerror, or symbol timing jitter since this is the most popular measure of performance for comparingsymbol timing recovery techniques.1.3.2 Symbol Timing Estimation TechniquesTraditional symbol timing recovery techniques involve extracting a periodic timing component from the received signal, which a tracking loop such as a PLL uses to estimate the correctsymbol clock phase [111. These techniques can be implemented by either analog or digital means(see for example [101, [24]). However, with the increased computational power available fromVery Large Scale thtegration (VLSI) digital receiver architectures, there has been development ofnew synchronizers which process blocks of received samples simultaneously [25], [26]. BLock8Chapter 1: Introductionsynchronizers, as they are known, store a block of input samples and process them together toextract a timing estimate for the entire block. Both digital tracking loops as well as block synchronizers generally involve multiple samples per symbol, although either can be implemented in aform using as little as one sample/symbol in high Baud-rate applications [27], [28], [29]Symbol synchronizers have been based on heuristic approaches [29], [30], such as theearly-late gate synchronizer [13], as well as on estimation principles such as maximum likelihood(ML) estimation, and minimum mean square error (MMSE) criteria [22], [23]. This thesis dealsexclusively with methods based on ML principles as their performance is generally superior toother methods [22]. In particular, two tracking loops based on ML principles are examined -- adata aided (DA) technique which assumes knowledge of the received data sequence to aid in estimation, and a non-data aided (NDA) technique which does not require knowledge of the receiveddata sequence [10], [11]. A third method, a block synchronization scheme based on ML principleswill also be examined.1.3.3 Timing Recovery in Wireless Communication ChannelsAlthough the three synchronizers to be examined have been proposed and analyzed for theAWGN channel [101, [11], [22], [23], the performance of symbol synchronization schemes inmobile wireless channel conditions has had little attention in published literature.With regards to CCI, we are aware of only one publication which deals with a simulationstudy of the effect of CCI channels on symbol timing recovery of a QPSK signal [31]. This studyprovides only a few results for specific simulation cases, and does not provide general conclusionsas how to minimize the effects of CCI.Several authors have examined the effect of fading channels on synchronization. A ML-9Chapter 1: introductionbased synchronizer for a general fading dispersive channel has been proposed [32], [33]. However,it relies upon knowledge of channel characteristics and requires a computationally intensivesearch-algorithm. Furthermore, its performance is evaluated with no prediction as to actualimprovements in BER or symbol timing jitter performance. Another technique has also beendeveloped for ML block synchronization and demodulation of a TDMA data frame involving carrier phase, symbol timing, and carrier frequency offset estimation [25], [261, and tested in a frequency selective fading environment. The algorithm was implemented in hardware, and is apromising candidate because of the simplifications in implementation used to reduce computational complexity. This technique is generalized to the block synchronizer examined in this thesis,in order to allow for theoretical analysis.In [611, a study is made of the ML NDA synchronizer in frequency-selective fading forbinary-PSK modulation. The paper found that the steady-state symbol timing jitter of an infinitelyfast (ideal) ML NDA tracking loop has no benefit over practical synchronizer’s performance.However, it does not provide symbol timing jitter expressions which may be useful for systemdesign, and more importantly, the analysis is only valid for the case that the delay spread is smallcompared to the symbol period.1.4 Thesis Research ObjectivesNoting the background provided, this thesis explores the effects of CCI and multipath fading on the performance of three popular symbol timing recovery schemes -- two tracking loops,and one block synchronizer, all based upon maximum likelihood estimation principles. The tracking loops (ML NDA and ML DA) are based upon recovering a sinusoidal timing wave through aphase-lock loop structures, while the ML block synchronizer is based on a direct evaluation of the10Chapter 1: IntroductionML log-likelihood function for symbol timing recovery. Genera] analysis is supported by computer simulation studies based on conditions encountered in digital wireless personal telecommunication systems.The thesis has two main objectives, which are:1) To study the effect of CCI on the tracking error (symbol timing jitter) of the three synchronizers. This will include a theoretical derivation of symbol timing jitter performance of the three synchronizer schemes in CCI, as well as computer simulations toconfirm the analysis and provide further insight. For both theoretical and computersimulated results, the performance of three popular modulation schemes (QPSK, t/4—shift DQPSK, and 1 6—QAM) will be considered and compared.2) To examine the operation of the ML NDA and ML DA tracking loops in a multipathfading environment, including both frequency non-selective and frequency selectivefading, and with both Ricean and Rayleigh fading. The performance evaluation resultsfor the fading channel will be obtained by means of computer simulation and willinvolve the it/4—shift DQPSK modulation scheme.1.5 Organization of ThesisThe thesis consists of six chapters, including this introduction (Chapter 1), and two appendices. The chapters are organized as follows:Chapter 2 introduces the concept of symbol timing recovery, providing a background forthe analysis and simulations which follow. Section 2.2 introduces the concept of symbol timingrecovery, and introduces root mean-square timing jitter as a measure of performance. Section 2.311Chapter 1: Introductionexplains maximum likelihood (ML) estimation for symbol timing recovery, and introduces thethree synchronizers to he examined in the thesis. Section 2.4 provides background on methods ofderiving expressions of RMS symbol timing jitter for each of the synchronizers. These methodswill be used in Chapter 3 to analyze the three synchronizers in a combined AWGN and CCI environment. Finally, Section 2.5 provides a summary of the chapter.Chapter 3 presents the analytical results obtained for symbol timing recovery performancein CCI for the QPSK, t/4—shift DQPSK, and 16—QAM modulation schemes. Section 3.1 is anintroduction to the subject of symbol timing recovery in CCI channels. It is followed, in Section3.2, by a description of the system model, including the CCI model, used in the analysis of thethree synchronization schemes. Section 3.3 to Section 3.5 present the analytical results of theeffect of CCI on the ML NDA, ML DA, and ML block synchronizers. Section 3.6 provides a summary of the chapter’s results.Chapter 4 is a presentation of a series of computer simulations performed to validate theanalytical results obtained in Chapter 3. After the introduction of Section 4.1, Section 4.2 is adescription of the computer simulation used to obtain the results, which are presented for the MLNDA, ML DA, and ML block synchronizer structures in Section 4.3 to Section 4.5. Section 4.6provides a summary of the chapter.Chapter 5 is an examination of the effects of multipath fading on symbol timing recoveryfor the t/4—shift DQPSK modulation scheme by means of computer simulation. Section 5.1 givesan introduction to the topic, while Section 5.2 presents the models used to generate both frequencynonselective and selective fading in the computer simulations. The simulation results and discussion then follow in Section 5.3. Finally, Section 5.4 gives a summary of the chapter’s results.12Chapter 1: IntroductionThe conclusions of the thesis, and some suggestions for future research are given in Chapter 6.Appendix A gives the detailed derivation of the equation for symbol timing jitter of theML NDA technique in AWGN and CCI channels. Appendix B provides a detailed analysis of theerror involved in measuring the symbol timing jitter in the simulations performed.13Chapter 2: Symbol Synchronization Principles2 Symbol Synchronization Principles2.1 IntroductionThe symbol timing recovery process has been well studied in the past for the AWGN environment (see for example [7]-[ll]). Although many heuristic methods for symbol synchronizationhave been proposed, it has long been recognized that timing recovery is essentially an estimationproblem of the time difference between the transmitted and received digital signal [10], [13]. Thischapter presents the basic principles and background of the symbol timing recovery problem.Since this thesis concerns itself with the symbol timing jitter performance of three maximum likeIthood synchronizers, methods of analysis for each technique are introduced here, and used in laterchapters.Section 2.2 presents the basic principles of symbol timing recovery. The concept of acyclostationary process is introduced to explain the underlying periodicity which enables the estimation of symbol timing. The behaviour of symbol timing jitter is also discussed, including itseffect on the BER performance of a receiver. Section 2.3 explains how maximum likelihood estimation can be brought to bear on the problem of symbol timing recovery. The three symbol synchronizers to be examined in later chapters are introduced: the ML NDA synchronizer, the ML DAsynchronizer, and the ML block synchronizer. All three are explained in terms of the maximumlikelihood concept. Section 2.4 provides the method of analysis for each technique which will beused in Chapter 3 to determine symbol timing jitter performance in combined CCI and AWGNchannels. Finally, Section 2.5 provides a summary of this chapter.14Chapter 2: Symbol Synchronization Principles2.2 The Symbol Timing Recovery Process2.2.1 Cyclostationary Processes in Timing RecoverySymbol timing recovery is possible because digital signalling introduces an underlyingperiodicity to the transmitted signal. Digitally modulated signals have a non-stationary componentwhose mean and autocorrelation functions are periodic in time with the symbol period T Such aprocess is known as a wide-sense cyclosratianary (CS) process [38].For example. a pulse-amplitude modulated (PAM) signal waveform may be expressed as:s(t) = ag(t—kT) (EQ.2.1)kwhere g(t) is an arbitrary pulse shape, and ak is the information symbol transmitted at t=kT, fromthe set of {ak} independent and stationary symbols. This can be shown to be a wide-sense CS process, since the mean and autocorrelation of the signal can be written as:E[s(t)] =E[aJg(t—kT) =E[s(t+T)]k (Eq. 2.2)E[s(t)s(u)J = =E[s(t+T)s(u+T)]kmwhere Ef.) indicates the expectation over the argument. This extends to the case of the quadraturemodulation schemes under consideration here (L-ary PSK and L-ary QAM), as well as CPM signalling such as GMSK [39], [40].Many commonly used PAM signalling schemes use zero-mean data (i.e. E[akJ=O) forpower efficiency, since there is no resultant DC component to the signal. Most symbol synchronizers require a signal with non-zero mean to recovery timing and therefore use some form of nonlinear processing to remove the modulation of the signal and generate a cyclostationary signal withnon-zero mean. After this operation. the signal can be written as:15Chapter 2: Symbol Synchronization Principless’(t) = g’(t—kT) (Eq.2.3)A:where g’ (t) is the pulse-shape after processing. For many choices of non-linearity, the resultantsignal now has a non-zero periodic mean as well as autocorrelation function, and can be used torecover symbol timing. This operation can he thought of as removal of the modulating signal, ormodulation removal, and is a basic concept in many symbol synchmnizers [11].2.2.2 Symbol Timing Jitter in Symbol SynchronizationThe steady-state tracking performance of a symbol synchronizer is generally measured by root-mean square (RMS) timing jitter normalized by the symbol period:r f /E[c21T=4E4 T2(Eq.2.4)where ‘r is the receiver clock timing error, a stationary random variable with variance a2 [41].For most synchronizers in an AWGN channel the timing vaiiance can be expressed by twostatistically independent components [221:= a2+a (Eq.2.5)the noise-dependent jitter, a,2. and the data-, or pattern-dependent jitter, d2 which is also knownas self-noise [421. The noise-dependent jitter is due to AWGN, and in well-designed systems is themain contribution to synchronization errors at low signal to noise ratios (SNR). The pattern-dependent jitter term is present in the absence of noise, and is caused by the intersymbol interference(ISI) of pulse overlap at the non-ideal sampling instants [411. Pattern-dependent jitter is the chieflimit to timing jitter performance at high SNR, and may be viewed as causing a jitter ‘floor’ -- aminimum level of timing jitter which can be obtained despite the absence of noise.16Chapter 2: Symbol Synchronization Principles2.2.3 Effects of Symbol Timing Jitter on Receiver BER PerformanceSymbol timing estimation is an important requirement of the detection process. Considered in this thesis is the case of a digital modulation scheme which employs Nyquist raised-cosinepulse-shaping to eliminate ISI at the ideal sampling instant [13]. Errors in symbol timing estimation degrade system BER performance because of sampling at a reduced eye opening.The specific effect of timing jitter on the BER performance of a system depends upon themodulation scheme used. For example. the errors introduced by symbol timing jitter in coherentlydemodulated binary PSK signalling is shown in Table 1. assuming no clock frequency or carrierphase estimation error. As can he seen, an offset of 9% of a symbol period can have an effect onBER perfonuance, which is increasingly severe for high SNR. In fact, an RMS jitter of 15% of asymbol period brings about an error floor at a BER of about i0 [101.Table 1: Effect of symbol synchronization error on BER performance comparedto SNR for ideal timing, for coherently demodulated BPSK (from (10]).RMS timing SNR loss at SNR loss atjitter (a/T) BER = iO BER = 1O0.090.120.151dB 5dB4dB 16dBN/A N/AN/A indicates that an error floor of approximately i0 is present for thisamount of timing jitter.For applications such as data transmission which require low BER performance, RMStiming jitter must be well below the O.09T level. Low BER requirements may necessitate a synchronization scheme which guarantees less than O.OIT jitter [101. For applications under consideration here, such as cellular telephony and PCN, higher BER levels may be acceptable and an RMSjitter of O.09T may be a measure of acceptable synchronization performance.17Chapter 2: Symbol Synchronization Principles2.3 Maximum Likelihood EstimationMaximum likelihood estimation of symbol timing is based upon expressing the likelihoodof the timing offset being a particular value, t = ‘c, based upon observation of the received signal.The likelihood function is maximized to locate the ML value of the symbol timing offset. In [11]the natural log of the likelihood function, or log-likelihood function for timing recovery is found tohe:A(t) = fx(t,t)s(t)dt (Eq.2.6)T0where s(t) is the transmitted signal as in Eq. 2.1, arid x(t,t) is the received signal, dependent uponthe timing offset t, as well as any noise added in the channel. The log-likelihood function has anobservation period of T0. An approximation is made by assuming the observation period is infinite,and that only K previous symbol periods are relevant during the current symbol period in s(t). TheML log-likelihood function for estimation of correct timing can then be simplified to [11]:A= k=O(Eq. 2.7)where Ck is in general a complex data symbol at the kth symbol interval, and:q()= f s(r)hR(t—kT—)dt (Eq.2.8)where hR(t) is a receive filter matched to the transmitted pulse-shape, h’t), and qk(t) is simply theoutput of the receiver’s matched filter, sampled at t = kT + t. The function is maximized by thevalue of which is optimal for sampling.Eq. 2.7 is used in the next three sections to illustrate how the three synchronizers underconsideration, the ML NDA, ML DA, and ML block synchronizer, are based upon the principlesof ML estimation.18Chapter 2: Symbol Synchronization Principles2.3.1 ML Non-Data Aided EstimationThe ML function, A (‘c), requires knowledge of the symbol sequence, Ck, transmitted. In[11], the likelihood function is averaged over the probability density function of the data symbols,ck } to rid the equation of its dependence on the symbol sequence. Assuming the symbols arebinary with ck E {±l} ,or Gaussian random variables, the result is similar [11]:A(t) ocln([cosh(q(t))]) =q(tI ck binaryk k (Eq.2.9)A (t) ° q(t) ck Gaussian.For the common NDA implementation the output of a matched filter, q(t,t) is fed to asquare-law device, and the integration over K symbol intervals is realized by a narrow bandwidthfilter or PLL [431, as shown in Figure 4. The prefilter. often a handpass filter (BPF) centred atf=I/2T, is used in order to minimize pattern-dependent timing jitter at high SNR [37], [12]. The BPF,K(f), extracts the periodic component of the resultant waveform, of frequencyf=I/T Zero-crossings of the timing wave, z(t), are used to locate the correct sampling instants. K(f) is often implemented as a PLL to provide a more reliable frequency-selective filter with an ability to compensatefor small clock-frequency offsets at the receiver [34]. [37].x(t)Figure 4: ML non-data aided symbol timing tracking loop [31].Notice in Figure 4 that the in-phase (I) and quadrature (Q) inputs are processed separately,I Channelz(t)BPF(@11019Chapter 2: Symbol Synchronization Principlessince squaring the complex received signal in a balanced modulation scheme results in a subtraction of the two independent timing waves, canceLing the output [11]. However, each of the I and Qsignals can be viewed as separate binary PAM signals which yield periodic timing signals of equalphase. and may be added together to pmvide a timing estimate for the received waveform [311.2.3.2 ML Data Aided EstimationThe ML data-aided scheme uses a decision device to approximate the transmitted symbolsequence. The derivative, denoted by ‘S’, of the simplified log-likelihood function in Eq. 2.7 is:KA(t) = ckk(t). (Eq. 2.10)k=OThe log-likelihood function is maximized when Eq. 2.10 is zero. The ML DA implementation in Figure 5 is a realization of this method. It can be viewed as a gradient method, where thederivative, or gradient of the ML log-likelihood function is used to achieve tracking. At the nominal interval T specified by the timing wave, z(t), a sample is taken of both the signal and its derivative. A decision device decides on the symbol transmitted, which is multiplied by the sampledderivative of the signal. The result is fed through a loop filter to a number controlled counter(NCC), the digital equivalent of a voltage-controlled oscillator (VCO), which generates z(t). Sincethe feedback loop is similar to a PLL, this synchronizer will be subject to acquisition time considerations, as well as cycle slipping phenomena. Notice, as with the NDA case, the I and Q inputs areprocessed separately to avoid cancellation of the resultant timing wave.20Chapter 2: Symbol Synchronization Principlesx(t)Figure 5: Data-aided symbol timing tracking loop. (DD) is decisiondevice, (SPC) is parallel-to-serial converter for output data sequence,(NCC) is number controlled counter [31].2.3.3 ML Block EstimationThe ML block symbol synchronizer differs from the previous two methods since it operates on a block of samples at one time to derive timing estimates for the entire stored waveform.The block synchronizer under consideration here simply divides the symbol period into a finitenumber (N) of equal intervals and evaluates the ML function of Eq. 2.7 over K symbols for eachdiscrete time interval, choosing the instant which maximizes the expression. This suggests a searchalgorithm, shown in Figure 6, as follows:1) Sample the received signal at a rate NIT.2) Store samples over a duration of K symbol periods, or KN samples.3) Calculate the N metrics given by:A1=i= { 1, ...,N} q.2.11)21Chapter 2: Symbol Synchronization PrinciplesThis synchronizer has a great deal of added complexity, but allows synchronization without any required acquisition time. As well, since it does not contain a non-linear tracking ioop, itwill not suffer from cycle slipping phenomena seen in synchronizers employing tracking loops.An alternate synchronizer structure has been proposed [251, [261, which uses differentialdecoding prior to symbol synchronization. This may be performed by multiplying each sample bythe complex-conjugate of the sample occurring N samples previously (one symbol period). Thus,the synchronizer metrics are given by:= k=2N NI = {1 N)where ‘—‘ indicates complex conjugation, and l is now an estimate of the differential symbolreceived. Using differential symbols for synchronization can help overcome carrier-phase offsetsat the receiver. This is especially appropriate for use with the jr/4—shift DQPSK modulationscheme, since for the DA ML synchronizer, the decision device must be able to distinguishbetween an 8—symbol constellation, as shown in Figure 7. Using the differential symbols, only a4—symbol constellation must be distinguished. As well, the term q(iT/N)_1(i ) isobserved to be the differential decoding operation used in a symbol-by-symbol differentialNIT4) Choose the sampling instant t=(k÷iIN)T, where i is chosen to maximize A1.inputsamplesAtFigure 6: Block diagram of ML block synchronization scheme.K(Eq. 2.12)22Chapter 2: Symbol Synchronization Principlesreceiver, therefore the transmitted data can he recovered in the same operation. Since differentialdetection can be used, this completely eliminates the need for carrier phase recovery at thereceiver. Of course the disadvantage of this scheme is the amplification of noise in the receivedsignal. However, it has been shown that implementation of this technique in an AWGN can stillproduce accurate timing estimates [261.Figure 7: Comparison of signal constellation for ML blocksynchronization using (a) symbol constellation, and (b) differentialsymbol constellation, for it /4—shift DQPSK signalling.2.4 Analysis of Symbol Synchronization TechniquesHaving introduced the three synchronization schemes, it will prove useful in this sectionto examine methods of analyzing the symbol timing jitter of each technique. In the three methodspresented, analysis is simplified by assuming that perfect carrier recovery is achieved, and signalsare demodulated to hasehand. In Chapter 3, these methods will be used to analyze the effect of CCIon synchronizer performance.2.4.1 Phase-Lock Loop Theory for the NDA ImplementationThe tracking symbol synchronizers under consideration may he viewed as PLL’s withnonlinear phase detectors, as illustrated in Figure 8. This allows the use of linearized PLL theory to. .. .(a) (b)23Chapter 2: Symbol Synchronization Principlesdetermine expressions for symbol timing jitter. However, most PLL analysis assumes stationaryinput disturbances [71, [34], whereas here the input to the synchronizer is a cyclostationary signal[12], [44]. It has been shown that use of the general equations derived for a stationary input disturbance can greatly overestimate the amount of timing jitter at the PLL output [42], [44j, [45], sinceit ignores the CS process, in effect averaging out its periodicity.u(t)Figure 8: A general symbol synchronizer as a PLL. F(f) is a loop filter,and VCC is a Voltage Controlled Clock.The output of the nonlinear phase detector block can be written as the sum of a sinusoidalcomponent to be tracked and a zero mean noise disturbance, M(t) [12]:1 2itv (t) —cos (—t + e) + M (1) (Eq. 2.13)where P is the power of the sinusoidal component. The phase offset 0, of the sinusoid represents apossible offset of the PLL nonlinear phase detector stable point from the ideal sampling instant dueto a bias in estimation [46]. The above equation is a well-known PLL expression, with the parameters related by [12]:.Jexp (jo) = (E [v (t) I exp (—2jict/T)) (Eq. 2.14)where <.> indicates a time-average over TFor wide-sense stationary noise input, the output jitter variance of the PLL, can beexpressed as [9]:24Chapter 2: Symbol Synchronization Principles=.1 IHL(f)I2[So(f÷ ) +S0(f— )]df (Eq. 2.15)where L(f) is the equivalent linearized phase transfer function of the PLL, andS0(f) is the powerspectral density (PSD) of M(t).It has been shown for wide-sense CS M(t) that timing jitter variance can be written as [121:= I V’i.. (f) 25 (I) df (Eq. 2.16)whereS (f) = ! [s (f+!) + 5 (f_!) (Eq. 2.17)(f+ ) exp (—2j0) ) exp (2j0)]andSk(f) = FT{y(x)} k = {O,±1,±2} (Eq.2.18)where FT{. } represents the Fourier transform of the argument with respect to the time-variable x.yk(x) is the kth Fourier series coefficient of the autocorrelation of a CS M(:) expressed as a Fourierseries:RM(u,u+x) = y(x)exp(ku). (Eq. 2.19)If the input is stationary, the autocorrelation function becomes simply RM(v), and Sk(J) = 0 fork 0. It can be seen that Eq. 2.15. for stationary M(t), is simply a special case of Eq. 2.16 for CSM(r).To see more clearly the difference between the two equations, it is useful to examine thetiming wave, z(t), which is the output of the ML NDA synchronizer, as seen in Figure 4. Its variance can be written as [101:25Chapter 2: Symbol Synchronization PrinciplesE [z2 (t)] = C1 + C,cos (t) (Eq. 2.20)which consists of C1, a constant term, made up of (signal x signal), (signal x noise), and (noise xnoise) terms at the output of the square-law device, and a periodic C2 cos(4itIT) component due tothe CS nature of the (signal x signal) term [37]. The two terms are statistically independent [12],and when added together the ideal sampling instant occurs at the location of minimum jitter, whichis smaller than in the stationary case. This is illustrated in Figure 9, where the importance of usingEq. 2.16 is evident.E[z2(t)] E[z2(t)]Figure 9: Illustration of timing wave variance for (a) wide-sensestationary and (b) wide-sense CS inputs to the filter-square-filter MLNDA synchronizer. 0 represents a possible bias in the estimationprocess.If it is assumed that the PSD of the disturbance is relatively constant over the frequencyrange for which IHL (J) 0, and furthermore that = IIHL (t)I2fwhere 2BL is defined as theequivalent double-sided noise bandwidth of the PLL equivalent phase transfer function, then forwide-sense CS input noise:= (2B) S (0). (Eq. 2.21)time(a) process (b)26Chapter 2: Symbol Synchronization PrinciplesThus, the jitter can be specified by determining the PSD of the input noise term, and theequivalent noise loop bandwidth of the PLL used for recovery. It is important to note, however,that linearized PLL theory is based upon the linearization of a nonlinear PLL transfer function.This is strictly valid only for a small disturbance term, M(t), so actual and predicted performancewill diverge for large M(t).Since small sampling time errors in multi-level modulation schemes may cause unacceptable bit error rate performance [10], pattern dependent jitter is a concern for system designers. Anumber of schemes have been put forward to minimize or eliminate the pattern-dependent jittercomponent. In [37] it was found that the pattern dependent jitter term is eliminated by a pulseshape, G(f)1 at the input to the squarer, which has even symmetry aboutf=l/(2T) and is bandlimited to 11(47) < f I ! (SNR)1 h(O) (Eq. 2.27)K—h(0)}where SNR=(a + a) h (0) / (N0/2). It is interesting to note that performance is identical tothe a ML DA implementation, ignoring the pattern-dependent jitter term, with 2BLT= 1/K (see Eq.3.18). It should be kept in mind that this derivation does not account for the sampling rate of thealgorithm. Rather, it is a more general expression for a ML synchronizer which evaluates the MLlog-likelihood function. Since this is an expression for a generic ML symbol synchronizer, it canbe seen that the ML DA technique reaches the lower bound on performance unless pattern dependent jitter is the dominant contributor to timing jitter. Tracking performance of the ML DA tracking loop can be viewed as that of a block synchronizer with ‘memory’ of 1/(2BLT) symbols [10].The traile-off for ML block synchronizers is between time tsolution and the expense intime and hardware of metric calculations. The number of samples/symbol, N, determines the number of metrics to be calculated, and the minimum timing-jitter attainable2.In the absence of noisethe average RMS jitter due to time quantization3 is T/ (NJi). The worst case sampling jitter,30Chapter 2: Symbol Synchronization Principleswhere the ideal sampling instant lies exactly between samples is T/ (2N). A sampling rate of 16/Tallows a minimum normalized RMS timing jitter of 1.8% of T, while the worst-case minimumblock RMS timing jitter would he 3.125% ofT2.5 SummaryThis chapter outlined the theory of symbol timing recovery, as it applies to three synchronizers under consideration, the ML NDA and ML DA tracking loops, as well as the ML block synchronizer. The concept of the CS process was introduced to explain the periodic nature of digitalsignalling which enables symbol synchronization at the receiver. Symbol timing recovery is anestimation problem, and maximum likelihood estimation was discussed. It was shown that all threesynchronizers are based upon a simplification of the ML function for symbol timing estimation.Popular methods of finding the steady-state symbol timing jitter performance of the tracking loop synchronizers were presented, which recognize them as forms of a PLL with CS inputs.The methods presented are general and cover both stationary and CS input disturbances. A methodof detennining the lower bound on timing jitter performance is presented for the block synchronizer, which exhibits jitter performance similar to the ML DA scheme. It was pointed out that allmethods presented involve linearizing a non-linear process, and assume that levels of noise andinterference in the synchronizer are low enough to maintain operation in a linear region.The tools presented in this chapter will be used in to analyze the effects of a combinedAWGN and CCI channel on jitter performance of each synchronizer in Chapter 3 and Chapter 4, aswell as in fading channels in Chapter 5.2. Since the error in sampling time will be constant over an entire block, timing jitter in this case refers to the average sampling time error over multiple blocks.3. This is the well-known result for quantization noise in digital sampling [49J.31Chapter 3: Symbol Synchronization Analysis in CCI Channels3 Symbol Synchronization Analysis in CCIChannels3.1 IntroductionAlthough symbol timing recovery jitter performance has been well studied for the AWGNchannel with a variety of signalling formats, little has been published on the effects of CCI onsymbol timing recovery. As previously mentioned, we are aware of only one conference paperpublished on this topic. More specifically, in [31] simulations are used to predict the level of CCIwhich yields a BER of iO for QPSK signalling with both ML NDA and ML DA synchronizers.The paper concludes that a BER of iO is achievable in the presence of a single interferer at C/Ilevels up to 3.5 dB. However, the simulations are performed for only a few cases of 1 or 2 interferers with particular timing offsets, and can not he used to predict performance for other modulationschemes. Furthermore, the results reported in [311 do not provide an exact explanation of how thesynchronization schemes are affected by CCI.In this chapter. the effect of a combined AWGN and CCI environment is considered. Analysis of the three synchronization schemes discussed in Chapter 2, the ML NDA, ML DA, and MLblock synchronizers, provide expressions for the timing jitter performance of each for a generallinear quadrature modulation scheme. Section 3.2 introduces the baseband system models for thetransmitter, channel, and receiver, including the model of CCI, to be used in the analysis. Then,Section 3.3 to Section 3.5 outline the analysis of the ML NDA, ML DA, and block synchronizers,in CCI and AWGN for the general case of linear quadrature modulation, including QPSK, 7t/4—shift DQPSK, and 16—QAM. The chapter ends with Section 3.6, which provides a summary of the32Chapter 3: Symbol Synchronization Analysis in CCI Channelsresults obtained.3.2 System ModelThe block diagram of the system model is shown in Figure 10. A baseband model is usedfor mathematical convenience.3.2.1 Transmitter ModelThe block diagram of a typical transmitter is shown in Figure 10(a).._4>[j>optional(a)n(t) 1(t)r(t)(b)_____realI-channel(C) zzzz> complexQ.channe.Figure 10: Block diagram of the baseband system model. (a) Transmitter,(b) Channel, (c) Receiver.The signal mapper maps the input binary data stream, {dk) into the symbols k=7k33Chapter 3: Symbol Synchronization Analysis in CCI Channelsexp(ji2k), where ‘Ik and k are the amplitude and phase of k’ respectively. For the case of L-PSKsignals, the amplitude, ‘Yk is constant, and the phase, 12k takes a value from a discrete set of Lequally distributed phases, depending upon the data stream {dk).A differential encoder may be utilized to code a new sequence, {Ck), where:== exp k— I (EQ. 3.1)where indicates modulo 2ic addition, and‘1k is the phase of ck.The signal is then passed through a transmit filter with impulse responseh7-j’t) to shape thesignal pulses, yielding the equivalent haseband transmitted signal:s(t)= ckhT(t—kT) (Eq.3.2)kand the resultant signal is then mixed to the carrier frequency and transmitted through the channel.3.2.2 Receiver StructureThe block diagram of the basehand receiver is illustrated in Figure 10(c). The receivedequivalent haseband signal is:r(t) = s(t) +n(t) +1(t) (Eq.3.3)where n(t) and 1(t) are the hasehand equivalents of the channel AWGN process with double-sidedPSD N012, and the CCI process, respectively. The signal is passed through a receive filter withimpulse response hR(t), yielding in a pulse-shape h(t)=hr)*hR(t) where ‘*‘ indicates convolution.The pulse shape considered is the well-known Nyquist raised-cosine filter which eliminates ISI atthe sampling instants, where h7’(f) = hR(f) are each ..J& raised cosine filters. The pulse shape H(f)has transfer function [13]:34Chapter 3: Symbol Synchronization Analysis in CC’! Channels11(J) (1_sin[(f_)]) (Eq.3.4)1+ct0where a is the excess bandwidth4of the signal. The resultant signal, assuming no frequency offsetbetween the transmitted symbol rate and the local reference at the receiver, is:x(t) = ckexp (jp)h(t—kT+t) +u(t) +1(t) (Eq.3.5)kwhere p is the difference in carrier phase between transmitter and receiver and t is the symbol-rateclock offset or timing error of the receiver sampling clock. The case of ideal carrier recovery willbe considered in this thesis to simplify analysis, therefore it is assumed that p=O. The complexbasehand Gaussian noise process can be written as u(t)=n(t)*hR(t), and the baseband CCI equivalent is 1(t)=i(t)*hR(t). Since the signals under consideration in this thesis are quadrature modulated,the transmitted symbols can be expressed in terms of the in-phase and quadrature symbols:ck = a +jbk (Eq. 3.6)where and bk have variance G2a and G2b, respectively. The symbol timing recovery system mustadjust the phase of a symbol-rate clock, in order that sampling for data recovery is performed atthe maximum eye opening within each symbol period.Finally, the sampled signal is passed to the decision device, where an estimate of the transmitted binary data stream, { d } , is recovered.3.2.3 Co-Channel Interference ModelAs explained previously the CCI, 1(J), results from other inobile-basestation pairs hans4. Excess bandwidth a is with respect to the minimum Nyquist bandwidth of 11(27).35Chapter 3: Symbol Synchronization Analysis in CCI Channelsmitting on the same frequency, at a distance from the mohile-hasestation pair under consideration.CCI is often modeLled in literature as a summation of equal-amplitude unmodulated carriers, eachwith a statistically independent carrier phase offset from the transmitted signal (see for example[50], [51]). This model has been shown to work well in calculation of BER, with the assumption ofideal timing [5 1].Here, however, a more comprehensive model of CCI will he used, similar to [50], [62],and [63). CCI is defined as a summation of M independently generated and modulated signals,such that:M Al1(t) = 1(t) = il khT(t—kT+t÷Wl)exp (Jp1) (Eq.3.7)1=1 1=1 A:where the 1th interferer, !Kt), has a statistically independent data stream, {il.k} and has carrierphase and timing offsets, Pt and 4’i respectively, from the transmitted signal. it will become apparent later that this is an appropriate CCI model for considering effects on symbol timing recovery,since it is a summation of cyclostationary processes which may affect symbol synchronization differently than a summation of unmodulated carriers.The analysis will concern itself with the case where each interfering signal is of the samemodulation type as that under consideration, which accurately reflects a frequency re-use networksuch as cellular or PCS systems. The results are also simplified by considering only equal-amplitude interferers, which yields, for a given C!! ratio, the worst bit-error rate performance [51]. Thus,each interferer has a quadrature modulation similar to the transmitted signal, or k = ‘4kThe variance of each interferer can be expressed in terms of the variance of the signal for balancedmodulation such as L-PSK and L-QAM as = = Ao = A2a . Here, a and are thevariances of the independent in-phase and quadrature zero-mean CCI symbol streams, {l,k) and36Chapter 3: Symbol Synchronization Analysis in CC’! Channels{tk} respectively, a2 and G2b are variances of the I and Q data symbols, a and bk respectively,and A2 is the ratio of the interferer power to the signal power. Therefore, the C/I ratio in dB can beexpressed as:[C/IjdB = —lOlog (MA2). (Eq. 3.8)For the purpose of the analysis, the carrier phase offset of each interferer will be disregarded. If the term exp(jp1)is included in the symbol sequence, {ilk}. the adjusted interferer datasequences will have the same mean and variance. The forthcoming analysis will depend only onthe mean and variance of the interferer data sequences. so as long as the carrier offsets for eachinterferer is statistically independent of all others, and essentially constant compared to the hitperiod, the carrier offset can be ignored. This will he sufficient for us to ignore the carrier phase inthe timing jitter analysis to follow, and for simplification Pt is set to zero for all interferers.3.3 Analysis of the ML Non-Data Aided (NDA) SynchronizerUsing the method outlined in the Section 2.4.1. analysis begins by finding the power andbias terms inherent in the ML NDA synchronizer. The power of the averaged input v(t) and itsphase offset can he derived by solving for v(t) and substituting into Eq. 2.14 to express the averageinput power and the phase offset:2 2 ‘)2 1 2P=_a+G) Z0(—) (1±1/C)T T (Eq 3.9)9 =where the expectation has been taken over the CCI timing offsets, uniformly distributed between(— 0.027) jitter.Table 4 illustrates the difference between theory and simulation results for a range ofraised-cosine filter excess bandwidth a for the QPSK modulation scheme, with no noise presentand C/I = 10 dB. As seen in the NDA simulations, the simulated results are approximately 10%worse than theory predicts over the range of a, hut the amount of error increases for small a. Theerror over most of the range can be explained by simulation error due to discrete time (see Appendix B for details).Table 4: Simulation Enor vs. excess bandwidth. ML DA synchronization, forQPSK modulation, C/!= 10 dB, M —* oc, 2BLT=O.008. and no noise.Excess Bandwidth RMS Jitter Simulationa Error(%)0.10 28.25%0.20 11.6%0.35 9.2%0.50 9.9%0.90 10.4%As was the case with the ML NDA simulation results, the analysis of Chapter 3 correctlypredicted the results found in the simulation of the ML DA scheme. Once again, the linear assump71Chapter 4: Computer Simulation of Symbol Synchronization in CC!tion of PLL theory leads to underestimation of symbol timing jitter at higher jitter values. Despitethe ML DA synchronizer simulated having an equivalent noise bandwidth 20% lalEer than the MLNDA synchronizer simulated, the ML DA synchronizer exhibited better performance in all cases,although it is susceptible to decision errors since it incorporates them into the tracking loop. Consequently, where the BER is large (for example, BER> 2x10 in the 16-QAM simulation), decision errors will increase the timing jitter of the recovery scheme.4.5 ML Block Synchronizer Simulation ResultsThe block synchronizer was implemented in simulation directly from the description inSection 2.4.3 for it/4—shift DQPSK. Since the ideal sampling instant occurs exactly halfwaybetween two samples in the simulation, the worst-case time quantization error was be measured inthe simulation rather than the average time quantization error. That is, as explained in Section 3.5,in a real system the receiver’s symbol rate clock would not be perfect, so the error in selecting asampling instant, for negligible timing jitter, would he due to sampling error, and would be uniformly distributed over the time between sampling instants. However, in the simulations performed, the ideal sampling rate falls directly between two samples, and the error is that of theworst-case time-quantization. For a simulation of 16 samples/symbol, which was chosen as a realistic sampling rate (see Section 3.5), this corresponds to a minimum measurable RMS timing jitterof 0.03 125TIt is seen in the simulation results in Figure 24 that the pattern-dependent jitter term isbelow the minimum measurable jitter, and therefore the chief limit to performance at high SNR(i.e., 10 dB) is the sampling rate at the input. As can he seen, the use of a 32—symbol block reducesjitter performance by about 3 dB at a normalized RMS timing jitter of 5x1(T2.The effects of CCI72Chapter 4: Computer Simulation of Symbol Synchronization in CCIare negligible, except for the combination of a 32—symbol block and C/I = 10 dB, where CCIdegrades the jitter to less than 5% above the worst-case time-quantization jittez At higher levels ofCCI, the CCI term will begin to dominate at high SNR. However, for C/I = 10 dB, the BER isabout 5.3x10 for ic/4-shift DQPSK (as shown in Figure 25), which would indicate barely marginal performance for most wireless telecommunications applications.— ...,ML Differential Symbol Block SynchronizerSimulations for I4-shth DQPSKMinimum measured jther, 16 sps• —0—-—-— block length = 32, No Interference,.- - - -- block length = 32, Cii = 10 dB, M—block length = 64, No Interference\\ z ock length=6CA0dMEZ H-Z- .... .... ... ..0 5 10 15 20 25 30 35 40 45SNR [dB]Figure 24: ML Differential Symbol Block Synchronizer for it/4—shiftDQPSK: Comparison of 32 and 64 block length synchronizers in CCI,cx=O.35, and 16 samples per symbol.v -11oFC.’)1 o-2-5The simulations used 16 samples per symbol, which yielded an RMS symbol timing jitterof 0.031 25T at high SNR. Use of a smaller number of samples per symbol would increase the sym73Chapter 4: Computer Simulation of Symbol Synchronizaüon in CCIbol timing jitter at high SNR to a level which would continue to dominate over the additional jittercaused by CCI.Figure 25: Bit error rate performance for block synchronizer and it/4—shift DQPSK modulation scheme, cx=O.35 and 16 samples/symbol.Comparison with Figure 15 shows that the block synchronizer using differential symbolsis less than 1 dB in timing jitter performance from the lower bound for no CCI at a timing jitter ofO.05T. Therefore the use of differential detection for ML block symbol synchronization does notsignificantly degrade performance in AWGN. The technique loses about 3dB in timing jitter perfomiance due to CCI at an RMS timing jitter of O.05T over the lower bound for the non-differen101>10-21oSimulated Bit Error Rate‘c — — Performance for 1t14-shiftDQPSK with Block Synch.Ideal timingBlock length 32—Block length 64lssamplespersymbolE-EEEEEE... ... ... ....... .... ....‘‘\\—4) ‘1 c-Tee1’ \\1=10 dB, M-5 0 5 10 15 20 25 30 35 40SNR [dB}74Chapter 4: Computer Simulation of Symbol Synchronization in CCItial block synchronizer for both the 32 and 64 block size cases, where only 1 dB or less waspredicted. This deviation at higher jitter is likely due to the same non-linearity exhibited in the MLDA case, which yielded a quite similar expression for symbol timing jitter, and was seen to underestimate the jitter when it was at this level.Figure 25 illustrates a typical BER curve for the block synchronizer. It was included sincethe jitter here is larger than for the DA or NDA simulations. As can be seen, the simulated BERcurve and ideal BER curve are essentially coincident over a wide range of SNR. The normalizedRMS timing jitter for high SNR is 0.03 125T, which has negligible effect on the measured BERdown to 10. The curve is included as the worst-case BER performance simulated for it/4—shiftDQPSK, with C/I = 10 dB. The error floor here is due to the presence of CCI. However, decisionerrors due to timing jitter are negligible, so the interference effect on the decision device is the limiting factor, not the interference effect on the symbol timing recovery system.4.6 SummaryThis chapter has presented computer simulation of the ML NDA and DA tracking loops,and the ML block synchronizer, employing QPSK. t/4-shift DQPSK, and 16-QAM modulation ina combined AWGN and static CCI channel. The simulation results are compared, for various numbers of interferers at C/I levels up to 10 dB, with the analytical results for RMS timing jitterderived in Chapter 3. From the obtained results, it is observed that the computer simulations validate the analytically derived theoretical results, except where the linear assumption is no longervalid for jitter values above about 0.02T in the cases simulated, where the analysis underestimatesthe simulation performance. This effect was also observed in [221 for the AWGN channel.For the ML NDA case, timing jitter performance is worse for a single interferer than for75Chapter 4: Computer Simulation of Symbol Synchronization in CC!larger numbers of interferers. This is not predicted by the analytical results of Chapter 3, and is dueto nonlinear performance of the synchronizer. The analytical results derived for symbol timing jitter in Chapter 3 assume the synchronizer has small jitter, and allows it to remain operation in thelinear PLL region. For the case of ML NDA synchronization with one interferer, the disturbance tothe timing wave has a larger amplitude, and forces the PLL out of the linear region. However, forlarger numbers of interferers, the simulations differed by less than 10% from the analytical RMStiming jitter results at high SNR, with C/I up to 10 dB.The ML DA scheme was found to he independent of the number of co-channel interfererspresent as predicted by analysis. The simulations for jitter performance are in good agreement withequivalent analytical results at high SNR, with errors of 15% or less at C/I up to 10 dB. However,the case of 16-QAM modulation differed by about 30% from predicted with no CCI present at highSNR. This is believed due to the amplitude variations of the signal’s bit-energy, which are notaccounted for in the analysis, and are not present in QPSK and ir/4-shift DQPSK cases simulated.It should be noted that the ML DA synchronizer simulated exhibited better performance than theML NDA synchronizer simulated, despite having a 20% larger equivalent noise bandwidth. Forthe case of 16-QAM modulation at C/I = 10 dB, it was observed that the ML DA synchronizertechnique exhibited twice the symbol timing jitter predicted at high SNR with M —* oo• This is dueto the ML DA technique using a decision device, which is susceptible to the extreme BER performance due to the high level of CCI present.The ML block synchronizer simulations showed that at a sampling rate of 161T and blocklengths of 32 symbols or more, the amount of additional symbol timing jitter due to CCI at levelsof up to C/I= 10 dB is not significant compared to the worst-case sampling error of time-granularitydue to the sampling rate.76Chapter 4: Computer Simulation of Symbol Synchronization in CC!Finaily. BER computer simulated results were examined. For C/I levels of up to 10 cIB, thesimulated results indicate that none of the syichronization schemes has a significant effect on theBER performance for either of the three modulation schemes examined. In all cases simulated, thedegradation of BER performance due to symbol synchronization was negligible compared to thecase of ideal symbol timing recovery.77ChapterS: Symbol Synchronization in Multipath Fast Fading Channels5 Symbol Synchronization in Multipath FastFading Channels5.1 IntroductionOne source of serious degradation in system performance for mobile wireless digital transmission is due to multipath fading. Fading introduces an irreducible error-rate in reception, due tothe random-FM modulation effect [3]. The effects of frequency non-selective (flat) and frequencyselective multipath fading on system performance have been studied extensively (see for example[31, [13], [14], [64], [65]). However, in the open technical literature, the problem of symbol synchronizer performance in fading channels has not received as much attention.A Ml. synchronization structure has been proposed for scattering channels which encompasses a whole range of frequency selective and non-selective fading channels [32], [33]. This synchronizer is a tracking loop which attempts to locate the peak received signal energy of eachsymbol in time and frequency, and use this as the optimum synchronization instant. However, thescheme utilizes information about channel characteristics in the form of the scattering channelautocorrelation function. The method’s computational complexity and reliance on channel information makes it an unlikely choice for implementation. Also, its symbol timing jitter and BER perfonnance are not predicted, so designers cannot accurately predict system performance for thistechnique.In [26] a complete synchronization system including symbol timing and carrier phaserecovery as well as carrier frequency offset estimation was implemented and tested via computersimulation and hardware measurement. The synchronizer operates on the same principles as the78Chapter 5: Symbol Synchronization in Multipath Fast Fading Channelsblock synchronizer previously described (see Section 2.4.3), using differential symbols for estimation of a QPSK modulated signal, performing all metric calculations with sampled phases. Thesystem has been tested to good result in a two-ray frequency selective fading channel, with datarate of 455 kBaud and with diversity selection included in the synchronization algorithm.In [61], the effect of multipath delay spread on a ML NDA symbol synchronizer wasexamined. It was found that an ‘infinitely fast’ timing loop, does not significantly improve BERperformance at high SNR, providing the separation of the equal-amplitude two-ray model is lessthan O.2T In this case, the cause of irreducible BER is due to eye closure caused by fading, and notby imperfect symbol synchronization. However, it should be pointed out that performance of thesynchronizer was restricted to hinary-PSK (BPSK), and delay spreads of less than O.2T Furthermore, in [61] the analysis assumes that delay spread is small compared to the symbol period, and isnot extrapolated to larger delay spreads. Furthermore, it is important to note that the performanceof DA and NDA tracking loops in flat fading channels have not been examined in the open technical literature over a wide range of BFT products. A significant advantage of these schemes is thatthey are simple to implement and their performance is well understood for AWGN channels. Thequestion examined in this chapter is how these schemes perform in frequency non-selective andfrequency selective fading channels, and whether more complex schemes are necessary in suchchannel conditions. To this end, this chapter examines the effect of frequency non-selective andselective fading on the ML NDA, ML DA, and ML block synchronizers through a simulationstudy using itI4-shift DQPSK modulation.This chapter is organized as follows: Section 5.2 introduces both frequency non-selective(flat) and frequency selective fading models used in the computer simulations to be performed.The results of those simulations are discussed in Section 5.3 for both types of fading, using ir/4-79ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsshift DQPSK as the modulation scheme for simulation. Finally, a summary of the chapter and itsconclusions are provided in Section 5.4.5.2 Fading Models5.2.1 Frequency Non-Selective (Flat) Fading Model DescriptionFrequency non-selective fading, or flat fading, is a model of the effect on a received signaldue to motion of the receiver. A signal received at a mobile receiver is a summation of reflectionsfrom many different scatterers in the surrounding terrain. Each signal arriving at a different anglewill suffer from a frequency shift due to the Doppler effect [3]. The effect of this frequency shifton the summation of signals from all directions results in a fading process known as frequencynon-selective fading [3], [14].Frequency non-selective fading can be modeled mathematically by the complex fadingprocess [13]:f(t) =f1(i) +JJQ(t) (EQ.5.1)wheref1(t) andfQ(t) are the in-phase and quadrature Gaussian random processes, respectively. Thefading process is a multiplicative interference, with the received signal expressed, in the absenceof AWGN, as [31:r(t) =f(t)s(t) (Eq.5.2)Such a representation may represent either Rayleigh (for which E [J (t)] = E [fQ (t)] = 0 ) orRicean (for which E [J, (t)] 0, E [fQ (t)] = 0 ) frequency nonselective (flat) fading, since thefading amplitude will follow either a Rayleigh or Ricean distribution.Figure 26 illustrates the generation of the fading process for simulation. The in-phase and80ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsquadrature functions are generated as white Gaussian noise, and then filtered by the fading filter,H/f). The characteristics of the fading process are controlled by the PSD of the fading process. Inthis thesis, the land-mobile fading model is used, so that [3]:I [j1c/JHf(f) = q V c (Eq. 5.3)1 o j9>FFigure 26: Block diagram of fading process generation for simulation.Although the magnitude of H/f) can approach infinity for f—* F, in the simulation themagnitude of H/f) is limited to 30 dB. The one-sided fading bandwidth, F is simply half of thedouble-sided fading bandwidth, BF. The level of fading is usually expressed as the product of fading bandwidth to symbol period, BFT The fading filter of Eq. 5.3 has been shown to closely modelRayleigh land-mobile fading processes [14], [56].For generation of Ricean fading, the signal is Rayleigh fading as above, and added to anunfaded version of the signal, whose amplitude can expressed as a power ratio of faded to unfadedsignals in dB:E[f(t)J2K= lOlog10 2 2 (Eq.5.4))where and are the variances of the in-phase and quadrature fading processes.f(t)realI-channelzz. complex0-channejn/2e81ChapterS: Symbol Synchronization in Multipath Fast Fading ChannelsThe simulation results presented are limited to BFT> 0.003, due to the frequency resolution needed to represent the land-mobile fading process in a frequency array. This limits the discussion to the ca.se of fast fading processes.5.2.2 Frequency Selective Fading Mode! DescriptionThe Rayleigh and Ricean fading processes model the arrival of scattered signals to amobile receiver. Each signal follows a path from transmitter to receiver of different length and maycombine to creare a composite signal which suffers time dispersion. While Rayleigh fading modelsa spreading in frequency due to the Doppler effect, time dispersion also models a spreading in timedue to different path lengths [13]. It is known as frequency selective fading since different parts ofthe signal spectrum may be affected in different ways. Time dispersion causes a time-varyingchannel impulse response which spreads the received signal energy over a finite time interval, usually denoted the channel time-spread, td [14]. Measurements of such channels in an urban envimnment show that most of the received energy fmm a transmitted signal is concentrated at onlyseveral distinct times, due to reflections from larger terrain features [17]. A simple way to modelsuch a channel is to reduce the time-spread to a second signal path, Rayleigh faded with a fadingprocess statistically independent from the original signal’s fading process, with an additional timedelay, td. The model for such a channel is shown in Figure 27, where the fading processes are generated as explained in Section 5.2.1.Measurements of such time-spreads for an urban environment give values of td in therange of 1-20 l.tsec [15], [16], [17], [66], which is up to 1/2 of a symbol period for a data rate of 24kEaud. For a mobile receiver, the time-spread of the channel will be changing as the receivermoves through the environment. The two-ray model above portrays the case where the time-82Chapter 5: Symbol Synchronization in Multipath Fast Fading Channelsspread changes slowly within the timeframe of the simulation. It should be noted, however, thatthe two-ray model is recommended by the Telecommunications Industry Association (TIA) Standards Committee for evaluation of system tolerance to delay-spread [57].Due to the severe degradation in system performance attributable to frequency-selectivefading. methods to counteract it, including time-varying adaptive equalization have been developed (see for example [58]). For the purpose of this thesis, however, it is assumed that no equalization is present.Frequency SelectiveFaded Signals(t)Figure 27: Block diagram of generation of a frequency-selective fadedsignal for simulation.5.3 Simulation Results and Discussion5.3.1 Fast Frequency Non-Selective FadingThe introduction of a frequency non-selective (flat) fast fading process to the channel has adeleterious effect on system performance, due to the random FM interference of the fading process[3], [13]. As seen previously in Section 2.2, the received signal must be cyclostationary in order83ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsfor timing recovery to take place. The received signal, along with its mean and autocorrelationfunction may he expressed as:r(t) =f(r) ckh (t—kT)A:E[r(t)] E[f(t)1E[ckih(tkT) (Eq.5.5)A:E[r2(t)j= E[f(t)1 E[ck]h2(r— T)where the information sequence {ck} is assumed statistically independent. Clearly from the aboveequation, the received signal remains a cyclostarionary process in the presence of Rayleigh orRicean fading, so symbol timing recovery is still a possibility.If the fading process is treated as a modulating waveform, the ML function may still beexpressed as in Eq. 2.7, where the estimated sequence, {ck} is now replaced by the total modulation, or:=cJ(kr) (Eq. 5.6)which is an estimate of the fading random FM as well as the symbol. The ML DA and ML blocksynchronizers will use this estimate over the entire symbol period, so it is important that the fadingdoes not change substantially over a symbol period. Since removal of this modulation term is theaim of the symbol synchronizer, it appears that symbol synchronization may work well in fadingenvironments where the fading is correlated over several symbol periods.Computer simulations were performed using the it/4—shift DQPSK modulation scheme,with raised-cosine Nyquist pulse-shaping, and an excess bandwidth of oO.35, which is the specification of the North American TDMA digital cellular standard [6]. The simulation used a sampling rate off5=64/T for the ML DA and ML NDA synchronizers, andf3=16/T for the ML block84Chapter 5: Symbol Synchronization in Multipath Fast Fading Channelssynchronizer, which utilized a block-length of K=64. Approximately 200 kbits were simulated foreach value attained, averaged over 6 simulations each for the tracking loops, and approximately500 khits, over 4 simulations, for the block synchronizer. all with the same parameters as describedin Section 4.2. For comparison, the performance with ideal symbol timing was approximatedthrough simulation with 64 samples/symbol, which results in negligible degradation in performance from the actual ideal sampling case.The tracking loop synchronizers were given a wide margin of 400 symbols in order toachieve timing acquisition, since the timing acquisition in worst-case simulations was observed toincrease by as much as 100% compared to the no-noise case, due to the added interference. Thispoints out the great advantage of the ML block synchronizer, which requires no acquisition periodand may be used with much more confidence in extreme failing conditions without concern forloss of tracking.Figure 28 shows the timing jitter error floor, or the irreducible symbol timing jitter performance over a range of BFT products. These simulations were performed with no AWGN present toexamine the lower limit on performance caused by fading. A number of observations and conclusions may he made from these results:1) Performance is similar for all synchronizers over a wide range of BpT products. ForBFT < 0.10, the RMS timing jitter is below 3.5% of a period, which is a severe fadingenvironment. This corresponds to a mobile cellular user travelling at 100 km/hr, transmitting on a carrier frequency of 850 MHz, with a data rate of less than 1500 Baud.Since the North American digital cellular system operate at 24 kBaud, at a frequencyabout 850 MHz, the most severe fading expected in such a communication system85ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsshould be BFT < 0.004 for operation from an automobile.0.0350.030.025V0.02V0.0150.01B,T ProductFigure 28: Symbol timing recovery performance in frequency non-selective Rayleigh and Ricean fading for the 3 synchronization schemes,no noise.2) The Ml. DA synchronizer outperforms the ML NDA synchronizer for this range offading, as was the case in AWGN and CCI environments.3) The ML block synchronizer performance is limited by the sampling rate of thereceiver, not by the fading in this range of BFT products. The timing offset of 3.125%of 7’, which is inherent in a block synchronizer with practical sampling rate of 16,7 is0.0450.04Irreducible Jitter vs. BT Fading ProductML NDA, Rayleigh FadingML DA, Rayleigh FadingML NDA, Ricean Fading, Kf —3dB• ML DA, Ricean Fading, K=3dBML NDA, Ricean Fading, K,=1O dlA ML DA, Ricean Fading,1=lOdB —0 ML NDA, Ricean Fading, K2OdB• MLDA, Ricean Fadin =20dB- -• H —.# —. — - - gl’::i[,ock Synchronizer, 1 6sI ii—--‘ / t— — — ———— 71.‘‘ ... r’——:. -—M4I uI lI1 P.. ...—“.— , — . - — — — I0.0050.001 0.01 0.186ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsdue to the ideal sampling instant falling halfway between samples in the simulation.4) The tracking loops begin to fail for BFT < 0.1. the ML NDA scheme showing a fasterdegradation as the fading is increased than the ML DA scheme. If the fading process isapproximated as having a rectangular PSD, for BFT = 0.1 the fading process is correlated over approximately only 20 symbols (since the autocorrelation is a sin(x)/x function, and its main-lobe extends over 20 symbol periods). With the fading processchanging this rapidly, the ML DA and NDA loops can no longer track the fadingchanges.5) Performance in Ricean fading with Kf> 20 dB is not substantially worse than theresults without fading, since the line-of-sight unfaded signal dominates (i.e., it is morethan 100 times stronger than the faded signal). Because of this, the pattern dependentjitter term dominates jitter performance with no noise present. Performance degradesas Kf is reduced, until the signal is essentially Rayleigh faded. For Rayleigh fading,timing jitter increases about 60% over the no fading case.The BER performance measured through simulation is presented in Figure 29. As can beseen, the jitter performance in fading leads to no measurable degradation in BER performanceover ideal sampling. It should he noted that the simulation results are for the case where noise isabsent, and only reflects the irreducible BER. In the absence of noise, irreducible errors due to eyeclosure from fading are not made any worse due to sampling error.From the results of this section, it is apparent that while frequency non-selective fadingcauses a serious degradation of system BER performance, its effect on symbol timing jitter is notsignificant at high SNR for most normally encountered frequency non-selective fading conditions87ChapterS: Symbol Synchronization in Multipath Fast Fading Channels(i.e., Rayleigh or Ricean fading with BpT < 0.1). Although symbol timing acquisition time is notthe focus of this thesis, it should be noted that acquisition time for the ML NDA and ML DA synchronizers in the simulations performed were significantly affected by the introduction of frequency non-selective fading, with specific observed cases exhibiting twice the acquisition timeover the no-fading case. This may warrant use of the ?1L block synchronizer in such a situation,since the algorithm does not require acquisition time as it is normally defined for tracking loops.VC)-e0.10.010.0010.0001Figure 29: Irreduciblelrreducible BER for fast flat fading channel, nonoise.B Product88Chapter 5: Symbol Synchronization in Multipath Fast Fading Channels5.3.2 Fast Frequency Selective FadingFrequency selective fading creates a much more severe form of degradation than non-selective fading since it spreads the received energy over time. While random FM modulation of asignal by Rayleigh or Ricean fading maintains the cyclostationary characteristics of the signal, frequency selective fading creates a spread signal which will cause much more uncertainty in the estimation of the correct sampling instant.Due to time dispersion the ideal sampling instant is no longer necessarily at T12 in eachsymbol period for the matched-filtered signal. In frequency selective fading the ideal samplinginstant is that which maximizes the SNR for each symbol [321. This corresponds to the time instantwhere received energy peaks in each symbol interval. For instance, for a two-ray model with eachray of equal power and tdO.2T, with irreducible BER performance about twice as bad as the optimum sampling case at td=T12. Except for the most extremecase, with equal amplitude rays, performance of the ML DA and ML block synchronizers track thecorrect sampling instant well, while the ML NDA synchronizer does not adjust as well to the frequency selective environment.91ChapterS: Symbol Synchronization in Multipath Fast Fading Channels0.1a)Ua)0.001Ray Delay tdFigure 31: Irreducible BER for 3 synchronizers in a frequency selectivefast fading channel (-10 dB and -3 dB rays), including the BER for T12sampling and for optimal sampling.Tracking of the optimal sampling instant is clearly shown in Figure 33, which plots thetiming offset from the T12 sampling instant for 256 blocks of 64 symbols with the ML block synchronizer. For the case of no interference, the synchronizer samples are close to zero offset (i.e. TI2). When the primary ray is Rayleigh faded and added to a secondary ray with offset td=O.43 andequal power, the average sampling instant is shifted towards the optimal sampling instant of t=T/2÷0.215T. However, as seen in Figure 32 the synchronizers’ performance begin to degrade for thecase of equal-magnitude second ray at a timing offset of td=T/2.92ChapterS: Symbol Synchronization in Multipath Fast Fading Channels0.1VV0.0010 0.4 0.5Ray Delay tdFigure 32: Irreducible BER for 3 synchronizers in a frequency selectivefast fading channel (-10 dB and 0 dB rays), including the BER for T12sampling and for optimal sampling.From the simulation results, it can be seen that even for the worst case condition, withrd=T/2, and equal amplitude rays, that the ML NDA technique increases the BER error floor byabout 100% over ideal sampling. The ML DA technique isicreases the BER error floor by about60%, and the ML block technique by about 50% over ideal sampling. For a second ray with amplitude 10 dB below the mam ray, the effect of any of the thie synchronization techniques is to raisethe error floor by less than 20%. It must be noted, however, that where the symbol synchronizationschemes are significantly worse that ideal sampling, the irreducible BER is already above 102.0.1 0.2 0.393Chapter 5: Symbol Synchronization in Multipath Fast Fading ChannelsTherefore, although a multipath environment can have a significant effect on the BER of a systemdue to non-ideal sampling at high SNR, system performance would already be marginal even withideal timing.Avg.OffsetITracking Performance of ML B’ock Synchronizer—16 samples/symbol. 64 symbol block lengthNo InterferenceIs. Fang, = 0.43, 0dB-0 50 100 150 200 250 300Block NumberFigure 33: Tracking performance of ML block synchronizer for it /4—shiftDQPSK modulation, without interference, and with frequency selectiveIn [32] and [33) a ML synchronizer was developed for a generalized frequency selectivefading channel. This synchronization structure, realizable as either a block synchronizer or a tracking loop, is a maximum likelihood estimator of the maximum energy location. However, its implementation requires information about channel characteristics, namely a filter whose impulse0.50.3750.25V0.1250VJ0.125-0.25-0.375fading.94ChapterS: Symbol Synchronization in Multipath Fast Fading Channelsresponse is the autocorrelation of the channel scattering function. Even provided that channel characteristics can be estimated, the best performance it can achieve is to improve irreducible BERperformance by up to 50% from the ML block synchronizer simulated at the worst conditionsexamined. Therefore for conditions where SNR is high, the added complexity of this scheme maynot he warranted unless multipath fading is severe.54 SummaryThis chapter has examined the performance of the ML NDA, DA, and block synchronizersfor the it/4—shift DQPSK modulation scheme in both frequency nonselective and frequency selective fast fading channels through computer simulation.Both Rayleigh and Ricean frequency non-selective fast fading were examined, with timing jitter measurements and BER performance provided. It was found that although frequencynonselective fading increases the RMS timing jitter of the synchronizers, all three synchronizerssimulated were able to match the irreducible BER performance of ideal sampling, over a widerange of fading with 0.003