Towards understanding and mitigating memory-access challenges in computing systems
department or school: Applied Science, Faculty of
department or school: Electrical and Computer Engineering, Department of
data provider: DSpace
degree campus: UBCV
creator: Dashti, Mohammad K.
issued: 2022-08-18T18:07:56Z
issued: 2022
related degree: Doctor of Philosophy - PhD
degree grantor: University of British Columbia
description: In an era of hardware diversity, the management of applications' allocated memory is a complex task that can have significant performance repercussions. Non-uniformity in the memory hierarchy, along with heterogeneity and asymmetry of chip designs, make the costs of memory accesses unpredictable if the allocated memory is not managed carefully. Poor memory allocation and placement on symmetric, non-uniform memory access (NUMA) server systems can cause interconnect link congestion and memory controller contention, which can drastically impact performance. Furthermore, asymmetric systems consisting of CPU and GPU cores suffer similarly depending on how memory is allocated and what types of cores are accessing it. Furthermore, modern chip designs are integrating compute units into the memory modules to bring compute closer to memory and eliminate the high costs of transferring data. Hence, accessing memory efficiently is becoming increasingly challenging as systems evolve toward heterogeneity. Our contribution is a detailed analysis and insight into software and hardware memory management techniques on modern symmetric server-class and asymmetric heterogeneous processors consisting of integrated CPU and GPU cores, and to recently commercially available Processing In Memory (PIM) systems. In particular, we examine three types of systems that are affected by memory access bottlenecks. First, we look at NUMA systems, then integrated CPU-GPU systems, and finally PIM systems. We analyze these systems and suggest possible solutions to mitigate memory access issues. For NUMA systems, we propose a holistic memory management algorithm that intelligently distributes memory pages to reduce congestion and improve performance. Then, we provide a detailed analysis of memory management methods on integrated CPU-GPU systems focusing on performance and functionality trade-offs. Our goal is to expose the performance impact of memory management techniques and assess the viability and adv…
aggregated CHO: https://circle.library.ubc.ca/rest/handle/2429/82400
note: Towards Understanding and Mitigating Memory-AccessChallenges in Computing SystemsbyMohammad K. DashtiBSc, Old Dominion University, 2004MSc, King’s College London, 2006MSc, Simon Fraser University, 2012A THESIS SUBMITTED IN PARTIAL FULFILLMENTOF THE REQUIREMENTS FOR THE DEGREE OFDoctor of PhilosophyinTHE FACULTY OF GRADUATE AND POSTDOCTORALSTUDIES(Electrical and Computer Engineering)The University of British Columbia(Vancouver)August 2022c©Mohammad K. Dashti, 2022The following individuals certify that they have read, and recommend to the Fac-ulty of Graduate and Postdoctoral Studies for acceptance, the dissertation entitled:Towards Understanding and Mitigating Memory-Access Challenges inComputing Systemssubmitted by Mohammad K. Dashti in partial fulfillment of the requirements forthe degree of Doctor of Philosophy in Electrical and Computer Engineering.Examining Committee:Alexandra Fedorova, Professor, Electrical and Computer Engineering, UBCSupervisorMargo Seltzer, Professor, Computer Science, UBCCo-supervisorSathish Gopalakrish, Associate Professor, Electrical and Computer Engineering,UBCUniversity ExaminerChen Feng, Assistant Professor, School of Engineering, UBCUniversity ExaminerPascal Felber, Professor, Computer Science, University of NeuchatelExternal ExaminerAdditional Supervisory Committee Members:Matei Ripeanu, Professor, Electrical and Computer Engineering, UBCSupervisory Committee MemberMieszko Lis, Associate Professor, Electrical and Computer Engineering, UBCSupervisory Committee MemberiiAbstractIn an era of hardware diversity, the management of applications’ allocated mem-ory is a complex task that can have significant performance repercussions. Non-uniformity in the memory hierarchy, along with heterogeneity and asymmetry ofchip designs, make the costs of memory accesses unpredictable if the allocatedmemory is not managed carefully.Poor memory allocation and placement on symmetric, non-uniform memoryaccess (NUMA) server systems can cause interconnect l…
has type: Thesis/Dissertation
date issued: 2022-11
is shown at: 10.14288/1.0417420
language: eng
degree discipline: Electrical and Computer Engineering
provider: Vancouver : University of British Columbia Library
publisher: University of British Columbia
rights: Attribution-NonCommercial-NoDerivatives 4.0 International
rights URI: http://creativecommons.org/licenses/by-nc-nd/4.0/
scholar level: Graduate
contributor: Fedorova, Alexandra
contributor: Seltzer, Margo
type: Text
identifier URI: http://hdl.handle.net/2429/82400