Applied Science, Faculty of
Electrical and Computer Engineering, Department of
DSpace
UBCV
Garcia Perez, Maria Celeste
Master of Applied Science - MASc
University of British Columbia
Power loss estimation is essential for the design and optimization of power converters. Traditionally, the power loss estimation is done using datasheet-level information about the switching devices. However, this information is limited to isolated operating points, compromising the accuracy of the estimation. In addition, the representation of PCB effects and gate driver, which cannot be considered by using datasheet parameters, increase the complexity of the tasks by adding more unknown magnitudes and more complex equations without guaranteeing their correct estimation. In this work, a novel power loss estimation method, which can be applied to any topology, is presented. This proposed method utilizes Design of Experiments (DoE) and Response Surface Methodology (RSM) to model the different types of losses in all the elements in a power converter such as power switches, diodes, and inductors. With RSM, simple equations explain the different types of losses as a function of variables that directly affect them allowing the losses estimation under any operating condition accurately. These models are extensively validated to show the advantage of using the proposed method and significant improvement with respect to datasheet calculations is obtained. For complex topologies such as Power Factor Corrector (PFC), accurate power loss estimation is not only necessary but also a challenge. To show the capabilities of the proposed model, it is applied to Universal PFC, which is a complicated converter in terms of loss calculation and analysis. Using the proposed models, the inductor is designed optimally and the optimal switching frequency is selected to minimize the losses in the different input voltage levels. Experimental validation of the proposed method, prediction, and design impact is presented; the proposed method yields a power loss reduction up to 25%, having the greatest improvement at an input voltage of 110 V, and an output power higher than 500 W.
9ccmrale Pgoer Dgkk Egdedk gf Cgehdep CgfnerlerkbyMaria Celeste Garcia PerezIng., Universidad Nacional del Comahue, 2015a thesis submitted in partial fulfillmentof the requirements for the degree ofEakler gf 9hhdaed Scaefceinthe faculty of graduate and postdoctoral studies(Electrical & Computer Engineering)The University of British Columbia(Vancouver)December 2019© Maria Celeste Garcia Perez, 2019The following individuals certify that they have read, and recommend to the Faculty ofGraduate and Postdoctoral Studies for acceptance, the thesis entitled:Accurate Power Loss Models of Complex Converterssubmitted by Maria Celeste Garcia Perez in partial fulfillment of the requirements forthe degree of Master of Applied Sciencein Electrical and Computer EngineeringEpaeafafg Cgeeallee2Dr. Martin Ordonez, Electrical and Computer EngineeringSupervisorDr. William Dunford, Electrical and Computer EngineeringCommittee Memberii9bklraclPower loss estimation is essential for the design and optimization of power converters. Tra-ditionally, the power loss estimation is done using datasheet-level information about theswitching devices. However, this information is limited to isolated operating points, com-promising the accuracy of the estimation. In addition, the representation of PCB effectsand gate driver, which cannot be considered by using datasheet parameters, increase thecomplexity of the tasks by adding more unknown magnitudes and more complex equationswithout guaranteeing their correct estimation.In this work, a novel power loss estimation method, which can be applied to any topology,is presented. This proposed method utilizes Design of Experiments (DoE) and ResponseSurface Methodology (RSM) to model the different types of losses in all the elements in apower converter such as power switches, diodes, and inductors. With RSM, simple equationsexplain the different types of losses as a function of variables that directly affect them allowingthe losses estimation under any operating condition accurately. These models are extensivelyvalidated to show the advantage of using the proposed method and significant improvementwith respect to datasheet calculations is obtained. For complex topologies such as PowerFactor Corrector (PFC), accurate power loss estimation is not only necessary but also achallenge. To show the capabilities of the proposed model, it is applied to Universal PFC,which is a complicated converter in terms of loss calculation and analysis. Using the proposedmodels, the inductor is designed optimally and the optimal switching frequency is selectedto minimize the losses in the different input voltage levels. Experimental validation of theproposed method, prediction, and design impact is presented; the proposed method yields apower loss reduction up to 25%, having the greatest improvement at an input voltage of 110V, and an output power higher than 500 W.iiiDaq SmeearqPower converters are an essential part of modern life since there are present in every singleelectronic device or equipment at small and large scales. Their power losses are complex tobe estimated accurately, which is critical for their design and optimization.In this work, power losses of fundamental elements of power converters are modeled em-ploying an accurate and flexible methodology. The proposed methodology is based on Designof Experiments, which is a time efficient and accurate statistical technique. The models canbe used to estimate power losses in any converter; in particular, the methodology is appliedto a Universal Semi-Bridgeless PFC. A new inductor design criteria is introduced, and anoptimization rule that maximizes the efficiency of the converter by adjusting the switchingfrequency for the different input voltage levels is proposed. A 25% power loss reduction isachieved.ivPrefaceThis work is based on research performed at the Electrical and Computer Engineering de-partment of the University of British Columbia by Maria Celeste Garcia Perez, under thesupervision of Dr. Martin Ordonez.Part of this work was presented to the IEEE Energy Conversion Congress and Exposition(ECCE), 2018 [1].• M. C. G. Perez, M. Mahdavi, M. Amyotte, E. S. Glitz and M. Ordonez, “Power LossesEstimation on a Semi-Bridgeless PFC Using Response Surface Methodology,” 2018IEEE Energy Conversion Congress and Exposition (ECCE), Portland, OR, 2018, pp.2873-2878.As first author of the above-mentioned publication, the author of this thesis developedthe theoretical concepts and wrote the manuscripts, receiving advice and technical supportfrom Dr. Martin Ordonez, and developed simulation and experimental platforms, receivingcontributions from Dr. Ordonez’s research team. Furthermore, some of the work in Chap-ter 2 was supported by Matthieu Amyotte, and Ettore Scabeni Glitz, who assisted in thedevelopment of the characterization procedure for one heat source to be used in Diodes andMOSFETs. They are acknowledged as secondary authors on the associated publication [1],and the collaborations resulted in the publications [2, 3].• E. S. Glitz, M. Amyotte, M. C. G. Perez and M. Ordonez, “LLC converters: Beyonddatasheets for MOSFET power loss estimation,” 2018 IEEE Applied Power ElectronicsConference and Exposition (APEC), San Antonio, TX, 2018, pp. 464-468.v• M. Amyotte, E. S. Glitz, C. G. Perez and M. Ordonez, “GaN Power Switches: AComprehensive Approach to Power Loss Estimation,” 2018 IEEE Energy ConversionCongress and Exposition (ECCE), Portland, OR, 2018, pp. 1926-1931.viLabde gf Cgfleflk9bklracl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . aaaDaq Smeearq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . anPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . nLabde gf Cgfleflk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . naaDakl gf Labdek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . apDakl gf Fagmrek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p9ccfgodedgeeflk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . paa) Aflrgdmclagf . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.2.1 Datasheet Power Loss Estimation and Parasitic Representation . . . 31.2.2 Design of Experiments . . . . . . . . . . . . . . . . . . . . . . . . . . 41.2.3 PFC Power Losses Estimation . . . . . . . . . . . . . . . . . . . . . . 41.2.4 Inductor Design and Optimization . . . . . . . . . . . . . . . . . . . . 51.2.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.3 Contributions of the Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.4 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8vii2 Pgoer Dgkkek Eklaealagf al lhe Denace Dened . . . . . . . . . . . . . . . . )(2.1 Power Losses in Diodes, MOSFETs, and Inductors . . . . . . . . . . . . . . . 112.1.1 Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.1.2 MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.1.3 Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152.2 Power Loss Estimation Using Datasheets . . . . . . . . . . . . . . . . . . . . 162.3 Design of Experiments Approach . . . . . . . . . . . . . . . . . . . . . . . . 172.3.1 Box-Behnken Design (BBD) . . . . . . . . . . . . . . . . . . . . . . . 182.3.2 Centered Face Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 192.3.3 Optimal Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192.4 Power Loss Measurements Using a Thermal Approach . . . . . . . . . . . . . 202.5 Design of Experiments Applied on Power Loss Estimation . . . . . . . . . . 222.6 Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252.7 Models Results and Validation . . . . . . . . . . . . . . . . . . . . . . . . . . 302.8 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353 Mfanerkad Seea-:radgedekk PFC 9hhdacalagf . . . . . . . . . . . . . . . . . 303.1 Semi-Bridgeless PFC Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 383.2 Inductor Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433.3 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443.4 Experimental Validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 473.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49, Cgfcdmkagfk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -)4.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53:abdaggrahhq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --viiiDakl gf LabdekTable 2.1 DoE designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Table 2.2 DoE design ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Table 3.1 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43ixDakl gf FagmrekFigure 1.1 General conceptual methodology employed: device level characterizationand PFC application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Figure 2.1 Conceptual methodology employed for the devices characterization . . . 12Figure 2.2 Theoretical diodes’ curves . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 2.3 Reverse recovery in a diode . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 2.4 Conduction and switching losses in a switch . . . . . . . . . . . . . . . . 15Figure 2.5 Box-Behnken Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 2.6 Centered Face Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 2.7 Optimal Design Example . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 2.8 Thermal Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Figure 2.9 Thermal equivalent circuit in a boost converter . . . . . . . . . . . . . . 22Figure 2.10 Power losses measurement at the device level . . . . . . . . . . . . . . . . 25Figure 2.11 Experimental setup used for devices characterization . . . . . . . . . . . 27Figure 2.12 Thermal resistors measurement procedure . . . . . . . . . . . . . . . . . 28Figure 2.13 Thermal calibration in boost converter . . . . . . . . . . . . . . . . . . . 29Figure 2.14 Characterization results for conduction losses in a switch . . . . . . . . . 31Figure 2.15 Characterization results for swirching losses in a switch . . . . . . . . . . 32Figure 2.16 Characterization results in diodes . . . . . . . . . . . . . . . . . . . . . . 33Figure 2.17 Characterization results in the inductor . . . . . . . . . . . . . . . . . . . 34Figure 2.18 Datasheet comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36xFigure 3.1 Conceptual methodology employed: PFC . . . . . . . . . . . . . . . . . . 39Figure 3.2 Semi-bridgeless PFC analysis . . . . . . . . . . . . . . . . . . . . . . . . 40Figure 3.3 Average and instantaneous currents in the PFC . . . . . . . . . . . . . . 42Figure 3.4 PFC simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Figure 3.5 PFC experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . 46Figure 3.6 PFC power loss accuracy and distribution . . . . . . . . . . . . . . . . . 48xi9ccfgodedgeeflkI would like to thank Dr. Martin Ordonez for his supervision. He established an outstandingexample of leadership, mentoring, research, supervision and instruction.I would like to thank my family, my parents Mirtha and Enrique, my sister Marianela andmy brother Alejandro who helped me and gave me the best example I could have asked for.I owe an overwhelming thank you to my boyfriend Pancho whose constant love, help, andsupport made all possible.I would like to thank all the members of Dr. Ordonez’s research group during the timeof my Master’s program. Their comments, discussion, suggestions, corrections, help, andsupport made this work possible and always pushed me forward.I would like specially thank Dr. Mohammad Mahdavi who guided me, advised me, andhelp me throughout the whole project. I would also like to thank Dr. Rouhollah Shafaei fortheir contribution to our shared work.I would also like to thank the University of British Columbia, the Faculty of Graduateand Postdoctoral Studies and the Electrical and Computer Engineering Department for theopportunity and support received during all this time. To all the faculty, administration andstaff I feel grateful.Finally, thank you for taking the time to read my thesis.xiiChahler )Aflrgdmclagf).) EglanalagfPower electronics converters convert electrical energy from one form to another. For instance,from DC to different levels of DC, AC to AC, and multiple combinations of both. Due totheir versatility and adaptability, they are everywhere and at any scale: from a cellphonecharger to a power distribution system. When electricity is transformed from one way toanother, some of it is lost as heat, warming up all its elements, which compromises thewhole converter. This energy lost is a power loss that is not transferred to the output of theconverter. Accurate estimation of power loss is an essential need to be satisfied for the futureof power conversion.Power loss estimation is essential for design and optimization of power converters. Inparticular, it has an especial connection with thermal management. Proper estimation isrequired for the design of heat-sinks and cooling systems that will make the system not onlyreliable but durable [4, 5] in a considerable period of time.Heat-sinks and cooling systems also determine, along with inductors, the final volumeof the converter. With an accurate power loss prediction, this volume can be minimizedmaking the whole system smaller in size, which directly affects manufacturing costs. Theoptimization of these items can directly change the final product. Optimization on the designof a power converter can only have a significant impact if the information that is used actually1reflects the reality closely. This also helps the engineers through the design process, reducingthe number of iterations to obtain the desired result.To optimize the design of thermal management and inductors, the power loss estimationnot only has to be accurate but it also has to be function of the variables that mainly affectthe processes. This makes the calculations flexible to be adapted accordingly to differentconfigurations and environment conditions.).2 Daleralmre RenaeoThe objective of this section is to present the body of work done in the areas of this work.In particular, several application notes, conference papers, journals, theses, and books havebeen studied to present this work, and they are listed in the following subsections making aclassification according to the particular topic they were used in.A literature review on power losses calculation using datasheet is carried out in Sec-tion 1.2.1. Datasheets are useful for power loss estimation since critical information aboutthe devices is provided. Even though it is invaluable, it derives in some limitations in thecalculations. The advantages and disadvantages of using this information are explained indetail, and some pieces of work are used to find out how particular problems are solvednowadays and to identify the areas at which improvement can be made.Design of Experiments is a powerful statistical tool that helps the organization of experi-ments providing a way of describing how processes respond to their variables. In Section 1.2.2,a brief explanation of its basis is presented along with its main advantages. In particular,a review of how this approach can be advantageous with respect to traditional ones is pre-sented. In addition, examples of how this tool was employed to solve and optimize complexproblems in different areas are cited.Next, Power Factor Corrector (PFC) converters are introduced in Section 1.2.3, explainingtheir main role in power conversion. A detailed review of power loss estimation in this typeof converters is carried out to learn the way this is done. Through this analysis, the keypoints and obstacles of the different methods are identified.2Inductors play a fundamental role in PFC converters. Modeling its behavior or its powerlosses is not a straight forward procedure. The way their power losses are modeled is pre-sented in Section 1.2.3. Moreover, the criteria used to design them in order to meet specificrequirements are analyzed. They also are a key point to optimize in the PFC since theircontribution to the total power losses in the converter is significant, and since its size sig-nificantly affects the final volume of the converter. Optimizations carried out on inductorsworking in PFC converters are studied in detail in order to determine the ways in which itsoptimization can be enhanced.).2.) Dalakheel Pgoer Dgkk Eklaealagf afd ParakalacRehrekeflalagfPower losses (esoss) are calculated using the devices’ datasheets [6–10], which is a very con-venient and fast method. Datasheet’s parameters can give a very accurate estimation at theprovided operating points, however, the accuracy is compromised when the data provideddoes not match with the real operating conditions of the device, such as gate-to-source voltage(Vns), drain-to-source voltage (Vks), drain current (Ik), and case temperature (ij) [8, 11–13].In addition, the parasitic, such as the PCB effects elements, are not incorporated in thesecalculations. Gate driver characteristics can not be incorporated either. These limitationslead to inaccurate estimations and several design iterations. In [14, 15], a methodology toincorporate the effects of the parasitics to the switching loss calculation is presented; how-ever, it results in complex expressions and does not incorporate other sources of losses. Themathematic equations result in a significant number of operations to be evaluated, makingthem high computational cost equations. The measurement of the parasitic components wasincluded in [16, 17] but also derived in many measurements due to the study of individualeffects, which does not guaranty the correct representation of each effect and their interac-tions. In order to model this kind of effect accurately, hundreds of measurements have tobe taken. This is due to the one variable-at-the-time variation, which has to be carried outfor one single dependency and on how these dependencies variation are modified when othervariables are changed at the same time. Because of it, this method to model processes can3be very time consuming and inefficient.).2.2 Dekagf gf EpheraeeflkDesign of Experiments (DoE) is a statistical method that is used to determine the variablesor fvxtors that affect a process and its output. Combining DoE with Response SurfaceMethodology (RSM) [18] it is possible to obtain an equation that models the output as afunction of the factors and do an extensive study of how every single factor, or multiplevariation of them, affect the response. This methodology also minimizes the number ofexperiments while keeping the accuracy of the model. It is particularly suitable for complex,multivariate problems because it provides models that explain single dependencies as well asinteractions of variables. In contrast, traditional approaches [19], may be unreliable, time-consuming, and expensive [20]. They involve a large amount of time due to the numberof measurements that have to be taken for every single variable in order to determine howthe output changes with them, and how their interaction affects the output. Moreover, theresult can not be trusted since a statistical analysis of error is not included in this kindof methodology. Due to all of these reasons, DoE has outstanding potential for power lossmodeling, estimation, and optimization since the influence of every single variable on thelosses can be studied. DoE has been used in the past for applications such as magneticcomponents, in particular, planar magnetics [21, 22] was studied to determine how differentgeometric designs affect the result. Furthermore, it was used in optimization of very complexmagnetics problems [23, 24] and metamodels for optimization [25], but never for complexconverters in which there are hundreds of switching events in one cycle.).2.3 PFC Pgoer Dgkkek EklaealagfRectifiers are required in most of the power conversion systems connected in cascade. Thisis due to the adaptation of the signals from AC to DC that is required for electronic andelectric systems. Passive rectifiers introduce harmonic distortion in the current signal wheninductive and capacitive loads are involved. This issue is solved by Power Factor Corrector(PFC) converters which by the use of active components shape the current to reduce the4harmonic content on it [26]. Their use is mandatory in most load-end converters connectedto the grid due to this advantage [27, 28]. There are many different PFC topologies [29], andthey can be based in buck [30], buck-boost [31], and boost [32] converters to suit a wide rangeof possibilities. Within the boost-derived PFC converters, the bridgeless topologies ones arepopular due to their higher efficiency [29]. The efficiency is improved due to the reductionof the number of devices in the current path, reducing conduction losses. In particular, thesemi-bridgeless is popular due to the EMI reduction [33].Power loss estimation in PFC converters is not only challenging due to the number ofdevices these topologies have, and also for the several switching events in only one cycle ofthe line frequency. Valuable methods for power loss estimation in PFC converters have beenpresented [34–37]. In these, the complex behavior of these converters is analyzed carefullyand in detail, however, they derive in the use of fixed values for MOSFETs parameters orinductor cores specifications, and complicated equations. These approaches can be improvedby adding the dependency on ij making the method able to respond to environment condi-tions, and simplifying the equations using DoE. Improved equations can be used for converteroptimization.).2., Afdmclgr Dekagf afd OhlaearalagfInductors are fundamental elements in power converters. Their basic design to meet differenttypes of requirements has been extensively analyzed in the past in [38, 39] for the boostconverter; and these basic designs were used in recent years with some variations for thePFC converters in [40] [41]. These basic criteria yield very conservative designs that meet allthe requirements but are oversized for most applications and can be optimized with advancedmodels. This not only opens room for improvement in the criteria utilized but also in howmuch the power losses can be reduced. Power losses modeling in inductors is a complextask that involves several parameters. Examples of their complexity can be found in [42],where extensive mathematical modeling was carried out, and in [43], where several trainingoperating conditions had to be considered. A simple model that accurately represents thelosses of these elements without requiring parameters that are difficult to be measured can5be of great use for applications that do not require such a high degree of detail.Optimization and inductor design were also proposed for PFC topologies, and, in most ofthe cases, they rely on fixed parameters for loss calculation provided by datasheets. Powerloss reduction using GaN and SiC devices was studied in [44, 45], and the great advantage ofthese devices can be observed. Inductor volume optimization was studied in [40, 46, 47], forwhich the main goals were to reduce the inductor volume while maximizing efficiency. Theseoptimizations focused on the selection of inductor core materials and windings, providingsteps to select the optimal design and including the EMI generated like in [48]. However, theinfluence of input voltage levels in a universal PFC application was not considered.).2.- SmeearqIn this section, a literature review on the main topics and resources studied to identify themain advantages and limitations of different pieces of work was presented. The analyzedpieces of worked involved power loss estimation based on datasheet information, the Designof Experiments approach to solve different problems of power electronics, PFC converters,and design and optimization of inductors working in PFC converters. In this analysis, it wasdetermined that datasheet-based losses estimation fails to cover different operating conditionsin the devices compromising not only the accuracy of the method but also making it unable torepresent in a flexible way the dependency of the different types of losses to all the variablesthat affect them. The optimization and inductor design of PFC converters was determinedthat they were mainly based on the selection of materials used to build the inductors, andnot on the main criteria used to calculate its value. Moreover, the influence of a universalinput was not included.These technical challenges are addressed in this work, proposing a new method for thedesign and optimization of power converters.).3 Cgflrabmlagfk gf lhe OgrcFrom the literature review explained above, there are key factors for power loss estimationand optimization of power converters that can be improved significantly. The work presented61sw,f2sw,fDoEDoEAccurateDoEVinin,minVsw,minfLi∆DesignL1sw,opf2sw,opfDoE CharacterizationTargeted PFC App.ModelOptimizationη1sw,f2sw,fPower Loss ModelsPower ConverterinPoutPLossesModelEstimationEvaluationOptimizationEvaluationEstimationFagmre ).)2 Conceptual methodology employed: A power converter is analyzed in termsof its elements ¶. Power losses of these elements are identified ·, and thenthey are modeled with a DoE approach in ¸. These models are function ofmany parameters that affect the different types of losses. By using the models,the power loss estimation of the converter can be simulated at any operatingcondition and can be applied to any converter ¹. The semi-bridgeless PFC isused as an application and an inductor design criterion is introduced ¶. Inaddition, and optimization for fsw is introduced in order to maximize efficiencyas a function of the universal input voltage levels.in this thesis proposes an innovative and flexible methodology that can be a start point of asignificant change on how these problems are solved in near future. The specific contributionsof this work are outlined below:• A comprehensive DoE approach for power loss estimation in power converters is pre-7sented. The proposed methodology is depicted in Fig. 1.1; It takes common elements ina power converter ¶, and it identifies their losses ·. It relies on measurements at thedevice level ¸ and provides models for the conduction (ejouk-Sx), and switching losses(esw-Sx) for the MOSFETs-type devices, the forward voltage drop (Vk) for diodes, andthe power losses (eS) for inductors. These are all crucial to determine esoss ·. Thesemodels are simple equations with a low computational cost that represent the interac-tions of all the relevant factors. Furthermore, they yield high accuracy with a minimalnumber of data-points. With these device-level models, accurate estimation of the sys-tem losses can be obtained without the need to build the converter. The proposedmethod can be applied to any topology.• The proposed method was used with a complex topology: Universal Semi-BridgelessPFC ¶ to illustrate its application. Highly accurate estimations of the power losses areobtained, and power losses distribution in the whole converter are identified. Then, theresults are used to optimize its design. The proposed estimations allows for multipleconfigurations to be evaluated at the design stage and the optimal configuration to bepicked ¸.• By analyzing the results, a new inductor design criterion that minimizes the value,volume, and thus power losses of the PFC inductors is introduced. This criterionachieves these goals while meeting the input current requirements.• Furthermore, an optimization in fsw for the input voltage levels of the converter is intro-duced. This optimization is made possible because of the highly accurate models thatdepend on the variables of interest, which are obtained with the proposed methodology.)., Lhekak OmldafeThe present work is organized in the following way:• Chapter 2 describes the different types of losses in diodes, power switches, and induc-tors which are the basic elements of a power converter. An introduction to Design8of Experiments is included, and the basis of the types of designs used in this workare explained. The limitations of datasheet based power loss estimations are included.Furthermore, a brief explanation of how power losses can be measured by employing athermal approach is explained.Moreover, the methodology developed based on Design of Experiments is explained indetail. For the application of this methodology, experimental measurements have tobe taken, and the whole procedure to measure every type of loss is analyzed. Experi-mental validation of the models is presented along with an extensive comparison of thedeveloped models with a simple and complex way of calculating power loss based ondatasheet. The results from the comparison show the higher accuracy of the developedmodels.• In Chapter 3, the proposed methodology is applied to a Universal PFC converter inorder to achieve three core results: (a) accurate prediction of the system-level powerloss, and power loss distribution within the converter. (b) A novel design criterion forthe inductor. The proposed criterion, steps outside from the conservative boundariesusually employed when designing inductors for PFC converters, yielding a new rulethat minimizes, inductor value, volume, and thus power losses, and (c) an optimizationrule derived from the power loss analysis of the Universal PFC is proposed. Thisrule finds the most efficient switching frequency for the different input voltage levelsfrom the universal input, making the whole converter to work optimally. Experimentalvalidation is presented, showing a reduction of power losses of up to 25% in the case ofan input voltage of 110 V and an output power higher 500 W.• Lastly, in Chapter 4 a summary and conclusion of this work are presented, along withsome details of the future research opportunities.9Chahler 2Pgoer Dgkkek Eklaealagf al lheDenace DenedTo estimate the total power losses in any power converter, first, the power losses of eachelement have to be determined separately. Then the losses of all the elements are integratedaccording to the specific operation of the topology to achieve the system level estimation.Generally, the most common elements found in a power converter are MOSFETs, diodes andinductors. Being able to estimate the losses in these elements accurately makes it possibleto estimate losses in any converter with a high level of accuracy, which is of significantimportance for thermal management and optimization.There are different types of losses associated with MOSFETS, diodes, and inductors.While in MOSFETs conduction (ejouk-Sx), switching losses (esw-Sx) can take place, in diodes,only conduction and reverse recovery losses are present. In the case of inductors, the totallosses are usually treated as the sum of core and coil losses. All these losses are affectedby several magnitudes such as gate-to-source voltage (Vns), drain-to-source voltage (Vks),current (ik), temperature in the case (ij), switching frequency (fsw) for MOSFETs, voltagedrop (Vk), ij, and ik for diodes, and fsw, ik, and inductor current ripple (∆iS) for inductors.The ranges of the factors involved may be affected by the topology under study.In this chapter, the proposed device-level characterization is presented, along with the keyconcepts and theories used to build them. Different sources of power losses in power switches,10diodes, and inductors are explained. This work focuses on MOSFETs as power switches, butthey could be IGBTs, SCRs, and others. In addition, the limitations of using datasheet basedmethods for power loss estimation are pointed out. The Design of Experiments techniqueis introduced along with some of the particular designs used in this work. In addition, themethod to measure power losses using a thermal approach is introduced.Using these outlined theories, the new models that explain the losses are introduced,experimental modeling of all types of losses explained above is presented. The methodologyemployed for the device characterization is illustrated in Fig, 2.1, the main elements of powerconverters are identified and along with their losses ·. The power loss models are builtusing DoE ¸, which, along with RSM, allows to obtain simple expressions for every singletype of power loss as a function of the variables of interest. In order to obtain experimentalmeasurements of all types of losses and thus create the models, a methodology to isolateand measure them is also introduced in this work. This technique is based on thermalmeasurements that help to maintain the level of accuracy while high-frequency signals areinvolved. The developed models are experimentally validated showing the high accuracyof the results compared to datasheet-based estimation in order to show the improvementachieved. In particular, the number of devices for which the characterization is carried outallows the use of the models for power loss estimation in a semi-bridgeless PFC topology.2.) Pgoer Dgkkek af Dagdek, EOSFELk, afd AfdmclgrkEach type of power loss in a power converter is caused by a different mechanism, and thereforeit is calculated in a different way. The accuracy of the estimations also depends on the methodutilized to estimate the losses, and how close to the actual behavior the representation ofthese mechanisms is. In this section, a summary of all types of losses on these elements ispresented and an explanation of how these losses have to be treated to improve the accuracyis introduced.11ModelOptimizationDoE CharacterizationAccurateDoEDoE)I,sw, fLi∆LP)c, Td, Igs, VdsV(swP)c, Td, IdsV(diodePDoEη1sw,f2sw,fsw,minf⇒)Li∆,inV(fPower Loss ModelsPower ConverterinPoutPLossesModelEstimationEvaluationOptimizationTargeted PFC App.Vinin,minVsw,minfLi∆DesignL110 V220 V=?inV1sw,opf2sw,opfEstimationEvaluationFagmre 2.)2 Conceptual methodology employed: Power losses of the common elementsin a power converter are identified ·, and then they are modelled with a DoEapproach in ¸. These models are functions that are function of many parametersthat affect the different types of losses.2.).) DagdekThere are many types of diodes, and the power losses may change depending on the partic-ular diode under study. Most of them have a relationship between current (ik) and voltage(vk) across them and for a given junction temperature (iq) as shown in Fig. 2.2(a). Theirconduction losses (ejouk-D) for a given operating point are calculated asejouk-D = vkik. (2.1)12Approximations may be used instead of this curve and, in some cases, only the maximumforward voltage drop (Vm ) is employed for all the operating points. This significantly affectsthe accuracy of the estimations. Another factor that compromises the accuracy is neglectingthe curves’ variation with the changes of iq, as depicted in Fig. 2.2(b), since the differentoperating conditions are not represented properly.didvfVjT(a)didvfVfV fVjTjTjT(b)Fagmre 2.22 Theoretical diodes’ curves for a single temperature of the junction iq in(a), and for a few iqDepending on the conditions at which the diodes are working, reverse recovery losses mayoccur. Figure 2.3 shows a reverse recovery event, when ik becomes negative and comes backto zero in a time trr. These losses are calculated as followsiddi/dtQrrttrrIrmFagmre 2.32 Theoretical diodes’ curves for a reverse recovery event.err = frrvkfswP (2.2)where fsw is the switching frequency, and frr can be calculated as13frr =Irttrr2. (2.3)Irt is the maximum negative current magnitude, and diRdt is the slope at which ik decreases.Due to (2.2), when the device is working at the line frequency (60 Hz) and the Irt doesnot become large and negative, these losses are neglectable. However, if the fsw is biggerand Irt has a large and negative magnitude, these losses become significant and have to beconsidered in order to obtain accurate estimations.There are also different types of diodes, Schottky diodes are used in this work. For apositive current, they behave as regular diodes, but they do not present reverse recoveryevents under any operating condition since trr is very small and can be neglected.2.).2 EOSFELkMOSFETs suffer different types of power losses, which result in the rise of the temperatureof the device. These losses can be due to conduction or switching events that take place innormal operation of the device. An idealized linear behavior of the switch is schematized inFig. 2.4. When the signal S commands the switch to turn on, first the current in the switch(isw) starts increasing, and when it reaches its maximum level Isw, the voltage in the switchvsw decreases until the minimum level is reached (Vou). Since there is an interval of time inwhich both isw and vsw are non-zero, some energy is lost. These losses are called “turn-onswitching losses (EswBou)”. An analogous process happens during the turn-off event, yieldingthe turn-off losses (EswBou). Together, they define the total switching losses in a device asEsw = EswBou + EswBomm . (2.4)When the MOSFET is on-state, it behaves as a resistor (Rks-ou). This resistor generatesa voltage drop (Vou) in the device during this state and energy is again lost (Eou).The waveforms during turning-on and turning-off events in a MOSFET are normallyconsidered in an idealized manner assuming the transitions of current and voltage are linear.In a real case, there are oscillations in these magnitudes which depend on several factors such14iswPswIswEonvswVoVonVoStttoff on offsw,onE sw,offEFagmre 2.,2 Voltage, current, and power in the switch when it is transitioning from theoff-state to the on-state and viceversaas gate driver and PCB effects. These non-linearities considerably affect power losses, forwhich the accuracy of the estimations is severely compromised by assuming ideal scenarios.Conduction and switching losses depend on many variables, which have to be considered inorder to obtain an accurate estimation. In the case of a MOSFET, these can be summarizedas gate to source voltage (Vns), drain to source voltage (Vks), current through the device (ik),case temperature of the device (ij), and switching frequency (fsw).MOSFETs usually have a diode in parallel with the switch called “body diode”. Thiselement creates other types of losses in the switching device: conduction and reverse recoverylosses.2.).3 AfdmclgrkAs power switches and diodes, inductors are present in almost any circuit. Power losses ininductors depend on how they are built and on the materials used. They can be a predominantwithin the power losses in the whole circuit, and that is why they have to be known as muchas possible. Power losses in inductors can be classified as core and coil losses. While core15losses are more significant than coil losses for low current levels, coil losses are predominantwhen the magnitude of the current is larger. A very common way of estimating the sum ofthese losses is usingeS =u∑p=)Rm(p)I2rts-m(p)P (2.5)where Rm(p) is the resistor of the inductor at the frequency f(i), and Irts-m(p) is the RMS valueof the current component at that f(i). The resistors values can be measured by using animpedance analyzer for the different frequency components that are present in the currentwaveform. The problem of this estimation is related to the DC current offset and level ofcurrent ripple that is used to measure these resistances. Normally, in a power converter, themagnitude of the current may reach or even be higher than 20 A, and a low current level ofan impedance analyzer may not be enough to have an accurate estimation. The magnitudeof the ripple of the current may also be high in a power converter, and cannot be representedaccurately by an impedance analyzer.2.2 Pgoer Dgkk Eklaealagf Mkafg DalakheelkIn order to calculate losses in diodes, MOSFETs, and inductors, it is a common practice touse datasheets provided by manufacturers. They are used to find out particular informationof the devices underuse, such as Vm for diodes, Rks-ou for MOSFETs, and core parametersfor inductors. A common difficulty in this practice becomes evident when specific data fordifferent operating conditions is required since datasheet only provide limited informationin terms of operating points. Moreover, some factors that significantly affect the powerlosses may not even be presented in the datasheets. For instance, the dependency on iq,and the correspondent thermal resistor from junction to case (Rq-j), may not be given forspecific variables. This could make the whole estimation unable to respond to environmentconditions.Furthermore, by using datasheet information, gate drivers or PCB effects can not beincluded in the calculations. This data depends specifically on the particular application,16and in some cases, only a measurement can provide the required parameters. Then, thepower loss calculation is not flexible enough to represent every single variation of variablesthat may significantly affect the result.The above complications derive in unreliable methods for power loss estimation, for whichhigh accuracy estimations is required for designing proper thermal management and do op-timizations.2.3 Dekagf gf Epheraeeflk 9hhrgachIn order to describe the power losses in every single element of a power converter in such a waythat all the variables that significantly affect all these mechanisms are taken into account,a different approach has to be considered. In this case, a mechanistic approach based onmany non-optimal measurements would not be suitable. It demands large amounts of timeand resources without ensuring accuracy. Moreover, the great number of variables that haveto be considered to obtain accurate and flexible models makes impossible the power lossescorrect representation with one factor at the time variation. This is due to the huge numberof measurements that have to be taken, and the proper representation of the interactionsof the variables with each other. Instead, a DoE approach combined with RSM [18] can beused to model all types of losses. These models are simple equations that can be used toestimate the losses under a wide range of operating conditions with a low computational cost.Furthermore, the interactions of all the variables are included in the models. This makes themodels able to respond to all the variations under any circumstances.For esoss and the variables that may affect it (e.g. Vns, Vks, Ik, ij, fsw, and ∆iS), letsassume that esoss = n , and all the variables are represented by xp, xq, and xr. The followingequation shows the generic form of the resultant model. This is a third order equation, whichis usually enough to cover all possible variations of the surfaces. The surfaces can be writtenas17n = βo +u∑p=)βpxp +p<q∑p=)u∑q=)βpqxpxq +u∑p=)βppx2p +p<q∑p=)u∑q=)βppqx2pxq++p<q∑p=)u∑q=)(βpqqxpx2q + βpqrxpxqxr)+u∑p=)βpppx3p P(2.6)where n is the surface, βo is the overall average of the measurements, βp are the regressioncoefficients, n is the number of factors involved, and xp, xq, and xr represent the independantvariables. The order of this equation can be increased to satisfy greater curvatures if needed.According to the number and specific location of the measurements, the number of vari-ables to be represented, and some specific desired characteristics, there are different waysto build the models. These different ways of representing the models are called “Designs”.These designs can be used in different scenarios; just some of them are applied in this work.These are WoxBWennken Design (BBD), Centerey Fvxe Design CFD, and dptimvl Design(OP). All of these are briefly described in the following subsections.A commercial software (Design Expert) [49] can be used to design and model all typesof losses. This is a user-friendly tool, suported by experts, that can facilitate Design ofExperiments to non-experts.2.3.) :gp-:ehfcef Dekagf (::D)The points required to build the BBD are depicted in Fig. 2.5 for three factors x), x2, andx3. The factors are represented in a normalized scale from [-1,1]. As it can be observed, thevery corners of the cube are not necessary to be measured. This helps to obtain the modelswithout going beyond the physical limits of the device under test (e.g. the measurementmight not be required at peak voltage and current simultaneously), which is one of thereasons for the popularity of this particular design. Moreover, this design allows having anequal resolution for each variable within the range and delivers models near to rotatability.A design is rotatable if the variance of the predicted response at any point x depends onlyon the distance of x from the center point of the defined domain. This unified variance is a18desired characteristic of the design because it can be rotated around its center point withoutchanging the prediction variance at x. The minimum number of variables to apply BBD isthree, which reduces the number of scenarios for which this design can be used.2x1−1−11001−101x3xFagmre 2.-2 BBD required points to build the model depending on three factors x),x2, and x3. This design does not require measurements in the corners of thedomain, and it produces a model near the rotatability2.3.2 Ceflered Face DekagfA CFD is a particular case of the Centrvl Composite Design (CCD), for which the star pointsare at a distance α = ±1. The star points are located in the middle of the domain forminga three-dimensional cross, as depicted in Fig. 2.6. The necessary points to be measured of athree factors design are also included in this figure. The minimum number of variables forCFD is two, and that is why this design is utilized in some cases of this work even thoughthe very corners of the domain are required to build the models and it does not producerotatable models.2.3.3 Ohlaead DekagfThe OD is a design that allows the arbitrary shaping of the domain (e.g. eliminating thecorners). It is useful to avoid complicated or impossible measurements. This characteristic isuseful since, as the BBD, it allows flexibility in the required points that may not be possibleto be measured. These restrictions are mainly linear as depicted in Fig. 2.7. However, the192x1−1−11001−101x3xFagmre 2..2 CFD required points to build the model depending on three factors x), x2,and x30. The corners of the doain are required, but the minimum number ofvariables is two.OD can be more complex in terms of the order of the equation to be built.1− 101−101x2xFagmre 2.72 OP example for the factors x), and x2. The corners of the design in grayare left outside the domain by the linear restrictions2., Pgoer Dgkk Eeakmreeeflk Mkafg a Lheread9hhrgachIn order to build the models, experimental measurements of power losses in the differentelements are required. The accuracy of the method to take the measurements directly affectsthe accuracy of the final models. Electrical measurement can be used to measure powerloss. Using voltage and current measurements is highly accurate for measuring DC signalsand low-frequency AC signals. For the high-frequency AC waveforms, an oscilloscope has to20be used, however, the accuracy of the measurements is compromised when high-frequencysignals are involved. In this case, an infrared red or fiber-optic based thermal approach ismore suitable because it is based on measuring the temperature rise of the device under testand that is why it not vulnerable to the characteristics of the electric signals.A power loss measurement in a switch or diode can be carried out using a thermal ap-proach easily by doing a calibration. This is, the relationship between power loss (esoss)and the difference in temperature between case of the device and ambient (∆i ) has to bedetermined under known esoss conditions first. This relationship can be obtained using afew conduction loss points that can be electrically measured once the thermal steady-stateis reached, as depicted in 2.8(a). These electrical measurements are highly accurate becausethe device is only conducting (there are no switching events introducing ringing and otherharmonic components). By employing this relationship, power loss measurement can be doneby measuring ∆i , and calculating esoss directly. Figure 2.8(b) schematizes this procedure.Linear regression is performed with the conduction loss (ejouk) measurements. The slope ofthis line is defined as the thermal resistance between case and ambient (Rto j-hti). By usingthis relationship, when power loss has to be measured, ∆i can be measured instead. Thethermal equivalent circuit for this arrangement is shown in Fig. 2.8(c).Device ConductingThermal steady statecondPMeasure:T∆ Regression Model(a)lossPPT∆T∆condPT∆amb-th, cR=lossPmeasurements(b)lossPdevice-cTamb-th, cRambT(c)Fagmre 2.02 Procedure to obtain the thermal calibration in (a), use of it to measurepower loss in a switch or diode in (b), and thermal equivalent circuit in (c).When there are different sources of heat near each other, as in boost converter with aswitch and a diode, a different procedure has to be carried out since the heat of one device21is affecting the temperature measurement of the other and vice versa. Attempting to derivethe model neglecting the second source leads to low accuracy. The thermal equivalent circuitin this case is shown in Fig. 2.9 where esw symbolizes the power loss in the switch, and ekin the diode. In this case, three thermal resistors (R), R2, and R3) are involved and haveto be determined before starting the power loss measurements. The thermal resistors can beobtained by turning on only the diode and only the switch and measure a few conductionlosses measurements as done in the previous case.TambTc-swTc-d2R3R1RswP dPFagmre 2.12 Thermal equivalent circuit for the switch and the diode working in a boostconverter2.- Dekagf gf Epheraeeflk 9hhdaed gf Pgoer DgkkEklaealagfThe proposed DoE-based method involves detailed elements characterization and allows themodeling of the power losses in any converter. The power losses estimation accounts for aMOSFET characterization in terms of its conduction losses (ejouk-Sx), and switching losses(esw-Sx). Moreover, a characterization of two different diodes, a Schottky and a low-frequencydiode. For these, conduction losses in the Schottky diode (ejouk-Dx), and conduction lossesin the low-frequency diode (ejouk-rDx) are carried out. Last but not least, power losses in sinductor (eSx) are characterized. The wide ranges at which the factors and their interactionsare evaluated provide an excellent tool to estimate and analyze power losses in a variety ofoperating conditions in a very complex topologies.The factors under study for the different models in this case are: ik, Vks, Vns, ij, fsw,22Labde 2.)2 Factors dependency for these elementsFactors and RangesVns [V] Vks [V] ij [◦C] Ik [A] fsw [kHz] ∆iS [A]Loss type Design [9 - 12] [40 - 400] [20 - 100] [0 - 20] [50 - 100] [0.72 - 4]ejouk-Sx BBD 3† 7‡ 3 3 7 7esw-Sx BBD 3 3 3 3 3 3ejouk-Dx CFD 7 7 3 3 7 7ejouk-rDx CFD 7 7 3 3 7 7eSx OD 7 7 7 3 3 3† thy typy of powyr lossys dypynds on thy spywifiw variavly or doys not (‡).Labde 2.22 Values for the DoE designsLevelsFactor Low Middle HighVns [V] 9 10.5 12Vks [V] 40 220 400Ik [A] 0 10 20ij [◦C] 20 60 100fsw [kHz] 50 75 100∆iS [A] 0.72 - 4and ∆iS. All these variables are demonstrated to be of statistical significance by the DoEmethod for each of the models. To start building the models, a first and low order equationis built. This is done to understand what are the factors that affect the processes and tohave an idea of what the order should be to guaranty high accuracy. After this, normallysome variables are taken out of the models according to their significance and a higher-ordermodel that utilizes previous measurements may or not be increased to be able to representthe curvature of all processes. Once a minimal error is met, the final model is tested againstexperimental measurements to ensure its accuracy. Thus, the final models are the result of amultivariable analysis that provides information in the form of response surfaces for energyloss during the processes.Mostly third order equations are suitable to represent the different types of losses. Ta-ble 2.1 summarizes the dependency of the five types of losses identified in the elements onthe different variables. It also indicates the ranges selected to characterize the devices, which23are chosen to be as wide as possible to use the models in all possible operating conditions.For ejouk-Sx , only Vns, ij, and Ik are the factors. a BBD design is used to build the model.This design is chosen since the model depends on three factors meeting the BBD requirement.Furthermore, it provides near rotatability models, and the measurements required do notinclude the very corners of the doamin as explained in 2.3.1.In the case of esw-Sx , more variables are involved. All variables listed in Table 2.1 affectthese losses significantly. For fsw, it is known thatesw-Sx = fswEsw-Sx P (2.7)where Esw-Sx is the switching energy dissipated. Due to this relationship, it is possible tomodel Esw-Sx instead of esw-Sx to reduce the number of variables. In the case of the currentdependency, Esw-Sx depends on the instantaneous value of it, and the sum of Ik and ∆iS areconsidered as one variable for the final model. With these assuptions, Esw-Sx depends on fourvariables: Vns, Vks, ij, and Ik+∆iS. A BBD design is used to build the model, as done withejouk-Sx , for the same desired properties of this particular design.The conduction losses of the Schottky and a low-frequency diodes, ejouk-Dx and ejouk-rDx ,only depend on two variables: ij, and Ik. Due to the low number of variables, a BBD designcannot be used, and a CFD design is selected instead. This design requires the very cornersof the domain as shown in 2.3.2, however, due to the flexibility of these power losses, themodels are built successfully.In the case of the inductors, an OD is employed due to the natural complexity and curva-ture of the power losses, and limited and variable range of the factors that affect the response.The limited variable range is due to the range of ∆iS that can be possible for each fsw. Thisis, for a boost converter, the maximum ∆iS can be calculated for the different fsw whenYSx = 0.524fsw = 50 kHz ⇒ ∆iSBthx = 4 Afsw = 75 kHz ⇒ ∆iSBthx = 2.667 Afsw = 100 kHz ⇒ ∆iSBthx = 2 A. (2.8)This sets a quadratic restriction for ∆iS in the given range of fsw. In the same way, theminimum ∆iS can be calculated for the different fsw when YSx = 0.1 or YSx = 0.9fsw = 50 kHz ⇒ ∆iSBtpu = 1.44 Afsw = 75 kHz ⇒ ∆iSBtpu = 0.96 Afsw = 100 kHz ⇒ ∆iSBtpu = 0.72 AP (2.9)setting another quadratic restriction in the domain.Table 2.2 shows the levels of the variables used for the different DoE designs. The highestpossible range was selected, and for BBD and CFD designs, the middle point of the ranges isused to build the models. The middle point is not required for ∆iS in OD since it is variable.2.. Dala 9cimakalagfSVdsIdIdTcVgs(a)RL DSVTcTambVgsIcVds C(b)STcHeatSinkTamb(c)Fagmre 2.)(2 In (a) the circuit used to measure the conduction losses of the switch(ejouk−Sx) and diodes (ejouk−Dx and ejouk−rDx), in (b) the topology used forswitching losses in the switch (esw−Sx), in (c) the location of the temperaturemeasurements in the device and the ambient.Figures 2.10(a) to 2.10(c) show the circuits used to isolate and measure each type of loss.The circuit in Fig. 2.10(a) is used to measure ejouk-Sx ; since it depends on three variables(Vns, Ik, and ij), 17 measurements are taken changing their levels. To model ejouk-Dx and25ejouk-rDx , the voltage drop of the diodes is measured for different currents and different ij.For esw-Sx , a boost converter, as shown in the Fig. 2.10(b), is used. By employing a near zeroduty cycle, it is possible to measure esw-Sx with almost no influence of ejouk-Sx . In this way,the model obtained accounts for the sum of EswBou and EswBomm simultaneously. Figure 2.10(c)shows a view of the heatsink and MOSFET indicating where their respective temperature aremeasured. Figure 2.9 schematizes the equivalent thermal model determined by the MOSFETand diode in the boost converter. This model is utilized to measure the losses in the switchand the diode in the boost converter since both devices work at the same time and the heatproduced by one affects the other causing error in the measurement of tempetature of theindividual devices.The same boost converter circuit is used to measure eSx from the input and output powereS = ∆e − esw − ekP (2.10)where ∆e indicates the power losses in the whole converter, esw the total losses in theswitch, and ek the losses in the diode. The difference ∆e is measured using a power analyzer(Yokogawa WT3000E).To build these response surfaces, experimental measurements are taken using fiber optictemperature sensors from [50] to measure ij and ihti. These particular sensors are employeddue to their immunity to electrical noise and to their extremely high accuracy of ±0.1◦Ccompared to thermocouples or thermal cameras in which the accuracy is around ±2◦C.The experimental setup used is shown in Fig. 2.11. Figure 2.11(a) shows in Ê the thermalchamber, in Ë the microcontroller that controls the circuit, in Ì the thermal sensing device,and Í the platform inside the chamber. This thermal sensing device communicates with thesensors an provides the data to a user interface displayed in Î. To control Vns and power upthe DSP, the power supply in Ï is used. Depending on the model being built, either the highaccuracy voltmeters (HP 34401A) in Ð are used to measure Vns and Vks, or the oscilloscope(Lecroy 604Zi) in Ñ is used to control the duty cycle, Vks, Vns, and Ik for the switchingmodel. Figure 2.11(b) shows the boost converter in a closer look, Ò indicates the switch and26(a)(b)TambTc-swTc-d[h:m]t18:35 18:50 18:45]C◦ [cT2537.540(c)Fagmre 2.))2 (a) Picture of the experimental setup, Ê Thermal chamber, Ë DSP basedcontroler of the topology, Ì Osensa thermal measurement stage used to takethe temperature measurements, Í topology inside of the chamber, Î computerto read temperature measurement, Ï low power supply to control Vns anto topower up DSP are presented, Ð high accuracy voltmeters to measure Vks andVns, and Ñ osciloscope to control duty cycle in switching measurements. (b)Close look from the platform, Ò switch and diode for the boost converterwith individual heat-sinks, and thermal sensors for switch, boost diodes, andambient Ó (c) Capture of the thermal stage when only the switch is turned on.diode with individual heat-sinks, and Ó are the three thermal sensors. Figure 2.11(c) showsa capture of the thermal sensors, only the switch is turned on producing a sudden rise inij-sw. A change in ij-k takes place when the switch is turned on, which reflects the thermal27connection between switch and diode, while ihti does not change.TambTc-swTc-d2R3R1RswP2T∆1T∆= 0dP(a)TambTc-swTc-d2R3R1RdP4T∆3T∆= 0swP(b)Fagmre 2.)22 Methodology employed to find out the thermal resistors in the thermalmodel, first only turning on the switch in conduction mode in (a) measuringthe temperature difference between case of the switch and ambient, and casesof the switch and diode, and only turning on the diode in (b) recording thechanges in the differences in tempetature from case of the diode to the case ofthe switch and ambient.In order to obtain the thermal resistors R), R2, and R3 of the thermal model depictedin Fig. 2.9, a calibration of the setup must be carried out. As explained in 2.4, conductionloss measurements, due to their easy and accuracy of the electrical measurement, have tobe taken to know ∆i of the correspondent esoss. This has to be done first only turningon the switch as it is shown in Fig. 2.12(a), and determine ∆i) and ∆i2 for a couple ofmeasurements. Then, Rlx - ) and Rlx - 2 are obtained asRlx - ) =∆i)esw=R) (R2 +R3)R) +R2 +R3P (2.11)Rlx - 2 =∆i2esw=R)R2R) +R2 +R3. (2.12)In the same way but turning on only the diode as depicted in Fig. 2.12(b), Rlx - 3 and Rlx - 4 canbe obtained. The result of the calibration are shown in Fig. 2.13, and the thermal resistorsare as followsR) = 1.46◦CRWP R2 = 56.33 ◦CRWP R3 = 1.34 ◦CRWP (2.13)28where R2 is much greater than the other two because the switch and the diode have individualheatsinks, but still there is an electrical connection, due to the boost converter, between them.With these results, the power loss of the switch and diode for any operating condition areobtained by measuring ∆i), ∆i2, ∆i3, and ∆i4 andesw =∆i)R)+∆i2R2P (2.14)ek =∆i3R3+∆i4R2. (2.15)It is important to clarify that any initial difference in ij-sw, ij-k, and ihti when the poweris off has to be compensated to avoid errors in the estimations. The compensation consistsof making all the temperatures equal when no power is beeing dissipated.0 5 10 15 20 25 300510152025303540dP33.= 13T∆dP27.= 14T∆swP4.= 12T∆swP43.= 11T∆)1≈2R)1≈2R)1≈2R)1≈2RFagmre 2.)32 Calibration of the boost converter switch and diode to predict power lossdue to a change of temperatureIt is important to notice that, since the models are built based on experimental measure-ments, the PCB and gate driver effects are included. This makes the models able to representbehaviors that can not be considered by using datasheet information.292.7 Egdedk Rekmdlk afd VadadalagfThe results of the characterization of Rks-ou are shown in Fig. 2.14(a), and ejoukBSx in thedevice are shown in Fig. 2.14(b). They are drawn as a function of Vns and Ik for differentvalues of the ij. Rks-ou increases significantly with the rise of Ik and ij, while it is lesssensitive to the change of Vns. As a result, ejouk-Sx is more sensitive to the change in Ik andij than to the change in Vns. However, Vns is still a statistical significant variable, and if itis neglected, the accuracy of the model is compromised.The results for esw-Sx are shown in Fig. 2.15(a) and 2.15(b). They strongly depend onVks and Ik, while they are less sensitive to ij and Vns. The maximum energy lost is givenfor the maximum Vks and Ik. The minimum value of energy lost is defined by the minimumof them. This minimum is not zero, it strongly depends on the energy stored by Coss. Theinteraction of Vks and Ik is essential for an accurate estimation, and as it can be seen, therelationship between Esw-Sx and the variables Vks and Ik is not linear as some power lossestimation methods assume.The voltages drops in the boost and returning diodes (VkBBoost and VkBR) are plotted inFig. 2.16 as a function of ij and Ik. The Vk increase significantly with the increase of Ik,while they decrease by increasing ij.Figure 2.17 shows the resulting surface for the inductor power losses as a function of theamplitude of the ripple in the inductor (∆iS), the average current in the inductor (Ik), andthe switching frequency (fsw). In this case, not all combinations of the factors are possible:while Ik and fsw can take any value in the range, ∆iS is tied to fsw. For a given Vo, L, andfsw, ∆iS is bound by the possible values of YSx as∆iS =YSx (1−YSx)VofswLP (2.16)with a maximum of 0.52VoRLfsw for YSx = 0.5 and a minimum of 0.09VoRLfsw for YSx = 0.1or YSx = 0.9. Therefore, the minimum and maximum ∆iS are limited for a given fsw. WhereYSx is the duty cycle, Vo is the output voltage, and L is the inductor value. As fsw increasesthe range of variation of ∆iS becomes smaller. To account for this, a restriction in the domain3030124014506010.510.57073.59 0C◦100C◦80C◦60C◦40C◦201050 1536373839404142[A]dI= 9 VgsV= 12 VgsV12] V−, [9↑gsVC◦= 40cT(a)0125141010.510.51573.59 0C◦100C◦80C◦60C◦40C◦20[W]xcond,SP(b)Fagmre 2.),2 In (a) results of the characterization for Rks-ou, and in (b) for conductionpower loss in the switch, both as a function of temperature in the case ij, Vns,and Ikhas been set in the OP utilized. Figure 2.17 shows that the losses increase with the increaseof fsw, however, since the ∆iS is lower for higher fsw the losses go down at the same time.Figure 2.17 also shows that when Ik approaches zero, eSx tend to a non-zero value. This levelchanges with fsw, and also reflects the nature of the power losses in the core of the inductor310400501001415010.520022025073.540 0C◦100C◦20J]µ[xS-swE=cT(a)0400501001415010.520022025073.540 012 V9 V=gsVJ]µ[xS-swE(b)Fagmre 2.)-2 In (a) results of the characterization for switching losses in the switch asa function of Vks and Ik for a fixed Vns and two values of ij, and in (b) for fixedij and two different values of Vnssince it becomes more dominant for low current.The proposed models are validated through comparison with experimental measurementsand datasheet calculations. The first approach involves the simplest way of calculating powerloss with the datasheet using maximum ratings as it is usually done. In this approach, the320.41000.8141.210.5601.673.520 0(a)0.41000.6140.810.560173.520 0(b)Fagmre 2.).2 In (a) results of the characterization for the voltage drop in the boostdiode and in (b) the returning diode, both as a function of temperature in thecase ij and current Ikwell-known triangles calculation is used for switching losses. The second approach usingthe datasheet increases the difficulty of the calculation aiming to improve the accuracy ofthe estimations, and thus establishing a more competitive comparison with the developedmodels. It is important to clarify that this more complex calculation using datasheet is not3304536102 42175 kHz100 kHz= 50 kHzswfFagmre 2.)72 Characterisation result for the power losses in the inductor as a functionof ∆iS, and ik for different fswalways possible because it depends on the information provided by the manufacturers forparticular cases.For the more complex case of datasheet calculation, the following approach is utilized.The variable resistor Rks-ou is estimated mapping the curve of Rks-ou = f(iq) provided bythe manufacturer and calculating the correspondent value given a junction temperature iq.For the boost and returning diodes a similar strategy is taken, but in these cases, the curvesof Vk = f(IkP iq) are used. Switching losses are more complicated since many variables haveto be taken into account. The procedure used for the later is an adaptation of the describedin [19] with the difference of that the energy stored in the parasitic capacitor of the MOSFETCoss is also included. For this energy the curve from the datasheet Eoss = f(Vks) is employed.The inductor losses calculation is particularly complex due to all the unknown parameters,such as core material parameters, when a hand-made inductor is built. To estimate the lossesin this component (2.5) is used.The comparison results of the datasheet calculations and the developed models using DoEare shown in Fig. 2.18. In this figure four different comparisons are depicted: Rks-ou, VDBBoost,Esw, and eS. In all of them, a few operating points are drawn to validate the proposed34methodology. For Rks-ou, VDBBoost, and Esw the datasheet calculation using maximum ratingis usually far away from the real measurement (60% error in the worst case showed), showthat even though this is the easiest way to estimate losses, it is not useful for high accuracyrequirements. This behavior is due to the variability of the different parameters for changingoperating points. The most complex datasheet calculation has lower error, however, stillthere are high errors (around 13% or more) in some regions. The developed models aresuperior than both datasheet based calculations for these three cases. The only point atwhich datasheet based calculation had lower error is for low current in the switching modeldue to the difficulty of measuring the small power loss. In the case of the inductor, thedescribed empirical model from (2.5) is used to make the comparison with the developedmodel. In this comparison, it can be seen that the empirical model is not a good solutionto estimate the losses since its error is between 30-40%, this is mainly due to the lack of DCcurrent bias of the impedance analyzer since it changes the value of the resistors considerably.On the other hand, the error of the developed model is lower than 0.15%.This validation shows that the developed models are suitable for high accuracy estimationof power losses in all of these components. In the following Chapter an optimization of theUniversal Semi-bridgeless PFC is carried out. The methodology can be easily expanded toother elements of power converters.2.0 SmeearqIn this chapter, the proposed device-level power loss characterization is presented. The keyconcepts and fundamentals used to derive it are analyzed. Fundamental losses characteris-tics of power switches, diodes, and inductors were introduced. The Design of Experimentstechnique is briefly explained along with some particular designs that are used in this work.Moreover, the method to measure power losses using a thermal approach is explained.The proposed characterization gave, as a result, accurate power loss models for conductionloss in diodes, conduction and switching losses in MOSFETs, and the total inductor losswhich is the sum of core and coil losses. These models were developed using DoE and RSM35[%]reon-dsR[A]dI517191310 15Datasheet max. ratings Datasheet complex Developed Models Empirical Model75 V.= 9gsV C◦= 60cT[%]re[A]dI5 10423015228C◦= 40cTD,BoostV[%]re[A]dI3.52607 10.54512C◦= 40cTswE5 V.= 10gsV = 220 VdsV[%]re[A]dI52 7LP0.15= 50 kHzswf8 A.= 3Li∆7 A.= 2Li∆10.719.4Fagmre 2.)02 Comparison of relative errors of the proposed models against datasheetcalculation for the cases of MOSFET and diode, and against empirical modelfor the inductortechniques, which provided very simple equations in a simple form with low computationalcost. The models are function of all the factors that affect the different types of power lossesin a wide range. Due to it, they can be used to estimate power losses in these componentswith high accuracy and flexibility in evaluating the operating conditions. Because theseelements are present in any power converter, this methodology can be applied to estimatepower losses in any power converter with high accuracy.The methodology presented utilized thermal measurements to obtain the experimentaldata needed to build the models. Two scenarios of thermal equivalent circuits were analyzed,the first with only one source of heat present, and the second one with two sources. Thethermal interaction of these two sources was explained in detail and the process to do the36prior calibration to the power loss measurement was described.The resultant models for all the types of losses were extensively validated experimentallyand compared to two different methods based on datasheet for power loss estimation. Thefirst datasheet based method involved the utilization of maximum ratings, and the secondmethod involved more complex equations that aim to increase the accuracy by includingvariable dependencies and representation of different effects. Overall, the comparison showedthat the proposed models are much more accurate than both datasheet based methods, whichvalidates the use of these models as high accurate estimation method to be applied in anyconverter. Moreover, since the models are based on experimental measurements, PCB andgate driver effects are included. This makes them able to represent effects that cannot evenbe considered by datasheet-based method.37Chahler 3Mfanerkad Seea-:radgedekk PFC9hhdacalagfThe proposed methodology allows to develop power loss models at a device level, in thischapter, those models are integrated with a sample converter as shown in Fig. 3.1 (theUniversal Semi-Bridgeless PFC topology) to show the power and capabilities of this method.This topology was selected due to its wide use in power converters connected to the gridand its complex behavior, and a detailed power loss analysis of the converter is presented¹. Furthermore, along with the PFC analysis, an inductor design criteria ¶ that reducesthe required value of inductance is introduced, and simulation results for a wide range ofoperating conditions are shown. Moreover, an optimization for the Vpu levels is carried outby adjusting fsw in order to meet the input current requirements and to maximize efficiency.For this analysis, it is assumed that the converter is operating in the Continuous Conduc-tion Mode (CCM), that it is in steady state operation, that the output capacitors are bigenough to regulate the bus voltage, and that the same type of devices working in the positivehalf-cycle are used n the negative half-cycle.3.) Seea-:radgedekk PFC 9fadqkakThe semi-bridgeless PFC topology is presented in Fig. 3.2(a). To estimate the power lossesin each device in the circuit, its operating modes have to be analyzed. Its behavior in the38ModelOptimizationDoE CharacterizationAccurateDoEDoE)I,sw, fLi∆LP)c,Td,Igs,VdsV(swP)c,Td,IdsV(diodePDoEη1sw,f2sw,fsw,minf⇒)Li∆,inV(fPower Loss ModelsPower ConverterinPoutPLossesModelEstimationEvaluationOptimizationEvaluationTargeted PFC App.Vinin,minVsw,minfLi∆DesignL110 V220 V=?inV1sw,opf2sw,opfEstimationFagmre 3.)2 Conceptual methodology employed: By using the models, power loss esti-mation of a converter can be simulated at any operating condition and can beapplied to any converter ¹. The semi-bridgeless PFC is used as an applicationand an inductor design criterion is introduced ¶. In addition, and optimizationfor fsw is introduced in order to maximize the efficiency as a function of theuniversal input voltage levels.two half-cycles is symmetrical, therefore only the positive half-cycle operation is discussed.During the postive half-cycle (Vpu S 0), the only devices that participate in the operation areS), Y), and Y4; during the negative half-cycle work shifts to S2, Y2, and Y3. Figures 3.2(b)and (c) illustrate the behavior of the circuit during the positive half-cycle of Vpu. As shown,S) and Y) operate in complementary mode. When S) is in on-state, the indutor (L)) buildsup current, and when S) changes to off-state, Y) turns on and the energy stored in L) is39VinL1D1D3D4D2S1S2L2RC(a)VinL1D1D3D4D2S1S2L2RC(b)VinL1D1D3D4D2S1S2L2RC(c)Fagmre 3.22 In (a) the semi-bridgeless PFC topology is presented, the devices that comeinto play depend on which semi-cycle is being studied; during the positive semi-cycle, the circuit alternates between (b) Mode 1: Y4 and S) on and (c) Mode 2:Y) and Y4 ontransfered to the output capacitor (C). When Vpu becomes negative, the procedure repeatsitself with the other set of components (S2, Y2, Y3, and L2).The total esoss in the this topology (etoths) is given by40etoths = epukujtors +∑∀pepP (3.1)where epukujtors are the losses in inductors L) and L2, and ep are the losses in each device S),S2, Y), Y2, Y3, and Y4.The average losses in the inductors are considered ase pukujtors−x =12.∫ 2π(eS (∆iSP fswP ik(ωt)) dωtP (3.2)where x symbolizes the leg of the converter, ∆iS is the inductor ripple, and ik(ωt) is theaverage current in the inductors. The losses in a switch Sx are given byeSx = ejouk-Sx + esw-Sx P (3.3)where ejouk-Sx and esw-Sx are the conduction and switching losses. The average of ejouk-Sxand esw-Sx in one line-frequency cycle are given bye jouk-Sx =12.∫ 2π(YSxejouk-Sx (VnsP ik(ωt)) dωtP (3.4)e sw-Sx =12.∫ 2π(esw-Sx (VnsP VksP ijP ikr(ωt)) dωtP (3.5)where ik(ωt) is the current through the device when it is conducting and ikr(ωt) when switch-ing, and YSx is the duty cycle. The currents ik(ωt) and ikr(ωt) are depicted in Fig. 3.3. TheYSx is given byYSx = 1−(VpuBwlhrVo)sin (ωt)P (3.6)where VpuBwlhr is the peak value of the input voltage, and Vo is the output voltage. Thisequation for YSx comes directly from the boost converter gainVoVpu=11−YSxP (3.7)41t)ωt(di(a)t)ωt(dri(b)Fagmre 3.32 Average current in (a), and instantaneous current in (b).but in the PFC case, Vpu is an AC signal.The boost diodes (Y) and Y2) and returning diodes (Y3 and Y4) do not have reverserecovery losses. This is because the boost diodes are Schottky and the returning diodes onlywork at the line-frequency; thus, they have only conduction losses. Their power losses canbe expressed ase jouk-Dx =12.∫ 2π((1−YSx)ejouk-Dx (ik(ωt)P ij) dωtP (3.8)e jouk-rDx =12.∫ 2π(ejouk-rDx (ik(ωt)P ij) dωtP (3.9)where Yx are the boost diodes, and rYx are the returning diodes. In (3.2), (3.4), (3.8),and (3.9) the current through the devices is given byik(ωt) =2eoVpuBwlhrsin (ωt)P (3.10)where eo is the output power of the converter. For (3.4), ik(ωt) also includes a ripplecomponent, which is a triangular signal modulated by the amplitude of the ripple in theinductors, is given by∆iS =YSxVpuBwlhr sin (ωt)fswLP (3.11)42Labde 3.)2 SpecificationsParameter Symbol ValueInput voltage Vpu 110-220 VSwitching frequency fsw 50-100 kHzCurrent ripple ∆IS 30%Output power eo 1000 WOutput voltage Vo 400 Vwhich also comes from the boost converter equation∆iS =YSxVpufswLP (3.12)for an AC input voltage.In (3.5), the current used is defined as ikr(ωt) = ik(ωt) + ∆iS, which is the instantaneouscurrent through the device.3.2 Afdmclgr DekagfInductors are an essential part of power converters that significantly affect their resultantvolume and power losses. In most cases, they are designed considering conservative criteriathat may not be optimal in terms of these parameters, opening room for improvement.Traditionally, the inductors for the PFC operated in CCM are designed usingL =Vo4fsw∆ISP (3.13)Equation (3.13) is obtained considering the worst case of YSx , which is given by 0.5, andthe maximum fsw for the components used [40] [41]. In it, Vo is the output voltage of theconverter, fsw is the switching frequency, and ∆IS is the maximum allowed amplitud ofthe current ripple. For the specifications given in the Table 3.1, where a 30% of ripple isselected [51] [52] [40], a 800 µH is obtained.This work proposes a novel design criterion for the PFC’s inductor that improves the over-all efficiency of the converter and reduces its volume. Traditionally, the PCF’s inductors aredesigned to meet the input current ripple requirements with the maximum possible switching43frequency and input voltage; however, this leads to overdesign in most operating conditions.In this work, the inductor is designed to meet the input current requirements with the lowestvoltage and frequency, leading to a smaller inductor. However, the new inductor will notmeet the input current requirements for high input voltage. To solve this, the switchingfrequency is dynamically changed based on the input voltage measurement and the powerloss models for the complete converter. This allows not only to meet the input requirementat any voltage with a smaller inductor but also to minimize the power losses of the wholeconverter. The inductor is given byL =YSx(1−YSx)Vo∆ISfsw=YSxV2puBwlhr0.6eofsw. (3.14)For the universal Vpu, and for the possible fsw range, the calculated indutor is L = 490.5 µH.To build the inductors, laminated cores are employed. In particular, for the traditionalcase, the specific core is AMCC 25 B-14 HM6, and for the proposed method it is AMCC 10B-14 HM6. The only difference between these two cores is the size, which is bigger for thelarger inductor. The same number of turns (44 turns) is used for both inductors, and theirfinal value is obtained by adjusting the gap length.3.3 Saemdalagf RekmdlkThe developed models and equations used to estimate power losses on a Semi-BridgelessPFC are utilized to analyze, based on the defined components and their respective modelsof different sources of losses, how the whole system would behave under different operatingconditions. The behavior of the efficiency curves is examined to determine the optimal fswfor most of the load range for the different Vpu.Since the proposed inductor design is done at 110 V, the ∆IS requirements of 30% aremet, however, for 220 V the selected fsw has to be adjusted not only to obtain the mostefficient system but to also guaranty the fulfillment of the input requirements.Figure 3.4(a) is obtained running the simulation at 110 V. It shows that the most efficientfsw = 50 kHz. As fsw increases, the efficiency goes down.44200 400 600 800 100096.296.596.897.1prop.LηMaximum@ 50 kHz= 100 kHzswf= 75 kHzswf= 50 kHzswf(a)200 400 600 800 10009797.59898.5prop.L@ 75 kHzηMaximum= 100 kHzswf= 75 kHzswf= 50 kHzswf(b)Fagmre 3.,2 Simulation results on semi-bridgeles PFC. Efficiency curves for differentswitching frequencies for an input voltage level of 110 V in (a) and 220 V in (b).For 220 V, the minimum fsw that meets the input requirements has to be determined.Solving (3.14), fswBtpu ≈ 71 kHz is the minimum frequency that meets the requirements.The results are shown in Fig. 3.4(b). It shows that the lowest fsw is not the most efficientfrequency; instead fsw = 75 kHz is the one that produces lower losses. This is due to a bigger45200 400 600 800 100096.296.69797.3prop.LImprovementηMaximum@ 50 kHz= 100 kHzswf= 75 kHzswf= 50 kHzswf= 100 kHzswf@tra.L(a)200 400 600 800 10009797.59898.5prop.LImprovement@ 75 kHzηMaximum= 100 kHzswf= 75 kHzswf= 50 kHzswf= 100 kHzswf@tra.L(b)Fagmre 3.-2 Experimental results on semi-bridgeles PFC. Efficiency curves for differentswitching frequencies for an input voltage level of 110 V in (a) and 220 V in (b).reduction in eS than the increment in esw-Sx . This trade-off can be identified due to thedevice level estimation for the whole converter.463., Epheraeeflad VadadalagfA Semi-bridgeless PFC is implemented according to the specifications given in Table 3.1 toexperimentally validate the power losses estimation and the optimization. Both inductors,designed with traditional and proposed methods, are built, and the power losses are measuredas the difference of the input and output power in the converter to obtain the efficiency curvesfor the different Vpu levels and within the specified range of fsw.Figure. 3.5(a) shows the efficiency curves for an input voltage of 110 V. The lowest fsw(50 kHz) is the most efficient one, and that when it increases, η decreases. This result agreeswith the estimation presented in Fig 3.4(a) using the proposed methods. The curve in graypresents the traditional design approach (fsw = 100 kHz, and L = 800 µH) for comparison.The use of the proposed inductor derives in higher efficiency for 110 V, this improvementis around 0.4% (96.85% in the gray curve and 97.25% for the proposed inductor) for a loadrange higher than 600 W.Figure 3.5(b) shows the results for the higher input voltage (Vpu = 220 V). The resultsobserved closely match the simulations in Fig. 3.4, obtained with the proposed method.Thehighest efficiency is found at fsw = 75 kHz and, 50 and 100 kHz come after. The proposedinductor offers a sightly better efficiency and significant size reduction.The proposed methodology allows reducing the size, value, and power losses in the induc-tor, contributing to a better performance of the converter. However, due to its low value,the proposed L does not make the converter meet the input current requirements for all therange of fsw. To solve this, and to push the efficiency even higher a new loop to adjust fsw isproposed. The implementation of the loop is very straightforward; a simple code has to beimplemented. By sensing the input voltage, which is normally sensed for control proposes,fsw is set to either 50 kHz for 110 V or 75 kHz for 220 V.Figure 3.6 shows a comparison between the power losses calculated with the models (etBspt)and measured values (etlhs.). These results are presented for three different fsw and twooutput power levels (eo =300 and 900 W). In addition, the power loss distribution in thePFC converter, which is result from the proposed models, is shown. Due to the low Rks-ou47xcond,SP xsw,SP xcond,DPxcond,rDP inductors,xP= 50 kHzswf64%11%17%8%1%<21%20%16%1%43%20%30%16%1%33%12%27%9%1%<51%= 75 kHzswf11%34%8%1%<46%37%15%1%28%19%= 100 kHzswf= 300 WoP = 900 WoP= 300 WoP = 900 WoP= 300 WoP = 900 WoPmeas.Pt,simPlossP[W]8=re7%t,simPlossP[W]8=re5%t,simPlossP[W]8=re3%t,simPlossP[W]16=re10%t,simPlossP[W]16=re4%t,simPlossP[W]16=re0.1%Fagmre 3..2 Comparison between power losses measured and calculated with the de-veloped models in PFC converter working at Vpu = 220 V, fsw = 50, 75, 100kHz, and for eo = 300 and 900 W. The relative error between these two magni-tudes is indicated. Power loss distribution obtained from the proposed modelsis displayed.48of the selected MOSFET, the influence of e jouk-Sx in the total losses is low. In the case ofe jouk-Dx , the power loss contribution are also low since reverse recovery losses are not presentin a Schottky diode and e jouk-Dx is the only source of the power loss , and its value mostlychanges with eo. The same thing happens with e jouk-rDx , but in this case it is due to theline frequency at which it works. Most of the power loss contributions come from e sw-Sxand eS. Increasing eo or fsw increases e sw-Sx . In the case of eS, increasing fsw, reducesthe ripple in the inductor, causing eS to go down; but with the increase of eo, eS goes up.There is always a tradeoff between e sw-Sx and e pukujtorsBx, and its best value can be foundto minimize the losses. The maximum relative error (er) between the estimations using theproposed method and measured values is 10%, however, it is mostly under 5%.3.- SmeearqIn this chapter, the power loss estimation method developed in Chapter 2 was applied to aUniversal semi-bridgeless PFC in order to showcase its functionality. Based on these models,a new criterion for the design of the inductor and an optimization rule was presented.The power loss analysis of the PFC was explained in detail, and formulas on how to calcu-late the losses of every single element utilizing the developed models were described. More-over, an inductor design criteria that reduces its value, volume, and power losses dissipatedwas introduced. Using the proposed models, it is possible to select the switching frequencythat minimizes the power losses for the different operating conditions. The method utilizesthe dependency on switching frequency of the models to find the frequency that minimizespower losses while meeting the input current requirements (current ripple lower than 30%)due to the smaller inductor value. The optimization also depends on the changing levels ofthe Universal input voltage of the converter, for which different values of frequency are foundfor the input levels.Simulations were run and the optimal switching frequencies for every input level wereidentified. The Universal PFC was built and extensive experimental validation was presented.The results showed that the developed simulation tool is able to accurately predict the49most efficient frequency for the different input voltage levels and output power range. Inaddition, the experimental results also demonstrated that the accuracy of the whole powerloss estimation method applied to the PFC was higher than 5% for most of the operatingpoints obtained.50Chahler ,Cgfcdmkagfk,.) SmeearqIn this thesis, a novel power loss estimation method, based on DoE is presented. The pro-posed method can be utilized to calculate the losses of any topology. It delivers power lossmodels, expressed in simple equations, for different types of losses in MOSFETs, diodes, andinductors. The equations are function of factors that directly affect their behavior, and thelosses can be predicted under any operating point, significantly reducing the uncertainty fromdatasheet-based estimations. The proposed method uses a minimal number of experimentsat the device level and the results can be integrated into any topology, allowing optimizationsto be performed. Since the models are based on experimental measurements, the PCB andgate driver effects are embedded in the equations, resulting in not only accurate but simpleresulting models that explain incredibly complex behaviors.The proposed method was demonstrated in a Semi-Bridgeless Power Factor Corrector asan example. In terms of power loss estimation, the PFC presents a wide input voltage swing(0 to 311V), a wide input current swing, and waveforms that combine DC, line frequencyAC, and switching frequency AC components, challenging the use of the models throughtheir whole domain. The models obtained are not only accurate but they are also function ofmany variables in wide ranges, enabling great flexibility in terms of appropriate power lossrepresentation, evaluation of operating points, and study of the losses. The study of the power51losses opens the room to analyze how the different variables affect them in the whole domain,which allows designers to find the best combination that satisfies different optimization rules.With the study of the power loss estimations, an optimized inductor design criterion wasproposed enabling to reduce the inductor size required to meet ripple requirements. Inaddition, an optimization for the universal input levels as function of the switching frequency(fsw) was proposed. This optimization finds the best fsw that maximizes the efficiency of thewhole converter for every Vpu while meeting the input current requirements. A comparison ofthe proposed optimizations against traditional inductor design criteria was presented showinga maximum power loss reduction of 25% in the lowest input voltage level.Throughout this work, the following particular conclusions have been reached:• Design of Experiments has been proven to be suitable for power loss modeling andoptimization.• Inductor losses are at least 40% of the total losses in the PFC converter. Due to thispredominance, these losses have to be minimized.• Switching and inductor losses play a fundamental role in the total losses. The maxi-mum fsw that minimizes ∆iS and thus inductor losses, does not necessarily minimizeswitching losses. The optimal fsw can be found to minimize both types of losses.• A proper selection of fsw is critical for power loss reduction.• Both Schottky and low-frequency diodes conduction losses do not significantly con-tribute to the total losses.• For the particular application, if a MOSFET with Rks-ou lower than 50 mΩ, conductionlosses in the switch can be neglected.• All levels of universal inputs have to be analyzed separately to optimize the designs.The contribution to the scientific community is proven through the presentation and publi-cation of one conference paper at the Institute of Electrical and Electronics Engineers (IEEE)Energy Conversion Conference & Congress (ECCE) [1].52Some publications resulted from collaborative research around power losses analysis forLLC converters, GaN devices and DoE techniques:• E. S. Glitz, M. Amyotte, M. C. G. Perez and M. Ordonez, “LLC converters: Beyonddatasheets for MOSFET power loss estimation,” 2018 IEEE Applied Power ElectronicsConference and Exposition (APEC), San Antonio, TX, 2018, pp. 464-468.• M. Amyotte, E. S. Glitz, C. G. Perez and M. Ordonez, “GaN Power Switches: AComprehensive Approach to Power Loss Estimation,” 2018 IEEE Energy ConversionCongress and Exposition (ECCE), Portland, OR, 2018, pp. 1926-1931.• Rouhollah Shafaei, Maria Celeste Garcia Perez, and Martin Ordonez: “Planar Trans-formers in LLC Resonant Converters: High Frequency Fringing Losses Modeling”. Thisjournal was submitted to IEEE Transaction on Power Electronics, and it is currentlyunder review with minor comments.,.2 Fmlmre OgrcThe methodology developed in this work can be extended into different applications and newfeatures can be added. Examples of future work include:• Vpplixvtion of the methoy to yifferent topologies : The power loss estimation methoddeveloped in this work can be applied to any topology, making this tool suitable for asimilar analysis done with the PFC to any topology. For example, multilevel invertersselecting the best devices for different parts of the topology.• Vpplixvtion of the methoy to yifferent xomponents : the power loss method can beused to analyze how different elements (diodes, switches, and inductors) behave indifferent topologies, making this tool also suitable for their proper selection to maximizeefficiency.• Extenyey inyuxtor moyel : the developed thermal approach for power loss measurementcan be extended to separate the different contributions of losses in the inductors. The53technique can be used to measure core and coil losses separately by using the developedtwo-heat-sources model.• irvnsformers pofier losses moyel : This modeling procedure could also be utilized toestimate power losses accurately in transformers, which are very complex elements inthis matter and they are present in many power converters such as resonant converters.54:abdaggrahhq[1] M. C. G. Perez, M. Mahdavi, M. Amyotte, E. S. Glitz, and M. Ordonez, “Power lossesestimation on a semi-bridgeless pfc using response surface methodology,” in 2EFM IEEEEnergy Conversion Congress vny Exposition (ECCE), Sep. 2018, pp. 2873–2878. →pages v, 52[2] M. Amyotte, E. S. Glitz, C. G. Perez, and M. Ordonez, “Gan power switches: Acomprehensive approach to power loss estimation,” in 2EFM IEEE Energy ConversionCongress vny Exposition (ECCE), Sep. 2018, pp. 1926–1931. → page v[3] E. S. Glitz, M. Amyotte, M. C. G. Perez, and M. Ordonez, “Llc converters: Beyonddatasheets for mosfet power loss estimation,” in 2EFM IEEE Vppliey eofier ElextronixsConferenxe vny Exposition (VeEC), March 2018, pp. 464–468. → page v[4] E. Laloya, . Luc´ıa, H. Sarnago, and J. M. Burd´ıo, “Heat management in powerconverters: From state of the art to future ultrahigh efficiency systems,” IEEEirvnsvxtions on eofier Elextronixs, vol. 31, no. 11, pp. 7896–7908, Nov 2016. → page 1[5] S. Narumanchi, “Thermal management and reliability of power electronics and electricmachines,” in 2EF6 Internvtionvl hymposium on HD eofier Elextronixs Integrvtion vnybvnufvxturing (HDBeEIb), June 2016, pp. 1–13. → page 1[6] G. Kalcon, G. P. Adam, O. Anaya-Lara, G. Burt, and K. Lo, “Analytical efficiencyevaluation of two and three level vsc-hvdc transmission links,” Internvtionvl Journvl ofElextrixvl eofier & Energy hystems, vol. 44, no. 1, pp. 1–6, 2013. → page 3[7] J. Pou, D. Osorno, J. Zaragoza, C. Jaen, and S. Ceballos, “Power losses calculationmethodology to evaluate inverter efficiency in electrical vehicles,” in 2EFF LthInternvtionvl ConferenxeBlorkshop Compvtiwility vny eofier Elextronixs (CeE), June2011, pp. 404–409.[8] Y. Yu, W. Eberle, and F. Musavi, “A discontinuous boost power factor correctionconduction loss model,” in 2EFL IEEE Energy Conversion Congress vny Exposition(ECCE), Oct 2017, pp. 251–256. → page 3[9] Designing v CCb eFC preBregulvtor wvsey on the aINMID, ST Microelectronics, 2013,rev. 2.[10] VcEIJ Woost eFC Vpplixvtion cote Using ihe beIIEFE, MSP, 11 2013, rev. 1.2. →page 355[11] M. Rodr´ıguez, A. Rodr´ıguez, P. F. Miaja, D. G. Lamar, and J. S. Zu´niga, “An insightinto the switching process of power mosfets: An improved analytical losses model,”IEEE irvnsvxtions on eofier Elextronixs, vol. 25, no. 6, pp. 1626–1640, June 2010. →page 3[12] T. Bruckner and S. Bernet, “Estimation and measurement of junction temperatures ina three-level voltage source converter,” IEEE irvnsvxtions on eofier Elextronixs,vol. 22, no. 1, pp. 3–12, Jan 2007.[13] J. Wang, T. Zhao, J. Li, A. Q. Huang, R. Callanan, F. Husna, and A. Agarwal,“Characterization, modeling, and application of 10-kv sic mosfet,” IEEE irvnsvxtionson Elextron Devixes, vol. 55, no. 8, pp. 1798–1806, Aug 2008. → page 3[14] K. Viswanathan and R. Oruganti, “Evaluation of power losses in a boost pfc unit bytemperature measurements,” IEEE irvnsvxtions on Inyustry Vpplixvtions, vol. 43,no. 5, pp. 1320–1328, Sept 2007. → page 3[15] Y. Xiong, S. Sun, H. Jia, P. Shea, and Z. John Shen, “New physical insights on powermosfet switching losses,” IEEE irvnsvxtions on eofier Elextronixs, vol. 24, no. 2, pp.525–531, Feb 2009. → page 3[16] I. Castro, J. Roig, R. Gelagaev, B. Vlachakis, F. Bauwens, D. G. Lamar, andJ. Driesen, “Analytical switching loss model for superjunction mosfet with capacitivenonlinearities and displacement currents for dc-dc power converters,” IEEEirvnsvxtions on eofier Elextronixs, vol. 31, no. 3, pp. 2485–2495, March 2016. → page3[17] Z. Chen, D. Boroyevich, and R. Burgos, “Experimental parametric study of theparasitic inductance influence on mosfet switching characteristics,” in ihe 2EFEInternvtionvl eofier Elextronixs Conferenxe B ECCE VhIV B, June 2010, pp. 164–169.→ page 3[18] D. Montgomery, Design vny Vnvlysis of ExperimentsA Mth Eyition. John Wiley &Sons, Incorporated, 2012. → pages 4, 17[19] bdhFEi eofier aosses Cvlxulvtion Using the DvtvBhheet evrvmeters, Infineon, 72006, v1.1. → pages 4, 34[20] D. D. Frey and H. Wang, “Adaptive one-factor-at-a-time experimentation and expectedvalue of improvement,” iexhnometrixs, vol. 48, no. 3, pp. 418–431, 2006. → page 4[21] S. R. Cove, M. Ordonez, F. Luchino, and J. E. Quaicoe, “Applying response surfacemethodology to small planar transformer winding design,” IEEE irvnsvxtions onInyustrivl Elextronixs, vol. 60, no. 2, pp. 483–493, Feb 2013. → page 4[22] S. R. Cove, “Coreless planar magnetic winding structures for power converters:track-width-ratio,” Ph.D. dissertation, University of British Columbia, 2016. [Online].Available: https://open.library.ubc.ca/collections/ubctheses/24/items/1.0319259 →page 456[23] P. Di Barba, F. Dughiero, M. Forzan, and E. Sieni, “Magnetic design optimizationapproach using design of experiments with evolutionary computing,” IEEEirvnsvxtions on bvgnetixs, vol. 52, no. 3, pp. 1–4, March 2016. → page 4[24] X. Zhu, B. Yan, L. Chen, R. Zhang, L. Quan, and L. Mo, “Multi-objectiveoptimization design of a magnetic planetary geared permanent magnet brushlessmachine by combined design of experiments and response surface methods,” IEEEirvnsvxtions on bvgnetixs, vol. 50, no. 11, pp. 1–4, Nov 2014. → page 4[25] F. Luchino, M. Ordonez, G. G. Oggier, and J. E. Quaicoe, “Mosfet power losscharacterization: Evolving into multivariate response surface,” in 2EFF IEEE EnergyConversion Congress vny Exposition, Sept 2011, pp. 1917–1922. → page 4[26] eofier Fvxtor Corrextion Hvnywook, ON Semiconductors, 9 2007, rev. 3. → page 5[27] IEC 6FEEEBHB2O2EFM, International Electrotechnical Commission, Geneva, CH,Standard, 1 2018. → page 5[28] Internvtionvl htvnyvry IEC 6FEEEBHB2, Electromagnetic Compatibility EMC, 2009,part 3-2. Limits for harmonic current emissions, equipment current smaller than 16 Aper phase. → page 5[29] eofier Fvxtor Corrextion Hvnywook, ON Semiconductors, 4 2014, rev. 5. → page 5[30] C. Bing, X. Yun-Xiang, H. Feng, and C. Jiang-Hui, “A novel single-phase buck pfcconverter based on one-cycle control,” in 2EE6 CEhDIEEE Jth Internvtionvl eofierElextronixs vny botion Control Conferenxe, vol. 2, Aug 2006, pp. 1–5. → page 5[31] R. Philip and C. Sreeja, “Single phase pfc using buck-boost converter,” in 2EFI VnnuvlInternvtionvl Conferenxe on Emerging gesevrxh VrevsO bvgnetixsA bvxhines vnyDrives (VICEgVDiCbbD), July 2014, pp. 1–5. → page 5[32] P. R. Mohanty, A. K. Panda, and D. Das, “An active pfc boost converter topology forpower factor correction,” in 2EFJ Vnnuvl IEEE Inyiv Conferenxe (IcDICdc), Dec2015, pp. 1–5. → page 5[33] L. Huber, Y. Jang, and M. M. Jovanovic, “Performance evaluation of bridgeless pfcboost rectifiers,” IEEE irvnsvxtions on eofier Elextronixs, vol. 23, no. 3, pp.1381–1390, May 2008. → page 5[34] J. Lu, A. Mallik, and A. Khaligh, “Dynamic strategy for efficiency estimation in accm-operated front-end pfc converter for electric vehicle onboard charger,” IEEEirvnsvxtions on irvnsportvtion Elextrifixvtion, vol. 3, no. 3, pp. 545–553, Sep. 2017.→ page 5[35] F. Musavi, D. S. Gautam, W. Eberle, and W. G. Dunford, “A simplified power losscalculation method for pfc boost topologies,” in 2EFH IEEE irvnsportvtionElextrifixvtion Conferenxe vny Expo (IiEC), June 2013, pp. 1–5.[36] E. E. Roussineau, “Design, simulation and implementation of a 500w single-phase ccmboost pfc,” IEEE avtin Vmerixv irvnsvxtions, vol. 14, no. 6, pp. 2623–2630, June2016.57[37] F. Musavi, W. Eberle, and W. G. Dunford, “Efficiency evaluation of single-phasesolutions for ac-dc pfc boost converters for plug-in-hybrid electric vehicle batterychargers,” in 2EFE IEEE kehixle eofier vny eropulsion Conferenxe, Sep. 2010, pp. 1–6.→ page 5[38] W. P. R. Ned Mohan, Tore M. Undeland, eofier Elextronixs. John Wiley & Sons,2003. → page 5[39] D. M. Robert W. Erickson, Funyvmentvls of eofier Elextronixs. Springer, 2001. →page 5[40] K. Raggl, T. Nussbaumer, G. Doerig, J. Biela, and J. W. Kolar, “Comprehensivedesign and optimization of a high-power-density single-phase boost pfc,” IEEEirvnsvxtions on Inyustrivl Elextronixs, vol. 56, no. 7, pp. 2574–2587, July 2009. →pages 5, 6, 43[41] T. Nussbaumer, K. Raggl, and J. W. Kolar, “Design guidelines for interleavedsingle-phase boost pfc circuits,” IEEE irvnsvxtions on Inyustrivl Elextronixs, vol. 56,no. 7, pp. 2559–2573, July 2009. → pages 5, 43[42] K. Stoyka, G. D. Capua, and N. Femia, “A novel ac power loss model for ferrite powerinductors,” IEEE irvnsvxtions on eofier Elextronixs, vol. 34, no. 3, pp. 2680–2692,March 2019. → page 5[43] G. Grandi, M. K. Kazimierczuk, A. Massarini, U. Reggiani, and G. Sancineto, “Modelof laminated iron-core inductors for high frequencies,” IEEE irvnsvxtions onbvgnetixs, vol. 40, no. 4, pp. 1839–1845, July 2004. → page 5[44] S. Mao, R. Ramabhadran, J. Popovic, and J. A. Ferreira, “Investigation of ccm boostpfc converter efficiency improvement with 600v wide band-gap power semiconductordevices,” in 2EFJ IEEE Energy Conversion Congress vny Exposition (ECCE), Sep.2015, pp. 388–395. → page 6[45] C. N. M. Ho, H. Breuninger, S. Pettersson, G. Escobar, L. Serpa, and A. Coccia,“Practical implementation of an interleaved boost converter using sic diodes for pvapplications,” in Mth Internvtionvl Conferenxe on eofier Elextronixs B ECCE Vsiv,May 2011, pp. 372–379. → page 6[46] H. Xu, D. Chen, F. Xue, and X. Li, “Optimal design method of interleaved boost pfcfor improving efficiency from switching frequency, boost inductor, and output voltage,”IEEE irvnsvxtions on eofier Elextronixs, vol. 34, no. 7, pp. 6088–6107, July 2019. →page 6[47] F. Liffran, “A procedure to optimize the inductor design in boost pfc applications,” in2EEM FHth Internvtionvl eofier Elextronixs vny botion Control Conferenxe, Sep. 2008,pp. 409–416. → page 6[48] J. R. R. Zientarski, R. C. Beltrame, D. B. Candido, M. l. D. S. Martins, and H. L.Hey, “Design methodology for universal line input boost power factor correctionmagnetics,” IEi eofier Elextronixs, vol. 4, no. 6, pp. 715–724, July 2011. → page 658[49] StatEase., “DoE Software,” https://www.statease.com/software/design-expert/, 2019,[Online; accessed 20-November-2019]. → page 18[50] O. I. Corp., “Fiber optic temperature sensor,” https://www.osensa.com/, 2019,[Online; accessed 29-August-2019]. → page 26[51] H. Xu, D. Chen, F. Xue, and X. Li, “Optimal design method of interleaved boost pfcfor improving efficiency from switching frequency, boost inductor, and output voltage,”IEEE irvnsvxtions on eofier Elextronixs, vol. 34, no. 7, pp. 6088–6107, July 2019. →page 43[52] He Li-gao and Wu Jian, “Selection of the current ripple ratio of converters and optimaldesign of output inductor,” in 2EFE Jth IEEE Conferenxe on Inyustrivl Elextronixs vnyVpplixvtions, June 2010, pp. 1163–1167. → page 4359
Thesis/Dissertation
eng
Electrical and Computer Engineering
Vancouver : University of British Columbia Library
Attribution-NonCommercial-NoDerivatives 4.0 International
Graduate
Accurate power loss models of complex converters
Text