Long-term reliability monitoring and qualification strategies for integrated circuits
department or school: Applied Science, Faculty of
department or school: Electrical and Computer Engineering, Department of
data provider: DSpace
degree campus: UBCV
creator: Hill, Ian Robert McCluny
issued: 2025-10-15T20:29:14Z
issued: 2025
related degree: Doctor of Philosophy - PhD
degree grantor: University of British Columbia
description: Long-term reliability of semiconductors is a key concern for both emerging high reliability markets and continuous fabrication process innovation approaching the anticipated minimum of achievable gate length. Unexpected aging-induced failures are unacceptable in safety-critical products, and increasing variability in smaller transistors aggravates these risks. Prior research efforts to better monitor, characterize, and qualify semiconductor reliability are significant but still suffer from major limitations regarding uncertainty quantification, multiple aging mechanisms, and complex variability sources. Addressing these gaps, this research work contributes on-chip sensor designs for improved isolation of key aging mechanisms alongside novel physical modelling and predictive Bayesian experimental design approaches leveraging recent advances in probabilistic programming. The suite of on-chip sensors provide improved physical mechanism isolation and sophisticated read-out functionality over existing circuits in the literature, enabling fine-grained monitoring of semiconductor aging. All sensors are successfully implemented and evaluated using custom 12nm FinFET chip designs. The developed computational Bayesian modelling and experimental design components provide capabilities for separation of epistemic and aleatoric uncertainty in physical models, multi-level variability modelling, and a quantitative basis for accelerated life test optimization that accounts for engineering costs and risks. These features are not found in prior statistical frameworks for semiconductor reliability, uniquely allowing for accelerated test cost optimization, characterization of chip- and lot-level variability, and uncertainty-aware product lifespan predictions. This research is also, based on comprehensive literature review, one of the first applications of predictive computational Bayesian experimental design in any domain. The developed contributions act as robust components towards com…
aggregated CHO: https://circle.library.ubc.ca/rest/handle/2429/92627
note: Long-Term Reliability Monitoring andQualification Strategies for IntegratedCircuitsbyIan Robert McCluny HillB.A.Sc., The University of Waterloo, 2020A THESIS SUBMITTED IN PARTIAL FULFILLMENT OFTHE REQUIREMENTS FOR THE DEGREE OFDOCTOR OF PHILOSOPHYinThe Faculty of Graduate and Postdoctoral Studies(Electrical and Computer Engineering)THE UNIVERSITY OF BRITISH COLUMBIA(Vancouver)October 2025© Ian Robert McCluny Hill 2025The following individuals certify that they have read, and recommend to the Faculty ofGraduate and Postdoctoral Studies for acceptance, the dissertation entitled:Long-Term Reliability Monitoring and Qualification Strategies for Integrated Circuitssubmitted by Ian Robert McCluny Hill in partial fulfilment of the requirements forthe degree of Doctor of Philosophyin Electrical and Computer EngineeringExamining Committee:Andre´ Ivanov, Professor, Electrical and Computer Engineering, UBCSupervisorSudip Shekhar, Professor, Electrical and Computer Engineering, UBCSupervisory Committee MemberNatalia Nolde, Professor, Statistics, UBCUniversity ExaminerGuangrui Xia, Associate Professor, Materials Engineering, UBCUniversity ExaminerGeorges Gielen, Professor, Electrical Engineering, Katholieke Universiteit LeuvenExternal ExaminerAdditional Supervisory Committee Members:Prashant Nair, Assistant Professor, Electrical and Computer Engineering, UBCSupervisory Committee MemberiiAbstractLong-term reliability of semiconductors is a key concern for both emerging high reliabilitymarkets and continuous fabrication process innovation approaching the anticipated min-imum of achievable gate length. Unexpected aging-induced failures are unacceptable insafety-critical products, and increasing variability in smaller transistors aggravates theserisks. Prior research efforts to better monitor, characterize, and qualify semiconductorreliability are significant but still suffer from major limitations regarding uncertaintyquantification, multiple aging mechanisms, and complex variabi…
has type: Thesis/Dissertation
date issued: 2025-11
is shown at: 10.14288/1.0450439
language: eng
degree discipline: Electrical and Computer Engineering
provider: Vancouver : University of British Columbia Library
publisher: University of British Columbia
rights: Attribution-NonCommercial-NoDerivatives 4.0 International
rights URI: http://creativecommons.org/licenses/by-nc-nd/4.0/
scholar level: Graduate
contributor: Ivanov, Andre
type: Text
identifier URI: http://hdl.handle.net/2429/92627