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On power-supply current testing of mixed-signal phase-locked-loops Dalmia, Maneesha
Abstract
Due to rapid advances in the speed and complexity of VLSI circuits, analog and mixed-signal circuits are going through a resurgence. Today, the state-of-the-art of the analog and mixed-signal integrated circuit testing is to use application-specific test techniques for individual modules. Efforts have been made to develop simple, generic test techniques to tackle this problem. Current-mode testing is one such approach. The effectiveness of power supply current testing for digital IC's has led researchers to explore the possibility of extending this concept to testing analog blocks of mixed-signal ICs. Unfortunately, current-mode test techniques developed for commonly-studied analog blocks, such as op-amps and filters, do not apply to non-linear blocks such as phase-locked loops. This thesis focuses on investigating the effectiveness of using power supply current monitoring techniques to detect potential faults in phase-locked loop (PLL) circuits. The decision for declaring a circuit as fault free, or- faulty, is made by defining a simple threshold which takes into account the tolerances on the circuit parameters and process variations.
Item Metadata
Title |
On power-supply current testing of mixed-signal phase-locked-loops
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Creator | |
Publisher |
University of British Columbia
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Date Issued |
1997
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Description |
Due to rapid advances in the speed and complexity of VLSI circuits, analog and mixed-signal
circuits are going through a resurgence. Today, the state-of-the-art of the analog
and mixed-signal integrated circuit testing is to use application-specific test techniques for
individual modules. Efforts have been made to develop simple, generic test techniques
to tackle this problem. Current-mode testing is one such approach. The effectiveness of
power supply current testing for digital IC's has led researchers to explore the possibility of
extending this concept to testing analog blocks of mixed-signal ICs. Unfortunately, current-mode
test techniques developed for commonly-studied analog blocks, such as op-amps and
filters, do not apply to non-linear blocks such as phase-locked loops. This thesis focuses on
investigating the effectiveness of using power supply current monitoring techniques to detect
potential faults in phase-locked loop (PLL) circuits. The decision for declaring a circuit as
fault free, or- faulty, is made by defining a simple threshold which takes into account the
tolerances on the circuit parameters and process variations.
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Extent |
4117859 bytes
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Genre | |
Type | |
File Format |
application/pdf
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Language |
eng
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Date Available |
2009-03-24
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Provider |
Vancouver : University of British Columbia Library
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Rights |
For non-commercial purposes only, such as research, private study and education. Additional conditions apply, see Terms of Use https://open.library.ubc.ca/terms_of_use.
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DOI |
10.14288/1.0065228
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URI | |
Degree | |
Program | |
Affiliation | |
Degree Grantor |
University of British Columbia
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Graduation Date |
1997-11
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Campus | |
Scholarly Level |
Graduate
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Aggregated Source Repository |
DSpace
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Item Media
Item Citations and Data
Rights
For non-commercial purposes only, such as research, private study and education. Additional conditions apply, see Terms of Use https://open.library.ubc.ca/terms_of_use.