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A solid state voltage regulator and exciter for a large power system test model Bond, John Anthony 1967

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A SOLID STATE VOLTAGE REGULATOR AND-EXCITER FOR A LARGE POWER SYSTEM TEST MODEL by JOHN ANTHONY BOND B . A . S c , University of B r i t i s h Columbia, 1964. A THESIS SUBMITTED IN-PARTIAL FULFILMENT OF THE REQUIREMENTS-FOR THE DEGREE OF MASTER OF APPLIED SCIENCE in the Department of E l e c t r i c a l Engineering We accept th is thesis as conforming to the requi red standard Research Supervisor Members of the Committee Head of the Department . . , > „ . . . Members of the Department of E l e c t r i c a l Engineering THE UNIVERSITY OF BRITISH COLUMBIA Ju l y , 1967 In presenting th is thesis in p a r t i a l fu l f i lment of the requirements for an advanced degree at the Univers i ty of B r i t i s h Columbia, I agree that the Library shal l make i t f ree ly avai lable for reference and study. I further agree that permission for extensive copying of th is thesis for scholar ly purposes may be granted by the Head of my Department or by his representatives. It is understood that copying or publ ica t ion of th i s thesis for f i n a n c i a l gain shal l not be allowed without my wri t ten permission. Department of E l e c t r i c a l Engineering The Univers i ty of B r i t i s h Columbia Vancouver 8, Canada Date J u l y 1, 1967 ABSTRACT This thesis is concerned with the design, construction, and testing of a sol id state voltage regulator-exciter-for a new power sys-tem test model.- ;The basic elementsof a power system, the prime mover and the synchronous generator-,- are simulated by smal 1 laboratory sized machines-whose :characteristics have been-altered by electronic devices. The voltage regulator-exciter consists of a transfer function simulator, a selector-switch for forced or 1inear-excitation,-a f i e ld amplif ier, a negative resistor for-the f ie ld -c i rcu i t -and a voltage transducer for closed loop control. Also included-are a braking-resistor with solid state switching and power and-speed transducers. Transient power system studies have been largely theoretical in nature because of the d i f f i cu l ty and danger in carrying out experi-mental work on actual power systems. With-this model, many important and interesting tests can be easily carried out. Chapter-2 outlines the proposed system-while Chapter 3 details the realization-and c i r c u i t r y o f the subsystems. The results of the tests described in Chapter 4 r aredivided-into-two parts. The f i r s t section deals with the testing of each-subsystem while the last section, the system as a whole. TABLE OF CONTENTS Page ABSTRACT i i TABLE OF CONTENTS .................................................. iii LIST OF ILLUSTRATIONS .............................................. i v ACKNOWLEDGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . » . . . . v i i 1. INTRODUCTION 1 1.1. Development o f Micromaehines .............................. 1 1.2 Analogue Model 1 ing..of Synchronous Machines ................ 2 1.3 A New Model f o r Large Power System T e s t s .................. 4 2. PROPOSED SOLID STATE REGULATION AND EXCITATION SYSTEM .......... 6 3. SYSTEM REALIZATION 9 3.1 T r a n s f e r F u n c t i o n S i m u l a t o r ............................... 9 3.2 S e l e c t o r S w i t c h 16 3.3 F i e l d A m p l i f i e r ............................. .......... 24 3.4 N e g a t i v e R e s i s t o r ............... ...................... 27 3.5 V o l t a g e T r a n s d u c e r 32 3.6 Power T r a n s d u c e r 32 3.7 Speed T r a n s d u c e r , 32 3.8 B r a k i n g R e s i s t o r ... 38 3.9 Power S u p p l i e s ... ........ ......................... 42 3.10 System Arrangement 48 4. TEST RESULTS 51 4.1 S e c t i o n T e s t s ................................ 51 4.2 System T e s t s ......... .......... 69 5. CONCLUSION 77 REFERENCES 78 i i i LIST OF ILLUSTRATIONS Figure Page 2.1 Solid State Regulation and-Excitation S y s t e m . . . . . . . . . . . . . 7 3.1 Voltage Regulator and Exciter Transfer Function . . . . . . . . . . . . . 10 3.2 Division Method of Transfer Function Realization on Analogue Computer .-.. 12 3.3 Lead Network Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.4 Lag Network Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 Lead-Lag Network Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Portage Mountain Transfer Function Realization . . . . . . . . . . . . . . 17 3.7 Kincaid Transfer Function Realization . . . . . . . . . . . . . . . . . . . . . . . 18 3.8 (a) Selector Switch Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 (b) Dual Nor Circuit 22 (c) Selector Switch Summing Amplifier . . . . . . . . . . . . . . . . . . . . . . . 23 3.9 Field Amplifier Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.10 Synchronous Machine Field Winding Circuit . . . . . . . . . . . . . . . . . . . 28 3.11 Simplified Scheme to Realize Negative Resistor . . . . . . . . . . . . . . 29 3.12 Negative Resistor Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.13 Voltage Transducer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.14 Voltage Transducer Rectif ier 34 3.15 Power Transducer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.16 Generation of Power Transducer Voltage and Current S ignals . . . 36 3.17 Power Transducer Active F i l te r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.18 Speed Transducer Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.19 Braking Resistor Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.20 Braking Resistor Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 (a) Control Circuit (b) SCR Switch 3.21 Circuit for Power Supplies 2, 3, 4, 9 and 10 . . . . . . . . . . . . . . . . 43 i v Figure Page 3.22 Circuit for Power Supplies 5 and 6 44 3.23 Circuit for Power Supplies 7 and 8 . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.24 Completed System, Front View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 3.25 Completed System, Rear-View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o . . 50 4.1 (a) Simulator Step-Response of Portage Mountain Transfer Function 52 (b) Simulator Step Response of Kincaid Transfer Function . . . . 53 4.2 Digital Computer Solution of Step Response of Portage Mountain Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 4.3 Digital Computer Solution of Step Response of Kincaid Trans-fer Function 55 4.4 Selector Switch Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 4.5 Field Amplifier Rise Time 57 4.6 Variation in Field Time Constant with Negative Resistance . . . 58 4.7 Negative Resistor Power Amplifier Rise Time . . . . . . . . . . . . . . . . . 61 4.8 Negative Resistor Under-Forced Excitation 62 4.9 Voltage Transducer Calibration'Curve" . . . . . . . . . . . . . . . . . . . 63 4.10 Power Transducer Calibration1Curve . . . . . . . . . 64 4.11 Power Transducer.Ri se -Time . . . . . . . . . . . . . . . . . . . . . . . . . . 65 4.12 Generator Speed Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.13 (a) SCR Switch Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 (b) Braking Resistor-Operation Time . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.14 Speed Variation and Voltage Error for a Load Application . . . . 70 4.15 Voltage-Error.with Load Application Without Voltage Control . 71 (a) T=.01455s... 71 (b) T=1.0s 71 (c) T=3.0S 72 4.16 Voltage-Error with Load Application with Voltage Cont ro l . . . . . 74 (a) x=1.0s, G=20% 74 (b) x=1.0s, G=40% 74 (c) T 3.0s, G=20% 75 Figure Page 4.16 (d) T=3.0S, G=40% 75 (e) T=5.0S, G=20% 76 (f) T=5.0S, G=40% . . . . . . . . . 76 vi ACKNOWLEDGEMENT I wish to thank my supervisor. Professor. Yao-nan Yu for his unfailing patience, and counsel during, the. course .of this work, I am. indebted, to Dr. M. P. Beddoes for reading the preliminary draft and for his. valuable comments. I wish also to ..thank Graham...E.o .^Dawson..and,Leonard N„ Wedman draft. The financial... assistance of.-the. University,,-, o f B r i t i s h Columbia and . the.-National. Research.. Council.,. 67-3626,!edged. Lastly I wish to thank Miss L.....D,,. . Blaine.-for typing both drafts. 1 1. INTRODUCTION 1.1 Development of Micromachines Micromachine model-1 ing-' of synchronous machines and power systems is not new. A micromachine and microreseaux system was proposed and constructed by Rober t^ in 1950. He stated certain electromagnetic and mechanical s imi lar i t ies that must be observed between the real machine and the model. The per unit reactances between the actual system and the representative system must be s imilar , the time constants of the corres-ponding c i rcuits must be equal, the saturation curves must be ident ical , the inert ia constants must be s imilar , and f i n a l l y , the torque-speed characteristics of the micromachine must be identical with the real machine. Robert employed a rotary machine to obtain a negative resis -tance in order to increase the f ie ld time constant. The cross section of the damper windings was altered to achieve the correct time constant. Variable ai r gaps in the rotor and stator permitted the saturation curves to be adjusted. Three different types of rotors were used to simulate a salient pole generator, motor and a turbo generator. Weights fastened to the shaft of the micromachine allowed the inert ia constant to be altered over a wide range. The model prime mover was a dc machine driven by gas f i l l e d thyratrons. Altering the f i r ing angle of the thyratrons varied the torque-speed characteristics. Speed sensing was achieved by means of-a frequency modulation system. A tone generator whose frequency was proportional to angular speed was slope-demodulated by an R-C f i l t e r . The transmission line was simulated by a three phase pi section. (2) Venikovv ' in 1952 reported a thorough study of the mathematics of micromachine simulation. Specified in detail are the similar i ty 2 requirements for many electr ical and mechanical-quantities including time, time constants^ mechanical and electr ical power losses, torque, moment of iner t ia , self and mutual inductance, magnetic f ie ld and space harmonics, and thermal conductivity. In Venikov's mieromachine, the f ie ld time con-stant is adjusted by means of a negative' resistor realized-by a commutator machine. Three different rotors were employed to achieve variations in saliency; =0.85, 0.55, 0.40. The damper windings were adjustable allowing various amounts of damping to be introduced. The inert ia con-stant of the micromachine set was varied by means of a flywheel. A twelve section transmission line was used to simulate a-t ie l ine. Provision was made to simulate arc, corona, overvoltage switching and lightning surges. (3 ) A third micromachine was described by Adkinsv ' in 1960. Short-c i r cu i t s , synchronizing and damping torques, swing curves, asynchronous operation, and resynchronization-were'investigated. - A synchronous machine rather than the complete power' system was simulated and tested. The machines' were1 specially-constructed so that their per unit armature resistance value-was considerably-lower than-commercial units of the same rating. An electronic negative resistance was used to vary the f i e ld time constant. The voltage regulator was simulated by operational amplifie Five rotors of different design were constructed. The damper bars of the rotors could be changed or removed. An adjustable flywheel provided a wide range of -inertia-constants. A tachogenerator provided a speed signal. The microturbine was a separately excited dc machine with a special thyratron regulator. 1.2 Analogue Modelling- of Synchronous Machines Synchronous machines may also be modelled by analogue, either direct , operational, or hybrid. A direct analogue simulates voltage by 3 voltage, current by current, and impedance by impedance. The network analyzer, a direct analogue,-has been used extensively in power system studies. The general analogue computer is an example of an operational analogue in which variables are represented by dc voltages and where operati onal amp! i f i ers, mul t i pi i ers, functi on generators -, and resol vers carry out mathematical operations. A hybrid analogue is a simulation by both direct analogue and by a-general analogue-computer. An interface is needed for the interconnection. (4) The paper by Jamesv ' in 1953 is an example-of- hybrid modelling. The investigation was carried out to optimize the :transient response of a generator-regulator system-by varying generator open circuit - t ime constant, excitation shunt f i e ld time constant and-feedback -transformer time con-stants. An actual carbon pile voltage regulator was used in the system. The remaining portions of the system, generator, exciter and feedback circuits were analogued on a computer. (5) Van Ness- in 1954 bui lt two synchronous'machine operational analogues for-use with a network analyzer to carry out swing curve studies. His second mode"! allowed such factors as voltage regulator action to be taken into- account whereas^his f i r s t model was based on the conventional voltage-behind-reaetanee -representation.' The power angle -6 was computed continuously instead of in a conventional step-by-step manner. R iaz^ - in-1956 analogued a synchronous machine entirely on a general -analogue computer. Park's equations"were applied. While the armature resistance and flux variations were neglected, the effects of saturation and speed variation were included. The purpose of this paper was to construct an accurate synchronous machine model for use in the transient study of voltage regulation systems. 4 Aldred and Shackshaft's^~paper in 1958 concerned the prediction • and improvement of steady state~and~transient-stability of a voltage regu-lated synchronous generator. -A general analogue- computer was used to carry out the study; The mechanical powerinput was-assumed constant and the synchronous machine was assumed ideal . The generated voltage due to the change of speed, the induced voltage due to the rate of change of armature flux 1inkages, and the armature and l ine resistances were neglected. The effects of the gains and time constants of the voltage regulating systems on s tabi l i ty were examined. A hybrid power system simulator was-described in a paper by (8) Corless and Aldred v ' i n 1958. The synchronous machine was simulated on a general analogue computer while- the- transmission networks were simulated by-a high frequency- analogue; Special-coupling unitswere designed to transform the dc computer voltages' into their ac equivalents and vice versa. Sustained faul ts , clearing and reelosing, and pole siipping were investi gated. (9) A later paper by Aldred- ' in 1962 transformed the transmission line equations into d-q coordinates thus eliminating the need for an ac analogue- and i t s interface. A two-machine stability :problem was invest i -gated. The two papers by P e t e r s o n - ^ - ^ et al--in 1966 modelled synchronous machines-together with d e l inks with1 and without parallel ac l ines. A l l system equations werertransformed -into d-q coordinates and simulated on a general analogue computer. Two-machine problems were investigated. 1.3 A New Model for Large Power System Tests In a l l thepapers'surveyed, i t is apparent that there has always 5 been a compromise made between-the'detail and the-cost of modelling. An exceedingly complex model would be required -if most detaiIs of the machine and power system-were included. The general analogue computer-has-been- used extensively in machine and power system studies because of i ts versat i l i t y . Parameters may be varied rapidly and independently over a wide range. Complex mathematical-models i neludi ng non 1 i near di fferenti a1 equations can be readily solved. As the entire system is centralized, instrumentalon is simplif ied. Accidental faults are not injurious to the system as the elements- are-current l imited. Micromachine and micronetwork-models however, are a closer representation of the real system-than are the direct and operational analogues. The micromachine has many salient features of a real machine. It operates in-real time and therefore"'is amenable to on-line instrumen-tion and control. It has a three-phase output and thus does not require an interface with the remainder of the system-. Instrumentation and control methods developed for such a model-'can-be-readily extended to a real system. One of the major projects of the power- groups is the develop-ment of a new test model for a largeregulated power-system for s tab i l i ty and-control studies. This thesis is particularly concerned with the design and construction of a solid state"voltage- regulator-exciter. Present power system transient s tab i l i ty studies have been confined to analysis and computation-. Results obtained from these studies have seldom been tested on real power systems'because of the possibi l i ty of ; damage to the system-.- It is hoped that such tests can be readily carried out on the proposed test model, which would permit the development of more sophisticated power system control. 6 2. PROPOSED SOLID STATE- REGULATION AND EXCITATION SYSTEM A block diagram of the'system"is' shown in Figure 2.1. The system consists of eight sections,"a transfer function simulator, a selector-switch, a f i e ld amplifier, a negative resistor , a1 voltage trans-ducer, a power transducer, a speed transducer, and- a-braking resistor. The regulation -and excitation system"for the machine being modelled is-simulated'-in a-transfer• function section by a special purpose analogue computer. Ineluded in - the computer are twelve operational amplifiers, two reference"power-"suppl-ies; -two mult ipi iers , three precision potentiometers, and three standard potentiometers. The computer is con-structed so that the input and feedback elements-of the amplifiers are readily accessible allowing considerable freedom in transfer function design. The signal from the transfer function section is passed to a selector switch constructed of integrated c i rcu i ts . The switch selects either a 1inear or a forced excitation mode. "The forced excitation mode is further divided into two sub-modes, one outputting a positive cei l ing voltage and the other a negative- cei l ing voltage. The signal from the selector switch is then passed-to a f ie ld amplifier. The f ie ld amplifier consists of two sections, a voltage ampli-f i e r and a current amplifier. The voltage amplifier multiplies a ±10 volt signal from the f ie ld selector switch by a factor of 10. The current amplifier increases the-signal current by a factor of 1500. A negative resistor is placed-in series with the f ie ld ampli-f ie r for the purpose of adjusting"the apparent resistance1 of rthe synchro-nous machine f ie ld c i rcui t permitting the"field c i rcu i t time constant to TRANSFER FUNCTION SIMULATOR SELEC TOR SWITCH FIELD AMPLIFIER ERROR SUMMING AMPLIFIER FIGURE 2.1 Solid State Regulation and Excitation System 8 be varied. The negative resistor designed i s 7 l i n e a r , stable and con-tinuously variable from -45 to -75 ohms at 0 to 1.2 amperes. The three phase power output"of the machine is monitored by a power transducer. The"transducer generates a signal proportional to the instantaneous real power output from the synchronous machine regard-less of phase balance, magnitude,"or waveform7of the voltages and cur-rents. This s ignal , combined with a~reference signal , yields a power error signal. Following the power transducer is a"voltage transducer. The armature voltage is scaled, rectified", f i l t e r e d , and referenced to produce a voltage error signal. A three phase resistor is connected to the armature of the synchronous machine through a-si l icon'control led rec t i f ie r (SCR) switch. The period of time during which the rbraking resistor is connected to the synchronous machine is controlled by a logic unit-and is variable from .2 to 4 seconds. A tachometer mounted on the shaft of the synchronous machine set produces a dc voltage proportional to the speed of the machine. This speed voltage, combined with a reference voltage in a summing amplif ier, yields a speed- error signal. The three error-signals, power, voltage and speed, are weighted and summed to produce a composite error signal. The composite signal is introduced into thet rans fe r function section thus completing the control loop. 9 3. SYSTEM REALIZATION 3.1 Transfer Function Simulator Each power system to be modelled has associated with i t a characteristic transfer function describing the voltage regulator and (12) exciter of each synehronousmachine, Figure 3.1. From the l i terature v ' , the general form of the transfer function of the regulator is K(l+TAs)(l+TBs) G ( s ) = (l+T l S)(l+T 2s)(l+T 3s) ( 3 J ) and that of the exciter F ( S ) - T T ^ , ( 3 ' 2 ) Two procedures that y ie ld an analogue computer representation of the above are described as follows. The f i r s t , which may be called the division method, obtains the output signal V Q ( S ) as a function of V^(s) and V Q ( S ) by a division process." LetH(s ) , the transfer function to be simulated, be of the form H(s) = G(s) F(s) = g[§| (3.3) where N(s) and D(s) are polynomials of nth and ith order respectively. For a l l transfer functions studies in this thesis, n<i. From (3.3), one has D(s) VQ(s) = N(s) V.(s) Signal Machine Field FIGURE 3.1 Voltage:' Regulator and--E-xeiter"Transfer Function o ] 1 or V0(s) = ( ^ s " " 1 + ^ i s n - i " 1 + . . . + ^ s - i ) V . ( s ) -i i i i + . . . + i y T T ) V O ( S ) ( 3 - 4 ) The output V Q ( S ) can be constructed according to the right hand side of (3.4) resulting in Figure 3.2. Inverting amplifiers are employed to prevent positive feedback. The second procedure, which wi l l be called the lead-lag method, represents the transfer function by lead and lag networks as in Figures 3.3, 3.4, and 3.5. The division procedure is employed where the time constants in the denominator of the transfer function are in excess of .1 second or where the amplifier impedance elements are not accessible. If the numerator is of greater degree than the denominator, i . e . n>i, differen-t iator c i rcuits re rsult. While a reasonable approximation to a differen-t iator can be constructed, i ts frequency response is limited and access to the amplifier impedance elements is necessary. : Although the division method permits rapid adjustment'of parameters,~large amounts of analogue computation equipment are"required. For short time constants in the denominator, long time constants in the numerator, or both, large loop gains can result with attendant instabi l i ty and noise problems. The lead-lag method is employed where the transfer function contains time constants of .1 second or less in the denominator. The method can be employed only where the impedance elements of the opera-tional amplifiers are accessible. The procedure generally results in FIGURE-3,2 Division Method of Transfer Function Realization on- Analogue Computer *1 FIGURE 3.3 Lead Network Realization V0(s) _ _ J Vj(s) " " R2 (ItRjCs) FIGURE 3 : 4 Lag-Network R e a l i z a t i o n 4^ vQ(s)- _ Ri n + R2C2S) Vj(s) " . . R2 (1 t RJCJS) FIGURE 3.5 Lead-Lag Network Realization 16 a saving of computational"equipment"but"is" less1 f lex ib le . There are practical bounds on the size of resistor and capacitor used in the lead-lag elements. -A lower bound is set on resistors by the amount of current that the operational amplifiers can'deliver. The current drain through the feedback path and that into the"load must-not exceed the current rating of the amplifier at rated output'voltage. For the 10 volt operational ampl i f iers , ; resistors larger thanSKu- are chosen while for the 100 volt operational amplif iers, theminimumresistance is about 15K£2. It is found that lOOKft and lOMfi are upper bounds for the 10 volt and 100 volt amplifiers respectively. Above thesevalues, excessive amounts of noise, predominantly 60 Hz, is picked up by the amplifiers. The largest-non-polarized capacitors suitable are 1imi ted to about IpF. The largest time eonstantis thus .1 secondfor the 10 volt amplifier and 10 seconds for the 100 volt amplifier. (12) (13) From the-Portage Mountain- ' and Kineaid v 1 machines, two examples of transfer function simulation are presented. The Portage Mountain transfer function, Figure 3.6 is simulated entirely by the lead-lag method. The Kincaid'transfer-function, 1 Figure 3.7, is simulated by a combination of both methods. 3.2 Selector Switch It is required that 1the f ield 1 voltage ; be controlled either by a 1inear signal from the transfer- function synthesizer-or by a positive or negative cei l ing voltage-signal for forced excitation. The f ie ld voltage under forced excitation is-quickly raised above i ts normal excitation leve l , undergoes-several polarity reversals and then is returned to linear control. This procedure improves s tabi l i ty under certain fault conditions. FIGURE 3 .6 Portage Mountain Transfer Function .Realization 8K •\AA (1 + 70s) (1 t 001s) (1 + .002s) 111 Us) FIGURE 3 . 7 Kincaid Transfer Function Realization 19 Control of-the f i e ld selector -switch is achieved through integrated ci rcuits including -two binaries, an inverter7and a dual NOR; Figure 3.8(a). For the purpose o f - th is r thesis1, control signals are generated-from- two-pushbutton7 switches:'~Pushbutton- switch A selects either the linear or forced excitation mode while pushbutton switch B determines the polarity-of the forced excitation. With reference to Figure 3.8(a), momentarily closing switch Sw A starts Monostable A causing the voltage at pin 6 to r ise . During the period, (about .8 seconds) that the monostable is in the elevated or 1 state, i t is insensitive to further signals from Sw A. As the monostable returns to"its'ground or 0 state, Binary A changes state. Consider f i r s t 7 the operation of the linear gate formed by Q .^ For a 1 level at pin 7 of Binary A, a 0 level results at pin 7 of the inverter. This 0 level passes to t r a n s i s t o r - t u r n i n g i t off. is turned off by Q ,^ dropping the gate G of to -12V. When G is more negative than S by 8V, is cut off and the linear signal is prevented from passing. Conversely, i f the output of Binary A at pin 7 had been a0,"Q^ would be turned on and the linear signal would pass into the summing amplifier following the selector switch. Consider now the selection of either of the forced excitation signals. The linear gate must be off; Thus, pin 7 of Binary A is at 1. The state of Binary B determines which forced excitation s ignal , positive or negative, w i l l pass to the summing amplifier. Binary B is controlled by Monostable B in a l ike manner as-deseribed-prev-iously for Binary A. The output from pins 5 and 7 of Binary B passes-to pins 2 and 5 respective of a Dual NOR gate. The response-or truth table of a single 2 input NOR FIGURE 3.8(a) Selector Switch Circuit o 21 gate is Input Output 0 0 1 1 0 0 0 1 0 1 1 0 The Dual NOR c i rcu i t is shown in Figure 3,8(b). Inputs at pins 1 and 3 are at 0 because of the state of Binary A. A 0 from pin 5 of Binary B to pin 2 of the Dual NOR wi l l cause a 1 to be output to Qg turning Qg off. The top of the 5Kfi potentiometer connected"to Q^wi11 drop to -12V thus giving a negative forced excitation voltage from the tap. At the same time, pin 7 of Binary B outputs a 1. From the truth table, i t is seen that a 1 at either input of the NOR wi11 cause a 0 at the output. This 0 becomes a 1 in the Inverter and turns on Q-j, preventing a positive forced excitation voltage. A s i m i l a r procedure may be followed in obtaining a positive forced excitation voltage for the other state of Binary B. Diodes and D^  compensate for the saturation voltage of Q-j and Q2 respectively. Four lamps indicate the states of Binaries A and B. A 1 level into the lamp driver turns Qg and on, l ighting the lamp, while a 0 level input turns off Qg and Q .^ The lamp driver-inputs are connected to pins 5 and 7 of the binaries. F inal ly , the three signals, l inear, positive forced excitation, and negative forced excitation are passed to the 1Field Amplifier through a summing amplif ier, Figure 3.8(c). 8 ? f3.6 •• 6 Output • , Ground FIGURE 3.8(B) Dual NOR Circirrf 8K Positive forced e Negative forced e FIGURE-3;8(c)' SeieetorSwitch-Summing Amplifier 24 3.3 Field Amplifier The f i e ld of the synchronous generator of the power system model is rated at 1.2A, 115V dc. The maximum output of the transfer function analogue computer is ±10 volts at 5mA. An amplifier is therefore required to match the maximum output of the computer to the maximum power absorbed by the f i e l d . The f i e l d a m p l i f i e r , Figure 3.9, consists of two parts, a voltage amplifier and a current amplifier. The ±10 volt signal from the computer is multiplied by a factor of 10 after passing through a ±100 volt operational amplifier. The resulting signal is then passed to a current amplifier; - a complementary common-collector pair- in the Darlington confi -guration. The current amplifier is composed of two symmetrical c i r cu i t s , one side amplifies positive signals, the other, negative 1signals. With the exception of polarity , the operation of :each-side is ident ical . It f 14) has been shownv ' that the currentgain f o r a single transistor common-collector amplifier is A. = 0 + 1 where 0 is the common-emitter-short c i rcu i t current gain. For a Darling-ton connected'transistor pair , the :current gain is A- = (e+l)(B+l). The current amplifier has-essentially unity voltage gain. There i s , however, a-small voltage drop Vg^ across the two base-emitter junctions which-is independent of the input voltage. • t 40v OUTPUT o - 40v FIGURE 3.9 Field Amplifier Circuit 26 V i n " V B E l - V B E 2 = V0UT' VBE1 = VBE2 ^ 8 V This creates a dead zone at zero of about 2,0 volts. Normal operation however w i l l be on theposit ive hal fof" the current amplifier only. For negative forced excitation, the -signal passes7through the dead zone within a few microseconds. Because'of the leakage of the PNP-transistors, this dead zone is considerably altered. It was found that for 0 volts into the voltage amplif ier, the emitter'of the current amplifier is at - . 4 volts because of the net leakage through the load. In addition, there was a noticeable discontinuity in the output signal as the input signal passed through 0 volts. A voltage divider is not employed because of s tab i l i t y and second breakdown. Instead, a 1.5 volt battery is inserted into the base c i rcu i t of theNPN transistors turning them part ial ly on. The transistors are on suff ic ient ly toabsorb almost a l l the leakage current of the PNP transistors :reducing'the zero error from - . 4 volts to - . 1 volt . In addition, the zero crossingdiscontinuity is removed by this procedure. Considerable d i f f i cu l ty was encountered in ensuring the s tabi l i ty of the f ie ld amplifier. Theinput impedaneeof the common-collector configuration can have a negative real part for certain ranges of capaeitive loadings above'a certain frequency. Stray capacity has been reduced as much as possible, the"frequency response is reduced, and the real part of the input impedance is increased by placing a resistor between the voltage and current amplifiers. The voltage drop across this resistor is about 1.5 volts under a maximum load of 1.2A. The largest apparent resistance seen by the f i e ld amplifier is 30 ohms. For the maximum load current of 1.2A, the maximum output 27 voltage required is 36 volts; 'Thermaximurrr output7 of7 the7 amplifier designed is 38 volts at 1.2A. 3o4 Negative Resistor L f It is found that the-time constant, „—, of the f ie ld c i rcui t of K f the synchronous generator is too low; The time constant of large generator-exciters-ranges from';3 to 7 seconds. The time constant can be increased7by either increasing7the inductances or by :decreasing the resistance. 7 Physical -change---of inductance or resistance of a winding requires redesign of-the -'machine7 which is expensive and is very inf lex ib le . Apparent change needs the addition of"external7devices in the f ie ld c i r -cuit that alter the f ie ld characteristics". The apparent resistance of the synchronous f ie ld winding is-reduced by inserting a current dependent voltage source (negative resistor) between7 the-'field and i ts driving voltage, Figure 3.10. The realization is given by v + v i = (R f +sL f ) i , v. = ki or v = (R^-k)i + sL^i The apparent driving"point resistance becomes R^  - k; By adjusting k, the f i e ld time constant can be varied over the required range. A simplified scheme to realize the'negative : resistor 7 is shown in Figure 3.11. The current dependent"voltage is given by v. = k,k 0k 0R i = ki i 1 2 3 s The f ie ld current i developes a voltage across resistor R . This current dependent voltage is amplified-in operational.amplifier• A^. The signal is FIGURE 3,10 Synchronous Machine Field Winding Circuit !\3 CO FIGURE 3.11 Simplified Scheme to"Realize Negative Resistor 3 0 then passed to a'power amplifier made up of voltage amplifier and current amplifier A^. The power amplifier is similar to the f ie ld amplifier described in Section 3 . 3 , The actual rnegative resistor c i rcui t is shown in Figure 3 . 1 2 . The power.amplifier, A^  and A^, while s imi lar : to that of the f ie ld amplif ier, has one important difference: The maximum V C G that may appear across any current amplifier transistor is 1 8 0 V ; PNP transistors having a collector-emitter breakdown voltage : base open :circuited, B V ^ Q , greater than 1 6 0 V and capable of passing the required load current, are d i f f i c u l t to obtain. Accordingly, aNPN transistor, Q ^ , with a B V ^ Q of 3 0 0 V is placed in the return of the~PNP power1supply. Whenever the input to the current amplifier swings more than 1 0 V posit ive, turns off disconnecting and from the power supply. A number of d i f f i cu l t ies were encountered with the negative resistor current amplifier. The problems of osci l lat ion and dead zone were dealt with in a similar manneras that described in 3 . 3 for the f ie ld amplifier. In addition, the problem of secondary breakdown was encountered. Secondary breakdown i s ' a destructive phenomenon! not yet well understood: Beyond a certain c r i t i c a l dissipation, the collector and emitter w i 1 1 : s h o r t - c i r c u i t . • This c r i t i ca l : d iss ipat ion can be as small as 1 0 % of the rated dissipat ion r of : the transistor-depending on V C G . The problem is overcome by reducing the supply voltage from ± 1 2 5 to ± 9 0 V . Drift in k due to thermal variationof"parameters is not appreciable. Large heat sinks"and a fan prevent-the temperature of the current amplifier transistors from increasing greatly. When k = R ,^ the amplifier is suff ic ient ly stable afterabout 1 0 minutes of operation. FIGURE 3.12 Negative Resistor Circuit 32 The negative resistor is designed to roperate :between -45 and -75 ohms at a maximum current of 1.2A. 3.5 Voltage Transducer For a closed loop voltage control, i t is necessary to generate an error signal proportional to the"differenee-between - the terminal voltage of the synchronous machineand a" reference-voltage-. The terminal voltage is f i r s t convertedto dc, compared with a reference, and then passed through an active f i1ter to remove the :ac component. The voltage transducer block diagram is shown'in Figure 3.13, and i ts rec t i f ie r c i rcui t in Figure 3.14. 3.6 Power Transducer For control studies, i t is required that an analogue voltage be generated proportional to the instantaneous7real7power flow from the synchronous machine. It is desireablethat r the device-has a f a s t response and that the signal produced be compatible with the ±10 volt level of the operational amplifiers. The two wattmeter7method is employed using two quarter-square multipliers as the-mainelements, Figure 3.15. The power of a three-phase"three-wire-system is given by D = i v + i i v, H a ac b be The four signals are obtained as in Figure-3-16. The average real power flow from the synchronous machine is obtained by passing the instantaneous (15) power signal through a low pass f i l t e r . An active f i l t e r ' is used because of i ts f l e x i b i l i t y and sharp cutoff. The details of construction are shown in Figure 3.17. 3.7 Speed Transducer (15) Various excitation feedback signals have been considered^ ' Armature Transformer Rectifier Reference Active Filter Voltage Error FIGURE 3.13 Voltage Transducer Block Diagram FIGURE 3.14 Voltage Transducer Rectif ier FIGURE*3.15' Power Transducer Block Diagram GO CJ1 FIGURE 3.16 Generation of Power Transducer Voltage and Current Signals C O /?= 80K C-.J ufd . f = 20Hz FIGURE 3.17 Power"Transducer Active F i l t e r C O 38 to improve s tab i l i t y of the power system. They are speed error, accelera-t ion , rate of change of terminal :voltage, armature-current, f ie ld current, and direct and quadrature subtransient f ie ld currents. Digital and analogue computer-studies-revealed that :the speed-error-signal was the most effective for improving system s tab i l i t y . A dc tachometer is attached to the synchronous machine shaft through a 1:5 gear t ra in . Theroutput of~the"tachometer at a shaft speed of 1800 rpm is 155 volts. A negative reference voltage of 155 volts is added to the tachometer signal in a summing amplifier and the resulting error signal passes through an active f i l t e r . The f i l t e r is similar to that described in the power signal section. Protection of the input c i rcu i t of the summing amplifier is provided by diodes D-j and as in Figure 3.18. 3.8 Braking Resistor (12) Studies^ ' have indicated that a resistive load connected directly to the terminals of a synchronous machine after a transmission line is disconnected immediately after a fault improves the transient s tab i l i ty of the system. A block diagram of the Braking Resistor is shown in Figure 3.19 and details appear in Figure 3.20. In Figure 3.20(a), the f i r s t mono-stable is used to eliminate false triggering in the pushbutton by intro-ducing a time delay of about .8 seconds. The contact period of the second monostable is variable and can be set from .2 to 4 seconds so that the unijunction osc i l la tor , and in turn, the switch are turned on for the period set. Four s i l icon controlled rec t i f i e r s , SCR's, arranged as in Figure 3.20(b) are selected as switching devices. Each wi l l carry up to 70* Tachometer 180v Reference 90v 5x70* • \ A A A - — J 1N4001 FIGURE 3.18 Speed-Transducer Circuit Push Button and Monostable Variable Period Monostable Unijunction Oscillator SCR Switch FIGURE 3.19 Braking Resistor Block Diagram o FIGURE 3.20 Braking Resistor Circuit (a) Control Circuit (b) SCR Switch 42 three times the ;rated current of the synchronous machine. After started, the SCR1s are continually f i redby a lOKHz pulse train from the uni--4 junction osc i l la tor . The starting delay is about-10 sec. It is fe l t that the complexity and expense involved in having a l l SCR's commutate or turn off at the same-time is not warranted; The maximum time that only one SCR is conducting is half a cycle. 3.9 Power Supplies Ten power supplies are required for the operation of the system. Power Supply 1, which supplies ±15V to most of the low voltage operational amplifiers, is required to have low ripple and d r i f t . A commercial supply is selected for this purpose. In order to reduce costs, the remaining supplies are designed and constructed. Power Supply 2 provides ±15V to the low voltage operational amplifier of the negative resistor. Two separate amplifier supplies, 2 and 9, are necessary-as-there- is a difference in ground potential between the main computer and the-negative resistor. Power Supply 3, rated at ±12V, operates the selector switch and the braking resistor. Power Supply 4 provides a-±12V reference. Supplies 5 and 6 provide plus and minus 40V respectively- for the output stage of the f ie ld amplifier while supplies 7 and 8 respectively supply plus and minus 90V for the negative resistor :output stage. Power Supply 9 supplies ±120V to the high voltage operational amplifier of thenegative resistor. Power Supply 10 supplies ±120V for the high voltage operational amplifier of the f ie ld amplifier. Figure 3.21 is the c i rcui t of supplies 2, 3, 4, 9 and 10, Figure 3.22 that of supplies 5 and 6, and Figure 3.23 that of 7 and 8. Consider f i r s t , Figure 3.21. The transformer supplying the bridge rec t i f ie r is centre tapped so as to provide two voltages opposite FIGURE 3.21 Circuit for Power Supplies 2, 3, 4, 9 and 10 4=» C O FIGURE-3.22 Circuit fo r Power Supplies 5 and 6 f90v F2 D T 3600 ufd. 150v 3A Slow Blow 3A MR 1033A 167180 5K 1w FIGURE 3.23 Circuit for Power Supplies 7 and 8 -c=> 46 in polarity. As both the positive and negative circuits of the supply are s imi lar , with the exception of polarity , only the positive portion wi l l be examined in deta i l . Resistor Rc and R^  and capacitor C form the f i r s t f i1tering stage; FiIter capacitor C is made as-large as possible in order to aehieve 1ow ripple without an expensive regulator. Capacitors of this size-require a series 1 surge resistor Rc of a few ohms to prevent the diode bridge and the capacitor from being damaged when the supply is f i r s t energized. No such surge resistor is required for the large f i l t e r capacitor on the output of the supply since the current overload protection c i r c u i t , R.j and D, acts to l imit the charging current. A bleeder resistor R^  is placed across the f i l t e r capacitors in order to minimize the danger of shock after the supply has been turned off. As large electrolyt ic capacitors can - have-an appreciable impedance at radio frequencies, capacitor is added to bypass to ground any high frequency signals from the load. Capacitor was placed across the primary of the transformer to prevent high frequency signals from entering the supply from the l ine . The regulator of the power supply in Figure 3.21 consists of a transistor in series with the rec t i f ie r and the load. The voltage across the transistor is automatically-adjusted7so as-to keep the :voltage across the load constant. The output voltage is7determined by an internal voltage reference-circuit formed by Rz and zener diode D z- The voltage across the zener diode is essentially independent of the supply voltage. This reference-voltage is applied to the base of the regulating transistor. The transistor acts to keep the emitter at almost the same voltage as that of the base. Thus,-since thebase- is connected to a constant reference voltage, the emitter is maintained'at almost the same voltage. Resistor R- and diode D of the same figure form a current 47 overload protection c i rcu i t to prevent the"regulator transistor from being destroyed under fault conditions. As the current-through-approaches the l imit of the supply, the diode D gradually becomes-forward biased connecting the-base of the regulating transistor to the load end of Ry An increasing amount of available base current is-diverted through D causing the transistor to cut off. In the extreme ease where the output voltage is zero, the transistor is almost7completely cut off . A l l supplies of this type wi l l sustain continuous short c ircuits without damage. Knowing the forward transfer 7 characteristics of diode D, the base-emitter voltage of the regulating 7transistor and the maximum current, the resistor R^  can be estimated. Supplies 5 and 6, Figure 3.22, are similar in operation to those of Figure 3.21. Because of increased7power requirements, i t is (necessary to supply the symmetrical positive and negative f ie ld amplifier voltages from two supplies. The f i r s t f i l te r ing section is made up of a large capacitor C and a bleeder resistor R .^ A surge resistor is not required as the overload current is limited by the resistance in the transformer. The regulator is identical in operation with that of Figure 3.21 except that two transistors in the Darlington configuration are used for increased current gain. The current l imiting c i rcu i t and the f i l t e r of the f i r s t stage are identical in operation to those- in Figure 3.21. The output power required of supplies 7 and 8, Figure 3.23, is large. Readily available transformers wi l l just meet the required voltage output. The introduction of a voltage regulator to those power supplies would drop the available output voltage excessively. Thus, supplies 7 and 8 are unregulated. The sl ight increase in ripple is not c r i t i c a l as the supply feeds a common-collector amplifier. Capacitor 48 surge resistors are not needed as current"1imiting takes place in the transformer. 3.10 System Arrangement The completed system built is shown in Figure 3.24 (front view) and Figure 3.25 (rear view). Rack A contains computation, control and most power supplies. Rack B contains the voltage and power transducers, braking resistor , and f ie ld and negative resistance current amplifiers. Room is lef t for future expansion. FIGURE 3.24 Completed System, Front View FIGURE 3.25 Completed System, Rear View 51 4. TEST RESULTS 4.1 Section Tests Transfer Function Simulator Two transfer functions are set on the simulator and their step responses compared with digital computation results. The step responses of the Portage Mountain and Kincaid transfer functions are shown in Figure 4.1(a) and (b) respectively. Analytic digi tal com-puter solutions for the same transfer functions are shown in Figures 4.2 and 4.3 respectively. Selector Switch Figure 4.4 displays the operation of the selector switch. The sine wave represents a linear signal from the transfer function simulation section and the step voltages, the forced excitation. Switching between modes and between levels takes place in less than — 6 10 seconds which is negligible compared with the operating time of the system to be studied. Field Amplifier The step response of the f i e ld amplifier is shown in Figure 4.5. _5 The rise time of approximately 10 seconds just i f ies the assumption that the time delay in the amplifier is negligible compared with the time constants being simulated. Negative Resistor The variation in f ie ld time constant with increasing negative resistance is shown in Figure 4,6. A step voltage is applied through the f ie ld amplifier. The f inal 'current is maintained constant. The 63% level is marked by a second trace; The rise time of the power FIGURE 4.1(a) Simulator Step Response of Portage Mountain Transfer Function 1X3 Time (5ms/div) FIGURE 4.1(b) Simulator Step Response of Kincaid Transfer Function e n Co 0 1 2 3 4 5 6 7 8 TIME (MS) On FIGURE 4.2 Digital Computer Solution of Step Response of Portage Mountain Transfer Function 4 TIME (MS) FIGURE .4.3 Digital Computer Solution of Step Response of Kincaid Transfer Function Selector Voltage Output (5V/div) 9S > •I— I X ) Q _ O CD ro Time (5us/div) FIGURE 4.5 Field Amplifier Rise Time FIGURE 4 . 6 Variation in Field Time Constant with Negative Resistance FIGURE 4.6 Variation in Field Time Constant with Negative Resistance cn CD 60 amplifier section of the negative resistor is shown in Figure 4.7. Figure 4.8 represents the field"current variations under forced excitation. The top trace is proportional to the applied voltage while the lower trace is proportional to the f ie ld current. The very sl ight discontinuity in theupper portion of the lower trace is caused by the negative power supply switching out of the c i rcu i t . Voltage Transducer The voltage transducer generates a dc signal proportional to the terminal voltage of the synchronous generator. Figure 4.9 is a calibration curve'obtained withanAVO meter relating the terminal voltage to the outputof the voltage transducer. The quality of transformer results in a sl ight nonlinearity at voltage extremes. Power Transducer The power transducer generates a dc signal proportional to the power output of the synchronous generator. _ A calibration curve relating the power output of the generator to the output of the power transducer is shownin Figure 4.10. Wattmeters are used to calibrate the transducer. The r i set ime of the transducer is shown in Figure 4.11. Speed Transducer Figure 4.12-is the generator speed error signal and represents a 4% decrease resulting from a load current increase from 1 to 3 amperes. Braking Resistor Figure 4.13(a) displays the c los ingof the SCR switch. The three traces are proportional to the phase currents in the load resistor. Figure 4.13(b) indicatesthe maximum and minimum con-cn FIGURE 4.7 Negative Resistor Power Amplifier Rise Time - J CM =3 - - Q_ > 4-> •r- 13 T3 O > s-un o >— +-> CO 0 ) - r -CT) (13 CD +J C£ O CD > > T3 -t-> >— n3 CD CD • i - CD CD CD O O ra ro s- s-Q - S O O 1— +J o CO Time ( ls/div) FIGURE 4.8 Negative Resistor Under Forced Exci tat ion VOLTAGE TRANSDUCER OUTPUT (VOLTS DC) C3 \ j *^ Oj £9 POWER TRANSDUCER OUTPUT (VOLTS) Time (lOms/div) FIGURE 4.11 Power Transducer Rise Time S ^ ^ ^ ^ ^ • • M M « « « • • • • M H B i • • • • H H K I WIBi lu rs-tdrMiti u<ar»c s s Time (ls/div) (155V/1800rpm) FIGURE 4.12 Generator Speed Error cn cn FIGURE 4.13(a) SCR Switch Operation Time (ls/div) FIGURE 4.13(b) Braking Resistor Operation Time 69 duction period of the SCR switch. The trace is the output of the power transducer. 4.2 System Tests In order to test the solid state voltage regulator-exciter bu i l t , not just as separate components, but also as an integrated part of the complete power system test model, the voltage regulator-exciter is connected to a real machine. However, because the remaining parts of the system, the prime mover, the speed governor, the generator, and the trans-ducer l ine have not yet been completed, the experiments are constrained to a constant speed drive withoutusing theselector switch, power trans-ducer, or braking resistor. Two tests are carried out. The f i r s t is an open loop test with a step load application withouta voltage error feedback. The voltage error signal versus time is observed. The second is a closed loop test with a voltage er ror feedback control. The voltage regulator-exciter transfer function for the Kincaid machines is simulated. For both tests the f ie ld voltage is adjusted so that the terminal voltage is 150V l ine - to - l ine with an i n i t i a l load of IA. The synchronous generator is driven by a synchronous motor. "The lower trace of Figure 4.14 displays the transient speed change after the load application. The maximum speed change is about .66%. The upper trace of the same figure is the voltage error signal. Figure 4.15(a), (b), and"(c) are-voltage errors with load application without voltage'control; time constants are .014, 1, and 3 seconds respectively. A constant vol tage is fed directly to the f ie ld amplifier and adjusted-so that ;the"terminal-voltage-is 150V l ine - to - l ine for an i n i t i a l load of IA. The spike in the traces is caused by the > > T 3 "O LO r — o - — c o S - - r -O 4-> s- m LU S -ro CD > CT) 03 T 3 +-> CD r— CD O Ca-rs - 00 CD CD O O Q - E O O 4-> O CO Time (.2s/div) (155V/1800rpm) FIGURE 4.14 Speed Variation and Voltage Error for a Load Application c FIGURE 4.15 Voltage-Error with Load Application without Voltage Control ZL 73 rapid change of current due to switching. Figure4.16(a)'through'(f) are voltage errors with load appl i -cation with voltage c o n t r o l F i g u r e 4.16(a) and (b) have a f ie ld time constant of 1 second, (c) and (d) a time constant of 3 seconds, and (e) and (f) a time constant of 5 seconds. Further, Figure 4.16(a), (c), and (e) have a gain of 20% of that shownin Figure 3.7 while Figure 4.16(b), (d), and (f) have a gain of 40%. The spike-due to switching is again observed. Note the decrease-in error voltage with increased gain for a constant f i e ld time constant; The error voltage is also reduced as the negative-resistance is increased since-a'-smaller f ield-voltage is required in order' to pass the same amount of f ie ld current. The load application is the same for both tests, from IA to 3A or from 18% to 55% of'the'ful1 : load"current of the generator. A load application to 100% was not possible because synchronous speed could not be maintained without speed control. FIGURE 4.16 Voltage-Error with Load Application with Voltage Control FIGURE 4.16 Voltage-Error with Load Application with Voltage Control cn FIGURE 4.1G Voltage-Error with Load Application with Voltage Control cn 77 5. CONCLUSION A solid state voltage regulator-exciter for a -new test model of a power system has been designed; constructed, and-tested. This device is capable of simulating the-response-charaeteristies-of almost any known excitation system. Provision has been made -for-forced-excitation in both positive and negative directions. A"variable-negative resistor has also been designed and constructed to allow the micro generator f ie ld time constant to be varied. A power transducer was developed which outputs a signal voltage proportional to the instantaneous and average real power flow from-the synchronous generator. A high speed solid state switch for a - braking resistor" has ~-been designed and buil t for load-rejection resistance-braking studies. Component tests indicate that a l l the subsystems meet design requirements. Tests of the voltage regulator-exciter system- indicate- that the- various- subsystems work in concert. Future development may include a more accurate, noise-free .... f i ? ) speed measuring-system. Literature A ' suggests that the system should be capable of resolving a speed change of .01%. As most;analogue systems are capable of resolving changes of .1% at best, a digital system is therefore required. The very s i ightnonl inear i t ies r and phase shifts in the power-transducer transformers could be corrected by better quality transformers and suitable phase shifting 7networks: F inal ly , the push-button control for the selector'switch and the braking resistor w i l l be replaced with a computer directed control c i rcu i t . 78 REFERENCES 1. Robert, R., Micromachines and Microreseaux: Study of the Problems of Transient Stabi l i ty by the"Use of Models Similar Electro- mechanically"to ExistingMachines and^Systems, The International Conference on Large Electric Systems (CIGRE), Vol, I I I , No. 338, 1950. 2. Venikov, V.A., Representation'of Electrical Phenomena on Physical Models as Applied to"Power System Design, The International Conference on Large"Electric Systems (CIGRE), Vol. I l l , No. 339, 1952. 3. Adkins, B., Micromachine Studies at Imperial Col lege, Electr ical Times, July, 1960. 4. James, H.B., The Use of an Analogue Computer to Optimize the Transient Response of an Aircraft-Type Generator-Regulator System, AIEE Transactions, Vol."72 II , November, 1953, pp. 363-368. 5. Van Ness, J.E.,-Synchronous Machine Analogues for Use with the Network Analyzer, AIEE Transactions, Vol. 73 IIIB, October, 1954, pp. 1054-1060. 6. Riaz, M., Analogue-Computer Representations -of Synchronous Generators in Voltage-Regulation Studies, -AIEE -Power-Apparatus and Systems, No. 27, December, 1956, pp. 1178-1182. 7. Aldred, A. and Shackshaft, G., The Effects-of-a-Voltage-Regulator-on the Steady-State-and-Transient-Stability-of-a Synchronous  Generator, Proceedings of the IEE, Vol. 105A, August, 1958, pp. 420-427. 8. Corless, K.G. and Aldred, A.S. -, An - Experimental-Electroni c Power-System Simulator, Proceedings-of the IEE,-Vol. 105A, October, 1958, pp. 503-511. 9. Aldred, A .S . , Electronic Analogue Computer-Simulation of Multimachine Power System Networks, Proceedings-of the IEE, Vol. 109A, June, 1962, pp. 195-202. 10. Peterson,-H.A.i Krause, P.C. and Luin i , J . F . , An Analogue Computer Study of a Parallel AG-and DC Power System, IEEE Transactions on Power Apparatus and Systems:, Vol. 85, No. 3, March, 1966, pp. 191-209. 11. Peterson, H.A. and-Krause-,-P.-C.,-A-Direct-and Quadrature Axis Representation of a-Parallel AC-and DC Power System, IEEE Transactions on Power Apparatus and Systems, Vol. 85, No. 3, March, ,1966, pp. 210-225. 79 12. E l l i s , H.M;, et a l , Dynamic Stabi l i ty of the Peace-River Trans- • mission System^ IEEE-Transactions on-Power-Apparatus and Systems, Vol. 85, No. 6, June, 1966, pp. 586-600. 13. Lokay, H.E; and Bolger, R;L; -, Effect of-Turbine-Generator Representa-tion in System Stabi l i ty Studies, IEEE Transactions on Power Apparatus and Systems, Vol. 84, No. 10, pp. 933-942. 14. Searle, C L . et al^ Elementary-Circuit Properties of Transistors, (Book), John Wiley and Sons, 1965, p. 217-222. 15. Philbrick Researches Inc., Applications Manual for Computing Ampli-f i e r s •f o r Mode 11 i n g Me as u r i ri g Man i p u 1 a t i n g • an d Mu c h Else, (Book), George A. Phil brie Researches Inc., June, 1966, pp. 74-75. 


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