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Arithmetic circuitry for a time-sequential pulse-position-modulation analog computer. Park, William John 1958

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ARITHMETIC CIRCUITRY FOR A TBIE-SEQUENTIAL PULSE-POSITION-MODULATION ANALOG COMPUTER by WILLIAM JOHN PARK JB.A.Sc, University of B r i t i s h Columbia, 1955 A THESIS SUBMITTED IN PARTIAL FULFILMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE i n the Department of E l e c t r i c a l Engineering We accept t h i s thesis as conforming to the standards required from candidates f o r the degree of Master of Applied Science Members of the Department of E l e c t r i c a l Engineering The University of B r i t i s h Columbia A p r i l , 1958 Abstract This thes i s i s concerned with the ar i thmet ic c i r c u i t r y of a t ime-sequential pulse-posi t ion-modulat ion analog computer. The p r i n c i p a l feature of t h i s computer i s that functions are represented as pulse pos i t ions which occur i n time-sequence. Ar i thmet ic c i r c u i t r y i s developed which can manipulate functions i n t h i s form on a t ime-sharing bas i s . For s i m p l i c i t y i n design, the e s s e n t i a l ar i thmet ic operations, add i t ion , subtract ion , and m u l t i p l i c a t i o n , are per-formed by the var ious arrangements of three basic un i t s - an integra tor , an "on-off type" gate, and a voltage comparator. The remaining ar i tmet ic operat ion, d i v i s i o n , c a l l s for a d d i t i o n a l u n i t s . Input-output operations and funct ion generation u t i l i z -ing these basic un i t s are also descr ibed. i i I n p r e s e n t i n g t h i s t h e s i s i n p a r t i a l f u l f i l m e n t o f the r e q u i r e m e n t s f o r an advanced degree a t the U n i v e r s i t y o f B r i t i s h C olumbia, I agree t h a t t he L i b r a r y s h a l l make i t f r e e l y a v a i l a b l e f o r r e f e r e n c e and s t u d y . I f u r t h e r agree t h a t p e r m i s s i o n f o r e x t e n s i v e c o p y i n g o f t h i s t h e s i s f o r s c h o l a r l y purposes may be g r a n t e d by th e Head o f my Department o r by h i s r e p r e s e n t a t i v e * I t i s u n d e r s t o o d t h a t c o p y i n g o r p u b l i c a t i o n o f t h i s t h e s i s f o r f i n a n c i a l g a i n s h a l l not be a l l o w e d w i t h o u t my w r i t t e n p e r m i s s i o n . Department o f E l e c t r i c a l E n g i n e e r i n g . The U n i v e r s i t y o f B r i t i s h C olumbia, Vancouver 8, Canada. Date January 10, 1958. Acknowledgement The author wishes to g r a t e f u l l y acknowledge Dr. E.V. Bonn, under whose guidance t h i s work was performed, Dr. P. Noakes, grantee of the project, and also Mr. M.P. Beddoes and Dr. A.D. Moore f o r t h e i r h e l p f u l suggestions. The work described i n t h i s thesis i s part of a project sponsored by the Defence Research Board, Department of National Defence, Canada, under Grant Number DRB C-9931-02(550-GC). The author's post-graduate studies were made possible through a B r i t i s h Columbia Telephone Company Scholarship which he was awarded i n 1955 and through f i n a n c i a l assistance received from the Defence Research Board while he was on educational leave from the Canadian Armament Research and Development Establishment at Quebec, P.Q. v i i Table of Contents page Abstract i i Acknowledgement » v i i 1. Introduction 1 2. General Description of Computer 7 3 . Theory of Arithmetic C i r c u i t r y 13 3-1. Introduction 13 3-2. Addition 14 3-3. Subtraction 17 3-4. M u l t i p l i c a t i o n 19 3- 5. D i v i s i o n 22 4. Basic Components of Arithmetic C i r c u i t r y 28 4- 1. Introduction 28 4-2. The Integrator 28 4-3. The Gate 34 4-3-1. The Diode Switch 34 4-3-2. The Bistable M u l t i v i b r a t o r 36 4- 4. The Comparator 39 4-4-1. The M u l t i a r 40 4-4-2. The Blocking-Oscillator 41 4-4-3. The Bridge-Type Regenerative Comparator 42 5. Details of M u l t i p l i e r 48 5- 1. Introduction 48 5-2. C i r c u i t Design 48 5- 3 . Description of Squaring Operation 52 6. Test of M u l t i p l i e r 56 6- 1 . Method and Results of Test 56 6 -2 . Remarks 62 Appendix A. Special Operations 64 A - l . Input-Output Operations 64 A-2. Function Generation 65 Appendix B. K2-X Amplifier Specifications 68 Appendix C. References 69 i i i L i s t of I l l u s t r a t i o n s Figure page 2-1. Diagram showing incremental method of integration. ... 7 2-2. Solution of design equation (2-1) i n block-time operations. to follow 8 2-3. Block diagram of Time-Sequential Pulse-Position-Modulation Analog Computer. to follow 9 2-4. Magnetic Storage Drum. 10 2- 5. Pulse-position function representation 11 3--1. Symbols for basic u n i t s . to follow 13 3-2. F i r s t method of addition 15 3-3. Second method of addition. to follow 16 3-4. Method of sign inversion 18 3-5. Subtraction shown i n block-time operations 19 3-6. Method of m u l t i p l i c a t i o n . to follow 19 3-7. Output of Integrator 1 20 3-8. Operations of Gates 1 and 4 21 3-9. Diagram showing outputs of Integrators 1 and 2 i n m u l t i p l i e r f o r various inputs. to follow 22 3-10. A method of function generation 23 '3-11. Diagram of function screen 24 3-12. Diagram of function inversion screen 24 3-13. D i v i s i o n shown i n block-time operations 25 3- 14. Diagram showing method of d i v i s i o n employing a servo-divider. to follow . 25 4- 1. Simple rc integrating c i r c u i t . to follow 28 i v Figure page 4-2. Modified integrating c i r c u i t . to follow 28 4-3. Operational integrating c i r c u i t . to follow 28 4-4. Responses of integrating c i r c u i t s to step-voltage inputs. to follow 30 4-5. Method f o r c a l c u l a t i n g output impedance of operational'amplifier c i r c u i t 31 4-6. The Integrator 33 4-7. Ramp^-voltage device 34 4-8. C i r c u i t d e t a i l s of ramp-voltage device and bistable m u l t i v i b r a t o r . to follow 35 4-9. Waveforms i n the bistable m u l t i v i b r a t o r 38 4-10. The M u l t i a r . 40 4-11. The Blocking-Oscillator 41 4-12. The Comparator (down-going). to follow 42 4-13. Waveforms i n the comparator. to follow 43 4-14. S t a t i c c h a r a c t e r i s t i c s of comparator 45 4-15. Re-designed Comparator (down-going). to follow 45 4- 16. Output pulse from re-designed comparator 46 5- 1. Block diagram of Squarer. to follow .* 48 5-2. Diagram showing operational r e l a t i o n s h i p s of Integrators 1 and 2 49 5-3. Operational d e t a i l s of Squarer. to follow 51 5-4. Method of generating channel-pulses 52 v Figure page 5-5. Waveforms i n Squarer. to follow 53 5- 6. Outputs of Integrators 1 and 2 i n Squarer 55 6- 1. Block diagram of t e s t i n g device 56 6-2. Graph of difference between Squarer's experimental and t h e o r e t i c a l r e s u l t s versus "x" i n normalized form. to follow 58 6-3. Diagram showing outputs of CI, C3, and Integrator 1. to follow .... 59 6-4. Diagram showing outputs of C2 and Integrator 2 60 A - l . Input-output operations. to follow 64 A-2. Diagram showing p r i n c i p l e s of pulse-position-modulation function generation. to follow 65 A-3. Method of performing function generation. to follow 65 B - l . C i r c u i t d e t a i l s of K2-X P h i l h r i c k a m p l i f i e r . to follow 68 v i ARITHMETIC CIRCUITRY POR A TIME-SEQUENTIAL PULSE-POSITION-MODULATION ANALOG COMPUTER 1 . Introduct ion Advances i n Science and Engineering have brought with them numerous problems which mathematics has been unable to solve adequately i n closed form. This i s p a r t i c u l a r l y true of d i f f e r e n t i a l equations encountered i n most s c i e n t i f i c and engineering problems, as these equations are almost always nonl inear with var iab le c o e f f i c i e n t s . The recourse i s to numerical or graphica l methods of so lu t ion which may involve considerable manual e f f o r t . I t i s not su rpr i s ing then to note considerable a c t i v i t y , as evidenced by the increas ing numbers and types of computers i n use i n Science and Industry, d i rec ted towards obtaining fast and accurate so lut ions to these problems. The analog computer i s one type of computer that has been used extensively i n Science and Industry. It derives i t s name from the fact that phys i ca l va r i ab le s inherent i n the machine are used to represent mathematical funct ions . I t has also seen considerable change i n design since i t s ear ly begin-nings . E a r l y computers of t h i s type were e n t i r e l y mechanical ( 4 ; 5 ; 1 5 ) . They employed shaft ro ta t ions to represent mathe-mat ica l funct ions . Ari thmetic operations i n v o l v i n g these functions were performed by interconnect ing the var ious shafts involved by means of gears. Integrat ion was accomplished through the use of mechanical disc integrators ( 2 2 , pp. 5 - 9 ) . Judged by present-day standards, such computers were large , r e l a t i v e l y unwieldy, and necess i tated p r e c i s i o n machining i n producing the various components of the computer. 2 The present-day counterpart of the mechanical analog computer i s the electro-mechanical analog computer. In t h i s type of computer, voltage i s the physical variable which repre-sents mathematical functions. Because of t h i s f a c t , complicated mechanical interconnections, which were necessary i n the Bush-type computer (4),, have been eliminated. Operations such as addition, subtraction, and integration are now e a s i l y accomp-lis h e d by the simple e l e c t r i c a l interconnection of a number of basic components (9; 20, pp. 27-47). These components, ca l l e d adders and integrators, are small p h y s i c a l l y and t h e i r con-st r u c t i o n does not require precision machining. Problems of function generation and m u l t i p l i c a t i o n a r i s i n g from complex mathematical problems are handled through the use of e l e c t r o -mechanical, servo-operated function generators and m u l t i p l i e r s (14, pp. 27-47). By the nature of the integration process, physical time i s the independent variable i n the computer. Con-sequently a computer of t h i s type, unless provided for by other means (14, p.16),. i s only useful f o r solving d i f f e r e n t i a l equations having time as the independent v a r i a b l e . The process of interconnecting the various basic components of an analog computer to solve a problem i s c a l l e d programming (17; 24). The great asset of the analog computer i s the ease with which problems may be programmed. This i s due to the fact that the components of the computer are connected i n a manner p a r a l l e l i n g the terms i n the d i f f e r e n t i a l equation. However, because of t h i s p a r a l l e l arrangement, each term i n the equation requires a separate computer component. Con-sequently, the number of components necessary f o r the s o l u t i o n of a problem increases with the complexity of the problem. Furthermore, the -representation of functions by physical 3 var iab les and the use of phys i ca l elements i n performing mathematical operations can introduce considerable error (16). These l a s t two aspects of the analog computer are serious l i m i t -at ions i n some cases. The degree of complexity of a problem may be such that the computer i s not large enough to solve i t . Or, for some cases, the errors introduced by the computer may be too great . To overcome these two l i m i t a t i o n s of the analog computer, the d i g i t a l computer was developed. The d i g i t a l computer (21) represents the va lue of a funct ion i n a d i g i t a l manner s i m i l a r to that i n a counting machine. Moreover, there i s no t h e o r e t i c a l l i m i t on the accuracy of the machine, a p r a c t i c a l l i m i t however being imposed by the phys i ca l s i ze , and hence, d i g i t a l capacity of the machine. Unlike the analog computer, the d i g i t a l computer solves problems i n a t ime-sequential or i t e r a t i v e f a sh ion . The process i s very s i m i l a r to the manner i n which a person would solve the problem i f , for example, he employed a desk c a l c u l a t o r . Because of t h i s t ime-sequential manner of so lv ing problems, there i s no need fo r dup l i ca t ion of components as there i s i n an analog computer. For example: one m u l t i p l i e r i s s u f f i c i e n t to per-form a l l m u l t i p l i c a t i o n operations. Moreover, t h i s t ime-sharing feature of a d i g i t a l computer permits complete f l e x i b i l i t y i n programming. But i t a l so adds complicat ions . Every operat ion that i s to be performed must be included i n the program i t s e l f . Consequently, the phys ica l time of operation of the computer bears no i m p l i c i t r e l a t i o n s h i p to the mathematical time involved i n the so lu t ion of a problem. The d i g i t a l d i f f e r e n t i a l analyzer i s a v a r i a t i o n of both types of computers (3; 19). I t i s the r e s u l t of an attempt to achieve the ease of programming and inherent scaled-time 4 operation of the analog computer as well as the accuracy of the d i g i t a l computer. In t h i s type of computer, a function i s represented by the r e p e t i t i o n rates of d i g i t a l pulses (13, pp. 233-246; 23). Programming i s reasonably f l e x i b l e since i t i s s i m i l a r to the flow or p a r a l l e l process i n the analog computer. Because of the manner i n which the computer operates, accuracy and time of operation are r e l a t e d . And, unfortunately, the r e l a t i o n s h i p i s such that the time of operation increases as the accuracy increases. At the present time, a d i g i t a l d i f f e r e n t i a l analyzer takes approximately ten times longer to operate than an analog computer when both computers are programmed to give solutions of the same accuracy. This l a s t c h a r a c t e r i s t i c of the analyzer gives the analog com-puter a decided advantage i n solving problems involving r e a l -time simulation. Analog computers are said to be operating i n " r e a l -time" when they are so programmed that the scale f a c t o r which rela t e s the physical time of operation of the computer to the mathematical time^ of the problem i s unity. In other words, events occurring i n the computer occur at the same time as they would i n the actual system. The need fo r real-time simulation i s motivated by such problems as " f i r e - c o n t r o l " and " f l i g h t simulation". In both problems, c e r t a i n information being used i n the computer i s a function of real-time. In the problem of f i r e - c o n t r o l , information concerning the motion and l o c a t i o n of the target and the positioning of the ^projectile launchingr-device i s a function of real-time. S i m i l a r l y i n f l i g h t simu-l a t i o n , information which involves the actions of a human operator i s necessarily a function of real-time. A computer then i n solving these problems must necessarily operate i n real-time. Unfortunately these problems often involve c a l c u l a -tions that demand extreme accuracy. This demand cannot be economically met by present-day analog computers. In an e f f o r t to overcome th i s d i f f i c u l t y , the idea has been put f o r t h to interconnect a d i g i t a l computer with an analog computer (1; 2). The interconnection would be effected by means of a device which i s capable of converting functions from analog form into d i g i t a l form and conversely. Although the computer program-ming would be somewhat complicated by t h i s arrangement, the demand for accuracy and real-time simulation would be f u l f i l l e d This idea of interconnecting analog and d i g i t a l computers has affected the basic design philosophy of the com-puter being b u i l t i n the E l e c t r i c a l Engineering Department of the University of B r i t i s h Columbia. The computer"1 was designed o r i g i n a l l y f o r time-sequential operation as i n a d i g i t a l computer and f o r voltage functional representation as i n an analog computer. In the new design, functions are repre-sented by the pos i t i o n of pulses on the surface of a magnetic drum. Thus the analog feature of functional representation remains while a secondary feature i s added i n that functions are suited f o r easy conversion to d i g i t a l form because they are i n e f f e c t , already i n pulse form. This feature makes t h i s computer useful f o r use i n conjunction with a d i g i t a l computer. 1 Previous theses by Fiorentino (8) and Hildebrand (11) describe the m u l t i p l i e r and the function generator f o r the computer i n i t s o r i g i n a l design. 6 The t i m e - s e q u e n t i a l method of c o m p u t a t i o n has been r e t a i n e d as a b a s i c f e a t u r e i n the new d e s i g n . T h i s t h e s i s i s concerned w i t h the t h e o r y and d e s i g n o f c i r c u i t s t o p e r f o r m a r i t h m e t i c and s p e c i a l o p e r a t i o n s f o r t h i s computer. The b a s i c t h e o r y o f the a r i t h m e t i c o p e r a t i o n s i s d e v e l o p e d , and t h e c i r c u i t and o p e r a t i o n a l d e t a i l s o f t h e f o u r - q u a d r a n t m u l t i p l i e r a r e d e s c r i b e d . Por r e a s o n s of s i m p l i c i t y , t h e m u l t i p l i e r was t e s t e d under s i m u l a t e d con-d i t i o n s as a s q u a r i n g d e v i c e . S i n c e the s p e c i a l o p e r a t i o n s do not f a l l d i r e c t l y w i t h i n the s u b j e c t o f t h i s t h e s i s , t h e y have been d e s c r i b e d i n the a p p e n d i x . I n o r d e r t h a t t h e d e s i g n o f t h e a r i t h m e t i c c i r c u i t r y might be f a c i l i t a t e d , i t was d e c i d e d t h a t a l l t h e a r i t h m e t i c c i r c u i t r y (and a l s o the s p e c i a l o p e r a t i o n s c i r c u i t r y ) would be composed of s i m p l e , b a s i c u n i t s . Moreover, s i n c e m u l t i p l i c a t i o n i s t h e most complex o p e r a t i o n ( a p a r t from d i v i s i o n ) , o n l y t h e m u l t i p l i e r would be b u i l t and t e s t e d t o check t h e v a l i d i t y of t h e t h e o r y and t h e f e a s i b i l i t y o f e m p l o y i n g t h e b a s i c u n i t s chosen. S u c c e e d i n g t h e s e s w i l l d e s c r i b e t h e i n t e g r a t o r and f u n c t i o n g e n e r a t o r f o r t h e computer. 2. General Descr ip t ion of Computer 7 The numerous problems that are encountered i n design-ing a computer to solve any type of d i f f e r e n t i a l equation are too complex to consider at an ear ly stage of design. Con-sequently, t h i s computer i s designed to solve the fo l lowing general d i f f e r e n t i a l equation: ,n j n - 1 + f ^ — f + d t n 1 d t n " 1 n ^dt n x y n _ 1 ( t + A t ) 1 where the coe f f i c i en t s may be v a r i a b l e . Any problems encount-ered i n /the future i n programming equations w i l l be considered as they a r i s e . Because the basic operat ion of the computer i s d i g i t a l or i n c r e -mental i n form, the necessary oper-at ions to be performed i n Eq. ( 2 - 1 ) do not a l l occur at the same time but instead occur i n time-sequence. The method of in tegra t ion , which i s e s s e n t i a l l y rectangular or Eu le r in tegra t ion ( indicated by Equations (2-2), (2-3), and (2-4)), determines the sequence of operat ion of the computer. y n _ : L ( t + A t ) = y n _ 1 ( t ) + y n ( t ) A t (2-2) (2-3) y n " 3 ( t + A.t) * y n _ 3 ( t ) + y n " 2 ( t ) A t (2-4) t + A t y n ( t + A t ) * - t P i g . 2 - 1 . Diagram showing incremental method of • i n t e g r a t i o n . y n " 2 ( t + A t ) = y n " 2 ( t ) + y ^ t j A t It i s apparent frOm Equation (2-2) and P i g . 2 - 1 , t h a t before y n _ 1 ( t + A t ) can be ca lculated the product y n ( t ) A t 8 must be obtained which means that y ( t ) must occur before n—1 y ( t + A t ) . This establ ishes the order of in tegra t ion and hence the sequence of operation of the computer, as shown below. n i n-1 S n-2 \ y — y — - y H|> time Figure 2-2 i l l u s t r a t e s how the computer solves the design equation, Eq . (2 - 1 ) , i n a t ime-sequentia l manner. The diagram i s drawn on the basis of block-time operations. That i s , a l l operations occur i n lengths of time that are mult ip les of a spec i f ied i n t e r v a l which i s c a l l e d a c y c l e . A cycle i s represented i n F i g . 2-2 by the width of a rectangular b lock . A l l the block-time operations i n a v e r t i c a l column of the diagram occur during the same c y c l e , the cycles being arranged consecut ively i n time from l e f t to r i g h t . The h o r i -zonta l and v e r t i c a l separations of the blocks al low the blocks to be l inked by f low- l ines according to the sequence of operat ion. The in tegra t ion operation indicated by E q . (2-2) i s performed i n Cycles 1, 2, and 3. In Cycle 1, y n ( t ) i s obtained n-1 • from the subtract ion g(t) - 2_[ f . y J and i n the same cycle the in tegra t ion operation begins. In the second c y c l e , y (t) n—1 i s obtained from the y storage uni t (the c i r c l e s represent storage uni t s ) and enters the in tegra t ion operation as w e l l as beginning another, indicated by Eq. (2-3). F i n a l l y , i n the t h i r d cycle the new value of y 1 1 -"'", y n _ ± ( t + A t ) , i s obtained and n-1 put into the y storage u n i t . The new value of y ( t + A t ) i s also m u l t i p l i e d by f-, i n the t h i r d c y c l e . The product f n y (t+ A t ) i s obtained 9 i n the fourth cycle and added into the accumulative add i t ion u n i t . The in tegra t ion operation i n i t i a t e d i n the second n—1 cycle by y (t) continues i n a s i m i l a r manner y i e l d i n g i n the n—2 f i f t h cycle the product term f 2 y (t + A t ) which i s added to the sum already i n the add i t ion uni t from Cycle 4. And so the process continues u n t i l the l a s t operation i n Cycle 15 g(t + A t ) - i f f^'Ht + A t ) = y n ( t + A t ) 3=1 2 which s tar t s the whole process over again for time values of t + 2 A t . The o v e r a l l design of the computer i s indicated i n F i g . 2-3. The computer cons i s t s b a s i c a l l y of the fo l lowing components: a magnetic drum and i t s associated read-write c i r c u i t s ; ar i thmetic and in tegra t ing u n i t s ; a t iming and synchronizing device ; and a channel-se lect ion device which control s the flow of information to the var ious un i t s v i a a programming patchboard. The basic t iming device i n the computer i s the c r y s t a l o s c i l l a t o r . This device synchronizes the drive motors of the magnetic drum and the funct ion generator as we l l as provid ing t iming pulses necessary for the mathematical operations i n the computer. The two main funct ion storage uni t s are the mag-ne t i c drum and the funct ion generator. The read c i r c u i t s s i tuated around the drum read pulses (functions) from the drum and i n the cases where pulses are erased from the drum, the write c i r c u i t s restore new functions i n t h e i r p lace . The patch-board allows the various parts of the computer to be i n t e r -connected and also provides a means for recording any desired funct ion i n the computer. The magnetic drum i s a small c y l i n d r i c a l drum on whose +3 ft •p O -Oi--p •H CQ b +" I P» 03 -H CD O n lOO CQ O -tJ •H c! CQ •p a -p •H P •a CQ Pi Pi -P Pt o p! •H O CD •H H H O 03 03 -H PJ •H «H 14 -P <H <D •H CD -P •fl o X H O CD H CD N •H •O -\J CQ (4 •H si n o Pi >» CO <H -P 03 MH P! H •H •H O CQ EH O u H O CD -P Pi O O -P o3 S CD CD CD ,£} CD 03 CD O CO CS Ct> aJ -p oo--10 outer surface i s coated a magnetic m a t e r i a l . This magnetic mater ia l enables magnetic pulses ( i . e . , magnetic-flux reversa l s ) to be stored on the drum. A magnetic pulse i s converted into an e l e c t r i c a l pulse sui table for use i n the computer by r o t a t -ing the drum past e i ther a "destruct ive-read head" or a "read-write head". As the name impl ie s , a destruct ive-read head a lso erases the magnetic pulse on the drum. A read-write head i s the same type of device but instead of being able to erase pulses , i t i s able to write pulses onto the drum. F i g . 2-4. Magnetic Storage,Drum. The phys i ca l s i ze of the heads allows the c y l i n d -r i c a l surface of the drum to be divided into eleven tracks (see F i g . 2-4). One track i s used for the synchronizat ion of the drum, which leaves the remaining ten tracks for funct ion storage. For every track on the drum there i s a read-write head. For each track that i s used for in tegra t ion there i s a lso a destruct ive-read head. The h o r i z o n t a l angular separat ion 11 of the two heads i n an in tegra t ion track i s 2 4 ° , or i n terms of distance, 1/15 of the circumference of the drum. This distance on the circumference of the drum i s c a l l ed a channel . There are , therefore , 15 channels i n a t r a c k . The time i t takes a point on the surface of the drum to move through a distance equal to one channel i s c a l l e d a c y c l e . The speed of r e v o l u t i o n of the drum i s adjusted to make a cycle equal to 1000 microseconds. As stated prev ious ly , a cycle i s the basic unit of time i n a l l the block-time oper-a t ions , so i t i s important that the speed of r e v o l u t i o n does not f luctuate (7) . The value of a funct ion i s represented by the p o s i t i o n of a magnetic pulse Px, c a l l e d a funct ion pulse, wi th in the confines of a s ingle channel ( F i g . 2-5). The beginning of each channel i s marked by a pulse c a l l e d a "channel-pulse" ( C P i ) . A channel-pulse occurs then at the beginning of every c y c l e . CP 1 B x C P2 Py CJP3 1 a + x l" a + y ' l 2a ^ 2 A J F i g . 2-5. Pu l se -pos i t ion funct ion representat ion . For convenience, the length of a channel i s defined as "2a" . The zero value of a funct ion i s defined by the p o s i t -ion of the funct ion pulse (Px) when i t i s at a distance "a " from the channel-pulse at the beginning of the channel. Pos i t i ve values of the funct ion are measured to the r i g h t from the zero p o s i t i o n and negative values to the l e f t from the zero p o s i t i o n . As the drum rota tes , the distance between a funct ion pulse and i t s associated channel-pulse i s converted into a t i m e - i n t e r v a l 12 between e l e c t r i c a l pulses for use elsewhere i n the computer. The integra tor , funct ion generator and d i sc synchron-i z e r are subjects of succeeding theses; the channel se lec tor , drum synchronizer, and c r y s t a l o s c i l l a t o r have already been described ( 7 ) . The remaining ar i thmet ic c i r c u i t r y i s the sub-ject of t h i s t h e s i s . 13 3. Theory of Ari thmetic C i r c u i t r y 3-1. INTRODUCTION As explained i n Sect ion 2, a funct ion represented on the magnetic drum by a distance between two pulses i s a lso represented i n the computer by the t i m e - i n t e r v a l bet-ween two e l e c t r i c a l pulses . However, i t i s not convenient to manipulate a funct ion d i r e c t l y i n t h i s form. By us ing the e l e c t r i c a l pulses to operate a linear-sweep c i r c u i t , a funct ion i s converted into a more useful form as a d-c voltage which i s proport ional to the t i m e - i n t e r v a l between the pulses . The fo l lowing sections describe ar i thmet ic operations u t i l i z i n g t h i s method of funct iona l representat ion . Por s i m p l i c i t y and s tandardizat ion i n design, a l l ar i thmetic operations except d i v i s i o n are ca r r i ed out by p a r t i c u l a r arrangements of a few basic u n i t s . These uni t s are : an integra tor , an "on-off type" gate and a voltage comparator. The block-diagram symbols which are used to represent these uni t s i n the fo l lowing sections are shown i n F i g . 3-1. The integrator i s a device capable of performing the operation eQ = Z ^e^dt where K, a constant, i s a funct ion of the c i r c u i t elements and where both the input vol tage , e^(t) , and the output vol tage , e Q ( t ) , can be pos i t ive or negative (see F i g . 3 - l a ) . When used i n conjunction with a gate, the Integrator produces a ramp-voltage determined e i by — . We symbolize t h i s operation by F i g . 3- lb where +1 represents a normalized slope for the output generated when the gate i s open. - r | . l ( e Q ( t ) = K | e 4 Ct) dt K = constant (a) Integrator Opens Gate Pulse o 0 Input so j Closes Gate. G. . .(+1) Reference o > voltage E Y i (b) Gate Input voltage c. Figure i n brackets indicates the normalized slope of the ramp output voltage of the in tegra tor . D i r e c t i o n of arrow i n brackets indicates whether comparator i s p o s i t i v e - , or negat ive-going; i n t h i s case, i t i s negat ive-going. Output pulse (c) Comparator F i g . 3-1. Symbols for bas ic u n i t s . 14 The comparator i s a device which generates a pulse when the input voltage to the comparator reaches a prescribed l e v e l . There are two kinds of comparators: a p o s i t i v e - or up-going comparator which i s suited f o r a p o s i -tive-going input voltage and a negative- or down-going com-parator, suited f o r a negative-going input voltage. The method of designating each comparator i s shown i n F i g . 3-lc. 3-2 . ADDITION The problem i n addition i s that the sum of a number of functions, each stored within a single channel, must i t s e l f be stored within a single channel. Thus, i n order that t h i s may be accomplished, the terms involved i n the addition must be scaled. Suppose the functions x-^ , x 2, ..... , x n are to be added and the sum z stored within a channel. The actual addition must involve the terms x-^  + a, Xg + a, ..... , x n + a and the term z + a, since t h i s i s how these functions are a c t u a l l y stored. There are two possible methods of solving t h i s problem. The addition may be performed as follows: (x-, + a) ( x 9 + a) (x„ + a) where ~ = z and |z| < a Figure 3-2 indicates how t h i s i s accomplished using the basic units mentioned previously. The f i r s t channel-pulse, CP1, opens Gl, causing the d-c voltage output of the integrator to sweep up with a slope + i where n i s the number of terms to be added. When the 15 C P 1 , . . . C P n ^ Gl(+=0 n C ( ? ) G-2(-l) CP(n+l ) r K h — ° P l x z + . . +x ) ——a n Output of integrator Slope = -1 >~ Time CP(n+l) CP(n+2) P i g . 3-2. F i r s t method of a d d i t i o n . funct ion pulse Px-, closes the gate, the output of the integrator x^ + a remains constant at a voltage represent ing • - — u n t i l CP2 occurs, again s t a r t i n g an upward sweep. The add i t ion continues i n t h i s manner with the channel-pulses and funct ion pulses operating Gl i n succession thus causing the output voltage of the integrator to increase i n a stepwise fa sh ion . When the a d d i t i o n i s completed, the output of the integrator represents the sum z + a . This i s converted into a t i m e - i n t e r v a l between pulses sui table for r e w r i t i n g on the drum or for use i n other parts of the computer by the fo l lowing ac t ion of G2. The channel-pulse CP(n + 1 ) opens G2, causing the output of the integrator to sweep down at a slope of - 1 . When the out-put reaches zero, the comparator generates the funct ion pulse Pz which closes G2. This method of a d d i t i o n has the disadvantage that the operator must be able to se lect the slope of the - 16 in tegra to r ' s output for a p a r t i c u l a r addition,, It has the a d d i t i o n a l disadvantage of small sweep vol tages . The second method of add i t ion requires that each funct ion that i s to be added must be r e s t r i c t e d (or "scaled") to a usable range which i s proport ionate ly le s s than one channel. The r e s t r i c t i o n i s such that the sum of these functions must not exceed one channel i n l ength . The operation to be performed i s indicated by the fo l lowing equation: (x-j^  + a) + . . . + (x + a) - (n - l ) a = z + a (3-2) where z = (x^ + . . . + x n ) and |z| < a The operation may be understood by considerat ion of F i g . 3-3a. During the f i r s t cycle the output of the integra tor i s swept up to x^ + a by the ac t ion of G l which i s operated by CP1 and Px-^  i n succession. A l l succeeding functions that are added have the quantity "a" subtracted from them by the ac t ion of G2 which i s opened by CP2 and closed by CP(n + 1 ) . So at the end of the a d d i t i o n , the output voltage of the i n t e g -ra to r represents the sum z + a. This voltage i s swept down to zero by the a c t i o n of G3, i n i t i a t e d by CP(n + l ) . The zero-voltage comparator generates the funct ion pulse Pz which a lso closes G3. Even though the l i m i t s on the sum of the terms may be adhered to , the output voltage of the integrator may at some-time during the summation exceed i t s funct iona l range. That i s , i t may go below zero v o l t s or above the voltage represent ing the value 2a. Because of t h i s , the integra tor must be able to produce a l i n e a r output voltage of a greater range than i t s required funct iona l range. CP-, , • . • , CP. Px-*^ y • o»y Px n CP(n+l) C-x-^+a) + (-X2+a) Output of in tegra tor -° CPCn+1) C (?) PU-J + . ,+xn) CP1 CP 2 CP 3 CP 4 (a) semi-automatic subtract ion of "a" 1 ^ k ^ n CPk * CP(n+l) « Pz *~ Time (b) automatic subtract ion of "a" P i g . 3-3. Second method of a d d i t i o n . 17 A v a r i a t i o n of t h i s second method of add i t ion i s shown i n P i g . 3-3b0 In t h i s case, the subtract ion of the "a " terms i s done automatica l ly i n mul t ip le s of "2a" . Thus the term (n - l ) a from Equation (3-2) must equal 2ak where k i s the number of times that 2a i s subtracted. Since k must be an integer , n must be odd. This means that the add i t ion process must have an odd number of c y c l e s . CP1 opens G-l and the output of the integrator sweeps up with a slope of +1. As long as the output voltage of the integrator i s l e s s than 2a, the comparator CI w i l l not generate a pulse . However, when the output exceeds 2a, CI generates a pulse which opens the pulse gate, PG-. This gate then allows the next channel-pulse to open G-2 which i s closed on the fo l low-ing channe1-pulse. This subtracts "2a" from the output of the in tegra tor . G-3 i s the f i n a l sweepdown gate which converts the f i n a l output of the integrator into the funct ion pulse P z . As i n the f i r s t case, the output voltage of the integrator may exceed i t s func t iona l range sometime during the add i t ion process. Consequently, the integrator must be capable of producing a l i n e a r output voltage of a greater range than i t s required func t iona l range. 3-3. SUBTRACTION Subtract ion i s accomplished by f i r s t changing the s ign of a funct ion and then adding. The method of a d d i t i o n has been explained i n the previous sec t ion so i t i s only necessary to describe the method for changing the s ign of a funct ion . Figure 3-4 i l l u s t r a t e s the method used. 18 - CP 2 Si c > ^ "° P(-x) Output of integrator ^- Time CP1 CP2 CP3 Pig. 3-4. Method of sign inversion. The f i r s t channel-pulse, CP1, opens gate one and two (G l ; G2). As the actions of each gate oppose one another, the output of the integrator remains at zero u n t i l P occurs, which closes G2. The output of the integrator then sweeps up with a slope +1 u n t i l CP2 closes Gl. At t h i s time, the output repre-sents the term a - x. This i s converted into pulse form by the sweep-down action of G3. (In the a c t u a l subtractor, only the two gates Gl and G2 need be used since G2 can be used i n place of G3.) Figure 3-5 i l l u s t r a t e s i n block-time operations how two functions are subtracted. The sign-change operation, which begins i n Cycle 1 and ends i n Cycle 2, takes two cycles. During Cycle 1, a + x has been stored i n the adder and a + y has been obtained, i n t h i s case, from a storage u n i t . In Cycle 2, the negative value of y, (a - y ) , i s added to a + x, already i n the X Sign Change 1 -< > P i g . 3-5. Subtract ion shown i n block-time operations. adder. The answer, a + x - y, i s obtained at the end of the c y c l e . 3-4. MULTIPLICATION The operation to be performed i s the fo l lowing : given two functions x and y , compute xy = z . The computation i n the computer neces sar i ly involves the terms x + a, y + a, and z + a. The m u l t i p l i e r must be capable of operating wi th in the l i m i t s |x|<^a, | y | < C A » i . e . , wi th in a l l four quadrants. I t i s convenient to consider for the fo l lowing d i scuss ion that "a " i s normalized to u n i t y . Thus the product of the maximum 2 values of x and y i s i t s e l f equal to uni ty (since xy = a ; a = 1 due to normal iza t ion) . Consequently the product of two funct ions , or indeed any number of funct ions , can i t s e l f be con-tained i n a s ingle channel. P O OJ 'PH O H PH o C\J EH o •H -P cS o -H H Pi •H -P H i O O si •P I •H PH 20 The terms x + a and z + a when m u l t i p l i e d give ( x + a ) ( y + a ) = x y + a + a x + a y 2 The product term desired i s xy + a which i s equ iva l -ent to z + a, the func t iona l representat ion i n the computer 1 2 ( i . e . , —(xy + a ) = z + a ) . The remaining terms, ax and ay, a are extraneous and must be e l iminated . The equation may be 2 rewr i t ten i n the fo l lowing manner where xy + a = z + a xy + a = (x + a)(y + a) + a(k - x) - a(a + y) (3-3) The basic un i t s are arranged as shown i n F i g . 3-6 to perform t h i s operation i n two c y c l e s . Consider f i r s t the oper-a t ion of gates G-2 and G-3 c o n t r o l l i n g Integrator 1. Channel-pulse one (CPl) opens G2, causing the output of Integrator 1 to s tar t increas ing negat ively from zero with a slope of -1. This ac t ion continues u n t i l the funct ion pulse Px closes G2. The output of the integrator then remains con-stant u n t i l Py occurs which opens G3, causing the output to increase p o s i t i v e l y . When the output reaches zero, the zero-voltage comparator C l generates a pulse which closes G3. The output from the f i r s t integrator i s integrated by the second integrator to produce a pos i t ive voltage at the output of the second integrator representing (x + a) (y + a) , the area of the diagram ( F i g . 3-7). Output voltage y + a •>- time Slope = Comparator pulse from C l Slope = -1 CPl Px ?y P i g . 3-7. Output of Integrator 1. 21 The above operation has been described for the case where Px occurs before Py. For the case where Py occurs before Px, the operation remains the same except that both gates are open i n the i n t e r v a l from Py to Px whereas previous ly they were both c losed . Since t h e i r respect ive operations oppose one another, the fact that they are both open does not af fect the proper operation of the in tegra tor . The area of ,the output of the integrator s t i l l represents (x + a)(y + a ) . Gate one and gate four ( G l ; G4) produce ramp-voltages at the output of the second integrator having slopes of +a and -a re spec t ive ly (see F i g . 3-8). Gl i s open i n the i n t e r v a l from Px to CP2, producing a pos i t ive voltage at the output of the second integra tor of a(a - x ) . And G4 i s open i n the i n t e r v a l from CP1 to Py, producing a negative voltage of a(a + y ) . The sum of these two voltages at the output of the second integra tor plus the voltage represent ing the area of the output of Integrator 2 1 gives a pos i t ive voltage representing xy + a . GATE Gl Output voltage n 1 Output voltage CPl -a(a + y) CP 2 GATE G4 F i g . 3-8. Operations of Gates 1 and 4. The l a s t gate G5 i s opened by CP2 and causes the out-put of Integrator 2 to decrease u n t i l i t reaches zero at which time the comparator C2 generates a pulse Pxy which c loses G5. 22 The i n t e r v a l from CP2 to Pxy represents the term 2 + a . It i s of some interes t to note that for some values of x and y the output voltage of the f i r s t integrator (see P i g . 3-7) does not re turn to zero u n t i l sometime during the second c y c l e . Then, as the f i n a l answer i s a funct ion of the f i r s t in tegra tor , the f i n a l answer would not be obtained as a voltage u n t i l sometime a f te r CP2 has occurred. However, as pointed out above, CP2 i n i t i a t e s the sweep-down of the output of Integrator 2. With t h i s overlapping of events - the in tegra t ion of the output voltage of Integrator 1 and the sweep-down of Integrator 2 - the f i n a l answer i s not obtainable as a vol tage . This i s of no consequence since the correct answer i s obtained i n the desired pulse form during the second cycle as shovm i n F i g . 3-9a and F i g . 3-9b. In both diagrams, the out-put of Integrator 1 does not re turn to zero u n t i l sometime during the second c y c l e . Figure 3-9 shows the outputs of both integrators fo r a few values of x and y . Part (a) i s drawn to show the var ious terms that add to give the output of the second in tegra tor . The graphs l a b e l l e d TERM (1), TERM ( 2 ) , and TERM (3) r e f e r to Eq.3-3 of t h i s s ec t ion . Parts (b) , ( c ) , and (d) show the output of the integrators only . The configurat ions of parts (a) and (d) , and parts (b) and (c) while apparently d i f f e rent give the same values of z (z = 0; z = ^a) r e s p e c t i v e l y . This i s as i t should be according to the product of the values of x and y invo lved . 3-5 . DIVISION D i v i s i o n i s not a des irable operat ion to perform. Consequently, wherever poss ible i t i s to be avoided. Nevertheless x=>o ; ^ = (d) Figo 3-9. Diagram showing outputs of Integrators 1 and 2 i n m u l t i p l i e r for var ious inputs . 23 the computer must be capable of performing d i v i s i o n i f ever d i v i s i o n becomes u n a v o i d a b l e „ Two poss ible methods of perform-ing d i v i s i o n are mentioned. The f i r s t method of d i v i s i o n involves a two-step process of funct ion inver s ion and m u l t i p l i c a t i o n as ind ica ted by the fo l lowing equation: (x + a ) ( | + a) = ( |k + a 2 ) M u l t i p l i c a t i o n i s car r ied out i n the manner described i n Sec. 3 - 4 . Function inver s ion i s more expediently c a r r i e d out i f another unit - a funct ion generator, not one of the basic uni t s already mentioned - i s employed. The method of generating functions by t h i s funct ion generator i s the subject of a suc-ceeding t h e s i s . For the purpose of t h i s explanation, i t w i l l be described b r i e f l y . Function screen P h o t o - c e l l Light source Pulse A m p l i f i e r Disc F i g . 3 - 1 0 . A method of funct ion generat ion. The funct ion generator employs an o p t i c a l system for the purpose of generating functions (see F i g . 3 - 1 0 ) . A funct ion , for example f ( x ) , i s represented on an opaque screen by a t h i n transparent trace drawn i n the shape of the funct ion ( F i g . 3 -11) The funct ion disc (assume the phys i ca l dimensions of the screen are small with respect to the disc radius) i s rotated past a beam of l i g h t pos i t ioned to the abscissa a + x . The speed of 24 revo lu t ion of the di sc i s adjusted so that the screen moves the distance from A to G past the beam of l i g h t i n exact ly one c y c l e . As the screen moves by, l i g h t i s transmitted to the p h o t o - c e l l at the two points A and B, each time causing a pulse to be gen-erated . The f i r s t pulse i s the channel-pulse and the second i s the function pulse P f ( x ) ; the i n t e r v a l between the two pulses represents a + f ( x ) . A ,G > '^a + f( t > 1 + X V 1 Path of l i g h t beam (a) 4 - quadrants CPn Pf(x) CP(n+l) increas ing k P i g . 3 - H . Diagram of funct ion screen, (b) S ingle quadrant F i g . 3-12. Diagram of funct ion inver s ion screen. Figure 3-12a i l l u s t r a t e s the funct ion — drawn on a screen. The pos i t ive quadrant of the diagram i s drawn i n F i g » 3-12b with several curves shown corresponding to d i f f e rent values of k . A l l the curves are neces sar i ly d i s tor ted i n the region c losest to the o r i g i n i n order that the funct ion pulse stays wi th in the l i m i t s of a cyc l e . The value of k chosen (and hence the curve chosen) depends upon the range of y . I f y ranges mostly i n the region away from the o r i g i n , then a l a rger value of k may he chosen without appreciable e r ror enter ing the computation. It follows that i f y i s a continuous funct ion having both pos i t ive and negative values , a curve with a low value of k must be chosen i n order that the error caused by the d i s t o r t i o n of the curves near the o r i g i n i s kept to a minimum. This method of d i v i s i o n , shown i n block-time operations i n P i g . 3 - 1 3 » takes three cyc le s . In cycle one, y i s obtained. I t i s used to generate the funct ion ^ i n the second c y c l e . The m u l t i p l i c a t i o n process begins i n the second cycle and i n the t h i r d cycle the desired product pk i s obtained. . 1 > . 2 > Se l -ect FG y The second method of d i v i s i o n does not require the use of a funct ion generator. Instead, a servo-d iv ider i s used (see F i g . 3-14a). The operation of the d i v i d e r i s as fo l lows . The two functions to be div ided are appl ied to the d i v i d e r as continuous v o l t -ages ( i n t ime) ; one funct ion (x) i s appl ied to the ampl i f i e r and the other (y ) , to a potentiometer. The middle arm of the potentiometer i s attached to a shaft dr iven by a motor. This arm feeds back a por t ion of the voltage across the potentiometer to the input of the a m p l i f i e r . I f t h i s voltage and the voltage representing x are not the same;-(in magnitude TIME F i g . 3-13. D i v i s i o n shown i n block-time operations. only since the two voltages must have opposite p o l a r i t i e s ) , an (a) Servo-div ider CP. Pf i < 3 GK+l) -or G2(-l) Punction Storage Intiit ( ? ) -o —a (b) Conversion of functions i n pulse-p o s i t i o n form to voltage form (c) Conversion of functions i n voltage form to. pu l se -pos i t ion form P i g . 3-14o Diagram showing method of d i v i s i o n employing a se rvo-d iv ider . 26 error voltage w i l l be produced at the input of the a m p l i f i e r . The error voltage i s ampl i f ied by the ampl i f i e r to dr ive the motor i n such a manner to reduce the e r r o r „ When the input error voltage i s zero, the feedback voltage i s equal to the input voltage x. Since the motor i s now s tat ionary , i t s angular p o s i t i o n i s proport ional to Xr. The middle arm of another potentiometer i s a lso attached to the same shaft . I t then picks of f a f r a c t i o n of the constant voltage E r e f appl ied to the potentiometer equal to This voltage then represents ^ " X E r e f o The servo-div ider as shown i n F i g . 3-14a i s only able to perform single-quadrant d i v i s i o n . It may be extended to two-quadrant operation ( i . e . , the input voltage x may be e i ther pos i t ive or negative) by applying voltages of + y and ~ ^ r e f "bo the respect ive potentiometer terminals instead of grounding them as shown. Four-quadrant operation of the servo-d iv ider i s not desirable since t h i s implies that y , i n changing s ign from pos i t ive to negative or conversely, must pass through zero . In such a case the motor i s f i r s t dr iven up against i t s r o t a t -i o n a l stops i n one d i r e c t i o n then, as y passes through zero, i s dr iven hard against i t s stops i n the opposite d i r e c t i o n . For t h i s reason, four-quadrant operation i s not des i red . In order to use the s e r v o - m u l t i p l i e r , there must be a conversion of functions i n pulse or t i m e - i n t e r v a l form to functions i n continuous voltage form and conversely. Figure 3-14, parts (b) and (c ) , shows a method which solves t h i s problem. In part (b) of F i g . 3-14, a voltage representing the value of a funct ion i s generated by the ac t ion of G l and i s stored i n a funct ion storage unit such as described by 27 Fiorent ino (8, page 13)» Since the reference l e v e l of the comparator i s - a , the voltage stored i n the storage uni t represents the funct ion f , i t s e l f , and not a + f . As the computation progresses, the voltage var ie s i n accordance with the v a r i a t i o n of the funct ion , G-2 i s used to re turn the out-put of the integrator to -a a f ter each s tor ing operat ion. The voltage output from the d i v i d e r i s converted into pulse form as shown i n part (c) of F i g 0 3-14. The output of the integrator sweeps up from -a when G-3 i s opened by CPk. When the output reaches the reference l e v e l of CI (frXE f ) , the y r e i comparator gives out a pulse P(^) which closes G-3° The time-i n t e r v a l between CPk and P(^) represents ^ + a, the des ired answer. Any convenient channel-pulse occuring a f ter CPk can open G4 which causes the output of the integrator to re turn to ~*3* o 28 4. Basic Components of Ar i thmet ic C i r c u i t r y 4-1. INTRODUCTION In the sections on ar i thmet ic theory, i t i s shown how three bas ic u n i t s , a gate, a voltage comparator, and an i n t e g -r a t o r , are arranged to perform various ar i thmet ic operat ions . Only the main c h a r a c t e r i s t i c s of these bas ic un i t s are spec i f i ed . The purpose of the fo l lowing sections i s to give some general and deta i l ed phys i ca l c i r c u i t s whose c h a r a c t e r i s t i c s meet the spec i f i ca t ions of these basic u n i t s „ 4-2. THE INTEGRATOR The bas ic requirement of the integrator i s that i t be a voltage-analog integra tor , capable of both pos i t i ve and negative output voltage excursions. The simple i n t e g r a t i n g c i r -cu i t shown i n F i g . 4-1 p a r t i a l l y f u l f i l l s t h i s requirement. The r e l a t i o n s h i p between the output and the input voltages of t h i s c i r c u i t i s , i n Laplace-transform notat ion (10 s p . 12), E (s) = -=- 1 1 E . ( s ) (4-1) o r c „ _,_ 1 x s + r c It i s apparent that t h i s c i r c u i t does not give exact in tegra t ion . I f the output voltage i s re l a ted to the input voltage by the equation ^ e (t) = k ) e . ( t ) dt (e .(0) = 0) where k i s a constant, the r e l a t i o n s h i p between the output and the input voltages , i n Laplace-transform nota t ion , E (s) = -f E , ( s ) (4-2) U fc> X This equation c l e a r l y does not correspond to (4-1) above. e , ( t ) % ( t ) tz F i g . 4-1. Simple rc in tegra t ing c i r c u i t , e.Ct) V i r t u a l Ground I e ( t ) F i g . 4-2. Modif ied in tegra t ing c i r c u i t . i — ^ ^ Y T T 7 - 1 1 — P — r (t) e_(t)H-A>J e Q ( t ) i i F i g . 4-3o Operat ional in tegra t ing c i r c u i t . 29 This l a s t equation, (4-2), can be r e a l i z e d i f F i g . 4-1 i s modif ied, as shown i n F i g „ 4 - 2 „ The v i r t u a l ground connection grounds the point i n such'a manner that current f lowing through r flows e n t i r e l y into the condenser with no current f lowing to ground. The r e l a t i o n s h i p between the output and input voltages fo r t h i s c i r c u i t i s which corresponds to (4-2). The device now commonly used to simulate t h i s v i r t u a l ground connection i s the high-gain d-c ampl i f i e r , connected as shown i n F i g . 4-3 (24). A c h a r a c t e r i s t i c of the ampl i f i e r i s that within the operating l i m i t s of the ampl i f i e r the input impedance i s large and consequently, any gr id current ( i ) f lowing into the ampl i f i e r i s very smal l . It i s assumed i n the fo l lowing d i scuss ion that i i s equal to zero. The current f lowing through the r e s i s t o r i s E , ( s ) - E ( s ) I r ( s ) = 1 r « and the current f lowing into the condenser i s E (s) - E ( s ) I c ( B ) = fi ^ sc Since i = 0, I (s) must equal I ( s ) . The two equations when g r c equated and solved for E Q ( s ) along with the equation E Q ( s ) = - A E g ( s ) which i s determined by the ampl i f i e r , give E , ( s ) E (s) = - 1 src 1 (4-4) I t can be seen from' t h i s equation that i f the term A (the gain 30 of the amplifier) i s l a r g e 9 the equation reduces approximately to (4-3)o It i s of some int e r e s t to investigate the behaviour of the integrating c i r c u i t with and without the amplif i e r i n response to a step-voltage input. The amplitude of the input voltage i s v (Fig, 4-4a) 9 hence the Laplace-transform of e^(t) i s ^ ( i . e . , E.(s) = ~)„ Substituting t h i s into (4-1) and (4-4) s x s and taking the inverse transform of each gives f o r the c i r c u i t without the amplifier e Q ( t ) = v ( l - e r c ) (4-5) and for the c i r c u i t with the ampl i f i e r _ t / . \ . / - r c H e. 0 ( t ) = - A v ( l - e r c U + 1 ; ) (4-6) Figure 4-4b i l l u s t r a t e s the response of the two c i r -c u i t s as compared to the i d e a l response. The curve f o r the c i r -c u i t with the amplifier i s approximately A times as large as the other, hence f o r the same degree of accuracy, the amplif i e r can t h e o r e t i c a l l y integrate nearly A times as long as the simple rc c i r c u i t . However, the operational range of the amplif i e r i s limi t e d p h y s i c a l l y so the actual output would appear "clipped" as shown i n F i g . 4-4b0 Within the operating range of the amp-l i f i e r , the output of the amplifier i s very much more l i n e a r than that of the simple rc c i r c u i t . The deviation of the amp-l i f i e r from l i n e a r i t y expressed as a percentage of the i d e a l value i s given by the following equation: 1 - A r c ^ _ e ~ rc(A + U ) X 100$ (4-7) ^ 1 r AAA e i ( t ) 1 e 0 ( t ) (a) Step-voltage input to integra tor A e o ( t ) E q . (4-6) A m p l i f i e r saturates (b) Outputs of in tegra t ing c i r c u i t s P i g . 4-4o Responses of in tegra t ing c i r c u i t s to step-voltage inputs . 31 T h u s i f t h e a m p l i f i e r h a s a s u f f i c i e n t l y h i g h g a i n , t h e o u t p u t c a n b e . m a d e v e r y n e a r l y l i n e a r , , H e n c e (4-6) c a n be w r i t t e n a s (4-8) w h i c h i s t h e e q u a t i o n o f a n i d e a l r a m p - v o l t a g e . A c h a r a c t e r i s t i c o f t h e a m p l i f i e r i m p l i c i t l y a s s u m e d i n t h e a b o v e c a l c u l a t i o n s i s t h a t t h e i n t e r n a l i m p e d a n c e o f t h e a m p l i f i e r i s n e g l i g i b l e . A f u r t h e r c h a r a c t e r i s t i c , n e c e s s a r y i f a n i m p e d a n c e c o n n e c t e d t o t h e o u t p u t o f t h e a m p l i f i e r i s n o t t o " l o a d " t h e c i r c u i t , i s t h a t t h e o u t p u t i m p e d a n c e o f t h e a m p l i f i e r w i t h a f e e d b a c k i m p e d a n c e m u s t be s m a l l . The f e e d b a c k a m p l i f i e r h a s t h i s c h a r a c t e r i s t i c a s i s s h o w n b e l o w w i t h r e f e r -e n c e t o P i g . 4-5. ( a ) G e n e r a l c i r c u i t o f O p e r a t i o n a l A m p l i f i e r I - ^ s ) I 2 ( s ) I 3 ( s ) E 1 ( s ) E J S ) ( ^ ) - A E ( s ) g K^y g ( b ) E q u i v a l e n t c i r c u i t b e i n g d r i v e n b y g e n e r a t o r E ^ s ) P i g . 4-5. M e t h o d f o r c a l c u l a t i n g o u t p u t i m p e d a n c e o f o p e r a t i o n a l a m p l i f i e r c i r c u i t . 32 Part (a) of F i g 0 4-5 shows a general operat ional ampl i f i e r c i r c u i t „ The output impedance of t h i s c i r c u i t i s equal to the impedance seen by an external generator connected to the output terminals . Part (b) of P i g . 4-5 shows the c i r -cu i t being dr iven by an external generator of voltage e-^(t) or i n Laplace-transform notat ion E^(s ) 0 It i s assumed that the external generator does not drive the a m p l i f i e r beyond ,its operat ional l i m i t . Hence, no current flows into the input of the a m p l i f i e r . The ampl i f i e r has been replaced by i t s l i n e a r equivalent c i r c u i t of a voltage generator AE^ and impedance z i n s e r i e s . The impedance z represents t h e ' i n t e r n a l impedance of the ampl i f i e r and the term A represents the gain of the a m p l i f i e r . An examination of the diagram y i e l d s the fo l lowing equations: (1) ix - i 2 • i 3 (2) E ^ I ^ - A E g g So lv ing these equations for 1-^  gives A + Y~ 1 + i « The output impedance i s defined as the r a t i o of the voltage (E 1 ) of the generator to the current (1^) de l ivered to the c i r c u i t by the generator. Thus from equation (5) above, the fo l lowing expression for the output impedance r e s u l t s : 33 Z z (4-9) out It follows from t h i s expression that since the gain, A, i s large and the i n t e r n a l impedance, z, of the amplifier i s small, the output impedance i s very small. v a r i a t i o n s i n operating l e v e l s , commonly c a l l e d d r i f t . This problem could be eliminated by the use of a-c coupled a m p l i f i e r s . However, the poor low-frequency response, e s p e c i a l l y the d-c response, of amplifiers employing capacity coupling prevents t h e i r use i n most computers. There are standard methods of con-t r o l l i n g d r i f t i n d-c amplifiers (14, chapter 5) but i n most cases these are rather complicated. There i s a p o s s i b i l i t y that because of the method by which integrators are employed i n t h i s computer, a-c coupled amplifiers could be used i n which case an attendant problem concerning the discharging of coupling con-densers would have to be solved. The use of a-c coupled high-gain amplifiers has not been investigated i n t h i s t h e s i s . A problem encountered i n d-c amplifiers i s that of c Figure 4-6 shows the i n -tegrator used i n the experimental investigations of t h i s t h e s i s . r = 300K ohms c = 0.01 ufds {!%) K2-X P h i l b r i c k d-c The values of the condenser and the r e s i s t o r are 0.01 ufds and 300K amplifier ohms respectively (except f o r the one case where the r e s i s t o r i s 50K ohms: see Sec. 5-2). The d-c, high-gain ampli-f i e r employed i n the integrator i s Fi g . 4-6. The Integrator. a P h i l b r i c k K2-X operational 34 a m p l i f i e r . I t s c i r c u i t diagram and c h a r a c t e r i s t i c s are l i s t e d i n the appendix. When necessary because of high load-current demand, the ampl i f i e r can be operated In an augmented or h igh-current s ta te . 4-3. THE GATE ->- t Slope = -4-3-1. The Diode Switch The funct ion of the gate i s , i n conjunction with the integra tor , to produce a ramp-voltage. As already shown i n Sec. 4-2, a step-voltage appl ied to the input of an integrator w i l l produce a ramp-voltage wi th in the operating range of the a m p l i f i e r . This i n -tegrator can be modified as shown i n F i g . 4-7 to produce a p o s i t i v e - , or negative-going ramp-voltage. When switches A and B are both c losed , the output of the integrator remains F i g . 4-7. Ramp-voltage device . u n c h a n g e d s i n c e t h e i n p u t v o l t . ages, +V and - V , that are applied to the in tegra tor , e f f e c t i v e l y cancel one another. S i m i l a r l y , the output remains unchanged when both switches are open because no input i s app l i ed ; that i s , the Input of the ampl i f i e r i s i s o l a t e d . However, i f e i t h e r switch i s open and the other c losed, only one of the voltages w i l l be appl ied to the in tegra tor . Thus, a ramp-voltage w i l l be produced at the output of the in tegra tor . For example: i f switch A i s closed and switch B i s open, the output voltage of the integra tor 35 w i l l have a slope of - ^ ( n e g a t i v e because of the negative-gain of the a m p l i f i e r ) . Figure 4-8 shows the ac tua l diode gate which simulates the c i r c u i t of F i g . 4-7. The c o n t r o l l i n g or switching ac t ion of the gate may be described as fo l lows . I f point A i s made s u f f i c i e n t l y negative to cause DI to conduct, point B also becomes negative because of the low forward-resistance of the diode. The p o l a r i t y across diode D2 i s negative since point B i s negative and the input of the high-gain ampl i f i e r i s very nearly zero. As D2 has a very high back-resistance i n the negative-bias s tate , the po s i t i ve input voltage of +300 v o l t s i s e s s e n t i a l l y i so la ted from the input of the in tegra tor . The reverse ac t ion occurs i f point A i s p o s i t i v e . In t h i s case, point B i s po s i t ive but very close to zero since D2 i s now. biased i n the forward d i r e c t i o n . I f point A i s made s u f f i c i e n t l y p o s i t i v e , DI w i l l become biased i n the reverse d i r e c t i o n and w i l l thus i so l a te point A from the in tegra tor . In t h i s s tate , the po s i t i ve input voltage of +300 v o l t s i s appl ied to the in tegra tor . A s i m i l a r switching a c t i o n takes place with diodes D3 and D4. The diodes used i n the gate are s i l i c o n junct ion diodes having extremely high back-resistance (50 megohms). For e f fec t ive switching ac t ion , the magnitudes of the c o n t r o l l i n g voltages appl ied to the,diode switches should be greater than one v o l t and the t r a n s i t i o n i n t e r v a l from one c o n t r o l l i n g state to the other should be smal l . For t h i s reason, the c o n t r o l l i n g voltage i s supplied by a b i s t ab le m u l t i v i b r a t o r which i s described below. The potentimeters (^2.l: r e f e r "to P i g . 4-8) are used a to rt o •H -P O CQ ro to t) 'd 13 ?! 0 H O O I H O O o I H CM ro o o o CQ H CO nd o!z; •H H « H O O o o H m @ O-ro O C\J n H LTV t- c-CVJ CVJ H H H|cvj I I rO CVJ 03 H > > rO -P -P « „ „ ^ ^ ^ ^ ^ .000 irv irv trv -p H H H o ro cu sa a -p H • 0 U j> o 1 -p P4 o3 0 -P H CO 3 3s -P H id o3 -P -P ro •H -H 3.0 o •H rt O 03 . Q) CO O 1 "H t> O • W) •H PH H -P O - ft CnOOOOCvlOjrOOOO rO CT> C— ITV CVJ 00 •rOlCVC-ro rO CVJ CVJ rH CVJ i I I I I I I I O H HCMrO"^-LfV^DC--COCnHH 36 to adjust the resistances i n each branch of the gate to obtain the desired time constant (see Sec. 5 - 1 ) . 4 - 3 - 2 . The Bistable M u l t i v i b r a t o r . The multivibrator i s a cathode-coupled bistable m u l t i v i -brator designed to give steady-state g r i d voltage of ±15 v o l t s . The grid voltage drives the g r i d of the cathode follower which because of i t s high input impedance does not load the m u l t i v i -brator. The low impedance output of the cathode follower sup-p l i e s the c o n t r o l l i n g voltage to the switching diodes. The plate resistance Eg i n the plate c i r c u i t of i s to prevent the p l a t e -to-cathode voltage of from exceeding i t s rated . l i m i t . The operation of the multivibrator i s as follows ( 6 , pp. 164-166). Suppose Vg.in F i g . 4-8 i s conducting. Then the plate of V 1 i s at 270 v o l t s and the plate of V 2 i s at 215 v o l t s . The grid of i s a - f c +15 v o l t s and the cathode of i s s l i g h t l y higher (+17 v o l t s ) which provides a negative bias that eliminates grid current. The large, negative bias due to a grid voltage of -15 v o l t s and a cathode voltage of +17 v o l t s (because of the cathode coupling of V-^  and Vg) applied to the short grid-base tube (12AX7) ensures complete cutoff of that tube. The values of the b i a s - r e s i s t o r s R,, and R„ connected to the cathodes of b ( V and V, are so chosen that the cathodes of Y and V, are at a a b a b higher voltage than the plate of the non-conducting tube i n the multivibrator. In t h i s case, the cathodes of V and are at +275 v o l t s . I f a negative pulse of 40 v o l t s - the minimum voltage necessary for t r i g g e r i n g the multivibrator - i s applied to the cathode of V, , the voltage of the cathode w i l l drop to 235 v o l t s . 37 However s ince the plate of V 2 i s at 215 v o l t s , the diode remains non-conducting. I f now a s i m i l a r pulse i s appl ied to the cathode of V , the diode w i l l begin to conduct a f ter the a cathode has dropped below the plate voltage of V-^, which i s 270 v o l t s . The plate voltage of tends to fo l low the rapidly-f a l l i n g cathode voltage of V . The drop on the plate of V, i s e f f e c t i v e l y t ransferred unattenuated to the g r id of V 2 by the ac t ion of the "speeding-up" condenser C-^. As the g r i d voltage of V 0 f a l l s , the cathode voltage of v 2 (and V^) f a l l s and the plate voltage r i s e s . The r i s e i n the plate voltage of v 2 i s t ransferred to the g r id of by the other "speeding-up" con-denser C- .^ The ac t ion described so fa r has been caused s o l e l y by.the negative pulse appl ied to the cathode of V . However, soon a f ter begins to conduct due to i t s r a p i d l y f a l l i n g cathode voltage and r a p i d l y r i s i n g g r id vol tage , a point i s reached where s e l f - s u s t a i n i n g regeneration takes p lace . At t h i s po int , the f a l l i n g plate voltage of maintains the c y c l i n g of events described above. As soon as begins to conduct, the cathode voltage of V 1 stops f a l l i n g and begins to r i s e . Since the g r i d voltage of V 2 i s f a l l i n g and the cathode voltage i s now r i s i n g , V 2 tends to cu to f f . The regenerat ion ceases when V 2 ceases to conduct and the m u l t i v i b r a t o r then sett les , into i t s other quiescent s ta te . With the m u l t i v i b r a t o r i n t h i s s tate , a negative pulse appl ied at the cathode of w i l l switch i t back to the o r i g i n a l s ta te . Figure 4-9 shows the waveforms of the var ious points i n the m u l t i v i b r a t o r . The "spikes" shown i n the waveforms are 38 due to the charging of the "speeding-up" condensers. The time constant RgC^is m a d e small so that the mul t iv ib ra to r s e t t l e s into a quiescent s tate , a f ter switching occurs, i n approximately 30 usees. To cathode i of Yn a To cathode | of Grid of V 1 ->• t •>- t +15 A 270 Plate of V 1 Grid of V , 215 -15 ->- t L +15 Plate of V , -15 270 t 215 t F i g . 4-9. Waveforms i n the b i s tab le m u l t i v i b r a t o r . Because of the large values of f ixed res i s tances used i n the m u l t i v i b r a t o r , i t i s d i f f i c u l t to obtain the desired voltages at the g r i d s . Consequently, the potentiometer R^ i s i n the c i r c u i t for the purpose of ad just ing the g r i d voltages to compensate for any devia t ion from the design va lues . The condenser C 0 , connected across R^, prevents degenerative-feed-back between and V g . In order to ensure that the m u l t i v i b r a t o r 39 i s stable and symmetrical i n both states', the pa i r s of r e s i s t o r s R^, Rg, and R^ must be c a r e f u l l y matched. 4-4. THE COMPARATOR Voltage amplitude comparison i s a process which deter-mines the instant of equa l i ty between two voltages (6, ch . 9; 18, ch . 15)o A simple but somewhat inaccurate method of ampl i-tude comparison i s quas i - se lec t ion and l i n e a r ! a m p l i f i c a t i o n (6, p. 335). This method consis ts e s s e n t i a l l y of the l i n e a r ampl i f i c a t ion of an e r r o r voltage between a s i g n a l voltage and a reference voltage where i d e a l l y only one s ign (since the error voltage can be pos i t ive or negative) of the error voltage i s ampl i f ied . I f the gain of the ampl i f i e r i s large enough, the output of the ampl i f i e r changes abrupt ly . This produces a step-voltage at the instant of equa l i ty due to ampl i f i e r s a tura t ion . This method suffers from the disadvantage that quas i - se lec t ion does not occur exact ly at the instant of equa l i ty . It occurs instead at a point which i s a funct ion of the c h a r a c t e r i s t i c s of the p a r t i c u l a r s e l e c t i n g device being used. This further implies that t h i s point a lso depends upon the gain of the ampl i-f i e r (6, p . 336). This error introduced by the l i n e a r a m p l i f i e r i s reduced considerably with a regenerative-type comparator. The comparators described here in - a m u l t i a r , a \: b l o c k i n g - o s c i l l a t o r , and a bridge-type comparator - are regenerative-type voltage comparators. The bridge-type compara-tor i s invest igated because of i t s s i m p l i c i t y . The.multiar and the b l o c k i n g - o s c i l l a t o r are described b r i e f l y to i l l u s t r a t e a few regenerative comparators. 40 4-4-1. The M u l t i a r The mul t i a r comparator i s shown i n F i g . 4-10. When the mul t iar i s i n i t s quiescent s tate , the diode V^ i s cutof f while the pentode, Vg i s conducting heav i ly because of a small pos i t ive gr id-bias due to current f lowing through Rg. When a negative-going voltage appl ied to the cathode of V-^  reaches the reference voltage E R , , V^ s t a r t s to conduct thus producing a f a i l i n g voltage at i t s p l a t e . This f a l l i n g plate voltage i s a p p l i e d to the g r i d of Vg through C-^  and tends to reduce the current f lowing through Vg. The transformer which couples the cathodes F i g . 4-10. The M u l t i a r . of V^ and Vg i s connected for pos i t ive-feedback. Consequently, the decreasing cathode current of Vg causes the plate voltage of V^ to f a l l even more r a p i d l y . Regeneration occurs and Vg quickly cuts o f f . The plate voltage of Vg r i s e s qu ick ly from i t s quiescent value to the plate supply voltage (B+) as the tube cuts o f f . This l a rge , pos i t ive step-voltage may be quas i-d i f f e rent i a ted to produce a pulse marking the instant of equa l i ty between the input voltage and the reference vol tage . I f the input voltage remains more negative than the reference vol tage , another pos i t ive step-voltage w i l l eventual ly be produced at the plate of Vg . This i s because the g r id voltage of Vg, i n attempt-' ing to re turn to B+, allows Vg to conduct again thus i n i t i a t i n g 41 another regeneration cycle (18, pp. 470-472). This c y c l i n g of events continues as long as the input voltage i s more nega-t i v e than the reference voltage. The multiar i s a f a i r l y accurate comparator as i t s t r i g g e r i n g l e v e l depends almost e n t i r e l y upon the diode char-a c t e r i s t i c s . It however has the disadvantage of being suited fo r only negative-going waveforms. More detailed descriptions of the multiar may be found i n Waveforms (6, p. 343-344) and Pulse and D i g i t a l C i r c u i t s (18, p. 468-473). 4-4-2. The Blocking-Oscillator The b l o c k i n g - o s c i l l a t o r i s described because of i t s a b i l i t y to handle positive-going waveforms. Pig. 4-11 shows a general c i r c u i t of a b l o c k i n g - o s c i l l a t o r comparator. In the Output pulse R 1 < < R 2 Pig. 4-11. The Blocking-Oscillator. quiescent state of the b l o c k i n g - o s c i l l a t o r , the cathode follower V 2 supplies the reference voltage E R to the cathode of through the resistance R-^ . V.^  w i l l begin to conduct when the p o s i t i v e -goint input voltage reaches the cutoff l e v e l of the tube. I f both tubes have i d e n t i c a l tube c h a r a c t e r i s t i c s , the cutoff l e v e l w i l l be equal to E-^. 42 The coupling transformer "between the plate and the grid i s connected to give positive-feedback. Consequently, regeneration quickly occurs a f t e r begins to conduct. The large cathode -condenser C supplies most of the current to when the tube i s conducting. The n o n - l i n e a r i t i e s i n the tube c h a r a c t e r i s t i c s of eventually l i m i t s the plate, current and a reverse action ensues which quickly cuts o f f . During t h i s time, an output pulse i s obtained from an a d d i t i o n a l winding i n the transformer. This pulse marks the point of equality of the input and reference voltages. I f the input voltage remains more po s i t i v e than the reference voltage, a t r a i n of pulses w i l l occur u n t i l the charge accumulating on condenser C produces a voltage s u f f i c i e n t to cut o f f completely. The recovery time of the comparator i s governed by the approximate time constant R-^ C; consequently, R^ i s small i n order that the comparator w i l l have a short recovery time, A disadvantage of t h i s comparator i s that the accuracy of comparison depends upon the tube c h a r a c t e r i s t i c s which are i n turn dependent upon heater and supply voltages. A further l i m i t a t i o n on the use of t h i s comparator i s the large grid current which must be supplied by the s i g n a l source. This com-parator i s described b r i e f l y i n Waveforms (6, p. 342) and Pulse  and D i g i t a l C i r c u i t s (18, p. 473). 4-4-3o The Bridge-Type Regenerative Comparator A new type of comparator featuring high s e n s i t i v i t y has been described i n the l i t e r a t u r e (12). I t s physical s i m p l i c i t y and i t s inherent c a p a b i l i t y f o r handling either p o s i t i v e - , or negative-going inputs has warranted i t s s e l e c t i o n Input voltage Reference voltage R l -R 2 -R, -° 1 " DI -22K ohms, 10$ 10K " , 10fo 470 47K » , 10fo 50 uufds germanium diodes 1N67A ( V 1 S V 2 ) - 12AT7 SYMBOL o Input E 0  R C. . ( E R | ) Output pulse P i g . 4-12. The Comparator (down-going). 43 over the previously mentioned comparators as the comparator to be tested i n the m u l t i p l i e r . The c i r c u i t of the comparator i s shown i n Pig. 4-12. The manner i n which the germanium diodes are connected i n the c i r c u i t determines the mode of operation of the comparator,, In th i s case, the comparator i s suited for a negative-going input voltage. I f both diodes are reversed, the comparator i s suited f o r a positive-going input voltage. The impedances of the diodes, and hence the amount of coupling from one tube to the other, are controlled by the voltage across the bridge. The condensers coupling the bridge to each tube i s o l a t e the bridge from the d-c le v e l s of each tube. The operation of the comparator may be described as follows: i f the input voltage i s more posit i v e than the r e f e r -ence voltage, the two diodes are biased negatively and conseq-ently insert high impedances into the plate-to-grid paths between each tube. Thus each tube i s e f f e c t i v e l y connected f o r negative-feedback by the plate-to-grid r e s i s t o r s R^. The tubes, consequently, remain i n t h e i r quiescent states. When the input voltage to the bridge reaches equality with the reference voltag the diodes begin to conduct and hence offer low impedance pl a t e -to-grid paths between the tubes. Each tube i s now e f f e c t i v e l y connected f o r positive-feedback and noise i n the c i r c u i t quickly i n i t i a t e s the regeneration cycle. Figure 4-13 i l l u s t r a t e s the waveforms of various point i n the comparator f o r a constant d-c input voltage. Of sp e c i a l interest i s the plate wavefore of (Part (a)) since i t shows the negative pulse generated by the comparator. It i s seen that the plate voltage of V-. quickly drops a f t e r the regeneration (d) Grid of V 2 Pigo 4-13o Waveforms i n the comparator. 44 cycle i s i n i t i a t e d and reaches i t s lowest point i n le s s than a microsecond. This f a l l i n g voltage i s transmitted to the g r i d of V£ (Part (d)) which drops to -11 v o l t s thus c u t t i n g o f f Vg . Of the 60 v o l t s (approx.) that i s appl ied to C-^  from the plate of only 11 v o l t s appear at the g r id of Vg. This large v o l t -age loss i s due p r i n c i p a l l y to q u a s i - d i f f e r e n t i a t i o n by the small time constant rc c i r c u i t s (C-jR^ = 2.5 usees) . Quas i-d i f fer-e n t i a t i o n by a l l the rc c i r c u i t s i s responsible for the t u r n -over and subsequent tendency for recovery shown i n a l l the waveforms. This ac t ion continues u n t i l the knee i s reached as shown i n Part (a) . At t h i s po int , the various charges that have accumulated on the condensers during q u a s i - d i f f e r e n t i a t i o n block the bridge diodes. This i s evident from considerat ion of Parts (e) and (g) , and Parts (f) and (h) . In each case, a reverse voltage of 14 v o l t s i s appl ied to the diode. As both diodes are now non-conducting, both tubes are e f f e c t i v e l y connected for negative-feedback, which prevents a rap id d i scharging of the coupling condensers. Af ter the condensers have discharged, another pulse occurs and the cycle i s repeated. The comparator w i l l continue to give out pulses as long as the input voltage remains equal to or les s than the reference .voltage. F i g . 4-14 shows the r e l a t i o n s h i p s between the period between pulses and the pulse amplitude as a funct ion of the voltage di f ference across the br idge . As the magnitude of the voltage dif ference increases , the pulse amplitude increases and the period decreases. A small hysteres i s ef fect i s evident as the comparator switches on at -0.25 v o l t s and switches of f at +1.65 v o l t s . The r e l a t i o n s h i p s shown i n the diagram are equal ly v a l i d for the comparator when i t i s connected for a p o s i t i v e -going input vol tage . Switchzs J off ' 45 13 <9 Q o OC Ul CL -10 -ZO -50 DC VOLTS INPUT - 40 F i g . 4-14. S t a t i c c h a r a c t e r i s t i c s of comparator. A c h a r a c t e r i s t i c of t h i s comparator i s that the input waveform modulates the output waveform taken from the plate of V^. This i s because the input voltage i s applied d i r e c t l y to the g r i d condenser of V^ through the r e s i s t o r R^ of the bridge. The modulation e f f e c t i s not as pronounced when the output i s taken from the plate of Vg since the bridge diode tends to prevent the input from a f f e c t i n g the grid of Vg. A f a u l t with t h i s comparator was discovered while t e s t i n g the m u l t i p l i e r (see Sec. 6-1). It was observed that the voltage l e v e l at which the comparator triggered fluctuated approximately J-Q of a v o l t . While t h i s i s equivalent to an Input voltage o Output r Reference voltage R-j^  - 22K ohms, 10f° R 2 - 10K " , 10% R 3 - 470 " R 4 - 47K » , 10% 01 - 50 uufds DI, . . . , D7 - germanium diodes 1N191 or HD 2158 ( V 1 , V 2 ) - 12AT7 P i g . 4-15. Re-designed Comparator (down-going). 46 error i n m u l t i p l i e r accuracy of only of 1%, i t was f e l t that the c i r c u i t should be improved to el iminate t h i s t roub le . The improved c i r c u i t i s shown i n F i g . 4-15. It i s seen that the bridge c i r c u i t i s composed e n t i r e l y of diodes. The diodes, a l l quick recovery diodes, are arranged for a negative-going input . It was found necessary to el iminate the gr id- to-br idge coupling condensers i n order to improve the recovery time of the comparator. Because of t h i s , t h i s comparator functions c o r r e c t l y only for a reference voltage;-near zero . Due to the d i rec t coupling at the g r id s , the input voltage can af fect the quiescent states of the tubes. The diode D 2 p a r t i a l l y pre-vents t h i s . The diode conducts when the input, i s pos i t ive and thus e f f e c t i v e l y prevents the pos i t ive por t ion of the input wave-form from a f f ec t ing the comparator. When the input voltage gjoes negative, t h i s diode cuts of f thus a l lowing the comparator to operate i n a normal manner. It i s a l so apparent that i f the input voltage goes too f a r negative, both tubes w i l l completely cut o f f . In order to al low the comparator to accommodate a pos i t ive-go ing input vol tage , a l l the diodes i n c l u d i n g D 2 have to be reversed. The regeneration ac t ion i s s i m i l a r to that previous ly descr ibed. However, better i s o -l a t i o n during switching i s obtained since the connecting diodes, D^ and D^, cut o f f thus i s o l a t i n g the bridge from the ; s i gna l source. And also the two diodes D. and D f i c o n t r o l l i n g the F i g . 4-16. Output pulse from 4 D re-designed comparator. negative-feedback appl ied to each 115 20 usees 47 tube cut o f f during switching. The voltage at which the comparator triggers i s approximately -0.25 v o l t s and there i s very l i t t l e hysteresis e f f e c t . Figure 4-16 shows a t y p i c a l waveform obtained from the plate of . 5. D e t a i l s of M u l t i p l i e r 48 5-1. INTRODUCTION Except for d i v i s i o n , m u l t i p l i c a t i o n i s the most d i f f i c u l t ar i thmetic operation to perform, consequently, i t warrants a more deta i led inve s t i ga t ion than the other operat ions . For t h i s reason, only the m u l t i p l i e r was constructed. Informa-t i o n gained from the study of the m u l t i p l i e r was used to predict the p r a c t i c a b i l i t y of employing the same basic components i n the adder and subtractor . The pulses which are necessary for the operation of the m u l t i p l i e r and which would normally be obtained from the computer have to be generated i n the experimental setup. Thus i t was decided, i n order to keep the experimental apparatus to a minimum, to operate the m u l t i p l i e r as a squarer. The con-ver s ion of the m u l t i p l i e r from i t s test setup as a squarer to the basic four-quadrant m u l t i p l i e r can be carr ied out by the removal of one comparator as pointed out i n Sec. 5-2. 5-2. CIRCUIT DESIGN The block diagram of the m u l t i p l i e r arranged as a squarer i s shown i n F i g . 5-1. The only di f ference between t h i s arrangement of the m u l t i p l i e r and the basic four-quadrant m u l t i p l i e r ( F i g . 3-6) i s the i n c l u s i o n of the comparator C3. This comparator simulates the condi t ion where x = y i n the m u l t i p l i c a t i o n of the two funct ions , x and y . The c i r c u i t time constants involved i n the operation of the m u l t i p l i e r w i l l now be ca lcu la ted . CM • O H O 03 H 0 CM I Ci3 H 1 CM C5 T x PH y a? I o5 I 6 6 H CM PH O O Pt CD *H a CO o U ba o3 •H M o o H i LT\ •H PH 49 The l i m i t s on the l i n e a r operat ional range of the d-c P h i l b r i c k K2-X ampl i f i e r are ± 100 v o l t s . To u t i l i z e the f u l l l i n e a r range of the a m p l i f i e r , i t i s des irable that the ramp output voltage of the integrator be designea to be ± 100 v o l t s i n 1000 usees. Then from Eq . ( 4 - 8 ) i n Sec. 4-2 ( e ( t ) = - v - ^ ), s ince v = ± 300 v o l t s (the B+ ana B- supplies are +300 ana - 3 0 0 v o l t s r e s p e c t i v e l y ) , t = 1000 usees, ana e Q ( t ) = =F 100 v o l t s , the time constant, r c , i s 3000 usees. This time constant i s the correct one for use i n a s soc ia t ion with Gates 1 to 5 . There remains an a a a i t i o n a l c a l c u l a t i o n to aetermine the time constant of a secona i n t e g r a t i n g c i r c u i t of Integrator 2. This c i r c u i t i s connectea to the output of Integrator 1 . Put t ing x = y into E q . ( 3 - 3 ) of Sec. 3-4 gives 2 2 x + c = (x + c)(x + c) - c(c + x) + c(c - x) 2 2 where x + c corresponas to the output voltage of the secona in tegra tor . The term (x + c)(x + c) r e s u l t s from the i n t e g r a t i o n of the output of Integrator 1 . I f x i s put equal to c, t h i s 2 term equals 4c which i s equal to the area of the t r i a n g u l a r e 1 ( t ) r 1 o / \ A A -e 2 ( t ) r 2 — o — \ A / V . e 3 ( t ) e ^ t ) +300 K—— »• -100. +100 e 3 ( t ) / L P i g . 5-2. Diagram showing operat ional r e l a t ionsh ip s of Integrators 1 ana 2. 50 2 waveform of Integrator 1 . Ha l f of t h i s area i s equal to 2c which i s equivalent to a voltage of 100 v o l t s at the output of Integrator 2 . The c a l c u l a t i o n of the time constant, ^ c - ^ , follows d i r e c t l y and may be followed with the a id of F i g . 5 - 2 . The voltages e-^ , eg, and e^ are r e l a t e d by the fo l low-ing equations: e . ( t ) e 2 ^ ---h?* e 2 ( t ) dt '0 where, for the moment, T i s unspec i f i ed . Imposing the condit ions e-^t) = +300 v o l t s e 2 (T) = - 1 0 0 v o l t s e^CT) = +100 v o l t s on these equations gives the r e l a t i o n ' 2 C 1 = Z r l c l r 0 Cn = ?r r , n (5-1) However, a previous c a l c u l a t i o n determined r-^c^ ( i . e . , rc ) to be 3000 usees when T i s equal to 1000 usees. Therefore, ?2C± ~ -^00 usees. The values of r^ , r 2 , and c^ were a r b i t r a r i l y chosen as 300K ohms, 50K ohms, and 0 . 0 1 ufds , r e s p e c t i v e l y . It i s now possible to make an estimate of the l i n e a r i t y of the ramp-voltage produced by the in tegra tor . Eq . (4 -7) of Sec. 4 -2 gives the precentage devia t ion from l i n e a r i t y of the output of the in tegra tor . I f the exponent i n the exponential terms i s le s s than 0 * 0 1 , i t i s permissible to approximate the term by the expression x ~ r c U + 1) 51 Eq, ( 4 - 1 ) then reduces to hf° = ( r T " I > x 1 0 0 ^ ( 5 _ 2 ) The r e s t r i c t i o n on the exponent i n the exponential term i n Eq. ( 4 - 1 ) requires that <A + 1>>cdfe ? F ( 5~3> Since t = 1000 usees and r c = 3000 usees, t h i s i n e q u a l i t y becomes (A + 1) > 33 ( 5 - 4 ) It i s not d i f f i c u l t to obtain ampl i f i e r gains i n excess of 32 as demanded by ( 5 - 4 ) . Consequently, the above approximation, which leads to the der iva t ion of Eq. ( 5 - 2 ) , i s quite v a l i d . Furthermore, moderately h igh gains of 100 to 1000 are not extremely d i f f i c u l t to obta in . These gains give deviat ions from l i n e a r i t y of 1% a n d o f lf> r e s p e c t i v e l y , accord-ing to Eq. ( 5 - 2 ) . It may a r b i t r a r i l y be stated that the a l low-able minimum gain of a high-gain a m p l i f i e r i s 1 0 0 0 . This i s not an unreasonable f igure for a h igh-gain a m p l i f i e r . Ampl i f i e r s having gains i n excess of 1000 w i l l give corresponding deviat ions of l e s s than ^ of Ifo. Since "this f igure i n i t s e l f i s very smal l , the dev ia t ion from l i n e a r i t y of the ramp output voltage of the integrator may for p r a c t i c a l purposes be neglected. The semi-detai led diagram F i g . 5 -3 shows the m u l t i -p l i e r with i t s associated computing elements. The mul t iv ib ra tor s and comparators are represented by block diagrams and show only t h e i r main c h a r a c t e r i s t i c s . The p a r t i c u l a r state taken on by mul t iv ib ra to r i n response to an input pulse i s indicated by the corresponding number e i ther above or below the l i n e j o i n i n g the mul t iv ib ra to r to a diode. The number i n d i c a t i n g the state i s 52 above the l i n e i f the pulse opens the gate and below the l i n e i f the pulse closes the gate. The value of r ^ (300K ohms) chosen above i s obtained by the series resistance of a r e s i s t o r (270K ohms), a potentiometer (30K ohms) and a s i l i c o n diode (HD 6001). The potentiometer provides a means f o r adjusting the resistance of the branch to the correct value. S i m i l a r l y , the value of r 2 (50K ohms) chosen above i s obtained by the series resistance of a r e s i s t o r (47K ohms) and a potentiometer (10K ohms). The variable reference voltage for comparator C3 i s obtained from an accurate potentiometer (Helipot). The voltage across the potentiometer i s maintained at 100 v o l t s by a cathode follower. The pulse given out by t h i s comparator corresponds to Px. 5-3. DESCRIPTION OP SQUARING OPERATION The necessary channel-pulses (refer to m u l t i p l i e r theory) are generated by an arrangement of the three basic units shown i n F i g . 5-4. The operation of these units w i l l not be discussed i n d e t a i l since i t may be inferred from the d i s -Pig. 5-4. Method of generating channel-pulses. 53 cussion that follows„ The main points to be noted about the operation are as follows„ The output of the integrator i s a "sawtooth" voltage whose l i m i t s are zero and a hundred v o l t s . One channel-pulse occurs at a lower peak and the next channel-pulse at the following upper peak. The c i r c u i t i s arranged so that the time between successive channel-pulses i s equal to one cycle (1000 usees). The following discussion makes reference to F i g . 5-3 and Fig„ 5-5 and describes the operation of the squarer f o r a p a r t i c u l a r reference voltage of 03. This reference voltage i s -25 v o l t s and corresponds to a value of x of -4 ( i n normal-ized form). I n i t i a l l y the outputs of both integrators are at zero. No current i s flowing into or out of either integrating con-denser since the sums of the currents due to the computing networks at the integrator inputs are equal to zero ( i . e . , i 1 = ± 2 : F i g . 5-3 )o CPl sets both BM2 (bistable m u l t i v i -brator 2) and BM4 to +15 v o l t s , thus blocking diodes D2 and D4. BM2 then supplies i 2 and BM4 supplies i ^ . The current i 1 at p the input of Integrator 1 now flows into the integrating condenser, causing the output voltage to f a l l l i n e a r l y . S i m i l -a r l y with Integrator 2, the current i ^ causes the output of Integrator 2 to begin to f a l l l i n e a r l y . However, the current i ^ which increases l i n e a r l y with the negative-going output of Integrator 1 reduces the net current flowing into the i n t e g r a t i n g 2 Because of the current demand on Integrator 1, the K2-X amplifier i s operated i n i t s augmented state. BM2 & BM4 Pigo 5-5. Waveforms i n Squarer, 54 condenser of I n t e g r a t o r 2„ This causes the voltage output of t h i s i n t e g r a t o r to have a p o s i t i v e or upward curvature as shown i n F i g . 5-5. When the negative-going output vo l t a g e of I n t e -g r a t o r 1 reaches -25 v o l t s , C3 generates a pulse (which simulates the pulse Px) which r e s e t s BM2 and EM4 to -15 v o l t s and sets EMI and BM3 to -15 v o l t s . Diode D2 and D4 now conduct and D l and D3 block. The current at the input of I n t e g r a t o r 1 i s now ±2 which i s s u p p l i e d by current f l o w i n g out of the i n t e g r a t i n g condenser. This causes the output of I n t e g r a t o r 1 to increase p o s i t i v e l y ( F i g . 5-5). A s i m i l a r a c t i o n occurs at the input of I n t e g r a t o r 2. The decreasing current i ^ augments the current i ^ causing the p o s i t i v e - g o i n g output vo l t a g e of I n t e g r a t o r 2 to now have a negative or downward curvature. When the output v o l t a g e of In t e g r a t o r 1 reaches zero - i n 500 usees - CI r e s e t s EM3 t o +15 v o l t s ; diode D l now conducts and the i n t e g r a t i o n process of In t e g r a t o r 1 ceases. Thus the output w i l l remain at zero. Then since i ^ i s zero, the output of I n t e g r a t o r 2 now increases l i n e a r l y due s o l e l y to the current i^ „ When CP2 occurs, BM1 i s re s e t t o +15 v o l t s and EM5 i s set to +15 v o l t s . Diode D3 now conducts and D6 b l o c k s . BM5 then s u p p l i e s i ^ and the current at the input of I n t e g r a t o r 2 i s now i g which flows i n t o the i n t e g r a t i n g condenser of I n t e g r a t o r 2„ This causes the output of I n t e g r a t o r 2 to f a l l l i n e a r l y . C2 r e s e t s EM5 to -15 v o l t s when the output of I n t e g r a t o r 2 reaches zero. Diode D6 now conducts. The output then remains at zero u n t i l another channel-pulse 1 r e s t a r t s the whole operation. 2 The pulse given out by C2 represents Px and occurs 625 usees a f t e r CP2 occurs. I n normalized form, t h i s c o r r e s -2 ponds t o a value of x equal to 4 which i s the square of the 55 o r i g i n a l value of x: x = -Figure 5-6 f u r t h e r i l l u s t r a t e s the operation of the squarer. The output waveforms f o r both i n t e g r a t o r s are shown p f o r a value of x equal to •§•. Here again, Px occurs 625 usees a f t e r CP2. This i s t o be expected by the nature of the squaring process,, CPl 1 CP2 CPl 2 F i g . 5-6. Outputs of I n t e g r a t o r s 1 and 2 i n Squarer. 6„ Test of M u l t i p l i e r 56 6-1. METHOD AND RESULTS OP TEST In order that the m u l t i p l i e r could be tested some means had to be devised to measure the i n t e r v a l between CP2 2 and Px accurately. The t e s t i n g device shown i n Pig. 6-1 was subsequently developed f o r t h i s purpose. The device employs the same three basic units previously described plus another ca l l e d an inverter<, The inverter bears i t s name from the fact that an input signal appears inverted, but not necessarily of the same amplitude, at the output. The p r i n c i p l e of operation of the t e s t i n g device i s as follows. A pulse w i l l be produced at the output of the 2 inverter i f the pulse Px and another pulse, Pt, generated J Pig. 6-1. Block diagram of t e s t i n g device. 57 by the t e s t ing device , do not occur s imultaneously. The width of the pulse at the output of the inver ter i s equal to 2 the t ime-error between the two pulses , Px and P t . The p o l a r i t y of the pulse i s e i ther pos i t ive or negative, depending upon 2 whether the pulse Pt occurs before or a f ter Px . Since the i n t e r v a l from CP2 to Pt i s known f a i r l y accurate ly , the i n t e r v a l 2 from CP2 to Px can be determined by ad just ing the pulse Pt u n t i l the two pulses become co inc ident . This i s ind ica ted when there i s no output pulse from the i n v e r t e r . The method of generating the pulse Pt i s very near ly the same as that used to generate Px i n the m u l t i p l i e r . CP2 opens G-3 as w e l l as Gl and G2 thus producing a pos i t ive -go ing ramp-voltage at the output of the in tegra tor . When the output voltage of the integrator reaches the reference l e v e l of C l , a pulse Pt occurs which by c lo s ing G3 and opening G4 causes the output voltage to r e t u r n to zero. The reference voltage of the comparator i s provided by an accurate protentimeter . The pulse 2 Pt i s a lso used to close G2 and the product-pulse Px obtained from the m u l t i p l i e r i s used to close G l , I f the two pulses do not occur simultaneously, one gate w i l l remain open longer than the other thus producing a pulse at the output of the i n v e r t e r . P r i o r to the t e s t of the m u l t i p l i e r , the time constants and the he l ipo t voltages were adjusted. The method of adjustment adopted was an absolute method: that i s , a l l a r i thmet ic elements and constants involved i n the m u l t i p l i c a t i o n were adjusted to the values prescribed by the theory. Por extreme accuracy, as required by an operat ional m u l t i p l i e r , a r e l a t i v e method of adjustment w i l l be adopted. As extreme accuracy was not required i n t h i s t e s t , i t was expedient to employ the absolute method of adjustment. 58 For the m u l t i p l i e r arranged as a squaring device the expected r e s u l t of a plot of the output versus the input of the m u l t i p l i e r i s a parabola. Because of errors i n adjustment and i n the uni t s themselves, the experimental r e s u l t s give a parabola which i s d i f fe rent from the parabola predicted by the basic theory. I t i s not to be in fer red from t h i s that the m u l t i p l i e r does not m u l t i p l y " c o r r e c t l y " . The t h e o r e t i c a l parabola derived from the theory i s only a standard with which the experimental r e s u l t s may be compared. The m u l t i p l i e r gives a "correct r e s u l t " only i f i t produces a r e s u l t consistent with the actua l inputs obtained i n operation which may be d i f f e rent from those prescribed by the theory. I t i s convenient to p lot a graph of the di f ference between an experimental r e s u l t and the corresponding t h e o r e t i a l r e su l t versus the input of the m u l t i p l i e r , since a ce r t a in amount of information can be obtained from i t . F i g . 6-2 shows such a graph where both the dif ference and the input "x" are i n normalized form. The t h e o r e t i c a l r e s u l t s of the m u l t i p l i e r 2 are determined by the equation = x . I f the assumptions are made that the t e s t i n g c i r c u i t described prev ious ly i s l i n e a r and that the output of the m u l t i p l i e r i s parabo l ic , then the form of the graph p lo t ted i n F i g . 6-2 should i t s e l f be parabol ic (or l i n e a r since a s t ra ight l i n e can be considered to be a degenerate form of a parabola) . The three curves shown i n F i g . 6-2 were drawn from sets of data taken under the fo l lowing condi t ions . The data for curve 1 was taken af ter the experimental apparatus had warmed up and the d-c high-gain ampl i f i e r s had been corrected for d r i f t . The ampl i f i e r s were then corrected fo r d r i f t and 05 Ch • 1 IV) • CD O Q 4 4 CD SD c+ W H-O JB o H Hj 4 P-CD H* CQ H) H) H CD c+ 4 CQ CD < o CD CD 4 CQ CD CQ c+ — CD CD 0 CO P O 4 H CD p3 4 — H CQ H* N CD CD X P< W CD Hj 4 O fcj' n CD • • H $» 59 the equipment was allowed to operate for an hour before the data for curve 2 was t a k e n „ Immediately afterwards the ampl i f i e r s were corrected for d r i f t and the data for curve 3 was taken. As might be expected none of the curves are t r u l y parabol ic or l i n e a r . This i s due i n part to the t e s t i n g device which i s i t s e l f a f f l i c t e d with the same problems of d r i f t as the m u l t i p l i e r . I f the large humps at the l e f t side of the curves are neglected for the moment, the maximum dev ia t ion from a s t ra ight l i n e drawn through the end points of a curve i s approximately 0.01 or 1 per cent. A reasonable conclus ion to be drawn from t h i s i s that the m u l t i p l i e r produces a parabol ic output with an accuracy of approximately 1 per cent. The effect of ampl i f i e r d r i f t ' i s indicated by the d i f ference between curves 2 and 3. Operating d r i f t i s c l e a r l y indicated by the upward trend of the curves . The maximum change i n the curves i s at the l e f t end and i s approximately 0.03 or 3 per cent. These ef fects of d r i f t create a problem of p r e c i s i o n or r e p e a t a b i l i t y which c l e a r l y depends upon the length of time that the equipment i s operated. The l a t e r a l extent of the curves at both ends depends upon the operation of the comparator i n these reg ions . As can be seen from the curves, the reg ion near the l e f t s ide i s affected much more by the act ions of the comparators than the region at the r i g h t s ide . The large humps at the l e f t s ide of the curves are due to f a u l t y operation of comparators CI and C3 of the m u l t i p l i e r ( F i g . 5-1) i n t h i s r eg ion . Figure 6-3a shows a corre la ted set of waveforms of the outputs of Inte-grator 1 and comparators CI and C3. As "x" i s increased negat ive ly ; that i s , as the i n t e r v a l from CP1 to Px i s CP2 PK P C Output of 1' Output (Pc-j^ ) from C l Output (Px) from C3 (a) Correlated outputs of var ious uni t s i n the Squarer, Output (Px) from C3 (b) Output of 03 due to hys teres i s ef fect F i g « 6-3. Diagram showing outputs of C l , C3, and Integrator 1. 60 decreased, the h y s t e r e s i s e f f e c t and recovery time of com-parator C3 causes i t s o p e r a t i o n t o become e r r a t i c . A f u r t h e r increase i n "x" produces an output from 03 as shown i n P i g . 6-3b which i l l u s t r a t e s the h y s t e r e s i s e f f e c t . The recovery time of C l adversely a f f e c t s the comparator's operation i f the i n t e r v a l from C P l to Px i s l e s s than approximately 50 usees, No apparent d i f f i c u l t y was experienced w i t h com-parator, 02. In P i g . 6-4, the output of the comparator i s shown i n r e l a t i o n to the output of I n t e g r a t o r 2 and w e l l i l l u s t r a t e s the cependance of the amplitude of the pulses upon the input voltage„ Px CP 2 / s^" O u t l i n e of pulse \ amplitude ->- t Output of I n t e g r a t o r 2 P i g . 6-4. Diagram showing outputs of C2 and I n t e g r a t o r 2. 61 As was mentioned i n Sec. 4-4-3, a close examination of the outputs of the integrators revealed not only that the zero-voltage comparator had a t r i g g e r i n g - e r r o r of of a v o l t hut also that the t r i g g e r i n g - l e v e l f luctuated approximately jj^ of a v o l t from t h i s po in t . The f l u c t u a t i n g t r i g g e r i n g - l e v e l necess i tated the re-design of the comparator. The r e s i d u a l t r i g g e r i n g - e r r o r was el iminated hy r a i s i n g (or lowering) the reference l e v e l t h i s amount by a voltage d i v i d e r network. As the error was smal l , a voltage d i v i d e r network employing a small potentiometer i n ser ies with a large r e s i s t o r was e n t i r e l y sui table as a low-impedance, low-voltage reference source. It should be mentioned i n connection with the com-parator ' s t r i g g e r i n g - e r r o r that s l i gh t unbalances i n the input c i r c u i t s of an integrator produced a d r i f t e r ror , when the output was t h e o r e t i c a l l y to remain at zero , at times equal to or greater than the comparator's t r i g g e r i n g - e r r o r . The l a s t point to be mentioned i s a further f au l t with the comparator due to i t s extreme s e n s i t i v i t y . I t was not iced that the t r i g g e r i n g - l e v e l of comparator CI i n the m u l t i p l i e r ( F i g . 5-1) changed d r a s t i c a l l y when the output pulse from CI was to occur near CP2. The trouble was caused by stray wir ing capacitance which caused the t r i g g e r i n g - a c t i o n of the comparator to " lock-on" to CP2. Subsequent removal of a wire , which conducted CP2, from the v i c i n i t y of the comparator e f f ec t -i v e l y corrected t h i s t rouble . To avoid t h i s t rouble i n an operat ional m u l t i p l i e r , the comparator must be i s o l a t e d from capaci t ive coupl ing of undesired pulses . 62 6-2. REMARKS In making conclusions on the operat ion of the m u l t i -p l i e r , one must r e c a l l that the experimental setup was simu-la ted insofar as the generation of the input funct ion pulses were concerned. The operat ional form of the m u l t i p l i e r would be shown i n P i g . 3-6 and would include only two comparators, both zero reference voltage comparators. Since comparator C3 (see P i g . 5-1) i s not i n the operat ional c i r c u i t , the f a u l t y operation caused by i t i n the experimental setup (Sec. 6-1) would be e l iminated. The usable extent of "x" i n F i g . 6-2 would then range from -0.9 to +0„9 and might w e l l be increased by employing the re-designed zero-voltage comparator i n Sec. 4-4-3 ( F i g . 4-15). The accuracy and p r e c i s i o n ( repea tab i l i ty ) of the experimental setup were estimated to be about 1 per cent and 3 per cent r e s p e c t i v e l y . Prom t h i s , i t seems e n t i r e l y reasonable to conclude that provided the necessary accurate adjustments are made to the ar i thmetic elements t h e r e i n , an operat ional m u l t i p l i e r w i l l have an accuracy we l l wi th in 1 per cent. For accuracy bet ter than ^ of 1 per cent, the re-designed zero-voltage com-parator would be necessary i n the m u l t i p l i e r . The p r e c i s i o n of the m u l t i p l i e r , however, as already mentioned, depends upon the durat ion of operat ion. For r e a l -time operat ion, lack of p r e c i s i o n w i l l be more of a problem than lack of accuracy. The so lu t ion of t h i s problem depends i n part upon f i n d i n g a s a t i s f ac tory method of e l iminat ing d r i f t i n d-c a m p l i f i e r s . One such method may be by using ac-coupled ampl i-f i e r s instead of dc-coupled a m p l i f i e r s . However, other problems such as the charging of coupling condensers would be introduced 63 by t h i s method. A problem not mentioned previously i s that of holding the outputs of the integrators at zero when the m u l t i p l i e r i s not operating; that i s , when there are no input pulses. Methods for achieving t h i s are described i n E l e c t r o n i c Analog Computers (14, p p . 288-293). Since t h i s i s a problem associated with the ove r a l l operating technique of the computer, i t i s not considered i n t h i s t h e s i s . The use of the basic units i n performing the other arithmetic operations should not present any d i f f i c u l t i e s apart from those already mentioned. The most serious d i f f i c u l t y i n connection with these operations w i l l probably be integrator error. I t s eff e c t s w i l l occur p r i n c i p a l l y i n addition. Since addition i s an accumulative operation, summation error due to integrator input unbalance would be considerably greater than the error due to the same cause Involved i n shorter operations such as m u l t i p l i c a t i o n . Then, i n conclusion, the arithmetic c i r c u i t r y of t h i s computer should, i f a l l the aforementioned d i f f i c u l t i e s are s a t i s f a c t o r i l y eliminated or reduced, give results whose errors are consistent with those of the m u l t i p l i e r . The m u l t i p l i e r , with a m p l i f i e r ' d r i f t eliminated by either "chopper s t a b i l i z e d d-c amplifiers or by the simplier a-c amplifiers and with pre-c i s i o n adjustment of time constants, can be expected to give r e s u l t s to better than one per cent. 64 Appendix A. Spec ia l Operations A - l . INPUT-OUTPUT OPERATIONS It i s through input-output operations that information i s put into or taken out of the computer. The method to be employed i s very s i m i l a r to that described i n Sect ion 3 - 5 and may be understood by cons ider ing F i g . A - l . Consider f i r s t the input operation (see F i g . A - l a ) . The value of a funct ion i s set accurate ly as a voltage (between 0 and +100 v o l t s ) by a device such as a Hel ipot (potentiometer)-. This voltage i s used as a reference voltage for comparator CI. When a selected channel-pulse CPk opens G l , the output voltage of the integrator sweeps up with a slope of +1. When the output reaches the reference l e v e l of comparator CI , the comparator generates the desired funct ion pulse Pf^. which i s then stored on the drum. Pf^ also closes Gl and open G2, causing the output voltage of the integrator to sweep down at a slope of -1. When the output voltage reaches zero, the comparator C2 generates a pulse which closes G2. The output voltage of the integra tor then remains at zero u n t i l such time as another channel-pulse opens G l . A l l functions may be put into the computer i n t h i s manner. F i g . A - l b shows^  how the output operation i s accomplished. The selected channel-pulse CPn opens Gl and the corresponding funct ion pulse Pf closes i t . In t h i s i n t e r v a l , the output of the integrator sweeps up to a voltage representing a + f n « This voltage i s stored i n the funct ion storage uni t where i t i s access ible to external recording devices . Any convenient channel-pulse which fol lows CPn (such as CPq.) opens G2, causing the CPk (a) Input operation CPn 0 1> Gl(+1) P f n " CPCLO 0" G 2(-l) ~C~ Function Storage Unit n (b) Output operation Fig . A - l . Input-output operations. 65 output voltage of the integrator to re turn to zero. It remains at zero u n t i l CPn again occurs and a new value of f i s stored i n the storage u n i t . I t i s apparent that as many storage uni t s are needed as there are functions to be sampled. A-2. FUNCTION GENERATION The purpose of the fo l lowing i s to describe a method of funct ion generation based upon the pulse-posi t ion-modulat ion p r i n c i p l e . The funct ion to be reproduced i s approximated by l i n e a r segments and parabol ic a rc s . For most a r b i t r a r y functions encountered i n phys ica l systems t h i s method of approximation i s quite accurate. The method of generating the funct ion i s i l l u s -trated i n F i g . A-2. The i n i t i a l condit ions a + f(0) and f'(0) are f i r s t e s tab l i shed . The funct ion i s then generated by double in tegra t ion of the funct ion ' s second d e r i v a t i v e . The second der iva t ive i s represented i n the diagram by piecewise constant values r-p r^, and r^ . The values which character ize the func-t i o n are represented on the drum by pulse pos i t ions and l i n e a r sweep c i r c u i t s perform the double Integrat ion . The basic arrangement of the sweep c i r c u i t s i s i l l u s -t ra ted i n F i g . A-3. Channel-pulse 1 (CPl) opens Gl and the funct ion pulse P f(0) c loses i t . In t h i s i n t e r v a l , the voltage output of Integrator 3 sweeps up to a value representing a + f ( 0 ) . The slope of the ramp-voltage i s not spec i f i ed since i t depends upon a compromise between various other aspects of the function generator. P f(0) a l so opens G3 and P f ' (O) closes the gate. The net r e su l t of the operations of G3 and G4 (opened by CPl and closed by Pa) i s to produce a voltage at the output of Integrator 2 representing f ' ( 0 ) . The reset pulse a H F + f (0) t - f ( f «(x) ( 0 ) f ~ d ~ d i f X J ? "f r 1 f x l t I 2 X 3 y 3 F i g , A - 2 . Diagram showing p r i n c i p l e s of pulse-posit ion-modulat ion funct ion generation. P i g , A - 3 , Method of performing funct ion generation. 66 of G3 associated with Pf°(0) resets FF2 which had been set by CP1. This opens PG1, permitting the next two pulses, Pr-^ and PX-j^ , to pass (PG stands f o r pulse gate which i s a gate which passes or blocks voltage pulses or steps). Depending upon the sign that i s required, these pulses are passed by PG3 or PG4, sett i n g and r e s e t t i n g G5 or G6. The reset pulse from either G5 or G6 sets FF1 which opens PG5 and closes PG6 and which also opens PG2 and closes PG1. Py^ resets FF1 which closes PG5 and opens PG6. In the i n t e r v a l between PX-^  and Py^, the output of Integrator 1 represents the value r ^ of the second derivative which i s integrated by Integrator 2. FF3 i s controlled by CP2 and PX (the pulse representing the value of the variable x at which the function i s to be sampled). CP2 sets FF3 which opens PG7 and closes PG8. In the i n t e r v a l from CP2 to PX, the output voltage of Integrator 2 i s integrated by Integrator 3« When PX occurs, FF3 i s reset which closes PG7 -and opens PG8, The output voltage of Integrator 2 i s then zero and Integrator 3 stops integrating. The output voltage of Integrator 3 i s clamped at a + f ( x ) . G2 i s opened by CP3 and causes the output of Integrator 3 to sweepdown to zero. The sweepdown i s terminated when the comparator generates a pulse P f ( x ) . The problems of c o n t r o l l i n g the i n j e c t i o n of pulses to the various gates and of returning the various integrator output voltages to zero are not fundamental to the p r i n c i p l e s outlined above and consequently have not been described. A possible method of obtaining the sign information which operates PG3 and PG4 i s by having a sign pulse follow the Py pulse a f t e r a very short time i n t e r v a l (for example, 10 usees). An open c i r c u i t e d or short c i r c u i t e d delay l i n e can 67 then be used to detect whether a pulse i s followed a f t e r 10 usee delay by a second pulse. One c i r c u i t can be used to re j e c t the 10 usee delayed pulse from t r i g g e r i n g any of the f l i p - f l o p s . A second c i r c u i t can be used to t r i g g e r a sign flip-r-flop (which controls PG-3 and PG4). Again, t h i s i s a problem of technique and consequently does not a f f e c t the basic p r i n c i p l e s outlined above. 68 Appendix B. K2-X A m p l i f i e r Spec i f i ca t ions The K2-X operat ional ampl i f i e r i s one of a number of p l u g - i n uni t s manufactured by George A. P h i l b r i c k Researches, I n c . , Boston, Massachusetts. Of the two high-gain d-c ampl i f i e r s manufactured (K2-X and K2-W), the K2-X i s the most use fu l i n connection with the experimental inves t iga t ions of t h i s t h e s i s . The spec i f i c a t ions and c i r c u i t diagram for the K2-X opera t iona l ampl i f i e r are shown below and on the page fo l lowing . GAIN 30 ,000 DC, open-loop POWER REQUIREMENTS 7 . 5 ma. at +300 VDC 5.2 ma. at - 3 0 0 VDC 0 .75 amp. at 6 . 3 V INPUT IMPEDANCE Above 100 Megohms OUTPUT IMPEDANCE Below 300 ohms open-loop; les s than 0 , 2 ohms f u l l y fed back DRIFT RATE 5 m i l l i v o l t s per day re ferred to the input VOLTAGE RANGE - 5 0 to +50 VDC for inputs (together) - 1 0 0 to +100 VDC for out put (maximum) INPUT CURRENT Less than 0 . 1 micro-amp, for e i t h e r input OUTPUT CURRENT - 2 m a . to +2ma. , d r i v -ing 25K load from - 5 0 to 50 VDC INPUT BIAS P o s i t i v e input should operate 0 . 6 V high at balance (external bias) RESPONSE 1 usee, r i s e time with band-width over 250 KC when used as an inver te r AUGMENTED POWER 50K 1W r e s i s t o r connected between output and -300 VDC supply. Drives 33K load over f u l l voltage range 69 Appendix C„ References 1. Bauer, W . F . , "Aspects of Real-Time S imula t ion , " I . R . E . Nat ional Convention Record, v o l . 5 ( 1 9 5 7 ) , part 4 , pp. 142 -144. 2. Bauer, W.P. and West, G „ P . , "A System for General-Purpose Ana log-Dig i t a l Computation," Journal of the Assoc ia t ion  for Computing Machinery, v o l . 4 , no. 1 (January, 1 9 5 7 ) , pp. 1 2 - 1 7 . 3 . Braun, E . L . , " D i g i t a l Computers i n Continuous Control Systems," I . R . E . Nat ional Convention Record, v o l , 5 ( 1 9 5 7 ) , part 4 , pp. 127 -135 . 4. Bush, V . , "The D i f f e r e n t i a l Analyzer . A New Machine for So lv ing D i f f e r e n t i a l Equat ions , " Journal of Prank l in  I n s t i t u t e , v o l . 212, no. 4 (October, 1 9 3 D , pp. 4 4 7 - 4 8 8 . 5 . Bush, V . and Caldwel l , S . H . , "A New Type D i f f e r e n t i a l A n a l y z e r , " Journal of Prank l in I n s t i t u t e , v o l . 240, no. 4 (October, 1 9 4 5 ) , pp. 2 5 5 - 3 2 6 . 6 . Chance, B . , Hughes, V . , MacNichol, E . P . , Sayre, D. and Wil l i ams , P - . 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                            <div id="ubcOpenCollectionsWidgetDisplay">
                            <script id="ubcOpenCollectionsWidget"
                            src="{[{embed.src}]}"
                            data-item="{[{embed.item}]}"
                            data-collection="{[{embed.collection}]}"
                            data-metadata="{[{embed.showMetadata}]}"
                            data-width="{[{embed.width}]}"
                            async >
                            </script>
                            </div>
                        
                    
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