Clocking Electrode Design and Phase Analysis for Molecular Quantum-Dot Cellular Automata Based Circuits by Faizal Kar im B.Eng . Ryerson University 2005 A T H E S I S S U B M I T T E D IN P A R T I A L F U L F I L M E N T O F T H E R E Q U I R E M E N T S F O R T H E D E G R E E O F Master of Applied Science in The Faculty of Graduate Studies (Electrical and Computer Engineering) The University Of British Columbia A p r i l 2007 © Faizal Karim 2007 Abstract Molecular quantum-dot cellular automaton ( Q C A ) offers an alternative paradigm for computing at the nano-scale. Such Q C A circuits require an external clock, which can be generated using a network of submerged electrodes, to synchronize information flow, and provide the required power to drive the computation. In this thesis, the effect of electrode separation and applied potential on the likelihood of different Q C A cell states of molecular cells lo-cated above and in between two adjacent electrodes is analysed. Using this analysis, estimates of operational ranges are developed for the placement, applied potential, and relative phase between adjacent clocking electrodes to ensure that only those states that are used in the computation, are energet-ically favourable. Conclusions on the trade-off between cell size and applied clocking potential are drawn and the temperature dependency on the oper-ation of fundamental Q C A building blocks is considered. Lastly, the impact of random phase shifts on the underlying clocking network is investigated and a set of universal Q C A building blocks is classified into distinct groups based on their sensitivity to these random phase shifts. ii Table of Contents Abstract ii Table of Contents iii List of Tables v List of Figures vi Acknowledgements - • x Dedication x i 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Overview 1 2 Theory 3 2.1 3-State Q C A • • 3 2.1.1 Model 3 2.1.2 Kink Energy . . 6 2.1.3 Computing with Q C A 7 2.1.4 Clocking 9 2.1.5 Charges . 10 2.2 Configuration Energies 12 2.3 Electrodes 13 2.4 Clocking Energies 14 3 Functional Analysis of a Q C A Cell 16 3.1 A C T I V E to N U L L 16 3.2 A C T I V E to X 17 3.3 Maximum Phase Difference . 19 iii Table of Contents 4 Simulations (including results) 20 4.1 Single Cell • 21 4.1.1 A C T I V E to N U L L 21 4.1.2 A C T I V E to X 21 4.2 3-Cel lWire • • • • 22 4.3 Majority Gate 26 5 Temperature Dependency 34 5.1 Majority Gate 34 6 Random Phase Shifts on the Clock 38 6.1 Zone Clocking 38 6.2 Method of Simulation 39 6.3 Simulation Parameters 40 6.4 Fault Analysis 46 6.5 Simulation Results 48 7 Conclusions 55 Bibliography 57 List of Tables 2.1 Truth Table for Majority Gate 7 6.1 Simulation Parameters . 41 j V List of Figures 2.1 3-state Q C A cells are composed of "V"-shaped molecules grouped in pairs [1]. The site indexing used throughout this thesis is indicated.in the right figure. 4 2.2 Three Q C A cells with different polarizations are shown. Each cell carries two extra electrons which tend to occupy the di-agonals of the cell when in one of the two A C T I V E states. . . 5 2.3 Illustration of the non-linear cell-to-cell response function [2]. The non-linear response provides noise margin and signal restoration 6 2.4 A Q C A wire is created with a linear array of Q C A cells. The cells in the wire will synchronize their polarization to follow the input or driver cell. In this way, information arriving at the input appears at the output after some short propagation delay 6 2.5 Q C A majority gate. The output of the majority gate reflects the majority of the inputs. 7 2.6 Fixing one of the inputs of a majority gate to P—-1 creates an A N D gate. Similarly, fixing one of the inputs to P = l creates an O R gate 8 2.7 Q C A inverter. Cells placed at 45° with respect to one another have a negative kink energy between them and hence their polarization is opposite 8 2.8 A n example of Q C A fanout. The input appears at each of the three outputs . 9 2.9 Submerged electrodes can be used to clock Q C A cells by gen-erating a forward moving electric field at the level of the cells. A ground plane located above the cells is not shown in the figure 10 2.10 A top-view of the time evolution of the Q C A cells shown in Figure 2.9. The forward moving wave applied to the elec-trodes allows for the data to flow in one direction 11 List of Figures 2.11 Q C A cell dimensions 12 2.12 Section showing location of the two modelled electrodes (1,3), electrode images (2,4), pseudo-ground plane, and the Q C A cell. 13 3.1 When the mobile charges are both located on the same side of the cell, the cell is said to be in one of the unwanted X states. 18 3.2 The switching of a cell from an A C T I V E to X state for a 3-cell wire : 18 4.1 3 simulated scenarios 20 4.2 Switching potential vs electrode spacing of a 1 nm cell for 3 different values of \ - • „ , 22 4.3 Switching potential vs the electrode spacing for 0.5 nm, 1 nm. and 2.5 nm cells 23 4.4 Maximum allowable AVE before reverting to an X state for a 1 nm cell for 3 different values of \ 24 4.5 Maximum potential difference allowable before reverting to an X,state for 0.5 nm, 1 ran. and 2.5 nm cells vs. the distance between adjacent clocking electrodes 25 4.6 Wires representing the maximum and minimum potentials for switching the middle cell. Molecular representations are shown in (c) and (d). Cell indexing is shown in (a), 25 4.7 AUNA y s VAVG for two wire configurations using 1 nm cells, which shows that the applied potential range of the electrodes must be at least 18V for correct operation 27 4.8 Majority Gates representing the worst-case scenarios for switch-ing the middle cell. Molecular representations are shown in (c) and (d). Cell indexing is shown in (a) 28 4.9 AUNA VS VAVG for two majority gate configurations using 1 nm cells, which shows that the applied potential range of the electrodes must be at least 35V for correct operation 32 4.10 Min imum applied potential range of the electrodes for the majority gate vs. the electrode spacing, s, for three different values of x- Cell sizes of 1 nm were used 33 5.1 Required VRMS, maximum operational temperature, and max-imum allowable phase shift vs. cell size to ensure a statistical probability of success of 99% for a majority gate. Trade-offs that exist between VRMS. the operational temperature and phase difference can be seen clearly in this figure 37 List of Figures 6.1 Zone Clocking. The four phases of the Q C A clock are shown where each clocking zone is separated by a phase of 90° . . . . 39 6.2 Binary wire using Zone Clocking. The four clocking zones are labelled CO, C I , C2 and C3 and are each represented with a different shade of gray. Here, clocking zone C3 is latching while the other three are relaxed 39 6.3 Simulated Q C A Building blocks: (a) Straight Wire (b) L -Shaped Wire 40 6.4 Simulated Q C A Building blocks: (a) Inverter (b) Majority Gate ' 42 6.5 Simulated Q C A Building blocks: (a) Fanout 2 (b) Fanout 3. . 42 6.6 Number of successes of each considered Q C A building block vs. the Clock High and Low values using the Bistable simu-lation engine 43 6.7 Average Number of successes for the considered Q C A building block vs. the Clock High and Low values using the Bistable simulation engine. A Clock High value of 1.585£7fc is desired while any value smaller than 0.25-Efc provides an optimal value for the Clock Low 44 6.8 Number of successes of each considered Q C A building block vs the Clock High and Low values using the Coherence Vector simulation engine 45 6.9 Average Number of successes for the considered Q C A building block vs. the Clock High and Low values using the Coherence Vector simulation engine. A Clock High value of 1.585-Efc is desired while 0.25E). provides a good value for the Clock Low. 46 6.10 Inversion error in the Fanout3 circuit. If clocking zone C3 latches before C2. then two of the outputs will experience unwanted inversion ( F l . F3). The different clocking zones are labelled in the top-left hand corner for reference 50 6.11 Inversion error in the majority gate circuit. If clocking zone C3 latches before C2. then the output may see the logical inverse of what it is supposed to. The different clocking zones are labelled in the top-left hand corner for reference.. 51 6.12 Inversion error in the inverter circuit. If clocking zone C3 latches before C l and C2, then the output will simply take on the value of the input, effectively replicating the behaviour of a straight wire. The different clocking zones are labelled in the top-left hand corner for reference 52 List of Figures 6.13 Success Rate vs Standard Deviation of the phase shift for the Bistable Simulation Engine 53 6.14 Success Rate vs Standard Deviation of the phase shift for the Coherence Vector Simulation Engine. 54 i x Acknowledgements I would like to acknowledge the love and support from my mom who has sacrificed everything so that I could have the opportunity to accomplish all of my goals. For this, I am forever greatful. I would also like to thank all of my mom's brothers for not only taking great care of me over the years, but for also taking it upon themselves to see that I got through my education without any hardships. A special thanks also goes out to the Goldsmiths for all their kindness, generosity, and unwavering support. None of this work could have been accomplished without the guidance and friendship of my advisors Dr. Konrad Walus and Dr. Andre Ivanov. Their wealth of knowledge and support has allowed me to accomplish things that I never thought possible, and has allowed me to develop into the researcher that I am. I look very forward to continuing this relationship as I strive for my Ph .D. A n d lastly, I would like to thank my two brothers for... well, just being my two brothers. Dedication This thesis is dedicated to my late father who never let me forget the im-portance of a good education. x i Chapter 1 Introduction 1.1 Motivation Molecular quantum-dot cellular automaton ( Q C A ) is an emerging nano-scale computing paradigm which utilizes the electrostatic coupling between electronic configurations in neighbouring molecules to perform information processing. This computing paradigm was originally introduced by C . S. Lent [3] and has been extended in recent years to devices based on single molecules [4-6]. Several proof-of-concept Q C A devices have been fabricated using silicon-on-insulator (SOI) [7], metallic island implementations oper-ating in the Coulomb blockade regime [8-10], and nano-magnetics [11-14]. A simulation tool exists for this technology [15-18] and has been applied towards the high-level design and exploration of both sequential and com-binational circuits [19-21]. A clocking implementation, using a set of submerged electrodes which generate an electric field at the level of the Q C A molecules, has been pro-posed [22]. While this type of clocking has generated considerable interest in recent years [6.23,24], the design of such clocking electrodes has, to date, been a highly under-addressed issue in Q C A . Al l work in this area so far has focused on the ability to use electrodes for clocking Q C A circuits but has failed to discuss in any detail the sizing, spacing, phase, and applied po-tential of such electrodes. Moreover, the power consumption of submerged electrodes is assumed to be comparable to that of the Q C A devices them-selves, which may not necessarily be the case. 1.2 Thesis Overview The rest of this thesis is organized as follows: Chapter 2 is broken down into four sections. Section 2.1 provides a gen-eral overview of the 3-state Q C A technology that will provide the necessary groundwork for the remaining chapters of this thesis. Section 2.2 describes the intra- and inter-cellular energies of the cells in each of the three under-1 Chapter 1. Introduction lying basis configurations. Section 2.3 shows the modelling of the electrodes and their placement with respect to the Q C A cell. Section 2.4 describes the electrostatic energy of the cell configuration due to the clocking electrodes. Chapters 3, 4, and 5 are extracted from a manuscript that has been submitted to " I E E E Transactions on Nanotechnology" [25]. This manuscript investigates the design of clocking infrastructure required for molecular Q C A implementations. In Chapter 3, analytical expressions are provided that will help develop limits on the clocking potential and maximum phase difference of adjacent electrodes to ensure the correct functionality of fundamental building blocks in Q C A . Chapter 4 provides simulation results of fundamental building blocks in Q C A and shows the dependency of these building blocks on various cell parameters. In Chapter 5 of this thesis, the temperature dependency of these build-ing blocks is investigated as well as the root-mean-square (RMS) voltages required for correct functionality.. Chapter 6 investigates the effect of random phase shifts on the underlying clock signals in a Q C A circuit. 2 Chapter 2 Theory 2.1 3-State QCA The fundamental unit in Q C A is the Q C A cell, created with either 4 or 6 quantum dots and 2 mobile electrons. Q C A devices and circuits have been constructed from metallic islands [9,10,26-29] and from nano mag-nets [11-14, 30, 31], but can potentially be made from a single chemical molecule [4,6,32]. Molecular Q C A offers several advantages over its metal and magnetic counterparts. Firstly, if we consider a molecular Q C A cell as a single-molecule device, then Q C A circuits can achieve device densities on the order of 1 0 1 4 / c m 2 (for 1 n m 2 devices). Current-switched devices such as F E T s operating at G H z speeds would melt the chip at those densities. Molecular Q C A however has been predicted to reduce the power dissipation * by many orders of magnitude [33]. Additionally, the smaller the size, the larger the Coulombic energies of the cell. At the molecular scale, these en-ergies are expected to be in the 0.2-0.5 eV range [2,3,34] which allow for room temperature operation since these energies are much greater than the thermal ambient energy kgT (~25 meV at room temperature), where ks is Boltzmann's constant and T is the temperature in kelvin (T = 293 K at room temperature). Lastly, molecular Q C A can be clocked at extremely high frequencies (adiabatically at 1 THz) [33] - much faster than reported speeds of the magnetic Q C A cell [2]. 2.1.1 Mode l In a molecular implementation, the role of quantum dots is played by redox centers within the molecule. A redox center can add an electron (i.e.. be reduced) or lose an electron [i.e., be oxidized) without breaking chemical bonds [6,35]. In particular, two types of redox centers have been investigated - those whose non-bonding orbitals are comprised of mainly s and p states and those whose states are principally comprised of d states from transition metals [4,6,32]. Si-pthalocynanine is an example of the former [36] while an example of the latter is the Ru-based Creutz-Taube ion [37]. 3 Chapter 2. Theory In the context of this thesis, a simplified model of a molecular QCA cell is investigated in order to reduce the model complexity so that a set of analytical expressions to describe the effect of the clocking electrodes on the ground state of the molecular QCA cell can be developed. A full quantum mechanical model would solve the Schroedinger equation to find tho spatial distribution of charge in the molecular orbitals, including spin. In this thesis, we use a 3-dimensional QCA cell geometry which includes a mechanism for clocking molecular QCA cells proposed in [6,23,24], and has been shown to act as as a QCA device, switching from a chemical rep-resentation of a binary 0 to a binary 1. In this work, the dynamics of these cells are not considered. Instead, only the ground state energies of different cell configurations are determined. In their simplified form, the 3-state QCA cells are composed of "V"-shaped molecules, each with three sites, grouped in pairs. Each pair of molecules represents an individual QCA cell as shown in Figure 2.1. Here, the three basis states of a QCA cell are shown. The sites represent locations in the molecule where the mobile charges can exist and take the role of the quantum dots. Spin and other internal degrees of freedom such as mechanical vibration due to Coulombic forces are not considered in this work. Figure 2.1: 3-state QCA cells are composed of ''V-shaped molecules grouped in pairs [1]. The site indexing used throughout this thesis is in-dicated in the right figure. 1 Chapter 2. Theory For the molecular Q C A cell, three stable electronic configurations are chosen as a basis. Two electronic configurations, in which the mobile charges are located in the top sites of the cell and along one of the two diagonals, represent the A C T I V E states of the cell. In these A C T I V E configurations, the cell is said to have a polarization, P = ± 1 . When P — 1, the cell is said to represent a binary value of 1, and when P = — 1, the cell is said to represent a binary value of 0 as shown in Figure 2.1. A circuit-level diagram of a Q C A cell is shown in Figure 2.2 depicting the different polarizations of the Q C A cell. For simplicity, the bottom two sites are not included. Here, the bounding box around the cell is used only to distinguish one cell from another and has no physical analogue. - electron quantum dot # o O O ® o O i o o p=i p=-i P=0 (Binary 1) (Binary 0) (NULL) Figure 2.2: Three Q C A cells with different polarizations are shown. Each cell carries two extra electrons which tend to occupy the diagonals of the cell when in one of the two A C T I V E states. When a cell is in one of the two A C T I V E states, its electrostatic in-teraction with neighbouring cells introduces a perturbation that breaks the energy degeneracy of the active states of the neighbouring cells and in the ground state, adjacent cells tend to relax to the same A C T I V E state as shown in Figure 2.3. In the N U L L state, where the cell has a polarization, P = 0, the mobile charges are located in the bottom sites of the cell. In this configuration, the cell does not break the energy degeneracy of A C T I V E states in neighbouring cells. Therefore, cells relax to a polarization that is determined only by the interaction with neighbouring cells for which P ^ O . As a result of the interaction between cells, neighbouring cells will syn-chronize their polarization. Therefore, an array of Q C A cells acts as a wire and is able to transmit information from one end to another; i.e., all the cells in the wire will switch their polarizations to follow that of the input or driver cell as shown in Figure 2.4. 5 Chapter 2. Theory Cell-Cell Response Function D r i v e r C e l l P o l a r i z a t i o n Figure 2.3: Illustration of the non-linear cell-to-cell response function [2]. The non-linear response provides noise margin and signal restoration. o® O S o® o ® o @ ® o ©o ® o @o • o Figure 2 . 4 : A QCA wire is created with a linear array of QCA cells. The cells in the wire will synchronize their polarization to follow the input or driver cell. In this way, information arriving at the input appears at the output after some short propagation delay. 2.1.2 Kink Energy The Coulombic interactions between two cells can be described by the kink energy, Ek, which describes the energy difference between two cells having different polarizations [38]. The electrostatic interaction between two 6-dot cells m and n can be calculated using, 47re 0 e, 5 ' 5-E E i=0 j=0 QTQj (2 .1 ) where Q" 1 is the charge at dot i of cell m, r™ is the position of dot i in cell m and e r is the relative permittivity. The kink energy is then determined by calculating the difference in energy between two neighbouring cells having opposite polarization such that, 6 Chapter 2. Theory k opposite polarization same polarization' (2.2) From Equation (2.2). a positive Ek implies that it is energetically favourable for two neighbouring cells to have the same polarization, while a negative Ek suggests that the neighbouring cell will tend to the opposite polarity. The latter result is used to create inversion in Q C A circuits. 2.1.3 Computing with Q C A In order to perform general logic computation, a universally complete com-puting logic set, is required. More specifically, we require a set of Boolean logic gates that can perform the A N D , O R , and N O T operations. The fun-damental logic primitive that can be realized in Q C A is the Majority Gate as shown in Figure 2.5. The truth table for the majority gate is shown in Table 2.1. om • o on • o • o om M (A, B, C) Figure 2.5: Q C A majority gate. The output of the majority gate reflects the majority of the inputs. A B C M ( A , B , C) 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Table 2.1: Truth Table for Majority Gate. 7 Chapter 2. Theory The output cell of the majority gate assumes the value of the majority of the input cells. In Q C A , a 2-input A N D or O R gate can easily be created by simply fixing the polarization of one of the three inputs to a logic "0" or a logic "1", respectively, as shown in Figure 2.6. p=-i AB (a) A N D Gate A A O O o o o o o o O O O O o o o o o o o o A B B o o o o o o o o o o o o o * o # • o p=1 A+B A+B (b) O R Gate Figure 2.6: Fixing one of the inputs of a majority gate to P = - l creates an A N D gate. Similarly, fixing one of the inputs to P = l creates an O R gate. A n inverter can be implemented in Q C A by placing cells at 45° angles from one another. At 4 5 ° , the kink energy between two cells is negative. As a result, it becomes energetically favourable for two cells in this configuration to take on opposing polarities from one another. Figure 2.7 shows one possible inverter layout and is based on this property. © o o © • o o # o ® ® o ® o o@ • o ® o ® o o ® o ® o ® o © © o o @ GO © o lo Figure 2.7: Q C A inverter. Cells placed at 45° with respect to one another have a negative kink energy between them and hence their polarization is opposite. Another fundamental circuit is the F A N O U T . i.e., one input and two or more outputs (see Figure 2.8). The F A N O U T block is also easy to imple-.ment, in fact, it is structurally identical to the majority gate. The only functional difference between the F A N O U T and majority gate 8 Chapter 2. Theory o ® © o om ® o o® ® o o © ® o o ® © o o o • o o ® @ o o ® ® o om • o OUTPUT Figure 2.8: A n example of Q C A fanout. The input appears at each of the three outputs. building blocks is in the flow of data which is determined by the clock and will be discussed in the next section. 2.1.4 Clocking Clocking is not only required for the synchronization of information flow in a Q C A circuit, but it is also relied upon to deliver power to run the circuit [33]. Q C A cells are not powered from any other external source other than the clock, hence the clocking infrastructure is a critical part of the Q C A paradigm. Clocking can be implemented with a set of submerged electrodes which generate an electric field at the level of the Q C A molecules [22]. The application of phase shifted sinusoids to each of the electrodes creates a travelling wave and induces an electric potential at each of the different sites of the cell. As a result of the electric fields, cells are forced to switch states at the wavefront of this forward moving wave as illustrated in Figure 2.9. Here, the signal applied to each of the four electrodes shown in Figure 2.9 is shifted by <fii as indicated on the electrodes, such that 4>\ < <p2 < <P3 < 4>4-A top-view of the time evolution of the Q C A cells shown in Figure 2.9 is shown in Figure 2.10. In other words, when the applied electric field on the cell in the y direc-tion, Ey, is sufficiently large, it will draw the mobile electrons towards the bottom two sites of the cell forcing the cell into the N U L L state. Conversely, if the electric field on the electrodes becomes strongly negative, it will drive the electrons to the upper sites of the cell and force it into one of the A C -T I V E states. If the field is only somewhat positive or negative, the cell will 9 Chapter 2. Theory-Data Flow E J | \ ' " i " " i " 1_± y "Null" "Null" Figure 2.9: Submerged electrodes can be used to clock Q C A cells by gen-erating a forward moving electric field at the level of the cells. A ground plane located above the cells is not shown in the figure. be in a switching state, occupying the upper sites of the cell but still allowed to tunnel through the lower sites and switch its configuration. Which of the cell's upper sites is occupied is not determined by the electric field in the y direction, but instead by the quadrupole-quadrupole interactions between neighbouring cells which determine whether a logic "1" or a logic "0" will be represented in the cell. Note, it is important to recognize that the choice to apply a phase-shifted sinusoidal wave to the electrodes as opposed to a typical square wave is done to ensure that the clock is switched much slower than the tunnelling time between dots, where "tunnelling" is defined as the transitioning through classically-forbidden states. If the cell is switched sufficiently slow, the cell will remain at or close to the ground state at all times, dissipating less energy [22]. 2.1.5 Charges Two fixed positive charges are distributed throughout a cell to ensure that the system is charge neutral. The fraction of neutralizing positive charge located in the top four sites of a cell is determined by the parameter, \ ; whose value lies between 0 and 1, and depends on the details of the molecular implementation. Including both mobile and fixed charges, the total charge at each site of a cell for the three basis states can be expressed in a column vector as Q+ = (2.3) 10 Chapter 2: Theory "r "r @o o@ o® ®o oo oo oo oo ®o o® • o om "1" "1 " o® ®o o® ® o o# • o o® ©o oo oo oo oo ©o o® om "1" oo o® om o® o® oo oo ®o oo ®o • o ® o ®o oo oo o® "1 " o o o o o® o@ O® o® o o o o o o o o ®o o o • o ®o o o o o "1" ®o oo oo o® o® o® o® oo o® oo oo ®o ® o ® o ®o oo "1" @o ®o o® oo oo oo oo o® ®o o® o® o® ®o "1" "1 " ® o • o o@ ®o o® oo oo oo oo o© ®o So o® DATA FLOW Figure 2.10: A top-view of the time evolution of the Q C A cells shown in Figure 2.9. The forward moving wave applied to the electrodes allows for the data to flow in one direction. Q- = x \ ~ e ' x % x \ ~ e ' x f ' ^ ~ x ^ e ' ' ^ ~ x ^ e and Q NULL e e e e X 2 J ^ 2 1 ^2 ' ^2' *"X l ^ X (2.4) (2.5) where e is the electronic charge of an electron. The elements of these charge vectors are Q — [Qsite 0; <5site 1; Qsite 2; Qsite 3; Qsite 4- Qsite b[T : with respect to the indexing shown in Figure 2.1. (2.6) 11 Chapter 2. Theory 2.2 Configuration Energies Intracellular electrostatic energies are calculated using 4 5 j Antra 4 7 r e 0 e n ^ ^ i | r ( z ) - r ( j ) | ' l ' j where n = {+, —,NULL} represents one of the three underlying configura-tions and \r(i) — r(j)\ is the distance between sites i and j . The distance between the upper adjacent sites, i.e., sites 0-3, is d, diagonal site separation is therefore y/2d. The z position of sites 4 and 5 is a distance, a, below the plane of a cell's upper sites. For the purposes of this work, the cell size is'defined as the inter-site distance, d. A figure illustrating the Q C A cell dimensions is shown in Figure 2.11. Figure 2.11: Q C A cell dimensions. The electrostatic potential induced by neighbouring cells is computed using 47re 0en \r(i) - rm{j)\ where V™(i) is the potential at the ith site due to neighbouring cell m in basis state, K , Q™ is the charge vector of cell m. and rm(j) is the position of the j t h site of cell m. Using equation (2.8), an expression for the interaction energies between cells n and m can be described by the following [39,40], 5 TO6NC ?:=O where N c is the effective neighbourhood of cell n and is defined as all cells existing within a single cell radius of cell n. Here, nn and nm represent the basis states for cells n and m, respectively. 12 Chapter 2. Theory 2.3 E l e c t r o d e s As part of this thesis, only two adjacent electrodes are considered and the energetics of a single cell located directly above the mid-point between the electrodes is modelled. This case is considered because the applied potential of the electrodes has the least effect on the middle cell and thus represents the worst-case scenario. As well, the transverse component of the electric field is strongest at the centre of the electrodes and it will be shown in Section 3.2 that this transverse field can lead to unwanted states. The clocking electrodes are modelled as micro-strips whose potential is measured relative to a ground plane located above the layer of cells. The zero potential ground plane is realized in this model using the method of images. Figure 2.12 shows the position of the electrodes and their images, as well as the location of the Q C A cell. Here, we do not include a mirror image of the Q C A cell as its contribution to the ground plane is negligible and adds unnecessary complexity to the analytical expressions developed later in this thesis. Figure.2.12: Section showing location of the two modelled electrodes (1,3), electrode images (2,4), pseudo-ground plane, and the Q C A cell. Let Vavg be the average potential of the electrodes such that Vavg — (Vegi + Veg2)/2, and AVe be the potential difference between adjacent elec-trodes, then the charge on each of the electrodes can be expressed as a 13 Chapter 2. Theory f unc t ion of Vavg and AVe such tha t , Qi = Ceg(Vavg-^) + Cee(-AVe), = -Q2, (2-10) QZ = Ceg(Vavg + ^ ) + Cee(AVe), = -QA, (2.11) where Ceg is the capac i tance between the electrode and the g round p lane and is a p p r o x i m a t e d by [41,42] _ 2.64 x l O - 1 1 ^ + 1.41) e g ln[5.98»7/(0.8u; + *)] ' 1 j and Cee is the capac i tance between ne ighbour ing e lectrodes and is mode l led us ing the s tanda rd resul t for two pa ra l l e l c y l i nd r i ca l conduc to rs as where I, w, a n d t represent the leng th , w i d t h , and th ickness of the e lec t rode, respect ive ly , wh i le s denotes the d is tance between ne ighbour ing e lectrodes and rj the d is tance between the g round p lane and the e lect rodes. Here , we also d i s t i ngu ish between the re la t ive p e r m i t t i v i t y assoc ia ted w i t h the ma te r i a l between electrodes ( e r 2 ) and the one used w i t h i n the ce l l ( e r i ) . 2.4 C l o c k i n g E n e r g i e s For large e lectrode lengths, i.e., I > 100 n m . the po ten t ia l i nduced at the different sites of a cel l can be a p p r o x i m a t e d us ing the s tanda rd resul t [39,40] Vclk(i)= T —^—ln|fi|, (2.14) where N e is the ne ighbou rhood of nearest adjacent e lect rodes. |fv| is the d is tance f rom the loca t ion of the ith s i te to the e lect rode, and pj is the charge dens i ty of the e lect rode, w h i c h is de te rm ined by d i v i d i n g the to ta l charge on the e lect rode by i ts t o ta l leng th , /. T h e to ta l e lec t rosta t ic energy of the cel l conf igura t ion due to the c lock ing electrodes is 5 rjclk = Y,Vdk{i)QS)- (2-15) i=0 14 Chapter 2. Theory The application of this clocking field does not introduce any perturbation between the two A C T I V E states. However, the clock will introduce an energy difference between the N U L L and A C T I V E states, permitting us to use the clock to switch the cell between the A C T I V E and N U L L state. 15 Chapter 3 Functional Analysis of a QCA Cell In this chapter, the effect of applied potential, potential difference between electrodes, and electrode spacing on the different possible configurations of a cell placed directly above the mid-point between two identical electrodes is investigated to determine a set of operational ranges for these parameters. 3.1 A C T I V E t o N U L L Here, the energy of the A C T I V E and N U L L states of the cell is analyzed with respect to the different applied clocking potentials in order to determine if such potentials are sufficient to switch the cell between these two states. The total electrostatic energy for the A C T f V E and N U L L states is given by, TT jjintra . jjclk , rjinter U ACTIVE — U ACTIVE + U ACTIVE + U ACTIVE,K^I TJ jjintra , jjclk . rjinter t n i \ UNULL = U NULL + U NULL + UNULL,Km- (3-1) We are interested in the difference between these two energies; i.e., AUNA — UNULL - UACTIVE = AUpX0 + Atf#V+ At/JET- (3-2) From the above, it follows that while AUNA is' positive, the cell will tend to the A C T I V E state since it represents the lower energy state, and when negative, tend to the N U L L state. Using equations (2.7) and (2.15), and AU^A can be reduced to A T jintra ^ U N A - . M2Tt(.0<.ri 2 (8rf 2 v / 4f.v 2 +(i 2 + V / 4 o 2 + 5 d 2 ) ( - l + 2 y ) " e 8d2TT(.Qiri V4a2+d?y/4n*+5<P '' (3.3) 16 Chapter 3. Functional Analysis of a QCA Cell ATTdk _ „ T / Ce 9(71+72 - 7 3 -74 -2(75 -76)) ^UNA - evavg 4 Z i r c 0 C r 2 ' where each of the 7J terms can be constructed using (3.4) 71 = \n[f32 + \{d-s?] 72 = Hp2 + \(d + s)2) 73 = ln[( /3-2r ? ) 2 + i ( d -74 = ln[(/3-27 ?) 2 + i ( d + 75 = l n [ ( / 3 - a ) 2 + ^] 76 = ln[(-/3 + a + 277)2 + s 2 7' where a is the cell height, /3 is the distance between the cell and the plane of the electrodes, and r\ is the distance between the electrode and ground plane. The AU™Aer term will be expanded in the later sections of this work. 3.2 A C T I V E t o X The assumption that the cell can only exist in one of three underlying basis states requires that Ex, i.e., the field across the cell, be sufficiently low that the two mobile charges not both accumulate at one side of the cell. These higher energy states, sometimes called "X" states, are shown in Figure 3.1. If cells are permitted to go into such states, data will be lost and the circuit will fail to operate properly. The following analysis is performed in order to define a maximum potential difference between adjacent electrodes to ensure that cells not reach these unwanted states. The charge vectors associated with the two unwanted X states are as follows Qxi = e e e e'*2- c'X2' X2' ( 1 X)e, (1 - X)e (3.5) QX2 = e e e e X o ' f c - X i - e, x- - e, (1 - x)e, (1 - X)e (3.6) 17 Chapter 3. Functional Analysis of a QCA Cell P=X1 P=X2 Figure 3.1: When the mobile charges are both located on the same side of the cell, the cell is said to be in one of the unwanted X states. Whether or not the cell tends to one of these two states can be determined by first evaluating the difference in clocking energies for both the A C T I V E and X state, then adding this to the difference in their intracellular energies. The lowest energy difference, and hence the highest probability of accessing one of these X states, can be approximated with a single cell while neglecting the effect of neighbouring cells. To justify the latter claim, consider the 3-cell wire shown in Figures 3.2(a) and 3.2(b). Figure 3.2(a) shows a strong electric field, Ej, acting on the three cells as indicated by the arrows. For the cells 2 and 3 to revert to an X state, both would need to overcome the Coulombic repulsion due to the electrons in their own cells as well as from the neighbouring cell to their left. The lower-left electron in cell 1, however, would need only enough energy to overcome the Coulombic repulsion due to the electron in its own cell, i.e., the effect of electrons in the neighbouring cell can be neglected. Thus, cell 1 in the 3-cell wire would be the first to revert to an X state as shown in Figure 3.2(b). o@ o® o® ® o • o ®o o® o® o o • o @o 1 2 3 (a) B e f o r e r e v e r t i n g t o a n X (b ) A f t e r r e v e r t i n g t o a n X s t a t e s t a t e Figure 3.2: The switching of a cell from an A C T I V E to X state for a 3-cell wire. Given a single cell, the energy difference between X and A C T V E states 18 Chapter 3. Functional Analysis of a QCA Cell is AIT AU' xintra X A rclk X A (3.7) (3.8) where the "±" represents the equal and opposite nature of the AUxA terms with respect to the two X states. 3.3 M a x i m u m P h a s e D i f f e r e n c e For a given configuration of clocking electrodes and cell geometry, the above analysis can be used to determine maximum and minimum values for AVe. This information can further be used to determine the maximum phase difference between neighbouring electrodes which ensures that the transverse electric field intensity does not cause the cell to relax into one of these unwanted states as where VQ is the peak potential of the phase shifted sinusoid applied to the electrodes. It is desirable to achieve large values for 4>max so that the total number of clocking phases required for correct operation of a QCA circuit can be kept as low as possible. Previous work has used 4 phases to clock QCA circuits. (f>max = ± 2 sin ( AVE ) radians, (3.9) 2 V b 19 Chapter 4 Simulations (including results) In this section, three potential scenarios are considered for simulation to estimate operational ranges for the placement, applied potential, and relative phase between adjacent electrodes: 1. A single Q C A cell placed directly at the mid-point between two iden-tical electrodes (see Figure 4.1(a)); 2. A 3-cell wire with the middle cell placed at the mid-point between two identical electrodes (see Figure 4.1(b)); 3. A 3-input majority gate with the middle cell placed at the mid-point between two identical electrodes (see Figure 4.1(c)). (a) Scenario 1 (b) Scenario 2 (c) Scenario 3 Figure 4.1: 3 simulated scenarios. For each simulation, \ = 0-5 unless otherwise specified, and the relative permittivities inside and between cells (e n ) and in between the electrodes and molecules (er2) are chosen to be 1 and 12.9, respectively. The choice for er2 is based on the assumption that the electrodes will be placed under a semiconductive material. Given that the substrate material is not yet known, this value serves only as an approximation and does not necessarily represent the properties of future Q C A implementations. 20 Chapter 4. Simulations (including results) Both the AU™Aa and AU^A terms remain unchanged for all three sce-narios since we are only considering the different possible configurations on the middle cell, which remains in the same location relative to the electrodes. 4.1 S i n g l e C e l l 4.1.1 A C T I V E to NULL In a first set of simulations, a single cell with size d = 1 nm and a cell height of a — 1.2 nm is considered. The electrodes are placed at a distance r)'— 10 nm below the ground plane and the cells placed fi = 2.8 nm above the electrodes. A n electrode length, I = 100 nm, width, w = 1 nm, and thickness, t = 1 nm, were chosen. Here, the potential on the electrodes is kept equal, i.e., AVe — 0. Figure 4.2 plots equation (3.2) and shows the minimum electrode potential required to switch the cell from an A C T I V E to a N U L L state for three values of \ as a function of the electrode spacing, s. From Figure 4.2, to switch a 1 nm cell with a \ value of 0.5 placed between two electrodes spaced 10 nm apart, an average electrode potential of at least 10 V is required. The cell sizing can significantly impact the switching potential of the clocking electrodes. Figure 4.3 shows the change in Vavg as the distance between adjacent electrodes is increased for three different cell sizes. From the figure, the switching potential increases as the cell sizes decrease. This is expected since the clock needs to overcome the increased contribution from intra- and inter-cellular energies due to the increased proximity of the mobile electrons in the cell. 4.1.2 A C T I V E to X For a second set of simulations, the values of d, a, fi and r\ as well as the electrode dimensions were kept the same as they were for the first simu-lation. The potential difference between the electrodes, AVe, was plotted while maintaining Vavg constant. Figure 4.4 shows AVe as a function of the electrode spacing for three different values of X- The two diverging curves for each value of x represent the maximum voltage differences between the electrodes before the X states become energetically favourable. The value of AVe is important because it provides insight on the maximum allowable phase difference between sinusoids applied between two neighbouring elec-trodes. Figure 4.5 shows the change in the maximum value of A V e as a 21 Chapter 4. Simulations (including results) s [nm] Figure 4.2: Switching potential vs electrode spacing of a 1 nm cell for 3 different values of \ . function of the electrode spacing for various cell sizes. The plot shows that the minimum potential difference needed to force a cell into one of the X states increases as the cell size is decreased. This is due to the increased intra-cellular energies of the cell. 4.2 3 - C e l l W i r e Two different wire configurations were set up as shown in Figures 4.6(a) and 4.6(b). Figure 4.6(a) represents the worst-case scenario for turning the middle cell "on" while Figure 4.6(b) represents the worst-case scenario for switching the middle cell "off'. Intuitively, one might expect that the worst-case scenario to switch a cell "on" would feature two cells of opposite polarity along the same wire. However, realistically, two opposite cells would never appear in a wire unless the wire was part of a majority gate which is considered in Section 4.3. For such wire, the potential for the centre cell to go into one of the X states is not considered here again since the worst case scenario for this has already been addressed. 22 Chapter 4. Simulations (including results) Figure 4.3: Switching potential vs the electrode spacing for 0.5 nm, 1 nm, and 2.5 nm cells. Figure 4.6(a) shows a cell in between two active cells, while Figure 4.6(b) shows the same cell in between two cells in the N U L L state. For Fig-ure 4.6(a), the interaction energy can be expressed as, i=0 +YJQNNULLm:-_\(i)' • i=0 5 = E QNULL^WACTIVE^) i=Q 5 + Y,QNULLWZcT]VE(i) (4.1) i=0 23 Chapter 4. Simulations (including results) F i g u r e 4.4: M a x i m u m al lowable AVe before rever t ing to an X state for a 1 n m cell for 3 different values of \ -TTinterwi UACTIVE,K„ ^QNACTIVE(i)KX\(i) i = 0 i=0 5 QACTIVE^WACTIVE^) i = 0 + QACTIVE^)^ACTIVE^)-i=0 However , due to symmet ry , equat ions (4.1) and (4.2) reduce to (4.2) 24 Chapter 4. Simulations (including results) s [nm] Figure 4.5: Maximum potential difference allowable before reverting to an X state for 0.5 nm, 1 nm, and 2.5 nm cells vs. the distance between adjacent clocking electrodes. NULL CELL . ( . ) • o o om • - p c o o oo| oo o o • o | o o o o ooi (a) W i r e C o n f i g u r a t i o n 1 ( b ) W i r e C o n f i g u r a t i o n 2 (c) W i r e C o n f i g u r a t i o n 1 ( d ) W i r e C o n f i g u r a t i o n 2 Figure 4.6: Wires representing the maximum and minimum potentials for switching the middle cell. Molecular representations are shown in (c) and (d). Cell indexing is shown in (a). 25 Chapter 4. Simulations (including results) UlTLl)Km = iJ2'Q™LL(i)V2£.IVE(i), (4.3) i=0 UAncriVE,,m = ^QACTivE{i)V^TivEii)- (4-4) i=0 The difference in state energies becomes *Tjinterwi _ Tjinterw\ _ Tjinterwi / , r \ L^UNA ~ NU LL,Km uACriVE,Km- <• ° ' Similarly, the interaction energies for Wire configuration 2 can be defined as, KtLl2^ = ^QNULLWZUIL^ (4-6) i=0 UAncT^E,Km = 2 t ( ? ™ ( 0 C L ( » ) . (4-7) i=0 for which the energy difference becomes \rrinterm2 Trinterw2 _ jjinterw2 /A O\ NA — NU LL,Km uACTIVE,Km- ^ ° > Figure 4.7 plots equation (3.2) for both wire configurations, as a function of the average potential, Vavg, for cell sizes of 1 nm. A l l cell parameters are the same as for the single-cell simulations. From the plot, a Vavg of at least 21V is required to ensure that the cell can be forced into the N U L L state. Conversely, to guarantee that a cell be turned on, the average electrode potential needs to be brought down below 3V. This represents the minimum range of potential that must be applied to ensure the correct operation of the wire. 4.3 M a j o r i t y G a t e Similar to the analysis of the wire, two different majority gate (MG) con-figurations in Figures 4.8(a) and 4.8(b) have been set up to evaluate the maximum and minimum potential applied to the electrodes to ensure that the middle cell (cell 1) can be switched between the A C T I V E and N U L L states. 26 Chapter 4. Simulations (including results) Figure 4.7: AUNA vs V A V G for two wire configurations using 1 nm cells, which shows that the applied potential range of the electrodes must be at least 18V for correct operation. M G configuration 1 shows a majority gate with two of its inputs in the P = +1 state and the third in the P = — 1 state, while M G configuration 2 shows all three inputs in the N U L L state. For configuration 1, the order of the inputs does not matter, nor does the state of the opposing cell (i.e., a majority gate with two of its inputs in the P = — 1 state and the third in the P = +1 state would yield the same results by symmetry). The output remains in the N U L L state for both configurations since it is assumed the clocking wave has not yet reached cell 5. For M G configuration 1. the interaction energies can be expressed as 27 Chapter 4. Simulations (including results) ( • © v. ' g g l • • o op C5Ol I o o OO o o O O c 5o| oo ^ c c4o •» O (a ) M G C o n f i g u r a t i o n 1 ( b ) M G C o n f i g u r a t i o n 2 (c) M G C o n f i g u r a t i o n 1 ( d ) M G C o n f i g u r a t i o n 2 Figure 4.8: Majority Gates representing the worst-case scenarios for switch-ing the middle cell. Molecular representations are shown in (c) and (d). Cell indexing is shown in (a). UNULL:K.M i=0 5 + £ G W L ( * ) v r - 3 W . 5 5 (4.9) i = 0 inter mgi ACTIVE,K„ 7 = 0 2=0 5 5 i = 0 i = 0 (4.10) 28 Chapter 4. Simulations (including results) However, due to the symmetry of the majority gate, equations (4.9) and (4.10) can be simplified such that 5 5 + Y,QNULL(i)VNULL(i), (4.11) i=0 i=0 i=0 5 i=0 (4.12) The difference in state energies becomes N'UNA NU LL,Km ACT IV E.Km' l ^ . l c S j By making use of the symmetry of the majority gate, the interaction energies for M G configuration 2 can be written as, <VLLL = *Y.QwLL(i)VZULL(i), (4.14) Tintermg2 — ~t i=0 5 " ^ICTTVE^ = 4Y,QACTIVEWnull(I), . (4.15) such that their difference in energy becomes ATTintermg2 TTintermg2 Trintermg2 , c - . ^UNA NU LL.Km ACTIVE.Km' . I4'1 0-* Figure 4.9 plots equation (3.2) for both majority gate configurations, as a function of the average potential, Vavg. for cell sizes of 1 nm. Again, the cell parameters are kept the same as in previous simulations. 29 Chapter 4. Simulations (including results) In Figure 4.9, it can be seen that the difference between the minimum and maximum electrode potentials is larger for the majority gate than the wire. For the same 1 nm cells, the minimum average potential required to force the cell into the N U L L state jumps from 21V in the case of the wire to about 32V for the majority gate, and the maximum allowed average potential to keep a cell in the A C T I V E state lowers to -3V - down 6V from the wire. Thus, the minimum range of electrode potentials is determined by considering the majority gate and not the wire. For design purposes, it is important to be able to determine a priori the minimum required potential difference between the electrodes. Let AUNA for majority gate configurations 1 and 2 be denoted by AUNAmgi a n d &UNAMG2, respectively. To determine the minimum required potential difference between electrodes, we can set both AUwAmgl and AUNAMG2 t ° zero, solve for Vavg for both cases, and then subtract the two potentials. Analytically, this can be accomplished if the A t / / v / i m 9 i a n d AUNAMG2 terms are expressed as AUNAMGL = AU^Zgl + ^UWZgr+^kAmgl, (4.17) = A + cyavgi, (4.18) A U N A M G 2 = AU™AZ92 + *UpZG2+M$AMG2, (4.19) = B + C,Vavga, (4.20) where A and B are equal to the sum of the AUJ^ARA (eqn. (3.3)) and A [ / ^ e r (eqns. (4.13), (4.16)) terms for configurations 1 and 2, respectively. The clocking energy terms (eqn. (3.4)) for both configurations grow linearly with respect to VAVG, and hence can be expressed as C,VAVG. Setting both (4.18) and (4.20) to zero, isolating VAVGI and VAVG2, and subtracting them from one another yields A — B Vavg2 ~~ Vavgi = ^ (4-21) = AVAVG. (4.22) Using equations (4.18), (4.20) and (4.21), AVAVG can be plotted as a func-tion of the electrode spacing for three different values of \ a s shown in Figure 4.f0. From Figure 4.10, for a 1 nm cell, as the distance in between neighbouring electrodes is increased, the minimum range for the average electrode potential increases significantly. The above analysis can also be used to determine what the minimum cell size has to be to in order to satisfy certain layout conditions. For 30 Chapter 4. Simulations (including results) example, if we wanted to use electrodes with peak potentials of ± 5 V spaced 15 nm apart, then equations (4.17) and (4.19) can be used to determine the minimum allowable cell sizes to meet these conditions for different values of X- E.g., for x — 0, a minimum cell size of 2 nm is required, for x = 0-5, a.cell size of 2.6 nm, and for x = 1, the cell can be no smaller than 3.1 nm. Had a cell size of 2 nm been maintained for each value of x-, then an electrode potential of over 9V would have been required to turn off the cell for x — 0.5 and no less than 13V to turn off the cell with x = 1 - much larger than the peak potential of 5V applied to the electrodes. This result suggests that as the value of x is increased, the switching voltage also increases for a given cell size. However, this contradicts an earlier finding in the case of the single cell, where we were able to decrease the switching voltage as we increased the value of x (Figure 4.2). To understand why this occurs, we need to first recognize the dependence of each of the energy terms on x- First, from equation (3.4) the difference in clocking energies of a given cell, AUN[A, is not a function of x- Second, while it is not immediately obvious from equation (3.3), the AU™Aa term decreases as the value of x is increased. Hence, for a single cell, the net effect of these two terms is a decrease in energy with respect to an increase in x, resulting in a smaller switching potential. Conversely, the difference in intercellular energies, AU]^Aer. increases with x-In fact, AU]yAer increases faster with x than AU™Aa decreases, and hence the net effect, once AUjyAr is included, is that the energy increases with increasing x- Therefore, this increase in energy results in a larger switching potential for the middle cell. 31 Chapter 4. Simulations (including results) Figure 4.9: ALOv.4 vs Vavg for two majority gate configurations using 1 nm cells, which shows that the applied potential range of the electrodes must be at least 35V for correct operation. 32 Chapter 4. Simulations (including results) Figure 4.10: Minimum applied potential range of the electrodes for the majority gate vs. the electrode spacing, s, for three different values of x-Cell sizes of 1 nm were used. 33 Chapter 5 1 Temperature Dependency The preceding simulations assumed a temperature of 0 K . However, if we want to consider the functionality of these building blocks at finite tempera-tures, then the thermal energy given by kET must also be considered, where ks represents Boltzmann's constant and T is the absolute temperature. To account for this, a statistical thermodynamic model for a Q C A cell proposed in [34,43,44] is used. Usingthis model, the circuit configuration probabilities can be evaluated. Classically, a Q C A circuit can be in one of many possible configurations, labelled, j , each with its associated total energy Ej. The expressions required to produce Ej have already been developed in previous chapters. Using the information of the possible states of the system, the canonical partition function in [34] ' o can be used to compute the state probability for a particular state, «, at a given temperature as P, = ^ | £ > ; (5.2) 5 . 1 M a j o r i t y G a t e In this work, two majority gate configurations have been considered. These represent the worst-case scenarios for switching the middle cell as shown in Figure 4.8. Recall, that it is the majority gate that determines the oper-ational ranges of the clocking electrodes and not the wire. First, consider the configuration presented in Figure 4.8(a). To calculate Z, all the energies associated with each of the possible configurations of the middle cell need to be summed up. Here, the middle cell can be in any of the five (K = - t - ;—;NULL;Xl ;X2) basis states as described in previous chapters. However, for the configurations presented in this thesis, if we choose the " — " state as the A C T I V E state, then the " 4-" and X states represent energy states that 34 Chapter 5. Temperature Dependency are much greater than the " — " and N U L L states and become negligible in the calculations of the state probabilities. Therefore, Z can be approximated by computing the energies of " — " and N U L L states only such that „ (~EACTIVEmgl\ (-ENULLMGL\ , . Z l "6XP( ksT J + 6 X P ( kBT )> ( 5 ' 3 ) where EACTlVEmgl and E^uLLmgl describe the energies of the middle cell in M G configuration 1 being in the A C T I V E and N U L L state, respectively. These two energies can be expressed as EACTIVEmgl = CAngfWE + C™c%7vE + UACTIVEi (5'4) E N U L L M G L = U^EL + KULT+U^ULL: (5-5) where U™^1^91 and U1AQ^YVE r e P r e s e n t the intercellular energies for M G configuration 1 (equations (4.11) and (4.12), respectively). Here, UAn^IVE, CfHuLL- ^ACTIVE a n d C^IJLL are identical for both configurations of the majority gate. By substituting equation (5.3) into (5.2), the probability that the middle cell will be in either the A C T I V E or N U L L state can be expressed as exp(--EACTIVE^ PACTIVE, = — ^ '-, (5.6) e x p ( " g 7 ^ ) k B l — . (5.7) NULL, Zi Similarly, the state probabilities for the middle cell can be computed for the configuration shown in Figure 4.8(b) by simply modifying equations (5.3), (5.4) and (5.5) such that, '-EACTiVEmn2\ . (-ENULL /-^ACTIVEmg2\ (-^NU LMG2\ ,,0\ 2 2 " 6 X P ( k,T ) + e X P ( kRT )> (5-8) and EACTIVEX = U ^ i V E + U^TfE + U ^ j y , ; , (5.9) ENULLMG2 = U^lL + U ^ 2 s 2 + UfULL, (5.10) Then, the state probabilities for the middle cell of M G configuration 2 be-comes 35 Chapter 5. Temperature Dependency exp( —EACTIVE, ) PACTIVE2 = kBT (5.11) Z2 exp( —ENULL^, ) PNULL2 = kBT (5.12) 2^ These state probabilities can be used to determine, within a certain like-lihood, what R M S voltage is required for correct functionality of a Q C A circuit. Let V\ be the maximum allowable Vavg to keep a cell in the A C -T I V E state and V2 be the minimum allowable Vavg to force a cell into the N U L L state. Then we can define Vrms as y/(yj* + V 2 2 ) /2 . For a given cell size and statistical probability, equations (5.6) and (5.12) can be used to compute the values of V\ and V2, respectively, as well as the maximum op-erational temperature. Figure 5.1 plots both the minimum Vrms required and the maximum operational temperature allowed versus cell size such that the statistical probability of success is 99%. Equation (3.9) was also used to plot the maximum allowable phase difference for each of the different cell sizes in Figure 5.1. While it is understood that using a statistical probabil-ity of 99% represents very high bit error rates, the focus of this analysis is to illustrate the trade-offs that exist between the R M S voltage, operational temperatures and phase difference on the clocking electrodes for Q C A cir-cuits. Future work should consider higher probabilities, as well as methods of error correction in Q C A devices. A l l cell parameters used are consistent with the previous simulations performed in this thesis. Figure 5.1 shows that there exists trade-offs between the R M S voltage, operational temperatures and maximum phase difference of the clocking electrodes. While increasing cell size can significantly reduce the Vrms and number of clocking phases required for correct operation, it will come at the expense of room temperature operation. From Figure 5.1, to operate at room temperature, an R M S voltage of over 20 V is required while at least 100 clocking phases are necessary to ensure a statistical probability for correct operation remain at 99% 36 Chapter 5. Temperature Dependency F i g u r e 5.1: R e q u i r e d Vrms, m a x i m u m opera t iona l t empera ture , a n d m a x -i m u m al lowable phase shift vs. ce l l size to ensure a s t a t i s t i ca l p r o b a b i l i t y of success of 99% for a m a j o r i t y gate. Trade-offs tha t exist between Vrms, the ope ra t iona l t empera ture a n d phase difference can be seen c l ea r ly i n this figure. 37 Chapter 6 Random Phase Shifts on the Clock As mentioned in Section 2.1.4, the clock signals act to pump information throughout the circuit via the successive latching and unlatching of cells con-nected to the different phases of the underlying clocking network. However, random phase shifts in the applied sinusoids can occur due to fabrication imperfections or uneven path lengths in the Q C A circuit, and cause the circuit, to malfunction or experience unexpected delays. The robustness of Q C A circuits against such defects is examined in this chapter. 6.1 Z o n e C l o c k i n g To simplify the simulations, a zone clocking scheme used by current Q C A design tools is employed where all cells are grouped into one of four available clocking zones as depicted in Figure 6.f. Each cell in a particular clocking zone is connected to one of the four available phases in the Q C A clock such that the transitioning from an A C T I V E state to a N U L L state of each cell is synchronized with the changing clock signal. When the clock value is low, the cells in that clocking zone will become latched (i.e., switch to an A C T I V E state) and hold their value until the clock is relaxed (or unlatched), at which point the cell will enter the N U L L state and remain so until the clock returns to its low value once again. A n example of a binary wire using zone clocking is shown in Figure 6.2. Notice that only one clocking zone in Figure 6.2 is latched while the others either remain or move into a relaxed state. As one clocking zone switches from a latched to a relaxed state, the next clocking zone latches and propagates the signal forward. The behaviour of the zone clocking scheme used here emulates the behaviour of the electrode clocking discussed earlier in this work, and hence provides a reasonable simplification for the purposes of this discussion. The size of the clocking zones is proportional to the separation between clocking electrodes. 38 Chapter 6. Random Phase Shifts on the Clock Clock Zone 0 Clock Zone 1 Clock Zone 2 Clock Zone 3 Figure 6.1: Zone Clocking. The four phases of the QCA clock are shown where each clocking zone is separated by a phase of 90°. Data Flow •••••• ^ss&nsns • • • • • • • • SM&ss o« o« •o »o OUT CO C1 C2 C3 CO C1 C2 C3 Figure 6.2: Binary wire using Zone Clocking. The four clocking zones are labelled CO, CI , C2 and C3 and are each represented with a different shade of gray. Here, clocking zone C3 is latching while the other three are relaxed. 6.2 M e t h o d o f S i m u l a t i o n Simulations on several QCA building blocks, shown in Figures 6.3-6.5, were conducted to study the impact of random phase shifts on the different clock-ing zones of the QCA clocking network. The steps for these simulations are described below: 1. For each ofthe simulated layouts in Figures 6.3-6.5, simulation results are generated without introducing any phase shifts to the four avail-able clocking zones. These results were used as a reference for future simulations. 2. A set of 500 batch simulations is executed using a random variable, X, to represent the possible phase shift values as a fraction of n/2. m Chapter 6. Random Phase Shifts on the Clock The random variable X is characterized by a Gaussian probability distribution function with mean value / i = i | and standard deviation a, where i is the clocking zone number and 0 < i < 3 . 3. The percentage of successful circuits is recorded, where a successful circuit is any whose outputs matched those from Step 1. 4. Steps 2 and 3 are repeated for increasing values of a. Here, the interval a € {0,7r/4} was chosen with increments of 7r/40. a values larger than 7r/4 would create phase shifts that are quite unlikely in reality and hence, are not considered in this study. IN (a ) S t r a i g h t W i r e (b ) L - S h a p e d W i r e Figure 6.3: Simulated Q C A Building blocks: (a) Straight Wire (b) L-Shaped Wire. 6.3 S i m u l a t i o n P a r a m e t e r s Simulations were conducted using both the bistable (time independent) and coherence vector (time dependent) simulation engines available in Q C A D e -signer [16.18]. Cell sizes of 2 nm were used throughout with er selected to be 1. A full summary of parameters used can be seen in Table 6.1. The Clock High and Low energy values for both engines were determined by running 500 batch simulations on each circuit for the worst-case scenario (cr = 7r/4), and then plotting the number of successes versus the different Clock High and Low values as shown in Figures 6.6 and 6.8. The average number of successes for each Clock High and Low value over the number of devices was calculated (Figures 6.7 and 6.9) and then used to determine 40 Chapter 6. Random Phase Shifts on the Clock Bis tab le C o h e r e n c e E n g i n e V e c t o r Temperature N / A 0 K Relaxation Time N / A 1.11 e-16 s Time Step N / A l . l le-18 s Duration N / A 1.11 e-12 s Clock High 7.473e-20 J 7.473e-20 J Clock Low 1.179e-20 J 1.179e-20 J Clock Shift 0 J 0 J Clock Amplitude Factor 2 2 Radius of Effect 200 nm 200 nm Relative Permittivity 1.0 1.0 Layer Separation 1.15 nm 1.15 nm Algorithm N / A Euler Randomize Cells Yes Yes Animate Simulation No No Number of Samples 12800 N / A Convergence Tolerance 0.001 N / A max Iterations per sample 100 N / A Table 6.1: Simulation Parameters 41 Chapter 6. Random Phase Shifts on the Clock A (a) Inverter (b) Majority Gate Figure 6.4: Simulated QCA Building blocks: (a) Inverter (b) Majority Gate. (a) Fanout with 2 (b) Fanout with 3 Outputs Outputs Figure 6.5: Simulated QCA Building blocks: (a) Fanout 2 (b) Fanout 3. the optimal values for both simulation engines. The relaxation time, time step, and simulation time for the coherence vector simulation engine were selected to ensure that the solver converged, while the radius of effect was chosen large enough to encapsulate the entire circuit. A l l other parameters were kept at their default values. From Figures 6.6-6.9, it can be seen that the simulated QCA building blocks behave similarly under both the bistable and coherence vector simu-lation engines with respect to the various Clock High and Low values with the exception that the bistable simulation engine produces higher success 42 Chapter 6. Random Phase Shifts on the Clock Clock High [J] (a) Number of Successes vs Clock High 10s [ x £ t ] Clock Low [J] (b) Number of Successes vs Clock Low Figure 6.6: Number of successes of each considered QCA building block vs. the Clock High and Low values using the Bistable simulation engine. rates. Figures 6.6(a) and 6.8(a) show that the optimal Clock High value lies at around 1.585£); J for both simulation engines since the largest number of 43 Chapter 6. Random Phase Shifts on the Clock (a) A v e r a g e N u m b e r o f S u c c e s s e s v s C l o c k H i g h (b ) A v e r a g e N u m b e r o f S u c c e s s e s v s C l o c k L o w Figure 6.7: Average Number of successes for the considered QCA building block vs. the Clock High and Low values using the Bistable simulation engine. A Clock High value of 1.585£fc is desired while any value smaller than 0.25.Efc provides an optimal value for the Clock Low. successes occur at this Clock High value. Values smaller than 1.585£fc J may not allow a cell to fully unlatch - allowing it to perturb neighbouring cells in spite of its "relaxed" state. Ideally, large Clock High values are desired be-cause as the Clock High value approaches infinity, the cells in that clocking zone will have P = 0. However, once random phase shifts are introduced into the clock, a clocking zone may enter a relaxed state before the next one has the opportunity to fully latch - creating a gap in the flow of information. In such cases, it is helpful to keep a Clock High value slightly lower such that it retains some residual polarization that can be used to perturb its neighbouring cells. Figures 6.6(b) and 6.8(b) show that for a QCA circuit to begin function-ing correctly, the Clock Low value must be smaller than 0.25£'t J . Larger values will not allow the cells to fully latch and hence the circuit will be unable to properly propagate the signal forward. 11 Chapter 6. Random Phase Shifts on the Clock 0* |x-fc't Clock High [J] (a) Number of Successes vs Clock High 10° [ x R ] Clock Low [J] (b) Number of Successes vs Clock Low Figure 6.8: Number of successes of each considered QCA building block vs the Clock High and Low values using the Coherence Vector simulation engine. 45 Chapter 6. Random Phase Shifts on the Clock Clock High [J] Clock Low [J] (a ) A v e r a g e N u m b e r o f S u c c e s s e s v s C l o c k H i g h (b ) A v e r a g e N u m b e r o f S u c c e s s e s v s C l o c k L o w Figure 6.9: Average Number of successes for the considered Q C A build-ing block vs. the Clock High and Low values using the Coherence Vector simulation engine. A Clock High value of 1.585Ek is desired while 0.25Ek provides a good value for the Clock Low. 6.4 F a u l t A n a l y s i s Faults due to random phase shifts in the clock can manifest themselves in one of two ways. They can result in either an unwanted delay or inversion at the primary outputs. The delays occur because the clocking zone to which the output is connected latches out of sequence, propagating the information either sooner or later than is expected. These delays can often be masked at the output if an unwanted inversion were to occur at the same time and cause us to incorrectly identify a faulty circuit as functional. Thus, it becomes critical that the input pattern be selected appropriately such that no such "false positives" occur. Here, the test sequence {0, 0, 1, 1, 0, 1, 0, 1} is selected for all Q C A building blocks featuring a single input, and {000, 100, 110, 010, 011, 001, 101, 111} for the majority gate. These test sequences ensure that there exists no input dependency on the functionality of the primary outputs. The unwanted inversions are slightly less intuitive. Consider the fanout circuit shown in Figure 6.10(a). In this figure, the signal has already prop-agated to the cells in clocking zone C I . Here, we expect C2 to move into 46 Chapter 6. Random Phase Shifts on the Clock a latching state and propagate the signal forward. However, if phase shifts in clocking zones C2 and C3 are significant enough, then it is possible that the cells in C3 will latch before those in C2. If this occurs, then the cells in 03 will take on the opposite polarity of those in C l due to the 4 5 ° angle that exists between their cells as shown by the N O T gates in Figure 6.10(b). Output F2 is not affected by this phase shift since it is lined up directly with the input. The same analysis can be applied to the Fanout2 building block as well. If the Clock High value is selected appropriately ( « 1.585.Efc), then there will exist some residual polarization in the cells in C2 which may be sufficient enough to perturb the cells in clocking zone C3 and overcome the inversion. However for this to occur in either of the Fanout building blocks, the resid-ual polarization left in the cells in C2 would have to be large enough to overcome the positive feedback that occurs between the outputs as shown in Figure 6.10(c). Here, after output Fanout3(F2) is latched, it interacts with both Fanout3(Fl) and Fanout3(F3) and helps them remain in their current state and vice-versa. Similarly, outputs Fanout3(Ff) and Fanout3(F3) will interact with one another helping each other to maintain their current states. Such is not the case, however, for the L-shaped wire. The LWire building block does not have any other outputs with which to interact and therefore, may be able to recover its correct output without any corruption, providing that there exists enough residual polarization in the cells in clocking zone C2. The majority gate behaves similarly to the Fanout3 building block. Con-sider the majority gate shown in Figure 6.11(a). Here, the signal has prop-agated to the cells in clocking zone CO. Assume that the variations in the clock phase have caused C2 to latch before C l . As a result, inputs A and C will have an inverting effect on the output due to the 45° angle that sep-arates them, while input B will attempt to directly influence the output. Figures 6.11(b) and 6.11(c) outline the two possible scenarios that need to be considered under these circumstances. The first is if inputs A and C are logically opposite. If such is the case then the output will simply be equal to input B and the inverting error that occurs due to inputs A and C goes un-noticed as shown in Figure 6.11(b). The second scenario occurs when both inputs A and C are logically equivalent. Under these circumstances, the inverting presence of these two inputs cannot be overcome and the output will bear the incorrect result as shown in Figure 6.11(c). Another example of unwanted inversion can occur in the case of the inverter. Consider Figure 6.12(a). Here, the cells in clocking zone CO are holding the signal to be propagated through the inverter. If the phase shifts 47 Chapter 6. Random Phase Shifts on the Clock are such that the final clocking zone latches before C I and C2, then the signal will propagate directly from the cells in CO right to the output without undergoing any inversion as shown in Figure 6.12(b). Essentially, under this scenario, the inverter acts like a wire. It is important to note that these circuits are simulated in a noise-less environment, i.e., nothing in the circuit environment has the ability to in-fluence a given cell other than its neighbours. A l l simulations are run at a. temperature of 0 K in order to remove the influence of thermal noise. 6.5 S i m u l a t i o n R e s u l t s Figures 6.13 and 6.14 plot the simulation results for each of the layouts using the bistable engine and the coherence vector, respectively. In spite of the phase variations, the layouts remain robust even at high process variances in the clock for both simulation engines. For the bistable simulation engine. Figure 6.13 shows that circuits experiencing phase shifts in their clocking distribution network with standard deviations of up to 15% of IT/2 can still operate at a 95% success rate. Similarly, from Figure 6.14, Q C A circuits using the coherence vector simulation engine can operate at a 90% success rate while withstanding phase shifts with standard deviations of 10% of 7r/2 in its clocking distribution network. The non-monotonic behaviour of the results shown in Figures 6.13 and 6.14 are likely a result of not simulating a large enough sample size. Future work should look to expand the number of batch simulations performed. From Figures 6.13 and 6.14, the outputs of the considered Q C A building blocks segregate themselves into one of three groups. The first group of outputs are those that resemble a straight wire, i.e.. represent a straight path from the input to its output. The Wire, Fanout2(Fl) and Fanout3(F2) all fall into this group of outputs. This group sees the highest success rate of any other group because the variations in clock phase can only cause delay at these outputs as mentioned in Section 6.4, and are not affected by any-unwanted inversion. The second group of outputs are those belonging to either Fanout2 or Fanout3 that do not see a straight path from the input to its output, i.e, there exists a 90° bend ("kink") between the input and output. It is clear from Figures 6.13 and 6.14 that the outputs that belong to this group -Fanout2(F2). Fanout3(Fl) and Fanout3(F2) - produce the worst success rate of any group due to the potential of unwanted inversion at the outputs as discussed in the previous section. 48 J Chapter 6. Random Phase Shifts on the Clock The third group consists of the LWire, M G , and Inverter building blocks. For reasons described in Section 6.4, these building blocks have success rates that lie in between the other two mentioned groups. 49 Chapter 6. Random Phase Shifts on the Clock (c) Fanout 3 exhibiting positive feedback between outputs Figure 6.10: Inversion error in the Fanout3 circuit. If clocking zone C3 latches before C2. then two ofthe outputs will experience unwanted inversion ( F l , F3). The different clocking zones are labelled in the top-left hand corner for reference. 50 Chapter 6. Random Phase Shifts on the Clock R E L A X E D C (a) Majority Gate before inversion error B (b) Majority Gate recovering from inversion error (c) Majority Gate failing due to inversion error F i g u r e 6.11: Invers ion error i n the ma jo r i t y gate c i r cu i t . I f c l o c k i n g zone C3 latches before C2. then the ou tpu t m a y see the log ica l inverse of wha t i t is supposed to. T h e different c l o c k i n g zones are labe l led i n the top-left hand corner for reference. 51 Chapter 6. Random Phase Shifts on the Clock (a) F a n o u t 3 b e f o r e i n v e r s i o n e r r o r ( b ) F a n o u t 3 a f t e r i n v e r s i o n e r r o r Figure 6.12: Inversion error in the inverter circuit. If clocking zone C3 latches before C l and C2, then the output will simply take on the value of the input, effectively replicating the behaviour of a straight wire. The different clocking zones are labelled in the top-left hand corner for reference. 52 Chapter 6. Random Phase Shifts on the Clock Standard Deviation of Phase Shift (percentage of 7i72) Figure 6.13: Success Rate vs Standard Deviation of the phase shift for the Bistable Simulation Engine. 53 Chapter 6. Random Phase Shifts on the Clock Standard Deviation of Phase Shift (percentage of TT/2) Figure 6.14: Success Rate vs Standard Deviation of the phase shift for the Coherence Vector Simulation Engine. 54 Chapter 7 Conclusions Analytical expressions were derived for the energies associated with the A C -T I V E , N U L L and X states of a Q C A cell. Furthermore, limitations were established on the applied potential and phase of the clocking electrodes to ensure proper functionality of fundamental building blocks in a Q C A circuit. It is understood that arbitrary molecular geometries and neutral-izing charge distributions cannot be realized using real systems. This work provides a good comparison between molecular systems that can be gener-alized to this modelled geometry. The limits presented in this thesis will serve to aid in the selection of molecular structures. In addition, the selec-tion of appropriate molecular structures and design of clocking electrodes will reduce the power consumption of the underlying clocking distribution network. It was also shown that there exists a relationship between the required switching potential and cell size. As the cell size is decreased, the minimum potential required to switch a cell from an A C T I V E to a N U L L state is increased. These results express the trade-offs between switching voltage, operating temperature and maximum phase shift on the clocking electrodes. The switching voltage and number of clocking phases increase significantly as cell sizes are decreased in an attempt to increase the operat-ing temperature of these devices. Such high switching voltages will result in significant power dissipation in the clocking network. It is concluded that irrespective of the fact that individual devices can operate with little power consumption, the clocking infrastructure required to support computation will most likely consume most of the power. Lastly, the effect of random phase shifts on the underlying clocking net-work was investigated. Simulations were run on a set of universal Q C A building blocks, i.e., they can be used to implement arbitrary Q C A circuits, and were repeated using both the bistable and coherence vector simulation engines in QCADesigner. A l l devices were fairly robust against variations in the clock signal phases, with success rates of over 90% for phase shifts with standard deviations of up to 10% of TT/2. We found that the success rate of a given output is highly layout-dependant. Outputs resembling a straight wire displayed more robustness to the phase variations than did 55 Chapter 7. Conclusions those featuring kinks in their wire. As a result, Q C A building blocks can be segregated into distinct classes depending on the number of kinks and outputs that they contain making it easier to pre-determine sensitive areas in a circuit due to phase variations in the clock. These results should help in developing fabrication specifications for Q C A clocking networks. Future work in this area should extend this work to consider the depen-dency of switching potential, operational temperature, and phase difference of the clocking electrodes on other circuit parameters such as the distance between the ground plane and electrodes, rj, the cell elevation, /3, and the relative permittivity between the electrodes and molecules, er2. A higher statistical probability to measure the success rate of Q C A circuits should also be considered along with possible methods of error correction. Lastly, the phase shift analysis should be extended to include the large number of phases found to be necessary in this work. 56 B ibliogr aphy [1] C . S. Lent and Beth Isaksen. Clocked Molecular Quantum-Dot Cellular Automata. IEEE Trans, on Electron Dev., 50:1890-1896, 2003. [2] K . Walus. Design and Simulation of Quantum-Dot Cellular Automata Devices and Circuits. P h D thesis, University of Alberta, September 2005. [3] C . S. Lent. Quantum cellular automata. Nanotechnology, 4:49-57, 1993. [4] Y . L u and C . S. Lent. Theoretical Study of Molecular Quantum-dot Cellular Automata. J. Corn-put. Elec., 4:115-118, 2005. [5] C . S. Lent, B . Isaksen, and M . Lieberman. Molecular quantum-dot cellular automata. J. Am. Chem. Soc, 125:1056-1063, 2003. [6] C . S. Lent and B. Isaksen. Clocked molecular quantum-dot cellular automata. IEEE Trans. Electron Devices, 50(9): 1890-1896, 2003. [7] M . Macucci, M . Gattobigio, L . Bonci, G . Iannaccone, F . E . Prins, C . Single, G . Wetekam, and D . P. Kern. A qca cell in silicon-on-insulator technology: theory and experiment. Superlattices Mi-cro struct., 34(3):205-211, September 2004. [8] A . O. Orlov, R. K . Kummamuru, R. Ramasubramaniam, C . S. Lent, G . H . Berstein, and G . L . Snider. Clocked quantum-dot cellular au-tomata shift register. Surf. Sci., 532-535:1193-1198, 2003. [9] I. Amlani, A . O. Orlov, G . Toth, G . H . Bernstein, C . S. Lent, and G . L . Snider. Digital logic gate using quantum-dot cellular automata. Science, 284:289-291, Apri l 1999. [10] I. Amlani, A . Orlov. G . L . Snider, and O S . Lent. Demonstration of a functional quantum-dot cellular automata cell. J. Vac. Sci. Technol. B, 16:3795-3799, 1998, 57 Bibliography [11] Imre, A. and Csaba, G. and Ji, L . and Orlov, A . and Bernstein, G. H. and Porod, W. Majority Logic Gate for Magnetic Quantum-Dot Cellular Automata. Science, 311 (5758):205-208, 2006. [12] C. Gyorgy et al. Nanocomputing by field-coupled nanomagnets. IEEE Trans. Nano., 1(4):209-213, 2002. [13] C. Gyorgy and W. Porod. Simulation of field coupled computing ar-chitectures based on magnetic dot arrays. J. Comp. Elec., 1(1):87-91, 2002. [14] M . C. B. Parish. Modeling of Physical Constraints on Bistable Magnetic Quantum Cellular Automata. PhD thesis, University of London, 2003. [15] K. Walus and G. A . Jullien. Design tools for an emerging soc tech-nology: quantum-dot cellular automata. Proc. IEEE, 94(6)-.1225-1244, June 2006. [16] K . Walus, T. Dysart, G. A. Jullien, and R. A. Budiman. QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata. IEEE Trans. Nano., 3(1):26-31, March 2004. [17] K. Walus, R. A. Budiman, and G. A . Jullien. Split current quantum dot cellular automata - modeling and simulation. IEEE Trans. Nano., 3(2):249-255, June 2004. [18] K. Walus and G. Schulhof. QCADesigner Homepage. [Online] http://www. qcadesigner. ca/, 2001. [19] K. Walus, M . Mazur, G. Schulhof, and G. A. Jullien. Simple 4-bit processor based on quantum-dot cellular automata (QCA). In Proc. of Application Specific Architectures, and Processors Conference, pages 288-293, July 2005. [20] K . Walus, G. Schulhof, R. Zhang, W. Wang, and G. A . Jullien. Cir-cuit design based on majority gates for applications with quantum-dot cellular automata. In Proc. of IEEE Asilomar Conference on Signals, Systems, and Computers, November 2004. [21] K . Walus, G. Schulhof, and G. A. Jullien. High level exploration of quantum-dot cellular automata (QCA). In Proc. of IEEE Asilomar Conference on Signals, Systems, and Computers, November 2004. 58 Bibliography [22] K . Hennessy and C . S. Lent. Clocking of molecular quantum-dot cellular automata. J. Vac. Sci. Technol. B, 19(5):1752-1755, 2001. [23] E . P. Blair and C . S. Lent. A n architecture for molecular comput-ing using quantum-dot cellular automata. In Proc. of the Third IEEE Conference on Nanotechnology, pages 402-405, 2003. [24] E . P. Blair. Tools for the design and simulation of clocked molecular quantum-dot cellular automata circuits. Master's thesis, University of Notre Dame, Notre Dame, IN 46556, 2003. [25] K . Walus F . Karim and A . Ivanov. Clocking electrode design for molec-ular quantum-dot cellular automata based circuits. Submitted to IEEE lYans. Nanotechnology, 2007. [26] C S . Lent, G . L . Snider, G . H . Bernstein, W . Porod, A . Orlov, M . Lieber-man, T . Fehlner, M . T . Niemier, and P. Kogge. Quantum-Dot Cellular Automata. Kluwer Academic Publishers, Boca Raton, F L , U S A , 2003. [27] G . L . Snider, I. Amlani, A . Orlov, G . Toth, G . Bernstein, C S . Lent, J . L . Merz, and W . Porod. Quantum-dot cellular automata: Line and majority gate logic. Jpn. J. of Applied Physics, 38:7227-7229, 1999. [28] R . V . Kummamuru, J . Timler, G . Toth, C . S. Lent, R. Ramasubrama-niam, A . Orlov, and G . H . Bernstein. Power gain and dissipation in a quantum-dot cellular automata latch. Appl. Phys. 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Clocking electrode design and phase analysis for molecular quantum-dot cellular automata based circuits Karim, Faizal 2007
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Title | Clocking electrode design and phase analysis for molecular quantum-dot cellular automata based circuits |
Creator |
Karim, Faizal |
Publisher | University of British Columbia |
Date Issued | 2007 |
Description | Molecular quantum-dot cellular automaton (QCA) offers an alternative paradigm for computing at the nano-scale. Such Q C A circuits require an external clock, which can be generated using a network of submerged electrodes, to synchronize information flow, and provide the required power to drive the computation. In this thesis, the effect of electrode separation and applied potential on the likelihood of different Q C A cell states of molecular cells located above and in between two adjacent electrodes is analysed. Using this analysis, estimates of operational ranges are developed for the placement, applied potential, and relative phase between adjacent clocking electrodes to ensure that only those states that are used in the computation, are energetically favourable. Conclusions on the trade-off between cell size and applied clocking potential are drawn and the temperature dependency on the operation of fundamental Q C A building blocks is considered. Lastly, the impact of random phase shifts on the underlying clocking network is investigated and a set of universal Q C A building blocks is classified into distinct groups based on their sensitivity to these random phase shifts. |
Genre |
Thesis/Dissertation |
Type |
Text |
Language | eng |
Date Available | 2011-02-18 |
Provider | Vancouver : University of British Columbia Library |
Rights | For non-commercial purposes only, such as research, private study and education. Additional conditions apply, see Terms of Use https://open.library.ubc.ca/terms_of_use. |
DOI | 10.14288/1.0100780 |
URI | http://hdl.handle.net/2429/31504 |
Degree |
Master of Applied Science - MASc |
Program |
Electrical and Computer Engineering |
Affiliation |
Applied Science, Faculty of Electrical and Computer Engineering, Department of |
Degree Grantor | University of British Columbia |
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UBCV |
Scholarly Level | Graduate |
AggregatedSourceRepository | DSpace |
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<div id="ubcOpenCollectionsWidgetDisplay">
<script id="ubcOpenCollectionsWidget"
src="{[{embed.src}]}"
data-item="{[{embed.item}]}"
data-collection="{[{embed.collection}]}"
data-metadata="{[{embed.showMetadata}]}"
data-width="{[{embed.width}]}"
data-media="{[{embed.selectedMedia}]}"
async >
</script>
</div>
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