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A GaAs cermet gate charge-coupled device 1989

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A G a A s C E R M E T G A T E C H A R G E - C O U P L E D D E V I C E By M A U R I C E L e N O B L E B .A.Sc , University of British Columbia, 1984 A THESIS S U B M I T T E D IN PARTIAL F U L F I L L M E N T O F T H E R E Q U I R E M E N T S F O R T H E D E G R E E O F D O C T O R O F PHILOSOPHY in T H E F A C U L T Y O F G R A D U A T E STUDIES Department of Electrical Engineering We accept this thesis as conforming to the required standard T H E U N I V E R S I T Y O F B R I T I S H C O L U M B I A April 1989 © Maurice LeNoble, 1989 In p resen t i ng this thesis in part ial fu l f i lment o f the requ i remen ts for an a d v a n c e d d e g r e e at the Un ivers i ty o f Br i t ish C o l u m b i a , I agree that t he Library shal l m a k e it f reely avai lable for re fe rence and s tudy . I fur ther agree that pe rm iss ion for ex tens i ve c o p y i n g o f th is thesis for scho la r l y p u r p o s e s may be g ran ted by the h e a d o f m y d e p a r t m e n t o r by his o r her represen ta t i ves . It is u n d e r s t o o d that c o p y i n g o r pub l i ca t i on o f this thesis fo r f inanc ia l ga in shal l no t b e a l l o w e d w i t h o u t m y wr i t t en p e r m i s s i o n . D e p a r t m e n t o f £leC • £rt(jr. T h e Un ivers i t y o f Bri t ish C o l u m b i a 1956 M a i n M a l l V a n c o u v e r , C a n a d a V 6 T 1Y3 Da te / CLju /m DE-6(3 /81 ) Abstract The design, implementat ion and evaluation of a 64-pixel, 4-phase G a A s cermet gate charge-coupled device ( C M C C D ) are described. It is demonstrated that the sig- nal charge confinement and the signal charge capacity of the C M C C D are maximized when t h i n , highly doped active layers are used for implementing the device. The cer- m e t / G a A s junct ion w i t h i n an interelectrode gap of the C M C C D forms a barrier similar to a m e t a l / G a A s Schottky barrier, as revealed by an investigation of the dc current- voltage characteristic of a c e r m e t / G a A s Schottky barrier diode. A transmission line model is described for the c e r m e t / G a A s junct ion w i t h i n an interelectrode gap of the C M C C D and is used to demonstrate the relationship of the surface potential variation along the gap as a funct ion of the clock frequency and the mater ia l parameters. It is shown that the surface potential variat ion is monotonic for a l l frequencies, which is desirable for m i n i m i z i n g the formation of energy troughs w i t h i n the active layer. E n - ergy troughs trap and release charge f rom passing charge packets, causing unwanted signal dispersion. A two-dimensional computer model is used to determine a theoretical m a x i m u m frequency of operation of the C M C C D . It is shown that a short transport electrode length for a fixed transport electrode pitch is preferable as it results i n the m a x i m u m high frequency performance of the C M C C D for the lowest clock power. A computer s imulat ion of a single electrode transfer of a charge packet is demonstrated using the two-dimensional computer model . The computer s imulat ion indicates that efficient charge transfer takes place, suggesting that the C M C C D w i l l have good perfor- mance. A G a A s C M C C D w i t h an on-chip G a A s M E S F E T source follower amplifier has been produced using a six mask level fabrication procedure. The C M C C D and the out- put source follower amplifier are demonstrated to operate at 100 M H z . Charge transfer efficiencies of 1.00 and 0.998 for 100 M H z operation are obtained for the C M C C D using the impulse response method and the insertion loss method. i i Table of Contents Abstract ii List of Symbols v List of Tables x List of Figures xi Acknowledgements xiv 1 Introduction 1 2 T h e o r y 6 2.1 Pr inc ip le of Operat ion 6 2.2 One-dimensional Potent ia l Distr ibut ions 12 2.3 Ac t ive Layer Specification 17 3 T h e C e r m e t / G a A s Junction 20 3.1 Barr ier Properties 20 3.2 Surface Potentials 25 3.3 Verif icat ion 32 4 Two-dimensional G a A s C M C C D M o d e l 38 4.1 Geometric Representation 38 4.2 Device Equations 38 4.3 F i n i t e Difference G r i d and the Computa t iona l K e r n e l 40 4.4 F in i te Difference Equations for u(x,y) 41 4.5 Boundary Condit ions for u(x, y) 44 4.6 F i n i t e Difference Equat ion for J(x, y) 45 4.7 Discret izat ion of the Cont inui ty Equat ion 46 4.8 B o u n d a r y Condit ions for n(x, y) 48 in 4.9 Numer ica l Solution of the Difference Equations 49 4.10 Computer Simulations . . . . • 52 5 Device Fabrication 59 6 Testing and Evaluation 66 7 Comments 73 7.1 Summary 73 7.2 Considerations for Future Work . 76 Bibliography 78 Appendices A B N L Experiment 787 83 B Polar Transformation of V(y) 89 C Newton's M e t h o d 91 D Detailed Device Fabrication Procedure 92 E Test Circuit for V H F Operation 97 iv List of Symbols a(y,u) real part of (Lg — y)j(oj) A,...,G constants Ads logarithmic amplitude AQ amplitude constant A* modified Richardson's constant b(y,u>) imaginary part of (Lg - y ) 7 ( w ) c(u>) real part of Lgj(u>) Ci integration constant CM m a x i m u m potential contour COM distr ibuted cermet f i l m capacitance CD distributed depletion layer capacitance C'o/p parasitic output capacitance CCM lumped cermet film capacitance CD lumped depletion layer capacitance d(u) imaginary part of L 57(cu) df differential contour vector E normalized electric field EQ cr i t ical electric field Ei intrinsic energy EQ empirical constant fc clock frequency f l + l finite difference equation fmax m a x i m u m clock frequency g, h functions comprising the finite difference equation H(y,u) normalized surface potential amplitude v i,j x,y g r id point indices iaux,jaux x,y auxi l iary gr id point indices i i n t active layer depth gr id point index imax wafer thickness gr id point index I(y) dc tangential current IQ saturation current jmax pixel length gr id point index J electron current density Jo saturation electron current density k time-step index kmax stop time index k\, &2 integration constants / i teration index Lg interelectrode gap length Lp transport electrode p i tch m integer index rii intrinsic carrier density Npeak number of pixel transfers between the peak of the observed impulse response and the peak of the ideal impulse response Nc effective density of states i n the conduction band Nr> uni form donor density NT number of single electrode transfers fi normalized electron density ngap normalized c e r m e t / G a A s junct ion electron density no normalized m e t a l / G a A s junct ion electron density ND normalized uni form donor density vi p number of pixels q electron charge Qintj interface charge density Qs signal charge density Qs,max m a x i m u m signal charge density Qph.i+Ph.2 phase 1 and phase 2 signal charge density Qph.2+Pk.3 phase 2 and phase 3 signal charge density r geometric series constant RCM distr ibuted cermet f i lm resistance R L load resistance Rs series resistance RCM lumped cermet f i lm resistance S derivative of the tangential current I(y) t t ime tdei delay t ime ttr clock transit ion period T temperature u normalized potential Ugap normalized c e r m e t / G a A s junct ion potential Uo normalized m e t a l / G a A s junct ion potential UT thermal voltage v normalized electron quasi-Fermi potential V(y) dc surface potential V(y,u) ac surface potential Vg applied gate voltage Vgap potential difference across the gap V i n , I i n diode terminal voltage and current vii Vp pinch-off voltage Vo incident voltage w cermet gate w i d t h wn space charge region depth wr relaxation parameter x,y spatial coordinates X{,yj spatial posit ion at the i , j t h gr id point Xint active layer depth coordinate of the m a x i m u m potential xmax wafer thickness x,y x, y unit vectors x , y rr-component or y-component Umax pixel length VmLtV-mR transport electrode endpoints Y distributed shunt admittance z complex variable Z distributed series impedance 8 diode ideality factor Sjgap relative posit ion along the gap Suimax normalized potential difference between the Fermi level and the intrinsic energy level at St t ime increment Sx gr id spacing i n the x-direct ion Sx a uni form active layer subdomain gr id spacing Sx{,Sy gr id spacings at the i , j t h gr id point fitpmax charge confinement ^Ci+i correction factor v i i i dielectric constant of G a A s charge transfer efficiency propagation constant electron drift mobil i ty low-field electron drift mobi l i ty electron drift velocity radian frequency electrostatic potential m a x i m u m potential m i n i m u m value of the m a x i m u m potential c e r m e t / G a A s Schottky barrier height m e t a l / G a A s Schottky barrier height m e t a l / G a A s junct ion potential electron quasi-Fermi potential length constant electron transit t ime surface potential phase shift electron drift velocity function fractional constant binary variable finite difference variable ordinary iterated solution for Cij./t+i relaxed solution for Ci,j,k+i ix List of Tables I A summary of the c e r m e t / G a A s Schottky barrier parameters 26 II The distr ibuted circuit parameters of the c e r m e t / G a A s contact . . . 31 III T h e lengths used i n the two-dimensional computer model 40 I V A summary of the equations used i n the C M C C D model 50 V T h e measured threshold voltages of the G a A s C M C C D 68 V I T h e signal levels applied to the G a A s C M C C D for operation at 100 M H z 69 V I I T h e charge transfer efficiencies of the G a A s C M C C D for 100 M H z operation 72 x List of Figures 1.1 The cross-sectional views of a single pixel of a G a A s C G C C D and a G a A s C M C C D 3 2.1 A cross-sectional view of the 4-phase G a A s C M C C D w i t h representative signal levels applied to the device nodes 7 2.2 The theoretical generation of a charge packet at the input section of a G a A s C M C C D using the diode cutoff method 9 2.3 T h e theoretical transfer of a charge packet through one pixel of a 4-phase G a A s C M C C D 11 2.4 The output sequence of a G a A s C M C C D 13 2.5 The abrupt charge approximation used i n the one-dimensional analysis of the potential tp(x) underneath the center of a C M C C D transport electrode 14 2.6 T h e potential distr ibut ion under a C M C C D transport electrode for a fixed surface potential and a variable signal charge density 16 2.7 The potential distr ibution under a C M C C D transport electrode for an empty well condit ion and a variable surface potential 16 2.8 T h e two electrode model for the charge storage mode w i t h i n a G a A s C M C C D 18 3.1 The c e r m e t / G a A s Schottky barrier diode used to investigate the barrier properties of the c e r m e t / G a A s junct ion 21 3.2 The dc current-voltage characteristic of the c e r m e t / G a A s Schottky bar- rier diode 21 3.3 The distr ibuted resistive gate Schottky barrier diode model of the cer- m e t / G a A s Schottky barrier diode 22 3.4 A differential length of the distr ibuted resistive gate Schottky barrier diode model 22 3.5 The c e r m e t / G a A s transmission line model of the uni form c e r m e t / G a A s contact w i t h i n an interelectrode gap of a G a A s C M C C D 27 3.6 A differential length of the c e r m e t / G a A s transmission line model . . . . 27 3.7 The variat ion of the normalized surface potential along the gap of a G a A s C M C C D as a funct ion of frequency 30 3.8 The variat ion of the normalized high frequency surface potential along the gap of a G a A s C M C C D as a funct ion of the ratio CD/CCM 33 x i 3.9 T h e test structure and the test circuit used to demonstrate the val idity of the transmission line model for the c e r m e t / G a A s contact w i t h i n a gap of a G a A s C M C C D 33 3.10 The ampli tude response and the phase response of the c e r m e t / G a A s test circuit 35 3.11 The lumped equivalent circuit of the c e r m e t / G a A s transmission line test circuit 36 3.12 T h e theoretical ampli tude response of the c e r m e t / G a A s test circuit . . . 37 3.13 The theoretical phase response of the c e r m e t / G a A s test circuit 37 4.1 T h e unit cell for modeling the G a A s C M C C D 39 4.2 The m a i n finite difference gr id for the G a A s C M C C D model 39 4.3 The nine-point computat ional kernel 42 4.4 The nonlinear electron velocity-field characteristic of G a A s 48 4.5 The flow diagram for the two-dimensional computer simulations 53 4.6 The m a x i m u m frequency of operation of a 4-phase G a A s C M C C D as a funct ion of the clock voltage ampli tude and the transport electrode length 55 4.7 The simulated single electrode transfer of a charge packet 56 4.8 The theoretical charge transfer efficiency as a function of time for the G a A s C M C C D obtained from the simulated single electrode transfer of a charge packet 57 5.1 A microphotograph of the fabricated G a A s C M C C D 60 5.2 A microphotograph of the input section of the G a A s C M C C D 61 5.3 A microphotograph of the output section of the G a A s C M C C D 61 5.4 A transmission electron microphotograph of the C r : S i O ( 45 wt . % C r ) f i l m 64 5.5 A microphotograph of the plasma etch profile of a 5 micron square v i a etched through a 1.8 micron thick polyimide f i l m 64 6.1 The wire-bonding configuration for packaging the G a A s C M C C D . . . . 67 6.2 The insertion loss of the on-chip G a A s M E S F E T source follower amplifier measured from 300 k H z to 200 M H z 67 6.3 The qualitative demonstration of the performance of the G a A s C M C C D for 100 M H z operation 70 6.4 The impulse response of the G a A s C M C C D for 100 M H z operation . . . 70 x i i 6.5 The insertion loss of the G a A s C M C C D for 100 M H z operation 71 6.6 The theoretical insertion loss of the G a A s C M C C D for 100 M H z operation 71 A . l A cross-sectional view of the B N L Experiment 787 rare kaon decay spec- trometer 85 A . 2 The ideal range stack photomult ipl ier tube output waveform for a pion to muon to electron decay sequence 86 A . 3 A system block diagram of the data acquisition system employing a G a A s C M C C D 86 A . 4 A G a A s C M C C D operating i n the frequency compression mode 87 E . l The schematic diagram of the test circuit used to operate the C M C C D i n the V H F band 97 x i i i Acknowledgements I would like to express my thanks to my thesis supervisor, Professor Lawrence Young, for his assistance and guidance throughout this work. I would also l ike to thank P r o - fessor D a v i d L . Pulfrey, Professor R ichard R . Johnson and M r . J o h n V . Cresswell for co-supervising this project. M y deepest thanks go out to M r . John V . Cresswell, who is a Senior Research Engineer at T R I U M F , for introducing me to the broad subject of G a A s C C D s . M r . Cresswell and I have spent many long hours exploring the nuances of these devices. He has my heartfelt thanks for his invaluable assistance throughout this project. A special note of thanks to D r . R . Sahai of Rockwel l International Corporat ion for the discussions that we had on the various points of interest that we share on the subject of G a A s C C D s . The knowledge gained from these discussions proved to be quite beneficial. There are a number of people that I am indebted to for their help dealing w i t h the marry technical aspects concerning this project: R a y m o n d B u l a , Mi les Constable, Hiroshi K a t o , Yvonne Langley, Peter LeNoble , Michael LeRoss, Tony Leugner, N a o m i Shibaoka, Peter Townsley and D a v i d Webster. I would also like to thank my colleagues i n the Sol id State G r o u p w i t h i n the Department of Electr ical Engineering at U B C for the assistance they have given me. F ina l ly , to my beautiful wife, Eveline, for having the patience to endure—I express my love and appreciation. x iv Chapter 1 Introduction The original proposal of a G a A s charge-coupled device was made i n 1972 by Schuer- meyer et a l [1], T h e transport electrodes of the proposed C C D structure consisted of metal/semiconductor Schottky barriers instead of the M O S structures commonly used w i t h sil icon C C D s . The Schottky barrier C C D has the advantage that it can be fabricated on G a A s using well developed G a A s M E S F E T fabrication techniques. This is important , as w i l l be described later, for the monolithic integration of G a A s C C D s w i t h auxi l iary G a A s M E S F E T support circuits. A 3-phase G a A s capacitive gate C C D ( C G C C D ) employing m e t a l / G a A s Schot- tky barriers separated by narrow ( approximately 1 micron long ) dielectric fi l led i n - terelectrode gaps was demonstrated i n 1977 by Kel lner et al [2], and shortly there- after i n 1978 by Deyhimy et al [3]. One, two and four-phase G a A s C G C C D s have been produced and operated since the i n i t i a l demonstrations of the 3-phase G a A s C G C C D [4,5,6]. G a A s C C D s have wider operating bandwidths than sil icon C C D s as a result of the approximately five times greater electron mobi l i ty w i t h i n G a A s at low to moderate electric fields. A l imi ta t ion for the high frequency operation of a s i l i - con C C D is at tr ibuted to the lower bandwidths and greater power requirements of the support circuits integrated w i t h the device [1,7]. The highest clock frequency that a sil icon C C D has been operated at, that this author is aware of, is 180 M H z which was reported by Esser and Sangster [8]. In comparison, a G a A s C M C C D was operated at 4.2 G H z as demonstrated by Sovero et al [9]. The best reported charge transfer effi- ciencies ( C T E s ) attained by G a A s C C D s approach 0.9999 for C C D clock frequencies ly ing between 1.0 M H z and 1.0 G H z [10,9]. This level of performance has made the G a A s C C D desirable for signal processing applications that extend into the U H F band 1 ( 0.30 G H z - 1 . 1 2 G H z ) [11,12,13,14,15,16,17]. A l imi ta t ion that is encountered w i t h using G a A s C G C C D s i n U H F signal process- ing applications arises f rom the difficulty of monoli thical ly integrating G a A s C G C C D s w i t h G a A s M E S F E T s . T h i s difficulty is a consequence of the different active layer re- quirements of the two devices. A G a A s C G C C D is typical ly fabricated on a 1-2 micron deep n-type epitaxial layer grown on a n~-buffer on a semi-insulating G a A s substrate. The donor density for the n-type epitaxial layer is chosen to lie w i t h i n the range f rom 10 1 5 c m - 3 to 10 1 6 c m - 3 to maintain a reasonable pinch-off voltage suitable for the high frequency operation of the C G C C D . The active layer parameters described above for the G a A s C G C C D are not opt imal for a typical G a A s M E S F E T which requires a thinner, more highly doped active layer. It is impract ica l to grow segregated regions of doped G a A s for C G C C D s and M E S F E T s using epitaxy, as the present epitaxial growth methods are not wel l suited to this task [18]. Ion-implantat ion would yie ld selectively doped regions of G a A s , but possesses some difficulty providing the deep active layers required for the fabrication of a G a A s C G C C D [19]. T h e performance of a G a A s C G C C D i n a signal processing applicat ion is further l imi ted by the charge transfer loss that arises from the formation of energy troughs w i t h i n the active layer bounded on the G a A s surface by the interelectrode gaps [7,20]. A n energy trough w i t h i n a gap of a G a A s C G C C D has a m i n i m u m electron energy less than that of the regions under the transport electrodes adjacent to the gap. This energy trough w i l l form w i t h i n a gap of a G a A s C G C C D as a result of a non-monotonic surface potential dis tr ibut ion along the gap [7]. D u r i n g the charge transfer process, the energy trough captures a quantity of charge from a charge packet as it passes through the region of m i n i m u m energy. The captured electrons are transferred to the C G C C D output at a later t ime or lost through recombination resulting i n increased signal dispersion. Deyhimy et al [7] used a two-dimensional electrical analog for the G a A s C G C C D to show that the energy trough w i t h i n a gap of a G a A s C G C C D was 2 Dielectric Y*-<1.0 fj,m Active layer NB*i 10 cm \ ^1.0 fxm J CGCCD Cermet -»-| \*->1.0 nm Active layer iV^Ra 10 cm t <1.0 fj.m I CMCCD Figure 1.1: The cross-sectional views of a single pixel of a GaAs CGCCD and a GaAs CMCCD illustrating the basic physical differences between the two devices. considerably reduced when the gap length was decreased. It was demonstrated that a gap length of less than 1 micron would result in the formation of a minimal energy trough in a GaAs CGCCD having a 2 micron deep active layer uniformly doped with a donor density of 1 • 1016 cm - 3 . The GaAs CMCCD demonstrated in 1982 by Higgins et al overcomes the practical limitations of using a GaAs CGCCD in a signal processing application [18]. The cross- sectional views of a single pixel of a GaAs CMCCD and a GaAs CGCCD are shown in Figure 1.1. The CMCCD is fabricated on a GaAs MESFET compatible active layer enabling the CMCCD to be monolithically integrated with MESFET support circuitry. The transport electrodes of a CMCCD are thinner than the transport electrodes of a CGCCD and are separated by a wider interelectrode gap. A thinner transport electrode provides an increased tangential electric field component under the electrode, resulting in improved charge transfer within the CMCCD [18,21]. The wider interelectrode sep- aration of the CMCCD provides a considerable reduction in the dimensional tolerance 3 required to fabricate the device. The G a A s surface comprising the interelectrode gaps of a G a A s C M C C D is encap- sulated w i t h a cermet f i l m . The c e r m e t / G a A s junct ion was demonstrated i n 1974 by Wronsk i et al [22] to form a Schottky barrier w i t h a series gate impedance comprised of a parallel resistance and capacitance. D u r i n g the operation of the C M C C D , a current w i l l flow f rom a transport electrode through the cermet film to an adjacent transport electrode when a voltage difference exists between the two electrodes. The current through the cermet film establishes a potential distr ibut ion along the c e r m e t / G a A s junct ion that varies monotonically i n the direction of flow. Walden et al [23] deter- mined , using two-dimensional computer model ing, that a monotonic surface potential variat ion across each of the interelectrode gaps of a C C D w i l l prevent the formation of energy troughs w i t h i n the device. This result suggests that a C M C C D w i l l have reduced charge transfer loss during operation, and consequently w i l l exhibit improved performance. The performance of the G a A s C M C C D has been demonstrated i n two signal pro- cessing applications: a h igh speed G a A s detector a r r a y / C M C C D multiplexer [24] and a G a A s V H F / U H F agile bandpass filter [25]. These applications have been developed by a group at the Rockwel l International Microelectronics Research and Development Center ( Thousand Oaks, Cal i fornia ) and are the only demonstrated applications of G a A s C C D s that this author is aware of. The high speed G a A s detector a r r a y / C M C C D multiplexer has been developed for an acousto-optic spectrum analyzer. In this applicat ion, an array of thir ty-two G a A s photodiodes are mult iplexed by a 64-pixel, 4-phase G a A s C M C C D using a side-feed arrangement. The photodiodes and the C M C C D are interconnected by a gating circuit provided by G a A s M E S F E T s integrated on-chip. The currents generated by each of the photodiodes are integrated onto hold capacitors producing thir ty-two discrete charge packets. The charge packets are injected into the C M C C D channel i n a parallel manner 4 using the M E S F E T gating circuit and are subsequently transferred to the C M C C D output for further processing. Real-t ime signal processing w i t h this device has been demonstrated using a C M C C D clock frequency of 1.0 G H z . The G a A s V H F / U H F agile bandpass filter has been developed for frequency se- lective f i l tering applications. T h i s device employs G a A s C M C C D s arranged i n a pipe- organ structure to provide weighted sampling, programmable delay and summing of analog signals. Supervisory functions are provided by G a A s M E S F E T circuits i n - tegrated monoli thical ly w i t h the C M C C D s . The C M C C D agile bandpass filter has demonstrated i n excess of 60 d B of dynamic range for lowpass, bandpass and highpass filter operations using a 1.0 G H z input sampling rate [26]. The two G a A s C M C C D applications described above have demonstrated the abil i ty to monoli thical ly integrate the C M C C D w i t h other circuits to provide sophisticated signal processing functions. A G a A s C M C C D signal processing system is presently being developed at T R I - U M F ( Tr i -Univers i ty Meson Facil i ty, Vancouver ) to satisfy the instrumentat ion re- quirements for a nuclear physics e x p e r i m e n t — B N L Experiment 787. A 64-pixel, 4- phase G a A s C M C C D comprises an essential part of a wideband data acquisition sys- tem capable of recording 250 M H z bandl imited analog signals. The nuclear physics experiment and the G a A s C M C C D wideband data acquisition system are described i n A p p e n d i x A . T h e purpose of this work is to provide a theoretical and pract ical development of a 64-pixel , 4-phase G a A s C M C C D . The design, implementation and evaluation of this device are described i n the following chapters. 5 Chapter 2 T h e o r y 2.1 Principle of Operation A G a A s C M C C D functions as a programmable delay line. T h e input signal is applied to the input ohmic contact ( I / O ) and is sampled by the input section at fixed time intervals producing a sequence of discrete charge packets. The charge packets are sequentially injected into the C M C C D transport region where they are transferred to the output ohmic contact ( 0 / P ) under the control of the quadrature clocks. A t the output section of the C M C C D , the charge packets are converted to an analog signal corresponding to the original input signal delayed by an amount of t ime Uel = J (2.1) Jc where t^i is the delay t ime assuming ideal operation, p is the number of pixels com- prising the C M C C D and fc is the C M C C D clock frequency. A cross-sectional view of a 4-phase G a A s C M C C D w i t h representative signal levels applied to the device nodes is shown i n Figure 2.1. The signals applied to the nodes of the C M C C D are engaged i n a sequential manner during the i n i t i a l start-up of the device. The bo t tom surface of the semi- insulat ing G a A s substrate, the input ohmic contact and the output ohmic contact are biased first, to the reference potential of 0 volts. Next , the control gates G i , G 2 and G 3 are biased negatively w i t h respect to the ohmic contacts by amounts that are less than or equal to the pinch-off voltage of the C M C C D active layer ( typical ly -2.0 volts ), depleting the volume of semiconductor under these gates. The quadrature clocks w i t h voltage levels of 0 volts and -5 volts are subsequently applied to the C M C C D , transferring the remaining electrons w i t h i n the channel to the output of the device 6 •*HH*~ Time displacement R/G R/S B/D Ph. 2 Ph. 4 Ph. 1 Ge I/P TJJU Ph. 3 Ph. 4 rm TJJJI B/O — nnr CMCCD Active Layer Input Output B/S Figure 2.1: A cross-sectional view of the 4-phase GaAs CMCCD with representative signal levels applied to the device nodes. 7 where they are removed. The input signal is applied to the input ohmic contact once the ful ly depleted condit ion is achieved w i t h i n the channel. Charge packet generation and injection at the input section of the G a A s C M C C D is accomplished using the diode cutoff method developed by Sequin and Mohsen [27]. The input signal is ac coupled to the input ohmic contact and offset by a positive dc bias, resulting i n an applied input signal ranging positively f rom 0 volts. T h e phase 3 and phase 4 clock signals are ac coupled to the two input control gates G i and G 2 , ensuring synchronization between the generation of the charge packet at the input section and the subsequent injection of the charge packet into the transport region. A n apparent negative t ime delay is added to the phase 3 clock signal applied to the input control gate G i to minimize forward charge injection dur ing the charge packet generation sequence. The negative t ime delay is achieved by delaying the phase 3 clock signal applied to G i by a positive amount equal to the clock period less a smal l t ime, displacement ( typical ly 0.5 nanoseconds for a 10 nanosecond clock per iod ). Figure 2.2 illustrates the theoretical sequence of events that occur to create a dis- crete charge packet under the control gate G 2 using the diode cutoff method. Initially, the active layer extending from the v ic in i ty of the r ight-hand edge of the input ohmic contact to the r ight-hand edge of G 2 is depleted of electrons. Electrons flow into the potential wel l formed under G i f rom the input ohmic contact during the positive tran- sit ion of the delayed phase 3 clock applied to G j . A steady-state condit ion for the electron density distr ibut ion w i t h i n the potential well under Gi is achieved dur ing the intervening time prior to the positive transit ion of the phase 4 clock applied to G 2 . Elec- trons f rom the input ohmic contact and from the potential well formed under G i flow into the potential well formed under G 2 during the positive transit ion of the phase 4 clock applied to G 2 . A steady-state electron density distr ibut ion is achieved w i t h i n the composite potential well formed under both of the input control gates dur ing the remainder of the positive half cycle of the delayed phase 3 clock. D u r i n g the negative 8 I/p 1: 1 2 3 4 1 I/P G, i i i i i i i i i i i i i i i i i i i i i i u r r Depleted Figure 2.2: The theoretical generation of a charge packet at the input section of a GaAs CMCCD using the diode cutoff method [27]. 9 transi t ion of the delayed phase 3 clock applied to G i , the electrons residing w i t h i n the potential well formed under this gate are swept out through the input ohmic contact leaving a discrete charge packet w i t h i n a potential wel l residing under the control gate G 2 . The magnitude of the localized charge packet w i t h i n this potential well is a function of the active layer depth, the active layer donor density dis tr ibut ion and the voltage difference between the input ohmic contact and the control gate G 2 at the t ime of the negative t ransi t ion of the delayed phase 3 clock applied to the control gate G i . A fu l l well of charge is produced under the control gate G 2 when this voltage difference is at its m i n i m u m value ( approximately 0 volts ). The charge packet residing i n the potential well formed under G 2 is subsequently injected into the transport region where it is transferred to the output ohmic contact. The injection of the charge packet into the transport region occurs on the positive transi t ion of the phase 1 clock. F igure 2.3 illustrates the theoretical transfer of a charge packet through one pixel of a 4-phase G a A s C M C C D . A s indicated i n Figure 2.3, the charge packet occupies a potential well that spans two transport electrodes dur ing the transfer process. T h i s is a consequence of the 4-phase clocking scheme that is used. The directionality of charge mot ion is achieved by the tangential electric fields that arise w i t h i n the C M C C D channel as a result of the differences between the clock voltage levels applied to the transport electrodes. The clocking scheme chosen for operating the C M C C D is important as it deter- mines the complexity of both the C M C C D and the clock circuits. The 4-phase structure was chosen for the C M C C D as it has the advantage of not requiring ' b u i l t - i n ' direc- t ionali ty of charge mot ion , resulting i n reduced fabrication requirements to produce the device. The reduced fabrication requirements for producing the 4-phase C M C C D are made at the expense of increased clock circuit complexity. The quadrature clocks that are needed to operate the 4-phase C M C C D require a modest level of circuit de- sign sophistication to achieve the wide bandwidths necessary to operate the device i n 10 Ph. 2 1 / i Ph. 3 2 i Ph. 4 Ph. 1 Ph. 1 I I Ph. 2 Ph. 3 Ph. 4 EKXXX>J Ph. 1 r V x - x ^ y i Transfer direction Figure 2.3: T h e theoretical transfer of a charge packet through one pixel of a 4-phase G a A s C M C C D . 11 the U H F band. The key issue is the difficulty obtaining stable wideband 90° phase shifts between successive clock phases. The current G a A s M E S F E T integrated circuit technology is capable of providing a solution to this difficulty [12,13,15,16]. A charge packet transferred to the potential well residing under the f inal phase 4 transport electrode of the G a A s C M C C D is transmitted to the output ohmic contact on the negative excursion of the phase 4 clock. The output ohmic contact of the C M C C D is precharged to 0 volts during the positive half cycle of the phase 3 clock using the external reset G a A s M E S F E T . The reset M E S F E T is disabled during the negative half cycle of the phase 3 clock allowing the output ohmic contact to float at its precharged value. The electrons passing through the potential wel l formed under G3 exit the C M C C D through the floating output ohmic contact, charging the parasitic capacitance Co/p and dr iv ing the output ohmic contact voltage negatively w i t h respect to its precharged value. A fu l l well of charge arr iving at the output ohmic contact w i l l drive the output ohmic contact voltage to its most negative level. T h e signal produced at the output ohmic contact is buffered from the external output signal processing 0 c ircui try using a M E S F E T source follower amplifier integrated monoli thical ly w i t h the C M C C D . There is usually some distort ion observed i n the signal obtained from the output of the source follower amplifier which is a consequence of the passive feedthrough of the quadrature clocks to the output ohmic contact. This is reflected as a level change at each occurrence of a clock transit ion and is i l lustrated i n the output sequence shown i n F igure 2.4. 2.2 One-dimensional Potential Distributions The one-dimensional solution of Poisson's equation for the potential d is t r ibut ion un- derneath the center of a C M C C D transport electrode, perpendicular to the surface, was determined using the abrupt charge approximation shown i n Figure 2.5. T h e charge dis tr ibut ion i l lustrated i n Figure 2.5 is s imilar to the one used by Hansel l [20] w i t h the 12 Qsto 0/P Ph. 4 R/G B/0 Feedthrough Floating Precharge — Empty well — Full well Signal displacement due to Qs/C0//p R/G R/S B/D CMCCD Output: o/p Ph. 4 i v w w z a f w v w z a O/P — B/0 B/S Figure 2.4: The output sequence of a GaAs CMCCD. The signal obtained from the output of the source follower amplifier includes the effects of passive feedthrough from the clocks to the output ohmic contact. 13 Abrupt 1 — dL Charge Dercsxty Profile , , , Active layer SI substrate O.O to DC int Distance xrxto GaAs: cc Figure 2.5: The abrupt charge approximation used in the one-dimensional analysis of the potential ip(x) underneath the center of a C M C C D transport electrode. exception that the depth of the space charge region is variable. Poisson's equation for the illustrated charge distribution is d2ip(x) _ qND dx* 0 < x < w „ (2.2) for the space charge region within the active layer and d2xp{x) dx2 0 wn < x < xr (2.3) for the quasi-neutral region within the active layer and for the semi-insulating substrate. The signal charge \Qs\ = qND(xint-wn) (2.4) resides within the channel defined by the quasi-neutral region wn < x < x,n<. Here xp(x) is the potential, No is the uniform active layer donor density, q is the charge of 14 an electron, e is the dielectric constant of G a A s , X{ni is the active layer depth, xmax is the wafer thickness and wn is the depth of the space charge region under the transport electrode. The potential ip(x) is related to the intrinsic energy Ej(x) w i t h i n the G a A s by the relationship —qip(x) — Ei(x) — Ei(xmax). The boundary conditions are described below. The surface potential is equal to the potential difference Vg between the Fermi level at the surface and the Fermi level at the bot tom of the substrate less the potential difference between the m e t a l / G a A s Schottky barrier height at the surface </>BM,O and the m e t a l / G a A s Schottky barrier height at the bot tom of the substrate (f>BM,xmax V>(0) = %l>0 = Vg - (<f>BMfi - <t>BM,xmax) ; (2.5) the potential and the electric field across the interface at x = wn are continuous i>(wn_) = V ( ^ n + ) , (2.6) dx dx (2.7) and the reference energy level is Ei(xmax). The solutions for equation 2.2 and equation 2.3 using the boundary conditions 2.5, . . .,2.7 are qNDx2 (qNDwnxmax qNDw2n \ x . ^(x) = « + 7)—" - + *Po 0 < x < wn (2.8) \ ^ / xmax and / / \ (QNpwl \ x qNDw2n ip(x) = - I — h ip0 I 1 h tyo wn<x< xmax . (2.9) \ / Xmax Z6 The potential variat ion holding the surface potential ipo constant at zero volts and vary- ing the magnitude of the signal charge \QS\ w i t h i n the C M C C D is shown i n Figure 2.6 and s imilar ly the potential variat ion for the empty well condit ion \QS\ = 0 w i t h i n the C M C C D and varying the surface potential is shown i n Figure 2.7. The peak poten- 15 f — d. P'otential Distributions Distance into GaAs: oc Figure 2.6: The potential as a function of position underneath the center of a C M C C D transport electrode. The surface potential ^ 0 1 S held constant at zero volts and the signal charge density is varied. f — d Potentxal Distributions Distance irtto GaAs: ac Figure 2.7: The potential as a function of position underneath the center of a C M C C D transport electrode. The signal charge density is held at the empty well condition \QS\ = 0 and the surface potential i p 0 is varied. 16 t ia l w i t h i n the C M C C D active layer occurs near the depletion region boundary at the locat ion xm T h e corresponding m a x i m u m potential "4>max at this locat ion is ZQi\f)Xmax \ %max' Xmax y ^Xmax •^max J 2.3 Act ive Layer Specification T h e design of a G a A s C M C C D requires choosing an active layer depth and an active layer donor density No that are compatible w i t h G a A s M E S F E T s . The pinch- off voltage of a typica l n-type depletion mode G a A s M E S F E T usually lies between -3 volts and -1 volt constraining the pinch-off voltage of the C M C C D active layer to lie between these two values. The active layer parameters X{ni and No for the G a A s C G C C D were determined by Deyhimy et al [7] and by Hansel l [20] to provide a predetermined m a x i m u m potential i p m a x . The active layer parameters of the G a A s C M C C D were determined using a new method which simultaneously maximizes the charge confinement and the signal charge capacity. Consider the two adjacent transport electrodes of a C M C C D i l lustrated schemat- ical ly i n F igure 2.8. Under the left-hand electrode resides a fu l l well of charge as defined by equation 2.4 w i t h wn equal to a small fraction </? « 0 of the active layer depth Xint \Qs,max\ = qND(l ~ <p)xint « qNDXint . (2.12) Furthermore, assume that the left-hand electrode is biased to the most positive clock voltage level such that ipo,ieft = 0 volts. The resultant m a x i m u m potential under this electrode using equation 2.11 is ^ . - W l - P ^ 2 ^ ) ^ * * ! ) . (2.13) \ ^Zmax xmax I 17 int max, left max, right Figure 2 . 8 : The two electrode model for the charge storage mode within a GaAs CM- CCD. A full well of charge resides in the potential well formed under the left-hand electrode. The two electrodes are biased such that 4>max,ieft > *J>max,righ.t • Similarly, an empty well resides under the right-hand electrode which is biased to the most negative clock voltage level such that rpo,right = V'min < 0 volts. The maximum potential that results under the right-hand electrode using equation 2 . 1 1 is '•2 ' ~ . N ./. . / X i n t x]nt \ qNDx] I _ „/, i €t^min (1 , Xint \ xint'll,min (1 Vmax.right ~ V>min + „ „ , I 1 + ~ I — + I 1 ~ ^yJY U^max N •L'm.a.x' •''max \ _|_ mi I *s %nt 2xmax XmaxJ 2 f ( 2 . 1 4 ) The configuration described above corresponds to the case where a charge packet is confined to a potential well residing under the left-hand electrode as a result of a blocking voltage applied to the right-hand electrode. It is necessary that t / W x . i e / t > il>max,right for charge confinement. The charge confinement 8tpmax is defined as the potential difference between rpmax,ieft and ipmax,right- The following equation for 6tpmax is obtained from equations 2 . 1 3 and 2 . 1 4 Hmax = lj>max,Uft ~ ^max,right « (|Vw| ~ \Vp\) ~ (|Vw| ~ ^ ) ( 2 - 1 5 ) where it has been assumed that xmax ^> X{nt and 2 \VP\ = < | ^ , n | (2 -16 ) 18 is the magnitude of the pinch-off voltage for a uniformly doped n-type active layer [28]. T h e following relationship for the m a x i m u m signal charge density \Qs,max\ oc 1 ^ 1 (2.17) is obtained f rom equation 2.12 and equation 2.16. The values of X{nt and Nrj for the G a A s C M C C D are determined using the design equations 2.15, 2.16 and 2.17 w i t h the assumption that the pinch-off voltage Vp is a con- stant value. To simultaneously maximize the charge confinement 6ipmax and the signal charge capacity Qs,max it is necessary to use a th in , highly doped active layer. Equa- tions 2.15 and 2.17 indicate that 8tpmax and QStmax approach m a x i m u m values when the active layer depth #;n< approaches a m i n i m u m value. Under the assumption of a constant pinch-off voltage, equation 2.16 indicates that the active layer donor density No approaches a m a x i m u m value when the active layer depth approaches a m i n i m u m value. T h e above qualitative analysis supports one of the pr inc ipal advantages of a G a A s C M C C D , the signal charge capacity and the charge packet confinement are opt i - m u m for devices fabricated on active layers that are suitable for M E S F E T s . T h e G a A s C M C C D s that were fabricated as part of this research ut i l ized epi-wafers possessing a uni form active layer donor density of 4.5 • 10 1 6 c m - 3 and an active layer depth of 0.25 microns, corresponding to a pinch-off voltage of approximately -2.0 volts. 19 Chapter 3 T h e C e r m e t / G a A s Junction 3.1 Barrier Properties A distr ibuted resistive gate Schottky barrier ( SB ) diode model is described i n this sec- t ion. T h i s model was used to determine the barrier properties of the c e r m e t / G a A s junc- t ion f rom the measured dc current-voltage characteristic of a fabricated c e r m e t / G a A s SB-diode. The experimental current-voltage measurements were conducted w i t h the planar c e r m e t / G a A s SB-diode i l lustrated i n Figure 3.1. The diode consisted of a C r : S i O ( nom- inal 45 wt. % C r ) cermet gate attached at one end to a gold contact, a A u - G e / N i / A u ohmic contact separated from the cermet gate by a 5.0 micron gap and an active layer possessing a donor density of 4.5 • 10 1 6 c m - 3 to a depth of 0.25 microns. The dc current through the diode as a function of the applied dc voltage difference between the gold cermet gate contact and the ohmic contact was measured using a Hewlet t -Packard H P - 4145A Semiconductor Parameter Analyzer connected to a Wentworth probe station. T h e measurements were conducted i n the dark to minimize photocurrent generation w i t h i n the diode. The diode current I{n measured for discrete input voltages V{n ly ing between -5 volts and +5 volts is shown i n Figure 3.2. It is apparent upon inspection of Figure 3.2 that the c e r m e t / G a A s SB-diode exhibits rectification properties similar to that of a m e t a l / G a A s SB-diode possessing a large series gate resistance. The dc operation of the c e r m e t / G a A s SB-diode i l lustrated i n Figure 3.1 is modeled using the distr ibuted resistive gate SB-diode model shown i n Figure 3.3. The resistor Rs is the series resistance ( ohms ) between the gold cermet gate contact and the active region of the diode plus the series resistance of the bulk G a A s , and RCM is the distr ibuted resistance ( ohms/uni t length ) of the cermet film. 20 1 Gold g Contact vy, 1 ^^^^^^Cermet ^ ^^^^^^^^^ •« 0.01 cm ^ u Ohmic Contact o >̂  o — 5.0 fim Isolated 1 Active Layer 16 —"3 ND=4.5 10 cm xint=0.25 fim Isolated Figure 3.1: The cermet/GaAs Schottky barrier diode used to investigate the barrier properties of the cermet/GaAs junction. I— V Characteristic 16 14 12 ^10 Co a 6 4 Q5 o 3 2 0 -2 10=3.6 rtA (3 =1.17 <j>Bc=0.64 volts M eaaured, data ° Theory a a a a a a a u -6 -4 -2 0 2 4 6 Bias Voltage (V) Figure 3.2: The dc current-voltage characteristic of the cermet/GaAs Schottky barrier diode. The solid line is obtained after fitting equation 3.20 to the data. 21 Ohmic contact Figure 3.3: T h e distr ibuted resistive gate Schottky barrier diode model of the cer- m e t / G a A s Schottky barrier diode. — i( y) RCMdy wwwvw- + dV(y) - v(y) 'SB dl(y) dy Figure 3.4: A differential length of the distr ibuted resistive gate Schottky barrier diode model . 22 The current normal to the c e r m e t / G a A s junct ion is modeled using the distr ibuted SB-diode, DSB- A differential length of the distributed resistive gate SB-diode model is shown i n Figure 3.4. T h e differential voltage drop along this length and the differential current n o r m a l to the c e r m e t / G a A s junct ion are dV(y) = RCMl(y)dy (3.1) dl(y) = wJ0 dy (3.2) 6XP \WT) where y is the posit ion variable, w is the cermet gate w i d t h , 0 is the ideal i ty factor, U~T is the thermal voltage and Jo is the saturation current density. The saturation current density is given by [29] Jo = A * T 2 e x P ( ^ ) (3.3) where A* is the modified Richardson's constant, CJ>BC is the c e r m e t / G a A s Schottky barrier height and T is the temperature. Differentiating equation 3.2 w i t h respect to the variable y gives cPI wJ„ I V \ dV w = WTexp{im)^ • (3'4) Subst i tut ing equation 3.1 and equation 3.2 into equation 3.4 yields ^ - a l ^ - - b l = 0 (3.5) dy2 dy where a = RCM/0UT and b — WRCMJO/0UT are constants. The nonlinear second-order differential equation 3.5 describes the spatial variat ion of the tangential current along the c e r m e t / G a A s junct ion. T h i s equation can be solved analyt ical ly i n the following manner [30]. Substitute S = f (3.6) dy and fl_dS _ dSdl _ gdS_ ^ ^ dy2 dy di dy di 23 into equation 3.5 to give the following first-order linear differential equation S ^ - ( a S + b)I = 0 . (3.8) al The solution to equation 3.8 is obtained using separation of variables S - b - l n ( s + b - ) = a-f + Cl (3.9) a \ a J 2 where C\ is a constant of integration determined as follows. A s the tangential current 7. approaches zero the derivative of the tangential current w i t h respect to the variable y also approaches zero. Hence, the boundary condit ion for equation 3.9 is S(I = 0) = 0 (3.10) which yields c : = - - I n ( - a \ a, Subst i tut ing equation 3.11 into equation 3.9 gives _ 6, / , aS\ al2 S - - In I 1 + — ) = — • a \ b J 2 E q u a t i o n 3.2, equation 3.6 and the relationship b/a — wJ0 yields S = exp ' V Subst i tut ing equation 3.13 into equation 3.12 gives exp (v(y)\ _YM_1 = q2/%) (3.11) (3.12) (3.13) (3.14) \PUT) PUT ' 2b Rearranging equation 3.14 results i n an expression for the current I(y) as a funct ion of the voltage V(y) (3.15) i(y) = io exp(m)_m_1 where Io = ± — = ± a l2wpUTJ0 •CM (3.16) 24 is the saturation current. The sign of the saturation current is chosen to be the same as the sign of the voltage V(y). The ideality factor, the saturation current and the Schottky barrier height of the c e r m e t / G a A s Schottky barrier were determined from the measured current-voltage data of the c e r m e t / G a A s SB-diode shown i n Figure 3.1. The distr ibuted resistive gate SB-diode model i l lustrated i n Figure 3.3 yields Vin = R S I I N + V(0) (3.17) for the dc terminal parameters of the c e r m e t / G a A s SB-diode. The diode voltage V(0) is obtained f rom equation 3.15 w i t h 1(0) = I I N Under forward bias conditions where V(0)/3U~T > 3, equation 3.18 yields V(0)^23UT\n(j^j . (3.19) Subst i tut ing equation 3.19 into equation 3.17 gives Vm = RJin + 23UT\n(j^j . (3.20) F i t t i n g equation 3.20 to the measured current-voltage data of the c e r m e t / G a A s SB- diode for Vin > 0.2 volts yields the solid line i l lustrated i n Figure 3.2 and the barrier parameters listed i n Table I. 3.2 Surface Potentials It was demonstrated i n the previous section that the c e r m e t / G a A s junct ion forms a Schottky barrier. T h i s characteristic is used to control the surface potential w i t h i n the interelectrode gaps of the G a A s C M C C D . It w i l l be demonstrated i n this section using a c e r m e t / G a A s transmission line model that the surface potential varies monotonical ly along the gap of a G a A s C M C C D . 25 Parameter Value T 300 K UT 0.0259 volts w 100 firn A* 7.8 • 10~ 8 A / / / m 2 - K 2 Rs 287.9 kQ RcM 55 kfl/ftm 1.17 Io 3.60 n A <t>BC 0.64 volts Table I: A summary of the c e r m e t / G a A s Schottky barrier parameters. The proposed c e r m e t / G a A s transmission line model of a uni form c e r m e t / G a A s contact w i t h i n an interelectrode gap of a G a A s C M C C D is i l lustrated i n Figure 3.5 w i t h a differential length of the c e r m e t / G a A s transmission line shown i n Figure 3.6. The distr ibuted series impedance Z ( ohms/uni t length ) is modeled using the parallel network [22] comprised of the distributed cermet f i lm resistance RCM ( ohms/uni t length ) and the distr ibuted cermet f i l m capacitance CCM ( farads-unit length ) 2 RCM 1 + JWRCMCCM where u is the radian frequency. The distr ibuted shunt admittance Y ( siemens/unit length ) is modeled using the distributed depletion layer capacitance of the active layer CD ( farads/unit length ) Y=juCD . (3.22) The posit ion along the gap is denoted by the variable y w i t h y = 0 defined at the right- hand edge of the left-hand transport electrode and y = LG defined at the left-hand edge of the r ight-hand transport electrode. The spatial variat ion of the surface potential along the gap is described by the voltage wave equation for a uni form transmission line [31]. For harmonical ly varying 26 3.21 Cermet Left electrode Right electrode GaAs active layer y y=0 Figure 3.5: The cermet/GaAs transmission line model of the uniform cermet/GaAs contact within an interelectrode gap of a GaAs CMCCD. y Zdy 'CM R, CM U V W W V V V \ A J + dV(y,o}) V(y.io) Ydy dy Figure 3.6: A differential length of the cermet/GaAs transmission line model. 27 voltages this equation is d2V(y,u) = YZV{y,u) . (3.23) where the factor e3Wt has been suppressed. The solution to equation 3.23 is V(y, u>) = kxe^y + k2e~^y (3.24) where & 1 ? k2 are integration constants and 7 ( 0 ; ) is the propagation constant / JUJRCMCD 1 + JUJRCMCCM UJRCMCD \ exp ^ 1 + (URCMCCM)2 . j ( 1 — arctan 2 \WRCMCCM (3.25) The boundary conditions imposed on the solution 3.24 are V{y = 0) = V0 (3.26) V(y = Lg) = 0 (3.27) where V0 > 0 is the incident voltage ampli tude. The integration constants ki and k2 are obtained by subst i tut ing the boundary conditions 3.26 and 3.27 into equation 3.24 to give kx = — — ( 3 . 2 8 ) k2 = VlT , , . (3.29) Subst i tut ing equation 3.28 and equation 3.29 into equation 3.24 yields the solution for the surface potential along the gap as a function of posit ion and frequency % » ) = 5 % f M F „ . (3.30) smh[L 37(cj)J The surface potential V(y,u) is conveniently expressed i n polar form as V(y,u) = V0H(y,u;)L6(y,u>) (3.31) 28 where H(y,u) is the normalized magnitude of the surface potential i ' cosh 2 [a(y,u)] - cos 2 [b(y,u)}\ 2 cosh 2 [c(o;)] — cos 2 [<i(u>)] (3.32) and Q(y,u>) is the phase shift of the surface potential 0 (y , c j ) = arctan (coth[a(y,u;)] tan[&(y,u>)]) — arctan (coth[c(u;)] tan[d(u;)]) . (3.33) T h e functions a(y,u), b(y,u), c{u) and d(u>) are URCMCD a(y,u) = b(y,u) = c(u) = d(u) = yjl + (WRCMCCM)2 URCMCD yjl + (U>RCMCCM)2 ^ 1 + (URCMCCM)2 URCMCD (Lg - y ) c o s (Lg - y) sin 1 / 1 - arctan ( — I KOJitCM^CM 1 ( 1 - arctan I —— — 2 \WRCMCCM Lg cos Lg sin n - arctan . . 2 \LORCMCCM / - 1 / 1 - arctan I — — 2 \OJRCM^CM {3.34) ,(3.35) (3.36) (3.37) i y i + (OJRCMCCM)' The derivation of the polar form of V(y,o>) is described i n A p p e n d i x B . The funct ion H(y,u>) described by equation 3.32 decreases monotonical ly for the choice of boundary conditions 3.26 and 3.27 used above. Interchanging the bound- ary conditions w i l l result i n the surface potential increasing monotonically, as the cer- m e t / G a A s transmission line model i l lustrated i n Figure 3.5 is symmetric . It is sufficient to show that equation 3.32 satisfies the condit ion 9H(y,u>) dy < 0 (3.38) w=constant to demonstrate that the surface potential varies monotonical ly on the interval 0 < y < Lg for a l l frequencies u > 0. Differentiating equation 3.32 w i t h respect to the variable y gives dy dH(y,u) _ cosh [a(y, u)} s inh [a(y, u>)] ̂ ff1 + cos [b(y, u)} s in [6(y, u)] (cosh 2 [a(y, u)} - cos 2 [6(y, u)]) * (cosh 2 [c(u)} - cos 2 [d(u)]) ' (3.39) 29 Surface Potentials O.O O.S 1.0 1.5 Z.O 2.5 3.0 Distance along the Gap: y (/umj Figure 3.7: The variation of the normalized surface potential along the gap of a GaAs CMCCD as a function of frequency. The functions a(y,u;), b(y,u)), c(u) and d(uj) are positive functions of y and a>, and the derivatives da(y,uj)/dy and db(y,u>)/dy are negative functions of a;. Consequently, the derivative of the normalized surface potential H(y,u>) with respect to the variable y is negative, satisfying the condition 3.38. The variation of the normalized surface potential along a gap of a GaAs CMCCD as a function of frequency is illustrated in Figure 3.7. Equation 3.32 and the parameter values listed in Table II were used to produce the curves. The parameter values were obtained using a Hewlett-Packard HP-4275A Multi-Frequency LCR Meter and an Alessi probe station to perform low-frequency ( 10 kHz ) impedance measurements on a fabricated cermet/GaAs test structure. It is apparent from Figure 3.7 that the surface potential decreases monotonically along the gap for all positive frequencies. There are two special cases which are of interest: the case when the frequency approaches zero and the case when the frequency approaches infinity. 30 Parameter Value Scale Factor RCM 55 k f i / ^ m X 5 / 1 2 7 CCM 0.8 pF-fim 1 2 7 / L , cD 15 f F / f x m 127L, L3 3.0 fim — Table II: The distr ibuted circuit parameters of the c e r m e t / G a A s contact. T h e dc surface potential variation along a gap of a G a A s C M C C D is linear. The propagation constant j(u>) is zero when UJ = 0 resulting i n an indeterminate form for the normalized surface potential H(y,u> — 0). L 'Hospi ta l ' s rule is used to resolve the indeterminate form H(y,U = 0) = lim S i n h -Y ( "HO smh[L f l7(u;)] H m (Lg-y)cosh.[(Lg-y)j(u)] 7 M - 0 L 3 cosh[L 5 7(a ; ) ] (3.40) Equat ion 3.40 is intui t ively correct. A t low frequencies the electric current through the c e r m e t / G a A s contact would be dominantly through the distr ibuted cermet f i l m resistance RCM and would result i n a linear surface potential variat ion. T h i s intuit ive argument was probably the basis for deriving the name resistive gate CCD applied to the original cermet gate C C D described i n reference [18]. The adjective resistive used i n the cited reference is considered to be a misnomer [32] as it implies that the surface potential variat ion along a gap of a G a A s C M C C D is established v i a resistive conduction only, and does not take into consideration the effect of capacitive coupling w i t h i n the cermet f i l m at higher clock frequencies. The adjective cermet has been used instead to avoid the implications of the term resistive. The high frequency normalized surface potential variation along a gap of a G a A s 31 C M C C D is H(y,u -» co) = sinh [y/^(L> ~ y)] (3.41) where the high frequency value for the propagation constant 7(0;) is determined using equation 3.25 E q u a t i o n 3.41 is independent of the distributed cermet f i l m resistance RCM- This suggests that a wide range of cermet f i l m resistivities can be used i n the design of a G a A s C M C C D . A requirement that must be satisfied by the cermet film resistivity is that it must be large enough to comply w i t h the power constraints of the C M C C D quadrature clock drivers. The capacitive coupling between the cermet film and the underlying G a A s is responsible for establishing the high frequency surface potential variat ion along a gap of a G a A s C M C C D . Figure 3.8 illustrates the effect of different ratios of CD/CCM O N the normalized high frequency surface potential H(y,u —> 00). It is apparent f rom the curves i l lustrated i n Figure 3.8 that it is desirable to minimize the ratio CDJCCM M order to mainta in a nearly linear surface potential variat ion for a l l frequencies. The reason for this is that a v i r tua l equipotential zone extends along the surface into the gap near the r ight-hand transport electrode at y = LG for large ratios of CD/CCM- The extent of this zone increases w i t h this ratio. This is undesirable as the tangential electric field w i t h i n the active layer would be reduced underneath the equipotential zone along the surface, creating a source of potential loss of performance i n a G a A s C M C C D operating at high frequencies. M i n i m i z i n g the ratio CD/CCM would reduce this negative effect. 3.3 Verification Frequency response measurements performed on a 2-port c e r m e t / G a A s test structure were used to test the val idity of the c e r m e t / G a A s transmission line model . The test (3.42) 32 Surface Potentials O . O O . O 0 . 5 1.0 1.5 2 . 0 2 . 5 3 . 0 Distance along the Ga-p: y (fjunx) Figure 3.8: T h e variat ion of the normalized high frequency surface potential along the gap of a G a A s C M C C D as a funct ion of the ratio C D / C C M - 64 fingers- Ohmic contact Cermet Active region Port 1 Port 2 [) 50 ohmT} HP-85047A Port A j-e- 3.0 fim Ohmic contact Port B 50 ohm )HP-85047A Figure 3.9: T h e test structure and the test circuit used to demonstrate the val idity of the transmission line model for the c e r m e t / G a A s contact w i t h i n a gap of a G a A s C M C C D . 33 structure was fabricated on a n-type active layer ( ND = 4 .5 -10 1 6 c m - 3 , x , n i = 0.25 m i - crons ) and consisted of two interleaved arrays of sixty-four, 3 micron long T i - P t - A u Schottky barriers encapsulated w i t h a nominal 5000 A thick cermet f i l m deposition of C r : S i O ( nominal 45 wt. % C r ). The separation between adjacent metal fingers was 3 microns. T w o A u / G e - N i - A u ohmic contacts were provided at each end of the 100 micron wide active region. The test structure was packaged i n a leadless chip car- rier which permit ted external connections to be made to the two ports. T h e ohmic contacts were connected to the reference potential and the two electrode arrays were connected to the measurement apparatus using 50 ohm r ig id copper coaxial cables. The test structure and the test circuit are shown schematically i n Figure 3.9. The frequency response measurements consisted of measuring the amplitude re- sponse and the phase response of the c e r m e t / G a A s test structure. T h e measurement apparatus consisted of a Hewlett -Packard HP-8753B network analyzer and an H P - 85047A s-parameter test set. The 50 ohm port A and port B terminals of the s- parameter test set were connected to the two ports of the test structure. The ampli tude response and the phase response were measured using a 0 d B m , 300 k H z - 5 0 0 M H z swept rf signal and are shown i n Figure 3.10. The reference levels are indicated i n each of the two plots by the arrows. The marker triangle labeled w i t h the number ' 1 ' coincides w i t h the m a x i m u m observed phase shift of 53.1° at 12.8 M H z . The lumped equivalent circuit shown i n Figure 3.11 was used to model the the- oretical frequency response of the c e r m e t / G a A s transmission line test circuit . The transmission line length L G = 3 microns is much less than the effective wavelength of the c e r m e t / G a A s transmission line below 500 M H z operation, hence the one hundred twenty-seven paral lel connected c e r m e t / G a A s transmission lines are modeled approx- imately using the lumped elements RCM, CCM and CD- The lumped element values are obtained f rom the distributed element values listed i n Table II after mul t ip ly ing by the scale factors l isted i n the t h i r d column of this table. The theoretical ampli tude 34 C H I S21 l o g I'lflG 3 d B / R E F B c l B i : - 1 7 . 2 5 8 d B S T A R T . 3 0 0 0 0 0 MHz S T O P 5 0 0 . 0 0 0 0 0 0 MHz CH 2 S21 p h a s e 7 . 5 ° / R E F 0 0 1: 5 3 . 1 0 8 0 S T A R T . 3 0 0 0 0 0 MHz S T O P 5 0 0 . 0 0 0 0 0 0 MHz Figure 3.10: T h e ampli tude response ( 3 d B / d i v i s i o n ) and the phase response ( 7.5°/division ) of the c e r m e t / G a A s test circuit measured from 300 k H z to 500 M H z . 35 o + 'CU R cu 4 A A / V W W \ r V(0,G>) o- V(L.,a>)$-*i o- Figure 3.11: The lumped equivalent circuit of the c e r m e t / G a A s transmission line test circuit . response of the test circuit is Rj + (CVRLRCMCCM)2 \ (RL + RCM)2 + (URLRCM[CD + CCM})2 ) (3.43) and the theoretical phase response of the test circuit is $ = arctan (WRCMCCM) — arctan (  U ^ L ^ M ^ ^ ^CM) j (3.44) ' \ RL + RCM J T h e theoretical ampl i tude and phase responses of the c e r m e t / G a A s test circuit are i l lustrated i n Figures 3.12 and 3.13, respectively. The theoretical and measured re- sponses are i n reasonable agreement, support ing the c e r m e t / G a A s transmission line model described i n the previous section. The deviation between the theoretical and measured responses is a result of the parasit ic components associated w i t h the inter- connect w i r i n g between the c e r m e t / G a A s test circuit and the network analyzer, which are neglected i n the above analysis. Ada = - 2 0 log V(Lg,u) = - 1 0 log 36 Figure 3.12: The theoretical amplitude response of the cermet/GaAs test circuit for frequencies lying between dc and 500 MHz. 70 O O Phase Response Measured data a 100 200 300 400 Preqxtertcy (MHz) 500 Figure 3.13: The theoretical phase response of the cermet/GaAs test circuit for fre- quencies lying between dc and 500 MHz. 37 Chapter 4 Two-dimensional G a A s C M C C D M o d e l 4.1 Geometric Representation T h e unit cell for the 4-phase G a A s C M C C D model shown i n Figure 4.1 consists of a two- dimensional slice through a single pixel . The slice is assumed to lie on a plane coincident w i t h the central axis of the C M C C D so that the potential and the charge density are considered invariant along the axis normal to this plane. Cartesian coordinate axes are defined as indicated, w i t h the origin located at the intersection between the upper boundary segment and the left-hand boundary segment. The unit cell occupies a domain comprised of two subdomains: the active layer subdomain (0 < x < x , n t , 0 < y < ymax) and the semi-insulating substrate subdomain (xint 5: x < xmax,0 < y < ymax)- A l o n g the intersection of the two subdomains at x = Xint is an internal boundary segment. The upper boundary segment at x = 0 consists of the union of two boundary segment sets. The first set includes the four transport electrode boundary segments and the second set consists of the five cer- m e t / G a A s junct ion boundary segments. The lengths used i n the computer model are listed i n Table III. 4 .2 Device Equations The equations used to describe the variat ion of both the potential and the electron density i n nondegenerate n-type G a A s are [33]: V 2 u ( a : , y) = a[n(x, y) - ND] (4.1) J(x,y) — qmUTfJ.(x,y)[Vn(x,y) + n(x,y)E(x,y)] (4.2) and dn(x,y) dt = — V - J ( x , y ) qrii (4.3) 38 Ph. 1 Ph. Z Ph. 3 Ph. 4 VlL VlR VZL VzR VsL VsR V 4L V4R KOmH t ^ ^ d x^^<x K^y^x (0,0) (xint,0) Active layer i>( XvVj) ( o,ymax) (XinvVmiuc) Semi—insulating substrate I (Xma*>°) (mtix''y max) Figure 4.1: The unit cell for modeling the G a A s C M C C D . Ph. 1 Ph. 2 Ph. 3 Ph. 4 3 a Jm 3XL 3IR 3st 3$R 3AL J*R j uMMMnn IUMMM » M M M M M M ^ i ^ ^ ^ ^ ^ ^ ^ ^ ^ " ^ ^ ^ ^ ^ ^ ^ ^ ^ " ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ max ^ 3 max Figure 4.2: T h e m a i n finite difference for the G a A s C M C C D model . 39 Parameter Value xint 0.25 nm xmax xint 100 fxm Umax 23.8 / m i VmR — VmL 3.0 nm f ° r m = 1 , . . . , 4 VlL 1.4 (JLVO. Vmax V4R 1.4 jim. y(m+l)L — VmR 3.0 fj,m for m = 1,2,3 Table III: The lengths used i n the two-dimensional computer model . where n{ is the intrinsic carrier density of G a A s , No — No/rii is the normalized donor density, n(x, y) = n(x, y)/rti is the normalized electron density, u(x, y) = ip(x, y)/Ur is the normalized potential , E(x, y) = — Wu(x, y) is the normalized electric field, J(x, y) is the electron current density and a = qni/eUx is a constant. The minor i ty carriers and the electron generation/recombination processes w i t h i n the active layer are neglected i n the model . 4.3 Finite Difference Grid and the Computational Kernel The model equations 4 .1 , . . .,4.3 are discretized on a finite difference gr id superimposed onto the unit cell. The potential is computed at each m a i n gr id point ly ing w i t h i n the unit cell , while the electron density is computed at each m a i n gr id point ly ing w i t h i n the active layer subdomain. A n auxi l iary gr id is interleaved w i t h the m a i n gr id ly ing w i t h i n the active layer subdomain, on which, the intermediate calculation of the electron current density is made. The auxi l iary gr id points are located at the midpoints of the m a i n gr id intervals. The m a i n gr id layout w i t h i n the unit cell is shown i n F igure 4.2. The m a i n gr id is composed of 21 by 120 grid points w i t h 1 < i < imax = 21 and 1 ^ j 5: jmax = 120. The gr id spacing along the z'-axis is uni form w i t h i n the active layer interval 1 < i < iint = 11 and is nonuniform w i t h i n the semi-insulating substrate 40 interval i{nt < i < imax. A uni form gr id spacing is maintained along the j - ax i s of the unit cell . The auxil iary gr id w i t h i n the active layer subdomain is shifted f rom the m a i n gr id as described above w i t h (iaux,jaux) = (i + \,j + |). The gr id spacings 6x,- = x t + 1 — x, and Sy = y J + 1 — yj w i t h i n the unit cell are determined f r o m the geometry of the unit cell and the number of gr id points ly ing w i t h i n the region of interest. The constant gr id spacing along the z-axis w i t h i n the active layer subdomain is Sxi = 8xa = -——— = 0.025 microns for 1 < i < i , - n t — 1 . (4.4) W i t h i n the semi-insulating substrate subdomain the grid spacing along the i-axis is nonuniform and is defined using a finite geometric series 6xi - < fa a r , _ , i n t for iint < i < i m a x - 1 (4-5) where r is a constant determined f rom the summation Imax —1 ^ yimax— iint )fig ^ m o i -Pint / , 6xj — - . (4.6) 1 — r The value of the constant r is 2.364316 for 6xa = 0.025 microns and x m a x — Xint — 100 microns. T h e uni form gr id spacing along the jf-axis w i t h i n the unit cell is fiy — ymax _ Q_2 microns for 1 < i < j m a x — 1 . (4.7) Jmax -1- The potential or the electron density at each gr id point ( i , j ) is evaluated using the discrete nine-point computat ional kernel shown i n Figure 4.3. The potential and the electron density are associated w i t h the five m a i n gr id points and the components of the electron current density are coupled w i t h the four auxi l iary gr id points. 4.4 Finite Difference Equations for u(x,y) The generalized two-variable Taylor series for the dimensionless potential u(x, y) near the point (xi,yj) is u(xi±6x,yj ±8y) = u(x,y)\{xi,y]) + (^±8x^ ± 8 y ^ u(x,y)\(xi^ 41 o.56y — " - 0 * - °-5Sy —W °-56y — * " 0 * ~ °-56y — 0.56 xt Figure 4.3: The nine-point computational kernel used in the calculation of the potential or the electron density within the unit cell. The five disks represent the main grid points and the four circles denote the interleaved auxiliary grid points. 1 / d d \ 2 \ ( d d \ m + ^.{±6lai±6yd-y) "(*•*•*> + ••• <4-8> where +Sx = 6x{, —Sx = 8xi_i and m is an integer variable. Applying equation 4.8 to each of the four main grid points surrounding the central point of the computational kernel and neglecting third and higher order terms of the resulting Taylor series yields the following set of four equations: Ui-lJ = u',j d Sx2 ! a2 (4.9) Ui,j-1 = Ui,i d £y 2 d2 6 y d y U i ' j + 2 d*yUi" ' (4.10) ui,j+l = UU c d by1 d2 + 6 y d y U i ' j + 2 * y U " ' (4.11) = UiJ f d Sx2 d2 + bxi u i t j + Uij Ox 2 d2x (4.12) 42 where the shorthand notat ion Uij = u(x,y)\(Xi,yj) is used. A d d i n g equation 4.9 to equation 4.12 gives d2 2 1 / Sx{_i + 6 x A 1 8xi_i 1 l j I 8xi_i8xi J l'3 8x{ , + 1 ' J d2x ' 8xi_i + 8xi and similarly, adding equation 4.10 to equation 4.11 yields d2 1 (4.13) d2yUi'j 82y T h e sum of equation 4.13 and equation 4.14 produces the finite difference equation for the Laplac ian of the potential u t j - 2uij + u i } j + 1 ) . (4-14) 2 _ 2 _l_u _ I 2 2 1,3 8x^(8x^1 + 8xi) l~1,3 82y l'3~1 ySx^Sxi 82yt u hi + ^ + 1 + Sxi(Sxt2.1 + Sxi)Ui+1'i • (4-15) E q u a t i o n 4.15 can be simplified when the point resides w i t h i n the active layer sub- domain . Recal l that the gr id spacing along the i-axis w i t h i n the active layer subdomain is a constant, as defined by equation 4.4. Hence, equation 4.15 reduces to V72 1 1 2 (6 2 x a + 82y) 1 1 V U " = PxZU^ + Py-U^ ~ 82xa62y ^ + S^y^1 + Px?*1* ' ( 4 > 1 6 ) The discretization of the Poisson equation 4.1 w i t h i n the active layer subdomain is obtained using equation 4.16 2(82xa + 82y) 1 1 „ ¥X-Py—^ + p-yU'^ + PxZU^ (4'17) and w i t h i n the semi-insulating substrate subdomain using equation 4.15 2 1 0Xi-i(0Xi_i + oxi) 8zy (^8x{-i8xi 82y) 1 , 3 82y 1 , 3 + 1 8xi(8xi-i + 8xi) ^ ^ where it is assumed that no charge is present w i t h i n this region. 43 4.5 Boundary Conditions for u(x, y) T h e boundary conditions for the potential tt,-j are an extension of the one-dimensional boundary conditions described i n Chapter 2. The normalized reference potential along the lower boundary segment at i = imax is assigned a value of zero Ui , = 0 (4.19) The unit cell is considered to be part of a repetitive structure resulting i n a periodic boundary condit ion for the potential that is described by the following two equations (4.20) and (4.21) The potential along the internal boundary segment at i = iint is continuous and satisfies Gauss's law QintJ d d OX '"',J OX '">'J 0 (4.22) where the interface charge density Qint,j is assumed to be zero. F r o m equations 4.1, 4.9, 4.14 and noting that 8xiint_i — 8xiint = 8xa obtain dxU'int'^ -  ND) ~ 7J—"w-W 8xa 2 1 2 82xc 2(82xa + 82y) (4.23) Similarly, equation 4.1 w i t h the right-hand side set to zero, equation 4.12 and equa- t ion 4.14 yie ld d OX 8xa 2 82y 2(82xa + 82y) 1 2 8*xa82y Uiint'J + ^ y U " n " J + 1 + 82xc (4.24) 44 Subst i tut ing equation 4.23 and equation 4.24 into equation 4.22 gives a_ / fj \ 1 1 2 \niint,j — ^ D ) — fi2^TUiint-i<i + ' p ^ U i i n " j - 1 2{82xa + 82y) 1 1 62xa82y Ui~'J + S 2 y u i i n * J + * + S * x a U i i n t + l J ' 1 ' The potential along a transport electrode boundary segment along the upper boundary segment at i = 1 is defined as U° = v\ ~ (tBMfi ~ <t>BM,xmal)} • (4.26) T h e potential along an interelectrode gap boundary segment along the upper boundary segment at i = 1 is approximated as a linear function of the voltages applied to the two adjacent transport electrodes, which is consistent w i t h the c e r m e t / G a A s junct ion theory presented i n Chapter 3. The potential along a gap boundary segment is u gap TT WaJeft + SJgapVgap ~ (4>BC ~ 4>BM,xmax)] ( 4-27) UT where Vg%\ejt 1 S the potential of the transport electrode to the immediate left of the gap, Vgap is the potential difference across the gap relative to this electrode and 0 < 8jgap < 1 is the relative posit ion along the gap. 4.6 Finite Difference Equation for J(x,y) The Scharfetter-Gummel ( S G ) method [34,35] is used for discretizing the electron current density equation 4.2. To il lustrate this method, the positive x-component of the current density J i + i j w i l l be determined. The x-component of the electron current density at a point (x, y) using equa- t ion 4.2 is J x ( x , y) = qniUTfJ.x(x, y) — n ( x , y) + n(x, y)Ex(x, y) ox (4.28) where the superscript x denotes the x-component of the variable. Rearranging equa- t ion 4.28 results i n a first order differential equation for the electron density —n(x,y)-an(x,y)-b-0 (4.29) 45 where a = —Ex(x,y) and b = Jx(xyy)/qniUTlJ'X(x,y). The Scharfetter-Gummel method assumes that the electron current density and the electric field w i t h i n the semiconductor vary more slowly than the electron density and consequently can be ap- proximated as local constants. T h i s approximation enables equation 4.29 to be solved analyt ical ly using an integrating factor exp [—a(x — a;,-)] to give n(x,y) = - (exp [a(x - a;,-)] - 1) + n(xi,y)exp [a(x - xt-)] (4.30) a where n(x s - ,y) is the i n i t i a l condit ion. Assigning n(x,-,y) = n t j , fixing x = x,- + 8xa and setting n(xi + 8xa,y) = n i + 1 j yields J i + y = O.bqriiUTfi^ij [EI+LTJ coth(Q.oEi+ijSxa)(ni+1j - n^) + ( n , - + 1 j + n , - J - ) E f + i i i ] (4.31) where the x-components of the electron current density, the electric field and the elec- tron drift mobi l i ty are computed at the auxi l iary gr id point (z + S imi lar finite difference equations are obtained for the three remaining components of the electron current density surrounding the point + ( n ^ + n^E^A , (4.32) J i j _ i = 0 . 5 g n i t f r ^ j - i [ £ , j _ i ^ + (n.-j-x + n . j ) ^ - - ! ] , (4.33) J i ) j + i = O.bqniUT^xiEi^cothiQ.bEi^SyXni^ - n^) + (nid+1+nit,)EitJ+,} . (4.34) 4.7 Discretization of the Continuity Equation T h e electron continuity equation 4.3 is descretized using the C r a n k - N i c o l s o n equa- t ion [36] 8t 2 46 —n(xi,yj,tk+1) + —n{xi,yj,tk) = ( V ' J i * M 1 + V ' Ji'3'k) ( 4 ' 3 5 ) where 8t is the t ime increment and the subscript A; is the discrete time-step. The spatial derivatives on the r ight-hand side of equation 4.35 are discretized using central differences of the form V.J,- i = J ,' +*' c~ Jt-U + J ^ h - J ^ - h { A M ) 8xa by Subst i tut ing equations 4.31, . . .,4.34 into equation 4.36 yields ^V-J-' = [ ^ )n^ + { si—)""-* 6xa ) — V- • 1 + 2 h - n',j 8y + l"-^—2-)n^ + { jxZ (4'37) where v = /J,U~TE is the nonlinear electron drift velocity of G a A s and v = v coth(Q.5E8xa). A finite difference equation for the electron density at the point for the k + 1st time-step is obtained upon substi tuting equation 4.37 into equation 4.35 to give 0 = ^ — » j n t _ h h k + 1 + { ^ - - j n , ^ + —8y T t ) n ^ + T Y J + [ ^ J n i + 1 J M i + V • J i J i f c + jnijik . (4.38) The electron drift velocity of G a A s is a nonlinear funct ion of the electric field strength. To incorporate this into the model , the empirical relationship between the 47 Velocity vs Field, 25 i 1 1 O 5 IO 15 20 Electric Field (x10sV/cm) Figure 4.4: The nonlinear electron velocity-field characteristic of GaAs obtained from the empirical equation 4.39, developed by Chang and Fetterman [37]. electron velocity and the electric field strength developed by Chang and Fetterman is used [37] /J.0UTE v = (4.39) y/l + (\UTE\ - E0yEc2u(\UTE\ - EQ) where U(\U~TE\ —E0) is a unit step function equal to zero for |£/;r-E7| < Eo- The remaining constants are: / i 0 = 7500 cm2/V-sec, E0 = 2800 V/cm and Ec = 1100 V/cm. The nonlinear electron velocity-field characteristic obtained from this equation is shown in Figure 4.4. 4.8 Boundary Conditions for n(x,y) The electron density along the upper boundary segment at i = 1 is assumed to be equal to the equilibrium electron density at the surface neglecting Schottky barrier height lowering. For the metal/GaAs junction the electron density is 48 n° = -n7 e X P l " -^" j ( 4 ' 4 0 ) and for the c e r m e t / G a A s junct ion the electron density is Nc ( <t>Bc\ , A A U n a a p = — e x p ^ - — j (4.41) where Nc is the effective density of states w i t h i n the conduction band of G a A s . The periodic boundary condit ion for the electron density is described by the following two equations «i,o = n i J m a x (4.42) and ra.jm«+i = (4.43) for 1 < i < i{nt. The electron density along the internal boundary segment at i = iint is assumed to be equal to the equi l ibr ium electron density along this boundary = e x P ,j - ° ^ m o J (4.44) where Suimax is the normalized potential difference between the Fermi level and the intr insic energy level along the bot tom of the substrate at i = imax. 4.9 Numerica l Solution of the Difference Equations Newton i terat ion w i t h successive relaxation [20,38,39,40] is used for solving the C M C C D model equations summarized i n Table I V . The finite difference equations summarized i n this table are expressed as the sum of two functions fi+i  = 0(C-i,j,fc+n Cij-i,fc+i> (i,j,k+i->Ci,j+i,k+i-> Ci+i,j,fc+i) + = 0 (4.45) where I = 0 , 1 , 2 , 3 , . . . is the iteration counter, ( represents either the potential u or the electron density h and the function h is a constant dur ing the k + 1st time-step. The functions g and h are g = A(<_hhk+1 + £Cl_i,*+i + CO+i + D$j+i,k+i + ECUJMI (4-46) 49 Potent ia l Electron Density Region of A p p l i c a t i o n 4.17 4.38 Act ive layer subdomain 4.18 — Semi-insulating substrate subdomain 4.19 — Lower boundary segment 4.20 4.42 Left -hand boundary segment 4.21 4.43 Right -hand boundary segment 4.25 4.44 Internal boundary segment 4.26 4.40 Electrode boundary segments 4.27 4.41 G a p boundary segments Table I V : A summary of the equations used i n the C M C C D model . and h = Fnitj,k + G (4.47) where A,...,G are constants obtained from the finite difference equations. The func- t ion flk+1 defined by equation 4.45 is a function of either the potential ulk+1 or the electron density nlk+1 i m p l y i n g that the finite difference equations are decoupled. T h i s enables the potential and the electron density distributions to be computed indepen- dently at each discrete time-step. The solution for the potential d is tr ibut ion w i t h i n the unit cell is iterated first, followed by the iterated solution for the electron density dis tr ibut ion w i t h i n the active layer subdomain. The potential distr ibut ion at the k + 1st time-step w i t h i n the unit cell is iterated first using the electron density distr ibution computed at the kth time-step, as the elec- t ron density dis tr ibut ion at the k-\-\st time-step is unavailable. The rate of convergence of the iterates is accelerated if the electron density dis tr ibut ion at the kth time-step is replaced by an estimated dis tr ibut ion for the k+lat time-step. T h i s estimate is obtained using the B o l t z m a n n equation and is ni,j,k+i ~ eu'i^k+1~Vi-i-k = n j ) j i f c e " u * ' J ' > f e e u ' ' . > . * + i (4.48) where Vijtk — <j>n(xi,yj,tk)/UT is the normalized quasi-Fermi potential for the electrons 50 w i t h i n the active layer subdomain. Subst i tut ing equation 4.48 into equation 4.47 yields the revised equation for the funct ion h h = Fni<jtk exp[{(uliJM1 - u.-j,*)] + G (4.49) where £ = O i f £ = n o r £ = l i f £ = u . A single Newton iteration step consists of adding a correction factor S(k+l = Cfc+i — Cfc+i to each of the unknown variables i n equation 4.45 using the following relat ion described i n A p p e n d i x C The following expansion is obtained for equation 4.50 n _ fi . xfi d/fe+i , cri dfl+i , cri dfL+i i * W d f k + l , d f k + 1 (A K I ^ Subst i tut ing equation 4.45 into equation 4.51 and recalling the definitions for the func- tions g and h given by equations 4.46 and 4.49 yields the following equation for a single Newton i terat ion of the variable £ 0 = AC£i J i f c + 1 + BCijIi,*+i + (f + Fnililfc£ exp J > f l - u^)]) £Ji + i + ^cgi+i + £ c £ i J > f i + ^ . - ^ ( i - eC-lfc+i)-«p - «.-.;.*)] + G . (4.52) A single Newton iteration step through the matr ix of unknowns proceeds i n the usual reading order. The rate of convergence of the sequence of iterates is accelerated using successive relaxation. The ordinary iterated solution for C ' j j t+i i - s obtained from equation 4.52 C'S+i = - (C + F*ij*t ^ P [t(u'itjM1 - Uij,k)]) _ 1 {ACl+lJMl + S d , f c + 1 + G) (4.53) 51 where the most recently iterated values for the variables are used. The accelerated T h e ordinary iterated solution is obtained from equation 4.54 if wr = 1. 4 .10 C o m p u t e r S i m u l a t i o n s A flow diagram for a two-dimensional computer s imulation is i l lustrated i n Figure 4.5. A s imulat ion begins f rom an in i t ia l guess for the potential and the electron density distributions w i t h i n the unit cell for the in i t ia l bias conditions at k — 0. The bias voltages are adjusted, the time-step counter k is incremented by 1 and the s imulat ion proceeds. The potential u at each gr id point w i t h i n the unit cell is iterated unt i l the m a x i m u m absolute residual for the potential w i t h i n the active layer subdomain is less than 0.0005. The electron density at each gr id point w i t h i n the active layer subdomain is subsequently iterated unt i l the m a x i m u m relative error for the electron density is less than 0.001. The s imulat ion continues unt i l a stop time kmax is reached. This s imulat ion procedure was used to produce the two-dimensional potential and charge density distributions for investigating the m a x i m u m frequency of operation and the charge transfer performance of a 4-phase G a A s C M C C D . The theoretical m a x i m u m frequency of operation of a G a A s C M C C D was deter- mined using the single electron transit t ime model developed by Deyhimy et al [7] and Prokop'ev [41]. The transit t ime r required for an electron to travel w i t h i n the ful ly depleted active layer between the centers of two adjacent transport electrodes is given by the line integral solution r C S k + 1 using successive relaxation is (4.54) (4.55) 52 Initialize u^Qi n w and V 7 y ( ) k=k+1 Adjust Biases I Compute Uyjg+f I Compute niJk+1 I Save uidk+1, n y f c + / and W U f c + / Z3Z k>k max \ T Stop Figure 4.5: The flow diagram for the two-dimensional computer simulations. 53 where Cm is the curve coinciding w i t h the m a x i m u m potential contour between the elec- trode centers, ux(xm(y), y) and uy(xm(y), y) are the x-component and the y-component of the electron velocity vector along this curve, df = xdx + ydy is the differential contour vector and x m ( y ) is the depth of the m a x i m u m potential as a funct ion of the posit ion y between the electrode centers. Equat ion 2.10 is used to determine an ap- proximate value for the depth of the m a x i m u m potential . If wn = x , n t = 0.25 microns, ND = 4.5 • 10 1 6 c m - 3 , xmax >̂ x,-n< and |^0| < 10 volts then the second and t h i r d terms on the r ight-hand side of equation 2.10 are negligible which gives xm{y) &wn = xint (4.56) for the depth of the m a x i m u m potential between the electrode centers. Subst i tut ing equation 4.56 into equation 4.55 yields T !=S I"' -A—, (4-57) Jo vy{xinUy) where Lp is the distance between the two adjacent transport electrode centers. The electron transit t ime is computed w i t h the electron velocity vy(xint,y) described by equation 4.39 w i t h the y-component of the normalized electric field Ey(xini,y) deter- mined from a static two-dimensional potential distr ibut ion. The theoretical m a x i m u m frequency of operation fmax of a 4-phase G a A s C M C C D is /m«« = ^ - • (4.58) 4 r T h e m a x i m u m frequency of operation of a 4-phase G a A s C M C C D as a funct ion of the clock voltage ampli tude and.the interelectrode gap length for a constant transport electrode p i t c h Lp is i l lustrated i n Figure 4.6. A s indicated i n this figure, the m a x i m u m frequency of operation of the C M C C D increases w i t h the clock voltage amplitude and w i t h the interelectrode gap length. This relationship is intuit ively correct as the electron 54 •Mobx-imiMrrt Opera-tiriff Frequency 1 2 3 4 5 Clock Voltage Am.jplitixdie (-volts) Figure 4.6: T h e m a x i m u m frequency of operation of a G a A s C M C C D as a funct ion of the clock voltage ampl i tude and the transport electrode length. transit t ime is dominated by the time required for the electron to travel through the low- field region underneath the transport electrode. T h e electron transit t ime underneath the transport electrode is reduced by increasing the fr inging field penetration from the adjacent transport electrode. T h i s is accomplished either by increasing the clock voltage ampli tude or by reducing the transport electrode length. It would appear f rom the above description, that the transport electrodes of a G a A s C M C C D should have a m i n i m u m length i n order to achieve the m a x i m u m operating b a n d w i d t h possible for the lowest clock power requirements. The charge transfer performance of a G a A s C M C C D was investigated i n a manner s imilar to that used by Sodini et al [42]. A simulated single electrode transfer of a half fu l l wel l charge packet ( Qs — 0.5 • I O - 1 0 c o u l / c m ) was performed and is i l lustrated i n Figure 4.7. T h e charge packet in i t ia l ly resides under the phase one and phase two transport electrodes and is transferred to the region under the phase two and phase 55 <=0 pS Mm t=SS pS t=ee ps Figure 4.7: T h e simulated single electrode transfer of a charge packet. The transport electrode length is 3.0 microns. 56 Charge Transfer Efficiency 0.4 O 20 40 60 Time (-picosecond,s) 80 too Figure 4.8: T h e theoretical charge transfer efficiency as a funct ion of t ime for the G a A s C M C C D obtained from the simulated single electrode transfer of a charge packet. three transport electrodes. The quadrature clock voltage funct ion consisted of a 2 volt ampl i tude trapezoidal pulse w i t h 100 picosecond edge transitions. A time increment of 8t = 0.1 picoseconds was used i n the s imulat ion. T h e theoretical charge transfer efficiency as a funct ion of t ime for the G a A s C M C C D was obtained from the simulat ion results. T h e charge transfer efficiency i]{t) is defined as the ratio of the charge transferred to the transfer well to the charge in i t ia l ly residing i n the storage well . For the simulat ion of the 4-phase G a A s C M C C D Qph.2+Ph.3(t) (4.59) Qph.i+Ph.2(t = o) Figure 4.8 il lustrates the theoretical charge transfer efficiency of the G a A s C M C C D obtained f rom the computer s imulat ion described above. T h i s figure indicates that the packet of charge is essentially ful ly transferred at the completion of the clock transit ion per iod ttr = 100 picoseconds. T h i s result implies that the simulated transfer of the 57 charge packet was not transit time l imi ted and that the 4-phase G a A s C M C C D should exhibit good charge transfer at clock frequencies approaching fc = l / 4 i < r = 2.5 G H z . Sovero et al [9] measured a charge transfer efficiency of 0.99 per transfer for a G a A s C M C C D operating at a clock frequency of 2.5 G H z , support ing the above theoretical result. 58 Chapter 5 Device Fabrication Figure 5.1 shows a microphotograph of a 64-pixel, 4-phase G a A s C M C C D . The input section is located on the left-hand end of the device and is shown i n detail i n Figure 5.2. The control gates G i and G 2 are nominal ly 5 microns i n length and are separated by 2 micron gaps f rom the input ohmic contact, f rom the first transport electrode and f rom each other, respectively. There are 256 transport electrodes comprising the sixty- four pixels w i t h i n the transport section of the C M C C D . The transport electrodes are 3 microns i n length and are separated by 3 micron gaps. The phase one transport electrodes and the phase three transport electrodes are interconnected along the lower side of the device while the phase two transport electrodes and the phase four transport electrodes are interconnected along the upper side of the device. The entire transport section is encapsulated w i t h a cermet film. The output section is located at the right- hand end of the device and is shown i n detail i n Figure 5.3. The output ohmic contact, the control gate G3 and the output source follower amplifier comprise this section. The control gate G3 is 5 microns i n length and is separated by 2 micron gaps f rom the final transport electrode and from the output ohmic contact. The C M C C D channel is nominal ly 100 microns wide. The G a A s wafer that was used for producing the C M C C D was an undoped (100) oriented semi-insulating substrate onto which an n-type epitaxial layer was grown. T h e substrate was grown using the l iqu id encapsulated Czochralski technique [43] and had a sheet resistivity exceeding 10 7 ohm-cm. Metal-organic chemical vapour phase deposition [44] was used to grow the n-type active layer onto the substrate. T h i s layer consisted of a nominal 1-2 micron thick n~-buffer layer onto which the 0.25 micron n-type active layer was grown. The active layer was uniformly doped, w i t h No = 59 Figure 5.1: A microphotograph of the fabricated G a A s C M C C D . The bonding pads are 100 micron squares. 4.5 • 10 1 6 c m " 3 . The fabrication of the G a A s C M C C D required six mask levels that employed a 2.0 micron m i n i m u m design rule. The mask levels provided the patterns for fabricating the ohmic contacts, the isolated active regions, the m e t a l / G a A s Schottky barriers, the c e r m e t / G a A s Schottky barriers, the interconnect vias and the second level metall iza- t ion. Conventional contact l ithography was used to produce the device. A detailed list of the fabrication steps is described i n A p p e n d i x D . The ohmic contacts [45] of the C M C C D and the M E S F E T s were fabricated i n i - t ially. A 1.2 micron thick positive photoresist f i lm was patterned onto the wafer surface. A nominal 1200 A A u - G e ( 12 wt. % Ge ), 200 A N i and 1400 A A u ohmic contact metal l izat ion was sequentially deposited onto the wafer surface using thermal evapora- tion and electron-beam evaporation i n a high vacuum chamber. T h e unwanted metal was removed from the wafer surface using the photoresist liftoff method [46]. The 60 Figure 5.2: A microphotograph of the input section of the G a A s C M C C D . 61 ohmic contacts were completed by alloying the ohmic contact metal l izat ion w i t h the underlying G a A s . To achieve a planar device structure, mult iple energy proton isolation implants were used to isolate the active device regions. E a r l y investigators of the G a A s C G C C D used a mesa etch to achieve the required isolation [47,48]. A l t h o u g h this technique is simple to implement and provides good isolation, it has the drawback that the subse- quent l i thography is hampered by the different elevations between the mesa plateaus and the surrounding valleys. A planar G a A s C G C C D was realized using Schottky barrier channel stops [49] to isolate the active device regions. A channel stop must completely surround the active device region to be effective, which is a disadvantage as it becomes difficult to r u n first level metallizations directly between isolated re- gions. P r o t o n bombardment was used to isolate the active device regions of a G a A s C G C C D [50]. This method has the desirable feature that it does not alter the G a A s surface profile and thus does not have the associated problems of the above isolation techniques. The active regions for the C M C C D and the M E S F E T s were electrically isolated using a sequence of three proton implants at different beam energies. A nominal 7 m i - cron thick patterned photoresist f i lm was used as a barrier to protect the active device regions during the implants. The exposed G a A s was sequentially bombarded using protons at ion energies of 180 k e V , 90 k e V and 30 k e V . Fluences of 10 1 3 c m - 2 and 5 • 10 1 3 c m - 2 were used for the first two implants and the f inal implant , respectively. N o post- implantation anneal was performed. G o o d electrical isolation was achieved, w i t h the measured resistivity of the deactivated G a A s exceeding 10 5 ohm-cm. The m e t a l / G a A s Schottky barriers comprising the transport electrodes and the M E S F E T gates were patterned using the photoresist liftoff method. A nominal 500 A T i , 100 A P t and 2150 A A u multi layer film was sequentially electron beam evaporated onto the wafer surface through a 1.2 micron thick photoresist mask. The 62 photoresist and the unwanted metall ization were removed i n an ultrasonic N-methyl - 2-pyrrolidone solvent bath. The c e r m e t / G a A s Schottky barriers w i t h i n the interelectrode gaps of the C M C C D were patterned using the photoresist liftoff process. A nominal 5000 A thick f i l m of C r - S i O ( nominal 45 wt. % C r ) was rf diode sputtered from a 6 inch composite target onto the wafer surface through a 2.1 micron thick photoresist mask. The target was separated f rom the substrate table by 1.5 inches and was sputtered at 13.56 M H z i n a 10 mTorr argon environment [51]. The input power to the target was approximately 250 watts rms, achieving a dc target bias of -800 volts relative to the substrate table. It was observed that a target bias of less than -1000 volts was detrimental to the photoresist f i l m . A n extended 24 hour chamber preconditioning period was required prior to the 30 minute deposition to achieve a uni form C r : S i O f i l m . The photoresist and the unwanted cermet f i l m were removed i n an ultrasonic N-methyl-2-pyrrolidone solvent bath subsequent to the deposition. F igure 5.4 shows a transmission electron microphotograph of the structure of the C r : S i O film. The dark areas correspond to the regions of highest atomic density and are believed to be the result of chromium compounds [52]. Energy dispersive x-ray analysis ( E D X ) was used to ascertain the chemical composition of the film and it was found to be 41.7 weight percent chromium, which is i n agreement w i t h the manufacturer's target specification of 45 weight percent chromium. A 1.8 micron thick interlayer dielectric film of polyimide was used to protect the active G a A s surface and to separate the two metal l izat ion levels f rom each other. A layer of di luted D u Pont P Y R A L I N PI-2550 polyimide was applied to the G a A s wafer surface using a spin-on technique [53]. The polyimide was di luted to a lower viscosity using D u Pont T-9039 thinner at a 1:1 di lut ion ratio. The polyimide was imidized i n a controlled forced air convection oven using a low temperature 250 °C heating cycle for nearly 3 hours [54]. T h i s heating cycle was below the eutectic temperature of the ohmic 63 Figure 5.4: A transmission electron microphotograph of the C r : S i O ( 45 wt. % C r ) f i lm at 150,000 times magnification. The number ' 1 ' i n the label corresponds to a height of 2.0 m m at this magnification. Figure 5.5: A microphotograph of the plasma etch profile of a 5 micron square v i a etched through a 1.8 micron thick polyimide film. 64 contacts [45] and the annealing temperature of the proton isolation implants [55,56] and consequently d i d not alter the electrical characteristics of these fabricated structures. The interconnect vias between the first level metal l izat ion and the second level metal l izat ion were chemically etched through the imidized polyimide f i l m using a three step plasma etch process employing plasma enhanced chemical vapour etching [57,58]. A nominal 600 A thick t i t a n i u m f i l m was deposited onto the imidized polyimide surface using electron beam evaporation. The surface of the t i t a n i u m f i l m was subsequently covered w i t h a 1.2 micron thick patterned photoresist mask. The exposed regions of the t i t a n i u m film were etched through the photoresist mask using a C F 4 / 0 2 plasma, transferring the photoresist pattern to the t i tan ium film. The exposed regions of the polyimide film were etched through the t i tan ium mask using an O2 p lasma, transferring the original photoresist pattern to the polyimide film. The photoresist film was also removed from the t i t a n i u m surface during this etch. The t i t a n i u m mask was removed i n a final CF4/O2 plasma etch. Figure 5.5 shows the resultant vert ical etch profile of a 5 micron square interconnect v ia etched through the polyimide film using the above plasma etch process. The second level metal l izat ion was patterned using the photoresist liftoff method. A nominal 500 A T i and 4000 A A u multi layer metal l izat ion was sequentially electron beam evaporated onto the wafer surface through a 2.1 micron thick photoresist mask and the subsequent liftoff was performed i n an ultrasonic acetone bath , completing the fabrication of the G a A s C M C C D . The intermediate t i t a n i u m layer provided the required adhesion between the polyimide film and the second level metal l izat ion gold layer. 65 Chapter 6 Testing and Evaluation A series of dc threshold voltage measurements were performed on the G a A s C M C C D prior to packaging the device to determine if the control gates and the transport elec- trode arrays were functional . A Tektronix T E K - 5 7 6 curve tracer attached to an Alessi probe station was used to make these measurements. The input ohmic contact and the output ohmic contact of the C M C C D were used as the dra in and the source, respec- tively. A 5 volt dra in to source bias was applied to the device. E a c h of the three control gates and each of the four transport electrode arrays were biased, i n t u r n , negatively w i t h respect to the source node unt i l no further change was observed i n the dra in to source current. The observed gate to source voltage corresponding to this condit ion was recorded as the threshold voltage. Table V contains a list of the measured threshold voltages of the G a A s C M C C D . The C M C C D was mounted i n a 32 p i n ceramic flat package. A discrete D E X C E L - 2502 G a A s M E S F E T die was also mounted i n the package for use as a reset switch at the output ohmic contact of the C M C C D . The C M C C D , the on-chip G a A s M E S F E T source follower amplifier and the discrete G a A s M E S F E T die were wire-bonded i n the package using the configuration shown i n Figure 6.1. T h i s packaging configuration resulted i n a m i n i m u m parasitic capacitance Co/p at the output ohmic contact of the C M C C D . This is desirable for obtaining m a x i m u m output signal amplitudes f rom the C M C C D , as the signal charge arr iving at the output ohmic contact is converted to a voltage w i t h an ampli tude inversely proport ional to Co/p- The on-chip G a A s M E S F E T source follower amplifier buffered the output ohmic contact of the C M C C D from the external output electronics. It consisted of two deple- t ion mode 2 micron by 30 micron M E S F E T s configured i n a totem pole arrangement 66 Figure 6.1: The wire-bonding configuration used to interconnect the C M C C D , the on-chip G a A s M E S F E T source follower amplifier and the discrete G a A s M E S F E T die. Figure 6.2: The insertion loss of the on-chip G a A s M E S F E T source follower amplifier measured from 300 k H z to 200 M H z . 67 Gate Threshold Voltage (Volts) G i -2.4 G 2 -2.45 G 3 -2.4 P h . 1 -1.8 P h . 2 -1.8 P h . 3 -1.85 P h . 4 -1.7 Table V : The measured threshold voltages of the G a A s C M C C D . which provided a low capacitance, high impedance load to the output ohmic contact of the C M C C D . A threshold voltage of approximately -2.2 volts and a saturation current of approximately 5.0 milliamperes was measured for these transistors using a Tektronix T E K - 5 7 9 curve tracer. The insertion loss of the source follower amplifier terminated i n 50 ohm source and load impedances was measured f rom 300 k H z to 200 M H z using a Hewlet t -Packard H P - 8 7 5 3 A network analyzer and an HP-85046A s-parameter test set. The measured insertion loss is shown i n Figure 6.2. The G a A s C M C C D was operated i n the V H F band at 100 M H z and was evaluated for operation at this frequency using the impulse response method [59] and the insertion loss method [60]. The C M C C D was operated using the signal levels listed i n Table V I , which were provided by a test circuit comprised of emitter-coupled logic ICs and discrete G a A s M E S F E T s . A schematic diagram of the C M C C D test circuit is provided i n A p p e n d i x E . Charge injection into the C M C C D was obtained using the diode cutoff method described i n Chapter 2. The test circuit had a bandwidth of approximately 150 M H z and was the l imi t ing factor for testing the C M C C D at higher clock frequencies. A Tektronix P G - 5 0 2 250 M H z pulse generator and a T E K - 7 9 0 4 oscilloscope frame mounted w i t h a 7A24 dual trace amplifier and a 7B92A dual timebase unit were used for the impulse response measurement and a Hewlett -Packard H P - 8 7 5 3 A network analyzer w i t h an HP-85046A s-parameter test set was used for the insertion loss measurement. 68 Figure 6.3: The qualitative demonstration of the performance of the G a A s C M C C D for 100 M H z operation. Figure 6.4: The impulse response of the G a A s C M C C D for 100 M H z operation. 69 Figure 6.5: The insertion loss of the G a A s C M C C D for 100 M H z operation. Frequency Response 10\ , ,— , 3 O -nnn u nn u n t ^-10 &-20 N -30 s §-40 -50 rj = 0.998 Measured data. a Theory O 10 20 30 40 Input Signal Frequency (MHz) 50 Figure 6.6: The theoretical insertion loss of the G a A s C M C C D for 100 M H z operation. 70 Gate Signal level(s) ( volts ) I / P 0 to +0.5 Gx -0.8 to -5.8 G 2 +0.3 to -4.7 P h . 1 0 to -5.0 P h . 2 0 to -5.0 P h . 3 0 to -5.0 P h . 4 0 to -5.0 R / G 0 to -5.0 G 3 -2.7 to -2.7 B / D +5.0 to +5.0 B / S -5.2 to -5.2 R / S 0 to 0 Table V I : The signal levels applied to the G a A s C M C C D for operation at 100 M H z . A qualitative demonstration of the performance of the G a A s C M C C D for 100 M H z operation is shown i n Figure 6.3. The oscillograph contained i n this figure displays the C M C C D input signal along the upper signal trace and the processed C M C C D output signal along the lower signal trace. The input signal was obtained by passing a trape- zoidal pulse through a passive lowpass filter having a cutoff frequency of 20.5 M H z . The damped oscillations were a result of the filter response to the 1 nanosecond transitions of the input pulse. The processed C M C C D output signal was obtained by filtering the buffered C M C C D output signal using a lowpass filter similar to the one used at the input . Figure 6.3 demonstrates the good signal fidelity of the C M C C D for 100 M H z operation. Figure 6.4 shows an oscillograph of the impulse response of the C M C C D for 100 M H z operation. The C M C C D input signal is along the upper signal trace and the buffered C M C C D output signal is along the lower signal trace. The input signal con- sisted of a 5 nanosecond wide, 2.4-volt amplitude, 1 nanosecond transi t ion trapezoidal impulse. The buffered C M C C D output waveform contains the modulat ion envelope of the impulse and the passive feedthrough of the quadrature clocks. The modulat ion 71 M e t h o d Charge Transfer Efficiency Impulse Response 1.00 Insertion Loss 0.998 Table V I I : The charge transfer efficiencies of the G a A s C M C C D for 100 M H z operation. envelope of the impulse consists of a single pulse transient delayed by 640 nanoseconds w i t h respect to the input signal. The charge transfer efficiency of the C M C C D was determined f rom the C M C C D impulse response using the calculation [59] Npeak = NT(l-ri) (6.1) where NT is the number of single electrode transfers through the C M C C D and Npeak is the number of pixel transfers between the peak of the observed C M C C D impulse response and the peak of the ideal C M C C D impulse response. The computed charge transfer efficiency is l isted i n Table V I I . The insertion loss of the G a A s C M C C D for 100 M H z operation is shown i n F i g - ure 6.5. A -10 d B m swept frequency sinusoidal signal spanning the range f rom 300 k H z to the Nyquist frequency of 50 M H z was applied to the input ohmic contact of the C M C C D and the insertion loss of the device was measured. Figure 6.5 indicates that the C M C C D has a nearly uni form insertion loss over the entire 50 M H z input signal bandwidth , which is indicative of good performance. The charge transfer efficiency of the C M C C D was determined by fitting the equation [60] A D B = 20 log A 0 e x p -NT(l - ?y) cos (f (6.2) to the measured data. Here AJ,B is the insertion loss, A 0 is a constant ampli tude term, u> is the input signal frequency and fc is the C M C C D clock frequency. The calculated charge transfer efficiency using the insertion loss method is l isted i n Table V I I and the curve fit to the measured data is shown i n Figure 6.6. 72 Chapter 7 Comments 7.1 Summary Contributions were made towards developing the G a A s C M C C D for h igh frequency sig- na l processing applications. The design, implementation and evaluation of the C M C C D were considered and are summarized i n this section. The design equations for determining the active layer requirements of the G a A s C M C C D were described i n Chapter 2. The design protocol that was outl ined assumes that the active layer was uniformly doped and was constrained to have a pinch-off voltage that was typical of an n-type depletion mode M E S F E T . It was demonstrated that the fu l l well charge confinement and the ful l well capacity of the C M C C D were simultaneously maximized if the device was fabricated on a t h i n , highly doped active layer. This result suggested that the opt imum C M C C D active layer was similar to the active layer of a low to medium power n-type depletion mode G a A s M E S F E T , which was advantageous when the two devices were integrated monolithically. It was indicated i n Chapter 1 that the G a A s C G C C D could not be monoli thical ly integrated w i t h G a A s M E S F E T s i n a simple manner as the C G C C D was typical ly fabricated on thick, l ightly doped active layers which were not directly compatible w i t h M E S F E T s . It was demonstrated i n Chapter 3 that a c e r m e t / G a A s Schottky barrier diode exhibits rectification properties similar to that of a m e t a l / G a A s Schottky barrier diode w i t h a large series resistance. The Schottky barrier height and the ideality factor of the c e r m e t / G a A s junct ion were determined using a distr ibuted resistive gate Schottky barrier diode model of the fabricated planar c e r m e t / G a A s Schottky barrier diode. A Schottky barrier height of 0.64 eV and an ideality factor of 1.17 were determined for the c e r m e t / G a A s junct ion. 73 A transmission line model described i n Chapter 3 for the c e r m e t / G a A s junct ion w i t h i n an interelectrode gap of the C M C C D was used to demonstrate that the surface potential distr ibution along the gap was monotonic for a l l frequencies. A differential length of the transmission line model consisted of a differential series impedance and a differential shunt admittance. The series impedance modeled the cermet f i l m and was comprised of a parallel resistance and capacitance. The shunt admittance modeled the depletion layer capacitance of the underlying G a A s . It was determined from an analysis of the transmission line model that the high frequency surface potential variat ion along a gap of the C M C C D was independent of the distr ibuted cermet f i l m resistance. This was an important result as it indicated that the operation of the C M C C D was not cri t ical ly dependent upon the distributed cermet f i lm resistance, provided that it was large enough to satisfy the power constraints of the quadrature clocks. It was further demonstrated i n Chapter 3 using the transmission line model that the distributed cermet f i l m capacitance was preferably greater than the distr ibuted depletion layer capacitance i n order to maintain a nearly linear surface potential variat ion along the gap of a C M C C D for al l frequencies. This was desirable for achieving an opt imal uni form tangential electric field distr ibution w i t h i n the C M C C D active layer to assist charge transfer. A two-dimensional computer model for investigating the operation of the G a A s C M C C D was described i n Chapter 4. A unit cell representing a single pixel of a 4- phase G a A s C M C C D consisted of a domain comprised of the active layer subdomain and the semi-insulating substrate subdomain. The transport electrodes were defined as equipotential boundaries and the interelectrode gaps were defined as linear potential boundaries. A finite difference grid was superimposed onto the unit cell , on which the semiconductor equations were solved. A Newton iteration scheme w i t h successive relaxation was used to solve the finite difference equations for the potential and the electron density. Computer simulations for the static potential distributions w i t h i n the 74 C M C C D were used to determine the theoretical m a x i m u m frequency of operation of the device as a function of the interelectrode gap length and the peak clock voltage amplitude for a constant transport electrode pi tch. It was demonstrated that the C M C C D transport electrodes should have a m i n i m u m length to achieve the m a x i m u m frequency of operation for the lowest possible power requirements. A simulat ion of the dynamic single electrode transfer of a half fu l l well of charge i n 100 picoseconds was demonstrated. This s imulat ion indicated that the charge packet was essentially ful ly transferred by the end of the transfer interval, suggesting that the C M C C D w i l l demonstrate good performance at frequencies approaching 2.5 G H z . A six mask level fabrication process for producing the G a A s C M C C D was de- scribed i n Chapter 5. Conventional contact l i thography was used to fabricate the device. The six mask levels provided the patterns for the ohmic contacts, the proton isolation implants, the m e t a l / G a A s Schottky barriers, the c e r m e t / G a A s Schottky barri- ers, the interconnect vias and the second level metal l izat ion. The A u - G e / N i / A u ohmic contacts, the T i / P t / A u m e t a l / G a A s Schottky barriers and the C r : S i O c e r m e t / G a A s Schottky barriers were patterned directly on the n-type active layer. Three proton i m - plants at different beam energies were used to isolate the C M C C D active region and the M E S F E T source follower amplifier active region, maintaining a planar device structure. A polyimide interlayer dielectric film was used to separate the first level metal l izat ion from the second level metal l izat ion. Connections between the two metal l izat ion levels were made through interconnect vias that were plasma etched through the polyimide film. The operation of the G a A s C M C C D was described i n Chapter 6. The dc threshold voltage measurements were used to select the C M C C D f rom the fabricated devices. The C M C C D , the on-chip M E S F E T source follower amplifier and a discrete G a A s M E S F E T die were wire-bonded i n a 32 p i n ceramic package. T h e M E S F E T was used as a reset switch on the output ohmic contact of the C M C C D . A test circuit was used to 75 provide the signals to the packaged components. The diode cutoff method described i n Chapter 2 was used to inject charge into the C M C C D . The C M C C D was operated using a clock frequency of 100 M H z and was evaluated at this operating frequency using the impulse response method and the insertion loss method. The C M C C D demonstrated good performance at 100 M H z clock frequency w i t h charge transfer efficiencies of 1.00 and 0.998 calculated respectively using the above two evaluation techniques. 7.2 Considerations for Future W o r k T h i s work was focused on the design, implementation and evaluation of a 64-pixel, 4-phase G a A s C M C C D . The issues which could be addressed i n further developing this device are described i n this section. The 64-pixel, 4-phase G a A s C M C C D that was developed i n this work was not ful ly opt imized. The fabricated C M C C D had an active layer w i t h a uni form donor den- sity of 4.5 • 10 1 6 c m - 3 to a depth of 0.25 microns. These active layer parameters were satisfactory for demonstrating the operation of the C M C C D w i t h a G a A s M E S F E T , but would not necessarily yield the best possible device performance. The 3 micron C M C C D transport electrode length was chosen for convenience, i n order that the fab- ricat ion requirements to produce the device would be reduced. A revision to the above C M C C D structure would consist of using a C M C C D active layer w i t h a uni form donor density of approximately 2.0 • 10 1 7 c m - 3 to a depth of approximately 0.1 microns which is more consistent w i t h the active layer requirements of a nominal -2.0 volt n-type depletion mode G a A s M E S F E T . Furthermore, the analysis described i n Chapter 2 indicates that the revised active layer parameters are preferred, as the signal charge confinement and the signal charge capacity of the C M C C D would be improved. The revised C M C C D transport electrode length would be 1.0 microns or less i n order that the high frequency performance and the associated power requirements of the C M C C D would be improved as described i n Chapter 4. 76 The monolithic integration of the peripheral support electronics w i t h the G a A s C M C C D is essential for obtaining m a x i m u m performance f rom the device. In particular the output reset switch and the output signal processing c ircuitry should be directly integrated w i t h the C M C C D . This level of integration would increase the operating bandwidth , increase the dynamic range and increase the signal to noise ratio of the C M C C D . T h i s would be a consequence of the reduction i n the parasitic component values attached to the output node of the C M C C D . A 2-phase G a A s C M C C D structure could also be considered for further investi- gation as it would maximize the ut i l izat ion of the active device area by achieving a greater pixel density and it would significantly reduce the clock driver circuit require- ments. Hansell developed a castellated 2-phase G a A s C G C C D that exhibited a charge transfer efficiency of 0.93 [20]. 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T R I U M F , private communicat ion. 82 A p p e n d i x A B N L Experiment 787 The development of the G a A s C M C C D was inspired by the need for a wideband data acquisition system for Experiment 787, which is currently being prepared for implemen- tat ion at the Brookhaven Nat ional Laboratory [61]. T h i s nuclear physics experiment is being conducted collaboratively w i t h scientists and engineers from Brookhaven, Prince- ton Universi ty and T R I U M F . The experimental goals of Experiment 787, the relevant technical aspects of the detector apparatus for this experiment and the applicat ion of a C M C C D i n the data acquisition system for instrumenting the detector are described i n this appendix. The development of a comprehensive Standard M o d e l for describing the interac- tions that occur amongst the elementary subatomic particles is of current interest to nuclear physicists. The existence of three neutrino generations has been established w i t h i n the current framework of this model and must be experimentally verified. A test for the number of neutrino generations w i l l be attempted i n Experiment 787 by directly observing and measuring the rate of decay of a kaon to a pion and neutr ino/ant i - neutrino pair . T h i s part icular decay sequence is extremely rare and is anticipated to occur once i n approximately every ten b i l l ion kaon decays [62]. Should the observed decay rate lie i n the vic ini ty of the expected rate, then a positive test for the existence of three neutrino generations w i l l have been made. It has been suggested that new gen- erations of neutrinos, or perhaps, new elementary particles may exist if the observed rate of decay of a kaon to a pion and neutrino/anti -neutrino pair is greater than about five times the anticipated rate [63]. A sophisticated rare kaon decay spectrometer is currently being developed for Experiment 787 to provide the required detection capabil i ty for observing the decay 83 of a kaon to a pion and neutrino/anti-neutrino pair. A cross-sectional view of this apparatus displaying its relevant features is shown i n Figure A . l . The detector is cyl indrica l i n shape w i t h overall dimensions of approximately 6 metres i n length by 5 metres i n diameter. The target is located along the central axis of the detector core and is surrounded by a cyl indrical drift chamber [64] that is enclosed w i t h i n a scinti l lat ion counter range stack. A burst of highly energetic kaons f rom the B N L accelerator arrives along the central axis of the detector penetrating the target. The major i ty of incident kaons are stopped w i t h i n the target and decay into other particles. The newly formed decay particles traverse the detector i n a manner that is dependent upon their energy, mo- mentum and lifetime. The cyl indrical drift chamber is used to monitor the energies and the trajectories of the particles as they are emitted f rom the target. The pions that result f rom a decaying kaon pass through the cyl indrica l drift chamber and are u l t i - mately stopped w i t h i n the scinti l lation counter range stack where they decay into other particles. A primary function of the scinti l lation counter range stack is to provide the positive identification of the pions that emerge from the drift chamber. T h i s is achieved by tracking the decay of the pion to a muon and the subsequent decay of the muon to an electron using energy versus time measurements. These interactions are detected as electrical signals at the output of the photomultipl ier tubes that are attached to the scinti l lation counter range stack. The ideal output waveform obtained from a range stack photomultipl ier tube for the pion to muon to electron decay sequence is shown i n Figure A . 2 . The waveform shown i n Figure A . 2 is a simplif ication of the complex series of interactions that occur between the energetic particles and the nuclear instruments. In principle, the observed pulses tend to pile up onto each other due to the previous history w i t h i n the spectrometer. Consequently, the waveform i l lustrated i n Figure A . 2 for the practical case w i l l consist of many superimposed pulses having peak separations that 84 BEAM / VETO PHOTOTUBES RANGE STACK 1 PHOTOTUBES • * - B E A M MWPC SC1NT; i •TARGET TARGET RM.SUPPORT" Figure A . l : A cross-sectional view of the B N L Experiment 787 rare kaon decay spec- trometer. 85 Decay Energy us Time 50 40 >»• •<s> CO o 30 20 - ^10 O o 10 20 30 40 Time (ns) 50 60 Figure A.2: The ideal output waveform for a pion to muon to electron decay sequence obtained from a photomultiplier tube attached to the end of the scintillation counter range stack. The leading peak corresponds to the energy deposited by a pion to muon decay and the trailing peak corresponds to the energy deposited by the subsequent muon to electron decay. The vertical bars represent discrete pulse amplitudes obtained for a 2 nanosecond sampling rate [62]. Range Stack PMT 500 MHz Timebase Trigger A/D Converter Data Routing Off-line Processing Off-line Processing Off-line Processing Figure A.3: A system block diagram of the GaAs CMCCD based data acquisition system for the analog to digital conversion of a signal from a range stack photomultiplier tube [65]. 86 Figure A . 4 : The 64-pixel, 4-phase G a A s C M C C D providing frequency compression. The input signal along the upper trace ( 20 n s / c m ) acquired at 483 M H z consists of two superimposed 30 ns pulses. The output signal along the lower trace ( 1 / /s /cm ) shows the processed input signal after frequency compression. vary f rom zero to many tens of nanoseconds. A data acquisition system employing a 64-pixel, 4-phase G a A s C M C C D is currently being developed at T R I U M F for recording these waveforms. A block diagram of the G a A s C M C C D data acquisition system [65] is shown in Figure A . 3 . In this applicat ion the G a A s C M C C D provides frequency compression of a 250 M H z band-l imited analog input signal. The input signal applied to the C M C C D is obtained from a photomultipl ier tube attached to the scinti l lat ion counter range stack. A n externally generated acquisition trigger pulse enables the applicat ion of a 500 M H z high frequency clock to the C M C C D . The acquisition cycle occurs for 128 nanosec- onds f i l l ing the C M C C D w i t h sixty-four discrete samples of the input signal. The two nanosecond resolution of the input signal is considered sufficient for discr iminating the two energy peaks that are observed during the pion to muon to electron decay se- 87 quence [62]. Subsequent to the completion of the data acquisition cycle, a 7.81 M H z low frequency clock pulse burst is applied to the C M C C D compressing the acquired signal by a factor of sixty-four. The compressed signal is transmitted to an analog to digi tal converter and the binary data resulting f rom the analog to digi ta l transformation is routed to a data bus for sparse data processing and distr ibut ion to off-line computer re- sources. F igure A . 4 shows an oscillograph i l lustrat ing the prel iminary results obtained for a 64-pixel, 4-phase G a A s C M C C D operating i n the frequency compression mode. 88 A p p e n d i x B Polar Transformation of V(y) The complex harmonical ly varying surface potential is given as %^)=sMl|'Vff"^ • smh[L s 7(u;)] where the factor e3ujt has been suppressed. Let (L9-yh(u) = a(y,L>)+]b(y,u) and Lg^(u) — C(UJ) + jd(u>) w i t h 7 (0 ; ) defined as 7(<*>) = WRCMCD exp yjl + (URCMCCM) The functions a(y,u>), b(y,u>), c(ui) and d(to) are WRCMCD J ( 1 - arctan I — —— . .2 XURCM^CM' • a(y,u) c(u) d(u) ^Jl + {WRCMCCM)2 URCMCD , \fl + (URCMCCM)2 WRCMCD , y^l + (URCMCCM)2 URCMCD {Lg - y) cos (If, - y) sin 1 1 / 1 - arctan I — I KUJKCM^CM 1 / 1 - arctan ( — — — Lg COS Lg sin arctan . 2 KURCM&CM 1 / 1 - arctan I —— — 2 \URCM&CM \ yjl + (WRCMCCM) Substitute equation B.2 and equation B.3 into equation B . l yields \r( \ sinh(a + j6) v{y,u) = ^-77— ; — - V o sinh(c + jd) gjd ^ c g jd ea [cos(6) + j sin(o)] — e~a [cos(o) — j sin(o)] e c [cos(d) + j sin(cf)] — e _ c [cos(d) — j sin(rf)] sinh(a) cos(6) + j cosh(a) sin(6) V0 sinh(c) cos(cf) + j cosh(c) sin(d) Vo 89 Transforming equation B.9 into polar form yields J s i n h 2 ( a ) cos2(fe) + cosh 2(a) sin 2(6)Z arctan f c°t (°J s i nS) )/sinh 2 (c) cos2(rf) + cosh 2(c) sin 2(rf)Z arctan (^ffiffj) Using the trigonometric identities s i n h 2 ( 2 ) = c o s h 2 ( » - 1 and ( B . H ) sin 2 (^) = l - c o s 2 ( z ) (B.12) gives V(y,u) = V0H(y,u)ie(y,Lo) (B.13) where H(y,u>) is the normalized magnitude of the surface potential TT(„ .-A ICOsh2 ^ ~ C ° s 2 ̂ y ' ̂  1̂* m U ) H y y > u ) - 1 2 r / \ i 2 U r \ i (B.14J \ cosh [C(UJ)\ — cos^ |a(w)J / and Q(y,u>) is the phase shift of the surface potential 0(y,u>) = arctan (coth[a(y,a;)] tan[6(y,u>)]) — arctan (coth[c(o;)] tan[<i(a;)]) . (B.15) 90 Apendix C Newton's Method Newton's method [39] is a numerical technique for finding the roots of a general function /(C) = 0 a n a is described i n this appendix. Consider a point that is i n the vic ini ty of a root of the function /(C)- The funct ion /(C) can be expanded i n a Taylor series about the point Q to give / ( O = / (Ok. + (c - c,)/'(C)k. + • • • + —xc - o r / ( m ) ( 0 k . + • • • . (c.i) m ! A root of the equation /(C) = 0 can be obtained approximately by replacing /(C) w i t h the first two terms of the expansion given i n equation C . I /(C)lc, + (C-CO/'(C)lc. = o • ( C 2 ) Rearranging equation C.2 and performing the function evaluations at Q gives < = G - $ § • ( C 3 ) The value of £ computed i n this manner is an improved estimate for the original root (i of the function /(C), and can replace Q i n equation C.3 to provide an even better estimate for the root. This can be writ ten i n the generalized form W+i = W £(£1 (CA) f rom which the correction factor for the Ith iterate is $C' = C'+1-C' • ( C 5 ) F r o m equations C.4 and C.5 one obtains /(C) + *C7'(C) - o (c.6) which forms the basis of the Newton iteration technique for numerically solving the set of finite difference equations listed i n Table I V . 91 A p p e n d i x D Detailed Device Fabrication Procedure 1. O h m i c contact formation 1.1— 3 m i n . immersion i n an ultrasonic acetone bath . 1.2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 1.3— 1 m i n . N 2 wafer dry. 1.4— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4110 photoresist. 1.5— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 1.6— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 14 sec through the 'ohmic contact' mask. 1.7— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 1.8— Immerse the wafer i n a 20 ml:200 m l , N H 4 O H : D I H 2 0 oxide etch bath for 30 sec. 1.9— 1 m i n . D I H 2 0 rinse and subsequent 1 m i n . N 2 wafer dry. 1.10— Sequentially evaporate the following metal films under high vacuum 1.10.1— 1150 A A u - G e ( 12 wt. % Ge ), 1.10.2— 200 A N i , 1.10.3— 1400 A A u . 1.11— 3 m i n . immersion i n an ultrasonic acetone bath to lift-off the unwanted metal . 1.12— 3 m i n . immersion i n an ultrasonic acetone bath. 1.13— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 1.14— 1 m i n . N 2 wafer dry. 1.15— A l l o y ohmic contacts @ 468 °C for 1.5 m i n . i n a zone controlled quartz tube furnace w i t h 0.8 1/min N 2 flowing through the tube. 2. Proton isolation implants 92 2 .1— 3 m i n . immersion i n an ultrasonic acetone bath . 2 .2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 2 .3— 1 m i n . N 2 wafer dry. 2.4— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4620 photoresist. 2 .5— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 2.6— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 98 sec through the 'proton implant ' mask 2.7— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 2 .8— Postbake the photoresist coated wafer i n a forced air oven @ 120 ± 2 °C for 30 m i n . 2.9— Perform the multiple-energy proton implants 2 .9 .1— E i = 180 k e V , D i = 10 1 3 c m " 2 , 2.9.2— E 2 = 90 k e V , D 2 = 10 1 3 c m " 2 , 2.9.3— E 3 = 30 k e V , D 3 = 5 • 10 1 3 c m " 2 . 2.10— 15 m i n . immersion i n a hot N-methyl-2-pyrrolidone bath to remove the photoresist. 3. M e t a l / G a A s Schottky barrier formation 3 .1— 3 m i n . immersion i n an ultrasonic acetone bath . 3.2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 3 .3— 1 m i n . N 2 wafer dry. 3.4— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4110 photoresist. 3 .5— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 3.6— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 14 sec through the ' m e t a l / G a A s Schottky barrier ' mask. 3.7— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 93 3.8— Immerse the wafer i n a 20 ml:200 m l , N H 4 O H : D I H 2 0 oxide etch bath for 30 sec. 3.9— • 1 m i n . D I H2O rinse and subsequent 1 m i n . N 2 wafer dry. 3.10— Sequentially evaporate the following metal fi lms under h igh vacuum 3.10.1— 500 A T i , 3.10.2— 100 A P t , 3.10.3— 2150 A A u . 3 .11— 15 m i n . immersion i n a hot N-methyl-2-pyrrolidone ultrasonic bath to l ift- off the unwanted metal . 3.12— 5 m i n . immersion i n an ultrasonic acetone bath. 4. C e r m e t / G a A s Schottky barrier formation 4 . 1 — 3 m i n . immersion i n an ultrasonic acetone bath . 4 .2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 4 .3— 1 m i n . N 2 wafer dry. 4 .4— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4210 photoresist. 4 . 5— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 4 .6— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 28 sec through the ' c e r m e t / G a A s Schottky barrier ' mask. 4 .7— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 4 .8— Postbake the photoresist coated wafer i n a forced air oven @ 120 ± 2 °C for 30 m i n . 4 .9— Immerse the wafer i n a 20 ml:200 m l , N H 4 O H : D I H 2 0 oxide etch bath for 30 sec. 4.10— 1 m i n . D I H 2 0 rinse and subsequent 1 m i n . N 2 wafer dry. 4 .11— rf diode sputter C r - S i O ( 45 wt. % C r . ) onto the surface —frequency: 13.56 M H z , —background chamber pressure: < 2 • 1 0 - 6 mTorr , —gas: A r , —deposi t ion chamber pressure: 10 mTorr , 94 — r f forward power: w 250 Watts , rf reflected power: < 13 Watts resulting i n a target bias of -800 volts, —Precondi t ion t ime: 24 hrs., —Depos i t ion t ime: 30 m i n . 4 .12— 5 m i n . immersion i n a hot N-methyl-2-pyrrolidone ultrasonic bath to lift-off the unwanted cermet f i l m . 4 .13— 5 m i n . immersion i n an ultrasonic acetone bath. 5 . I n t e r c o n n e c t v i a f o r m a t i o n 5 . 1 — 3 m i n . immersion i n an ultrasonic acetone bath. 5 .2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 5 .3— Immerse the wafer i n a 20 ml:200 m l , N H 4 O H : D I H 2 0 oxide etch bath for 30 sec. 5.4— 1 m i n . D I H2O rinse and subsequent 1 m i n . N 2 wafer dry. 5 .5— Spin-coat the wafer @ 4000 R P M for 1 m i n . w i t h D u Pont P Y R A L I N P I - 2550 polyimide di luted to a volume ratio of 1:1 w i t h D u Pont T-9039 th in- ner. 5.6— Imidize polyimide i n a forced air oven @ 250 ± 2 °C for 3 hrs. 5.7— Evaporate 600 A of T i onto the polyimide surface under high vacuum. 5.8— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4110 photoresist. 5 .9— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 5.10— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 14 sec through the 'interconnect vias ' mask. 5 .11— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 5.12— P l a s m a etch the interconnect vias —background chamber pressure: < 25 mTorr , — r f power: 150 Watts , 5.12.1— PcF* = 256 mTorr , P 0 2 = 23 m T o r r and P c k m t e r = 279 m T o r r for 90 sec. 5.12.2— P C F 4 = 0 mTorr , P o 2 = 250 m T o r r and Pchamber = 250 m T o r r for 10 m i n . 95 5.12.3— P C F 4 = 256 mTorr , P o 2 = 23 m T o r r and P c h a m b e r = 279 mTorr for 90 sec. 6. Second level interconnect metal formation 6.1— 3 m i n . immersion i n an ultrasonic acetone bath. 6.2— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 6.3— 1 m i n . N 2 wafer dry. 6.4— Spin-coat the wafer @ 4000 R P M for 30 sec. w i t h A Z 4210 photoresist. 6 .5— Softbake the photoresist coated wafer i n a forced air oven @ 90 ± 2 °C for 30 m i n . 6.6— Expose the photoresist coated wafer to 405 n m , 4.5 m W c m - 2 ultraviolet light for 28 sec through the 'second level metal l izat ion ' mask. 6.7— Spray develop the exposed photoresist using A Z 400K developer di luted to a volume ratio of 1:3 w i t h D I H 2 0 . 6.8— Sequentially evaporate the following metal films under high vacuum 6.8.1— 500 A T i , 6.8.2— 4000 A A u . 6.9— 3 m i n . immersion i n an ultrasonic acetone bath to lift-off the unwanted metal . 6.10— 3 m i n . immersion i n an ultrasonic acetone bath . 6.11— 3 m i n . sequential immersion i n each of hot trichloroethylene, hot acetone, and hot 2-propanol baths. 6.12— 1 m i n . N 2 wafer dry. 96 A p p e n d i x E Test Circui t for V H F Operation The G a A s C M C C D was operated i n the V H F band at 100 M H z using the test circuit i l lustrated i n Figure E . l . Figure E . l : T h e schematic diagram of the test circuit used to operate the C M C C D i n the V H F band. 97

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