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An interference monitor for a radio observatory Romalo, David N. 1988

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INTERFERENCE MONITOR FOR A RADIO OBSERVATORY by DAVID N. ROMALO B.Sc. Elec. Eng., University of Alberta, 1982 A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE  in THE FACULTY OF GRADUATE STUDIES Department of Electrical Engineering  We accept this thesis as conforming to the required standard  THE UNIVERSITY OF BRITISH COLUMBIA April, 1988 © David N. Romalo, 1988  In  presenting  degree at the  this  thesis  in  University of  partial  fulfilment  of  of  department  this thesis for or  by  his  or  requirements  British Columbia, I agree that the  freely available for reference and study. I further copying  the  representatives.  an advanced  Library shall make it  agree that permission for extensive  scholarly purposes may be her  for  It  is  granted  by the  understood  that  head of copying  my or  publication of this thesis for financial gain shall not be allowed without my written permission.  Department The University of British Columbia Vancouver, Canada  DE-6 (2/88)  ABSTRACT  This  thesis  describes  the  design,  construction,  and  testing  of  a  radio-frequency interference monitoring system for use with the synthesis array telescope at the Dominion Radio Astrophysical Observatory near Penticton, B.C. The system  is designed to provide continuous, automated surveillance of the  radiospectrum  around  408 MHz.  Interfering  signals  are  characterized  and  catalogued according to strength, duration, frequency, and direction. Although the monitor is presently a very useful tool for detecting and finding sources of interference, it is ultimately intended to communicate directly with the telescope's control  computer,  so  that  sporadic bursts  of  interference  can  be removed  automatically.  The system can detect a weak interfering signal that is within 5 dB of the  smallest  signal that  can contaminate  the  astronomical observations. The  smallest signal was calculated based on the following conditions, considered to be the case for which a synthesis telescope is most sensitive to interference, i.e., the worst case: a) observing at high declination (towards the North Pole), so that the fringes of the synthesis telescope are too slow to reduce the effects of the interference, and b) with the interference present continuously during the observation.  These weak signals can be detected in the presence of other signals, nearby in frequency, which are up to 40 dB stronger, i.e., monitor is 40 dB. ii  the dynamic range of the  The monitor consists of an antenna system,  a computer-tunable radio  receiver, a fast Fourier transform (FFT) spectrum analyzer, and a microcomputer for control and data analysis. Everything except the microcomputer hardware was built as part of the project.  A  thorough survey of the literature on the design of dedicated FFT  machines was required. It was discovered that there had been no investigation of the design details for fixed-point FFT machines which are required to do long integrations. In such situations, fixed-point errors limit the performance of the machine. A computer simulation of the Welch process was developed to analyze the effects  of these errors and to optimize  the  design.  Some  new  results  concerning the detectability of small signals are presented.  The FFT spectrum analyzer is used to estimate the power spectrum of 500 kHz-wide computes  sub-bands  256-point  using  transforms  Welch's in  method  real-time  of  with  modified a  periodograms.  resolution  of  It  3.91 kHz  (corresponding to one FFT every 512 /xsec). This is comparable to the speed of a large array processor but at a fraction of the cost. Since the FFT is equivalent to a bank of contiguous filters, it can analyze the spectrum in much less time than the single swept filter found in most commercial spectrum analyzers, i.e., it is much more sensitive.  The analyzer was  specially  designed  and built using recently-available  digital integrated circuits. The design draws upon several high-speed architectural concepts including pipelining, parallel arithmetic, and hard-wired control. Except for iii  expensive array processors, the analyzer is much faster than any commercial FFT processors or FFT-based spectrum analyzers.  As  part of the  antenna  system,  an  array  of helical antennas  was  designed and constructed, its characteristics were investigated and found to be suitable for the present application, and a method of remotely switching them on and off was devised.  One more note - the radio spectrum is becoming more and more cluttered with man-made signals. Unprotected radio astronomy bands are being adversely affected and radio astronomers are turning to FFT spectrometers to cope with the relatively large interfering signals. The work herein on FFT-based design is applicable in such cases.  iv  T A B L E OF CONTENTS  Abstract  ii  List of Tables  viii  List of Figures  ix  List of Photographs  xiii  Acknowledgements  xiv  Glossary  xvi  1. INTRODUCTION 1.1. Earth-Rotation Aperture Synthesis 1.1.1. The Synthesis Telescope at DRAO 1.2. Overview of the Interference Monitoring System  1 2 10 15  2. THE INTERFERENCE PROBLEM 2.1. Sources of Interference 2.2. The Effect of Interference on the Synthesis Telescope 2.3. Quantification of Interfering Signals 2.3.1. Maximum Signal 2.3.2. Minimum Detectable Signal and Dynamic Range  19 20 21 26 26 29  3. THE FFT SPECTRUM ANALYZER 3.1. The Modified Periodogram 3.1.1. Windowing Effects 3.1.2. Scaling of the Power Spectrum 3.1.3. Power Spectrum of Real Data 3.1.4. FFT Basics 3.2. Survey of Real-Time Narrowband Processing Techniques 3.2.1. General-Purpose Computers 3.2.2. Swept IF 3.2.3. One or Two Bit Correlation 3.2.4. Analog Filter Bank 3.2.5. Walsh Functions 3.2.6. DSP Chips 3.2.7. Custom Hardware 3.3. Architectural Alternatives 3.3.1. Double-Buffering 3.3.2. Real-Time Bandwidth 3.3.3. Speeding Up the FFT 3.3.3.1. Parallel Butterfly Computations 3.3.3.2. Higher Radix 3.3.3.3. Overlapped Memory/Compute Cycles 3.3.3.4. Pipelined FFT Stages 3.3.4. FFT Addressing 3.3.5. DIT versus DIF  31 32 34 40 41 44 48 50 50 53 54 54 55 55 58 58 59 61 61 63 63 65 65 66  v  3.4. Design and Construction of the FFT Spectrum Analyzer 3.4.1. Design Overview 3.4.2. Control and FFT Memories 3.4.3. Analog-to-Digital Conversion 3.4.3.1. Anti-Aliasing Filters 3.4.4. Windowing 3.4.5. Fast Fourier Transformation 3.4.5.1. FFT Data and Coefficient Addressing 3.4.6. Power Spectrum Accumulation 3.4.6.1. Power Spectrum Addressing 3.4.7. Interface to Microcomputer 3.4.8. Considerations in the Circuit Design 3.5. Errors Due to Fixed-Point Number Representation and Computation in the FFT Spectrum Analyzer 3.5.1. A-D Conversion Noise 3.5.2. Windowing Noise 3.5.3. Overflow in the FFT 3.5.4. FFT Noise 3.5.4.1. Fixed-Point Representation of Unit-Circle Coefficients 3.5.4.2. Roundoff Noise in the Butterfly 3.5.4.3. Scaling Noise 3.5.5. Power Spectrum Noise 3.6. Computer Simulation of the FFT Spectrum Analyzer  67 68 78 79 81 82 85 86 88 90 90 91 95 96 97 98 102 102 103 '.. 104 104 107  4. THE ANTENNA SYSTEM 4.1. Design of the Antenna Array 4.2. Construction and Matching of the Antennas 4.3. The Remote-Controlled RF Switch 4.4. The Triplexers  Ill 114 118 124 131  5. THE RECEIVER 5.1. Receiver Noise 5.2. The First Mixer Stage 5.3. The Imageless Mixer Stage  134 134 136 146  6. TESTING AND SYSTEM OPERATION 6.1. Testing of the FFT Spectrum Analyzer 6.1.1. Low-Speed Functional Tests 6.1.2. High-Speed (Real-Time) Tests 6.2. A-D Input Level and Power Spectrum Distortion 6.3. System Operation 6.4. System Tests 6.5. Examples of Interfering Signals Observed with Monitor  151 153 153 154 157 163 165 167  7. SUMMARY AND CONCLUSIONS 7.1. Further Work 7.2. Value of Thesis Outside of Project  174 176 177  vi  Cited References  179  Other References  183  Appendix 1 - FORTRAN Program Listing of FFT Spectrum Analyzer Computer Simulation  185  Appendix 2 - Schematic Diagrams of FFT Spectrum Analyzer  199  Appendix 3 - The Split-Window Normalizer  227  vii  LIST OF TABLES Table 3-1. Comparison of FFT Spectrum Analyzer Systems (1987)  56  Table 3-2. Number of Occurences of Unity Values of Unit-Circle Coefficients in 256-Point FFT 87 Table 3-3. Read and Write Address Sequences for 16-Point Constant-Geometry DIF FFT  87  Table 3-4. Coefficient Address Sequence for 16-Point Constant-Geometry DIF FFT  89  Table 3-5. Read and Write Address Sequences for Unscrambling Power Spectrum (N=16)  89  Table 3-6. Number of Occurences of Qmod2~t = 7 or 3^ 4  102  4  Table 4-1. Crossover Gain versus Number of Turns for Helical Array  118  Table 4-2. Measured Terminal Impedance and Return Loss Helices  123  Table 4-3. Measured Crosstalk Between Pairs of Helices  123  viii  LIST OF FIGURES Figure 1-1. Basic Interferometer  5  Figure l-2a. Angular Responses of Various Antennas  7  Figure l-2b. Angular Responses of Various Antennas (cont'd)  8  Figure 1-3. Geometry and Coordinate Systems for Synthesis Mapping  9  Figure 1-4. SST Antenna Configuration  11  Figure 1-5. Configuration of Interference Monitoring System and Observatory Computers  16  Figure 2-1. Example of Harmonics in Oscillator Output  21  Figure 2-2. Example of Map Contaminated by Prolonged, Weak Interference  24  Figure 3-1. Partitioning of Data Blocks in Welch's Method of Power Spectrum Estimation  33  Figure 3-2. Rectanuglar Window  36  Figure 3-3. Kaiser-Bessel (a = 2) Window  37  Figure 3-4. Flow Diagrams for DIT and DIF Butterflies  46  Figure 3-5. Flow Diagram for DIF Butterfly as Implemented in the Analyzer .. 47 Figure 3-6. Flow Diagram for 16-Point In-Place FFT  49  Figure 3-7. Flow Diagram for 16-Point Constant Geometry FFT  49  Figure 3-8. Comparison of Swept IF and FFT Methods  52  Figure 3-9. Comparison of Three Schemes for Performing Memory and Compute Cycles  64  Figure 3-10a. Block Diagram of FFT Spectrum Analyzer  69  Figure 3-10b. Block Diagram of FFT Spectrum Analyzer (cont'd)  70  Figure 3-11. Board Layout and Inter-Board Signal Flow in FFT Spectrum Analyzer  71  Figure 3-12. Layout of A-D Chip on AD Board  80  ix Figure 3-13. 500 kHz Cauer-Chebyshev Lowpass Anti-Aliasing Filter  83  Figure 3-14. Frequency Response of 500 kHz Anti-Aliasing Filter  84  Figure 3-15. Kaiser-Bessel (a = 2) Window (8-Bit Quantization)  98  Figure 3-16. Upper Bounds on Butterfly Outputs  101  Figure 3-17. Comparison of Two Divide-By-2 Scaling Schemes  105  Figure 3-18. Simulated Performance of Analyzer for Various BFFT  110  Figure 4-1. Bird's Eye View of Helices  116  Figure 4-2. Cross-Section of Mainlobe of Helical Beampattern  116  Figure 4-3. Theoretical Response of Helix (in One Dimension)  117  Figure 4-4. FSK Transmitter (for Antenna Switch Control)  129  Figure 4-5. FSK Receiver (for Antenna Switch Control)  130  Figure 4-6. Triplexers  133  Figure 5-1. Generic Receiver System of Cascaded Elements  135  Figure 5-2. First Part of Receiver and Other Components (on Antenna Pole) .. 137 Figure 5-3. Second Part of Receiver (in SST Blockhouse, outside Screened Room)  138  Figure 5-4. Third Part of Receiver (in SST Blockhouse, inside Screened Room)  139  Figure 5-5. Imageless Mixer  148  Figure 5-6. All-Pass Networks in Imageless Mixer  149  Figure 6-la. Plots from High-Speed Analyzer Tests  158  Figure 6-lb. Plots from High-Speed Analyzer Tests (cont'd)  159  Figure 6-lc. Plots from High-Speed Analyzer Tests (cont'd)  160  Figure 6-ld. Plots from High-Speed Analyzer Tests (cont'd)  161  Figure 6-le. Plots from High-Speed Analyzer Tests (cont'd)  162  Figure 6-2. olu of Passband versus Input Level  164  Figure 6-3a. Plots from System Tests  168 x  Figure 6-3b. Plots from System Tests (cont'd)  169  Figure 6-3c. Plots from System Tests (cont'd)  170  Figure 6-3d. Plots from System Tests (cont'd)  171  Figure 6-4a. Plots of Interfering Signals  172  Figure 6-4b. Plots of Interfering Signals (cont'd)  173  Figure A2-1. Board Interface and FFT Memories (C&M Board)  200  Figure A2-2. Analog-to-Digital Converter (AD Board)  201  Figure A2-3. Window Multiplication and Digitized Data Display (AD Board)  202  Figure A2-4. Butterfly Circuitry (BUTT Board)  203  Figure A2-5. Blowups of Butterfly Modules (BUTT Board)  204  Figure A2-6. Power Spectrum Computation and Accumulation Circuitry (PS Board)  205  Figure A2-7. Output Buffer and Interface to Microcomputer (PS Board)  206  Figure A2-8. Main Clock Generation (C&M Board)  207  Figure A2-9. PS Clock Generation (C&M Board)  208  Figure A2-10. AD and BUTT Control Signals, and Some Control Signals for Buses (C&M Board)  209  Figure A2-11. Some Control Signals for Buses (C&M Board)  210  Figure A2-12. PS Control Signals (C&M Board)  211  Figure A2-13. Write and Enable Signals for FFT Memories 1 and 2 (C&M Board) Figure A2-14. Write and Enable Signals for FFT Memory 3 and E5 (C&M  212  Board)  213  Figure A2-15. AD and Window Address Generation (C&M Board)  214  Figure A2-16. FFT Data Address Generation (C&M Board)  215  Figure A2-17. Bit-8 Generation for FFT Data Address (C&M Board)  216  Figure A2-18. FFT Coefficient Address Generation (C&M Board) xi  217  Figure A2-19. PS Address Generation (C&M Board)  218  Figure A2-20. Address Multiplexers (C&M Board)  219  Figure A2-21. Sample and Stage Counters (C&M Board)  220  Figure A2-22. Integration (FFT) Counter (C&M Board)  221  Figure A2-23. Reset Generation (C&M Board)  222  Figure A2-24. Overflow Indicators (AD Board)  223  Figure A3-1. Double-Boxcar Function in Split-Window Normalizer  228  xii  LIST OF PHOTOGRAPHS Photograph 1-1. The Spectroscopic-Synthesis  Telescope at DRAO  13  Photograph 3-1. FFT Spectrum Analyzer and Microcomputer (First View)  73  Photograph 3-2. FFT Spectrum Analyzer and Microcomputer (Second View)  75  Photograph 3-3. FFT Spectrum Analyzer and Microcomputer (Third View)  77  Photograph 4-1. Mounting of Antenna Assembly (First View)  113  Photograph 4-2. Mounting of Antenna Assembly (Second View)  119  Photograph 4-3. Preliminary Tuning of Helix  122  Photograph 4-4. Helix Feed  122  Photograph 4-5. RF Switch PC Board (Signal Side)  126  Photograph 4-6. Timing Diagram of of SW Helix Being Turned On  132  Photograph 4-7. Timing Diagram of Transmission of Logic '1' and Logic '0' '... 132 Photograph 4-8. Timing Diagram of Transmission of One Logic '1'  132  Photograph 5-1. First Part of Receiver and Other Components (on Antenna Pole)  141  Photograph 5-2. Second Part of Receiver (in SST Blockhouse, outside Screened Room) 143 Photograph 5-3. Third Part of Receiver (in SST Blockhouse, inside Screened " Room)  xiii  145  ACKNOWLEDGEMENTS  I would like to express my gratitude to those people who contributed to this thesis in one way or another. At the University of British Columbia, I thank my supervisor Dr. Mabo Ito for his support and interest in the project. I also  thank  Dr.  Michael  Beddoes  for  the  use  of  his  lab  space  and  I  thank  my  Mr. Tony Leugner for sharing his high-speed oscilloscope.  At  the  Dominion  Radio  Astrophysical  Observator3',  co-supervisor Dr. Peter Dewdney for his guidance, numerous technical suggestions, unwavering  enthusiasm,  and  for  making  me  a  better  engineer.  I thank  Dr. Tom Landecker for his continued interest in the project and for his excellent technical advice in the RF laboratory. I thank Mr. Ron Casorso for his help in the lab and for helping to install the Heliax cable, for our fruitful discussions on the design of the RF electronics, and for being a good listener. Thanks also to a host of other observatory employees: Mr. Ed Danallanko constructed and installed the helical antennas and antenna frame, machined parts of the digital cabinetrj', and patiently tutored me in the machine shop. Mr. Gary Hovey maintained the C development system and helped with the C software. Messrs. Rod Stuart and Ev  Sheehan  Cindy  helped  Furtado,  me  and  in  Bette  the  lab.  Jones  In  did  the  office,  various  Mmes. Erika Rohner,  administrative  work,  and  Mrs. Rohner handled the many purchase orders. Finally, I would Like to express my sincere appreciation to all the members of the observatory for their warmth and general good nature.  xiv  I also thank Ms. Patricia Kavanagh for reviewing the thesis.  I received financial support from the Natural Sciences and Engineering Research Council with a Post-Graduate Scholarship and a Research Assistantship.  xv  GLOSSARY  A-D AD Board AF AWG bin BUTT Board bw CG CMOS C&M Board CW dBi dBm DC DFT DIF DIT DR DRAO DSP ENBW FFT FSK glue logic IC IF IL I/O LNA LO M N NF NMOS PC PROM PS Board RAM RFI  analog-to-digital analog-to-digital conversion (plus windowing) board audio frequency American wire gauge output point in frequency domain after FFT (e.g. "k" in X(k), P(k)) butterfly board bin-width (Hz) coherent gain complementary metal-oxide semiconductor control and FFT memories board continuous-wave dB relative to isotropic dB relative to 1 milliWatt (into 50fl) direct current discrete Fourier transform decimation-in-frequency decimation-in-time dynamic range Dominion Radio Astrophysical Observatory digital signal processing equivalent noise bandwidth fast Fourier transform frequency-shift keying small-scale integration ICs (e.g. flip-flops, AND gates) integrated circuit intermediate frequency insertion loss input/output low-noise amplifier local oscillator number of stages in FFT (=log N) length of FFT noise figure n-channel metal-oxide semiconductor printed-circuit programmable read-only memory power spectrum accumulator board random-access memory radio frequency interference 2  xvi  SNR SPICE SQSUM SST SUM SUMSQ TTL  signal-to-noise ratio Simulation Program with Integrated Circuit Emph square-of-sum of window values spectroscopic-synthesis telescope sum-of-window values sum-of-squares of window values transistor-transistor logic  xvii  1. INTRODUCTION  At the Dominion Radio Astrophysical Observatory (DRAO) near Penticton, British Columbia, detailed maps of the sky are made using a technique known as earth-rotation aperture synthesis. The signals from astronomical radio sources are relatively weak compared with other signals. Therefore, it is important that interfering  radiation be  suppressed.  In  particular, the  effects  of man-made  terrestrial and satellite radio frequency interference (RFI) must be minimized. It is for this reason that DRAO is situated in an isolated, radio-quiet mountain valley.  However, experience  has  shown  that,  in the  radio astronomy band  406.1—410 MHz, interfering signals occur sporadically with sufficient strength to distort the maps. The distortions cannot be completely removed by post-processing and hence are a source of error in the observation. Sometimes the distorting signal is so weak that its presence is not detected until the final map has been made after the 35-day observation period.  In view of these facts,  it is desirable to have a system capable of  continuous, automated surveillance of the RF environment around 408 MHz. The ideal detection system would provide information about the interfering signals such as  strength, duration, frequency, and direction. Any signals large enough to  distort a map would be quickly detected, tracked down, and (hopefully) eliminated. Also, the contaminated data could be flagged and removed from the observation.  The  subject of this thesis is the design, construction, and testing of a  radio-frequency interference monitoring system for DRAO. The system consists of  1  2 an antenna array, a sensitive RF receiver, a digital fast Fourier transform (FFT) spectrum analyzer, and a microcomputer for system control and data analysis. The system is currently in use at DRAO. It is unique in its construction and application.  The thesis work was carried out in two places. The construction of the FFT spectrum analyzer and the development of the computer simulation were done at the university. The remainder of the work took place at the observatory.  The remainder of this chapter is an introduction to earth-rotation aperture synthesis followed by an overview of the interference monitoring system. In the second chapter, the interference problem in radio astronomy is reviewed, and the application to the DRAO telescope is discussed. The third chapter is a detailed description of the FFT spectrum analyzer including a software simulation. The fourth and fifth chapters cover the antenna array and RF receiver, respectively. The  sixth chapter describes testing of the spectrum analyzer, testing of the  complete system, and system operation. The seventh chapter contains a summary and conclusions.  1.1. EARTH-ROTATION APERTURE SYNTHESIS [Chri85,Krau66,Thom82a] The field of radio astronomy has flourished since its inception in 1932 when Karl Jansky observed radio emissions from the center of the Milky Way. At present, there are numerous radiotelescope sites throughout the world including Canada, the United States, England, the Netherlands, West Germany, Australia,  3 and Japan. Radio t observations are a very important part of the overall process of understanding astronomical objects. Often, they reveal sources and structure that are invisible at optical wavelengths.  (In particular, radio emissions usually  result from processes involving the gaseous components of the universe.) Two well-known discoveries in radio astronomy are pulsars and quasars.  A problem inherent in radiotelescopes is the lack of resolution due to the long wavelength  (compared to optical telescopes). In general, for wavelength X  and dimension D, an antenna aperture will have angular resolution  =*  X/D. A  good optical telescope can resolve two sources that are as close as .5 arc sec. An equivalent radiotelescope  at the shortest useful radio wavelength,  a few mm,  would be 1 km in diameter. Observations at longer wavelengths require even larger apertures. It is impractical to build receiving dishest of such extent. The size is limited by the surface deformations caused by the dish's own weight. The largest fully-steerable dish in the world is 100 m in diameter (Effelsberg, West Germany). It is representative of the limit in the size of a radiotelescope dish.  A large aperture can be synthesized with one small, fixed antenna and one small, movable antenna. Phase  and amplitude data can be recorded at  various positions in the large "aperture" and the results added. Provided the sources are invariant over the observation period, the only theoretical difference tThere are only two "windows" in the electromagnetic spectrum for which both the atmosphere and ionosphere are transparent: radio and optical. Ground-based telescopes are limited to these two frequency bands. Orbiting telescopes, although limited in size, have available for observation the entire electromagnetic spectrum. ^Except for the longest wavelengths, most radiotelescopes consist of one or more, often paraboloidal, reflecting "dishes" with a smaller collecting antenna at the focus.  4 between this method and that using a large antenna is the smaller collecting area (and hence lesser sensitivity).  In radio astronomy, the signal is usually much smaller than the unwanted noise level. Sources of noise include the receiver electronics, ground radiation, and radiation from atmospheric processes. Telescopes that measure total power require very stable equipment to prevent fluctuations in noise level from masking the signal. Better results can be obtained by correlating (multiplying), rather than adding, the data. The simplest correlating telescope is an interferometer pair (Figure 1-1).  Ideally,  such a telescope is  sensitive only to signals  that are  received at both antennas simultaneously. Unwanted noise that is uncorrelated will average to zero. In the interferometer, the signals from the two antennas are multiplied and a lowpass filter extracts and averages the difference product. An instrumental delay TJ is inserted for steering. The one-dimensional complex response to a monochromatic plane wave of intensity S as a function of pointing angle 8 for Tj = 0 is shown in the figure. It can be modified to represent an actual telescope by including the beampattern of the interferometer A(s), signals from  other sources  S(s),  and instrumental delay  Tj,  and then transforming  coordinates to two dimensions. The resulting response is known as the visibility V and is a function of the baseline vector B [Thom82a]: V(B) = /A(s)S(s)GeJ o( S 2,rf  B,s/c  ~ Pdn T  (1-1)  where the surface integral is over the celestial sphere,t G is the system gain, s tThe "celestial sphere" is defined as having earth at its center and of arbitrarily large radius such that effects of the telescope's displacement from the center of the earth are negligible.  Visibility  -  cjeoKAe-T-rioal  X"i ~ taserted  del  ay  in£+Timei\-l-a.l  delay  response, f o M o n o c K r o ^ c r t / c plane toave o-f iV\+er\S'4y S :  V(e)=  S- G-  3  = S O  Figure 1-1. Basic Interferometer  6 is a unit-vector pointing towards the center of the sources, f  Q  frequency,  boldface  denotes  a  vector,  and V has  units  is the center  Wm" Hz" ' . The 2  quantity we wish to measure is the brightness (intensity) distribution S which has units Wm" Hz" rad" . 2  1  2  The response in one dimension of a multiplying interferometer to a point source (along with the response of a single dish) is plotted versus angle in Figure 1-2. Also plotted are the responses of a large dish of diameter equal to the interferometer spacing and an adding interferometer. The response of the multiplying interferometer is a sinusoid of frequency dependent on angle, with envelope equal to the response of a single dish. The lobes in the response are known as "fringes".  Now suppose the baseline is aligned in an east-west direction. As the earth rotates,  the baseline  sweeps around in an ellipse  as  viewed from a  celestial source. The eccentricity of the ellipse depends on the declination of the source. The plane in which the vector rotates is called the u-v plane.  Figure 1-3 illustrates the geometry and coordinate systems for synthesis mapping. The x-y plane defines the map of the brightness distribution. As the two-dimensional interferometer pattern sweeps across the sky, the real part of the correlator output will undergo quasi-sinusoidalt variations, or fringes. Samples of the correlator output, called visibilities, can be collected in the u-v plane by observing at different times and with different baseline lengths. tFor small angular displacements, changes slowly with angle.  the  variation is sinusoidal. The frequency  Normalized Beam Patterns of Multiplying Interferometer (10A) and Single Element  interferometer single element  -7T/2  0  Normalized Beam Pattern of Continuous-Aperture Antenna  -n/2  n/2  (radians)  0  (10X)  n/2  8 (radians)  Figure l-2a. Angular Responses of Various Antennas  Normolized Beam Patterns of Adding Interferometer (10A) and Single Element  8  (IX)  interferometer single element  s  0  -2 -  -it/2  «/2 6 (radians)  ,  Figure l-2b. Angular Responses of Various Antennas (cont'd)  Now  consider  transforming  Equation 1-1  equating x and y to the direction cosines of s  V(u,v,w) = J  S A(x.v)S(x.v)GeJ ( 27r  u x+  v  to  coordinates fJB-s, — — —  and setting w =  G  y  rectangular  + w t / l  -  x 2  -y ) 2  x  d  The coordinates  — (1-2)  y  /l-x -y 2  OD  OD  T;:  0  d  u and v are measured in units of wavelength  by  2  of the  center  frequency. Normally, u is taken as North and v as East. If we make w = 0, 27rB«6, i.e.,  Tj =  cX  ,  so that the main beam of the interferometer response  is  steered towards the center of the region of interest, then Equation 1-2 reduces to a two-dimensional Fourier transform. The equation can be transformed to discrete form  and  brightness  the  modified  distribution  brightness  and  the  distribution  interferometer  (equal  to  response)  the  product  computed  by  of  the  inverse  discrete Fourier transformation. This technique is known as earth-rotation aperture  9  Figure 1-3. Geometry and Coordinate Systems for Synthesis Mapping (copied from [Thom82a])  10 synthesis or spectroscopic-synthesis.  1.1.1. The Synthesis Telescope at DRAO The DRAO spectroscopic-synthesis telescope (SST) is located in a semi-arid mountain valley 25 km south of Penticton. The site has two main advantages for radio astronomy: the mountains serve as a shield from outside RFI, and the flatness of the valley facilitates precise positioning of the antennas. The SST simultaneously 408 MHz  conducts  continuum,  three  and  types  spectral  of  line  observations:  1420 MHz  (narrowband) observations  continuum,! of neutral  hydrogen emission at 1420 MHz.  Compared to other radiotelescopes, the DRAO SST has a wide field of view and moderate resolution. This makes it well suited for mapping objects of large angular extent, such as supernova remnants and HH regions in our own galaxy. As well, observations of extragalactic objects  are . made. Such objects  include the Andromeda Galaxy and clusters of galaxies. In general, any process in the interstellar medium which emits radio waves is a suitable candidate for observations.  The  telescope consists of four antennas.  Each is  a 9 m paraboloidal  reflecting dish with dual-frequency receiving horns at the focus. The antennas are configured along a 600 m east-west baseline (Figure 1-4). Two are fixed at the ends and two are movable along a 300 m railway track. Photograph 1-1 shows the four antennas of the synthesis array. tin the jargon of astrophysics, "continuum" implies broadband.  11  ANT 1  ANT 2  ANT 3  ANT 4  600 m  Figure 1-4. SST Antenna Configuration Four  (of  a  possible  six)  interferometer  pairs  are  implemented,  each  operating at a different spacing. The dishes track a region of sky for 12 hours (nominal) per day, corresponding to one half-ellipse in the u-v plane.t Each day the  spacings  are  changed  by  moving  the  middle  dishes.  After  35 days,  140 baselines have been sampled. The visibility data is then interpolated onto a rectangular grid and inverse (fast) Fourier transformed to yield the synthesized map. The size of the map (field of view) is defined by the main beam of an individual  antenna.  interferometer  If  desired,  the  map  can  be  deconvolved  with  the  response using one of various algorithms, the most popular of  which is known as "CLEAN" [Hogb74], [Stee84]. tSince the brightness distribution is a real quantity, the visibility matrix is Hermitian. Therefore, only one half of each ellipse needs to be sampled in the complex u-v plane. Visibilities in the other half can be computed by changing the sign of the imaginary part. (The baseline rotates 180° every 12 hours, equivalent to a sign change in the phase of the received signal.)  12  Photograph 1-1. The Spectroscopic-Synthesis Telescope at DRAO  13  14 The specifications of the 408 MHz system are summarized below: field of view = 7.4° diameter circle resolution = 3.5 x 3.5csc8 arc min rms sensitivity = 3.3 mJy/beam at center of field integration time per visibility = 90 sec baselines = 13 to 600 m in steps of 30/7 m bandwidth = 4 MHz  where 1 Jy (Jansky) equals 10"  2 6  Wm" Hz" 2  1  and "beam" implies a single  dish.  The total integration time T for a full survey is: T = (140 spacings)(12 hr/spacing)(3,600 sec/hr) = 6,048,000 sec or 70 days over a period of 35 days.  Because Penticton is in the northern hemisphere (latitude = 49°) and the baselines are all oriented East-West, the telescope is suitable only for observing the northern sky. The practical range of source declinationst is 20°<5^90°. (For low declinations, the resolution in the y dimension (3.5csc6 arcmin) is too coarse and the view of more southerly objects is blocked by the earth.)  tDeclination is defined such that it is 0° at the equator, + 9 0 ° Pole, and - 9 0 ° at the South Pole.  at the North  15 1.2. OVERVIEW OF THE INTERFERENCE  MONITORING SYSTEM  A block diagram of the interference monitor and the observatory computers is given in Figure 1-5.  The interference  monitor is a self-contained  unit. It  consists of an array of small, electronically-selectable antennas, a computer-tunable radio  receiver,  a  fast  Fourier  transform  (FFT) spectrum  analyzer,  and a  microcomputer for control and data analysis. Except for the microcomputer, all of the hardware was built as part of this project.  The system provides continuous, automated surveillance of the radio band 398—418 MHz characterized  with  4 kHz  and catalogued  resolution. according to  Narrowband strength,  interfering  signals  are  duration, frequency, and  direction. A resolution of 4 kHz is adequate for detecting continuous-wave (CW) and voice-modulated signals (the most predominant types of interference) and is partly the result of design constraints.  The monitor can detect interference in much less time than the 35-day integration period of the synthesis telescope because it improves the signal-to-noise ratio by: 1) looking directly at the source of interference rather than through the sidelobes of the telescope's antennas and 2) analyzing a much narrower bandwidth.  The antenna system  includes eight  directional helices for scanning in  azimuth and a quarter-wave whip for omni-directional surveillance. The antennas and an electronics box are located on a pole 400'  away from the building that  contains the rest of the system. Via the use of special filters, the DC power,  Figure 1-5. Configuration of Interference Monitoring System and Observatory Computers  17 antenna control signal, and RF signal are frequency-shared on a single cable that runs between the pole and the building.  The receiver is based on the conventional  superheterodyne  design and  includes a variable (computer-programmable) local oscillator. The receiver amplifies and shifts a 500 kHz sub-band within the band of interest down to baseband for spectrum analysis.  The FFT spectrum analyzer computes and integrates 500 kHz-wide spectra in real-time. It was built using recently-available digital integrated circuits. It estimates the power spectrum using Welch's method of modified periodograms. It performs 256-point transforms with a real-time bandwidth of 500 kHz and a resolution  of  3.91 kHz  (corresponding to  one  FFT every  512 usee). This  is  comparable to the speed of a large array processor. Since the FFT is equivalent to a bank of contiguous filters, it can analyze the spectrum in much less time than the single swept filter found in most commercial spectrum analyzers. Or, in other words, the analyzer is much more sensitive per unit time.  The 68008-based microcomputer is the system controller. Programmed in the C language, it accepts spectra from the analyzer, processes the data, and controls the other hardware. Presently, the data processing includes normalization followed by a threshold-based search for narrowband signals. The microcomputer controls the other hardware by: a) electronically selecting one of 8 helices or the quarter-wave whip, b) tuning the receiver to a desired frequency band, and  18 c) specifying the sampling rate and integration time of the analyzer (the latter over a range from a few seconds to many hours).  If desired, information can be sent to the synthesis telescope's control computer. Presently, a listing of the detections, or "hits", is automatically stored in  the  control computer.  Data  in  the  control computer  can be manually  transferred over a remote link to the main observatory computer (in the main building) for further analysis and plotting.  2. T H E I N T E R F E R E N C E P R O B L E M  To measure the weak radio signals from outer space, radiotelescopes must use very sensitive  instruments. The 408 MHz SST system  at DRAO has a  sensitivity of 3.3 mJy/beam. This is equivalent to the level received from a typical FM radio station 10,000,000,000 miles away!  Unfortunately, the extreme sensitivity of the radiotelescope leaves it prone to interference. In particular, the multiplying interferometer is adversely affected by interfering signals that are correlated between antennas. For this reason, the SST is located in a radio-quiet mountain valley far from any major cities. However, experience has shown that interfering signals occur often enough to impede and contaminate the observations. Interference is a significant problem for the  408 MHz  array.  It is  less significant for the  1420 MHz  array. Strong  interference is easily found in the observational data, but is very laborious to remove. Prolonged weak interference is equally serious, and much more difficult to remove.  In  this  chapter,  the  408 MHz  interference  problem is  examined. In  particular, the sources of possible interference are listed, the effect of interference on the synthesis  telescope is discussed,  interfering signals are estimated.  19  and the levels of large and small  20 2.1. SOURCES OF  INTERFERENCE  Experience has shown that RFI at DRAO can originate  from many  different sources. Some examples of sources that have caused problems in the past include the police transmitter on nearby Mount Kobau, radar equipment at Penticton  airport,  Unfortunately, astronomy.  the  transmitters band  aboard  orbiting  406.1—410 MHz  Included in the  is  not  satellites,  and  reserved  solely  the  Sun.  for radio  allocation for the band are various mobile and  mobile-satellite transmitters [NTC82]. Interference problems due to legal, in-band transmitters occur now and then. The observatory's only resort in these cases is to request that the party not use the band.  In  addition  to  interference  from  sources  located  outside  the • valley,  interference from DRAO equipment can be a problem. Fundamental and higher harmonic  frequencies  and  telescope instrumentation  their  intermodulation products  and electronics  are  under development  generated from  in the  lab  (e.g.  Figure 2-1). It is impractical to shield all possible sources of interference at the observatory.  Other sources of RFI in the valley are vehicles that travel to and from DRAO. Transceivers in vehicles have caused problems in the past. Also, it is conjectured that ignition noise may cause significant interference.  Except for ignition noise and the Sun, the common characteristic of most interfering signals is that they are narrowband (narrow relative to the 4 MHz band of observation).  21  Spec-r-rur»\ o-f  O$cv\lck-Vor  Output.  o•io .  U&) -60 -80 l»fc.o  Z13..0  40B.0  S«ff.o  680.0  Figure 2-1. Example of Harmonics in Oscillator Output 2.2. THE EFFECT OF INTERFERENCE  ON THE SYNTHESIS TELESCOPE  There are four ways in which the synthesis telescope discriminates against interference: 1. the fringe oscillations attenuate signals not in phase with those from the region of interest; 2. the sidelobes of the primary (single dish) beampattern suppress signals that are outside the main lobe; 3. the front-end filters suppress out-of-band signals; and 4. broadband interfering signals are decorrelated between antennas.  These will be discussed below. In so doing, the effect of interference on the synthesis telescope, and its susceptibility to interference, will be elucidated.  1) In general, a signal that is not in phase with the signals from the  22 region of observation will  sweep through the  fringes  of  the interferometer  response (Figure 1-2). For a source of interference that is stationary relative to Earth, the attenuation due to fringing is: T  fringe attenuation = •^/cos(27rft)dt 0 _  sin(2irfr) 2fffr  where T = integration time for visibility point (sec) f = natural fringe frequency (Hz). The fringe frequency is given by: f = o>ucos6 where cj = angular rotation velocity of earth (rad/sec) u = coordinate in u-v plane (East direction) (X) 6 = declination of source of observation (deg) The reduction in interference due to fringing goes away as f nears 0. This occurs for: a) points near the v-axis (u near 0), i.e., hour angle near ±90°, and b) any point in the u-v plane when the source of observation is at a high declination.  Thus, when observing away from the pole, prolonged stationary interference will  23 contaminate  visibilities  along  the  v-axis.  A  two-dimensional  inverse  Fourier  transformation into the map (x-y) plane will create an east-west interference structure (e.g. horizontal stripes). This is equivalent to the response to a source close to the North celestial pole.t the stripes being the sidelobes of the polar source.  Figure 2-2 shows prolonged weak interference in a map of the supernova remnant, HB3. The concentric rings are artifacts due to instrumental errors in phase and amplitude, not interference.  If  the  interference  is  randomly intermittent,  the  u-v  plane  will be  contaminated in a random fashion, and the map plane distortion will not be predictable.  2) The main lobe in the beampattern of a single antenna defines the field of view. For the 408 MHz system, this is a 7.4° diameter circular region. In general, only airborne or spaceborne interference can enter the mainlobe. Other interfering signals are attenuated relative to the main lobe. The directivity of the 408 MHz beampattern is 32 dB above isotropic. The average sidelobe level is approximately 35 dB [Land88]. Therefore, the attenuation of a signal moving through the sidelobes (as the antennas track the source) is about 35 dB = —3 dBi.  3) In the 408 MHz SST, the electronic system has bandpass filters for image  rejection  (before  down-mixing).  They  have  a  bandwidth of  10 MHz.  tThe precise position of the fictitious polar source depends on the exact frequency of the interference.  24  Figure 2-2. Example of Map Contaminated by Prolonged, Weak Interference  25 Subsequent Filtering and amplification confines the bandwidth to 4 MHz, equivalent to the radioastronomy band 406—410 MHz. band will be attenuated. within the  Interference  outside the astronomy  Strong interference outside the astronomy band but  10 MHz initial bandwidth can cause problems (e.g.  saturation of  amplifiers.)  Also, there is a notch filter of bandwidth 120 kHz centered at 408 MHz (implemented at baseband). This suppresses a harmonic of 204 MHz generated by the system electronics.  4) Since the geometrical time delays introduced between each antenna and the correlators are, in general, different, broadband interference is attenuated by decorrelation. For this reason, narrowband interference is usually more harmful. A rough calculation below estimates the minimum bandwidth of an interfering signal necessary for significant decorrelation: max. time delay between antenna pair =  maximum baseline  = 2  bandwidth  1 correlation time  minimum bandwidth  1  2/as 500 kHz.  c ms  600 m 3x10 m/s 8  26 2.3. QUANTIFICATION OF INTERFERING SIGNALS In order to design the monitoring system, it is necessary to know the amplitudes of the signals it should be capable of detecting. The ratio of the largest to smallest signals of interest specifies the dynamic range (DR) of the system. The smallest signal determines how sensitive the monitor should be.  2.3.1. Maximum Signal A simple experiment was performed to estimate the largest interfering signal the analyzer should be able to handle without distortion. The experiment also served as a useful test of part of the receiver.  A X/4 "stub" antenna (wire monopole with 4-wire ground-plane) [Jasi61] connected to a signal generator was used to transmit continuous-wave (CW) interference at 408.5 MHz into the sidelobes of the array's parabolic dishes. (The frequency was not exactly 408 MHz because the array system incorporates a notch filter at that frequency to suppress a harmonic of 204 MHz generated by the system electronics.) The transmitter was set up about 90 m south of the east-west baseline of the array. The telescopes were tracking a point fixed on the sky at the time so that the signal was sweeping through the sidelobes of the antennas in the array. The average output of the telescope receiving system would correspond to a rough average of the sidelobe level.  The signal was also observed with a receiver system comprising a helical antenna, a superheterodyne receiver, and a commercial spectrum analyzer. The receiver system was used to measure, at the center of the array, the power  27 being transmitted. The superheterodyne receiver was a partial prototype of that now used in the interference monitor. In particular, it consisted of everything before  the  imageless mixer (section  4.3).  The receiver was  set  up in the  spectroscopic-synthesis telescope (SST) control building located at the center of the array.  The signal level was increased until the SST visibility traces were just noticeably distorted; the traces, plotted on a chart recorder, display the complex cross-power of signals received from the four interferometer pairs in the array. This level represents a very strong interfering signal. A signal this strong is easily detected by someone scanning the chart recorder output traces. The level was measured to be —65 dBm into the stub.  The following shows a breakdown of the various gains and losses t in the transmitter/receiver combination. The flux at the array center is: Pj =  P q (generator power in dBW) — .36 (generator-stub mismatch loss in dB) + 2.15 (directivity of stub in dB) — 11.0 — 201ogr (spherical spreading loss in dBm" , r 2  Pj =  p  Q  _ 54.12  176m)  dBWrn" . 2  The gain of the helix-plus-receiver is:  tA note on units - "dBW" implies that the value in Watts has been changed to lOlog(value), ditto for dBm" , etc. 2  28 GrR = —3.01 (polarization loss of helix in dB) — 1.10 (helix-receiver mismatch loss in dB) + .26 (aperture area of helix in dBm ) 2  + 73.7 (gain of superheterodyne receiver in dB)  G  =  R  69.85 dBm . 2  (In the above equation, the transmitter is assumed to be linearly polarized.) The signal level at the output of the receiver is then: P  P  R = PiG  R  =  P  G  +  R  1 5  -  7 3  d  B  W  -  The measured level verified this calculation to within 4 dB: P  R  =  P  G  +  1 2  d  B  W  (measured).  (In the Pj and G r equations, generator power and receiver gain were measured; the other values were calculated.)  The generator  power level  of —65 dBm corresponds to  a power flux  density at the array center equal to: P; = max  -149dBWm- . 2  In the 4 MHz array bandwidth, this corresponds to an equivalent broadband signal with spectral power flux density at the array center equal to:  29 /0 = S;  P;  TTiax  = -215dBWm" Hz" 2  max  where U y (Jansky) equals 10"  2 6  Wm" Hz" 2  « 31,000 Jy  1  1  and bandwidth 0 is 4 MHz.  2.3.2. Minimum Detectable Signal and Dynamic Range We  shall define the minimum detectable signal to be the smallest flux at  the center of the array that may distort the map. To calculate the minimum detectable  signal, we shall assume the worse-case condition: observing at high  declination (towards the North Pole, so that averaging over large fringe rotation angles does not reduce the interference (section 2.2)) with the interference in the radioastronomy band and continuously present  for the full  survey.  The rms  sensitivity of the array is given by [Thom82a]: AS  =  where  2 /2"kT  s  k= 1.38xl0" JK" 23  Wm" Hz" 2  (Boltzmann's  1  integration time, and for the 408 MHz -Tg  1  constant),  r = total  (effective)  array [Veid84]:  = system noise temperature = 104 K  0 = bandwidth = 4 MHz 7J Tj A For  a  C  = correlator efficiency = .89 = aperture efficiency = .6 = aperture area of dish = 7r(4.5m) . 2  a  a full survey, T = 6x10 sec (section 1.1.1). The effective directivity of a 6  dish is D = 47TTj A /X . We can rewrite the sensitivity as: 2  e  a  a  30 AS =  2 /2 k T_47r /p>Tj X D  Wm- Hz- . 2  1  2  c  e  Assuming the response in the sidelobes of the dish beampattern is the average sidelobe level, i.e.,  setting  D = —3 dBi = .5, e  and assuming that the  smallest,  continuously present, bothersome signal level S: . is equal to the sensitivity AS, 'min we calculate for a full survey: S: . =-254dBWm- Hz" min 2  1  J  «  4 Jy. J  Thus, S: . 0 = P: . = -188dBWm- . 'min 'mm 2  This represents the smallest flux at the array center that may distort the map.  We shall define "dynamic range" DR to be the range of amplitudes over which signals can be accurately measured, including the case when the largest and smallest signals are both present. Based on the above results, the dynamic range of the spectrum analyzer should be: DR = P: /P: . max min = -149dBWm"  2  -  (-188 dBWm" ) 2  DR « 39 dB. The dynamic range is  a major consideration in the  components in the interference monitor.  design  of the various  3. T H E F F T S P E C T R U M  ANALYZER  As stated earlier, almost all interfering signals are narrowband. The basic problem, then, is the detection and estimation of narrowband signals in broadband noise. Therefore, some form of narrowband spectrum analysis is required. Such analysis has three main advantages over a broadband approach: it 1. increases signal-to-noise ratio, thus decreasing integration time; 2. discriminates between signals of different frequencies; and 3. can extract sidebands).  spectral  details  of  a  modulated  Assuming that the interfering signals modulated sinusoids,  continuous  Fourier  as  the  transform is  shape of  is Fourier analysis (natural  basis vectors), t  the  (e.g.  are smoothly-varying sinusoids or  a "natural" method to use  because it uses sinusoids  signal  discrete  An approximation to the  Fourier  transform  (DFT).t An  efficient DFT algorithm amenable to digital hardware implementation is the fast Fourier transform (FFT). The power spectrum can be estimated by squaring and averaging the complex spectra produced by FFTs of successive time segments.*  The perform  the  interference  monitor  narrowband  incorporates  processing.  The  an  FFT spectrum  analyzer  is  a  analyzer  digital  to  hardware  tlndeed, when the signal is narrowband and has constant amplitude, random phase, and unknown frequency, an infinite set of Fourier filters followed by power integration and thresholding is the optimum detector (in the maximum likelihood sense) [WU172]. tWith a concomitant degradation in performance (relative to optimum). * Averaging of the complex spectra is pointless because the relative phase of the signal varies randomly so the complex spectral values would average to zero. 31  32 implementation  of  Welch's  modified  periodogram  power  spectrum  estimator  [Welc67]. It was specially designed and constructed by the author and includes over 200 integrated circuits. The decision to build an FFT analyzer was made only after careful consideration of other processing methods  and a study of  products available on the market.  The sections in this chapter contain the following: a review of Welch's method  of  modified  periodograms,  comments  on  windowing  and  scaling,  a  derivation showing how to compute the power spectrum of real data based on the standard "two-in-one-FFT" trick, and a review of some basic FFT concepts; a survey of real-time narrowband processing techniques; a discussion of alternatives in the design architecture; details on the design and construction of the analyzer; a  discussion  computation  of  the  in the  errors  due  to  fixed-point  analyzer; and results  number  representation  and  of a computer simulation of the  analyzer.  3.1. THE MODIFIED PERIODOGRAM The following is a description of Welch's method of power spectrum estimation using modified periodograms [Welc67].  Given an input signal d(t), consider sampling it (equally-spaced and  partitioning  the  resulting  overlapping, each of length window  w(n),  n = 0,l,...,N—1,  data  sequence  N (Figure 3-1). and  take  Xj(n) = dj(n)w(n) to get the complex spectra:  the  into  K blocks  dj(n),  samples) possibly  Now, multiply each block by a DFT of  each  windowed block  33  d (0)  d <N-l>  0  0  I  1  d + ine  _,  K  <0)  d _! <N-1> K  >  Figure 3-1. Partitioning of Data Blocks in Welch's Method of Power Spectrum Estimation N—1 -j2irkn/N Xj(k) = | xj(n)e J  n  Then,  take  0  the  ; k = 0,l,...,N-l.  magnitude-squared of the  complex  spectra  (3-1) and average  the  resulting power spectra (modified periodograms)t to get the estimate of the power spectrum of d(t): POO = £ ^|p|Xi(k)|  P(k) is  2  ; k = 0,l,...,N-l.  a "good" estimate in that  it is  asymptotically  unbiased and  t'Teriodogram" is a historical term referring to the magnitude-squared of the complex spectrum estimate. "Modified" means that a non-rectangular window is applied.  34 consistent.  For  input  noise  with  stationary,  second-order  statistics  and  non-overlapping data blocks, the variance of the estimate is given by: P (k) o (k) = — ^ - i 2  ; k = 0,l,...,N-l.  2  (3-2)  3.1.1. Windowing Effects There is one main reason for applying a tapered (non-rectangular) window to the data blocks in the power spectrum estimation process: reduction of spectral leakage.  Leakage occurs because the continuous  power spectrum P(f)  of the  estimate equals the convolution of the continuous power spectrum D(f) of the sampled data with the magnitude-squared of the finite Fourier transform W(f) of the window function: i  p(f) =  rDtniwtf-DiMf  where W(f) = finite Fourier transform of w(n) _  = and  N-l  _j 7rfn  L w(n)e n= 0  2  f = normalized frequency  (relative  to sampling rate).  If the  input is a  complex sinusoid at the center of bin k , the sampled power spectrum estimate 0  P(k) equals |W(k—k )| , not an impulse. The leakage from a large signal can 2  Q  mask a small nearby signal. The lower the sidelobes of the window, the less the leakage.  35 The window used in the analyzer is the Kaiser-Bessel (sometimes called Taylor). It is designed to maximize the energy in the mainlobe for a given First (highest) sidelobe level, t This is a suitable selection criterion for the detection of narrowband signals. The window values are deFined in terms of the zero-order modiFied Bessel function of the First kind [Harr78]:  I L W l - (2n/N - l ) ] 2  0  w  where  (  n  )  TJ^al  =  a = design  ;  parameter.  The  window  n  is  =  0  '  1  - -  N  -  1  "DFT-even"  [Harr78],  i.e.,  w(l) = w(N-l), w(2) = w(N-2), etc., such that its DFT is real. The level of the First sidelobe is given by: First sidelobe level = -101og[4.603  s i n h [ 7 r a ]  it a  j2  ( d B )  The parameter a was chosen to give a first sidelobe level commensurate with the analyzer's dynamic range DR.  The frequency  chief detriment to using a tapered window is resolution  due  to  the  widening  of  the  the  window's  reduction of  mainlobe. The  rectangular window offers the best resolution. It has a 3 dB-bandwidth of .89 bin and  First  sidelobe  Kaiser-Bessel (a = 2)  level  —13.46 dB.  window are  The  1.43 bin  corresponding  and —45.85 dB.  parameters Plots  for  the  of the power  spectra of the two windows are shown in Figures 3-2 and 3-3. Each plot was generated by padding the 256-point window with 768 zeros, FFTing, then taking the  magnitude-squared.  Included in the  Figures is  a comparison of various  tThe optimization assumes continuous time and frequency variables. Eberhard has derived an optimization procedure based on discrete time and continuous frequency variables [Eber73]. Unfortunately, the method is tractable only for small N.  6  36 R e c t a n g u l a r Window ( T i m e  w(n)  .  0.5 -  CC - 1.00 (0.00 dB)  Domain)  K a i s e r - B e s s e l ( a = 2) Window (Time  Domain)  Figure 3-3. Kaiser-Bessel (a = 2) Window  38 parameters.  A side benefit of using a tapered window is the reduction in scalloping loss. Scalloping refers to the loss in power when the signal is not located at the center of a bin. The worst case occurs when the signal is halfway between centers. The crossover point of adjacent filters determines the scalloping loss. As the mainlobe is widened, the scalloping loss decreases.  It  should  be  pointed  out  that,  in theory,  spectral  leakage  can be  eliminated by deconvolving the spectrum with the power spectrum of the window. However, this  can be difficult when there  are multiple signals,  and nearly  impossible when there is noise. Also, in theory, scalloping loss can be recovered by  interpolating the  spectrum. However, in a real-time system,  impractical to do post-processing.  it may be  In such a case, the windowing effects are  irrecoverable.  Another detriment to using a tapered window is the reduction in SNR for bin-center signals, with a concomitant increase in integration time. There are two effects to consider. First, the widened mainlobe means more broadband noise will appear within each bin. A measure of this noise increase is equivalent noise bandwidth (ENBW). ENBW is defined as the width of a rectangular-shaped filter that would accumulate the same noise power as the actual window filter (each filter having the same peak power gain). Harris [Harr78] shows that: ENBW = J1SUMSQ SQSUM  39 where it is convenient to define the following terms: SUM =  N-l I w(n) n=0  SQSUM = (SUM)  2  SUMSQ =  N-l , I w (n). n= 0 2  The second effect is the decrease in energy (for both signal and noise) due to the window taper, i.e., amplitude reduction. A measure of this energy reduction is coherent gain CG. Harris shows that: _ SUM CG — r  n  The loss in SNR for a bin-center signal due to windowing is then: loss in SNR (bin-center) =  signal reduction noise increase  _  (CG) (CG) ENBW 2  2  _  1 ENBW  The loss in SNR for a bin-center signal for rectangular and Kaiser-Bessel (a = 2) windowing are 0.00 dB and 1.75 dB, respectively. For a signal halfway between centers: loss in SNR (worst-case) = ^„ "L„ + scalloping loss. ENBW T  The worst-case losses in SNR for rectangular and Kaiser-Bessel (a = 2) windowing are 3.92 dB and 3.21 dB, respectively. We see that a tapered window degrades the  SNR for bin-center  signals  but actually  improves the  SNR for  signals  halfway between centers.  Another benefit  of tapered windows  is realized when the  input data  40 segments  are  overlapped.  Overlapping allows  more  averages  Averaging K identically-distributed independent measurements  per  unit time.  reduces the noise  variance by a factor 1/K. However, overlapped data blocks are not independent so the variance reduction is somewhat less, i.e., variance reduction = cK ; 0<c^l where c is a constant whose value depends on the window, the amount of overlap, and the number of spectra in the average [Harr78]. c is an indirect measure of the correlation between data segments due to overlap. It decreases as the amount of tapering increases. For overlapped processing, a tapered window allows greater variance reduction than a rectangular window. With 50% overlap and large K, c = .67 for the rectangular window and .95 for the Kaiser-Bessel (a = 2) window.  In section 3.5.3, it is noted that a tapered window reduces the probability of overflow in the FFT computations.  3.1.2. Scaling of the Power Spectrum To obtain an absolute  (properly scaled)  measurement  from  the Welch  spectrum, a number of effects must be taken into account. Some important points are listed below. 1. There is an N-fold inflation in the power spectral values inherent in the DFT, re. Parseval's theorem: N[ ^|o|x(n)|  2  ] = [ %|X(k)|  2  ]  2. The window taper in the time-domain deflates the energy by a factor  41 (CG) . 2  3. The widened mainlobe (relative to rectangle window) in the frequency domain inflates the energy of broadband noise by a factor ENBW. 4. A sinusoid will appear in both sides of the spectrum, so the energy observed will be deflated by 2. 5. White noise will be evenly distributed amongst the frequency bins.  To obtain an absolute measurement, the power spectral estimate must be scaled to account for the above effects. In the case of white noise, P(k) should be multiplied by: 1 N(CG) ENBWN  =  2  1 N SUMSQ  In the case of a bin-center sinusoid, P(k) should be multiplied by: 2 N(CG)  _ 2  2N SQSUM  3.1.3. Power Spectrum of Real Data We want to compute and average the power spectra of data blocks which can be represented as real numbers. We shall show that we can compute the sum  (average) of the power spectra of two real data blocks using one DFT  followed by a simple "unscrambling" of the power spectrum. It is not necessary to first unscramble the individual complex spectra (using formulas available in some DSP textbooks) and then add their squared-magnitudes. (Welch has shown this  result before  [Welc67], but his derivation is somewhat  contains three errors.)  brief and also  42 Since the input data is real, an improvement in speed can be realized by packing two  data blocks  in the real and imaginary parts  of memory and  reconstructing the output spectra. Incidentally, other methods of exploiting the realness of the data were investigated: packing the even and odd samples of one data block (less bandwidth), packing the two halves of one data block (cannot be unscrambled), or complex-mixing to yield real and imaginary input data streams thus halving the sampling rate (too costly).  Consider two real data blocks, f(n) and g(n). Form the complex array x(n): x(n) = f(n) + jg(n)  ; n = 0,1,...,N-1.  The DFT of each side is: X(k) = F(k) + jG(k)  ; k = 0,1,...,N-1.  By explicitly writing F(k) and G(k) in terms of sine and cosine series and remembering that f(n) and g(n) are real, it is straightforward to show that: F(k) = X (k) + j X ( k ) ER  0I  G(k) = X (k) - j X ( k ) EI  0R  where E, O, R, and I denote even, odd, real, and imaginary parts, respectively. The even and odd symmetries (modulo N) of X g  R  and XQJ enable us to write:  43 F(k) = i[  X (k) + X (N-k) + j Xj.(k) - j XjCN-k) ] R  R  = -1[ X(k) + X*(N-k) ]. Similarly, G(k) = ±[ Xj(k) + Xj(N-k) - j X (k) + j X (N-k) ] R  =  R  X(k) - X*(N-k)].  The sum of the power spectra of the two data blocks is: P(k) = F(k)F*(k) + G(k)G*(k)  = il +  X(k) + X'(N-k) ][ X*(k) + X(N-k) ]  i[  X(k) - X*(N-k) ][ X*(k) -  X(N-k) ]  = -£-X(k)X*(k) + J-X(N-k) X*(N-k) + -£X(k) X(N-k) + -|X*(k)X*(N-k) + -J-X(k)X*(k) + -J-X(N-k) X*(N-k) - -J-X(k) X(N-k) + J-X'(k) X*(N-k) = -£[ X(k)X*(k) + X(N-k)X*(N-k) ]  =  il  X (k) + X^k) + X (N-k) + X^N-k) ] ; k = 0,l,...,(N/2- 1) R  R  where we only consider the first N/2 points because the power spectrum of real signals is symmetric.  Thus, we see that it is possible to compute the sum of the power spectra of two real data blocks using one DFT followed by a simple "unscrambling" of  44 the power spectrum. We don't have to compute F(k) and G(k) explicitly from X(k) and then add the individual power spectra.  In the implementation, the two data blocks are adjacent, i.e., f(n) = Xj(n) g(n) = x. (n) +  ; n = 0,1,...,N-1  1  ; i = 0,2,4,...,K-2 where K is the number of blocks per estimate (an even number equal to twice the number of actual FFTs).  3.1.4. FFT Basics In  this  section,  some  basic  concepts  needed  to  understand  the  implementation of the FFT algorithm are presented and some relevant terms are defmed.  The FFT is a computationally efficient method of evaluating the DFT in Equation 3-1 (section 3.1). In the derivation of the radix-2 FFT, in which N must be an integer power of 2, redundantt multiplications are removed by decomposing the DFT into successively smaller DFTs until the computation consists solely of 2-point DFTs, or "butterflies". There are two classes of FFT: "decimation-in-time (DIT)"  and  "decimation-in-frequency  (DIF)".  In  the  DIT  algorithm,  the  decomposition begins with the data x(n). In the DIF algorithm, the decomposition  t Redundancy is present in the DFT because of the modularity and symmetry of the complex exponential.  45 begins with the complex spectrum X(k). In either case, the number of complex multiplications and additions is reduced from N  2  in the DFT to Nlog N. For 2  more details on the derivation of the FFT, the reader is referred to the excellent textbook by Oppenheim and Schafer [Oppe75].  The DIT and DIF butterflies are illustrated in Figure 3-4. We see that the butterfly process has two complex inputs, A and B, two complex outputs, X and Y, and a complex multiplier C (unit-circle coefficient).  The DIT and DIF  butterflies each require the same number of arithmetic operations.  Figure 3-5 is a diagram of the DIF butterfly showing the real arithmetic operations  as  implemented  in  the  FFT spectrum  analyzer.  The divide-by-2  elements are explained in section 3.5.3.  The complete FFT consists of a series of butterflies arranged in groups called "stages" or "passes". Figures 3-6 and 3-7 are flow diagrams for two FFTs having different  addressing schemes. Each node represents  one butterfly. The  number before/after each node is the exponent in the unit-circle coefficient for the DIT/DIF algorithm. In each stage, the butterflies are computed in order from top to bottom.  There are M = log N stages in the FFT and N/2 butterflies per stage. 2  Each stage can be considered as a transformation of one N-point input array into another N-point array, the first input array being the original data x(n) and the last output array being the DFT result X(k).  46  A O  DIT B  O  A O  DIF B O  C = cos 8 - j sin G  G=  Figure 3-4. Flow Diagrams for DIT and DIF Butterflies  47  C R = cosQ Ci = — sin 9 XR  =  [AR  +  X,  =  [A,  +  YR  =  [(BR-  Yi = [(B,  /2  B]]  -  n  A R ) ( " CR)  +  (B,  -  A , ) C , ]/ 2  AI ) ( - CR)  -  (BR  "  A ) C , ]/ 2 R  Figure 3-5. Flow Diagram for DIF Butterfly as Implemented in the Analyzer  48 A phenomenon known as "bit-reversal" is inherent in the FFT algorithm. The FFT results X(k) are produced in bit-reversed order, i.e., if k is written as a binary number and its bits are reversed to form a new index, say k the results X(k ) will be in the order k rev  FFT  algorithm call  for  bit-reversed  r e v  rev  , then  = 0,1,...,N—1. Some versions of the  inputs.  These  produce normally-ordered  outputs.  The  DFT in Equation 3-1  is  equivalent  to  a bank of  finite-impulse  response filters, t The shape of an individual filter is defined by the window function. The filters are spaced in frequency by "bin-width" bw, defined as: bw = f /N = 1/T  (Hz)  s  where  f = sampling g  rate  (samples/sec),  N = length  of  DFT, and  T = block  duration (sec).  The minimum sampling rate (Nyquist rate) for avoiding aliasing is: f  s  = 2BW  where BW = bandwidth of input signal.  3.2. SURVEY OF REAL-TIME NARROWBAND PROCESSING TECHNIQUES Before  choosing  to  build  a  special-purpose  FFT spectrum analyzer,  numerous methods of real-time narrowband processing were considered. These included general-purpose computing, swept IF, one or two bit correlation, analog tThis can be shown by considering the DFT as a "complex heterodyne to baseband and then low-pass filter" process.  Figure 3-6. Flow Diagram for 16-Point In-Place FFT (from [Rabi75], courtesy of L.R. Rabiner)  Figure 3-7. Flow Diagram for 16-Point Constant-Geometry FFT (from [Rabi75], courtesy of L.R. Rabiner)  50 filter banks, Walsh functions, DSP chip-based systems, and special-purpose custom hardware. The latter was chosen for the interference monitor. Details of the advantages and disadvantages of the various methods are given in the following sections.  We shall  define  "real-time" to  mean  that,  for  a  given  analysis  bandwidth, no data is discarded in the processing, e.g. in the Welch process, where blocks of data are processed continuously, real-time implies there are no gaps between blocks.  3.2.1. General-Purpose Computers Since we require a real-time wide-bandwidth system,  the narrowband  processor must be dedicated to the task at hand. This requirement coupled with cost-efficiency rules out mini- and larger computers as well as array processors. The remaining possibility is a high-performance microcomputer. Its speed can be used efficiently if extra hardware is added to double-buffer the I/O. Algorithms other than the ubiquitous FFT can be programmed, e.g.  maximum entropy,  Prony, or other "exotic" estimation techniques. However, a survey of available processors showed that the bandwidth of such a system is too low for our purposes  ( «* 100 Hz — 1 kHz  using  the  FFT, less  bandwidth  with other  algorithms).  3.2.2. Swept IF Almost all commercial spectrum analyzers use the "swept IF" method to measure  the  power  in  a  narrow  band.  As  shown  in  Figure 3-8,  the  image-suppressed analog signal is mixed down to an intermediate frequency (IF) and passed through a narrow bandpass filter. The filtered signal is then detected  and sampled. The frequency of interest is selected by setting the frequency of the local oscillator (LO). To obtain a power spectrum, the LO is swept over a range  of frequencies.  Swept  IF methods  are convenient  for analyzing high  frequencies because of their relative simplicity.  A display can be generated by synchronizing the LO with the display scan rate. The vertical deflection is produced by a DC level from a lowpass filtered version of the detected power, i.e., there is no explicit sampling.  The range of signals we want to detect includes signals that are buried in the noise.  Averaging of the power spectra must be done to reduce the  fluctuations due to noise. Averaging K independent samples reduces the noise variance by measurements  a factor spaced  1/K. The swept D? method can produce independent no  closer  than  1/BW = T seconds  apart,  where  BW = bandwidth of the IF filter in Hz. This is true regardless of whether the LO is fixed or sweeping. On the other hand, the FFT method (also shown in Figure 3-8) produces N/2 independent samples every T sec where BW equals the bin-width. Therefore, for a given resolution and level of detectability, the swept D7 approach requires N/2 times more averaging time than the FFT. In other words, for a given resolution and integration time, the FFT is much more sensitive (can detect smaller signals). Since we want to detect signals quickly, the swept IP method is less suitable than a "multi-filter" method such as the FFT.  52  Swept IF Method o o o o  image-suppressed real analog data  ^1 power detect  _^ /°^__^ 0  sample every T sec  bandpass filter (BW = 1/T)  0  1 power spectrum sample e v e r  y  T  s e c  step frequency every T sec  FFT Method (double-buffering not shown)  lowpass—filtered real analog data  (BW = N/(2T))  A/D  —> N-point FFT  —3»  I|  2  N/2 power spectrum samples every T sec  Figure 3-8. Comparison of Swept IF and FFT Methods  53 3.2.3. One or Two Bit Correlation Rather than averaging the power spectra of successive FFTs, it is possible to average auto-correlations and then do one FFT to get the power spectrum estimate.  However,  except for small values of N, correlation is  much less  efficient than direct FFT analysis (0(N ) versus 0(Nlog N) computations). 2  2  A technique often used in radiotelescopes is "one or two bit correlation". The incoming signals are quantized to a few levels and the correlation (both cross and auto) and integration are done with special-purpose hardware. Because the wordlength is very short, the circuitry can use very simple multipliers and adders. High-speed logic allows large real-time bandwidths to be achieved, e.g. 10-20 MHz.  Coarse quantization does not degrade the SNR excessively if the input signal is much smaller than the noise [Vlec66]. For example, one bit (two level) quantization degrades the SNR by only 1.96 dB [Bowe74] when the SNR<< 1.  The interference monitor, however, must handle a wide dynamic range of signal levels (from SNR < < 1 to SNR > > 1). Under circumstances of one or more powerful  signals,  coarse  quantization  and correlation  would  cause two  problems. First, large signals would be severely clipped. This would destroy the magnitude information and generate numerous harmonics. The harmonics (in-band and aliased counterparts) would clutter the spectrum and mask smaller signals. "Decluttering" the spectrum is thought to be infeasible. Second, the statistics of the  auto-correlator  would be  distorted  from  Gaussian, thereby  producing an  54 irreducible "noise".  3.2.4. Analog Filter Bank The power spectrum can be measured by detecting and integrating the outputs  of  a bank of contiguous,  fixed-frequency  bandpass  filters.  A large  bandwidth can be achieved. However, there are drawbacks. First, it can be difficult to realize the filters if the ratio (filter bandwidth)/(center frequency) is small. Second, analog circuitry is prone to drift problems due to aging and temperature variations. Third, the amount of hardware grows linearly with the number of channels. To match the analyzer used in this project, 128 4 kHz-wide bandpass filters (plus detectors and integrators) would have to be built, and the problem of sampling their outputs would have to be solved. This would be both expensive and time-consuming.  3.2.5. Walsh Functions The Walsh transform [Beau84,Blac74] is similar to the Fourier transform, except that the basis set consists of binary waveforms, not complex sinusoids. It is conceivable that fairly simple hardware could be designed to perform the Walsh transform very quickly. Multiplication is not necessary because the basis set only takes on the values +1 and —1.  Unfortunately, the Walsh transform is not amenable to the processing of sinusoids. It is not surprising that the Walsh transform of a sinusoid yields a similar result to the Fourier transform of a square wave,  i.e.,  a spectrum  cluttered with odd harmonics or their aliased counterparts. For this reason, the  55 design of a Walsh processor was not pursued.  3.2.6. DSP Chips The last decade has seen the advent and growth of the digital signal processing (DSP) chip, a microprocessor tailored to rapidly execute DSP routines, most notably N-l  those  a(n)x(n) (e.g.  algorithms the  involving  DFT and filter  sum-of-products  expressions  like  convolution). If I/O double-buffering  circuitry' is added to a DSP chip-based system, the throughput is limited only by the load-compute-unload time of the processor. A survey of available processors when the project began showed that a fixed-point FFT spectrum analyzer could be built with real-time bandwidth in the range 10—100 kHz.t A two processor system that doubled the bandwidth appeared feasible.  Adding more processors  made the system too complex. Some commercially-available DSP chip-based FFT processors are compared in Table 3-1.$ Although there are faster DSP chips than those in  the  table,  they  have  not  yet  been  incorporated into commercial  machines. 3.2.7. Custom Hardware In general, for an}' DSP problem, the highest throughput solution will be to build highly-specialized hardware. The window-FFT-power spectrum process* can be hard-wired with high-speed logic chips such as multipliers, adders, counters, tA note of caution: most published specifications of FFT execution times do not include the time to load and unload the data. tThe bandwidths of the systems in Table 3-1 and those designed in the author's surveys of digital technology are compared based on the following assumptions: bin-width 4 kHz; windowing, FFT, and power calculation all done by processor; "two-FFTs-in-one-trick" used on real data; and anti-aliasing filter ignored. *In general, other power spectrum estimation methods are too complex to hard-wire.  System  |  Architecture  R a p i d S y s t e m s R340 IBM PC FFT Peripheral  DSP  IOS System 416-2-210 Vector Signal Processor  OSP chip-based (ZORAN ZR34161)  Burr-Brown VMEbus FFT  DSP  chip-based  25  kHz  Arithmetic  16-b1t  fixed  |  Cost (Canada)  $2,400  (TMS32010)  SPV120 Module  chip-based  28 kHz (1 chan. mode) 90  kHz  16-bit block floating-point  16-b1t  fixed  $11,90O  multIpl1ers W1th hardwired microcode  M o t o r o l a T-ASP II Array Processor (4 AU's)  TTL b l t - s l i c e , parallel pipelines  FFT spectrum analyzer bu11t by author  multIpl1ers with hardwired microcode  of a n t i - a l i a s i n g  filter  262  2,000  500  |  Comments  hardware a d d r e s s i n g , N = 1024 only, not programmable r e q u i r e s IBM PC host, some p r o g r a m m i n g , 2 channels available  $5,300  A-D not Included, programmable  A-D not Included, programmable, a v a l l a b l e 40 1987  (TMS32020)  E l s m C o r p . FFT-101 VMEbus FFT Module  rolloff  Real-Time | Bandwidth*!  kHz  floating-point  $48,000  kHz  floating-point  $700,000  A-D not Included, m u l 11 - t a s k 1 n g , vector programmable  kHz  16-b1t  $1,500 (parts only)  h 1 g h 1 y s p e c 1 a 11 z e d , N = 256 only, not programmable  fixed  not considered  Table 3-1. Comparison of FFT Spectrum Analyzer Systems (1987)  57 memories, PROMs, etc. Such a machine is essentially non-programmable.  A number of special-purpose non-commercial FFT processors  have been  built previously [Ali78,Kasp81]. The specialized machines in the literature were not suitable of directly applicable to the present application, e.g. they were too slow, too complex and expensive,  and/or performed only the FFT. Also, no  thorough treatment of all facets of the design of a Welch processor was found in the literature. It was decided to build a special-purpose machine that executes the Welch process at high speed.  The FFT spectrum analyzer in the interference monitor is an original design  by  the  author.  recently-available  Custom  off-the-shelf  hardware  small-scale  and  was  designed  medium-scale  and  built  integrated  using circuits  (actually, the multipliers are large-scale ICs). It has a real-time bandwidth of 500 kHz (without considering the roll-off of the anti-aliasing filter). The design is a compromise between speed and simplicity, the latter determining cost and development time.  Digital technology is evolving at a startling pace. The speed and density of integrated circuits increase by significant  amounts every year. New signal  processing chips are continually making their debut on the commercial market. Therefore,  the  design  of custom hardware requires a "jump in and build"  attitude, i.e., a line must be drawn and the system designed from available components. This was certainly the case in the design of the analyzer.  58 In the next section, various concepts in the design of custom hardware are expanded upon.  3.3. ARCHITECTURAL  ALTERNATIVES  During the development of the FFT spectrum analyzer, a number of different  design options were considered. Most choices involved the ubiquitous  tradeoff between cost/complexity and speed. Unfortunately, since the analyzer was entirely a "one-man project", the more complex (and costly) schemes had to be forgone in lieu of reality. In fact, a detailed early design ended up being scaled down  to  the  present  version.  Nevertheless,  the  investigation  into  various  architectural alternatives was both instructive and fruitful.  The following sections describe some of the design options considered in the development of the analyzer. Included are a few well-known schemes and some new ideas.  3.3.1. Double-Buffering By adding extra memory banks (buffers), a process can be divided into sub-processes that run simultaneously.  The throughput is then limited by the  slowest sub-process.  In  Welch's  periodogram method,  the  processes  "A-D and windowing",  "FFT", "power spectrum computation/accumulation", and "data upload to host" can all be double-buffered to form a pipeline. For example, two memories can be placed between the A-D/window and FFT processes. When one memory is filling  59 up with windowed data, the other is being FFT'd (Figure 3-10).  Double-buffering requires the ability to switch data lines, and, in some cases, control and address lines. The difficulty incurred in swapping data lines can be ameliorated by using memory chips that have separate input/output (I/O) data  lines.  Less  switching  hardware is  required compared to  memory chips having common I/O. Unfortunately, separate  systems with  I/O memory chips  could not be used in the analyzer because they did not fit standard socket spacings!  When pipelined in the above fashion, the throughput of the analyzer is limited by the FFT time, i.e., the FFT is the bottleneck.  3.3.2. Real-Time Bandwidth When double-buffering is used, the speed of the FFT, limits the data rate (bandwidth). If a single butterfly unit is implemented in hardware, and if the real input data is packed into complex arrays, two blocks each, and the data is sampled at the Nyquist rate, then the unit must process  1 FFT = (N/2)log N 2  butterflies in the time it takes for two data blocks to be collected (2N/f seconds). g  For this case, it then follows that: TmTTT i S U 1 1  = -T—•  4  f log N s  where TgjjTT  N = length =  —  2  of  sec  =  ——•  4  -  Nbwlog N  sec  (3-3)  2  FFT, bw = bin-width (Hz),  f = sampling g  rate (Hz), and  butterfly execution time (sec). This equation can be used to select N,  bw, and TgjjTT- Since N = 2^ in the FFT algorithm, the choices for N and  60 bw vary in jumps for a given  For  TJJTJTT-  a given bin-width, decreasing  causes a less than linear  TJJTJTT  increase in bandwidth BW = f /2 because of the logarithm in Equation 3-3. For g  example, to double the bandwidth,  m  TJJTJTT  u  s  be reduced by more than a  t  factor of two: for bw = 4 kHz: >  N  =  128,  TJJTJTT  >  N  =  256,  TJJTJTT  = =  1116 4  8  8  ns  ns, >  BW B  W  = =  ratio = 2.3  256 512  kHz kHz  0.5  The 20 MHz bandwidth of interest is too wide to process in real-time. For a given frequency resolution, there are three practical alternatives for processing the data in such a case: use a long FFT such that there are gaps between blocks; use  non-overlapped, contiguous  blocks; or use  overlapped blocks. The  second method, in which the band is broken up into sub-bands each of size equal to the maximum-attainable real-time bandwidtht of the processor, is the most efficient, t The first method is less efficient because of the logarithm in Equation 3-3. In the third method, the sub-bandwidth is traded off with overlap. tMaximum-attainable real-time bandwidth is defined as the maximum bandwidth that can be processed using non-overlapped, contiguous data segments. IHere, efficiency is defined as the percentage, on average, of time samples used in the FFT computation for a given frequency bin.  61 Recall that by overlapping data blocks, more averaging per unit time can be obtained (section 3.1.1). However, since the overlapped blocks are correlated, the variance reduction is not quite linear with the number of averages. Therefore, it is less efficient to overlap the data blocks.  3.3.3.  Speeding Up the FFT The FFT is the bottleneck in a double-buffered Welch processor and hence  it was the object of most of the efforts to boost throughput. The butterfly is the basic task in the FFT. A butterfly involves: reading two complex words from memory,  computing  the  butterfly,  and writing two  new  complex  words to  memory. The computation consists of 10 arithmetic operations: 4 multiplications, 3 additions, and 3 subtractions. The minimum custom hardware needed to do an FFT is: one arithmetic processor,  one (complex) data memory, one (complex)  coefficient memory, and a control and address generator. The processor does the 10 operations sequentially and the memory is continuously overwritten with new results. There are a number of schemes used to boost speed as described in the following sub-sections.  3.3.3.1. Parallel Butterfly Computations  The butterfly can be hard-wired with individual units for each of the 10 operations. This requires adding I/O latches to hold data and tri-state buffers for sharing data on each of the real and imaginary buses. If the word length is long, it may be necessary to use bit-slice designs, e.g. cascading four 4-bit adder chips to form a single 16-bit adder.  62 Some of the calculations can be performed with the same hardware. In particular,  multiplier/accumulator chips  can  be  used  to  do  multiply/add or  multiply/subtract operations. The extra time to do an addition (or subtraction) after a multiplication is usually small.  Also, the computations can be pipelined, i.e., divided into sub-computations operating simultaneously, e.g. in the DIF butterfly: | scaling | adds, subs | mults | adds, subs |.  This  requires putting latches  between stages.  The limited access speeds of  present-day memories imply that such an architecture requires two memories operating simultaneously to make the scheme efficient,  one memory providing  input data, the other accepting results. Three memories would then be required to do the double-buffering between the A-D/window process . and the FFT. With present technology, the DIF butterfly is particularly well-suited to a three-section pipelined design because it is "better balanced" (the adds and subs before and after the mults can be combined with the scaling and I/O latch delays). This scheme is the basis of a higher-bandwidth design considered earlier in the project. The control circuitry proved to be too complex (time-consuming) for a one-man project, although a detailed and feasible design was worked out. Some of the necessary control functions are: flush butterfly pipeline, context switch of triple memory buffer, and address pipelining.  63 3.3.3.2. Higher Radix  A radix higher than two can be used to reduce the number of butterflies in  the FFT algorithm  butterflies.  [Rabi75].  For example,  radix-4  requires  (N/4)log N a  However, the butterfly is now a 4-input/4-output process with 34  arithmetic operations and the hardware is far more complex than radix-2. The memory access time becomes a major bottleneck in such a system. Also, the choices of N are more restricted, i.e., N = 4^.  3.3.3.3. Overlapped Memory/Compute Cycles  The simplest butterfly processor performs the read-compute-write operations sequentially.  When the memory and compute cycle times are comparable, an  improvement in throughput can be realized by overlapping the cycles. Of course, extra control is needed, the trickiest problem being the design of circuitry to produce interleaved timing signals at the FFT stage boundaries (e.g. the memory and compute cycles must end at slightly different times).  Figure 3-9 illustrates three schemes: no overlap, total overlap when cycle times are equal, and partial overlap.  In the analyzer, a compromise is made between total overlap and no overlap. Referring to Figures 3-5 and A2-4, we observe that results XR and Xj are derived from additions only. Yj^ and Yj must each go through two stages of additions (or subtractions) and one stage of multiplications. Therefore, after both inputs A and B have been latched, X may be written out before Y has finished  Non-Overlapped Cycles read memory  cycles:  |_ ^1  read  write  ^1  I  I  I  I  I  write  ^1  I  read  I  ^2  I  read I  write  Bj  I  I  compute butterfly 1  compute cycles:  I  I  ^2  I  write ^*2  I  compute butterfly 2  Overlapped Cycles read memory  cycles:  l _ *1  read  read  1  • Bj  .  read  | *g  write  i Bg  write  . Xj  . Yj  compute butterfly 1  compute cycles:  read . Aj  read B  write . X  s  write  compute butterfly 2  read  . A4  . Tg  e  read .  B4  write . X  write .  s  Y  9  compute butterfly 3  Partially-Overlapped Cycles (as used in Analyzer) read memory  cycles:  compute cycles:  |  A  »  read |  B  '  write |  |  |  |  |  compute butterfly 1  X  '  write |  T  '  read |  A  »  read |  B  *  |  write |  |  |  compute butterfly 2  *'  write  |  Y  j  Figure 3-9. Comparison of Three Schemes for Peforming Memory and Compute Cycles  *  |  read A  »  |  read B  »  65 being computedt A similar overlap is possible in the DIT algorithm in which A is read in while the product BC is being computed.  3.3.3.4. Pipelined FFT Stages  The  FFT can be  divided into  M = log N  pipelined processors,  2  each  performing one pass (stage) in the algorithm [Rabi75]. When double-buffered, the throughput is limited by the time to process one stage of butterflies. Because results within one FFT are not overwritten, constant geometry (section 3.3.4) can be used to simplify data addressing. One processor-memory unit can be designed and then replicated. The only difference between processors is the contents of the unit-circle coefficient PROMs. The only global control required is the distribution of a master clock.  The cost of such systems increases by the number of processors.  3.3.4. FFT Addressing " There are two basic schemes for data addressing in the FFT: in-place and constant-geometry  [Rabi75]. These are illustrated in Figures 3-6 and 3-7. In the  in-place method, the butterfly outputs are written to the same locations from where  the  inputs  implementations.  were  The  read.  address  This  is  sequence  convenient, changes  particularly in  from  stage  to  software stage.  In  constant-geometry, the outputs are, in general, not written to the input locations. The address sequence is the same for each stage. tAfter the analyzer was built, it was noticed that Ali used a similar technique in his FFT processor [Ali 7 8].  66 To prevent unprocessed data from being overwritten, the results of a constant-geometry  stage  constant-geometry  requires  must  be  twice the  placed  in  a  second  memory,  i.e.,  memory of in-place. The advantage of  constant-geometry is simpler data address generation circuitry.  In both schemes, the coefficient address sequences change from stage to stage, and the circuitry for their generation is comparable in complexity.  Bit-reversal of the  data addresses is  inherent in the FFT algorithm.  Normally-ordered inputs result in bit-reversed outputs, and vice-versa. Care must be taken to select an addressing scheme commensurate with the input order, i.e., a normally-ordered input algorithm operating on bit-reversed data will produce garbage. Bit-reversal is unique in that it is easier to perform in hardware (simply reverse address lines) than in software!  3.3.5. DIT versus DIF From a design viewpoint, the DIT and DIF algorithms are quite similar. The final choice for the implementation was a flip of a coin. Each requires the same number of multiplications, additions, and subtractions. The address sequences are different but the generation circuitry is basically the same. However, there are a few noteworthy differences. These are summarized below. DIT: - partial overlap of memory read and compute cycles (section 3.3.3.3) - less chance of overflow (section 3.5.3) DIF: - partial overlap of memory write and compute cycles (section 3.3.3.3) - evidence of less roundoff error [Sund77] - more efficient when butterfly is pipelined (section 3.3.3.1)  67 3.4. DESIGN AND CONSTRUCTION OF THE FFT SPECTRUM ANALYZER The Welch's  FFT spectrum analyzer is  modified  bandwidth-limited  periodogram analog  signal  a digital hardware implementation of  power is  spectrum  digitized,  estimator.  windowed,  FFT'd,  The  500 kHz  squared, and  averaged, all in real-time.  To  achieve  wide bandwidth, custom hardware was  designed  and built  "from the ground up". The design is synchronous and incorporates a central clock from which all other signals are (directly or indirectly) derived. Hard-wired and PROM microcoding is used for control sequencing. The circuitry includes 221 IC's and occupies three 7"xl6" wire-wrap boards (total number of wraps = 8384).  The  performance specifications  of the FFT spectrum analyzer are listed  below. FFT length N = 256 resolution = 3.91 kHz = 244 Hz (ZOOM mode) real-time bandwidth = 500 kHz = 31.25 kHz (ZOOM mode) sampling rate = 1 Megasamples/sec = 62.5 ksamples/sec (ZOOM mode) dynamic range  =*  46 dB  integration time = 2—32 sec = .125-2 sec (ZOOM mode) power spectrum = 128 32-bit samples A-D word length = 8 bits (2's complement) window word length = 8 bits (unsigned)  68 FFT word length = 16 bits (2's complement) power spectrum word length = 16 bits (unsigned) accumulator width = 32 bits power requirements = 10 A @ 5 V, 40 mA @ 12 V  3-4.1. Design Overview The analyzer is divided into four boards: analog-to digital conversion (plus windowing) board (AD Board), butterfly board (BUTT Board), power spectrum accumulator board (PS Board), and control and FFT memories board (C&M Board). The C&M Board houses the control circuitry and the FFT memories. The other three boards are "slaves" that perform the computations. Figure 3-10 is a block diagram of the process. It illustrates the flow of data but does not include address and control blocks. Figure 3-11  illustrates the physical layout of the  boards and shows the flow of inter-board signals.  High  speed  was  an  important design  goal.  This  was  achieved by  double-buffering the processing sections and using recently available high-speed hardware. Double-buffering is used between the following pairs of processes: A-D conversion (plus windowing) and FFT, FFT and power spectrum computation, and between power spectrum computation and the microcomputer. The three main computations proceed simultaneously, i.e., they are pipelined.  The following sections contain detailed descriptions of the parts of the FFT spectrum  analyzer.  Schematic  diagrams  of  the  circuitry  are  contained in  Appendix 2 and are referenced in the following text. The first seven schematics  FFT wiory bank 1 Real x,  (0) * » a  window coefficients w(0)  3  I«ag x,„  (0) • • •  X | „ (n)  • • •  •  Real  lug  C (0) •• #  CjlO) • •  CRD) •••  Ci (j) t••  B  x , (n)  • •  sin/cos coefficients  •  Ci (% -1)  win)  X, I N - ) )  •  x,„IM-l)  16/  • •  S w(N-l)  F F T M B o r y bank 2 Real • • •  lug  • t •  t • •  • • •  BR Xi (n) = di (n)w(n)  t • •  • • •  Figure 3-10a. Block Diagram of FFT Spectrum Analyzer  CO  Poiocr  Spe,ctru.ir\  Memorij  Bank  P(0)  P(k)  /  FFT«e«>ry  16Ifag^  bank 3  Real  Iaag  X„|0)  Xi(0)  • • •  •  xR(k)  X, (k)  • • •  t * •  XB|N-k)  X, (N-k)  •  t • •  • XB (N-l)  ~7V  32  A 6a.t>k *• t square  P(k)  )  )\  P (k) + X (k) + Xj (k) + X„ (N-k) fl  PnaJk) •t »  accumulate  4  X{ (N-k)  Xi (N-l)  Figure 3-10b. Block Diagram of FFT Spectrum Analyzer (cont'd)  / ;  DIGITAL 'OUTPUT  to/from microcomputer c  d  AD Board PS Board /*  C&M Board  A  d a  a  V  d = data a - address  BUTT Board  c = control v v v  Figure 3-11. Board Layout and Inter-Board Signal Flow in FFT Spectrum Analyzer  72  Photograph 3-1. FFT Spectrum Analyzer and Microcomputer (First View) (showing inter-board cables and front panel)  73  74  Photograph 3-2. FFT Spectrum Analyzer and Microcomputer (Second View) (showing back panel and fans)  1  76  Photograph 3-3. FFT Spectrum Analyzer and Microcomputer (Third View) (showing AD and PS Boards on top, C&M Board in middle, and BUTT Board on bottom)  78 correspond to the major data flow blocks in Figure 3-10. The remainder show control and address circuitry.  3.4.2. Control and FFT Memories The  C&M Board  contains  the  control circuitry and the  three FFT  memories. It generates all the control signals and memory addresses, and sends to and receives data from the other boards. Fast bipolar PROMs, delay lines, and small-scale  integration ICs (glue logic) are used to generate the control  sequences (e.g. Figure A2-10). Addresses are generated with counters and glue logic (e.g.  Figure A2-18).  All events are synchronized to the main clock, a  32.000 MHz crystal oscillator (e.g. Figure A2-8).  Data flows between the boards via dedicated buses. Bus interface circuitry on the C&M Board allows selectable access to the three FFT memory banks (Figure A2-1). Each bank comprises four 2Kx8, 35 ns, CMOS static RAM chips. In each bank, the real and imaginary parts operate in parallel.  The flow of data is as follows (Figure 3-10): The analog signal is digitized, windowed, and then stored in either FFT Memory Bank 1 or 2. While data is collected in one of these banks, the previous data block in the other bank is FFT'd. The results of each stage of the FFT are stored in and retrieved from the same bank. On the last stage of the FFT, the results are copied into FFT Memory Bank 3. During the next FFT, the power spectrum of the data in Bank 3 is computed and added to the spectrum in the Power Spectrum Memory Bank. Once the specified number of FFTs have been averaged, i.e., at the end of the  79 integration period, the spectrum is copied into the Output Memory Bank from which the microcomputer may retrieve the final averaged power spectrum.  3.4.3. Analog-to-Digital Conversion The analog signal is  sampled  at  1 Megasamples/sec.  Each  sample is  quantized to 8-bit 2's complement numbers.  The AD Board is carefully laid out to avoid ground loops [Shei86]. The analog and digital circuitry occupy separate halves of the board. The power and ground planes were milled out such that each is common at only one point. The A-to-D chip (Micropower MP7684KD flash converter) straddles the analog-digital boundary as shown in Figure 3-12.  The analog side consists of gain and offset  circuitry followed  by a  high-speed operational amplifier (Harris HA2541-5) to drive the high capacitance input of the converter (Figure A2-2). The digital side includes a short and long term overflow detector and window circuitry (Figures A2-3 and A2-24). The output of the A-D converter is in offset binary form. It is converted to 2's complement form by inverting the sign bit.  The  aperture  uncertainty  time  of  the  converter  is  an  important  specification. It is the maximum variation in the time at which the converter samples  the  incoming signal  and hence limits  the  bandwidth that  can be  processed without significant quantization error. For a full-scale 500 kHz sinusoidal input, the maximum rate of change in levels/sec is:  80  analog V plane (GND on other side)  digital V plane (GND on other side)  cc  cc  reference voltage digital output input signal  (GNDs , connected j here) — '  J  < coil  o  +5 Volts  Figure 3-12. Layout of A-D Chip on AD Board  81 (2 quantization levels) ^[sin(2ir500,000t)]| _ = 8.04x10 levels/sec. 8  8  t  0  The MP7684KD has an aperture uncertainty of 60 psec representing an error of: (8.04x10 levels/sec)(60 psec) = .05 levels. 8  This is much less than its ±-|- LSB linearity error.  3.4.3.1. Anti-Aliasing Filters A lowpass filter is needed to bandlimit the signal to prevent aliasing. Towards  achieving  (1 Megasamples/sec)  maximum  bandwidth,  the  sampling  rate  used  is exactly twice the maximum frequency 500 kHz, i.e., the  signal is not "over-sampled". It is therefore important to use an anti-aliasing filter  that  has  a  rapid  transition  from  passband  to  stopband.  The  Cauer-Chebyshev filter has the fastest roll-off for specified ripples in the passband and stopband. Tables of normalized L and C component values are given in [Zver67].  A seven-pole lowpass Cauer-Chebyshev filter  was  constructed using  silver-mica capacitors and specially-wound high-Q inductors. (High-Q inductors are required to achieve the rapid rolloff of the transition region.) The filter was designed to have a transition region of 433 kHz to 500 kHz, a pass-band ripple of 1.35 dB, and a maximum stop-band response of —57.84 dB. A schematic and the measured and theoretical frequency responses of the filter are shown in Figures 3-13 and 3-14.  The theoretical response was calculated with the SPICE  program [SPIC81]. The measured response is —56 dB (below in-band signals) at 500 kHz, the stopband attenuation is ^52 dB, and the passband ripple is 1.3 dB. The ferrite cores of the inductors have a limited frequency range. This is  82 probably the reason the resonance at 900 kHz is not present.  The analyzer can also be programmed to operate at a sampling rate of 62.5 ksamples/sec  (ZOOM  mode).  The  ZOOM  mode  requires  a  separate  anti-aliasing filter. If the output passband of the imageless mixer went down to DC,  a lowpass filter  with  cutoff  at  (500 kHz)/16 = 31.25 kHz  However, the imageless mixer passband begins at 20 kHz. problem,  we  can  instead  2(31.25 kHz) = 62.5 kHz  with  build a  a  bandwidth  bandpass of  suffice.  To overcome this  filter  31.25 kHz  would  centered  at  invoke  the  and  sub-sampling theorem, i.e., sample the band-limited signal at 62.5 kilosamples/sec.  An active (operational amplifier) design would probably be most suitable. The  ZOOM anti-aliasing filter has not yet been included in the  interference  monitoring system.  3.4.4. Windowing After analog-to-digital conversion, each datum is multiplied by an 8-bit unsigned window coefficient. A 256-point Kaiser-Bessel window stored in PROM is addressed sequentially by a counter. Its first sidelobe level is down —46 dB from the main lobe. The full 16-bit 2's complement product is retained and buffered onto the AD-C&M data bus (Figure A2-3).  The  window  values  were  calculated  on  a  mainframe  computer  in  double-precision FORTRAN, quantized, and written to floppy disk (for subsequent PROM programming).  16.8 pH  11.9 pH  10.1JJH  -O  O-  15.7 nF  6.49 nF  9.77 nF  1.86 nF  50 n input  16.6 nF  14.0 nF  50O output 12.5 nF  O  oo CO  Figure 3-13. 500 kHz Cauer-Chebyshev Lowpass Anti-Aliasing Filter  Frequency Response of 5 0 0 kHz A n t i - A l i a s i n g Filter  0 10  measured theoretical  -20 -30 -40 dB -50 -60 -70 \  / \  -80  / \ \ i i i  -90 h  / ; /  -100 100  200  300  400  500  600  700  800  900  1000  frequency (kHz) Figure 3-14. Frequency Response of 500 kHz  Anti-Aliasing Filter  00  85 A second 256x8 PROM containing a rectangular window (every bit equal to logical 1) was used for testing purposes.  3.4.5. Fast Fourier Transformation The  fast  Fourier  decimation-in-frequency  transform  algorithm.  is  computed  Compared  to  using the  a  constant-geometry,  in-place  algorithm,  constant-geometry requires 512 complex words instead of 256 per bank. However, since the RAMs come in 2Kx8 packages, the extra 256 words are "free".  The heart of the FFT process is the BUTT Board. It performs one DIF butterfly in 500 nsec using 16-bit, 2's complement arithmetic. One FFT takes 1024 butts x 500 nsec/butt = 512 usee. The butterfly is the rate-determining process in  the  analyzer.  Via  real  and  imaginary  bi-directional  buses  (operating  simultaneously), the board receives two complex words, A and B (each has 16-bit real, 16-bit imaginary parts), from the C&M Board, computes the butterfly (with partial overlap), and sends the results, X and Y, back. Each bus works at an 8 MHz word rate (16-bits per word).  In each stage of the FFT, the data are pre-scaled down by two to prevent word growth and subsequent overflow. In the divide-by-2 operation, the least-significant bit of the result is the logical OR of the two least-significant bits of the input. This causes numbers to be rounded up or down pseudo-randomly and  thus does not introduce the DC bias created by conventional "round up  only" or "round down only" schemes.  86 The butterfly computation is hard-wired with four 16-bit, 85 nsec, CMOS parallel  multipliers  plus  74F'  series,  TTL bit-slice  adders  and  sub tractors  (Figures A2-4 and A2-5). Latches and tri-state latches are used to hold data and buffer data onto the buses. The data lines are terminated at both the C&M Board and the BUTT Board to reduce ringing.  The unit-circle coefficients Cj are stored in a 128x32 PROM bank as —cos and  —sin. The negative of cos is stored because the number —1.000 can be  represented exactly while +1.000 cannot. As seen in Table 3-2,  +1.000 is the  only unity-valued cosine coefficient occurring in the DIF FFT. Thus, storing —cos reduces the computational noise. Similarly, —j occurs while +j does not, so —sin is stored.  The  sin/cos  values  were  calculated  on  a  mainframe  computer  in  double-precision FORTRAN, quantized, and written to floppy disk (for subsequent PROM programming).  3.4.5.1. FFT Data and Coefficient Addressing  Data address generation for constant-geometry  is very simple. Table 3-3  lists the data address sequences for a 16-point transform. The read addresses are generated by rotating the output of a counter by one bit (Figure A2-16). The write addresses are the outputs of a counter.  Table 3-4 lists the coefficient addresses for a 16-point transform. They are generated  by masking the lower s bits of a counter during the  s^  stage  DIF,  e 1 2 3  1  2 4  8 16 32 64 128  4  5 6 7  DIF, stage  1 2 3 4 5 6 7  -  16  +1 -1  stage  0  f b i t s  |  I  |  I I I j  I j  0  0 0 0  e 0 0  4  e 8 e 16 e 32 e 64 e 0  -  3 2  0 1 2 3 4 5 6  1  2  128 64 32 16 8 4 2 1  7  8  DIT  +j  stage  -J  0 0 0 0 0 0 0 0  7  0  6 4 8 16 32 64  1 2 3 4 5  0  #bits  7  -  16  +1 -1  stage  -J  e e  e  +1 -1 4 4 4 8 16 32 64 128  +J  e e e e e e e  #bit s  DIT,  |  0 0 0 0 0 0 0 0  #bits  0 0 0 0 0 0  2 3  "j  0 0 0 64 0 32 0 16 0 8 0 4 0 2 0 1  -  +1 -1  I 128 | 64 I 32 I 16 I 8 j 4 4 j 4  +j  8 +j  0 0 0 0 0 0 0 0  "j  0  64 32 16 8 4 6 7  Table 3-2. Number of Occurences of Unity Values of Unit-Circle Coefficients in 256-Point FFT  |  write  address  read  j  address  (binary)  j  (binary)  (A) (B) (A) (B) (A) (B) (A) (B) (A) (B) (A) (B) (A) (B) (A) (B)  0000 1000 0001 1001 0010 1010 0011 1011 0100 1100 0101 1101 0110 1110 0111 1111  | | | | | j j  (X) (Y) (X) (Y) (X) (Y) (X)  |  (Y)  j  (X)  | j  | |  (Y) (X) (Y) (X)  j  (Y)  j  (X)  j  (Y)  0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111  Table 3-3. Read and Write Address Sequences for 16-Point Constant-Geometry DIF FFT  88 (Figure A2-18).  During the first stage, the data is read from the top half of memory and written to the bottom half. In subsequent stages, the direction of data flip-flops back and forth. The swap is implemented by toggling the most significant bit ' (A ) of the address (Figure A2-17). 8  During the final stage, the data is copied to FFT Memory Bank 3. Hardwired bit-reversal is applied at this point (Figure A2-20).  3.4.6. Power Spectrum Accumulation The 128-point power spectrum of the complex FFT data is computed by squaring and adding X (k) and Xj(k) values. The elements are addressed such R  that the power spectrum is "unscrambled" as described in section 3.1.3. (Recall that the computation actually yields the sum of two power spectra.)  The circuitry centers around a 16-bit, 95 nsec, CMOS parallel multiplier for squaring and a 32-bit,  74F' series, TTL bit-slice adder for accumulation  (Figure A2-6). The data rate is such that only one multiplier is required to do the four squares per bin. The spectrum can accumulate up to 32 bits in a 128x32  NMOS  memory  bank.t  Further  averaging  can  be  done  by  the  microcomputer.  The power spectrum computations for a particular FFT take place during tThe data rate is too great for the microcomputer to do all the accumulation.  89  stage C  |  1  |  2  |  3  600  000  000  000  001  000  000  000  010  010  000  000  011  010  000  000  100  100  100  000  101  100  100  000  110  110  100  000  111  110  100  000  (binary  addresses)  Table 3-4. Coefficients Address Sequence for 16-Point Constant-Geometry DIF FFT  wri te  read addresses (binary)  addresses (bi nary)  0000,  0000  0000  0001,  1111  0001  0010,  1110  0010  0011,  1101  0011  0100,  1100  0100  0101,  1011  0101  0110,  1010  0110  0111,  1001  0111  Table 3-5. Read and Write Address Sequences for Unscrambling Power Spectrum (N=16)  90 the first seven stages of the next FFT. (Recall that, during the final stage, the new complex spectrum is being loaded into FFT Memory Bank 3.) The power spectrum  clock is  inhibited during the  final  stage by an end-of-FFT pulse  (Figure A2-9).  3.4.6.1. Power Spectrum Addressing The  read and write address sequences for calculating an unscrambled  power spectrum for a 16-point transform are listed in Table 3-5. The first read address and the write address are the output of a counter. The second read address is generated by a PROM addressed by the counter (Figure A2-19).  3.4.7. Interface to Microcomputer The FFT spectrum analyzer is connected to the microcomputer via ports on the microcomputer (Figures A2-7, A2-8, A2-22, and A2-23). The interface signals are summarized as follows. 1. NAVG0-7 = Number of averages per integration period. The microcomputer can set NAVG0-7 at any time. The range of integration times is 2—32 sec (normal mode) and .125—2 sec (ZOOM mode). 2. MODE0-1 = Clock mode. The microcomputer can set "external", "single step", "normal", or "ZOOM".  MODE0-1 to  3. EXTCLK = External clock signal from microcomputer. 4. SYSRESET = System reset from microcomputer. This signal resets the analyzer by zeroing the accumulator and restarting the processing. 5. OUTPUT0-7 = Output data byte from analyzer. The 128-point spectrum (32-bit values) is uploaded to the microcomputer in bytes. 6. DATAREADY = Data ready signal from analyzer. The microcomputer polls this line. It indicates when data is ready for upload. 7. EMUX, A0-1 = Enable output bus and byte address. During an upload,  91 the microcomputer manipulates these signals. 8. 1ARDY, 2ARDY, 2BRDY = Microcomputer port ready lines. During the final accumulation, the averaged power spectrum is copied into a 128x32 NMOS memory bank that serves as an output buffer (Figure A2-7). The microcomputer can then read the data any time before the end of the next integration period. One upload (128 32-bit words) takes 92 ms.  3.4.8. Considerations in the Circuit Design The  overall  design  goals  included  high  speed,  reasonable  consumption, moderate cost, modularity, reliability, and serviceability.  power In this  section, the attainment of these goals will be elaborated upon.  High speed is desired to achieve wide bandwidth. When digital logic is operated at high speeds, e.g.,  10's of MHz and up, three basic problems arise:  noise generation, crosstalk, and ringing [DeFa70,Morr71]. To reduce noise, the wire-wrap boards have magnetic fields  ground and V  generated  decoupling capacitors  are  c c  planes  to confine  by the fast switching signals used  to  reduce current spikes  the  electric and  on the wires. Also, by providing local,  short-term power to chips. In the analyzer, each chip is accompanied by a 0.1 jiF Z5U-grade ceramic decoupling capacitor. The make and value were selected after measuring the impedance of numerous capacitors at various frequencies. As well, several 10—15 uF tantalum capacitors are placed on each board to handle longer-term power demands.  Crosstalk on adjacent wires and ringing on a single wire increase with  92 frequency and length of wire. To reduce crosstalk, signal lines can be paired with ground lines to confine their fields. Ringing is a transmission line effect and can be reduced, ideally, by providing a known, controlled characteristic impedance Z  Q  along the signal path and terminating (matching) both ends with resistances  equal to Z . A rule of thumb says termination is needed when the path length 0  is long enough such that: t  d  £ (•£ to 4-)min{t,t} r  f  where tj = one-way transit time, t = rise-time of logic, and tf = fall-time of logic. For r  the inter-board cables, the propagation speed is 1.7 ns/foot. The 74F' drivers have rise-  and fall-times  in the range  2—4 ns.  The rule of thumb implies that  termination is necessary for wire lengths ^ 5". A controlled impedance can be effected  by running signal wires on top of a ground plane or along side a  ground wire in ribbon cable (Z  Q  1000 in either case). Even better results are  obtained with twisted-pair wires where one wire is grounded at each end. (The characteristic impedance of 30 AWG twisted-pair wire-wrap wire was measured to be  1110.)  However,  source/destination  a single  requires  more  terminating resistor driving  in series/parallel  voltage/current  than  is  at the  available in  currently-available TTL drivers. A compromise solution to the termination problem is to use a split-resistor (two resistors) combination at the destination whose Thevenin resistance is approximately Z . Q  All three ground schemes are used in the analyzer. Wires on a board are run  as  close  edge-triggered  to  the  ground  plane  as  possible.  Sensitive  inputs, that run more than a few inches  signals,  e.g.,  are twisted around  93 ground wires (grounded at each end). All inter-board signals  are paired with  ground wires (grounded at each end) in ribbon cable. As well, all inter-board signals are destination terminated with split-resistor pairs to reduce ringing. (The bidirectional data buses are terminated at each end.) There are a few different sets of values of terminators available. The greatest reduction in ringing (with reasonable current requirements) for 74F' series drivers and loads is achieved r  with 180£i-390fi terminators. This was determined by using reflection diagrams [FAST85].  Board  layout  was  an  important  and  time-consuming  task.  Countless  variations on IC placement were tried with the following considerations in mind: minimization of the critical wire lengths, the boardspace was at a premium (esp. the C&M Board), and the interboard ribbon cables must line up. A drawing of the boards is shown in Figure 3-11. The C&M Board is located in the middle to minimize the lengths of the numerous interconnecting buses.  Low power consumption is important because the interference monitor will eventually be powered by a battery-based uninterruptable power supply (section 7.1). Also, the monitor might one day be made portable to faciliate tracking down of interfering sources. It would then require a battery power supply. In general, the IC technology with the lowest power consumption was used for a given speed requirement. The analyzer consists of CMOS multipliers, CMOS and NMOS static RAMs, a CMOS A-D converter, and bipolar PROMS, as well as 74F',  74LS', and 74' series TTL chips. The analyzer consumes 10 A @ 5 V and  40 mA @ 12 V.  94 Cost was minimized because of budget constraints aggravated by drastic cuts in federal funding to the observatory. The total cost of the parts used in the project was $4,000. The spectrum analyzer parts cost $1,500. As shown in Table 3-1, the spectrum analyzer built for this project achieves a high bandwidth at a fraction of the cost (albeit parts only) of other FFT systems.  The analyzer was made modular to facilitate testing and servicing. It is divided into four boards: analog-to-digital conversion (plus windowing) board C&M Board.  On each  board,  special  microcomputer ports were  wired for  testing  sub-sections of the analyzer. Sub-sections can be tested separately by running test routines on the microcomputer after rearranging the ribbon cables. In a typical test routine, the microcomputer provides test data, addresses, and control signals to the boards and retrieves and checks the results.  Since the analyzer is part of a working, useful system, it is important that it be reliable and serviceable. It is possible that some chips will eventually fail. By using the test software, a fault can be traced to an individual board. Also, the timing is designed to accommodate worst-case chip delays over the entire 0 to 70 ° Celsius temperature range. Thus, if a chip needs replacing, any off-the-shelf  replacement will suffice  design is specified  (no screening of chips is necessary). The  over a wide temperature range so that the  interference  monitor may be operated outdoors. (This is a desirable option that would allow better localization of interfering sources.)  Special attention is given to bus conflict, i.e., the situation when opposing  95 tri-state buffers are both enabled. Unlike many commercial digital designs, in which 1—100 ns-wide glitches occur due to bus conflicts during context switching, there is no bus conflict at all in the analyzer. There are two reasons for doing this. Short-term bus conflict, although not catastrophic: a) degrades the life of the driver chips, and b) generates noise spikes on the power lines. In the analyzer, all  potentially  conflicting enable  signals  are  strictlyt  non-overlapping, at the  expense of slightly reduced throughput. To ensure non-overlap upon power-up, NAND-gate configurations  are added to the enable control lines,  e.g.  as in  REPRESENTATION  AND  Figure A2-10.  3.5. ERRORS DUE TO FIXED-POINT NUMBER COMPUTATION IN THE FFT SPECTRUM  ANALYZER  In order to maximize speed, fixed-point arithmetic is implemented in the FFT spectrum analyzer. Since we want to process a wide dynamic range of signals,  it  is  important  to  understand  the  effects  of  fixed-point  number  representation and computation in the analyzer. Representing continuous variables as  digital words  introduces  quantization noise.  Computing with digital words  produces roundoff noise.  In the following sections, the sources of fixed-point error in the analyzer are pinpointed, characterized, and, where possible, purposes,  all noise levels are referenced  quantified. For comparative  to the output power  (in a single  frequency bin) of a full-scale, bin-center input sinusoid. Full-scale is normalized to ±1.0 Volt. Ideally, any noise introduced by the analyzer is much less than the tA safety cycle is inserted between enable transitions.  96 input noise from the receiver.  To establish a point of reference, we calculate the power in one bin of a full-scale, bin-center sinusoid:  t  4" 2  CG  N< T T >2 £ 2N  2]  < > 'A=1V L-  SQSUM 4N 3  where the terms correspond to, respectively, power in a sine wave of amplitude A,  divide-by-2 scaling at each  stage (section 3.5.3), Parseval energy growth,  bin-distribution, and window tapering (section 3.1.3) (The terms CG and SQSUM were defined in section 3.1.1.)  After applying the appropriate scaling, the receiver noise at the input of the analyzer (referred to an output bin) works out to be —32 dB (measured).  3.5.1. A-D Conversion Noise Assuming the A-D converter has no non-linearities (i.e. it is a perfect sampler and quantizer) and the quantization error is uniformty distributed, then the only noise produced by a B-bit conversion is white noise with power: (AV) 12  2  where AV =  full-scale voltage  2.0 , fR—i'i , , = — — 2 . Thus, the referenced noise m  XJ  level (after scaling the noise and referring it to a full-scale sinusoid) is: —-2B A-D noise level = —  ENBW 3N  (ENBW was defined in section 3.1.1.) For N = 256, B = 8, and the Kaiser-Bessel  97 window, the level is —69 dB.  The  dynamic  range  of  the  A-D  converter  in  terms  of  number  representation is: A-D dynamic range = 201og2 (dB). B  For B = 8, this is 48 dB. For us, the maximum SNR (section 2.3.1) is about 9 dB. So, if the noise spans a moderate number of quantization levels, the dynamic range of an 8-bit converter is more than adequate. Note that the overall dynamic range DR (39 dB) does not have to be less than the A-D dynamic range because small signals "ride" on top of the noise.  3.5.2. Windowing Noise Since the A-D converter produces 8-bit words, it is convenient to quantize the window to 8 bits and perform the window multiplication with an 8x8 parallel multiplier. Because the window coefficients  are all greater than zero, we can  represent them as unsigned integers. This increases the accuracy by a factor of two.  Intuitively, we might expect 8-bit windowing to produce about the same level of quantization noise as 8-bit A-D conversion. To determine the windowing quantization noise, the 256-point quantized time-domain window was padded with 768  zeros,  FFT'd  (1024-point  transform),  then  magnitude-squared.  The  zero-padding interpolates the spectrum to afford a more detailed view. A plot of the result is shown in Figure 3-15. We see that it differs from the unquantized  98 window (Figure 3-3) by having somewhat higher sidelobes. A rough calculation shows that the noise added to the distant sidelobes is * —80 dB. This is quite satisfactory.  K a i s e r - B e s s e l ( a = 2 ) Window ( M a g n i t u d e - S q u a r e d , F r e q u e n c y  Domain)  With T i m e - D o m a i n V a l u e s Q u a n t i z e d t o 8 B i t s ~i  '  '  1  1  1  '—  0  -20  -40 |W(k)|  1st side-lobe level - -45.87 dB  2  >i  (dB) -60  -80  •100 256  512  768  1024  k  Figure 3-15. Kaiser-Bessel (a = 2) Window (8-Bit Quantization)  3.5.3. O v e r f l o w  i n the F F T  Parseval's theorem indicates that the DFT process introduces an N-fold inflation in the power spectral values. The word growth is monotonic from stage to stage. For both the DIT and DIF butterflies, it is easy to show that: |X| + |Y| 2  2  = 2[ |A| + |B| ] 2  2  where (A,B) and (X,Y) are the butterfly input and output pairs, respectively (each of A, B, X, and Y is a complex number). That is, the mean-square value  99 of the data increases by a factor of two every stage. The magnitudes of the butterfly outputs are bounded as follows [Pele76]: max{|A|,|B|} < max{|X|,|Y|} £ 2max{|A|,|B|}.  (3-4)  That is, the largest magnitude in the butterfly output is non-decreasing.  If unchecked, this word growth can cause overflow  in the  fixed-point  butterfly computation. Down-scaling of the data can prevent overflow. Oppenheim and Weinstein [Oppe72] show that overflow can be prevented by scaling the input data such that: |x(n)| < ^  ; n=0,l,...,N-l.  The upper bound in Equation 3-2 implies that the scaling can be divided into M = log N scalings, i.e., one divide-by-2 at each stage such that: 2  |A| <  i  |B| < ±. This distribution of scaling does not change the overall scaling of the input data. However, it reduces the output noise due to the FFT because errors in the early stages are attenuated by scaling in the later stages.  Although the above scaling procedure ensures that overflow  can never  happen, it is impractical because the complex data is scaled. It is more practical to scale the real and imaginarj' parts such that:  100  IARI  <  |AjJ  <  i  |B | <  i  R  i  |BjJ < iUnfortunately, this does not eliminate the possibility of overflow. In Figure 3-16, the upper bounds on the butterfly outputs are derived for the DIT and DIF algorithms (result for DIF not in other literature). We see that overflow is most probable when the unit-circle angle 8mod2n = — or 3—. This condition is not 4 4 possible  in  all  stages.  For  example,  the  constant-geometry  flow  diagram  (Figure 3-7) indicates that in the last stage it does not occur (all 6 = 0). In fact, overflow cannot occur in the last stage. The number of occurences of 8mod2ir = — or 3— in each stage are listed 4 4 in Table 3-6.  Using the simulation (Appendix 1), the number of overflows were counted for various levels of input noise. For a level similar to that in the actual system, no overflows were observed during a run of one million averages.  Besides scaling, the other major reason for the infrequent occurence of overflow is the tapered window coupled with the nature of the addressing in the FFT algorithm. Referring to Figure 3-6 or 3-7, we observe that for each butterfly in the first stage, the data for the A and B inputs are multiplied by different window weights, in particular, one small and one large weight. This reduces the  3>XF X =  A + B  Y=(A-6)C consider real p^ts o-f K  Y  a*v4.  V:  =(A - 6 )cos0 ~ ( A - B )sC«©  a  a  R  r  I  Then  C 51\cxtr  -{-or X ^ j Y ^ ^  Hesul-r-:  l* l*l t  ,  lYjil*  PIT K = A -t B e Y =  fteial+:  A -  U«.\< | X  x  6  C  1.207 ,  \ < ».20T  f  W«.\ \Y  x  M.2xn \ <• I . 1 0 7  Figure 3-16. Upper Bounds on Butterfly Outputs  102  PI IA  stage  0 1 2 3 4 5 6 7  3PI /4  1 2 4 8 16 32 0 0  1 2 4 8 16 32 0 0  Table 3-6. Number of Occurences of Qm.od.2-n — — or 3— 4 4 probability of two large inputs occurring and hence the chance of overflow.  3.5.4. FFT Noise There are three sources of noise in a fixed-point FFT: quantization of the unit-circle  coefficients,  roundoff  in  the  butterfly  multiplications,  and,  if  implemented, roundoff in scaling. Each is discussed below.  3.5.4.1. Fixed-Point Representation of Unit-Circle Coefficients Tufts et. al. have studied the effect of fixed-point representation of the unit-circle  coefficients  on  FFT performance  coefficients  and transformedt  [Tuft72].  sets of unit-pulse  They  quantized  sequences using  the  floating-point  tThey do not say whether DIT or DIF was used. However, it should make little difference in the results.  103 ("exact") arithmetic. The deviation of the spectrum from white gave the noise due to inexact representation of the coefficients. They found that the spectrum contained  spurious  approximately 6 dB  sidelobes.  The  largest  spurious  sidelobe  decreases  per bit and is independent of N for N£64.  by  For 16-bit  coefficients, the highest spurious response is —99.7dB.  3.5.4.2. Roundoff Noise in the Butterfly In the butterfly computation, each multiplication produces noise due to rounding of the product. Rounding is needed to limit the size of the word, e.g., in the analyzer, the 16 most significant bits is retained from the 32-bit product of two 16-bit numbers. Numerous studies in the literature estimate the mean noise level due to roundoff in the FFT [Oppe72,Sund77,Thori76]. In almost all cases, the roundoff error probability density is assumed to be uniform. and the errors uncorrelated.  Some typical results for FFT roundoff noise are shown below. BFFT is the number of bits in the FFT arithmetic. The values were calculated from the indicated references and scaled to suit our reference level.  Bf  FT  [ TKon"76 ]  8  -27.5 d&  to  -H.8  13.  16  -T7.o  -76.0  104 (Butterfly roundoff noise is mentioned again in section 3.6).  3.5.4.3. Scaling Noise To combat overflow in the analyzer, divide-by-2 scaling is used at the beginning of each butterfly.  Each of the real and imaginary parts of each  complex input datum is scaled. In the divide-by-2 operation (Figure A2-5), the 16-bit input word is shifted right by one bit and the sign bit is copied into the most-significant logically  location. The least-significant  ORing  the  two  least-significant  bit of the result is produced by bits  of  the  input  [Abru85]. This  "pseudo-random rounding" has the advantage over conventional "round up only" or "round down only" truncation (hard scaling) schemes that, at the expense of slightly higher noise variance, it does not introduce a DC bias. A comparison of two schemes is illustrated in Figure 3-17.  During the simulation, it was observed that truncation added a lowpass shape, i.e., colored noise, to the spectrum. Intuitively, this can be understood by considering the DC bias introduced by the truncation at each stage of the FFT. The scaling in the first stage adds noise to the DC frequency bin. Subsequent scalings affect higher bins, up to the last stage where noise is added to all bins.  3.5.5.  Power Spectrum Noise Each  (Figure 3-10).  power  spectrum  Intuitively,  we  word can  is  the  expect  sum  the  of  mean  four  squared  roundoff  noise  numbers to  be  approximately the same as the roundoff noise generated by one stage of the FFT (since each butterfly contains four multiplications). A theoretical value of  £ - error  , p = normalised,  B ~ natter  o-f V>i-ts ( i n c l u d i n j  input  toorA  -  prok oJb\K-Vij  V>, * \> . " . . . ' 8  ' i>i "  1M  e neu) ^  O  0 0  O -2-»  1  -<2-6  O -a  0  /  O  6  /  / /  wean  -for complex numbers '. fi~  ~  *  f  e*  ~ 1 <2-  i fcl  0  <p 0 1 1P -X  o  X*  *  L  1  f  -B  'if  \*  — n  +or complex numbers i JJL -  0  0 1  0  1 -J-  0 8  ( 1  *• f -% \*  \  6  *-  - oi  -  Figure 3-17. Comparison of Two Divide-By-2 Scaling Schemes  106 power spectrum roundoff noise does not exist in the literature and no attempt was made to derive one.  However, a more important problem arising from the computation of the power spectrum was observed. Using the result for a square-law detector with Gaussian input [Papo84], the approximate distribution of a bin in the power spectrum is x - The standard deviation approximately equals the actual level 2  (Equation 3-2 with K = 1). Unfortunately, the distribution of the unsigned numbers cannot fall below 0. It is possible for a small, non-zero number to be squared and rounded to 0. Thus, there is a non-linear effect (clipping) in the power spectrum computation.t If the input level to the analyzer is too small, then zeros will occur. For perfectly white noise, this is not important because each bin will have, on average, the same number of zero contributions. However, for colored noise, the valleys in the spectrum will be de-accentuated. This distortion of the spectrum can limit the detectability of small signals.  In Chapter 6, a suitable input level is found by experiment so that the distortion is negligible. Note that the effect does not significantly "amplify" the relatively small fixed-point noise contributions from earlier processing, although they are still the fundamental limit on the detectablity of small signals. (This was confirmed by running the simulation with and without the up-scaling of the FFT data described in section 6.2.)  tThis effect is much less prevalent in the FFT, especially the DIF FFT, because the multiplications involve numbers from the unit-circle (real and imaginary), which are unity or exactly zero in the last two stages.  107 3.6. COMPUTER SIMULATION OF THE FFT SPECTRUM ANALYZER It  is  extremely  difficult  to  mathematically  calculate  the  exact noise  spectrum offixed-pointerrors in the analyzer. Even with only white noise input, the  error  probability densities  uncorrelated as  assumed  narrowband signals This is calculates  are  not  in nearly all theoretical  calculations.  Indeed, when  are present, the probability densities are further distorted.  particularly true for butterfly the  uniform and errors are not totally  butterfly  roundoff  roundoff noise.  noise  in  The only paper that  individual frequency bins is  that by Thong and Liu [Thon76]. However, they make numerous assumptions: the unit-circle coefficients are represented exactly, the multiplication roundoff error is uniformly distributed, and multiplications by +1, —1, +j, and —j are noiseless. Also, only the FFT is analyzed, i.e.,  A-D conversion, windowing, and power  spectrum computation are not considered.  If the noise is perfectly white, then, theoretically, an arbitrarily small signal can be detected by performing enough averages. Unfortunately, the noise spectrum is not white. We want to detect very small signals (sometimes in the presence of large signals) by integrating for long periods of time, so we must know how the fixed-point error spectrum behaves. In particular, we need to know by how much the error spectrum deviates from white. Signals smaller than the size of the deviations will not be detectable, i.e., further averaging of the spectra will not reduce the variance. This is one of three reasons a FORTRAN program (Appendix 1) was  written to simulate the computations in the FFT spectrum  analyzer. The simulation serves the following purposes: to 1. determine the behavior of the error spectrum with white noise and  108 sinusoids at input; 2. help estimate the word lengths required in the various processes, thereby minimizing hardware; and 3. verify the results of low-speed analyzer tests.  The simulation was not a trivial program to write. Great care was taken to ensure that it mimics the hardware computations exactly and scales the results properly. The program computes and averages successive, non-overlapping power spectra of an input signal equal to the sum of two sinusoids plus Gaussian noise. Both floating-point and fixed-point processing are done in parallel for comparison. The word lengths in the fixed-point process are user-selectable. Because the simulation runs can be quite lengthy (e.g. up to two weeks of processing time on a VAX mainframe computer), the program is restartable.  The processing sequence for one loop is outlined below, including comments specific to the software. 1. Generate Gaussian noise vector (each value is the sum of six uniformly-distributed numbers) and add to signal(s). Check the random number generator seed each time for repetition. 2. Quantize the data using an ideal A-D converter. Count the number of clipped values. 3. Window the time samples. (a = 2) windows.  Use one of rectangular or Kaiser-Bessel  4. Pack two data blocks into a complex vector. If necessary, align word sizes to match FFT word sizes. 5. If desired, pre-scale data down by two. 6. FFT the data. The floating-point transform is DIT, in-place. The fixed-point transform is DIF, constant-geometry with pseudo-randomty rounded scaling. For every fixed-point addition or subtraction, count the number of overflows and underflows.  109 7. Bit-reverse the data. 8. Compute the transform.  sum of the  two  power  spectra by unscrambling the  9. Add the power spectrum to the running average. 10. After a specified number of averages, calculate various signal and noise statistics. The signal bins are removed from the noise calculations.  For more details of the simulation program, refer to the program listing in Appendix 1.  The input  simulation was run for different combinations of word lengths and  signals.  While the  results  in  section 3.5  were  useful  in determining  "ballpark" values for the various word lengths in the analyzer, the final choice was based on the simulation results. Of particular importance is the word length in the FFT (BFFT). A plot of the reduction in standard deviation versus the number of averages for various BFFT is shown in Figure 3-18. For this result, the input signal was noise (of a level similar to that in the final system) plus one  small  sinusoid,  and  the  other  word  lengths  are  as  implemented.  In  Chapter 6, the integration time required to detect the minimum detectable signal is shown to be about 1.2 hours. In the plot, we see that for the fixed-point error not to limit the detectability, BFFT should be 15 or more.  [It should be noted that an attempt was made to normalize (whiten) the spectrum by dividing by the error spectrum predicted by Thong and Liu. This was  not  successful  because  the  actual  error  spectrum  unpredictable manner) with the different input signals.]  changed  (in  an  Decrease in Standard Deviation Versus Number of Averages  Figure 3-18. Simulated Performance of Analyzer for Various BFFT  4. THE ANTENNA SYSTEM  The monitor  antennas comprise the first element in the block diagram of the  (Figure 1-5).  Photograph 4-1.  A  picture  of  the  There are nine antennas  antenna  assembly  in the interference  is  shown  in  monitor: a X/4  "stub" (monopole over ground plane) and eight helices. The helices are configured in an octagon, each helix pointing horizontally outward. The stub is mounted on top of the helix frame. The antennas and an electronics box are mounted on a 35' pole that is 500'  due west of the main building and 400'  due south of  the SST control building. The location was chosen for its unobstructed view of the observatory buildings and the horizon.  Referring ahead to Figure 5-2 in Chapter 5, an RF switch selects one of the antennas and the RF signal is amplified and sent down the cable to the SST control building. By the use of frequency-multiplexing, the RF signal shares the cable with two other signals: DC power for the amplifier on the pole and an audio frequency (AF) signal that controls the switch.  In  this  chapter,  the  antenna  system  in the  interference  monitor is  described. First, the design considerations for the antennas are discussed. Then, an account of the construction, matching, and testing of the antennas is given. Next,  the remote-controlled RF switch and signalling hardware are described.  Finally, the "triplexer" filters are described.  Ill  Photograph 4-1. Mounting of Antenna Assembly (First View) (electronics box installed later)  114 4.1. DESIGN OF THE ANTENNA ARRAY An  attractive approach to RFI monitoring is  to use  two modes of  operation: an "omni-directional surveillance" mode and a "scan and locate" mode. The stub and helix antennas are suitable choices to implement these modes. The stub can monitor all horizontal directions simultaneously. Each helix has a directional beam and an array of them can scan and locate interference by switching from helix to helix.  A  stub  (gain = 2.2 dBi)  was  chosen  for  the  omni-directional antenna  because it is easy to build. Given more time, a better choice might have been a vertical phased-array of dipoles (e.g. Franklin array [Jasi61]). Such an antenna has greater gain (  6.4 dBi for 3 elements,  8.7 dBi for 6 elements) and a  narrower beam than the stub. In each case, the main beam is toroidal in shape with the maximum response on the horizon.  When designed to operate in end-fire mode, the helix has numerous advantages over other "uni-directional" antennas. It has wide bandwidth, high gain, high directivity, and does not require highly accurate dimensions. It is circularly  polarized t  and  hence  capable  of  receiving  signals  of  arbitrary  polarization. Also, there are fairly accurate quasi-empirical formulas describing the beam shape. Some of these are given below [Krau50]: -3dB beamwidth 0  3(1B  *  (52/C) /X /nS degrees T  tThis is strictly true on axis. Off axis, the polarization is elliptical.  115 first nulls beamwidth 0i t nulls s  directivity D  =*  *  2 . 2 1 ^ ^ degrees  15nSC  2  where n = number of turns C = circumference in meters S = turn spacing in meters X = wavelength in meters.  The —3dB beamwidth of a moderately-sized helix is about 45°. Eight such helices cover 360° (Figure 4-1). Rather than simply setting the —3dB response for each helix at  8 = 45°/2 = 22.5°,  we should try to maximize the worst-case  response so as not to miss any signals. To do so, we shall consider the tradeoff between directivity (maximum gain) D 8Q = 22.5° DQ/D  0  Q  and gain  at the crossover point  (Figure 4-2). As the mainlobe is made narrower, D  0  increases and  decreases. However, the variation in D^; is not readily apparent. It is  best to estimate T)Q for various values of n and choose the value that gives the largest value of HQ. To do this, we shall use the empirical formulas for O^dB and  #i t nulls £ i s  v e n  above and approximate the response between these angles  with a straight line. The latter should be a good approximation because a plot of  the  purely theoretical  response  response is quite linear (Figure 4-3).  shows that between the  two  angles the  116  Figure 4-1. Bird's Eye View of Helices  Figure 4-2. Cross-Section of Mainlobe of Helical Beampattern  Theoretical Response of Helical Antenna for Various Numbers of Turns  118 Setting C = X and a = tan" (S/C) = 14° (optimum values 1  as given in  [Jasi61]) and linearly approximating the response between 8^-Q and 8^  nu  \\  s  we compute values of Drj versus n:  n 3 4 5 6 7 8 9 10  &3<Lb  60.1 52.1 46.6 42.5 39.4 36.8 34.7 32.9  30.1 26.0 23.3 21.3 19.7 18.4 17.4 16.5  Do  D /D  10.5dB 11.7 12.7 13.5 14.2 14.8 15.3 15.7  -1.37dB -2.08 -2.76 -3.44 -4.09 -4.77 -5.45 -6.15  c  0  D  C  9.13dB 9.62 9.94 10.06 10.11 10.03 9.85 9.55  Table 4-1. Crossover Gain versus Number of Turns for Helical Array  We see that for maximum crossover gain, we should choose n = 7. A helix with 7 turns has a directivity of 14.2 dB and a beamwidth of 39.4°.  4.2. CONSTRUCTION AND MATCHING OF THE ANTENNAS An octagonal  6' x6'  frame of welded angle iron was  constructed to  accommodate the eight helices and stub antenna. The top and sides are covered in aluminum mesh to form good ground planes for, respectively, the stub and helix antennas. The stub is an 18.4 cm (nominal) length of  copper-clad steel  rod soldered onto an N-type connector and mounted on top of the frame. Each helix consists of 7 turns of y" O.D. copper tubing supported by a plastic pipe and guy rope. The dimensions of an individual helix are as follows: turn-to-turn  119  spacing = 17.3 cm, circumference = 73.5 cm (1 wavelength  at  408 MHz), overall  length = 128 cm, and ground plane = 30"x30". The construction work was done by the DRAO machinist, Ed Danallanko. Two photographs of the assembly  (while  being mounted on the pole) are shown in Photographs 4-1 and 4-2. (The coaxial antenna cables can be seen within the framework in the first photograph; the electronics box was installed later.)  Photograph 4-2. Mounting of Antenna Assembly (Second View)  The  terminal impedance  of a helix  with  a  conventional  feed  arrangement  120 is about 140 0 (real). Since the receiving electronics presents a 50 0 load, a mismatch loss of 1.1 dB will occur. It is possible to modify the helix conductor near the ground plane to achieve  a 50 fl (real) terminal impedance at the  expense of reduced bandwidth [Krau77]. Kraus did so by bonding a metal strip to the helix conductor near the feed point. As described below, by using a similar technique, close to 50 fl impedance was achieved for each of the 8 helices. The bandwidth we require (20 MHz) is small compared to the bandwidth of a conventional helix (  200 MHz) so a reduction can be afforded.  A network analyzer was used to measure the impedance by sourcing RF energy into the antenna (i.e. transmitting) and measuring the reflected signal. An initial experiment was done to determine the approximate geometry of the feed to achieve a match at 408 MHz. A single helix mounted on the frame (with one ground plane in place) was pointed towards the sky and the last turn of the helix was bent towards the ground plane until a rough match was obtained. The impedance changes from inductive to capacitive as the feed is moved closer to the ground plane. When the feed is brought in parallel to the plane about -5-" away, a transmission line of impedance close to 50 0 is formed. Decreasing the spacing further adds capacitance and the impedance becomes capacitive; increasing the spacing makes the impedance inductive. The impedance is fairly sensitive to the spacing: a change of only -fa" produces a noticeable  effect.  An acrylic  standoff was machined to hold the feed in place and the other 7 helices were then replicated and added to the frame along with standoffs, ground mesh, and the  stub  antenna.  Photograph 4-4  Photograph 4-3  shows the feed  shows  the  preliminary  tuning  set-up.  arrangement including the standoff and a -§-"  121 diameter braid used  to connect  the  N-connector  to the  end of the copper  conductor. The braid allows for flexion (e.g. due to wind).  The final matching was done by tilting each helix in turn towards the sky and bending the feed slightly at the standoff. The results are shown in Table 4-2. Included is the return loss at three frequencies.t  During the matching trials, a resonance at 290 MHz was observed. The wavelength at this frequency is 103 cm. There is no apparent similar dimension on an individual helix or the frame and so this response is left unexplained. However, since it is far from the band of interest, it should not cause any problems.  After the helices were matched, the crosstalk (coupling) between pairs was measured. The network analyzer was  used to transmit from one helix and  measure the received signal at another. The results for a typical trial are shown in Table 4-3. It should be noted that, for this trial, helices 3, 4, and 5 were pointing towards the ground so the coupling measured between them and helix 1 may be inaccurate.  The  decoupling  at  400 MHz  between  two  parallel  helices  has  been  measured as a function of separation in [Jasi61]. In our case, adjacent helices are not parallel but a comparison is still of interest. The feed-to-feed spacing of adjacent helices is 74 cm. For this spacing, the decoupling measured by Jasik tReturn loss is a measure of the reflected power. 0 dB is total reflection; » d B is total transmission.  122  Helix  |  Impedance  0 1  54 57  2 3 4  58 56 G1  5 6 7  G1 58 59  Table 4-2.  At  408  - J4  + + -  + -  +  Ohm  j 10 J3 JO j 10 J2 J5 JO  MHz  | 398  MHz  27 21  dB  Return Loss 4 0 8 MHz 25  30 18  20 21 24 17  27 21 22  26 21 21  22  dB  418 20 17 18  MHz dB  19 15 20 19 19  Measured Terminal Impedance and Return Loss of Helices  Transmitting 0 0 0 0 0 0 0  Table 4-3.  Helix  | Receiving Helix  | Transmission 35 46 42 48 43 49 34  Loss  dB  Measured Crosstalk Between Pairs of Helices  124 was 42 dB. This is comparable to the 35 dB and 34 dB decouplings for helix pairs (0,1) and (0,7) in Table 4-3. It is speculated that the difference may be due to differences in number of turns and ground plane arrangement (details of which are not given in the reference).  The stub antenna was tuned by connecting it to the network analyzer and trimming the conductor until the return loss was maximum at 408 MHz.  Finally, the feeds were weather-proofed by applying black RTV silicone sealant to the braid connections and painting the standoffs with diluted tar. Then the antenna assembly was hoisted up with the DRAO "cherry-picker" truck and seated upon the 35' wooden pole. The pole is guyed for strength in wind and fenced in for protection from cattle.  4.3.  THE REMOTE-CONTROLLED  RF  SWITCH  In order to switch the output to either the stub or one of the eight helices, a 9-to-l RF switch is required. Because the switch is before the first LNA, the switch must have a very low insertion loss (IL) to keep the system noise figure as low as possible (section 5.1). Commercial switches were either too expensive, had too much insertion loss, or did not have electronic control. It was decided to build a switch with low IL and electronic control.  A double-sided PC board was designed and fabricated (Photograph 4-5). (In the photograph, the components are on the reverse side.) One side is ground plane and the other contains signal lines. Teledyne 732TN-5 relays were chosen  Photograph 4-5. RF Switch PC Board (Signal Side)  126  127 as the switching devices. At 408 MHz they have a specified IL of .3 dB and 35 dB isolation. 50 0 striplines are used for the RF signal paths. The RF signal lines are connected to the PC board via -\" 24 AWG wire stubs soldered to a panel of BNC connectors. In addition to the RF lines, +5V and control lines go to each relay. Any of the nine antennas can be switched onto a common signal line. When an antenna is turned off,  it is terminated in 51S2 with a chip  resistor.  Since the circuit must work at RF, grounding is very important. As much as possible, unused copper area is grounded. Numerous feedthroughs connect the grounds on each side of the board. The BNC-plus-stub signal lines are shielded by specially-made brass screw-on cylinders which make a pressure contact with the  PC board ground. These turned out to be a crucial ground connection  between the outer case and the circuit board itself. A cylinder can be considered as continuing the outer conductor of the signal coaxial cable. Without them, there was considerable parasitic inductance in each stub.  The center (common) signal conductor has a capacitance to ground that was calculated to be about 17 pF. At 408 MHz this would attenuate the signal significantly due to mismatching. However, since the center piece dimensions are small relative to one wavelength, it can be considered a lumped capacitance and resonated  with an inductor added in parallel. The theoretical  value  of the  inductance for resonance at 408 MHz is 9 nH. It was found that a -§-" 24 AWG wire to ground, plus two turns (fV" dia.) °f 20 AWG wire to ground for fine tuning, worked best. (The latter was installed after the photograph was taken.)  128 They were mounted away from each other to eliminate coupling. (The theoretical inductance of these wires in parallel is 7 nH||37 nH = 6 nH.)  The insertion loss was measured to be .8 dB. Part of this amount is due to the IL of the relay. The remainder is probably due to loss in the conductor traces.  The isolation between lines was measured to be  £ 30 dB. Such a value  is satisfactory because the sidelobe levels in the beam pattern of a helix are down to about —15 dB. An ambiguity in the signal direction can be resolved by simply switching helices and taking the maximum response.  An FSK transmitter/receiver pair plus a digital interface were built to control the RF switch. The schematic diagrams are shown in Figures 4-4 and 4-5. In the SST control building, the microcomputer toggles a single port line which goes to the transmitter. Nine relay control bits and one parity bit are sent serially using a pulse-width modulation scheme.  The transmitter converts the  digital data to a phase-continuous audio frequency (AF) signal centered at 20 kHz. A simple common-collector (emitter follower) amplifier drives the 50fi line. At the antenna pole, the receiver demodulates the signal and shifts the data into a register. If the parity of the control word does not match the received parity the FSK receiver turns off the first LNA. This causes a large reduction in the spectrum analyzer output which can be easily detected so that the control data can be sent again. It was observed that errors do occur, but they are quite rare.  +12V Q  JL • J J  IOJJF  -11+  lnF feedthru  <5.1K  1 "]  5.IK:  lOOK  16  2 XR-2206 15 AMPLITUDE 14 3 4  13  5  12 11  6 7  8  10  9  1JJF  :1K 1.3K  2N3904... 47 n —^j—A/W4.7JJF  300n  DIGITAL DATA IN O-  Figure 4-4. FSK Transmitter (for Antenna Switch Control)  -<• ANALOG DATA OUT (AF)  1>IF  ANALOG DATA IN (AF)  O  1  14  2  XH-J211 13  3  12  4  11  5  10  6  9  7  8  5. IK  : InF  r-l  .lyF  - > r h r W  250pF  (91 3.3K  zh •3nF  p  ,rlt  '  8ent  vr-x j 1 y 1/4 74LS86  l \  r\  J>0 /O-t 2/6 7405  " 74LS280 10-8  74LS123 16 Bl  - < • RF RELAY CONTROL OUT  '  of received word  2  9  (9) 1N4448  parity  1  .(9) 820 n  1VI 7405  100K -VA  -VvV 510K  FINE TUNE 47K J - Wv-iVvV- 1 160K. 10K  +15V in  15  3  14  4 ffl  13  5  12  6  11  7  10  8  9  10 usee pulse  191TE1A15S relay  -*-9  I I I l I I  00 01 Q2 03 Q4 0 5 06 Q7  £  7418164  mil  +15V out or OFF (to LNA)  00 Q l 0 2 0 3 04 0 5 06 0 7 .  A  74LS164  i>  B  HR  • bit sent  Co O  Figure 4-5. FSK Receiver (for Antenna Switch Control)  131 Photographs 4-6, 4-7, and 4-8 show some typical timing diagrams of the digital  data.  In  Photograph 4-6,  the  SW  helix  is  being  switched  on.  Photograph 4-7 is a close up of logic "1" and logic "0" pulses. Photograph 4-8 shows  a  single  "1".  The antennas  can  be  switched  on  in  sequence by  transmitting single "1" pulses. This extends the life of the switches (a full 10-bit sequence causes all relays to switch momentarily).  In a similar way to the analyzer functional tests, the transmitter/receiver pair (w/o RF switch) can be tested using the microcomputer. Via ports, the microcomputer sends digital data (with parity) and then checks the received data.  4.4. THE TRIPLEXERS Since 700' of cable is required to connect the antenna pole with the SST control building, it is convenient to run only one cable between them. It was decided to run a single Heliax coaxial cable. Heliax is a solid-shielded coax with almost  100% effective shielding. Excellent shielding is needed to prevent the  interference monitor from broadcasting interfering signals from the cable. As well, Heliax has extremely low loss (1.8dB/100'  at 400 MHz).  Two identical triplexers (four-port filters) were built to combine/decombine the following signals onto the cable: the RF signal from the antenna, the AF signal from the FSK transmitter, and the DC power for the electronics on the pole. The schematic diagram is shown in Figure 4-6. In each triplexer, the three signals are separated from each other by a combination of highpass, bandpass, and lowpass filters.  132  data.  sen"t  |aT-ck  Photograph 4-6.  Photograph 4-7.  Timing Diagram of SW  Timing Diagram of Transmission  5 *  *. 1  CLOC» S N -SE:  Helix Being Turned On  of Logic T  and Logic  '0'  OELMV  cttTT*c  Photograph 4-8.  Timing Diagram of Transmission  of One Logic '1'  pulses  (on antenna pole)  (in SST control building)  1  RF to receiver o — <  220 pF  2.2JJF .47JJH  .47JJH  AF from modulator o—>-  ferrite DC in o—>-  750' F W H e l i a x c a b l ee  ,47IJH  .47^JH .47JJH 22._2jJF  1\ f o n n i f o  I  1  •<—o RF from 1st LNA  Sferrite  —L_  beads'! .4 H  220 pF.  .4 H  ->—o  DC out  1 nF  1 nF feedthru  > — ° AF to demodulator  hoar beads  2.2 JJF  2.2 pF  feedthru  co CO  Figure 4-6. Triplexers  5. THE RECEIVER  The receiver is the second component in the block diagram of the monitor (Figure 1-5). In order to analyze the 20 MHz-wide band 398—418 MHz with the 500 kHz baseband spectrum analyzer, a sensitive receiver "front-end" is required. The  chief functions of the receiver are to amplify the RF signal from the  antenna and to select (convert to baseband) a 500 kHz sub-band to be analyzed. The receiver is divided into three parts, each in its own cabinet: a low-noise amplifier  located  on the  antenna  pole,  a first  mixer stage located  in the  unshielded room in the SST control building, and second mixer stage located in the shielded room in the SST control building. Diagrams of the receiver are given  later  in  Figures 5-2, 5-3, and 5-4.  The  receiver  is  constructed  from  commercially-available components with the exceptions of the IF amplifiers (earlier DRAO projects), imageless mixer (modification by the author of an earlier DRAO design), 100 MHz lowpass filter (made by the author), and two of the baseband amplifiers (modification by the author of an earlier DRAO design).  The next section discusses the significance of noise in the receiver. The remaining sections describe the receiver components.  5.1. RECEIVER NOISE Since the signal levels we wish to detect can be very small, it is important that the receiver introduce as little noise as possible, i.e., it should have a small noise figure (NF). The noise figure of a system is defined as [Pett84]:  134  135 input SNR  NF = The  output SNR  NF of an ideal (noiseless) system is 1.0 (0 dB).  Noise figures of practical  RF systems range from 1.1 (0.4 dB) and up.  In a system that consists of n cascaded, matched elements with individual gains Gj and noise figures Fj (Figure 5-1), the overall system gain is:  ^sys  =  CMG2G3  ...  G  n  and the overall system noise figure is:  s y s  1  G,  G,G  2  G G ...G . 1  2  n  1  ooo  Figure 5-1. Generic Receiver System of Cascaded Elements  We see that if the first element has substantial gain, the overall noise figure will approximately equal F , , regardless of what follows the first element. It is therefore desirable to place a low-noise  amplifier (LNA) at the front of the  receiver. The performance of this (first) LNA will then largely determine the  136 SNR of a signal entering the spectrum analyzer. This in turn determines the integration time needed to detect the signal.  There are two major sources of noise that contribute to the overall noise level at the output of the receiver: thermal radiation from the ground that • enters through the antenna and noise generated by the receiver electronics. These contributions were found by measurement to be roughly equal.  5.2. THE FIRST MIXER STAGE The receiver has two mixer stages. Two stages were chosen because of component availability and the fact that it is safer (with regard to stability), and easier, to provide amplification at three frequencies rather than two.  The antenna is linked to the SST control building by 700'  of FHJ4  Heliax cable (section 4.4). Two Trontech L410A 410 MHz wide-band LNA's boost the signal before and after it is attenuated by the cable (Figures 5-2 and 5-3). The first LNA (located on the antenna pole) has 31.9 dB gain and 2.06 dB noise figure at 408 MHz. Although the first LNA defines the major portion of the system noise figure,  the second LNA helps to render insignificant  the noise  contributions of the remaining components.  Referring  to  Figure 5-3,  a  bandpass  filter  centered  at  408 MHz  (K&L 5B120-408/20-0/0) is used to suppress the image band 338-358 MHz before down-mixing. It is placed before the second LNA to prevent the latter from saturating due to possible large out-of-band signals. The mixer (HP 10514A) and  137  ANTENNA CABLES  00 0 0 0 0 9 0 0  ribbon 9 1 3 12  9 - t o - 1 RF switch (G = - . 8 dB, F = 0 dB)  cable: data data (spare) +5 VDC ground  1st LNA (G = 31.9 dB, F = 2.06 dB)  = - . 9 dB (RF))  700 feet of FHJ4-50B Heliax cable (G = - 1 2 dB)  HELIAX CABLE  Figure 5-2. First Part of Receiver and Other Components (on Antenna Pole)  AF INPUT  HELIAX CABLE  o  o  138  (G = - . 9 dB (RF))  +24 VDC C ^ D C  3 dB pad  408 MHz bandposs filter (BW = 20 MHz) (G = - 1 . 9 dB)  3 dB pad  2nd LNA (G = 34.4, NF = 2.14 dB)  378 MHz local oscillator (+13 dBm)  6 dB pad  6 dB pad  X  1st mixer (G = - 9 dB)  100 MHz lowpass filter (G = -.1 dB)  IF amplifier (Dewdney) (G = 27 dB, F = 6 dB)  IF amplifier (Sheehan) (G = 19 dB, F = 6 dB)  IF amplifier (Sheehan) (G = 19 dB, F = 6 dB)  IF OUTPUT (20-40 MHz) Figure 5-3. Second Part of Receiver (in SST Blockhouse, outside Screened Room)  139  MICROCOMPUTER PORTS 99 V  IF INPUT (20-40 MHz) p  frequency synthesizer (20-40 MHz) (+1 dBm)  V  imogeless mixer (G = - 3 5 dB)  19 power amplifier (G = 36 dB)  baseband omplifier (modified Sheehan) (G = 19 dB, F = 6 dB)  boseband amplifier (modified Sheehan) (G = 19 dB, F = 6 dB)  IN FSK transmitter  bosebond power omplifier (commercial) (G = 22 dB)  OUT  splitter lowpass (0-500 kHz) (G = -.1 to -1.4 dB)  bondpass (46.875-78.125 kHz)  switch control bit DPDT switch  ** note: splitter, bandpass a.a. filter, and DPDT switch not yet implemented  8  AF OUTPUT  BASEBAND OUTPUT (0-500 kHz) (BANDPASS OUTPUT (46.875 kHz  78.125 kHz) in ZOOM mode)  Figure 5-4. Third Part of Receiver (in SST Blockhouse, inside Screened Room)  Photograph 5-1. First Part of Receiver and Other Components (on Antenna Pole) (showing RF switch, first LNA, triplexer, and FSK receiver)  141  142  Photograph 5-2. Second Part of Receiver (in SST Blockhouse, outside Screened Room) (showing triplexer, first mixer stage, and IF amplifiers)  144  Photograph 5-3. Third Part of Receiver (in SST Blockhouse, inside Screened Room) (showing imageless mixer stage, frequency synthesizer, baseband amplifiers, anti-aliasing filter, and FSK transmitter)  146 378 MHz crystal oscillator  (Vectron CO-233FW-3YR) shift the band of interest  down to an intermediate  frequency  (IF) band centered  at  30 MHz.  Further  amplification of the signal is then provided by three IF amplifiers. The first is a resonance-tuned,  multi-stage amplifier with passband 20—40 MHz (DRAO project,  T. Landecker). The other two are single-chip, wide-band amplifiers (DRAO project, E. Sheehan).  The 100 MHz  lowpass filter is  a 5-pole Butterworth design.  It  consists of silver-mica capacitors and inexpensive coils mounted on a small PC board. The board includes 50 0 striplines and ground planes on both sides. The filter removes the relatively large 378 MHz signal that leaks through the mixer from the LO.  5.3. THE IMAGELESS MIXER STAGE Referring to Figure 5-4,  the imageless (single-sideband)  mixer shifts the  sub-band of interest to baseband. A general description of imageless mixers can be found in [Pett84]. A programmable frequency synthesizer (Syntest SM-160-05) serves as the local oscillator. The microcomputer can select a 500 kHz sub-band by setting the frequency of the synthesizer within the range 20—40 MHz.  Because both the sub-band of interest and the image band are variable in frequency, an imageless mixer is required. The alternative to an imageless mixer is an electronically-tunable, high-order bandpass filter for image rejection followed by a regular mixer. Such a filter would be more expensive and time-consuming to build than the imageless mixer. Another alternative is a bandpass filter after the first mixer (of bandwidth equal to the sub-bandwidth). Such a filter would be very difficult to build because of its very narrow relative bandwidth.  147 A diagram of the imageless mixer is shown in Figure 5-5. The design is based on an earlier DRAO project by B. Penny. It was modified for use at a lower output frequency band. It works as follows: In-phase  and quadrature  signals are generated by mixing the signal with the LO and a  90°-shifted  version, respectively. Low-pass filters remove unwanted products. Balanced all-pass L-C networks introduce another 90° shift (relative to each other). Transformers balance/unbalance the signals at the inputs/outputs of the networks. A resistive bridge adds the two signals sideband  of  the  unwanted signals  original  to generate  input signal.  a baseband version of the lower  Image  are subtracted (cancelled)  suppression  occurs when the  in the bridge. Potentiometers are  included so that the image suppression can be fine-tuned. Padding is used at various points throughout the circuit to improve matching and to reduce the effects of reflections.  The  all-pass network component values  were calculated using formulas  given in [Albe69]. The SPICE program was used to select the bridge resistors needed to present each network with a 50  load.  The output of the imageless mixer does not go down to the lower cutoff frequency of the transformers (3 kHz) because the coils in the all-pass networks are  too lossy at low frequencies. Impedance measurements determined that the  lowest cutoff that could be achieved with off-the-shelf coils is 20 kHz. (At lower frequencies,  the  resistive  part of the  coils  dominates  the  networks were then designed for a passband of 20—600 kHz.  impedance.) The  148 IF INPUT 20-40 MHz 3 dB pad  LO INPUT  splitter  20-40 MHz  (Mini-Circuits PSC 2-1) 6 dB pads mixers (Mini-Circuits SRA-1)  X)  6 dB pads lowpass filters (D lags C by 90°)  (3-pole Butterworth, f =8.1617 MHz) c  1:1 transformers (Mini-Circuits T1-6T) balanced oil-pass L - C networks  network B  network A  A  (A lags B by 90°)  • ioon  1:1 transformer  fVvVf  (Mini-Circuits T1-6T)  LwV balanced bridge  ; 3 6 n  i8on  25n 36 n  1 0 Q  |  n  ison '  BASEBAND OUTPUT 20-600 kHz (lower sideband)  Figure 5-5. Imageless Mixer  52-4 rS  /S^nF  75 nP  2-\.3nF  3<Unf  /I.JnF  S.-Yit^  /.Un^  4^ CO  Figure 5-6. All-Pass Networks in Imageless Mixer  150 The potentiometers  were adjusted to obtain maximum image suppression  without significant reduction in the wanted signal. A suppression of 40 dB was achieved. This is close to the specified value of dynamic range (section 2.3.2).  The insertion loss of the mixer is 35 dB. This is large and requires that we include baseband amplification before the signal is digitized by the spectrum analyzer.  Referring  amplification  is  to  Figure 5-4,  applied to  the  after  signal.  the  imageless  Two amplifiers  are  mixer, versions  baseband of the  single-chip IF amplifiers, modified for use at lower frequencies, and the third is a commercial power amplifier. The signal is then fed into the anti-aliasing filter and on to the FFT spectrum analyzer. (The A-D circuitry in the analyzer includes an operational amplifier, section 3.4.3.) The overall receiver gain plus A-D gain were designed  and adjusted to provide a suitable  conversion (section 6.2).  noise level for A-D  6. TESTING AND SYSTEM OPERATION  Testing was an important facet in the development of the interference monitor.  Each  component  was  tested  as  thoroughly  as  possible  within the  limitations of available equipment and time. Particular attention was given to the testing of the FFT spectrum analyzer as well as the complete system. In this chapter, the test procedures for the analyzer and the monitor are described, and some results are presented. Also described is the operation of the system under microcomputer control.  The basic questions that we want to answer are: How does the monitor respond to narrowband signals, i.e., does it produce any spurious peaks? Can a small signal be detected in the presence of a large signal? What limits the detectability of very small signals? Do cross-products from multiple signals affect the performance? And how does the monitor respond to broadband noise, i.e., how much does averaging of the power spectra reduce the noise variance? The answers to these questions indicate the level of minimum detectable signal and the dynamic range that can be achieved.  Before proceeding with the description of the testing and system operation, we shall calculate the integration time required to detect a signal of a given strength.  Recall  that  the  variance  of  the  Welch estimate  for  noise  is  o"(k) = P (k)/K (Equation 3-2). Let N ^ be the noise power level in a frequency 2  2  n  bin  and N  r e c  = —81 dBWHz~  1  (measured) be the noise power density at the  analog input of the spectrum analyzer. Then, considering noise only:  151  152 o(k) =  N  b i n  VK  and  N  bin =  N  rec bw  If we assume that a signal can be detected by thresholding when it is ten times greater than the standard deviation of the noise, then: 10 a = signal level =  PJGR  where Pj  = flux of signal (dBWrn' ) 2  = gain of receiver = 115 dBm . 2  The integration time is: Tj = K N / f = K/bw bw 10[N (SNR loss)] = (PiG ) s  2  rec  2  sec  R  where "SNR loss" includes any loss due to windowing and scalloping. If the signal is CW and is on-axis for a helix, and assuming the worst-case loss in SNR, the time required to detect the minimum detectable signal (—188dBWm" ) 2  is 1.2 hours.  153 6.1. TESTING OF THE FFT SPECTRUM ANALYZER Testing of the analyzer was divided into two categories: low-speed and high-speed tests. The low-speed tests were used during development to check the functioning of the boards. High-speed tests were conducted to determine  the  performance with real-time signals.  6.1.1. Low-Speed Functional Tests Ideally, the best way to test the digital portion of the analyzer (and parts thereof) would involve inputting a known ("canned") data sequence in real-time, uploading the results, and comparing them to the correct results. For example, data could be generated on a mainframe computer, downloaded to a high-speed RAM buffer, and then fed to the analyzer in real-time. The results could then be read out to the buffer in real-time, transferred to the mainframe, and  checked.  Unfortunately,  a  high-speed  buffer  (with  appropriate  interface  circuitry) was not available and there was not enough time to build one. Instead, low-speed tests with canned data were conducted by using the microcomputer to exercise the boards. (The microcomputer turned out to be a very useful tool.) On each board, special headers are wired for connection to the microcomputer ports. Sub-sections  were tested separately  microcomputer.  In  a  typical  by running C-coded test routines  routine,  the  microcomputer  provides  on the  test data,  addresses, and control signals to the board(s) and then retrieves and checks the results. The different tests are outlined briefly below. 1. Test BUTT Board. Micro places input data and sin/cos addresses on address bus, board control (micro generates control signals), micro buses. User then compares results to those routine.  on bi-directional data buses does butterfly under micro retrieves output from data from FORTRAN butterfly  154 2. Test PS Board. Micro places input data on data bus, board squares and accumulates under micro control (micro generates address and control signals), upload "power spectrum", micro checks results. 3. Test PS Board Under Control of C&M Board. Same as above except control and address generated by C&M Board which is externally-clocked by micro. 4. Quick Test of Analyzer (Excluding AD Board). Micro provides "windowed data" to analyzer while clocking it externally. Upload power spectrum when pipeline finished. User checks results. (Data = DC level + two sinusoids.) 5. Extensive Test of Analyzer (Excluding AD Board). Same as above except more extensive. Data = one sinusoid (bin-center or halfway between centers). Frequency is incremented after each upload until entire band is covered. Send results to mainframe computer for comparison to results of FORTRAN simulation.  The above tests were valuable verification and debugging tools during the development of the analyzer. Wiring and logic errors were quickly tracked down; the wire-wrapping connection technique allowed easy modifications.  The same tests can be used in the future to isolate a fault (e.g. a bad chip). In addition, special jigs were wired and software developed to test 8x8 and 16x16 multipliers, 4-bit adders, and PROMs.  6.1.2. High-Speed (Real-Time) Tests In this  section, the FFT spectrum analyzer is tested with sinusoidal  inputs. Two high-speed tests were performed and the simulation program was run. In each case, the result is a plot of the power spectrum. The three sources of results are summarized below: 1. FFT processor output power spectrum  155 2.floating-pointpower spectrum of A-D samples 3. simulation power spectrum.  The first test checked the performance of the entire analyzer (plus anti-aliasing filter). A spectrally-pure test signal of precise frequency was inputted, the power spectrum was computed and averaged, and the output was uploaded and plotted. The procedure was done with two different integration times, corresponding to 19,968 and 199,680 averages (9,984 and 99,840 FFTs). The longer integration was done to check the statistical accuracy of the shorter integration.  The second test measured the integrity of the A-D converter. The same set-up was used except that the digitized data samples converter)  were captured with  a logic  analyzer  (output of the A-D  and then  transferred to a  mainframe computer via an RS-232 (terminal line) link. There, the Welch process was performed on the sample blocks (256-points each) in floating-point arithmetic. A 1024-point FFT (256-point block padded with 768 zeros) was used to yield a better view of the spectrum. The procedure was done for both 1 and 7 averages. No more than 7 averages were computed because the process of capturing and uploading the data was laborious.  The simulation program was run to see how the analyzer should perform with an ideal signal and perfect A-D conversion.  In each case, three kinds of input signal were considered: 1. single sine-wave at various amplitudes  156 2. single sine-wave at two different frequencies (bin-center or halfway between centers) 3. two sine-waves.  In the  case of two  sine-waves,  the  outputs  of two generators were  combined with a splitter and then fed to the  anti-aliasing filter. The  difference frequency was chosen to lie at the center of a bin so that any cross-products (or aliased versions) would lie at the center of a bin. (This is a property due to the segmentation of the data in the Welch process and  results  because  bin-centered frequencies  always  contain an integer  number of signal cycles in a segment.) This should yield the worst-case (largest possible) cross-product levels.  A typical set of results for a moderately-sized sinusoid and a pair of sinusoids is presented on the following pages (Figures 6-la,b,c,d,e). The plots are scaled such that 0 dB is the level of a full-scale (5 Vpp) sinusoid. The peak  on  the  far  left  of  the  spectra  is  the  DC component. Some  observations drawn from these plots, and other plots not included, are listed below: 1. The FFT spectrum analyzer produces the correct Kaiser-Bessel shape. 2. In either of the high-speed tests, the number of averages is adequate because there is little difference between plots of different averages. 3. Spurious peaks are present in both high-speed tests and the simulation. In general, the largest peaks have similar magnitudes ( =* —55 to —65 dB) but do not necessarily occur at the same locations. 4. The spurious peaks are bigger for very large signals.  157 5. For either high-speed test, there is little difference in the responses to a bin-center signal and a signal halfway between bins. However, the simulation produced no spurious peaks for a signal halfway between centers. 6. In the case of two large sinusoids, the level of the cross-products are no higher than the spurious peaks.  We can conclude from the tests that the digital portion of the FFT spectrum analyzer is working well for sinusoidal signals. However, the A-D converter produces spurious  peaks  in the  spectrum, i.e.,  it limits the  performance in these tests. For very large signals, these peaks can limit the dynamic range of the interference monitor.  6.2. A-D INPUT LEVEL AND POWER SPECTRUM DISTORTION There are conflicting requirements in setting the level of the noise at the input to the A-D converter: 1. A high level is needed to minimize the distortion of colored noise. 2. A low level is needed to leave enough "headroom" for large signals and to minimize the noise generated by clipping in the A-D converter.  In section 3.5.5, it was observed that the power spectrum can be distorted (the valleys de-accentuated) when small numbers are rounded to 0 after squaring. To determine a suitable level of noise to input to the A-D converter, a simple experiment was  performed. A "radio-quiet" band was  selected (with a helix  pointing away from the observatory buildings) and the spectrum was integrated until  the  shape  of  the  anti-aliasing  filter  was  visible  in  the  spectrum  (e.g. Figure 6-3a (top)). Spectra were recorded for various levels of noise. (The level was changed by adjusting the gain of the A-D circuit and by inserting  158  FFT Processor Power Spectrum of A - D Somples ( 1 , 9 9 6 £ 0 0 overoges)  125  187.5  250  312.5  375  437.5  frequency (kHz)  Flooting-Point Power Spectrum of A - D Samples (7 averages)  —i  i  1  1  1  1 1 1— Kasier-Bessel (a=2) w nidow freq. - 351.5625 omp.l - .9 Vpp kHz  -20  -40  dB -60  -80  -100 -  . L. )  62.5  125  187.5  250  312.5  375  437.5  500  frequency (kHz)  Figure 6-la. Plots from High-Speed Analyzer Tests  Simulation Power Spectrum of Signal  62.5  125  187.5  250  312.5  159  (2 averoges)  375  437.5  500  frequency (kHz)  FFT Processor Power Spectrum of A - D Samples (^996300  averoges)  0 > » U u » j W t » e « (,iM^' 1- " -553.515625 kHz re  amp.l *= .9 Vpp -20  -40 dB  -60  -80  0  62.5  125  187.5  250  312.5  375  437.5  500  frequency (kHz)  Figure 6-lb. Plots from High-Speed Analyzer Tests (cont'd)  Floating-Point Power Spectrum of A-D Samples (7 averages)  i  I  1  -1  1  1  1  1  Kaiser-Besset (a=2) window . '"<*• ' 353.515625 kHz ampl, e .9 Vpp  (ha\fiO(y betnleen tins) -20  -40 dB  -60  -80  -100  L  62.5  125  187.5 250 312.5 frequency (kHz)  375  437.5  500  Simulation Power Spectrum of Signal (2 averages) i  T  1  1  1  (rw\(uay WWen W)  <'<*> - 3 53.515625 kHz ompl. = .9 Vpp  -20  -40 dB  -60  -80  -1001 62.5  125  187.5 250 312.5 frequency (kHz)  375  437.5  500  Figure 6-lc. Plots from High-Speed Analyzer Tests (cont'd)  160  161  FFT Processor Power Spectrum of A - D Somples (1,996^500 overages)  i  1  1  r  r  i  freqs. - 300.78125 kHz 351.5625 kHz  ampsl. = .9ppVpp 9V -20  -40 dB  -60  -80  0  62.5  125  187.5  250  312.5  375  _l_  437.5  500  frequency (kHz)  Floating-Point Power Spectrum of A - D Samples (7 averages) -i  r"  -1  r  Kaiser-Bessel (a=2) window _  ampsl. .9.9 VVpppp  freqs. • 300.78125 kHz r351.5625 kHz  -20  -40 dB  -60 -  -80 -  -100 0  62.5  125  187.5  250  312.5  _l  375  [_  437.5  500  frequency (kHz)  Figure 6-ld. Plots from High-Speed Analyzer Tests (cont'd)  Simulation Power Spectrum of Signals(2 averages)  Ireqs. = ompsl. -.9.9VppVpp  300.78125 kHz 3 5 1 . 5 6 2 5 kHz  62.5  125  187.5  250  312.5  375  437.5  500  frequency (kHz)  Figure 6-le. Plots from High-Speed Analyzer Tests (cont'd)  163 padding after the anti-aliasing filter.) The mean and standard deviation of the ripple in the passband was calculated. A plot of the ratio o7ji versus A-D input level is shown in Figure 6-2. We see that for small gain, the ratio is large, i.e., the spectrum is distorted. For large gain, the graph begins to flatten. However, at the largest  values of gain, the clipping noise is  severe (observed  as a  dramatic rise in the stop-band of the spectrum).  It was decided to improve the spectrum distortion without introducing too much clipping noise. A number of hardware changes were considered; the best choice, given the time constraints, is to scale the output of the FFT (X(k)) upwards to reduce the number of zeros. The ribbon cables connecting the PS and C&M Boards were modified to shift the data up by four bits. This reduces the headroom but fairly large signals can still be accommodated without overflow in the accumulator.  The experiment was repeated with the modified ribbon cables and a plot of the results is included in Figure 6-2. We see that the ratio o7/u flattens out before significant A-D clipping occurs. A padding of 6 dB and an A-D gain of 10 were chosen for the final implementation.  6.3. SYSTEM OPERATION At this point, it is appropriate to describe how the interference monitor operates under microcomputer control. This will prepare the reader for the next section on system tests.  1.5 T i  i  i  ! b e tot*.! 1  *  ; !  !  •  i  .5  ooi C $<U+\dt\  i  •  •  ( e x c e s s iv Clipping  i  'a^4er Uodi£icLa."Vibr\  4  J  o-i -32  t  -26  -to  I  -If  + IO  in d B r e I. anl-rw A "D *} -^ *<*_  ^  Figure 6-2. p//i of Passband versus Input Level  ai  a  no p a d d i n g  i  165 Via a terminal link with the microcomputer, the user is presented with a menu of programs including one general "surveillance" routine. This program monitors a frequency band for signals that exceed a given threshold. The user First inputs the bandwidth, integration time, and threshold. The program then sweeps through the helical antennas one at a time, each time scanning the sub-bands for interference. A sub-band is selected by setting the frequency of the second LO. After each LO change, the program waits for the LO to settle and then resets the spectrum analyzer. The reset causes the data pipeline to be flushed. The microcomputer then polls the DATAREADY line until it is lowered by the analyzer, indicating the end of an integration period. The microcomputer then uploads the power spectrum and, if required, continues the integration. After integration, the data is normalized with a spectrum from a "radio-quiet" band, split-window normalized to remove any trends (slopes and curvatures), and finally checked for peaks that exceed the threshold. Any detections ("hits") are uploaded to the SST control computer and the cycle begins anew.  The other routines allow the user more manual control of the system, e.g., there are routines to turn on one antenna, set the second LO, set the FFT parameters, capture one spectrum, etc. These routines were used during testing and are useful when manual control is desired.  6.4. SYSTEM TESTS To test the interference monitoring system, a stub antenna connected to a signal generator was set up on the roof of the main building and a CW signal was broadcasted (similar to the set-up in section 2.3.1) The helix that points  166 towards the main building was used to observe the signal. Two kinds of signals were considered: 1. single sine-wave at various levels 2. two sine-waves (one large, the other at various levels).  In the case of two sine-waves, the outputs of two generators were combined with a splitter and then fed to the stub antenna. The testing process was complicated by  the  presence  of other  signals  in the  sub-band of  interest  (generated by electronics in the main building). However, the presence of the signals do illustrate the need for a system such as the one considered in this thesis.  Some of the results for very large and very small signals are presented in the following pages (Figures 6-3a,b,c,d). The plots are scaled such that the background noise level is 0 dB. In the headings of the plots, "normalized" means the  spectrum has been divided by the  spectrum of the  "radio-quiet" band;  "normalized**" means that the normalized spectrum has been further processed with the split-window normalizer. Also, the edges of the normalized band are not shown  because  they  contain  artifacts  of  the  normalization process.  Some  observations drawn from these plots, and others not included, are listed below. 1. The variance of the background noise decreases with averaging in agreement with the simulation for an integration time up to 1.4 hours (20 million averages). (Further averaging was not done due to time constraints.) 2. A — 183dBWm~  2  signal can be detected after both normalizations.  3. The presence of a large signal slightly degrades the detectability of the minimum detectable signal by creating spurious peaks.  167 4. The largest cross-products from two large signals is 31 dB below the signal levels. This limits the detectability of small signals in the presence of multiple large signals.  We can conclude from the tests that a — 183dBWm"  2  signal t can be  detected if there are no large signals in the passband. This level is 5 dB below the minimum detectable signal. If there is a large signal, the minimum detectable signal is a few dB higher. Also, the split-window normalizer must be applied before a small signal can be detected by a threshold test.  6.5. EXAMPLES OF INTERFERING SIGNALS OBSERVED WITH MONITOR A number of signals in the radio astronomy and neighboring bands were detected with the interference monitor. In particular, numerous signals from the observatory's main building and SST blockhouse were observed in the radio astronomy band. Plots of some of the signals are presented in the following pages  (Figures 6-4a,b).  These  signals  are  probably contaminating the  SST's  observations at this time. They are at a low enough level that they would not be detected by other techniques. With the aid of the monitor, these signals will be tracked down and eliminated.  tThe transmitter happened to lie at the crossover point of the helices, therefore the dBm values in the plots should be decreased by 4 dBm to compare them to the minimum detectable signal level derived in Chapter 2.  P o w e r S p e c t r u m of " R a d i o - Q u i e t " B a n d ( S Helix. 9 , 9 8 4 , 0 0 0  4.08Jx10  5  4.084x10  5  4.085x10  4.086x10  5  4.087x10  5  168  FFTs)  5  frequency (kHz)  N o r m a l i z e d P o w e r S p e c t r u m ot - 9 5 d B m Test S i g n a l ( 9 , 9 8 4 , 0 0 0 F F T s )  4.083x10  5  4.084x10  4.085x10  3  4.086x10  : >  frequency (kHz)  Figure 6-3a. Plots from System Tests  4.087x10  3  N o r m a l i z e d " P o w e r S p e c t r u m of - 9 5 d B m Test S i g n a l ( 9 , 9 8 4 , 0 0 0  169  FFTs)  Nl - 5, N2 = 3. A = 1. 8 = 1. NREFIT = 0  = o o  41  —  o I  -  4.083x10=  4.084x10  J  4.085x10  3  4.086x10  =  4.087x10=  frequency (kHz)  N o r m a l i z e d P o w e r S p e c t r u m of - 5 5 a n d - 5 5 d B m Test S i g n a l s ( 9 9 8 , 4 0 0  4.083x10  s  4.084x10  s  4.085x10  s  4.086x10  s  FFTs)  4.087x10  frequency (kHz)  Figure 6-3b. Plots from System Tests (cont'd)  s  Normolized Power Spectrum of - 5 5 and - 5 5 dBm Test Signals (998.400 FFTs)  4.083x10  s  4.084x10  4.085x10=  4.086x10=  4.087x10=  frequency (kHz)  Normolized Power Spectrum of - 5 5 and - 9 5 dBm Test Signals (9,984,000 FFTs)  4.083x10'  4.084x10  4.085x10=  4.086x10=  4.087x10=  frequency (kHz)  Figure 6-3c. Plots from System Tests (cont'd)  170  N o r m a l i z e d " Power S p e c t r u m of - 5 5 a n d - 9 5 d B m Test S i g n a l s ( 9 , 9 8 4 . 0 0 0  FFTs)  N o r m a l i z e d " P o w e r S p e c t r u m of - 5 5 a n d - 9 5 d B m Test S i g n a l s ( 9 , 9 8 4 , 0 0 0  FFTs)  i  i  i  i  171  i  1  d  N1 = 5. N2 - 3. A - 1. B - 1, NREFIT - 5  to o d  o d  unexplained. Signals  o d  %/o.UejS gone a ^ ^ C r  q d  more  re-tiVs  o  CM  o d  I  .  I  4.083x10  5  i 4.084x10  i 5  4.085x10  . 5  i  .  4.086x10  i 5  4.087x10  frequency (kHz)  Figure 6-3d. Plots from System Tests (cont'd)  5  N o r m a l i z e d * * P o w e r S p e c t r u m of S i g n a l f r o m Main Building ( 7 , 1 9 8 , 4 6 4  4.094x10  4.095x1 0°  4.096x10  frequency (kHz)  N o r m a l i z e d ' * P o w e r S p e c t r u m of S i g n a l f r o m Main Building ( 7 , 1 9 8 , 4 6 4  4.069x10  4.07xl0  J  frequency (kHz)  Figure 6-4a. Plots of Interfering Signals  172  FFTs)  FFTs)  4.071x10  s  N o r m a l i z e d * * P o w e r S p e c t r u m of S i g n a l f r o m Moin Building ( 7 , 1 9 8 , 4 6 4  4.061x10  4.062x10=  FFTs)  4.063x10=  frequency (kHz)  N o r m a l i z e d * * P o w e r S p e c t r u m of S i g n a l f r o m SST B l o c k h o u s e ( 7 , 1 9 8 . 4 6 4  4.06x10  4.061x10  5  FFTs)  4.062x10=  frequency (kHz)  Figure 6-4b. Plots of Interfering Signals (cont'd)  173  7. SUMMARY AND CONCLUSIONS  In summary, this thesis describes the engineering of a system to monitor interfering signals, in particular, those signals that can contaminate the maps produced by the 408 MHz aperture synthesis telescope near Penticton, B.C. The resulting system provides continuous, automated surveillance of the radio spectrum around 408 MHz. Small signals can be detected quickly by averaging spectra in real-time.  Valuable information about the interference  available to the astronomers. The system  is a useful  is recorded and made tool with which the  astronomers can improve the accuracy of their observations. To the knowledge of the author and the members of the observatory, no other similar system exists.  The concept of the interference monitor relies on the assumption that most interfering signals are narrowband. The design is based on the estimates of the signal levels derived in Chapter 2.  The project required knowledge in a number of diverse areas: antennas, RF electronics (amplifier and filter design, design of receivers), high-speed digital electronics, signal processing, and software. The most innovative work was in the FFT spectrum analyzer and the antenna system.  A  full  discussion of the details  required to build a fixed-point FFT  machine for any situation requiring long integration is given. This detailed work on the FFT spectrum analyzer that comprises Chapter 3 draws on many sources of reference  and includes some innovations. No equivalent compilation in the  174  175 literature is known to the author. Chapter 3 can therefore serve as a reference for those who want to develop a high-speed FFT-based spectral processor.  Numerous aspects of the design, construction, and performance of an FFT spectrum analyzer were studied. Included is a survey of real-time narrowband processing  techniques  and a study  of various alternatives  in the processor  architecture. The most efficient procedure for processing sub-bands of a larger band using a bandwidth-limited processor was noted. The sources of fixed-point error and their effects in a Welch processor were compiled. Some new results concerning the detectability of small signals were presented (e.g. the limitation due to fixed-point errors, power spectrum distortion). A computer simulation of the Welch process was developed and used in various aspects of the design and testing of the analyzer. The special-purpose hardware that comprises the analyzer was designed and built from scratch. A high-speed processor was achieved at a fraction of the cost of commercial machines.  In the antenna system, an array of eight helical antennas was designed and constructed, its characteristics were investigated and found to be suitable for the present application, and a method of remotely switching them on and off was devised. The antennas and electronics box, designed to operate in an outdoor environment, have survived a winter and high winds in the spring.  Since the interference monitor was intended to be, and is, a working, useful system, testing was a major part of the work. Each component in the system was tested as thoroughly as possible within the limitations of available  176 equipment and time. Particular attention was given to the testing of the FFT spectrum analyzer. These tests were divided into two classes: low-speed functional tests and high-speed (real-time) tests. As well, extensive testing of the system was conducted with transmitted test signals. The performance came within 5 dB of  the  minimum detectable  specification.  Also,  numerous  signal  criterion  real  interfering  and  met  signals  the have  dynamic range been  observed,  particularly from the observatory's own buildings.  Perhaps the most satisfying conclusion, at least in the opinion of the author, is that a sophisticated system has been designed and actually works!  7.1. FURTHER WORK Although the present interference monitor is a useful tool in its own right, it is possible to make a few improvements. These are summarized as follows: 1. Add a second anti-aliasing filter and a switch to implement the ZOOM mode (section 3.4.3.1). 2. Develop software to increase the accuracy of the estimate of the interfering signal's frequency. Three possibilities are: a) interpolate between bins, b) deconvolve the power spectrum with the window, or c) shift the frequency of the second LO in increments much smaller than the bin-width to obtain a maximum response. 3. Develop software to increase the accuracy of the estimate of the interfering signal's direction. Two possibilities are: a) interpolate between antenna beams and/or b) beamform with two adjacent helices operating simultaneously. 4. Develop more sophisticated normalization detectability of very small signals  routines  to  increase  the  5. Use an uninterruptable power supply to power the monitor. This would help in finding the sources of interference; by shutting off the observatory's main power (and hence all electronics), it could be determined if the source  177 of an interfering signal was on site or off.  Although the monitor is already a very useful tool for detecting and finding sources of interference, it is ultimately intended to communicate directly with the telescope's control computer, so that most interference can be removed automatically. This "ultimate" system could be realized fairly easily by writing appropriate software routines. However, the decision to implement it would be based on a lengthy term (a few more months) of reliable, successful operation in the present mode, i.e., the current system must achieve a "proven track record".  7.2. VALUE OF THESIS OUTSIDE OF PROJECT Parts of this thesis are useful in areas outside of the original project. First, there are numerous radio observatories throughout the world, many of which observe at frequencies below 1 GHz and so are prone to interference. The results in this thesis can help them to design their own interference monitors. Second,  the  material is  of interest  to parties  concerned with the  use or  management of the electromagnetic spectrum, especially at radio frequencies. And third,  with the  observatories  advent of new,  are  considering,  high-speed planning,  digital technology, or  already  a number of  building  FFT-based  spectrometers to perform the cross-correlation in the interferometer. The material in Chapter 3 is of value to these people and to anyone involved with FFT-based high-speed systems.  The work has been presented at two conferences. This has generated a fair  amount of interest,  expressed  by  requests  for  further  information by  178 members of other observatories in the United States, Puerto Rico, and Brazil, as well as by others concerned with the use or management of the electromagnetic spectrum.  The radio spectrum is becoming more and more cluttered with man-made signals. In the future, radio astronomy observations may have to be made with large in-band interfering signals, especially in cases where natural transitions of molecules lie in unprotected frequency bands. Current spectrometer designs use very  coarse  quantization  (section 3.2.3)  under the  assumption  that  no such  interference is present. Future designs will have to be cognizant of the techniques used in this thesis to be able to observe weak signals in the presence of in-band interference.  CITED R E F E R E N C E S  [Abru85] J. Abruzzo, "FFT Noise Analysis with Recommendations for Scaling Procedures", 18th Asilomar Conf. Circuits, Systems and Computers, pp.422-7,  1985.  [Albe69] W.J. Albersheim and F.R. Shirley, "Computational Methods for Broad-Band 90°  Phase-Difference Networks", IEEE Trans. Circuit Theory, Vol. CT-16,  No. 2, pp. 189-96, May 1969. [AH78]  Z.M. Ali, "A High-Speed FFT Processor", IEEE Trans. Communications, Vol.  COM-26, No. 5, May 1978.  [Bala82] CA. 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Sundaramurthy and V.U. Reddy, "Some Results in Fixed-Point Fast Fourier Transform Error Analysis", IEEE Trans. Computers (Correspondence), Vol. C-26, No. 3, pp.305-8, Mar. 1977. [Thom82a] A. R. Thompson and L.R. D'Addario (eds.), Synthesis Mapping - Proc. NRAO-VLA Workshop, National Radio Astronomical Observatory, 1982. [Thon76] T-Thong and B. Liu, "Fixed-Point Fast Fourier Transform Error Analysis", IEEE Trans. Acoustics, Speech, and Signal Processing, Vol. ASSP-24, No. 6, pp. 563-73, Dec. 1976. [Tuft72] D.W. Tufts, H.S. Hersey and W.E. Mosier, "Effects of FFT Coefficient Quantization on Bin Frequency Response", Proc. IEEE (Letter), Vol. 60, No. 1, pp. 146-7, Jan. 1972. [Veid84] B. G. Veidt, "A 408MHz Synthesis Radio Telescope", M.Sc. Thesis, Univ. Alberta, 1984. tVlec66] J.H. Van Vleck and D. Middleton, "The Spectrum of Clipped Noise", Proc. IEEE, Vol. 54, No. 1, pp. 2-19, Jan. 1966. [Welc67] P.D. Welch, "The Use of Fast Fourier Transform for the Estimation of Power Spectra: A Method Based on Time Averaging Over Short, Modified Periodograms, IEEE Trans. Audio and Electroacoustics, Vol. AU-15, No. 2, pp. 70-3, Jun. 1967.  182 [Zver67] A.I. Zverev, Handbook of Filter Synthesis, John Wiley, 1967.  OTHER R E F E R E N C E S  [Blak79]  T.R. Blakeslee, Digital Design with Standard MSI and LSI, John Wiley,  1979.  [Coll85] R.E. Collin, Antennas and Radiowave Propagation, McGraw-Hill,  1985.  [Croc83] R.E. Crochiere and L.R. Rabiner, Multirate Digital Signal Processing,  Prentice-Hall, 1983. [FAST87]  FAST Applications Handbook, Fairchild Semiconductor Corp., 1987.  [Hayw82] W.H. Hayward, Introduction to Radio Frequency Design, Prentice-Hall,  1982.  [Horo86] P. Horowitz and W. Hill, The Art of Electronics, Cambridge U. Press, 1986. [Lanc85] D. Lancaster, TTL Cookbook, Sams, 1985.  [Lars67] A.G. Larson and R.C. Singleton, "Real-Time Spectral Analysis on a Small General-Purpose Computer", AFIPS Conf. Proc, Vol. 31, pp. 665-74, 1967. rMorr86]  R. Morrison, Grounding and Shielding Techniques in Instrumentation, 3rd Ed.,  John Wiley, 1986. [Parr84]  E. A. Parr, The Logic Designer's Guidebook, McGraw-Hill,  1984.  [Peat80] J.B. Peatman, Digital Hardware Design, McGraw-Hill,  1980.  [Robi82] W.P.  Robins, Phase Noise in Signal Sources, Peregrinus,  1982.  [Ston82] H.S. Stone, Microcomputer Interfacing, Addison-Wesley, 1982.  183 [Stut81] W.L. Stutzman and G.A. Thiele, Antenna Theory and Design, John Wiley, 1981.  184 [Thom82b] A.R. Thompson, "The Response of a Radio-Astronomy Synthesis Array to Interfering Signals", IEEE Trans. Antennas and Propagation, Vol. AP-30, No. 3, pp. 450-6, May 1982. [Tsui83] J.B. Tsui, Microwave Receivers and Related Components, NTIS,  1983.  [Whit82] D.R.J. White, EMI Control in the Design of Printed Circuit Boards and Backplanes, 3rd Ed., Don White Consultants, 1982. [Wiat80] CA. Wiatrowski and C H . House, Logic Circuits and Microcomputer Systems, McGraw-Hill, 1980.  APPENDIX  1  -  FORTRAN ANALYZER  PROGRAM COMPUTER  185  LISTING  OF  FFT  SIMULATION  SPECTRUM  186  SAMPLcT 9 10  HeSULT  FIL.E  run parameters:  11  12  F1 -  13  FS - 1000.0000 kHz  14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  126.95313 kHz  F2 N -  177.73438 kHz 256  BAOC - 8 BW - 8 BSPEC - 14 BOUT - 31 AI 0.66000000 KZ e.67687858 C 1.66660666 S4.60666000 NAVG 1048576 DSEED 1234567891 ISCALE - 1 ISKIP - 1 IDC - 6 I3H - 6 ISEED1 987654321 ISEED2 112233441 REBOOT - 6 DRAO VAX 11/780 computer  Br"FT -  CAP -  8  7  window parameters: coherent gain of window - —6.21 dB (float) -6.21 dB (fixed) equivalent noise bandwidth of window- 1.75 dB (float) 1.75 dB (fixed)  33  34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51  NAVG 2 BA - 16 CARRY1,2 noise s t a t i s t i c s (at output): floating-point fixed-point noise level standard deviation decrease in std dev signal 2:  SNR SNvR -  theoretical  -28.24 dB -30.25 dB 2.01 dB  -26.21 dB -29.38 dB 3.17 dB  -28.35 dB -29.86 dB 1.51 dB  -351.76 dB -349.75 dB  -353.79 dB -356.62 dB  -6.68 dB -5.17 dB  PNSR PN level mse using  0  110 noise values out of  -2.26 dB -36.50 dB -30.19 dB 129 samples  0  1 2 3 4 5 6 7 8 9 16 11 12 13 14 13 16 17 18 19 28 21 22 23 24 23 26 27 28 29 38 31 32 33 34 35 36 37 38 39 48 41 42 43 44 45 46 47 48 49 58 51 32 53 54 55 56 57 58 59 68 61 62 63 64 65 66 67 68 69 78 71 72 73 74 75 76 77 78 79 88 81 82 83 84 83 86 87 88 89 98 91 92 93 94  PROGRAM SIMULATION  C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C  Program  , „ l o / Q  sum-nary:  Compute and a v e r a g e s u c c e s s i v e , n o n — o v e r l o p p e d power s p e c t r a o f Input s i g n a l — 2 s i n u s o i d s + G a u s s i a n n o i s e . P a c k one d a t a b l o c k I n t o t h e r e a l I n p u t a r r a y and one I n t o t h e Imaginary Input a r r a y ; unscramble the o u t p u t to get the average o f t h e two power s p e c t r a . B o t h f l o a t i n g - p o i n t and f i x e d - p o i n t p r o c e s s i n g o r e done i n p a r o l l e i so t h e y c o n be c o m p a r e d . The f l o o t I n g - p o l n t FFT I s d e c I m a t l o n - l n - t Ime, I r r - p l o e e . The f i x e d - p o i n t FFT I s d e c l m a t i o n - l n - f r e q u e n c y , c o n s t a n t g e o m e t r y . E a c h s a m p l e d i n p u t d a t a b l o c k I s q u a n t i z e d t o BAOC b i t s . m u l t i p l i e d by o B W - b l t window, and FFT"d u s i n g B F F T - b l t processing. E a c h power s p e c t r u m s a m p l e I s BSPEC b i t s w h i c h In t u r n a c c u m u l a t e s up t o BA b i t s v i a i n t e g r a t i o n . (BA I s c a l c u l a t e d by p r o g r a m . ) BOUT b i t s a r e k e p t f o r e a c h a v e r a g e d power s p e c t r u m s a m p l e . O u t p u t d a t a t o a f i l e ( c h a n n e l 7 ) and a p l o t f i l e ( c h a n n e l 9 ) . Window c o e f f i c i e n t s o r e In a f i l e ( c h a n n e l 4 ) . ( S e t BW-0 f o r r e c t a n g u l a r w i n d o w i n g . ) Copy t h e c l i p p i n g and o v e r f l o w r e s u l t s t o a f i l e ( c h a n n e l 1 8 ) . Copy t h e r u n p a r a m e t e r s and n o i s e s t a t i s t i c s to a n o t h e r f i l e ( c h a n n e l 11). R e s t r i c t i o n s on w o r d  lengths:  BADC+OW < 31 2«BFFT <  32  BFFT—1 < BSPEC < 2»BFFT-2 BAmax - BSPEC+1+LOG J 2 < 61 2 BOUT < 31 Input f i l e FI F2 BAOC BW  -  BFFT BSPEC BOUT Al A2 C S  -  OSEED I SCALE ISKIP GAP  -  parameters:  C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C  IPLOT REBOOT —  frequency of s i n u s o i d 1 (kHz) frequency of s i n u s o i d 2 (kHz) l e n g t h o f 2's complement A-0 w o r d ( b i t s ) l e n g t h o f u n s i g n e d window word ( b i t s ) ( s e t - 8 f o r r e c t a n g l e window: otherwise, Kaiser-Bessel (alpho—2)) l e n g t h o f 2's complement FFT w o r d ( b i t s ) l e n g t h o f u n s i g n e d power s p e c t r u m w o r d ( b i t s ) l e n g t h o f u n s i g n e d f i n a l a v e r a g e d power s p e c t r u m word ( b i t s ) peak a m p l i t u d e o f s i n u s o i d 1 ( l i n e a r , r e l . t o u n i t h a l f f u l l - s c a l e ) peak a m p l i t u d e o f s i n u s o i d 2 ( l i n e a r , r e l . t o u n i t h a l f f u l l - s c a l e ) s t d . dev. o f n o i s e ( l i n e a r , r e l a t i v e t o u n i t s t d . d e v . ) h a l f f u l l - s c o l e ( l i n e a r , r e l a t i v e to u n i t h a l f f u l l — s c a l e ) ( e . g . A 1 - . 1 , A 2 - . 2 , C-1. S-2 p r o d u c e s s i n u s o i d s w i t h peak a m p l i t u d e s .85 ond .1 and n o i s e w i t h s t d . dev. .5) s e e d f o r random number g e n e r a t o r s c a l e f a c t o r f o r I n t e g e r d a t a j u s t b e f o r e FFT use to copy o v e r f l o w r e s u l t s to a f i l e (no-8.yes-1) t o t a l number o f p o i n t s s t r a d d l i n g s i g n a l b i n t o remove from n o i s e c a l c u l a t i o n s number o f p o i n t s on e a c h s i d e o f DC b i n t o remove f r o m n o i s e c a l c u l a t i o n s ( t o t a l number — 2*IOC — 1) t o t a l number o f p o i n t s s t r a d d l i n g o p r o b l e m b i n t o be removed f r o m n o i s e c a l c u l a t i o n s ( e . g . 3 r d harmonic of l a r g e s i n u s o i d ) not used not used number o f F F T ' s u n t i l f i r s t p r i n t o u t number o f F F T ' s f o r l a s t p r i n t o u t ( e n d o f r u n ) ( n o t e : t h e number o f F F T s (- number o f o v e r a g e s ) I s t w i c e t h e number a c t u a l l y p e r f o r m e d due t o r e a l d a t a " t r i c k " ) printout spacing factor ( e . g . J 1 - 2 , J2-32. J3-4 w i l l produce p r i n t o u t s a f t e r 2. 8. ond 32 F F T ' s ) u s e t o p l o t power s p e c t r u m ( n c - ^ . y e s - 1 ) use t o r e b o o t p r o g r a m ( e . g . a f t e r s y s t e m c r a s h ) ( n o - 8 , y e s - 1 )  C  Type and  range o f i n p u t  C C C C C C C C C C C C C  F1 F2 BAOC BW BFFT BSPEC BOUT Al A2 C S DSEED I SCALE  REAL*4 (.GT. 8.) REAL«4 (.GT. 8.) INTEGER** (.CE. 1) ( s e e a b o v e r e s t r i c t i o n s ) INTE0ER.4 (.CE. 8 ) ( s e e a b o v e r e s t r i c t i o n s ) INTEGER.4 (.CE. 2 ) ( s e e a b o v e r e s t r i c t i o n s ) INTEGER.4 ( s e e a b o v e r e s t r i c t i o n s ) INTEGER.4 ( s e e a b o v e r e s t r i c t i o n s ) REAL.4 (.GE. 8.) REAL.4 (.GE. 8.) REAL.4 (.CE. 8.) REAL*4 (.GT. 8.) INTEGER.8 ( l a r g e and odd) INTEGER.4 (1 o r 2)  IOC — I3H — I SEED1 ISEED2 Jl J2  -  J3 -  -  file  parameters:  B5 96 97 98 99 188 181 182 183 18* 185 186 187 188 189 118 111 112 113 11* 115 116 117 118 119 128 121 122 123 12* 125 126 127 128 129 138 131 132 133 13* 135 136 137 138 139 1*6 1*1 1*2 1*3 1** 1*5 1*6 1*7 1*8 1*9 158 131 152 153 15* 155 156 157 158 159 168 161 162 163 16* 165 166 167 168 169 178 171 172 173 17* 173 176 177 178 179 188 181 182 183 18* 183 186 187 188  C C C C C C C C C C C  ISKIP CAP IOC I3H I SEED1 ISEED2 Jl J2 J3 IPLOT REBOOT  * * 4  -  INTEGER.* INTEGER.* INTEGER.* INTEGER** INTEGER** INTEGER** INTEGER** INTEGER** INTEGER** (8 or 1) (8 or 1)  (6 or 1) (.GE. 6 ond w i t h i n (.CE. 6 and w i t h i n (.GE. 8 and w i t h i n (any value) (any value) (any integer power (any Integer power (any Integer power  reason) reason) reason) of 2) of 2 which i s .GE. J l ) of 2 which i s .CE. 2)  REAL DATA(256),DATA1(256).DATA2(256).POWERF(129) ,FRE0(129).AVGF(129).AVGOI(129).AVGOF(129) .NOISEI(129).N0ISEF(129),NLI,NLF.NSDI.NSDF.NLT.NSDT.MSE ,WINDWF(256)  * * * * * 4  INTEGER IDATAR(2S6).IDATAI(256),IPOWER(129) ,IDATARS(256).IDATAIS(256) .IAVGH(129).IAVGL(129) ,BADC,BW,BFFT,BSPEC,BA,BOUT ,NSKIP(129),GAP.T,TR1,TI1,TR2,TI2 .BADCW,ALIGN,SHIFT.SHIFTA .W1NDWI(256),DSEED,DSEED1,REBOOT COMPLEX CDATA(256) CHARACTEROB FI LNAM.FI LEI2 CALL CPUTIME(8) RTIME - SECN0S(8.) OPEN(UNIT-18,FILE-'XCLIST.OUT' .STATUS-•UNKNOWN' ,FORM-'FORMATTED') PI - 3.1*15927 TWOPI - 6.2831853 N - 256 M - 8  C  sampling rote i n kHz: FS - 1888.  C C  read In parameters for t h i s run WRITE(6.99) 0PEN(UNIT-5,FILE-'XRUN.DAT' ,STATUS-'OLD' ,FORM-'FORMATTED' )  C  READ(5,*)F1,F2,BADC,BW,BFFT,BSPEC,BOUT WRITE(6.18e) READ(5.*)A1.A2.C.S,DSEED.I SCALE.ISKIP,GAP,I DC,I3H *.ISEED1,ISEED2 DSEED 1 - DSEED NNPTS - N/2 + 1 - 2* IDC - I3H IF(A1.NE.8.)NNPTS-NNPTS-GAP IF(A2.NE.8.)NNPTS-*NPTS-CAP  C  WRITE(6,112) READ(5.«)J1,J2,J3.IPLOT,REBOOT CLOSE(UNIT-S) J1B2 J2B2 J3B2 NOUT  -  NINT( AL0G(J1*1.)/ALOG(2.) ) NINT( AL0G(J2*1.)/ALOG(2.) ) NINT( AL0C(J3*1.)/AL0G(2.) ) (J2B2-J1B2)/J362 +1  OPEN(UNIT-11,FILE-'XNLIST.OUT',STATUS-'NEW'.FORM-'FORMATTED') WRITE(11.113)NOUT NAVC - J2 WRITE(11,181)F1 .F2.FS.N.BADC.BW,BFFT.BSPEC,BOUT.Al .A2.C.S.NAVG 4 .DSEED,I SCALE,ISKIP,GAP,IDC,I3H,ISEED1.ISEED2 * .REBOOT NLOOP - J2/2 C  set up s i g n a l l o c a t i o n s vector NF1 - NINT(N*F1/FS +1.) NF1L - NF1 - (CAP-1)/2 NF1H - NF1 + (CAP-1)/2 NF2 - NINT(N*F2/FS +1.) NF2L - NF2 - (GAP-1)/2 NF2H - NF2 + (GAP-1 )/2 NF13H - NINT(3*N*F1/FS +1.) DO 1 1-1 ,N/2 +1 J — 8 IF( ( (I.GE.NF1L.AND.I.LE.NF1H.AND.A1.NE.8.) * .OR.(I.GE.NF2L.AND.I.LE.NF2H.AND.A2.NE.8.) ) 4 .AND.GAP.NE.8 )J-1 1 NSKIP(I) - J  189 198 191 192 193 194 193 196 197 198 199 260 281 262 263 264 265 206 207 208 269 216 211 212 213 21* 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 236 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 256 251 252 253 254 235 256 257 258 259 266 261 262 263 264 265 266 267 268 269 270 271 272 273 274 273 276 277 278 279 280 281 282  00 1111 1-1, IOC NSKIP(I) - 1 1111 NSKIP(N/2 +1 + 1-l)-1 IF(I3H.NE.0)THEN NSKIP(NF13H) - 1 00 1112 l-1,(l3H-1)/2 NSKIP(NF13H-I) - 1 1112 NSKIP(NF13H+I) - 1 ELSE END IF NF1MN — NF1 — * NF1MX — NF1 + * NF1MNR - N/2 - NF1MX + 2 NF1MXR - N/2 - NF1MN + 2 NF2MN - NF2 - 4 NF2MX - NF2 + * NF2MNR - N/2 - NF2MX + 2 NF2MXR - N/2 - NF2MN + 2 C define x—axis vector for plot and Initialize average vector DO 2 1-1. N/2 +1 FREQ(I) - (l-1)«FS/N IAVGH(I) - 0 IAVGL(I) - 0 2 AVGF(I) - 0. C read In window coefficients and calculate their sun SUM C and the sun-of-squares SUMSQ IF(BW.NE.0)THEN OPEN ( UN IT-4, FI LE- • KA I SB ESS. D AT •, STATUS- • OLD, FORM- * FORMATTED' ) SUM I - 0. SUMSOI - 6. SUMF - 6. SUMSOF - 0. SCALD* - 2.»»BW - 1. 00 21 1-1 ,N READ(4.113)W W I - NINT(WS .CALEW) SUM I - SUM I + W I SUMSOI - SUMSOI + FLOAT(IW)««2 SUMF - SUMF + W SUMSOF - SUMSOF + W..2 WINDWI(I) - W I 21 WINDWF(I) - W SUM I - SUM I/SCALE* SUMSOI - SUMS0I/(SCALEW»«2) WFAC - SCALEW(/SCALEW+1. ) CL0SE(UNIT-4) ELSE SUM I - N SUMSOI - N SUMF - N SUMSOF - N WFAC - 1. END IF C Initialize squared error SE - 6. C average successive power spectra... J0UT- J1 JSTART - 1 ADJ1 - 0. ADJ2 - 6. F1 INC - TW0PI.F1/FS F2INC - TW0PI«F2/FS I FLIP - 0 NSAVE - 6 IF(REBOOT.EO.1)THEN OPEN(UN IT-14,FILE-•XYING.OUT•,STATUS-•OLD•.FORM-•UNFORMATTED') READ(14)JSYING CL0SE(UNIT-14) OPEN (UN I T-14, FI LE-XYANG. OUT •. STATUS- 'OLD*, FORM-' UNFORMATTED •) READ(14)JSYANG CL0SE(UNIT-14) IF(JSYING.GT.JSYANG)THEN FILNAM- 'XYING.OUT' ELSE FILNAM — 'XYANGO . UT' END IF OPEN(UNIT—14F . ILE—FILNAMS ,TATUS—'OLDF ', ORM-'UNFORMATTED') READ(14)JUNK.JSTART.JOUT,DSEED,I SEED1,ISEED2.SE * ,A0J1.ADJ2.IFLIP JSTART - JSTART + 1 DO 210 1-1. N/2 +1 210 READ(14)AVGF(I).IAVGH(I).IAVCL(I) CL0SE(UNIT-14) ELSE 1  1  189  283 28* 285 286 287 288 289 298 291 292 293 294 295 296 297 298 299 388 381 382 383 384 385 386 387 388 389 318 311 312 313 314 315 316 317 318 319 328 321 322 323 324 325 326 327 328 329 338 331 332 333 334 335 336 337 338 339 348 341 342 "343 344 345 346 347 348 349 358 351 352 353 354 355 356 357 358 359 368 361 362 363 364 365 366 367 368 369 378 371 372 373 374 375 376  END IF DO 1234 J—JSTARTN . LOOP DO 5678 K-1.2 NSAVE - NSAVE + 1 JSPEC - 2*(J-1) + K C WRITE(6.182)JSPEC C WRITE(ie,182)JSPEC C generate. Gaussian noise vector (unit variance) C (check for repetition of seed DSEED) DO 22 1 — 1 .N SUMRN - 8. DO 221 L-1.12 SUMRN - SUMRN + RAN (DSEED) IF(DSEEDE . OD . SEED1)THEN OPEN(UNIT-12.FILE-'XSEED.0UT' S .TATUS-'UNKNOWN' F .ORM-F 'ORMATTED" ) WRITE(12,116)JSPEC,I,L CLOSE(UNIT-12) ELSE END IF 221 CONTINUE 22 DATA(I) - SUMRN - 6. C generate sampled input data - signal(s) + noise OO 3 1-1,N INDEX - I - 1 ARG1 - F1INC*INDEX + ADJ1 ARG2 - F2INCI.NDEX + ADJ2 SIGNAL - A1*SIN(ARG1) + A2*SIN(ARG2) 3 DATA(I) - ( SIGNAL + C*DATA(I) ) /S ADJ1 - AMOD(ARGIT . WOPI) + F1INC ADJ2 - AM00(ARC2T , WOPI) + F2INC C analog-to-digital conversion C (clip the dota and convert to 2's complement Integers) NNCLIP - 8 NPCLIP - 8 SCALEI - 2.**(BADC-1) - 1. DO 4 1-1, N IF(DATA(I).LT.-1.)THEN DATA( I) - -1. NNCLIP - NNCLIP + 1 ELSE END IF IF(DATA(I).GT.+1.)THEN DATA( I) - +1. NPCLIP - NPCLIP + 1 ELSE END IF 4 CONTINUE C WRITE(6,183)NNCLIP,NPCLIP C WRITE(18,183)NNCLIP,NPCLIP IF(K.E0.1)THEN DO 51 I-1.N IDATAR(I) - NINT(DATA(I)*SCALEI) 51 DATA1(I) - DATA(I) ELSE DO 52 1-1, N I DATA I(t) - NINT(DATA(I)*SCALEI) 52 DATA2 (I) - DATA( I) END IF 5678 CONTINUE C window the time samples IF(BW.NE.8)THEN DO 33 1-1.N OATAI(I) - DATA1(I).WINDWF(I) DATA2(I) - DATA2( I )*WINDWF( I ) IDATAR(I) - IDATAR( I )*WINDWI (I) 53 I DATA 1(1) - IDATAI ( I )*WINDWI ( I ) ELSE END IF C pack two data blocks into (floating-point) complex array DO 3 1-1,N 3 COATA(I) - CMPLX(DATA1(I),DATA2(I)) C If, after windowing, data word size does not match BFFT, C scale up or down accordingly (if down, then round result) BAOCW - BADC + BW J F(BADCWL . TB . FFT)THEN  190  377 378 379 388 381 382 383 384 385 386 387 388 389 398 391 392 393 394 395 396 397 398 399 488 481 482 483 484 483 486 487 488 489 418 411 412 413 414 415 416 417 418 419 428 421 422 423 424 425 426 427 428 429 •30 431 432 433 434 435 .436 437 438 439 448 441 442 443 444 443 446 447 448 449 430 431 452 453 454 455 456 457 458 439 466 461 462 463 464 463 466 467 468 469 470  6  61  C  ALIGN - 2..(BFFT-BADCW) DO 6 1-1,N IDATAR(I) - IDATAR(I)•ALIGN I DATA I(I) - IDATAI(I)«ALIGN ELSE IF(BADCW.GT.BFFT)THEN ALIGN - 2.»(BADCW-BFFT) DO 61 1-1,N T - IDATAR(I) + ALICN/2 IDATAR(I) - (T + MIN0(0,ISIGN(1,T)))/ALIGN T - IDATAI(I) + ALIGN/2 IDATAI(I) - (T + MIN0(8.ISIGN(1,T)))/ALICN ELSE END IF END IF  If d e s i r e d , p r e - s c a l e the data down by 2 before FFTIng IF(ISCALE.EQ.2)THEN DO 7 1-1. N T - IDATAR(I) IDATAR(I) - (T + MIN8(8.ISIGN(1,T)))/2 T - IDATAI(I) 7 IDATAt(l) - (T + MIN8(0.ISIGN(1.T)))/2 ELSE END IF  C  FFT the windowed time samples CALL FFTI(IDATAR,IDATAI,IDATARS.IDATAIS.M.N.BFFT,ISKIP.JSPEC) CALL FFTF(COATA,M,N,N)  C  compute power spectrum (while unscrambling data) SHIFT - 2««( 2«8FFT - 1 - BSPEC ) TR1 - IDATAR(1)».2 + SHIFT/2 T i l - IDATAI(1)»»2 + SHIFT/2 TR1 - TR1/SHIFT T i l - TI1/SHIFT IPOWER(I) - 2»( TR1 + T i l ) PCWERF(I) - REAL(C0ATA(1))»»2 + AIMAG(CDATA(1))»«2 DO 9 1-2,N/2 +1 TR1 - IDATAR(I)«»2 + SHIFT/2 TI1 - IDATAI (I )««2 + SHIFT/2 TR1 - TR1/SHIFT TI1 - Tl 1/SHIFT TR2 - IOATAR(N-l+2)»»2 + SHIFT/2 TI2 - IDATAI (N-l+2)*»2 + SHIFT/2 TR2 - TR2/SHI FT TI2 - T12/SHI FT IPOWER(I) — TR1 + T M + TR2 + TI2 9 POWERF(I) - ( REAL(CDATA(I))**2 + AIMAG(COATA(I))»»2 * + REAL(COATA(N-l+2))»2 + AIMAG(C0ATA(N-l+2))»«2 )/2.  C C  add power spectrum to running overage ( f i x e d - p o i n t accumulator spans two Integer** numbers) DO 10 1-1 .N/2 +1 IAVGL(I) - IAVGL(I) + IPOWER(I) IF( BTEST(IAVCL(I),38) )THEN IAVGL(I) - IBCLR(IAVGL(I),38) IAVGH(I) - IAVGH(I) + 1 ELSE END IF 18 AVGF(I) - AVGF(I) + POWERF(I)  C  C C C  c a l c u l a t e coherent g a i n CG of window IF(JSPEC.£Q.J1.OR.REBOOT.EO.1)THEN IF(REB0OT.EQ.1)REBOOT-« CGF - SUMF/N CGI - SUMI/N WRiTE(6,104)20«ALOG10(CGF).20«ALOG10(CGl) WRITE(11,104)20»ALOC10(CGF),20*ALOG10(CGI) c a l c u l a t e e q u i v a l e n t noise bandwidth ENBW of window ENBWF - N«SUMS0F/(SUMF.»2) ENBW I - N«SUMS0I/(SUMI»«2) WRITE(6.103)10»ALOC10(EN8WF),10»ALOG18(ENBWI) WRITE(11,185) 18*AL0G18(ENBWF) , 18»ALOG18(ENB"l ) ELSE END i F  C C  C C  c a l c u l a t e squared e r r o r of complex spectrum ( f i x e d - p o i n t r e l a t i v e to f l o a t i n g - p o i n t ) SCE - 2.«»(BFFT-1) .SCALEI/(SCALEI+1.) »WFAC /(SCALE 00 1801 1-1 ,N/2 +1 IF(NSKIP(I).EO.0)THEN SE - SE * + CABS( CMPLX (IDATAR ( I ) , IDATAI ( I ))/SCE - COATA( I ) ).«2 ELSE END IF 1881 CONTINUE c a l c u l a t e s c a l i n g f a c t o r so maximum p o s s i b l e s i g n a l comes out at 0dB IF(JSPEC.EO.JOUT)THEN SCALEO - (.5»CGF)»»2 «JSPEC  1 Q1  471 472 473 474 475 476 477 478 479 488 481 482 483 484 485 486 487 488 489 498 491 492 493 494 495 496 497 498 499 388 581 582 583 584 583 586 587 588 589 518 511 512 513 514 315 516 317 518 519 528 521 522 523 524 325 526 327 528 529 - 338 531 332 533 334 535 336 537 538 539 548 541 542 543 544 545 546 547 348 549 358 551 552 553 554 555 536 557 358 559 568 561 562 563 564  C C C C C  c a l c u l a t e s e a l i n g f a c t o r s f o r c o n v e r t i n g f i x e d - p o i n t data to fIoa 11ng-poIn t (note: '»2' In 'SCALE' compensates for f i x e d - p o i n t unscrambling) (note: AOCFAC i s needed because SCALEI-2««(BADC-1)-1, not 2«»(BA0C-1); d i t t o for WFAC) B A - BSPEC + 1 + NINT(AL0G(JSPEC»1.)/AL0G(2.)) SHI FT A - 2»»( MAX8(BA-B0UT.8) ) AOCFAC - ( SCALEI/(SCALEI+1.) )««2 SCALE - 2.««(BSPEC-1) •AOCFAC «WFAC«»2 /(ISCALE»»2) /SHIFTA  C C  c a l c u l a t e mean—squored e r r o r of complex spectrum ( f i x e d - p o i n t r e l o t l v e to f l o o t i n g - p o i n t ) USE - SE/((.5.CGF)..2 «J) /NNPTS  C  compute noise level IF(C.NE.8.)THEN NLI - 8. NLF - 8. K - 8 00 11 1-1. N/2 +1 T - IAVGL(I)/SHIFTA + IAVGH( I )»(2«»38/SHIFTA) TEMPI - T/SCALE /SCALEO TEMPF - AVGF(I)/SCALEO IF(NSKIP(I).E0.8)THEN K - K+1 NLI - NLI + TEMPI NLF - NLF + TEMPF NOISEI(K) - TEMPI NOISEF(K) - TEMPF ELSE END IF 11 CONTINUE NLI - NLI/NNPTS NLF - NLF/NNPTS  C C C C C  c a l c u l a t e noise—to-maximum s i g n a l r a t i o and n o i s e — t o - s l g n o l r a t i o where s i g n a l - s i g n a l 1 ;A1.NE.8 - Input noise :A1.E0.8 and noise — noise due to f i x e d - p o i n t p r o c e s s i n g PNMSR - NLI - NLF IF(A1.E0.8.)THEN PNSR - (NLI—NLF) / NLF ELSE PNSR - (NLI—NLF) / ( AVGF(NF1 )/SCALE0 - NLF ) END IF  C  c a l c u l a t e rms noise - standard d e v i a t i o n NSDI - 8. NSDF - 8. DO 12 1-1,NNPTS NSDI - NSDI + (NOISEI(I)-NLI)*«2 12 NSDF - NSDF + (N0ISEF(I)-WLF)».2 NSDI - SORT(NSDI/NNPTS) NSDF - SORT(NSDF/NNPTS)  C C  c a l c u l a t e t h e o r e t i c a l v a l u e s of noise r e l a t i v e to maximum p o s s i b l e s i g n a l NLT - C«»2/S«»2 »4 /N »ENBWF NSDT - NLT/SORT(FL0AT(JSPEC))  level  and standard  deviation  C C  c a l c u l a t e r e s u l t i n g decrease In noise standard due to averaging DNSDF - 18«ALOG18(NLF/NSDF) DNSDI - 18«ALOG18(NLI/NSDI) DNSDT - 18«AL0C18(NLT/NSDT)  C C C C C  output noise data to terminol and f i l e WRITE(6,187)JSPEC,BA,IAVGH(NF1),IAVGH(NF2) tt ,18.ALOGie(NLF),ie»ALOG10(NLI).ie»ALOGie(NLT) , ,ie«AL0Gie(NSDF),ie*ALOGie(NSDI).ie*AL0Cie(NSDT) * ,DNSDF,DNSDI,DNSDT  deviation  IF(JSPEC.NE.JI) *OPEN(UNIT-11,FILE-'XNLI ST.OUT'.STATUS-'NEW',FORM-'FORMATTED')  & * tt  IF(JSPEC.E0.J1)WRITE(11,114) WRITE(11,187)JSPEC,BA,IAVCH(NF1),IAVGN(NF2) ,18*AL0G18(NLF),18*ALOG18(NLI),18«AL0G18(NLT) .ie.ALOGie(NSDF).ie«ALOCie(NSDI).ie.ALOC18(NSDT) .DNSDF,DNSDI .DNSDT IF(A1.NE.8.)THEN T - IAVGL(NF1)/SHIFTA + IAVGH(NF1)«(2«»38/SHIFTA) SI - T/SCALE /SCALEO - NLI IF(SI.LT.1E-38)SI-1E-38 SI - 18«AL0G18(SI) SF - AVGF(NF1)/SCALE0 - NLF IF(SF.LT.1E-38)SF-1E-38 SF - 18»AL0G18(SF) SNRI - SI - 18«ALOC18(NLI) SNRF - SF - 18»ALOG18(NLF) SNRT - 18«AL0C18((A1/S)««2) - 18»AL0C18(NLT)  »2  963 566 567 568 569 578 371 372 373 57* 575 576 577 578 379 380 581 582 383 58* 585 586 387 388 589 590 591 592 393 39* 393 396 397 598 399 606 601 602 603 60* 605 666 607 688 669 616 611 612 613 61* 615 616 617 618 619 620 621 622 623 62* '625 626 627 628 629 630 631 632 633 63* 633 636 637 638 639 6*6 6*1 6*2 6*3 64* 6*5 6*6 6*7 6*8 6*9 650 651 652 653 65* 655 656 657 658  SNSDRI - SI - 10«ALOC10(NSDI) SNSDRF - SF - 10.ALOC10(NSDF) SNSDRT - 19»ALOC18((A1/S)«.2) - 16»ALOG10(NSDT) C WRITE(6.108)1.SNRF.SNRI.SNRT C WRITE(6,109)SNSDRF,SNSORI S ,NSDRT WRITE(11.168)1.SNRF.SNRI.SNRT WRITE(11,189)SNSDRF,SNSDRI,SNSDRT ELSE END IF IF(A2.NE.0.)THEN T - IAV0L(NF2)/SHIFTA + IAVGH(NF2)*(2*• 30/SHI FTA) SI - T/SCALE /SCALEO - NLI IF(SI.LT.1E-38)SI-1E-38 SI - 16«ALOG10(SI) SF - AVGF(NF2)/SCALE0 - NLF IF(SF.LT.1E-38)SF-1E-38 SF - 18»ALOC18(SF) SNRI - SI - 10«ALOG10(NLI) SNRF » SF - 10»ALOC18(NLF) SNRT - 19»ALOC10((A2/S)»»2) - 18»AL0C16(NLT) SNSDRI - SI - 18»ALOG10(NSDI) SNSORF - SF - 10«ALOG10(NSDF) SNSDRT - 10.ALOC10((A2/S)»»2) - 10-ALOC10(NSDT) C WRITE(6,198)2,SNRF,SNRI.SNRT C WRITE(6,109)SNSDRF.SNSDRI S .NSDRT WRITE(11.108)2.SNRF,SNRI,SNRT WRIT E(11,109)SNSDRF,SNSDRI.SNSDRT ELSE ENDIF IF(PNSR.LT.1E-38)PNSR-1E-38 IF (PNMSR.LT.1E-38)PNMSR-1E-38 IF(MSE.LT.1E-38)MSE-1E-36 C WRITE(6,118)10«ALOO10(PNSR),10«ALOG10(PNMSR),10«ALOC18(MSE) WRITE(11,110)10«ALOO10(PNSR),10»ALOO10(PNMSR),10»ALOG10(MSE) C WRITE(6,111)NNPTS,N/2 +1 WRITE(11.111)NNPTS.N/2 +1 ELSE ENDIF C for each of the two slgnols: C output to o file two portions of power spectrum: one in the C neighborhood of signal and one In the neighborhood of the C "Image" signal that appears due to fixed-point processing C also, output the values near DC C DO 1210 1-1,* C T- IAVCL(I)/SHIFTA + IAVGH(I)«(2»«30/SHIFTA) C TEMPI - T/SCALE /SCALEO C TEMPF - AVGF(l)/SCALEO C SAVEI - TEMPI C SAVEF - TEMPF C IF(TEMPI,LT.1E-38)TEMP1-1E-38 C IF(TEMPF.LT.1E-38)TEMPF-1E-38 C TEMPI - 18«ALOG10(TEMPI) C TEMPF - 10«ALOG10(TEMPF) C 1216 WRITE(11,166)FRE0(I).TEMPF.TEMPI,SAVEF,SAVEI C * ,IAVGH(I).IAVGL(I) C C DO 121 I-NF1MNN . F1MX C T - IAVGL(I)/SHIFTA + IAVCH(I).(2««30/SHIFTA) C TEMPI - T/SCALE /SCALEO C TEMPF - AVCF(l)/SCALEO C SAVEI - TEMPI C SAVEF - TEMPF C IF(TEMPI.LT.1E-38)TEMP1-1E-38 C IF(TEMPF.LT.1E-38)TEMPF-1E-38 C TEMPI - 10«ALOC10(TEMPI) C TEMPF - 10»ALOC10(TEMPF) C 121 WRITE(11,106)FREO(I).TEMPF,TEMP I.SAVEF,SAVE I C * ,IAVGH(I),IAVGL(I) C C DO 122 I-NF1MNRN . F1MXR C T - IAVCL(I)/SNIFTA + I AVCH( I )»(2».36/SHI FTA) C TEMPI - T/SCALE /SCALED C TEMPF - AVCF(l)/SCALEO C SAVEI - TEMPI C SAVEF - TEMPF C IF(TEMPI.LT.1E-38)TEMPI-1E-38 C IF(TEMPF.LT.1E-38)TEMPF-1E-38 C TEMPI - ie«ALOC10(TEMPI) C TEMPF - 10*ALOG16(TEMPF) C 122 WRITE(11,106)FREO(I),TEMPF,TEMP I,SAVEF,SAVE I C * ,IAVCH(I).IAVGL(I) C C DO 1212 I-NF2MNN . F2MX C T - IAVCL(I)/SHIFTA + I AVCH( I )»(2*«30/SHI FTA) C TEMPI - T/SCALE /SCALEO C TEMPF - AVCF( I )/SCALEO C SAVEI - TEMPI C SAVEF - TEMPF C IF(TEMPI.LT.1E-38)TEMPI-1E-38 C IF(TEMPF.LT.1E-38)TEMPF-1E-38 C TEMPI - 10*ALOG16(TEMPI) C TEMPF - 16«ALOC16(TEMPF) C 1212 WRITE(11,166)FRE0(I).TEMPF,TEMPI,SAVEF.SAVEI  193  659 668 661 662 663 664 665 666 667 668 669 678 671 672 673 67* 675 676 677 678 679 688 681 682 683 68* 685 686 687 688 689 698 691 692 693 69* 695 696 697 698 699 788 781 782 783 78* 785 786 787 788 789 718 711 712 713 71* 715 716 717 718 • 719 728 721 722 723 72* 725 726 727 728 729 738 731 732 733 73* 735 736 737 738 739 7*8 7*1 7*2 7*3 744 7*5 7*6 7*7 7*8 749 750 751 752  C * C C C C C C C C C C C C 1222 C * C  ,IAVCH(I),IAVGL(I) DO 12ZZ I •WF2MNR,NF2MXR T — I AVGL( I )/SHI FTA + IAVGH(I)*(2**38/SHIFTA) TEMPI - T/SCALE /SCALEO TEMPF - AVGF( I )/SCALEO SAVEI - TEMPI SAVEF - TEMPF IF(TEMPI.LT.1E-38)TEMPI-1E-38 IF(TEMPF.LT.1E-38)TEMPF-1E-38 TEMPI - 18*ALOG18(TEMPI) TEMPF - 18«ALOC18(TEMPF) WRITE(11.186)FREO(I),TEMPF,TEMPI,SAVEF,SAVE I ,IAVGH(l),IAVGL(l) CLOSE(UNIT-II)  C  convert averaged power spectrum to dB and output to a f i l e OPEN(UN IT-7,FILE-•XPLI ST.OUT•.STATUS-•NEW',FORM-•FORMATTED') WRITE(7,118)JSPEC DO 123 1-1 ,N/2 +1 T - IAVGL(I)/SHIFTA + IAVGH(I)»(2..38/SMIFTA) TEMPI - T/SCALE /SCALEO TEMPF - AVGF(I)/SCALEO SAVEI - TEMPI SAVEF - TEMPF IF(TEMPI.LT.1E-38)TEMPI-1E-38 IF(TEMPF.LT.1E-38)TEMPF-1E-38 AVGOI(I) - 18»AL0G18(TEMPI) AVGOF(I) - 18»ALOG18(TEMPF) WRITE(7,186)FRE0(I),AVGOF(I).AVGOI(I).SAVEF,SAVE I ,IAVCH(l),IAVGL(l)  123 *  CL0SE(UNIT-7) C c l i p the large negotive dB values before p l o t t i n g C IF(IPLOT.E0.1)THEN C DO 13 1-1,N/2 +1 C IF(AVGOI(l).LT.-188.)AVGOI(l)—188. C IF(AVGOF(l).LT.-188.)AVGOF(l)—188. C13 CONTINUE C C C C C C C C  p l o t averaged power spectrum versus frequency In kHz CALL PLOT1L(N/2 +1.FREQ.AVGOF.18.,7..' kHz".' dB' It ,FREQ(1) ,FREQ(N/2 +1) ,—188. ,8. ) CALL PLOT1L(N/2 +1.FREO.AVGOI,18..7.,• kHz',' dB" * ,FREO(1),FREO(N/2 +1),-188.,8.) IF(JSPEC.EO.J2)CALL PLOTND ELSE END IF ICTIME - 1 CALL CPUTIME( ICTIME) CTIME - FL0AT(ICTIME)/1888. OPENCUNIT-IS.FILE-'XTIME.OUT", STATUS— * UNKNOWN', FORM-' FORMAT T ED') WRITE(13,117)CTIME,SECNDS(RTIME) CLOSE(UNIT-13) JOUT - JOUT • J3 ELSE END IF  * 1*  C  IF(NSAVE.EO.1586)THEN NSAVE - 8 IF(IFLIP.E0.8)THEN FILNAM - •XYING.OUT' FILE12 - 'XLOUT* ELSE FILNAM - ' XYANG. OUT * FILE12 - •X2.0UT* END IF OPEN(UNIT-1*,FILE-FILE12,STATUS—* UNKNOWN•,FORM-'FORMATTED') WRITE(1*.»)JSPEC CLOSE(UNIT-U) IFLIP - NOT(IFLIP) OPEN ( UN I T-1 *. FI LE-F I LNAM .STATUS- • UNKNOWN •, FORM- • UNFORMAT TED' ) WR1TEO*) JSPEC. J .JOUT, DSEED, ISEED1, ISEED2.SE ,ADJ1,ADJ2,IFLIP DO 14 1-1,N/2 +1 WRITE(1*)AVGF(I).IAVGH(I),IAVCL(I) CLOSE(UNIT-U) ELSE END IF  123* CONTINUE . . . f i n i s h e d averaging successive power s p e c t r a CL0SE(UNIT-18)  753 75* 755 756 757 758 759 768 761 762 763 764 765 766 767 768 769 778 771 772 773 774 775 776 777 778 779 788 781 782 783 784 785 786 787 788 789 798 791 792 793 794 795 796 797 798 799 888 881 882 883 884 883 886 887 808 809 810 811 812 '813 814 813 816 817 818 819 828 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846  STOP 99  FORMAT(/.' enter...',/.1X. tt 'Fl(kHz). F2(kHz). BADC. BW, BFFT. BSPEC, BOUT') 188 FORMAT ( *1X.'A1. A2. C. S. DSEEO, ISCALE. ISKIP, CAP, IOC. I3H'. I SEED1. ISEE02') 181 FORMAT(' run parameters:•,//, * ' F1 - '.F18.5,' kMz'.3X.'F2- '.F18.5,' kHz',/, * ' FS - ',F9.4,' kHz'.4X,'N - '.14,/, *' 8ADC - ',I2,13X,'BW - ', 12.16X,'BFFT - ',14,/, * ' BSPEC - ',12.12X,'BOUT - '.12./, * ' A l - '.F15.8,2X,'A2 - '.F15.8,/, *' C - '.F15.8.3X,'S - '.F15.8./. *' NAVG - '.111. 4X, 'DSEED - '.111,/, tt ' ISCALE - '. 11,12X.' ISKIP - '. 11.14X. 'CAP - '.12,/, *' IOC - ', I2.14X,' I3H — ',12,/, tt ' I SEED 1 - '.I11,2X,'ISEED2 - '.111,/. 4 ' REBOOT - ',11,/, * ' ORAO VAX 11/788 computer') 182 FORMAT(/,' — > block number ',12.'...') 183 FORMAT(' no. values c l i p p e d t o - 1 . - '.14,/, * ' n o . values c l i p p e d to +1. - ',14) 184 FORMAT(///,' window parameters:',//, * ' coherent gain of window - '.F5.2,' dB ( f l o a t ) ' , / , * 28X.F5.2.' d8 ( f i x e d ) ' ) 183 FORMAT(' equivalent noise bandwidth of window - *,F3.2, * ' d8 ( f l o a t ) ' . / . 4 41X.F5.2,' dB ( f i x e d ) ' ) 186 FORMAT(1X,F9.4,2X.F7.2.1X,F7.2.2X,E12.3,1X,E12.3.2X,I10.1X.118) 187 FORMAT(2X,'INTERMEDIATE RESULTS OF SIMULATION:',//, *' NAVG — ', 111, 5X,' BA — '.12, 4SX,'CARRY1,2 - ',111,IX,111,/, *' noise s t a t i s t i c s (at output):',/. *26X,'f l o a t l n g - p o l n t ' ,3X,'f I x e d - p o l n f , *3X,'theoretical',//, 411X, 'noise level - ',2X,F7.2,' dB', * 6X.F7.2,' dB', * 4X.F7.2,' dB',/, 44X, 'standard d e v i a t i o n - '.2X.F7.2,' dB'. * 6X.F7.2,' dB', * 4X.F7.2,' dB',/, *3X,'decrease In s t d dev - '.2X.F7.2,' dB'. * 6X.F7.2,' dB', * 4X.F7.2,' dB') 188 FORMAT(/,4X,'signal ',11.':', 46X, 'SNR - ',2X,F7.2,' dB', * 6X.F7.2.' dB', tt 4X.F7.2,' dB') 189 FORMAT(18X, 'SNvR - ',2X,F7.2,' dB'. * 6X.F7.2.' dB', * 4X.F7.2,' dB') 118 FORMAT(/,18X. 'PNSR - '.11X.F7.2,' dB'./, 414X. 'PN level - ',11X.F7.2.' dB'./, 419X, 'mse- ',11X,F7.2,' dB') 111 FORMAT(/," using ',14,' noise values out of ',14,' samples') 112 FORMAT(/,' e n t e r . . . ' . / , I X , ' J l , J 2 , J 3 , IPLOT, REBOOT') 113 FORMAT(2X,'FFT SPECTRUM ANALYZER SIMULATION:'.///,' ',13, *' Intermediate average(s) wl 11 be analyzed',/////) 114 FORMAT('1') 113 FORMAT(1PE14.7) 116 FORMAT(//, ' ••••» WARNING .....'./. *' DSEED REPEATS AT BLOCK ',110,' SAMPLE ',14.' LOOP '.12.//) 117 FORMAT(//,' CPU time - '.1PE13.8.' seconds'./, 4 ' real time - '.1PE15.8, ' seconds') 118 FORMAT(1X,'NAVG - ',111) END  C C C C C  Perform a rodlx-2, declmotlon-ln-tlme, In-ploce FFT on complex data vector 'DATA' of length N—2**M. (Algorithm from Coo ley, Lewis, and Welch.) The output spectrum i s scaled down by ISCALE. SUBROUTINE FFTF(DATA,M,N,ISCALE) COMPLEX DATA(N),U,W,T PI - 3.1415927 N - 2..M NV2 - N/2 NM1 - N-1 J - 1  C  do in-place b i t - r e v e r s i n g s h u f f l e on input data DO 1 I-1.NM1 IF(I.GE.J)COTO 10 T - DATA(J) DATA(J) - DATA(I)  195  8+7 848 849 838 831 832 853 854 855 856 857 858 859 868 861 862 863 864 865 866 867 868 869 878 871 872 873 874 875 876 877 878 879 888 881 882 883 884 885 886 887 888 889 898 891 892 893 894 895 896 897 898 699 908 981 982 983 984 985 • 906 907 908 969 918 911 912 913 914 915 916 917 918 919 928 921 922 923 924 925 926 927 928 929 938 931 932 933 934 935 936 937 938 939 948  OATA( 1) - T K - NV2 IF(K.GE.J)COTO 1 J - J-K K - K/2 GOTO 28 J - J+K  18 28  1  C do the FFT using recursion to update W DO 2 L-1.M LE - 2««L LEI - LE/2 U - (1.,9.) W - CMPLX(C0S(PI/LE1),-SIN(PI/LE1)) DO 2 J-1.LE1 DO 3 l-J.N.LE IP - I+LE1 T - 0ATA(1P)«U DATA(IP) - 0ATA(l)-T 3 DATA(I) - DATA( I )+T 2 U - U»W C scale the spectrum down by I SCALE DO 4 1-1, N 4 DATA(I) - DATA( I )/lSCALE RETURN END C.»..«. C C C C C C C C C C  ,..,...,.,.,,..,„..........,,........,...,............».  Perform a rodlx-2. declmatlon-ln—frequency, constant geometry FFT on complex data vector of length N-2**M. The addressing scheme Is as Implemented In hardware. The data Is In two vectors (real and Imaginary parts), each datum being a B—bit (1<8<17) 2's complement Integer. Each butterfly Is pre-scaled down by 2 using "randomized" rounding based on ORIng of least significant bits. The arithmetic Is quantized to B bits. The unit-circle coefficients are quantized to B bits. SUBROUTINE * * * * *  FFTI(IDATAR,IDATAI,IDATARS,IDATAIS,M.N.B.ISKIP .JSPEC)  INTEGER SCCOUNT,DCOUNT,STAGE,SCADO,XADD,YADD,AADD,BADD ,DMASK,SCMASK ,B, IDATAR(N) , IDATAI (N) , IDATARS(N) , IDATAIS(N) .AR.AI,BR.Bl,TR.TI.SHIFT,OVA.OVS.T .XR.XI.YR.YI  PI - 3.1415927 N - 2»«M NV2 - N/2 NM1 - N-1 C do the FFT... SCALE - 2.««(B-1) -1. SHIFT - 2«»(B-1) NOVAT - 8 NOVST - 8 SCCOUNT - 8 DCOUNT - 8 DMASK - N - 1  I used to moke data addresses modulo-N  DO 2 L-1.M I stage loop NOVA - 8 NOVS - 0 00 3 J-1.NV2 I butterfly loop C calculate the sin/cos coefficient oddress STAGE - L - 1 SCMASK - NV2 — 1 I used to generate sin/cos addresses IF(STAGE.GT.8)THEN DO 4 K-«.STAGE-1 4 SCMASK - IBCLR(SCMASK.K) ELSE END IF SCADD - I AND (SCCOUNT. SCMASK) THETA - PI«SCADD/NV2 IWR - NINT( -COS(THETA).SCALE ) IW1 - NINT( -SIN(THETA)«SCALE ) C calculate the C ('+1' adjusts XADD YADD AADD BADD -  dota read and write addresses for vector starting at 1 Instead of 8) I AND (DCOUNT, DMASK) -I- 1 IAN0(DCOUNT+1 .DMASK) + 1 IAN0( ISHFTC(DCOUNT,-1 ,M) .DMASK) + 1 IAN0( ISHFTC(DC0UNT+1 ,—1 ,M) .DMASK) + 1  C pre—scale (divide by 2 by right shifting 2's complement number;  196  941 942 943 944 945 946 947 948 949 959 951 952 953 954 955 956 937 958 959 968 961 962 963 964 965 966 967 968 969 978 971 972 973 974 975 976 977 978 979 988 981 982 983 984 985 986 987 988 989 998 991 992 993 994 995 996 997 998 999 1888 1881 1882 1883 1884 1885 1696 1887 1998 1889 1919 1811 1912 1913 1914 1915 1916 1917 1918 1919 1628 1921 1822 1923 1924 1925 1926 1927 1928 1929 1638 1931 1832 1833 1834  C the result Is "randomly" rounded up or down by ORIng the two least C significant bits of the original number to produce the least significant C bit of the result) Aft - IDATAR(AADD) AI - IDATAI(AADD) BR - IDATAR(BADD) Bl - IDATAI (BADD) IF( (BTEST(AR.1).AND.BTEST(AR,8)) .EO. .FALSE. )AR-AR+1 IF( (BTEST(AI.1).AND.BTEST(AI,9)) .EO. .FALSE. )AI-AI+1 IF( (BTEST(BR,1).AND.BTEST(BR,9)) .EO. .FALSE. )BR-BR+1 IF( (BTEST(BI,1).AND.BTEST(BI,9)) .EO. .FALSE. )BI-BI+1 AR - (AR + MIN8(6. ISICN(1 ,AR)))/2 Al - (Al + MIN8(9. ISICN(1 .AI)))/2 BR - (BR + MIN8(8, ISIGNfJ ,BR)))/2 Bl - (Bl + MIN8(6, ISI0N(1.61 )))/2 C do the butterfly XR - AR + BR NOVA - NOVA + OVA(AR.BR.XR.B) XI - Al + Bl NOVA - NOVA + OVA(AI .81 .XI ,B) TR - BR - AR NOVS - NOVS + OVS(BR.AR.TR.B) Tl - Bl - Al NOVS - NOVS + OVS(BI ,AI ,TI ,B) T - TRI.WR + SHIFT/2 NUM1 - (T + MIN8(8,ISIGN(SHIFT-1.T)))/SHIFT T - TI»IWI + SHIFT/2 NUM2 - (T + MIN8(8, ISIGN(SHIFT-1 ,T)))/SHIFT YR - NUM1 + NUM2 NOVA - NOVA + OVAN ( UM1 .NUM2.YR.B) T - TRI.WI + SHIFT/2 NUM1 - (T + MIN8(9.ISIGN(SHIFT-1.T)))/SHIFT T - TI«IWR + SHIFT/2 NUM2 - (T + MIN8(8.ISICN(SHIFT-1,T)))/SHIFT Yl - NUM2 - NUM1 NOVS - NOVS + OVS(NUM2N . UM1 ,YI ,B) IDATARS(XADD) - XR IDATAIS(XADD) - XI IDATARS(YADD) - YR IDATAIS(YADD) - Yl C update counters (sin/cos and data) SCCOUNT - SCCOUNT + 1 3 DCOUNT - OCOUNT + 2 C copy results of stoge bock to original data vector DO 5 1-1 ,N IDATAR(I) - IDATARS(I) 5 IDATAI (I) - IDATAIS(I) IF(ISKIP.NE.8.AND.(NOVA+NOVS).NE.BJTHEN C SJRI T£(6,186) L—1 .NOVA. NOVS WRITE(16,188) L—1, NOVA, NOVS ELSE ENDIF NOVAT - NOVAT + NOVA 2 NOVST - NOVST + NOVS C ...done C do In-place bit-reversing shuffle on output data J- 1 DO 1 I-1.NM1 IF(I.GE.J)COTO 19 TR - IDATAR(J) Tl - IDATAI(J) IDATAR(J) - IDATAR(I) IDATAI(J) - IDATAI(I) IDATAR(I) - TR IDATAI(I) - Tl 16 K - NV2 29 IF(K.GE.J)GOTO 1 J - J-K K - K/2 GOTO 29 1 J - J+K IF(NOVAT+NOVST)N . E8 .)THEN C WRITE(6,191)JSPEC,NOVAT,NOVST WRITE(16,181)JSPEC,NOVAT,NOVST ELSE ENDIF RETURN 166 FORMAT0 DIFstage ',12.' no. odd. overflows - '.16. k ' no. sub. overflows - '.16)  197  1035 1036 1637 1638 1639 1646 1641 1642 1643 1644 1645 1646 1047 1648 1649 1656 1651 1052 1033 1054 1055 1656 1057 1658 1859 1666 1661 1662 1663 1864 1865 1666 1667 1068 1869 1876 1871 1872 1873 1874 1675 1676 1677 1878 1679 1886 1681 1682 1683 1684 1885 1686 1887 1688 1889 1698 1891 1892 1893 1894 1895 1896 1697 1698 1699 1166 1161 1102 1163 1104 1165 1106 1107 1168 1169 1118 1111 1112 1113 1114 1115 1116 1117 1118 1119  161  FORMAT(37X.' '.27X,' •,/. ftlX.III.'.OIFoverflows: t o t a l - ',16. * 28X,'totol - '.16) END  C C  c  Chock If overflow has occurred upon a d d i t i o n of two B - b l t 2'* complement Integers (RESULT-NUM1+NUM2). If overflow, s e t OVA - 1; otherwise, set OVA - 0. INTEGER FUNCTION OVA(NUM1.NUM2,RESULT,B) INTEGER B,RESULT,S1.S2 LOGICAL SR S1 - ISIGN(I.NUMI) S2 - ISIGN(1,NUM2) SR - BTEST(RESULT,B-1) OVA - 0 IF(S1.EO.-1.AND.S2.EQ.-LAND. .NOT.SR ft.OR. ft S1.EO.+1.AND.S2.EQ.+1.AND.SR) 40VA - 1 RETURN END  c c c  Check i f overflow has occurred upon s u b t r a c t i o n of two 8 - b i t 2's complement Integers (RESULT-NUM1-NUM2). If overflow, s e t OVA - 1; otherwise, s e t OVA - 0. INTEGER FUNCTION OVS(NUM1,NUM2,RESULT,B) INTEGER B.RESULT,S1,S2 LOGICAL SR SI - ISIGN(1,NUM1) S2 - ISIGNfJ ,NUM2) SR - BTEST(RESULT,B—1) CVS - 0 IF(S1.EQ.-1.AND.S2.EO.+1.AND..NOT.SR ft.OR. ft S1.E0.-f1.AND.S2.E0.-1.AND.SR) ftOVS - 1 RETURN END  c c c c c c c c  THIS SUBROUTINE HAS BEEN CHANCED TO SUIT VAX FORTRAN. SUBROUTINE TO FIND CPU TIME (Written by Subroto of UBC E l e c . Eng. Dept.) SUBROUTINE CPUTIME(CTIME) INTEGER CTIME. CODE DATA CODE/2/ IF( CTIME .EO. 0 ) THEN INITIALIZING THE TIMER CALL LIB$INIT_TIMER GETTING THE VALUE OF CPU TIME ELSE CALL LIB$STAT_TIMER(CODE,CTIME) CTIME - CTIME*10 ENDIF RETURN END  APPENDIX  2 - SCHEMATIC  DIAGRAMS  OF FFT SPECTRUM  ANALYZER  The schematic diagrams of the FFT Spectrum Analyzer are contained in the following pages. The first seven schematics correspond to the major data flow blocks in Figure 3-10. The remainder show control and address circuitry. Some notes regarding their interpretation follow. 1. The figure captions include (in brackets) the board on which the circuit lies. The analog-to-digital conversion (plus window), butterfly, power spectrum, and control (plus FFT memories) boards are abbreviated by "AD Board", "BUTT Board", "PS Board", and "C&M Board", respectively. 2. Positive 5 Volts (digital) is denoted by a triangular hat. Digital ground is denoted by three horizontal lines. 3. To reduce complexity, not all individual integrated circuit packages are drawn separately. When more than one package makes up a larger module that is similar in function, they are combined into one and labelled accordingly, e.g., "2 74F244" means two 74F244 packages. 4. Each inter-board connection (data, address, and control) is paired with a ground wire (terminated at each end) for reduction of crosstalk and ringing. Also, numerous sensitive signals (e.g. edge-triggered clocks) on the boards are twisted around ground wires (terminated at each end) for the same purposes. These ground wires are not shown. 5. All data lines have the suffix "data". All address lines have the suffix "add". All other lines are control. 6. Inter-board control signal names include a suffix (AD, BUTT, or PS) denoting the destination board, e.g., "CADAD" denotes CAD sent to the AD Board. (Warning: on the C&M Board, there are some intra-board signals with these suffixes which simply denote an association.) 7. Unless otherwise denoted (by arrows), signals on the left or top of a diagram are inputs while those on the right or bottom are outputs. Also, a list describing each signal is included at the end.  199  WINDOWEDdataO-15 = x (n)  MEMladdO-7 MEMladd8  O O  0E1MEM  O fi! °A  B  1/00-15  61  MEM2addO-7 MEM2add8 WE2R WE2I 0E2MEM  LZ>OOLZ>O-  " WE 8  RE  1/00-15  1/00-15  OE  CS A9-10  1  A0  CSdataO-15 = X(k) (scrambled)  FFTdataRO-15  CS A9-10  A  ° -  8  61  FFT Memory Bank 1 512 x 32  CS A9-10  A  °- fi! 8  1/00-15 Ol CS A9-10  4 CY7C128-35  FFT Memory Bank 2 512 X 32  — A0-7 HE 1/00-15  A  °-  fil  1/00-15  61 CS A8-10  7  61 CS A8-10  4 CY7C128-35  FFT Memory Bank 3 256 X 32  MEM3add0^7 O WE3 LZ>0E3MEM O Figure  A2-1.  Board  Interface and F F T Memories  ( C & M Board)  Grinds: analog ^ digital - i  +5V: analog ^ digital ^  <=l OVERFLOW  ANALOG IN  ADdataO-7 d(n)  O  CADAD tz>  to o  Figure A2-2.  Analog-to-Digital Converter (AD Board)  Window PROM  (8) > 180 n  WINDOWaddO-7 rz>  B  256  X 8  8 X 8  Multiplier  .  TCB  LMU557  G  AO-7  r RO-15  ADdataO-7  BO-7  16 R  = d(n)  TCA  2 74F244  -^<Z3 WINDOWEDdataO-15 OElr = x(n)  CE2j-  OE D I G I T I Z E D DATA D I S P L A Y MV57164 LEO bar graph  <>—•—<>—«>—it—^^  (switches a l l o w d i s p l a y to be removed from AD c i r c u i t )  O  \ ~ SPST Y) DIPswitch  r  74LS240  Vcc 120 O each  (8) SPST DIPswitches  0E1 .—i  0E2  GND  SPST DIPswitch  Figure A2-3.  Window  Multiplication  and  Digitized Data Display (AD Board)  C1BUTT C2BUTT  CMBUTT  IJ  V  lBOn Li;  V Latch 1 D 0  16  2 74F374  16  C3BUTT C4BUTT E1BUTT E2BUTT EBUSBUTT  180n  16  180n  180 n  I 390 n 390n V—=H 16  L i 390n  180n  ;; 390n  Adder 1 *2  J 390n  J  0  XR  2 74F374  <>16 >'A>'„<>\ L 16 (16) ~§. 390 n  16  Multiplier i Sub 1  V Latch 2 D 0 2 74F374  16 16  16  -f2  16  P  D  Y  i  390 n  16  16  2 74F244  0  2 74F374  Dt"  v— HA  (7) >180n  Multiplier 2  PROM -COS0  -Ci 0  FFTCOEFFaddO-6 (7)  16  Tri-State Latch 2  X  W 390n  DE Buffer 2  16  (16) > 1 8 0 n  FFTdataRO-15 rz>  180n  390n 180n  Tri-State Latch 1 D  16  OE  180n  390n  16  X Y  ~  PROM -sin9  A  16  16  0  Ci 16  v —  Multiplier 3 X Y  v—  V Latch 3 D 0 16  2 74F374  * 16  +2  Multiplier 4  Tri-State Latch 3 D  1? X  0  2 74F374  16  16 If Y  OE  (16) ^ 1 8 0 n  FFTdataIO-15  Sub 2  Sub 3  DE Buffer 2 16  16 L l T ^ T t  (16) <* 390n  '16 16 ,  2 74F374  UE  16  *  * 2  16  Al 16  Figure A2-4.  Obi  2 74F244  Tri-State Latch 4  V Latch 4 D 0  D  Butterfly Circuitry (BUTT Board)  H D  0  2 74F374  16  Xi  16  16 X 16 Adder  16 X 16 M u l t i p l i e r S= A + 8 1 6  x 16 Subtractor  X *Y  16-Bit Divide-BY-T«°  i2B x 16 C o e f f i c i e n t PROM  -*>»5  ->0 14 -JO 13 -X> 12 - W 11 —»o to -*>  9  —*> 8 — »  - » -^O -X> —»  o~ 5 O4 O-  7  6 5 4 3  «/6 74F04  -X) 2  1/4 74F32  Figure A2-5.  r Butterfly Modules (BUTT Board) Blowups of Butterfly  E1PS C1PS  (carries strung in series; - f i r s t c a r r y - i n to ground)  o 180 n  CMPS  •; 390n  -  = X(k)  4:  ;; 390n CLKX  16  n  CIKY  (16) > l B 0 n  XO-15  16 l 16 (16) < 390 n  YO-15  (scrambled)  P16-31  MRPS  390n 180 n r o -  TRIL FT  180n  32 X 32 Adder  390n  A16-31 A0-15  16  SO-31  RND 180n  C2PS  lBOn  ADSP-1016AJ  O  CSdataO-15  16 X 16 M u l t i p l i e r  H TRIM  32  32  V 4 74F374 DO-31 00-31  BO-31 8 74F283  0E  FA  TCX  CLKL  TCY  CLKM  -*z-<3 <  390 n  32  PSdataO-31 =  P  (k)  00-31 > (7) > 1 8 0 n  00-31  4 TMM2015AP-90 PSACCUMaddO-6  4 74F273 MR  o-+(7) § 390 n  A0-6  32  RE 180 n WE1PS  O-  390 n 180 n  0E1PS  o -  1/00-31 0E  -V 32  32  Power Spectrum Memory Bank A7-10  128 X 32  390 n  Figure A2-6.  Is3 O Cn  Power Spectrum Computation and Accumulation Circuitry (PS Board)  1ARDY O (from micro)  CEP CET  m  CEP CET  TC PI 741S161 PO-3 00 -3  HR  V  ^ I7 S  180 n  0  390 n  Bl 2 74122  •' 7 I„0-6 1,7 1,0-6 2 74F257 01 Z7 Z0-6  ^  Output Memory Bank 128 X 32  -  V 4 74F374  PSdataO-31o= P(k)  32  00-31 00-31 01  4 THM2015AP-90 A0-6 1/00-31  32  1  ,  7* 32  . 220 n  S Za  WE  74F257  CE  Zb  ns A7 -10  0 150 msec pulse  4T  WE1PS o C1PS  DTPswitch  B  E1PS t=>c  O SPST  RxCx Cx Rint  390n  EOINTEGPS o -  CHB-06 buzzer  47K  TC PE 74LS161 P0-3 07 04-6  : IBOn  RESETPS O PSACCUMaddO-6  V  Zc  7-£  YELL0H  FLASH AND BEEP EVERY INTEGRATION PERIOD  10a Ha 10b lib 10c  4  UE l i e  4 74LS244 4 (from micro)  Al  024-31 016-23  (from micro  08-15 00-7 _  ^ — .<=•  0UTPUT0-7 (to micro)  =  Figure A2-7.  Output Buffer and Interface to Microcomputer  (PS Board)  P  FINAL M  A  A  IK  2BRDY  O-  MODEO  o -  M0DE1  o -  A  IK  A  IK  IK  i  (frorn micro)  D  (from micro)  L  D  °  So  (from micro)  °  1/2 74LS74  1/2 74LS74  Q  L  Q ff  U  EXTCLK C ^ (from micro)  JT  SO  1/6 74F14 32.000 MHz oscillator FOX F1145  CEP  16  CET  SI  1/2 74F253  V  74F169  3 2 10  uzr  U/D  10a Ila I2a I3a  Za  JT  •<=) MAINCLOCK = C 1/6 74F14  OFa  PE  PO-3  SINGLE STEP  SINGLE STEP  O Figure A2-8.  Mam Clock Generation (Including Some Interface Signals) ( C & M Board)  1/4 74F08  04 O EOFFT c=>  CPS  50 ns ST08CBa50  to o  Figure  A2-9.  PS Clock Generation  ( C & M Board)  CO  CAD(w/o delay)  74F244  CAD  5 ns [-  C  - < • WEBUTT  10 ns  OCEP CET  V 74F269 00-4  -{>  U/0 PE  63S08U AO-4 00-7  PO-7  E  74F374 1 2 3 00-7 4 5 6 OE 7 h  C1BUTT  - a C2BUTT  —120 ns h—  6 ST0BCB250  C3BUTT  -f 15 ns f-  - a  -[15 ns |-  •<n CMBUTT  C4BUTT  { > f e ^ o CRWadd  10 ns  Control PROM 1 32 X 8  - a  0E2-  _ _i — a CRadd CWadd SRWadd  EBUSBUTT  CCadd  63S081A AO-4 00-7  6/8 74F244  -<n EBUSBUTT - a T/R  E  T Control PROM 2 32 X 8  •{>  - a OEBUTT - a E1BUTT - a E2BUTT  L  fc>IJB-o 012-  CADAD C+4 - < • WEAD - < • EAD  Figure A2-10.  AD  and BUTT Control Signals, and Some Control Signals for Buses (C&M  Board)  to o to  EOFFT  n>  RESET  rz>  EOBLOCK-f 2  LZ>  EAD  E0BL0CK-2  tz>  Figure A2-11.  Some Control Signals for Buses (C&M  Board)  74F244  CPS  CMPS  o -  -<=] C1PS V  rHcT^ CFT  PI  r$v  U/D  63RS881  74F269  „ TC  QO-4  o  PO-7  AO-4 5 -  A5-9  WE ES  1/4 7 4 F 0 B  2 3  1> E1PS  4 5  • < • E1PS  0E1PS  • < • 0E1PS  6  WE IPS  Zl  7 i P S Control PROM 1 32 X 8  RESET o -  • < • C2PS  •o  3> 1/4  EOINTEG o -  -<£3 MRPS TjElL-i <=i SIPS = EOINTEGPS 0E2H'  74F32  ir^ci  CPSadd S2  t 7  i 6  l 5  15V" 0 1 63HS881;  t 4  3  2  AO-4 H A5-9  1 0  E  E6  •<=• E6 2/4  2 3 4 5 ~ 6 -  74F00  -<=• E7 0E3  ES PS Control PROM 2 32 X 8  Z0 o -  to Figure  A2-12.  PS Control  Signals (C&M  Board)  WEAD !=>10a Ila 10b l i b 10c l i e IOd l i d  E0BL0CK+2  74F257  S  Za  Zb  DE  Zc  Zd  WEBUTT o 10a Ila 10b l i b 10c lie IOd l i d  0E1(=>-  OEBUTT r z ^  0E2 o  DE  Za  Zb  Zc  Zd  [J  u  U  U  WEIR  WE2R  2/4 74F32  ^  0 u 0E1MEM  Figure A2-13.  74F257  S  0E2MEM  WE1I  WE2I  Write and Enable Signals for FFT Memories 1 and 2 (C&M Board)  h  0E3 EOFFf  o o  EOFFT  o  WEBUTT tz>  Figure A2-14.  Write and Enable Signals for F F T Memory 3 and E5  ( C & M Board)  CAD  A  o  RESET o -  CEP  V  CET  74F269  PF  QO-7  U/D  PO-7  |8  74F244 i 0E1 0E2  fi fl  ADaddO-7  WINDOWaddO-7 tO t— 1  Figure A2-15.  A D and Window Address Generation  ( C & M Board)  CRadd n> CWadd  o V  CEP CFT  74F269  PO-7  ===•  PE RESET  CEP cn  u/rj  Ql-7  QO  1?  PE  V  U/D  74F269 QO-7  PO-7  >  o  1,0-6  s  SRWadd o -  IQO-7  2 74F257  ZO-7  &  '8  . D0-•7  >  CRWadd o -  74F374  QO-7  ,'8  i FFTDATAaddO-7 cn  Figure  A2-16.  F F T Data  Address  Generation  (C&M  Board)  CRWadd o SRWadd o EOSTAGE o 1 / 4 74F86  D  1/2 74F74 0  5  D  0  1/2 74F74 Tj  Z -EOSTAGE+2  RESET 0E2 o -  • < • MEMladd8 2/4  74F08  MEM2add8  0E1O-  Figure A2-17.  Bit-8 Generation  for F F T Data Address ( C & M Board)  CCadd o RESET rz>EOSTAGE o  A  STAGEO-2 o — ^  74F374  AO-2 00-6  DO-6 QO-6  A3,4  i  2  V  CET  74F269  U/D PO-7  V 63S081  CEP  PE  Q7 QO-6  /I /I  UE  E  1  i  13/4 74F08  Stage Decoder PROM 8X7  /I 7/8 74F244  uFli 0E2  /I  A FFTCOEFFaddO-6 Figure  A2-18.  F F T Coefficient  Address  Generation  ( C & M Board)  CPSadd  o CEP  V  TC  CEP  V  TC  CET  74F161A  PE  CET  74F161A  PE  m  Q7 Q4-6  m  PO-3 QO- 3  PO-3  RESET o S2 O-  2 74F257  -<• PSaddO-7  PS Unscramble PROM  74F244  128 X 8 '7  PSACCUMaddO-6 •<• RESETPS uFl  I  012  to 00  Figure A2-19.  PS Address Generation  ( C & M Board)  0E2tz>  2 74F257  ADaddO-7 rz>  MEMladdO-7  OElo  2 74F257  MEM2addO-7 FFTDATAaddO-7 o  E5  o  2 74F257  <• MEM3addO-7 PSaddO-7 n>  Figure A2-20.  Address Multiplexers ( C & M Board),  sanple  counter  stage  counter  CAD O -  r  CET  u/rJ  v  CEP  74F169 p  «. PE  3 2 1 0  3  °- r~L I j*  detect stage 3 or 7  2 / 4 74F0B  -<=3 STAGEO-2 detect stage 7  CA0(w/o delay) o 14  — v T D  D , 1/2 74F74  RESET o -  C"D  X  Q  •1/2 74F74  1/2 74F74  U  EOSTAGE E0BL0CK A  Ho  Q  -<• EOFFT EOFFT  • < • E0BL0CK + 2  1/2 74F74 7J  EOBLOCK-s-2 Figure A2-21.  Sample and Stage Counters (C&M Board)  to to o  2ARDY o (from micro) NAVGO-7 o—n8 (from micro)  V 74LS374  EOFFT  1  BE  2  3  1  SH2  count base  down down  2  down up  16  up  down  242  up  up  256  O CIP  P4-7  CIP  err  Pl-3  r err  PI  RESET  00-7  SW2  SHI  1*.  SHI  DO-7  SPOT D l P s w i t c h e s  74F269  Q6  PO  U/TJ TC"  V  0  TC  1/2 74F74  U/D  PI  T  "V"  po-7  74F269  E0INTEG  5  D  0  A  1/2 74F74 5p  Q  -<•  DATAREADY (to micro)  •<•  ZO  U  o -  . 220 '5  n  GREEN  2/4 74F08  FFT RATE+128 3/4  V 0  Q  "V— Q  D IT.  l_ Figure A2-22.  74F175  3 = Integration (FFT) Counter  1 to to  (Including Some Interface Signals) ( C & M Board) •  EAD  t=> 39 K [1| 2.2UF  RxCx Cx Rint  SYSRESET  (from micro)  Bl  o  02 74122  u  —^T" D  JT  Q 30 msec pulse  1/6 74F14  "  1/2 74LS74 Q  TJ  A"2  L  220 O  Co  r 7/  />  2/8 74F244 1  RESET  RED  -<• ditto 10 uF  MANUAL RESET  T~  POWER-ON RESET  (share load between two buffers)  to to to  Figure A2-23.  Reset Generation (Including Some Interface Signals) (C&M Board)  OVERFLOW rz^-  220  1/6 74LS04  OVERFLOW INDICATOR EXCESSIVE OVERFLOW INDICATOR  Figure A2-24.  n  Overflow Indicators (AD Board)  224  Description of Signals in F F T Spectrum Analyzer  1ARDY 2ARDY 2BRDY AO-1 ADaddO-7 ADdataO-7 A N A L O G IN C C1BUTT C1PS C2BUTT C2PS C3BUTT C4BUTT CAD CAD AD CAD(w/o delav) CCadd C*4 CMBUTT CMPS CPS CPSadd CRadd CRWadd CSdataO-15 CWadd  "ET E1BUTT E1PS ¥2" E2BUTT FJS  E4  "ET E6 E7  microcomputer port ready line microcomputer port ready line microcomputer port ready line O U T P U T byte address A-D data address A - D data analog input main clock clock butterfly latches 1 and 4 clock PS latch clock butterfly latches 2 and 3 clock PS resettable latch clock butterfly tri-state latches 1 and 4 clock butterfly tri-state latches 2 and 3 clock A-D clock A-D (buffered) clock A-D (w/o delay) clock coefficient address main clock divided-by-4 clock butterfly multipliers clock PS multiplier clock PS control generator clock PS address clock F F T data read address clock read/write F F T data address complex spectrum data clock F F T data write address enable output for F F T memory swapping enable output butterfly tri-state latches 1 and enable output PS latch enable output for F F T memory swapping enable output butterfly tri-state latches 2 and enable output for F F T memorj' swapping enable output for F F T memory swapping enable output for copy to F F T memory bank enable output for reading complex spectrum enable output for reading complex spectrum  225  EAD EBUSBUTT EMUX E0BL0CK-f2 EOFFT EOINTEG EOINTEGPS EOSTAGE EXTCLK FFTCOEFFaddO-6 FFTDATAaddO-7 MEMladdO-7,8 MEM2addO-7,8 MEM3addO-7 MODEO-1 MRPS NAVGO-7 OE1 OE1MEM OE1PS OE2 OE2MEM OE3  OE3MEM  OEBUTT OVERFLOW PSACCUMaddO-6 PSaddO-7 PSdataO-31 RESET RESETPS S2 SRWadd STAGEO-2 SYSRESET T/R  enable A-D data enable output butterfly buffers 1 and 2 enable OUTPUT bus end-of-block pulse divided-by-2 end-of-FFT pulse end-of-integration pulse end-of-integration pulse (buffered) end-of-stage pulse external clock FFT coefficient address FFT data address FFT memory bank 1 address FFT memorj' bank 2 address FFT memory bank 3 address clock mode clear PS accumulator number of averages per integration period output enable for memory swapping output enable F F T memory bank 1 output enable PS memory bank output enable for memory swapping output enable F F T memory bank 2 output enable F F T memory bank 3 (unsynchronized) output enable F F T memory bank 3 output enable butterfly data A-D overflow power spectrum accumulation address power spectrum address power spectrum data reset pulse reset PS counter select PS address select read/write F F T data address stage count system reset pulse transmit/receive (FFT data direction)  WE II WE IPS WEIR WE2I WE2R WE 3 WEAD WEBUTT WINDOWaddO-7 WTNDOWEDdataO-15 ZO  write-enable FFT memory bank write-enable PS memory bank write-enable FFT memory bank write-enable FFT memory bank write-enable FFT memory bank write-enable FFT memory bank write-enable A-D data write-enable butterfly data window address windowed data start-of-integration pulse  1 (imag) 1 (real) 2 (imag) 2 (real) 3  APPENDIX 3 • THE SPLIT-WINDOW NORMALIZER  The split-window normalizer [DREA84] is used in the interference monitor to whiten the background noise before threshold detection. It is applicable for the case of narrowband signals in broadband, colored noise. It is essentially a method of lowpass filtering the power spectrum data to estimate  the shape of the  background noise and then dividing (normalizing) the original data by the noise estimate.  A double-boxcar function (depicted below) is passed over (convolved with) the data to yield an initial estimate. (The noise estimate at the center of the gap is calculated by averaging the values of the data points that fall inside the windows.) Nl  = window width  N2 = gap width A = clipping constant B = replacement constant NREFIT = number of passes after first two passes Then, those points in the original data that lie above the estimate are clipped (set equal to the estimate) and points below the estimate are replaced with the estimate. If desired, the clipping and replacement levels can be modified by scale factors A and B. The double-boxcar is then passed over this new dataset to yield the final estimate.  227  228  > N l  HZ  A/1  Figure A3-1. Double-Boxcar Function in Split-Window Normalizer The split-window normalizer was refined by the author to yield better noise estimates. In the refined normalizer, the "clip, replace, and re-estimate" process is repeated NREFIT times, where the clipping and replacement process uses the original data. This yields a better estimate, especially when a large signal is present.  

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