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A compact, flexible controller for PWM inverters Mauch, Konrad 1984

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A COMPACT, FLEXIBLE CONTROLLER FOR PWM  INVERTERS  By KONRAD MAUCH B . A . S c , The U n i v e r s i t y of B r i t i s h Columbia, 1977  A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE  in  THE FACULTY OF GRADUATE STUDIES Department o f E l e c t r i c a l  We accept t h i s  Engineering  t h e s i s as conforming  to the r e q u i r e d  standard  THE UNIVERSITY OF BRITISH COLUMBIA May 1984 ©Konrad  Mauch, 1984  In p r e s e n t i n g requirements of B r i t i s h it  this thesis f o r an  agree t h a t  Library  shall  for reference  and  study.  I  f o r extensive copying of  p u r p o s e s may  department or  by  h i s or  her  copying or  f i n a n c i a l gain  be  shall  g r a n t e d by  not  be  Electrical  Engineering  The U n i v e r s i t y o f B r i t i s h 1956 Main Mall V a n c o u v e r , Canada V6T 1Y3  Date  DE-6  (3/81)  May  24.  1984  of  Columbia  make  further this  thesis  head o f  this  my  It is thesis  a l l o w e d w i t h o u t my  permission.  Department of  the  representatives. publication  the  University  the  for scholarly  for  the  I agree that  permission  understood that  f u l f i l m e n t of  advanced degree at  Columbia,  freely available  in partial  written  ABSTRACT  A f l e x i b l e , low c o s t i n v e r t e r speed AC motor d r i v e s use  controller  has been designed.  i n a submersible thruster  found to have p o t e n t i a l  drive,  circuits.  applications the  O r i g i n a l l y designed f o r  the c o n t r o l l e r has been  f o r use i n other d r i v e s  c o s t and s m a l l s i z e a r e made p o s s i b l e integrated  f o r use i n v a r i a b l e  Flexibility  as w e l l .  Low  by the use of l a r g e  i n a variety  of motor  scale drive  i s a c h i e v e d by u s i n g a microcomputer as the h e a r t of  controller.  In comparison to o t h e r c o n t r o l l e r s c o n t r o l l e r has the f o l l o w i n g i ) The c o n t r o l l e r  f o r PWM i n v e r t e r s ,  this  d i s t i n c t i v e features: can operate the i n v e r t e r  to output  f r e q u e n c i e s of 400 Hz o r more as opposed to maximum frequency l i m i t s of 120 Hz to 200 Hz f o r other controllers. i i ) The c o n t r o l l e r  i s programmed i n the C h i g h  programming language i n s t e a d  level  of the assembly language  used i n other microcomputer based c o n t r o l l e r s . a l l o w s the c o n t r o l l e r new  to be adapted more r a p i d l y t o  applications,  i i i ) The c o n t r o l l e r  i s s m a l l e r and has a lower component  count than most other c o n t r o l l e r s . controller and  This  less  As a r e s u l t the  s h o u l d be more r e l i a b l e , e a s i e r  expensive.  ii  to package,  A f t e r a review of AC d r i v e technology, the o b j e c t i v e s  and the b a s i c  a l t e r n a t i v e s i n the d e s i g n of the c o n t r o l l e r a r e p r e s e n t e d .  The  c i r c u i t d e s i g n and software d e s i g n of the c o n t r o l l e r a r e d i s c u s s e d . Two a p p l i c a t i o n s  of the i n v e r t e r c o n t r o l l e r a r e p r e s e n t e d and the  success of the d e s i g n i n these two a p p l i c a t i o n s  i s evaluated.  C o n c l u s i o n s a r e p r e s e n t e d on the o v e r a l l success of the d e s i g n and s u g g e s t i o n s a r e made f o r improvements and f u r t h e r work.  iii  Table  of  Contents  Abstract  i i  L i s t of F i g u r e s  vi  Acknowledgements  viii  Chapter 1  1  Introduction  1.1  Motivation  1.2  Scope and  1.3  O u t l i n e of T h e s i s  6  1.4  Summary  8  Chapter 2  f o r Thesis Objectives  Project  3  of T h e s i s P r o j e c t  Review of V a r i a b l e Frequency AC  D r i v e Technology  2.1  Classification  2.2  I n v e r t e r Power Switching  2.3  V a r i a b l e Frequency O p e r a t i o n  2.4  C o n t r o l of the I n v e r t e r Waveform  Chapter 3  of I n v e r t e r D r i v e s Devices of I n d u c t i o n Motors  I n v e r t e r C o n t r o l l e r Design C o n s i d e r a t i o n s  4  10 10 15 18 31 46  3.1  B a s i c System Requirements  49  3.2  Requirements f o r Other A p p l i c a t i o n s  53  3.3  C o n t r o l l e r Functions  57  3.4  I n v e r t e r C o n t r o l l e r Design A l t e r n a t i v e s  62  3.5  Torque and  63  3.6  System P r o t e c t i o n  65  3.7  P u l s e Width M o d u l a t i o n  68  3.8  Basic C o n t r o l l e r Architecture  84  Chapter 4  Speed C o n t r o l  C o n t r o l l e r Hardware Design  4.1  Microcomputer C i r c u i t  4.2  I n t e r f a c e to HEF4752V PWM  87 88  iv  Generator IC  96  4.3  Remainder of C o n t r o l l e r C i r c u i t  112  4.4  I n v e r t e r C o n t r o l l e r C i r c u i t Board  114  I n v e r t e r C o n t r o l l e r Software Design  118  Chapter 5 5.1  Software Development System  119  5.2  D e s c r i p t i o n of C o n t r o l l e r Software  121  5.3  Software Implementation  130  5.4  E v a l u a t i o n of Software Development the C Language  Chapter 6  Using  A p p l i c a t i o n s of the I n v e r t e r C o n t r o l l e r  134 140  6.1  Submersible T h r u s t e r D r i v e  141  6.2  L i n e a r I n d u c t i o n Motor D r i v e  145  6.3  LIM  148  6.4  LIM D r i v e C o n t r o l Panel F u n c t i o n s  150  6.5  E v a l u a t i o n of LIM  151  6.6  Conclusion  Chapter 7  Drive P r o t e c t i v e Functions  Drive  154  Conclusion  155  References  160  Appendix  167  v  List  of F i g u r e s  1.  B l o c k Diagram of T y p i c a l AC D r i v e System  2  2.  Inverter Controller  8  3.  Basic Inverter Bridge C i r c u i t  11  4.  I n v e r t e r S w i t c h i n g Sequence  11  5.  B a s i c I n v e r t e r Types  12  6.  PWM  I n v e r t e r Output V o l t a g e Waveform  14  7.  I n d u c t i o n Machine Torque-Speed Curve  19  8.  Torque-Speed Curves at D i f f e r e n t Frequencies  19  9.  10.  Standard E q u i v a l e n t C i r c u i t Machine  Stator  f o r the I n d u c t i o n 20  Torque Envelope f o r Constant V o l t s / H z Operation  22  11.  Torque-Speed Curve Showing  25  12.  Torque-Speed Curves f o r Current and V o l t a g e Source O p e r a t i o n  27  13.  Machine E q u i v a l e n t C i r c u i t  34  14.  T r i a n g l e I n t e r c e p t P u l s e Width M o d u l a t i o n  39  15.  PWM Waveform Having Q u a r t e r and H a l f Wave Symmetry  43  16.  I.S.E. Submersibles  48  17.  C o n t r o l Loop f o r C o n t r o l l e d S l i p D r i v e  59  18.  Software I n t e n s i v e PWM  69  19.  Counter/Timer Based PWM  20.  Programmable  21.  Memory I n t e n s i v e PWM  22.  P r o t o t y p e PWM  Waveform Generator - Part  1  77  23.  P r o t o t y p e PWM  Waveform Generator - Part 2  78  P u l l Out  f o r Harmonics  Waveform Generator Waveform Generator  Counter/Timer Output Waveforms Waveform Generator  vi  70 71 74  24.  Inverter Controller Architecture  85  25.  Microcomputer  93  26.  Philips  27.  D i g i t a l l y C o n t r o l l e d Frequency S y n t h e s i z e r  104  28.  Programmable Frequency S y n t h e s i z e r  107  29.  G e n e r a l Block  S e c t i o n of I n v e r t e r C o n t r o l l e r  HEF4752V Inputs and Outputs  97  Diagram of Am9513 Counter/Timer  IC  108  30.  Remainder of I n v e r t e r C o n t r o l l e r C i r c u i t  113  31.  Memory and I/O Map  115  32.  I n v e r t e r C o n t r o l l e r C i r c u i t Board Layout  116  33.  S t a t e T r a n s i t i o n Diagram  123  34.  E r r o r s i n C o n t r o l Flow  124  35.  F i n i t e S t a t e Machine Model of I n v e r t e r Controller  126  36.  Submersible T h r u s t e r  142  37.  Motor L i n e Current  144  38.  S i m p l i f i e d Schematic of LIM I n v e r t e r  147  for Inverter Controller  Drive  vii  Acknowledgements  I wish t o thank Dr. M.R. I t o f o r h i s a d v i c e thesis.  and comments on t h i s  Thanks a r e a l s o due to Dr. L.M. Wedepohl f o r h i s  s u p e r v i s i o n of the B.C. Science of the work d e s c r i b e d  Council  grants  under which much  i n t h i s t h e s i s was performed.  My  colleague  Frank Peabody made many u s e f u l s u g g e s t i o n s and was a great  help  i n the c o n s t r u c t i o n and t e s t i n g of the i n v e r t e r c o n t r o l l e r .  My work on t h i s p r o j e c t has r e c e i v e d f i n a n c i a l support from the Transportation Engineering  Development Agency, the N a t i o n a l  Science and  Research C o u n c i l , and the B.C. Science  v i i i  Council.  Chapter 1 Introduction  V a r i a b l e speed d r i v e s u s i n g AC i n d u c t i o n motors i n c r e a s i n g use i n a v a r i e t y of a p p l i c a t i o n s . of energy and t h e move t o i n c r e a s e d  are finding  The i n c r e a s e d  automation has l e d to the  i n s t a l l a t i o n of v a r i a b l e speed AC d r i v e s i n systems p r e v i o u s l y used f i x e d speed motors c o n t r o l l i n g output.  cost  which  and mechanical means o f  At the same time the d e c l i n e i n the c o s t of  the e l e c t r o n i c s i n AC d r i v e s has made them c o m p e t i t i v e w i t h DC d r i v e s i n many of the a p p l i c a t i o n s where v a r i a b l e speed  motors  have t r a d i t i o n a l l y been used.  AC d r i v e s have s e v e r a l advantages  over DC d r i v e s .  An AC  i n d u c t i o n motor i s t y p i c a l l y s m a l l e r , l i g h t e r , and cheaper than a DC motor of the same power r a t i n g .  The maximum speed of an AC  i n d u c t i o n motor i s not l i m i t e d by the commutation e x p e r i e n c e d by a DC motor.  I t i s t h e r e f o r e p o s s i b l e to d e s i g n  h i g h speed AC i n d u c t i o n motors weight r a t i o . the maintenance  problems  t h a t have a v e r y h i g h power to  The absence of a commutator and brushes reduces required  f o r an AC d r i v e and a l l o w s i t t o be  used i n environments where a DC d r i v e can't be used.  While AC v a r i a b l e speed d r i v e s based on s t a t o r v o l t a g e s l i p energy r e c o v e r y , o r c y c l o c o n v e r t e r s majority  a r e a v a i l a b l e [ 1 ] , the  of AC d r i v e s a r e based on v a r i a b l e frequency  1  control,  operation  w i t h a t h r e e phase i n v e r t e r .  The three phase i n v e r t e r a c c e p t s  standard f i x e d frequency, f i x e d v o l t a g e  power from the u t i l i t y  l i n e and c o n v e r t s i t to v a r i a b l e frequency, v a r i a b l e  voltage  power which i s f e d to the AC motor.  INVERTER CONTROL SECTION  Figure  An I n v e r t e r processing  1  Block Diagram of T y p i c a l AC D r i v e System  system can be d i v i d e d  s e c t i o n and a c o n t r o l s e c t i o n , as shown i n F i g u r e  A t y p i c a l power p r o c e s s i n g that  c o n v e r t s the i n p u t  of power s w i t c h i n g  section consists  devices that  rectifier  s w i t c h the DC bus on to the t h r e e The s w i t c h i n g  been s i l i c o n c o n t r o l l e d r e c t i f i e r s  d e v i c e s have u s u a l l y  (SCRs) but power t r a n s i s t o r s  power MOSFETs a r e i n c r e a s i n g l y used.  controls  of an i n p u t  1.  power to DC on an i n t e r n a l bus and a s e t  output l i n e s of the i n v e r t e r .  and  i n t o two s e c t i o n s , a power  The c o n t r o l  section  the opening and c l o s i n g of the e l e c t r o n i c switches i n  2  o r d e r to produce the a p p r o p r i a t e lines.  AC  waveforms on the  In a d d i t i o n , i t performs n e c e s s a r y sequencing  supervisory  functions  control panel. analog and  The  and  c o n t r o l l e r s e c t i o n has  medium s c a l e d i g i t a l  microcomputers are now  1.1  Inverters  accepts c o n t r o l inputs  f o r AC  output and  from the  system  been based on a mix  integrated  circuits.  of  However,  being used i n some i n v e r t e r c o n t r o l l e r s .  Motivation  f o r Thesis  Project  d r i v e s are n o r m a l l y packaged and  s o l d f o r use  in  standard i n d u s t r i a l environments w i t h standard s q u i r r e l cage i n d u c t i o n motors.  S p e c i a l i z e d a p p l i c a t i o n s r e q u i r i n g unusual  packaging or unusual output v o l t a g e s  and  frequencies  i n most  cases r e q u i r e an i n v e r t e r system t h a t i s custom d e s i g n e d . example, I n t e r n a t i o n a l had  a need f o r AC  Submarine E n g i n e e r i n g  drives  to power the  s u b m e r s i b l e s produced by  the company.  commercially a v a i l a b l e .  As a r e s u l t , the  of Port Moody,  The up  d r i v e had to 1000  S u i t a b l e d r i v e s were not Science Council  d r i v e s were r e q u i r e d required  t h a t compact, h i g h the  of  B.C.  the Department of  [2,3].  to be packaged to w i t h s t a n d submersion to depths of  meters and  i n v e r t e r was  at UBC  B.C.  t h r u s t e r s on unmanned  funded the development of a s u i t a b l e d r i v e by E l e c t r i c a l Engineering  For  yet i t a l s o had on a r e l a t i v e l y  to be compact s i n c e small  to s u p p l y f r e q u e n c i e s  submersible. of up  speed t h r u s t e r motors c o u l d  i n v e r t e r c o n t r o l l e r had  to 400  be used.  four The Hz  so  Finally,  to be f l e x i b l e enough to accomodate  3  changes i n the c o n t r o l s t r a t e g y due to p o s s i b l e changes i n e i t h e r the power c o n v e r s i o n system  s e c t i o n design  or the submersible c o n t r o l  design.  1.2 Scope and O b j e c t i v e s  This thesis discusses  the d e s i g n  of T h e s i s  Project  of the i n v e r t e r c o n t r o l l e r f o r  the s u b m e r s i b l e t h r u s t e r d r i v e developed a t UBC.  The  requirements f o r t h i s c o n t r o l l e r ( s m a l l s i z e , wide range, f l e x i b i l i t y serve  design  frequency  i n c o n t r o l s t r a t e g y ) were such that i t c o u l d  as the b a s i s f o r an i n v e r t e r c o n t r o l l e r a p p l i c a b l e to a  v a r i e t y of f u t u r e a p p l i c a t i o n s . o b j e c t i v e s of the d e s i g n flexibility  was  Therefore,  to a l l o w  one of the primary  the maximum amount of  i n a p p l i c a t i o n wherever t h i s d i d not c o n f l i c t  with  the other o b j e c t i v e s t h a t the c o n t r o l l e r be compact and that i t be p r a c t i c a l to manufacture i n terms of c o s t and a v a i l a b i l i t y of components.  The b a s i c d e s i g n the  o b j e c t i v e s s e t f o r the i n v e r t e r c o n t r o l l e r were  following:  The c o n t r o l l e r should  i.  c o n t r o l p u l s e - w i d t h modulated i n v e r t e r s u s i n g t r a n s i s t o r s , power MOSFETs, or t h y r i s t o r s as switches;  4  ii.  o p e r a t e over an i n v e r t e r frequency range of 3 Hz to 400  iii.  Hz;  perform as many f u n c t i o n s as p o s s i b l e by means of computer software w r i t t e n i n a h i g h - l e v e l programming  language;  i v . handle common open-loop  and c l o s e d - l o o p motor c o n t r o l  strategies;  v. occupy l e s s than 200 cm  of p r i n t e d c i r c u i t  v i . c o s t l e s s than $200 i n p a r t s and  The  i n v e r t e r c o n t r o l l e r designed  direct  board;  labor.  to meet the above o b j e c t i v e s  has  s e v e r a l advantages over i n v e r t e r c o n t r o l l e r s d e s c r i b e d i n the l i t e r a t u r e or i n c o r p o r a t e d i n commercially a v a i l a b l e AC  drives.  Very few c o n t r o l l e r s f o r p u l s e width modulated i n v e r t e r s have been d e s c r i b e d i n the l i t e r a t u r e operate above an frequency of 250 Hz.  There do not appear to be any  that  output  commercially  a v a i l a b l e p u l s e w i d t h modulated i n v e r t e r s t h a t operate above Hz.  Yet the advent  250  of f a s t power t r a n s i s t o r s and power MOSFETs  a l l o w s the d e s i g n of p r a c t i c a l p u l s e width modulated o p e r a t i n g to 400 Hz and beyond.  inverters  O p e r a t i o n a t these h i g h  f r e q u e n c i e s has advantages i n many a p p l i c a t i o n s .  Many i n v e r t e r c o n t r o l l e r designs presented i n the l i t e r a t u r e a r e  5  based on microcomputers and flexibility  c l a i m to have  in application.  considerable  However, a l l of them appear to  be  programmed i n assembly language, which s u b s t a n t i a l l y i n c r e a s e s the c o s t of software development f o r a new  application.  In  a d d i t i o n , many seem to have been designed o n l y f o r l a b o r a t o r y and  are u n s u i t a b l e  c o m p l e x i t y , and  f o r i n d u s t r i a l use  size.  s i z e c o n s t r a i n t s imposed by  l a c k the k i n d of f l e x i b i l i t y  e a s i l y reconfigured  f o r a new  t h a t would a l l o w  application.  r e s u l t i n g from the o b j e c t i v e s l i s t e d I t r e t a i n s the  cost,  C o n t r o l l e r s i n commercially a v a i l a b l e  u n i t s meet the c o s t and but  i n terms of  flexibility  The  the market  them to  above, takes a middle path.  of h a v i n g f u n c t i o n s performed adds the advantages of h i g h  language programming.  by  But,  between hardware and  1.3  In order  s o f t w a r e , and  and  level  by u s i n g  the minimum size  system.  Outline  to s e t the d e s i g n  by  j u d i c i o u s p a r t i t i o n i n g of  number of components, i t manages to meet the c o s t and requirements f o r a p r a c t i c a l  be  c o n t r o l l e r design  microcomputer s o f t w a r e , and  functions  use  of  Thesis  of the i n v e r t e r c o n t r o l l e r i n  to e x p l a i n some of the s p e c i a l i z e d v o c a b u l a r y and  Chapter 2 i s devoted to a review of AC  concepts,  drive technology.  three main types of i n v e r t e r s are b r i e f l y d e s c r i b e d  context,  and  The the  c h a r a c t e r i s t i c s of the semiconductor power switches used i n i n v e r t e r s are d i s c u s s e d .  Then o p e r a t i o n  of AC  from a v a r i a b l e frequency source i s d i s c u s s e d  6  i n d u c t i o n motors to p r o v i d e  some  i n s i g h t i n t o the c o n t r o l a s p e c t s of AC d r i v e s .  F i n a l l y , the  e f f e c t s of the n o n - s i n u s o i d a l i n v e r t e r waveforms on motor o p e r a t i o n a r e d i s c u s s e d along w i t h techniques f o r r e d u c i n g  these  effects.  A detailed discussion  of the d e s i g n requirements f o r the i n v e r t e r  c o n t r o l l e r and the p o s s i b l e Chapter 3.  This  design tradeoffs  i s presented i n  i s f o l l o w e d by c o n s i d e r a t i o n  of the a l t e r n a t i v e  methods of implementing the c o n t r o l l e r f u n c t i o n s presentation  of the b a s i c  architecture  Chapter 4 d e s c r i b e s the c i r c u i t in detail.  of the c o n t r o l l e r .  d e s i g n of the i n v e r t e r  controller  Chapter 5 d i s c u s s e s the software d e s i g n of the  c o n t r o l l e r and p r e s e n t s an e v a l u a t i o n l e v e l language programming  Two a p p l i c a t i o n s Chapter 6.  and by  the c o n t r o l l e r .  application.  of the i n v e r t e r c o n t r o l l e r a r e d e s c r i b e d  The f i r s t  d r i v e which was  i n this  of the success of h i g h  a p p l i c a t i o n i s the submersible  in  thruster  the o r i g i n a l m o t i v a t i o n f o r the development of The second a p p l i c a t i o n i s a d r i v e f o r an  experimental l i n e a r induction  motor.  c o n t r o l l e r i n these two a p p l i c a t i o n s  The success of the i n v e r t e r i s evaluated.  Chapter 7 ends the t h e s i s and s u p p l i e s  some c o n c l u s i o n s on the  success of the i n v e r t e r c o n t r o l l e r d e s i g n .  Some s u g g e s t i o n s  f o r improvements i n the d e s i g n and f o r f u t u r e work with the i n v e r t e r c o n t r o l l e r are also  presented.  7  Figure  2  Inverter Controller  1.4  Summary  The end product of t h i s t h e s i s p r o j e c t i s shown i n F i g u r e  2. The  i n v e r t e r c o n t r o l l e r i s housed on a s i n g l e p r i n t e d c i r c u i t board a p p r o x i m a t e l y 7.5 cm by 21.5 cm.  The s m a l l s i z e i s made p o s s i b l e  by t h e use of l a r g e s c a l e i n t e g r a t e d c i r c u i t s . F l e x i b i l i t y i n a v a r i e t y o f a p p l i c a t i o n s i s a c h i e v e d by u s i n g a microcomputer as the h e a r t of t h e c o n t r o l l e r . new a p p l i c a t i o n s i m p l y  The c o n t r o l l e r can be adapted t o a  by changing the microcomputer's  The program i s w r i t t e n i n t h e C programming  language w h i c h  s u b s t a n t i a l l y reduces the program development substantially increases  program.  time and  t h e a b i l i t y t o m o d i f y and m a i n t a i n t h e  program when compared to w r i t i n g programs i n assembly l a n g u a g e .  8  The  i n v e r t e r c o n t r o l l e r meets or exceeds i t s o r i g i n a l d e s i g n  objectives.  In comparison to other i n v e r t e r c o n t r o l l e r s  have been d e s c r i b e d ,  t h i s c o n t r o l l e r i s unique i n i t s combination  of good performance and and  small  size.  that  broad range of a p p l i c a t i o n w i t h low  In a d d i t i o n  i t i s the  modulated i n v e r t e r c o n t r o l l e r s t h a t  one  of the few  p u l s e width  operates beyond 250  Hz.  makes i t u s e f u l i n a p p l i c a t i o n s where h i g h frequency motors t r a n s f o r m e r s are used to reduce s i z e and  This and  c o n t r o l l e r has i n an  been used i n the  p r o t o t y p e submersible  probable t h a t both of these a p p l i c a t i o n s w i l l end Further a p p l i c a t i o n s  of the  planned.  9  This or  weight.  i n v e r t e r f o r a l i n e a r i n d u c t i o n motor d r i v e .  production.  cost  up  drive  It i s  in  c o n t r o l l e r are  being  Chapter  2  Review of V a r i a b l e Frequency AC D r i v e  Technology  V a r i a b l e frequency AC motor d r i v e s were made p r a c t i c a l by i n v e n t i o n of the s i l i c o n c o n t r o l l e d r e c t i f i e r l a t e 1950's. significantly.  the  ( t h y r i s t o r ) i n the  Since t h a t time, AC d r i v e technology has  progressed  The d e s i g n of the i n v e r t e r c o n t r o l l e r i s based  these developments i n AC d r i v e t e c h n o l o g y .  on  This chapter presents  a review of some a s p e c t s of t h i s technology i n o r d e r to p r o v i d e some context f o r the d e s i g n of the i n v e r t e r c o n t r o l l e r and i n t r o d u c e concepts and t e r m i n o l o g y which w i l l be used  to  in later  chapters.  2.1  C l a s s i f i c a t i o n of I n v e r t e r D r i v e s  The  b a s i c t h r e e phase i n v e r t e r b r i d g e c i r c u i t  3. A s e t of symmetrical  i s shown i n F i g u r e  t h r e e phase waveforms can be generated  o p e r a t i n g the switches i n the sequence shown i n F i g u r e 4. v a r y i n g the s w i t c h i n g r a t e , the output frequency of the can be v a r i e d .  inverter  to v a r y  output v o l t a g e p r o v i d e s a convenient means f o r c l a s s i f y i n g  In  By  In motor d r i v e a p p l i c a t i o n s the output v o l t a g e of  the i n v e r t e r must a l s o be v a r i e d . The method used  different  by  the the  types of i n v e r t e r motor d r i v e s .  the V a r i a b l e V o l t a g e Input I n v e r t e r ( F i g u r e 5-1), the v o l t a g e  10  • o Figure S2  S1  S3  3  Basic Inverter Bridge C i r c u i t  DC  V  THREE  s<  PHASE  V  S5  V  S6  INVERTER Switches Conducting  Figure  4  Inverter Switching Sequence  11  DC'  Chopper Variable Voltage DC Bus  30 AC-  Phase Controlled Rectifier 1) VARIABLE  DC-  Inverter  Varjable Voltage  Variable Frequency Square Waves  VOLTAGE INPUT INVERTER  Chopper —Variable Current  3 0 AC'  Variable Current  Phase Controlled Rectifier  Variable Frequency Square Waves  2 ) CURRENT SOURCE INVERTER DC-  3 0 AC-  Fixed Voltage DC Bus Rectifier  PWM Inverter  JL  3) PULSE WIDTH MODULATED INVERTER  Figure  5  Basic  Inverter  12  Types  Variable Voltage  Variable Frequency Pulse Width Modulated Waveforms  on the DC bus f e e d i n g vary  the i n v e r t e r bridge  the output v o l t a g e .  the v o l t a g e  i s v a r i e d i n order t o  Depending on the nature of the power  source,  c o n t r o l can be performed by a phase c o n t r o l l e d r e c t i f i e r  or by a chopper.  Since  the output of the i n v e r t e r c o n s i s t s of  v a r i a b l e amplitude square waves w i t h  a six-step pattern, this  type  of i n v e r t e r i s a l s o c a l l e d a " s i x - s t e p " or "square wave" i n v e r t e r .  The  Current  Source I n v e r t e r ( F i g u r e 5-2) d i f f e r s  V a r i a b l e Voltage  from the  Input I n v e r t e r i n t h a t the DC bus i s designed t o  a c t as a c u r r e n t source r a t h e r than a v o l t a g e  source.  The phase  c o n t r o l l e d r e c t i f i e r o r chopper a t the i n p u t r e g u l a t e s current  r a t h e r than the bus v o l t a g e .  the bus  The output of the i n v e r t e r  c o n s i s t s of square waves of c u r r e n t r a t h e r than square waves of voltage.  The  Current  Source I n v e r t e r i s a t t r a c t i v e when the  i n v e r t e r uses t h y r i s t o r s as s w i t c h i n g commutation c i r c u i t s a r e simple can be used  circuitry.  allows  When the machine i s a c t i n g as a g e n e r a t o r ,  i s adjusted  reversed.  Source I n v e r t e r  of energy back to the AC l i n e w i t h no e x t r a  inverter switching voltage  and r e l a t i v e l y slow t h y r i s t o r s  [ 4 ] . A l s o the C u r r e n t  regeneration  elements s i n c e the  sequence w i t h  to the machine  terminal  so t h a t the v o l t a g e on the DC bus i s  The f i r i n g  then r e t a r d e d  respect  the  angle of the phase c o n t r o l l e d r e c t i f i e r i s  so t h a t power flows  from the DC bus back i n t o the  AC source i n the same f a s h i o n as a f o u r quadrant DC d r i v e . The  Current  Source d r i v e i s not normally  13  used with t r a n s i s t o r  or power MOSFET based  i n v e r t e r s s i n c e commutation and d e v i c e  s w i t c h i n g speed do n o t pose any problems.  Time  Figure 6  PWM  I n v e r t e r Output  The P u l s e Width Modulated  V o l t a g e Waveform  (PWM) I n v e r t e r ( F i g u r e 5-3)  from a f i x e d v o l t a g e DC bus.  operates  The output v o l t a g e i s c o n t r o l l e d by  t u r n i n g the switches on and o f f many times w i t h i n a h a l f c y c l e of the output wave as shown i n F i g u r e 6.  By v a r y i n g the r a t i o of on  time to o f f time, the output v o l t a g e can be v a r i e d . T h i s v a r i a t i o n i n the duty c y c l e can a l s o be used to c o n t r o l the harmonic c o n t e n t of the output waveform. The PWM i n v e r t e r has the advantages  t h a t i t has a v e r y simple i n p u t power c o n v e r s i o n  s e c t i o n , i f any i s r e q u i r e d a t a l l ,  and i t can change v o l t a g e  r a p i d l y s i n c e the time c o n s t a n t of the DC bus f i l t e r does n o t  14  affect  the speed of response.  power f a c t o r to the AC r e c t i f i e r i s not require fast  A PWM  i n v e r t e r presents  a  high  power source s i n c e a phase c o n t r o l l e d  r e q u i r e d a t the i n p u t .  switches which e x h i b i t low  The  PWM  switching  i n v e r t e r does losses  t h e r e f o r e i s b e t t e r s u i t e d to use w i t h t r a n s i s t o r s and  and  power  MOSFETs than w i t h SCRs.  The  design  of the c o n t r o l l e r i s s t r o n g l y i n f l u e n c e d by  of d r i v e .  In the V a r i a b l e Input V o l t a g e and  inverters,  the i n v e r t e r s w i t c h i n g  c o n t r o l l e d by  voltage  i n v e r t e r switching  converter  The  i n p u t power c o n v e r t e r s  The  PWM  i n v e r t e r has  p a t t e r n and  to  therefore  by  these bus  a much more complex r e q u i r e s a more complex  required.  I n v e r t e r Power Switching  The  power switches used i n i n v e r t e r s intended  is s t i l l  be  a s e p a r a t e c o n t r o l l e r f o r the input power  i s not  Devices  s t a t e semiconductor d e v i c e s .  t h y r i s t o r has  can  to produce the d e s i r e d DC  2.2  are s o l i d  Source  sequence i s simple and  c o n t r o l l e d i n order  or c u r r e n t .  c o n t r o l l e r but  type  something as simple as an up/down counter d r i v e n  a v a r i a b l e frequency c l o c k . d r i v e s must be  Current  the  f o r motor d r i v e s  In the p a s t ,  been the most commonly used s w i t c h i n g  used e x t e n s i v e l y  can  be  but  i t can only be  i n higher  switched on by a low turned  power d r i v e s .  power p u l s e  o f f by  through i t f o r a c e r t a i n p e r i o d .  the device  and i t  The t h y r i s t o r  i n t o i t s gate  terminal  i n t e r r u p t i n g the c u r r e n t  flow  In i n d u c t i o n machine d r i v e s ,  15  t h i s i n t e r r u p t i o n of c u r r e n t flow, c a l l e d commutation, does not occur  n a t u r a l l y as i t does i n phase c o n t r o l l e d r e c t i f i e r s .  As  r e s u l t , the i n v e r t e r c i r c u i t must i n c l u d e some means to f o r c e current  f l o w i n g through the t h y r i s t o r to zero  t h y r i s t o r commutates. considerably  to the complexity  commutation can be as l o n g as  direction.  conducting  100 microseconds which p l a c e s  voltage  frequency of the i n v e r t e r .  i n both d i r e c t i o n s when i t i s  Assymetrical  v o l t a g e b l o c k i n g c a p a b i l i t y i n one  d e v i c e , can be beginning  reverse  improved.  direction.  Inverters using  T h i s d e v i c e can be  gate c u r r e n t .  somewhat and  other  the  these newer d e v i c e s  are  t h y r i s t o r i s the gate t u r n o f f  turned  This s i m p l i f i e s  e l i m i n a t e s bulky  o f f by a p p l y i n g a l a r g e the d e s i g n  of the i n v e r t e r  f o r c e d commutation components.  Again, i n v e r t e r s u s i n g gate t u r n o f f t h y r i s t o r s as switches  In low  no  to appear on the market.  thyristor.  appearing  or  As a r e s u l t ,  the time r e q u i r e d to commutate  Another v a r i a t i o n on the standard  reverse  t h y r i s t o r s and  blocking i n  t h y r i s t o r s have been designed which have l i t t l e  parameters, p a r t i c u l a r l y  In  complete  However most i n v e r t e r c i r c u i t s r e q u i r e v o l t a g e  o n l y one  add  of t h y r i s t o r based i n v e r t e r s .  l i m i t a t i o n s on the maximum s w i t c h i n g  A normal t h y r i s t o r b l o c k s  the  the  These f o r c e d commutation c i r c u i t s  a d d i t i o n , the p e r i o d of time r e q u i r e d f o r the  off.  so t h a t  a  are  on the market.  to medium power a p p l i c a t i o n s , the b i p o l a r power t r a n s i s t o r  16  i s b e g i n i n g to s u p p l a n t the switch.  Transistors  amperes are up  to 150  now  which can  available  kilowatts  can  p a r a l l e l d e v i c e s . The controlled external  by  so  b l o c k 1000  inverters  s w i t c h i n g of  current applied  the  conduct with need  to  Transistors  better  suited  no switch  to  frequencies.  power MOSFETs are  power s w i t c h i n g d e v i c e s . very l i t t l e  sometimes  These d e v i c e s are v e r y easy  gate power.  They  also  have v e r y h i g h s w i t c h i n g speeds which makes them s u i t a b l e i n h i g h frequency i n v e r t e r s . expensive so  Power MOSFETs are  their application  to e x p e r i m e n t a l systems and  characteristics.  The  the  inverter  i n motor d r i v e s  still  for  i s presently  limited  c o n t r o l l e r must take i n t o account  type of power s w i t c h i n g d e v i c e s used.  use  relatively  to s p e c i a l purpose systems which  their special  d e s i g n of  300  ratings  base, t h e r e f o r e  required.  than t h y r i s t o r s so they are  to c o n t r o l , r e q u i r i n g  v o l t s and  power  t r a n s i s t o r i s completely  to the  which have h i g h s w i t c h i n g  the  inverter  be manufactured without the  power l e v e l s below 5 k i l o w a t t s ,  used as  the  transistorized drives  commutation c i r c u i t s are  more q u i c k l y  At  the  t h y r i s t o r as  require  the  A c o n t r o l l e r f o r an  \  i n v e r t e r u s i n g t h y r i s t o r s must p r o p e r l y sequence the  firing  the main t h y r i s t o r s and  forced  commutation  i n o r d e r to ensure proper commutation of the  thyristors.  circuit  the  t h y r i s t o r s i n the  I n v e r t e r s based on power t r a n s i s t o r s are the  c o n t r o l l e r must a l l o w f o r the  easier  to c o n t r o l  s w i t c h i n g time of  17  the  of  but  transistors.  In l a r g e power t r a n s i s t o r s  20 microseconds  between the time that base c u r r e n t i s removed  from the d e v i c e and zero.  t h e r e can be as much as  the time t h a t c o l l e c t o r c u r r e n t f a l l s to  I f a t r a n s i s t o r i n one l e g of an i n v e r t e r i s turned on  b e f o r e the o t h e r t r a n s i s t o r i n the same l e g i s c o m p l e t e l y o f f , a short c i r c u i t  w i l l occur a c r o s s the DC bus and  potentially  damaging "shoot through" c u r r e n t s w i l l f l o w through the  two  transistors.  Power MOSFETs are the e a s i e s t of the t h r e e types of d e v i c e s to c o n t r o l s i n c e they r e q u i r e v e r y l i t t l e extremely f a s t . ideal  d r i v e power and  switch  The c o n t r o l l e r can t r e a t them p r e t t y much as  switches.  2.3  V a r i a b l e Frequency O p e r a t i o n of I n d u c t i o n Motors  The  t h r e e phase i n d u c t i o n motor o p e r a t i n g from a f i x e d  v o l t a g e source has F i g u r e 7.  the f a m i l i a r torque-speed  frequency  curve shown i n  I f the source frequency i s v a r i e d and the motor a i r g a p  f l u x i s kept c o n s t a n t , the torque-speed  curve remains the same  except t h a t i t i s t r a n s l a t e d to the l e f t o r r i g h t . torque/speed  If  curves a r e p l o t t e d f o r a range of f r e q u e n c i e s , a  f a m i l y of curves as shown i n F i g u r e 8 r e s u l t s .  These curves show  that v a r i a b l e speed o p e r a t i o n i s p o s s i b l e w i t h the i n d u c t i o n machine r e t a i n i n g b a s i c a l l y the same p r o p e r t i e s t h a t i t has when it  i s running w i t h low s l i p at 50 or 60  18  Hz.  Figure  7  Induction  Machine Torque-Speed  Curve  + Torque Reverse Regeneration  Forward Motoring  -Speed-  +Speed  Reverse Motoring  Forward Regeneration  vvvvvvv Torque  Figure  8  Torque-Speed Curves a t Stator Frequencies 19  Different  Rs  Ls  —nmn. t Vim  Rc  Ilm,r  Figure 9  Standard E q u i v a l e n t C i r c u i t f o r the I n d u c t i o n Machine  I n f a c t , the torque produced by the i n d u c t i o n machine does not fundamentally equation source  depend on the s t a t o r frequency  (w ). e  The  torque  f o r t h e i n d u c t i o n machine o p e r a t i n g from a v o l t a g e  can be developed from the s t a n d a r d  equivalent c i r c u i t f o r  the i n d u c t i o n machine ( F i g u r e 9 ) :  (1) Rotor i n p u t power = I r R r / s 2  (2) E l e c t r o m a g n e t i c (3) I r =  torque = Te = Rotor i n p u t power/w V  2  ((w Lr) e  <> 4  l Lml = V  w  e  2 L m  2  +  (Rr/s) ) 2  I m I i n  (5) A i r g a p F l u x = 0 = ImLm  20  e  [5]  <> 6  s  =  w  slip  (7) Te =  2  2  +  slip  (Rr/W  ) ) 2  s l i p  i s s m a l l ( t h e normal o p e r a t i n g c o n d i t i o n ) ,  g  and  e  0 Rr/w (Lr  When w ^^p  / w  the machine torque (8) Te = 0 w  on the s t a t o r  r  /  W s  iip  »  s l i p  /Rr  depends on s l i p frequency  and a i r g a p f l u x but not  frequency.  C o n t r o l schemes f o r i n d u c t i o n motor d r i v e s attempt to c o n t r o l the machine a i r g a p f l u x o r the s l i p torque.  frequency  i n order t o c o n t r o l  Most d r i v e s used i n i n d u s t r i a l a p p l i c a t i o n s use a simple  open loop c o n t r o l s t r a t e g y c a l l e d constant  volts/Hz c o n t r o l .  If  the s t a t o r impedance i s i g n o r e d , a i r g a p f l u x i s p r o p o r t i o n a l t o the s t a t o r v o l t a g e d i v i d e d by the s t a t o r frequency. approximate constant maintaining constant.  Thus  a i r g a p f l u x o p e r a t i o n can be maintained  the r a t i o of s t a t o r v o l t a g e to s t a t o r  by  frequency  The v a l u e of the r a t i o i s u s u a l l y s e t t o the nominal  s t a t o r v o l t a g e ( e . g . 440 v o l t s ) d i v i d e d by the normal o p e r a t i n g frequency  ( e . g . 60 H z ) .  At low s t a t o r f r e q u e n c i e s the v o l t a g e  drop a c r o s s the s t a t o r r e s i s t a n c e becomes an important reduces the a i r g a p f l u x l e v e l i f constant maintained.  A boost  L  can be approximated a s :  2  Thus the torque  R  f a c t o r and  stator volts/Hz i s  i n the v o l t s / H z r a t i o i s sometimes added a t  low f r e q u e n c i e s to compensate f o r the s t a t o r r e s i s t a n c e drop. However, the magnitude of the s t a t o r v o l t a g e drop depends on the s t a t o r c u r r e n t so a f i x e d boost  i n v o l t s / H z r a t i o w i l l not  21  r  compensate f o r a l l l o a d  conditions.  Most i n v e r t e r s have a maximum output v o l t a g e determined i n v e r t e r supply v o l t a g e .  by the  Once t h i s maximum v o l t a g e i s reached i n  c o n s t a n t v o l t s / H z o p e r a t i o n , any f u r t h e r i n c r e a s e i n frequency will  result  i n the a i r g a p f l u x d e c r e a s i n g l i n e a r l y w i t h  i n c r e a s i n g frequency.  As a r e s u l t  the peak torque c a p a b i l i t y of  the machine w i l l drop o f f a t a r a t e p r o p o r t i o n a l to the square of the f r e q u e n c y .  The torque envelope  f o r the i n d u c t i o n machine  o p e r a t i n g under c o n s t a n t v o l t s / H z c o n t r o l i s shown i n F i g u r e 10. P e r Unit Torque U)  -i.o  Figure  10 Torque Envelope  f o r Constant V o l t s / H z O p e r a t i o n  As l o n g as the l o a d torque of the machine i s w i t h i n  this  envelope, the speed w i l l be r e l a t i v e l y i n s e n s i t i v e t o l o a d v a r i a t i o n s s i n c e the machine torque/speed  22  torque  curve i s q u i t e steep  when o p e r a t i n g at low s l i p f r e q u e n c i e s . c h a r a c t e r i s t i c s thus resemble those  The machine  of a DC shunt wound machine.  Constant v o l t s / H z o p e r a t i o n i s only an a p p r o x i m a t i o n to true constant  a i r g a p f l u x o p e r a t i o n s i n c e the e f f e c t s of the s t a t o r  impedance a r e i g n o r e d .  True constant  airgap f l u x  operation  o f f e r s improvements i n both s t a t i c and dynamic performance over simple  constant  determining  volts/Hz operation  [6].  the a i r g a p f l u x i s r e q u i r e d .  using H a l l - e f f e c t  devices  However some means of Direct  [7] or f l u x sensing  measurement  coils  [8] i n s t a l l e d  i n the machine i s p o s s i b l e but depends on the a v a i l a b i l i t y of machines w i t h  these  sensors  i n s t a l l e d . D i r e c t c a l c u l a t i o n of the  a i r g a p f l u x u s i n g t e r m i n a l v o l t a g e s and c u r r e n t s and the parameters of the machine's e q u i v a l e n t c i r c u i t has a l s o been d e s c r i b e d i n the l i t e r a t u r e  [9].  This technique  does not r e q u i r e  s p e c i a l machines but does r e q u i r e v o l t a g e and c u r r e n t feedback as w e l l as a p r i o r i knowledge of the machine's parameters. the i n c r e a s e d complexity  Due to  of t r u e f l u x c o n t r o l and the r e l a t i v e l y  modest requirements of most i n d u s t r i a l v a r i a b l e speed d r i v e s , the constant  volts/Hz drive i s s t i l l  the most commonly used AC d r i v e .  AC d r i v e systems which r e l y on the c o n t r o l of motor frequency  have a l s o been designed  frequency  d r i v e , the s t a t o r frequency  d e s i r e d s l i p frequency  slip  [ 1 0 ] . In the c o n t r o l l e d s l i p i s determined by adding the  to the motor mechanical frequency  measured by a tachometer.  Two methods of torque  commonly used i n c o n t r o l l e d s l i p d r i v e s .  23  which i s  c o n t r o l are  In the f i r s t  technique,  the a i r g a p f l u x i s m a i n t a i n e d a p p r o x i m a t e l y c o n s t a n t through c o n s t a n t v o l t s / H z o p e r a t i o n and torque i s c o n t r o l l e d by v a r y i n g the s l i p  frequency.  A l t e r n a t i v e l y , the s l i p frequency i s  m a i n t a i n e d a t a f i x e d v a l u e and the torque i s c o n t r o l l e d by v a r y i n g the s t a t o r v o l t a g e which i n t u r n v a r i e s the a i r g a p f l u x . The c o n t r o l l e d s l i p motor b a s i c a l l y  d r i v e has poor speed r e g u l a t i o n s i n c e t h e  i n c r e a s e s i t s speed u n t i l  the l o a d torque matches  the machine torque but i t has f a i r l y good torque characteristics slip  regulation  s i n c e torque can be d i r e c t l y c o n t r o l l e d by the  frequency o r s t a t o r v o l t a g e . As a r e s u l t the s l i p  controlled  d r i v e has been used i n t r a c t i o n a p p l i c a t i o n s such as e l e c t r i c vehicles  [11] and t h e Canadian Advanced L i g h t Rapid  Transit  System [12] where torque c o n t r o l r a t h e r than speed c o n t r o l i s desired.  The s l i p  frequency c o n t r o l l e d d r i v e requires s l i p  feedback  from the motor.  Normally a tachometer  frequency  i s used t o  measure the r o t o r speed which p r o v i d e s an i n d i r e c t measure of slip  frequency.  However, s i n c e s l i p  frequency i s the s m a l l  d i f f e r e n c e between the r o t o r r o t a t i o n a l frequency and the s t a t o r frequency, a very a c c u r a t e tachometer tachometers  add s i g n i f i c a n t l y  make the system l e s s rugged. lower c o s t tachometers  i s required.  to the cost of the d r i v e system and Attempts  have been made to use  [13] o r to c a l c u l a t e the s l i p  from machine t e r m i n a l v o l t a g e s and c u r r e n t s  The c o n t r o l l e d s l i p  These  directly  [14].  d r i v e i s i n h e r e n t l y p r o t e c t e d a g a i n s t the  p o s s i b i l i t y of " p u l l out" causes the  slip  i n which an i n c r e a s e  frequency to i n c r e a s e  maximum torque' ( p u l l out  t o r q u e ) and  i n load  beyond the p o i n t enter  11  Torque/Speed Curve Showing P u l l  O p e r a t i o n on the p o s i t i v e l y sloped  p o r t i o n of the  curve i s c h a r a c t e r i z e d by poor e f f i c i e n c y and s t a t o r c u r r e n t s , and with s l i p  adjustable  poor speed r e g u l a t i o n .  Most open loop constant  a c c e l e r a t i o n and  Out  torque/speed  power f a c t o r , h i g h Drives  not  volts/Hz  equipped in a  d r i v e s have  d e c e l e r a t i o n r a t e s so t h a t  25  sloped  11.  frequency c o n t r o l attempt to prevent p u l l out  v a r i e t y of ways.  for  the p o s i t i v e l y  p o r t i o n of the torque/speed curve as shown i n F i g u r e  Figure  torque  different  l o a d i n e r t i a s can be accomodated without exceeding the maximum torque c a p a b i l i t y of the machine.  Stator current l i m i t s  which  cause a d e c r e a s e i n s t a t o r frequency when the c u r r e n t l i m i t i s exceeded  a c t as an approximate  form of s l i p  frequency c o n t r o l . A  b e t t e r a p p r o x i m a t i o n i s a c h i e v e d when the r e a l component of s t a t o r c u r r e n t i s used as the i n d i c a t o r of s l i p s i n c e  this  e l i m i n a t e s the e f f e c t of the m a g n e t i z i n g c u r r e n t [ 1 5 ] . The machine power f a c t o r has a l s o been used as an easy to measure i n d i c a t o r of s l i p  [16].  AC d r i v e s running from c u r r e n t source i n v e r t e r s p r e s e n t a s p e c i a l c o n t r o l problem. circuit  I f the i n d u c t i o n motor e q u i v a l e n t  of F i g u r e 9 i s f e d by a c u r r e n t source d e l i v e r i n g  a s t a t o r c u r r e n t I s , the machine torque equations are developed as  (9)  follows:  Te =  (10) I r  2  3/w (Ir Rr/s) 2  e  =  Is w Lm 2  2  2  e  w (Lm + L r ) + ( R r / s ) 2  2  2  e  (11) Te =  3Is Lm Rrw 2  w  2 s l i p  2  s l i p  (Lm+Lr) +Rr 2  2  T h i s torque e q u a t i o n can be r e w r i t t e n i n terms of p e r - u n i t s l i p with the i n d u c t a n c e s r e p l a c e d by t h e i r impedances to a l l o w  and  comparison  with the s t a n d a r d torque e q u a t i o n f o r the i n d u c t i o n machine o p e r a t i n g from a v o l t a g e s o u r c e :  26  (12) C u r r e n t source o p e r a t i o n T =  3/w Is Xm Rr/s 2  2  e  (Xm+Xr) +(Rr/s) 2  2  (13) V o l t a g e source o p e r a t i o n [17] T =  3/w Vs Rr/s 2  e  (Rs+Rr/s) +(Xs+Xr) 2  2  ij 11 i i  0  F i g u r e 12  Machine  Torque-Speed Curves  F i g u r e 12 shows torque-speed  0.9 Speed (per unit)  1.0  f o r C u r r e n t and V o l t a g e Source  Operation  c u r v e s , generated with the equations  above, f o r an i n d u c t i o n machine running from a v o l t a g e source and a c u r r e n t s o u r c e . The d o t t e d l i n e on the c u r r e n t source  27  curve  i n d i c a t e s the t h e o r e t i c a l c u r v e . very h i g h a i r g a p becomes very  However t h a t curve r e s u l t s i n  f l u x l e v e l s when the  l a r g e and  most of the s t a t o r c u r r e n t  the m a g n e t i z i n g i n d u c t a n c e Lm  The  and  Rr/s  flows through  r a t h e r than i n t o the r o t o r  In a r e a l machine, the i r o n s a t u r a t e s a solid  s l i p i s small since  circuit.  the torque curve shown as  line results.  machine can o p e r a t e a t r a t e d torque a t e i t h e r p o i n t A or  p o i n t B on the constant p o i n t A on  current  the n e g a t i v e l y  sloped  corresponds to the o p e r a t i n g saturated  and  operation  at point  is desirable. operation  torque/speed c u r v e .  Operation at  p o r t i o n of the torque speed curve  r e g i o n i n which the machine i r o n i s  the machine i s running i n e f f i c i e n t l y . B on the p o s i t i v e l y sloped  Therefore  p o r t i o n of the  However t h i s curve r e s u l t s i n s t a t i c a l l y  s i n c e any  transient perturbation  curve.  the s t a b l e n e g a t i v e l y As  a r e s u l t , current  sloped  unstable  i n l o a d torque causes  the machine to e i t h e r slow down to a h a l t or speed up enters  p o r t i o n of the  source AC d r i v e s are  operated under some type of c l o s e d loop c o n t r o l .  so t h a t i t  torque/speed usually Controlled  frequency o p e r a t i o n w i t h c o n t r o l of torque by v a r i a t i o n of stator current  The  i s a common c o n t r o l t e c h n i q u e  dynamics of AC  as DC  drives.  The  [18,  standard  i n d u c t i o n motor ( F i g u r e  circuit  9) i s a good r e p r e s e n t a t i o n  28  the  as  d r i v e s with the same f a s t  per-phase e q u i v a l e n t  slip  19].  d r i v e s have been i n t e n s i v e l y s t u d i e d  e n g i n e e r s attempt to d e s i g n AC  curve  of  response of  the  the  machine under steady s t a t e c o n d i t i o n s  but i s not a c c u r a t e  under  t r a n s i e n t c o n d i t i o n s . The two a x i s or d-q model used f o r synchronous machine t r a n s i e n t a n a l y s i s can a l s o be used f o r i n d u c t i o n machine t r a n s i e n t a n a l y s i s  [20].  Krause and Thomas  have developed the i n d u c t i o n machine equations f o r d-q coordinates w  e  i n a reference  frame r o t a t i n g w i t h a n g u l a r  velocity  [21] as Ve.  Vol,  Ls  X L.TYIP  0  (w - Wy-)Lm  L  e  Lmp  0  p = d/dt  Rr+Lrp  L r = Rotor leakage p l u s magnetizing r  equations r e s u l t  inductance inductance  i n a mathematically  s t a t e e q u a t i o n s i n c e the r o t o r frequency  v a r i e s w i t h the o p e r a t i n g  point.  w  r  In a d d i t i o n the machine  i n d u c t a n c e s and r e s i s t a n c e s a r e not constant  parameters s i n c e  they change due to magnetic s a t u r a t i o n and motor h e a t i n g . r e s u l t general not  Ur  = Rotor a n g u l a r v e l o c i t y  These d i f f e r e n t i a l non-linear  transfer functions  As a  f o r the i n d u c t i o n machine a r e  p o s s i b l e s i n c e the p o l e and zero l o c a t i o n s depend on the  operating  V  operator  Ls = S t a t o r leakage p l u s magnetizing  w  Us  " 1<Jfe.L.rv»  —  p o i n t s . Instead,  t r a n s f e r functions are derived  29  by  l i n e a r i z i n g around  an o p e r a t i n g p o i n t to o b t a i n a l i n e a r s m a l l  s i g n a l model [22,23]. determined  Poles and zeroes f o r the l i n e a r model can be  a t a v a r i e t y of o p e r a t i n g p o i n t s and p l o t t e d on a r o o t  l o c u s diagram  i n o r d e r t o determine  r e g i o n s of p o t e n t i a l  i n s t a b i l i t y and to g i v e some i n s i g h t i n t o the nature of the system  response.  The major r e s u l t s of these s t u d i e s can be summarized as f o l l o w s : (1) The r o t o r speed  response  to step changes i n l o a d  torque, i n p u t v o l t a g e , o r i n p u t frequency i s approximately  first  o r d e r when the machine and  l o a d have h i g h i n e r t i a .  < > 15  "  T  J w  The time c o n s t a n t i s [24]  slip nTo  where J = t o t a l i n e r t i a of machine p l u s l o a d n = number of machine pole p a i r s To = f u l l w  slip  =  load machine torque per p o l e  ^*-P frequency a t f u l l  S  (2) The t r e n d i n r o t o r speed  response  load  torque  i s towards a second  o r d e r type as machine and l o a d i n e r t i a Some l i g h t l y  loaded machines a c t u a l l y go i n t o  steady s t a t e r o t o r speed at  decreases.  low s t a t o r frequency  o s c i l l a t i o n s when operated [25].  These  oscillations  can sometimes be induced i n otherwise s t a b l e machines  30  by i n t e r a c t i o n w i t h the f i l t e r elements i n the i n v e r t e r ' s DC bus [ 2 6 ] .  (3) Very good dynamic performance can be achieved  by an  i n d u c t i o n motor d r i v e i f the s t a t o r c u r r e n t s a r e controlled  i n a d-q r e f e r e n c e frame r o t a t i n g a t the  v e l o c i t y of the r o t o r f l u x v e c t o r . i s aligned with  The d - a x i s  vector  the f l u x v e c t o r so t h a t the d - a x i s  s t a t o r c u r r e n t e f f e c t i v e l y c o n t r o l s the machine  flux.  When the d - a x i s c u r r e n t i s a l i g n e d i n t h i s f a s h i o n , the q - a x i s  c u r r e n t d i r e c t l y c o n t r o l s the machine  This " f i e l d  o r i e n t e d c o n t r o l " [27] a l l o w s  c o n t r o l of f l u x and torque are orthogonal.  torque.  independent  s i n c e the two c u r r e n t  vectors  T h i s i s analogous to the c o n t r o l of a  s e p a r a t e l y e x c i t e d DC machine where the f i e l d  current  c o n t r o l s the machine f l u x and the armature c u r r e n t c o n t r o l s the machine torque.  Most other i n d u c t i o n motor c o n t r o l  c o n t r o l schemes do not succeed i n d e c o u p l i n g v a r i a b l e s f o r f l u x and torque for  one w i l l  the c o n t r o l  so a change i n the s e t p o i n t  cause a t r a n s i e n t p e r t u r b a t i o n i n the o t h e r .  2.4 C o n t r o l of the I n v e r t e r Waveform  The output  waveform generated by the i n v e r t e r i s u s u a l l y  n o n - s i n u s o i d a l . Since i n d u c t i o n machines a r e designed  31  to  operate  w i t h s i n u s o i d a l c u r r e n t s , the e f f e c t s of o p e r a t i o n w i t h n o n - s i n u s o i d a l c u r r e n t s must be e v a l u a t e d to determine machine performance i s a f f e c t e d .  how  For the purpose of a n a l y s i s ,  the i n d u c t i o n machine can be c o n s i d e r e d to be a l i n e a r system as l o n g as magnetic s a t u r a t i o n i s ignored  [28].  The waveform can  t h e r e f o r e be decomposed i n t o a fundamental component and a s e t of harmonic  components by F o u r i e r a n a l y s i s and the machine response  can be determined f o r each harmonic  individually.  The  total  response i s o b t a i n e d by summing the responses to the fundamental and harmonic  components.  Waveforms from a p r o p e r l y o p e r a t i n g i n v e r t e r a r e symmetrical and have no DC o f f s e t .  As a r e s u l t  and no even harmonics.  the waveform has no DC component  In a d d i t i o n , the t r i p l e n  harmonics  (harmonics of o r d e r 3k where k i s a p o s i t i v e i n t e g e r ) i n a t h r e e phase system a r e a l l i n phase machine f l u x .  As a r e s u l t  ( z e r o sequence) and so produce no  they w i l l not a f f e c t  the  machine's  t o r q u e . I f the machine i s connected i n a wye  configuration,  t r i p l e n harmonic w i l l f l o w i n the w i n d i n g s .  Of the r e m a i n i n g  harmonics, those of o r d e r 6k+l produce machine f l u x t h a t i n the same d i r e c t i o n as the fundamental f l u x  (positive  no  rotates sequence)  w h i l e those of o r d e r 6 k - l produce machine f l u x t h a t r o t a t e s i n the o p p o s i t e d i r e c t i o n  to to the fundamental f l u x  (negative  sequence).  The e q u i v a l e n t c i r c u i t of the i n d u c t i o n machine shown i n F i g u r e 9 can be used to develop a s i m p l e r c i r c u i t  32  which i s v a l i d  f o r the  harmonic components of the e x c i t a t i o n waveform.  The  s l i p f o r the  harmonic components i s  s = kw  (16)  g  - w. rotor  where w  g  i s the fundamental s t a t o r  frequency  k i s the o r d e r of the harmonic component w.r o t o r i s  From t h i s e q u a t i o n  the r o t o r mechanical  i t i s apparent t h a t the s l i p f o r the harmonic  components i s c l o s e to 1 s i n c e the lowest of o r d e r k = 5.  frequency  harmonic component i s  T h i s means t h a t the harmonic components of  the  machine c u r r e n t w i l l not be g r e a t l y a f f e c t e d by the l o a d on  the  machine. by  At most o p e r a t i n g  the i n p u t impedance seen  the harmonic components i s dominated by the r e a c t a n c e s  circuit  s i n c e the r e a c t a n c e s  r e s i s t a n c e s remain constant The  frequencies  i n c r e a s e w i t h frequency (ignoring skin effect  impedance of the magnetizing  f r e q u e n c i e s and  as a r e s u l t  the e q u i v a l e n t c i r c u i t as shown i n F i g u r e  the  f o r the moment).  branch i s very l a r g e at harmonic  i t s effect  If the machine r e s i s t a n c e s and  while  i n the  on harmonic c u r r e n t s i s s m a l l .  i t s magnetizing  branch are  can be reduced to the leakage  13.  33  neglected,  reactances  m m  o  m m L2  LI  o-  Figure  Using  13  Machine E q u i v a l e n t C i r c u i t f o r Harmonics  t h i s approximate e q u i v a l e n t c i r c u i t ,  the harmonic  currents  f l o w i n g i n t o the machine can be c a l c u l a t e d as f o l l o w s :  (17) k(X +X ) :  2  where i^  = magnitude of c u r r e n t harmonic of o r d e r  k  v^ = magnitude of v o l t a g e harmonic of o r d e r  k  X^,  X  2  = s t a t o r and fundamental  The  r o t o r leakage r e a c t a n c e s  at  frequency  i n d u c t i o n machine a c t s as a low pass f i l t e r which a t t e n u a t e s  34  higher  o r d e r c u r r e n t harmonics.  Since the v o l t a g e harmonics i n i n v e r t e r  waveforms decrease i n magnitude as t h e i r order i n c r e a s e s , t h e net result  i s t h a t machine performance  i s p r i m a r i l y a f f e c t e d by the low  o r d e r harmonics i n the waveform.  In  an i n v e r t e r w i t h a s i x - s t e p  (square wave) waveform, the v o l t a g e  waveform can be expressed by the f o l l o w i n g F o u r i e r  (18)  v(t) = V^sinwt  + l/5sin5wt + l/7sin7wt + 1 / l l s i n l l w t + ... )  The dominant harmonics a r e the f i f t h and seventh. harmonic produces fundamental  flux.  series:  The f i f t h  f l u x r o t a t i n g i n the o p p o s i t e d i r e c t i o n to the The f l u x produced  by the seventh harmonic  r o t a t e s i n the same d i r e c t i o n as the fundamental  flux.  Under  normal o p e r a t i n g c o n d i t i o n s , the r o t o r r o t a t e s a t a p p r o x i m a t e l y synchronous fifth  speed and t h e r e f o r e the r o t o r bars c u t the r o t a t i n g  and seventh harmonic f l u x e s a t the s i x t h harmonic  frequency.  As a r e s u l t  the r o t o r .  These c u r r e n t s i n t e r a c t with the fundamental  produce The  s i x t h harmonic c u r r e n t s a r e induced i n f l u x to  a p u l s a t i n g torque a t the s i x t h harmonic frequency [ 2 9 ] .  torque has zero average  value.  T h i s p u l s a t i n g torque r e p r e s e n t s the major e f f e c t have on machine t o r q u e .  The magnitude of t h i s harmonic  depends on the magnitude of the f i f t h currents.  t h a t harmonics torque  and seventh harmonic  High leakage r e a c t a n c e machines f e d from a v o l t a g e  source i n v e r t e r have the s m a l l e s t torque p u l s a t i o n s s i n c e  35  harmonic c u r r e n t s a r e a t t e n u a t e d  by the motor leakage  On the other hand, motors f e d from a c u r r e n t source the l a r g e s t torque  reactance.  i n v e r t e r have  p u l s a t i o n s s i n c e the motor i s f e d a square  wave of c u r r e n t i n which the harmonic c u r r e n t s a r e not a t t e n u a t e d at a l l . torque  The  An average machine f e d from a v o l t a g e source p u l s a t i o n s w i t h a magnitude of about 0.1 p.u.  e f f e c t of the torque  i n v e r t e r has [30].  p u l s a t i o n s on o v e r a l l system performance  depends on r o t o r and l o a d i n e r t i a and on o p e r a t i n g speed. On one hand, a low i n e r t i a machine o p e r a t i n g a t low speed ( a few Hertz may a c t u a l l y r o t a t e i n a s e r i e s of steps o r j e r k s . o t h e r hand, a h i g h i n e r t i a machine running Hertz  at  On the  h i g h speeds ( 50  ) may n o t be n o t i c e a b l y a f f e c t e d by the p u l s a t i n g  In i n t e r m e d i a t e  torque.  s i t u a t i o n s , the p u l s a t i n g torque may be  n o t i c e a b l e as a v i b r a t i o n that can i n c r e a s e wear on c o u p l i n g s and gears.  Since harmonic c u r r e n t s add l i t t l e output  power, t h e i r e f f e c t  the machine's e l e c t r i c a l  i f anything  t o the machine's  i s seen p r i m a r i l y as an i n c r e a s e i n  losses.  The f l u x generated by the  harmonic c u r r e n t s causes an i n c r e a s e i n the core l o s s and the s t r a y l o s s e s i n the machine.  The i n c r e a s e i n core l o s s has been  found to be s m a l l ; on the o r d e r  of 10% [31].  The s t r a y l o s s e s i n  the machine have been found to be as much as two o r t h r e e  times  g r e a t e r when the machine i s running  source  [32].  from a n o n - s i n u s o i d a l  F o r t u n a t e l y , the s t r a y l o s s i s a s m a l l f r a c t i o n of the  machine's t o t a l l o s s e s so a l a r g e i n c r e a s e does not s e v e r e l y  36  )  i m p a i r the machine's e f f i c i e n c y .  The  main source of  copper l o s s e s .  increased  motor l o s s e s , however, i s harmonic  S k i n e f f e c t i n most i n d u c t i o n machine s t a t o r s i s  n e g l i g i b l e s i n c e the windings i n most cases c o n s i s t of wire of r e l a t i v e l y s m a l l  cross  section.  a d d i t i o n a l copper l o s s e s  i n the  stator  As a r e s u l t ,  insulated the  are:  oo (19) k>l  where 1^ = rms  The  s k i n e f f e c t i n the  v a l u e of the k t h harmonic  r o t o r b a r s , on  s i g n i f i c a n t , p a r t i c u l a r l y i f the construction. frequency. resistance the  A c c o r d i n g to A l g e r  occurs i n the  As  other hand, i s  r o t o r i s of  deep-bar  rotor resistance [33]  the  increases  with  increase  i n rotor  to the  square r o o t  i s approximately p r o p o r t i o n a l  frequency.  Kliman [34]  As a r e s u l t , the  the  current  a r e s u l t , the major i n c r e a s e  i n copper  of  losses  rotor.  c a l c u l a t e s an  l o s s e s depending on  the  c a l c u l a t e s an i n c r e a s e  increase  of  15%  to 60%  i n s t a t o r copper  p a r t i c u l a r waveform a p p l i e d of  90%  Kliman's v a l u e s are v a l i d o n l y  to 270%  but  i n r o t o r copper  f o r the machine and  losses.  waveforms  he  a n a l y z e d s i n c e l o s s e s are v e r y s e n s i t i v e to the p a r t i c u l a r harmonic content of the waveform, and  to the  37  leakage r e a c t a n c e ,  r o t o r r e s i s t a n c e , and h i s f i g u r e s are  r o t o r bar h e i g h t of the motor.  i n l i n e with other studies  t o t a l machine l o s s e s when o p e r a t i n g can  be  from 1.1  sinusoidal  The  losses  i n the  increased  i n v e r t e r d r i v e n motor r e s u l t s i n  h e a t i n g can  the motor i n s u l a t i o n and This  be  a i r c o o l i n g but  service l i f e  d e a l t w i t h by  i t i s more d e s i r a b l e  or by a p p l y i n g  six-step  increases  of  of  the  forced  inverter's  V o l t a g e Input i n v e r t e r or  square wave s u p p l i e d  machine l o s s e s by  aging  losses.  s t a n d a r d Current Source i n v e r t e r cannot e a s i l y be However, the  the  choosing a machine  to c o n t r o l the  output waveform to minimize the harmonic  output waveshape of a V a r i a b l e  motors  the a i r flow through  thus s h o r t e n the  problem can  the  result i n accelerated  w i t h a h i g h e r power r a t i n g than r e q u i r e d  usually  source  l o s s e s when running from a  h e a t i n g of the motor, p a r t i c u l a r l y s i n c e  machine. The  The  that  from a n o n - s i n u s o i d a l  o f t e n run at reduced speed which l e s s e n s  machine.  which i n d i c a t e  source.  increased  increased  to 3 times the  However,  by  a  changed.  these  l e s s than 20%.  inverters The  main  problem w i t h the waveform of these i n v e r t e r s , p a r t i c u l a r l y the C u r r e n t Source i n v e r t e r , i s the p r o d u c t i o n of s i x t h harmonic torque p u l s a t i o n s .  Some Current Source i n v e r t e r s do  t h e i r output c u r r e n t these torque  The  a t low  output f r e q u e n c i e s  modulate  i n o r d e r to reduce  pulsations.  output waveform of a p u l s e w i d t h modulated (PWM)  38  inverter,  on  the o t h e r hand, can i n c r e a s e machine l o s s e s s u b s t a n t i a l l y . F o r t u n a t e l y , by adopting a s u i t a b l e modulation  technique,  the  harmonic content of the output waveform can be a d j u s t e d to l o s s e s to an a c c e p t a b l e  level.  A v a r i e t y of modulation  techniques a r e d e s c r i b e d i n the  literature.  Perhaps the o l d e s t i s the " t r i a n g l e i n t e r c e p t "  "subharmonic" technique  [35].  t r i a n g u l a r voltage (the c a r r i e r ) . to determine  The  frequency  i n t e r s e c t i o n s of the  The  T  Jl  1 0 ,j, ID u 2/  f F i g u r e 14  two  the s w i t c h i n g i n s t a n t s f o r the  p u l s e width modulated waveform as shown i n F i g u r e 14.  'an  or  In t h i s technique, a s i n u s o i d a l  v o l t a g e (the r e f e r e n c e ) i s compared w i t h a h i g h e r  waveforms a r e used  reduce  3  vdc H r  T r i a n g l e I n t e r c e p t P u l s e Width M o d u l a t i o n  resulting  p u l s e width modulated waveform has a harmonic  c o n s i s t i n g of a fundamental  component a t the frequency of the  r e f e r e n c e waveform and harmonic components c e n t e r e d m u l t i p l e s of the c a r r i e r  frequency  frequency of the fundamental amplitude and  frequency  spectrum  [36].  around  The amplitude  and  component i s changed by v a r y i n g the  of the r e f e r e n c e waveform.  To produce  a  t h r e e phase output, a t h r e e phase s e t of r e f e r e n c e waveforms i s compared with the  The  carrier.  c a r r i e r waveform i s commonly s y n c h r o n i z e d to the r e f e r e n c e to  a v o i d subharmonic beats caused by the changing phase r e l a t i o n s h i p between the c a r r i e r and chosen  reference [37].  The c a r r i e r frequency i s  to be an odd m u l t i p l e of t h r e e times the r e f e r e n c e  frequency  ( e . g . 21 o r 27).  T h i s ensures  waveform i s always symmetrical  that the modulated  and, as l o n g as the motor n e u t r a l  i s n ' t grounded, the harmonics a t m u l t i p l e s of the  carrier  frequency won't generate any motor c u r r e n t s s i n c e they a r e t r i p l e n harmonics. around  In t h a t case the harmonics occur i n sidebands  the c a r r i e r  frequency and  i t s harmonics.  important harmonics occur a t :  f  (19)  (20)  + 2f  c  ref  and  2f„c +— f r e f  where  f  £  f  r e  = carrier  frequency  £ = r e f e r e n c e frequency  40  The most  Harmonics a l s o occur c a r r i e r frequency  i n sidebands around h i g h e r m u l t i p l e s of the  but they do not have much e f f e c t on machine  performance.  Obviously,  by choosing  a s u i t a b l y h i g h c a r r i e r frequency, the  harmonic c u r r e n t s can be reduced to any d e s i r e d l e v e l s i n c e the machine a c t s as a low pass f i l t e r .  However, the s w i t c h i n g  d e v i c e s i n the i n v e r t e r may have s w i t c h i n g speed This i s p a r t i c u l a r l y  t r u e f o r t h y r i s t o r s which a r e u s u a l l y  l i m i t e d t o maximum s w i t c h i n g f r e q u e n c i e s to  1500 Hz.  limitations.  i n the range of 500 Hz  T r a n s i s t o r s , on the o t h e r hand, can be used  e f f e c t i v e l y up to 5 o r 6 kHz, so PWM i n v e r t e r s u s i n g t r a n s i s t o r s can produce output  waveforms w i t h  low c u r r e n t harmonics.  Power  MOSFETs can s w i t c h a t very h i g h f r e q u e n c i e s and so can produce waveforms w i t h e s s e n t i a l l y no harmonic c u r r e n t s . the problem o f maximum s w i t c h i n g frequency  To d e a l  with  l i m i t s , multi-mode  m o d u l a t i o n s t r a t e g i e s a r e o f t e n used i n which the r a t i o between c a r r i e r and r e f e r e n c e frequency frequency  i s increased  i s lowered as t h e r e f e r e n c e  so t h a t t h e s w i t c h i n g frequency  i s kept  below the maximum l i m i t [ 3 8 ] .  The  amplitude of the fundamental l i n e to l i n e v o l t a g e a t f u l l  m o d u l a t i o n (when t h e amplitude of the r e f e r e n c e equals the c a r r i e r ) i s  (21)  vTv /2 nr  41  that o f  where VDC  = i n v e r t e r DC bus  voltage  The magnitude of the fundamental component of the unmodulated s i x - s t e p square wave i s  V T 2 V /TT  (22)  DC  which i s 27% g r e a t e r . rating  KVA  of the i n v e r t e r i t i s d e s i r a b l e to make a t r a n s i t i o n  the f u l l y modulated PWM waveform. until  In o r d e r to make f u l l use of the  In o r d e r  from  wavefom to the unmodulated s i x - s t e p  to do t h i s , p u l s e s are merged or "dropped"  the s i x step waveform i s reached.  Some c a r e must be  taken  i n the manner i n which p u l s e s a r e dropped to ensure that sudden jumps i n the fundamental do not o c c u r . p u l s e dropping  The  Various  strategies for  have been d e s c r i b e d i n the l i t e r a t u r e  [39],  [40].  t r i a n g l e i n t e r c e p t form of m o d u l a t i o n i s w e l l s u i t e d to  analog  implementation,  although  the implementation  becomes more  complex when c a r r i e r s y n c h r o n i z a t i o n to the r e f e r e n c e i s r e q u i r e d and  the r a t i o s between c a r r i e r and  reference frequencies  changed to keep i n v e r t e r s w i t c h i n g frequency Digital  implementations of t h i s  are  under some l i m i t .  type of modulation are a l s o  p o s s i b l e , e i t h e r by s t o r i n g p r e - c a l c u l a t e d s w i t c h i n g p a t t e r n s i n memory and calculating  r e a d i n g them out as r e q u i r e d or by  directly  the s w i t c h i n g i n s t a n t s d u r i n g i n v e r t e r o p e r a t i o n .  However, d i g i t a l implementation  of p u l s e width modulated  42  c o n t r o l l e r s i n t r o d u c e s the p o s s i b i l i t y  of o t h e r m o d u l a t i o n  techniques.  ^Switching ^ Angle  F i g u r e 15  PWM Waveform Having Quarter  The harmonic content  and H a l f Wave Symmetry  of a p u l s e width modulated waveform of the  type shown i n F i g u r e 15, which has q u a r t e r and h a l f wave symmetry, i s  [41]: M  (23)  a  n  =  2 V  DC  1 + 2^(-l) cosnt* k  k  k=l  where  a  n  = amplitude  M = number = angle  of the n t h harmonic  of s w i t c h i n g i n s t a n t s p e r q u a r t e r c y c l e of the k t h s w i t c h i n g i n s t a n t  43  Using  numerical  switching the  techniques  angles  harmonics.  switching  per  For  angles while  zero.  Buja  and  angles  required  minimizing  a  quarter  example,  required  fundamental  it  cycle  to  Hoft the  the  [43]  and  others  control  the  amplitude  criterion  such  the  rms  of  the  the  the  of the  M - l harmonics  calculated of  M  calculated  [42]  of  the  amplitude  amplitude  amplitudes  performance  choose  control  and  control  to  the  Indri to  possible  Patel  to  reducing  is  to  switching  fundamental  while  as  oo  (24) n=3  which  is  proportional  currents  in  minimize  machine  Switching  the  angles  amplitudes  the  desired  required  These losses the  are  The  programmed in  the  with  of  loss  i f  zero  controller  frequency  machine pulses  inverters  than per  the  harmonic  should  also  effect  is  ignored.  range  of  fundamental  a  looks  voltage  of  criterion  maximum and  then  output  waveforms  for  to  value  this  skin  calculated  from  inverter  total  Minimizing  copper  switching  number  useful  motor.  ranging  controller.  to  up  are  the  and uses  stored  in  t h e PWM  set  of  angles  for  them  to  generate  the  [44].  have the  cycle  employing  been  found  to  produce  triangle  intercept  is  [45].  small  thyristors  44  waveforms  Thus  which  lower  are  they  when  are  restricted  i n the maximum s w i t c h i n g f r e q u e n c y .  They a r e a l s o of use when  the i n v e r t e r must produce h i g h fundamental f r e q u e n c i e s ( e . g . 400 Hz).  45  Chapter 3  I n v e r t e r C o n t r o l l e r Design  T h i s chapter d i s c u s s e s a high  the d e s i g n  Considerations  of the i n v e r t e r c o n t r o l l e r from  l e v e l or systems p e r s p e c t i v e .  the i n v e r t e r c o n t r o l l e r and discussed  in detail.  The  design  the p o s s i b l e design  This i s followed  requirements f o r tradeoffs  are  by c o n s i d e r a t i o n of  the  a l t e r n a t i v e methods of implementing the c o n t r o l l e r f u n c t i o n s by p r e s e n t a t i o n  of the b a s i c a r c h i t e c t u r e of the c o n t r o l l e r .  d e t a i l e d design  of the i n v e r t e r c o n t r o l l e r hardware and  i s discussed  The  i n succeeding  c o n t r o l l e r design  given  software  i s based on a microcomputer i n order amount of  d i v i s i o n of c o n t r o l l e r f u n c t i o n s  s o f t w a r e was  The  chapters.  g i v e the c o n t r o l l e r a c o n s i d e r a b l e The  and  programmability.  between hardware  careful attention.  to  and  Some f u n c t i o n s , such as  the c o n t r o l l e r sequencing f u n c t i o n or the c o n t r o l p a n e l i n t e r f a c e f u n c t i o n , can  be performed by  performance and  software with no  with a considerable  f u n c t i o n s are more time c r i t i c a l and  sacrifice in  gain i n f l e x i b i l i t y . had  to be a n a l y z e d  to determine a good t r a d e o f f between hardware and  Other carefully  software.  In  p a r t i c u l a r , the f u n c t i o n s a s s o c i a t e d w i t h p u l s e width m o d u l a t i o n required  close attention.  techniques had  difficulty  Software i n t e n s i v e PWM  generation  i n meeting performance requirements  while more hardware o r i e n t e d  techniques r e q u i r e d a l a r g e number of  46  components. of  Fortunately, a s o l u t i o n presented i t s e l f  a large scale integrated c i r c u i t  i n the form  that generates three phase  PWM  waveforms.  Curiously, this  IC, the P h i l i p s HEF4752V, has been almost  e n t i r e l y i g n o r e d i n the l i t e r a t u r e on i n v e r t e r Papers a r e s t i l l  p u b l i s h e d d e s c r i b i n g complex  controllers. PWM  waveform  g e n e r a t i o n c i r c u i t s t h a t appear to have no performance over t h i s  IC.  advantages  T h i s t h e s i s appears to be the f i r s t d e s c r i p t i o n of  a m i c r o p r o c e s s o r based i n v e r t e r c o n t r o l l e r t h a t makes use of t h i s IC.  One advantage of the c a r e taken i n d e f i n i n g the i n v e r t e r c o n t r o l l e r f u n c t i o n s and d i v i d i n g them between hardware  and  software i s t h a t the c o n t r o l l e r a r c h i t e c t u r e can be kept q u i t e simple without major s a c r i f i c e i n performance or f l e x i b i l i t y . mentioned, the c o n t r o l l e r has a microcomputer a t i t s h e a r t . other major components of the c o n t r o l l e r a r e a n a l o g and  As The  digital  input p o r t s to the microcomputer, d i g i t a l output p o r t s from the microcomputer, and the PWM e x c e p t i o n of the PWM  waveform g e n e r a t i o n IC.  With the  waveform g e n e r a t i o n , the c o n t r o l l e r  f u n c t i o n s a r e p r i m a r i l y performed by microcomputer some a s s i s t a n c e from simple hardware  software w i t h  components i n cases where  speed of response i s c r i t i c a l .  47  M»TW t *tCUMWWOITl W W 01 UNf '  Figure  16  I.S.E.  Submersibles  3.1  The  Basic  System Requirements  i n i t i a l a p p l i c a t i o n of the i n v e r t e r c o n t r o l l e r was to c o n t r o l  t h r u s t e r d r i v e s f o r s u b m e r s i b l e s produced by I n t e r n a t i o n a l Submarine E n g i n e e r i n g . by  I.S.E.  Figure  16 shows the submersibles produced  Some of the s u b m e r s i b l e s a r e autonomous but most a r e  run w i t h a t e t h e r t h a t c a r r i e s c o n t r o l s i g n a l s and three power from t h e s u r f a c e to the s u r f a c e . allow  and r e t u r n s  telemetry  phase AC  from the s u b m e r s i b l e  Each submersible has up to f o u r t h r u s t e r s t o  complete c o n t r o l of the s u b m e r s i b l e ' s motion.  Depending on  the s i z e of the s u b m e r s i b l e , t h e power r a t i n g of each t h r u s t e r i s from 1.5 horsepower to 5 horsepower.  I n t e r n a t i o n a l Submarine E n g i n e e r i n g to power the t h r u s t e r s .  The s m a l l e r  has used a v a r i e t y of motors t h r u s t e r s have used s i n g l e  phase u n i v e r s a l motors w i t h speed c o n t r o l by c o n t r o l l e d rectification.  L a r g e r t h r u s t e r s have used three  phase AC motors  w i t h speed c o n t r o l a c h i e v e d by a v a r i a b l e p i t c h p r o p e l l o r s .  The  t h r u s t e r s on one s e r i e s of s u b m e r s i b l e s use v a r i a b l e speed h y d r a u l i c motors w i t h one l a r g e AC motor running a h y d r a u l i c pump. Each of these techniques has d i s a d v a n t a g e s , e i t h e r from a reliability  Variable  or a c o s t  aspect.  frequency speed c o n t r o l of AC motors w i t h an i n v e r t e r  was  considered  by ISE,  but no s u i t a b l e i n v e r t e r s c o u l d  The  i n v e r t e r s cannot be on t h e s u r f a c e  be found.  because the c a b l e  required  to c a r r y the power t o t h e i n d i v i d u a l t h r u s t e r s would be t o o heavy  49  and  too c o s t l y .  T h e r e f o r e , compact i n v e r t e r s  submersion to 1000 meters a r e r e q u i r e d installed  that  so that  can w i t h s t a n d  they can be  d i r e c t l y on the s u b m e r s i b l e .  A development p r o j e c t  was s t a r t e d  of E l e c t r i c a l E n g i n e e r i n g a t UBC,  i n 1980, w i t h i n  the Department  to develop an i n v e r t e r d r i v e t o  meet the requirements of the submersible a p p l i c a t i o n .  The  inverter configuration  power  chosen was a PWM  i n v e r t e r using  MOSFETs or power t r a n s i s t o r s as s w i t c h e s . minimum number of components  This  results i n a  i n the i n v e r t e r s i n c e a s i n g l e  r e c t i f i e r b r i d g e can be used f o r a l l f o u r  inverters  on a  s u b m e r s i b l e and no commutation c i r c u i t s a r e r e q u i r e d . t r a n s i s t o r s and power MOSFETs a r e a v a i l a b l e required  basic  for this application.  Power  i n the power  ratings  Each t r a n s i s t o r or MOSFET s w i t c h  i s c o n t r o l l e d by a d r i v e r c i r c u i t which i n t e r f a c e s  to the  c o n t r o l l e r v i a an o p t o - c o u p l e r .  The i n v e r t e r i s designed to be packaged i n the same housing as the  thruster  motor.  The e n t i r e motor housing i s f i l l e d w i t h o i l  to compensate f o r the e x t e r n a l  water p r e s s u r e so the motor  housing does not have to w i t h s t a n d any p r e s s u r e .  It i s doubtful  that  the i n t e g r a t e d  c i r c u i t s and o t h e r  used i n the c o n t r o l l e r w i l l work submerged i n o i l . the  c o n t r o l l e r s f o r the f o u r  the  p r e s s u r e housing used to c o n t a i n  circuits  i n the s u b m e r s i b l e .  components  As a r e s u l t ,  i n v e r t e r s have to be i n s t a l l e d i n the other e l e c t r o n i c  This places p a r t i c u l a r l y severe  50  requirements  on the s i z e of the c o n t r o l l e r s i n c e space i n the  p r e s s u r e housing i s a v a l u a b l e commodity.  The need f o r h i g h  r e l i a b i l i t y and q u i c k r e p a i r i n the submersible a p p l i c a t i o n encourages  also  a d e s i g n t h a t uses a minimum number of components and  i s compact enough to be p l a c e d on one p r i n t e d c i r c u i t  card that  can be swapped i f a c o n t r o l l e r m a l f u n c t i o n o c c u r s .  In  order to make use of compact h i g h speed motors, the i n v e r t e r  d r i v e must operate a t f r e q u e n c i e s up to 400 H e r t z .  Smooth  c o n t r o l i s r e q u i r e d i n both forward and r e v e r s e d i r e c t i o n s  from  the 400 Hz maximum output frequency down t o a few H e r t z so that the submersible can be manoeuvered i n c o n f i n e d spaces. extremely r a p i d  However,  changes i n motor speed a r e not r e q u i r e d and t h e r e  i s no need f o r p r e c i s e c o n t r o l of motor torque o r speed. T h e r e f o r e , an open-loop acceptable.  constant volts/Hz c o n t r o l s t r a t e g y i s  The i n v e r t e r i s designed t o d e t e c t o v e r c u r r e n t  c o n d i t i o n s which occur i f the t h r u s t e r p r o p e l l e r becomes jammed. The  i n v e r t e r sends an o v e r c u r r e n t s i g n a l t o the c o n t r o l l e r , which  must respond by s h u t t i n g down the i n v e r t e r .  The t h r u s t e r speed  and d i r e c t i o n commands a r e sent down to the  submersible on a s e r i a l  data l i n k .  C i r c u i t r y on the submersible  c o n v e r t s the s e r i a l data t o p a r a l l e l data c o n s i s t i n g of 8 b i t words.  The i n v e r t e r c o n t r o l l e r must accept t h i s p a r a l l e l data as  i t s control input.  In a d d i t i o n , i t i s d e s i r a b l e to have some  means of c o n t r o l l i n g the i n v e r t e r w i t h p o t e n t i o m e t e r s and switches f o r the purposes  of t e s t i n g and maintenance.  51  To summarize, the b a s i c  requirements f o r the i n v e r t e r  controller  f o r the s u b m e r s i b l e a p p l i c a t i o n a r e the f o l l o w i n g :  1. The c o n t r o l l e r must supply p u l s e width switching signals switches. LED  modulated  f o r each of the s i x i n v e r t e r  Each s w i t c h i n g s i g n a l must d r i v e the  i n an o p t o - c o u p l e r .  2. The c o n t r o l l e r must operate the i n v e r t e r  over an  output frequency range of 3 to 400 Hz and be capable of r e v e r s i n g  the phase sequence f o r b i d i r e c t i o n a l  o p e r a t i o n of the motor.  3. The c o n t r o l l e r must implement an open-loop volts/Hz control  scheme f o r the motor  4. The c o n t r o l l e r must a c c e p t a d i g i t a l  constant  drive.  (TTL c o m p a t i b l e )  o v e r c u r r e n t s i g n a l from the i n v e r t e r and shut down the inverter  on r e c e i p t  of the s i g n a l .  5. The c o n t r o l l e r must accept 8 b i t p a r a l l e l data (TTL c o m p a t i b l e ) as i t s speed and d i r e c t i o n commands. s h o u l d a l s o have p r o v i s i o n i n p u t as a speed  6.  It  to accept an a n a l o g v o l t a g e  command.  The c o n t r o l l e r must f i t w i t h i n the p r e s s u r e housing  52  of an ISE s u b m e r s i b l e . one by  T h i s means i t must c o n s i s t of  o r more of the 218 mm.  by 77 mm.  ISE f o r i t s own e l e c t r o n i c c i r c u i t s .  c o n t r o l l e r should f i t on one  7.  cards used  I d e a l l y the  card.  Since the c o n t r o l l e r i s i n s t a l l e d and  circuit  i n a sealed  housing  operates o n l y when the v e h i c l e i s submerged, non  h e r m e t i c , commercial temperature range (0 C to 70 C) components may be used. mandatory t h a t  It i s desirable  but not  the c o n t r o l l e r operate from a s i n g l e  5 V o l t power s u p p l y .  3.2 Requirements F o r Other  Applications  I f the i n v e r t e r c o n t r o l l e r i s to be used i n a p p l i c a t i o n s  other  than s u b m e r s i b l e d r i v e s , some a d d i t i o n a l c a p a b i l i t i e s must be added to the c o n t r o l l e r . to be added r e q u i r e s  D e c i d i n g e x a c t l y what c a p a b i l i t i e s a r e  careful consideration  c a p a b i l i t y w i l l a f f e c t the s i z e and c o s t Also,  the a d d i t i o n of some f u n c t i o n s  of how the a d d i t i o n a l  of the c o n t r o l l e r .  requires  considerable  design  e f f o r t which may not be warranted by the v a l u e of the a d d i t i o n a l functions. Variable  For i n s t a n c e ,  V o l t a g e Input and C u r r e n t Source i n v e r t e r s would  s u b s t a n t i a l l y increase increase can  to add the c a p a b i l i t y to c o n t r o l  the complexity of the c o n t r o l l e r and  the time r e q u i r e d  to d e s i g n i t .  However, PWM  be used i n almost a l l i n v e r t e r a p p l i c a t i o n s  53  inverters  i n v o l v i n g power  l e v e l s below 200  kW.  c a p a b i l i t i e s i s not  T h e r e f o r e the a d d i t i o n of r e a l l y warranted by  a d d i t i o n a l a p p l i c a t i o n s made p o s s i b l e  Other c a p a b i l i t i e s can ability be  by  the  l i m i t e d number of  their inclusion.  be added at l e s s c o s t .  to c o n t r o l i n v e r t e r s u s i n g  these  For example,  t h y r i s t o r s as switches would  advantageous i n h i g h e r power and  higher voltage  applications  where s u i t a b l e t r a n s i s t o r s or power MOSFETs are not To add  t h i s c a p a b i l i t y , the  control signals  to t u r n on  (commutate) the  thyristor.  insert appropriate  ( f i r e ) the  t h y r i s t o r and  In a d d i t i o n the  turn off  c o n t r o l l e r must  d e l a y s so t h a t s u f f i c i e n t  time i s allowed  meet, so t h i s i s a c a p a b i l i t y t h a t s h o u l d be  submersible a p p l i c a t i o n p l a c e s  difficult  torque p u l s a t i o n s  the  added.  the  a d d i t i o n a l heat generated by the  don't pose a problem  seawater s u r r o u n d i n g the motor a c t s as a good s i n k current  harmonics.  waveshaping i s d e s i r a b l e  i n many other a p p l i c a t i o n s  reduce l o s s e s and  pulsations.  Although the  submersible d r i v e can  applications w i l l require  for  However,  i n order  to  operate open-loop, other  some form of c l o s e d  I d e a l l y , the c o n t r o l l e r should be  to  no p a r t i c u l a r demands on  and  torque  for  other t h y r i s t o r i n the same  i n v e r t e r l e g i s f i r e d . These requirements are not  i n v e r t e r waveshape s i n c e  available.  c o n t r o l l e r must generate s e p a r a t e  t h y r i s t o r commutation b e f o r e the  The  the  loop c o n t r o l .  designed so t h a t i t can  h i g h performance c o n t r o l s t r a t e g i e s such as f i e l d  54  oriented  handle  control.  The c o n t r o l l e r c o u l d then be used  robots and machine t o o l s .  i n servo d r i v e s f o r  However, c o n t r o l l e r s f o r these h i g h  performance d r i v e s a r e complex and r e q u i r e a wide bandwidth. Examples d e s c r i b e d i n t h e l i t e r a t u r e have r e q u i r e d d u a l 8 b i t microcomputers  [46] o r a s i n g l e h i g h speed  [47] a l o n g w i t h c o n s i d e r a b l e support  16 b i t m i c r o p r o c e s s o r  circuitry.  Even w i t h the  use of a 16 b i t m i c r o p r o c e s s o r , the c o n t r o l bandwidth was o n l y wide enough to a l l o w c l o s e d loop o p e r a t i o n up to a s t a t o r frequency  of 100 Hz.  The i n c l u s i o n of a c a p a b i l i t y f o r servo  type c o n t r o l of AC motors i n the c o n t r o l l e r would make i t too l a r g e f o r the submersible design e f f o r t .  a p p l i c a t i o n and would r e q u i r e a major  I t i s b e t t e r t o d e s i g n a s p e c i a l purpose  c o n t r o l l e r f o r servo a p p l i c a t i o n s  than to attempt  to squeeze  servo c a p a b i l i t i e s i n t o a g e n e r a l purpose i n v e r t e r  F o r t u n a t e l y , simple speed  c o n t r o l l o o p s or s l i p  controller.  frequency  control  loops a r e not as demanding on c o n t r o l l e r bandwidth.  They can be  implemented f a i r l y  on a  microprocessor. feedback  In  e a s i l y i f the c o n t r o l l e r i s based  P r o v i s i o n must be made, however, t o accept  s i g n a l s such as s t a t o r c u r r e n t s o r r o t o r speed.  some a p p l i c a t i o n s , parameters such as the a c c e l e r a t i o n and  d e c e l e r a t i o n r a t e o r the v o l t s / H z r a t i o must be a d j u s t e d to match a particular load. manual adjustment  The c o n t r o l l e r s h o u l d have some p r o v i s i o n f o r  of such  parameters.  The c o n t r o l l e r s h o u l d be equipped  with a d d i t i o n a l  55  protective  f e a t u r e s to prevent i n v e r t e r  f a i l u r e due to c o n d i t i o n s such as  o v e r c u r r e n t or o v e r h e a t i n g .  F o r example, when a h i g h  load  i s d e c e l e r a t e d , energy i s regenerated back on t o the DC bus  of the i n v e r t e r . the  inertia  I f t h i s energy i s not d i s s i p a t e d  or r e t u r n e d to  AC source, i t w i l l cause an o v e r v o l t a g e on the DC bus which  w i l l eventually  cause f a i l u r e of i n v e r t e r  components. To a v o i d  t h i s , the c o n t r o l l e r can be designed sense the bus v o l t a g e and s w i t c h i n a b a l l a s t r e s i s t o r t o absorb the r e g e n e r a t e d energy i f the  bus v o l t a g e exceeds a c e r t a i n  limit.  F i n a l l y , the c o n t r o l l e r must meet some c o s t though many of the a p p l i c a t i o n s  to s e t a t a r g e t  Even  of the c o n t r o l l e r w i l l be  s p e c i a l i z e d , economic c o n s i d e r a t i o n s w i l l difficult  constraints.  still  apply.  p r i c e f o r the c o n t r o l l e r s i n c e  breakdowns f o r commercial i n v e r t e r  drives  It i s cost  a r e not a v a i l a b l e .  However, an e s t i m a t e can be made based on the wholesale p r i c e s of some i n v e r t e r s within  and some assumptions on the d i v i s i o n of c o s t s  these i n v e r t e r s .  The t a r g e t  is  $200 f o r p a r t s and d i r e c t  To  summarize, the a d d i t i o n a l  the  p r i c e based on t h i s e s t i m a t e  labor.  c a p a b i l i t i e s that  should be added t o  submersible c o n t r o l l e r t o make i t u s a b l e i n other  applications  1)  a r e the f o l l o w i n g :  The c o n t r o l l e r s h o u l d be a b l e to c o n t r o l inverters  thyristor  as w e l l as t r a n s i s t o r and power MOSFET  inverters.  56  2) The  c o n t r o l l e r should  harmonic c u r r e n t s  a PWM  strategy that  i n the motor i n order  torque p u l s a t i o n s and  3) The  use  c o n t r o l l e r should  of simple c l o s e d - l o o p  reduces  to reduce  harmonic l o s s e s .  provide  f o r the  implementation  c o n t r o l schemes t h a t do  not  r e q u i r e complex c i r c u i t s or wide c o n t r o l l e r bandwidth.  4) The  c o n t r o l l e r should  a l l o w f o r manual adjustment  parameters such as a c c e l e r a t i o n and volts/Hz  5) The  r a t i o , and  c o n t r o l l e r should  inverter against and  6) The  The  Controller  frequency.  have p r o v i s i o n to p r o t e c t  f a i l u r e due  rates,  to o v e r v o l t a g e ,  the  overcurrent,  overheating.  c o n t r o l l e r should  direct  3.3  maximum output  deceleration  of  c o s t no more than $200 f o r p a r t s  labor.  Functions  basic functions  to be performed by  can be grouped i n t o the f o l l o w i n g  1) System management and  the PWM  categories:  sequencing  57  inverter controller  and  2) Torque/speed c o n t r o l  3) PWM  waveform  generation  4) C o n t r o l p a n e l i n t e r f a c e  5) M o n i t o r i n g  The  operating  required  sequencing f u n c t i o n s  perform  shut down, a c c e l e r a t i o n ,  r e v e r s i n g . During system s t a r t up,  i s o f t e n n e c e s s a r y to t u r n on power s u p p l i e s  a defined  order  a c t i v e before filter  contactor  i n the i n v e r t e r i n  t h e i r c o n t r o l s i g n a l s become v a l i d .  c a p a c i t o r may  to apply  power to the DC bus  A l s o , the  during  be  i n order  i n v e r t e r operation.  the c o n t r o l l e r must f i r s t  then a c c e l e r a t e  drive  For  speed forward  decelerate  motor to a stop at a c o n t r o l l e d r a t e , then r e v e r s e phase sequence, and  to  performed.  i n s t a n c e , i f the d r i v e i s commanded to go from f u l l speed r e v e r s e ,  DC  the main  S i m i l a r l y , shut down of the  t h a t a sequence of o p e r a t i o n s  Sequencing i s a l s o r e q u i r e d  to f u l l  become  have to be precharged b e f o r e  prevent l a r g e i n r u s h c u r r e n t s . requires  f o r example,  so t h a t the i n v e r t e r switches do not  i s closed  the  to take the d r i v e through i t s v a r i o u s  modes such as s t a r t up,  d e c e l e r a t i o n , and  bus  protection  system management and  operations  it  and  the  the i n v e r t e r  the motor a t a c o n t r o l l e d  r a t e to the maximum speed.  58  The torque/speed c o n t r o l f u n c t i o n s loop  control strategy  implement the o v e r a l l  f o r the d r i v e .  These f u n c t i o n s  closed  accept  feedback s i g n a l s from sensors such as tachometers and they receive control setpoints  from the system management  functions.  The d i f f e r e n c e between the s e t p o i n t and the feedback v a l u e i s applied  to a c o n t r o l a l g o r i t h m .  The c o n t r o l a l g o r i t h m produces  s e t p o i n t v a l u e s f o r the i n v e r t e r frequency and v o l t s / H z which a r e sent  to the PWM  waveform g e n e r a t i o n  ratio  functions.  DC  11  Limiter Signal Conditioning  Voltage Command  Volts/Hz ^ Command ~  Pulse Width Modulator  Accelerator Pedal  P.W.M. Inverter  Stator Frequency. Command  II  Slip Frequency Rotor Frequency Calculator  Induction Motor  Rotor * 1 Frequency V Optical Shaft Encoder Pulse?  Figure  17  C o n t r o l Loop f o r C o n t r o l l e d  Slip  As an example of a t y p i c a l c o n t r o l l o o p , c o n s i d e r s l i p d r i v e shown i n b l o c k  Volts In  diagram form i n F i g u r e  Drive  the c o n t r o l l e d 17.  This  drive  has been used as a t r a c t i o n d r i v e i n an e l e c t r i c v e h i c l e [ 4 8 ] .  59  The c o n t r o l l e r measures the r o t o r frequency u s i n g an s h a f t encoder and adds a c o n s t a n t s l i p s t a t o r frequency s e t p o i n t .  optical  frequency to produce  the  The c o n t r o l l e r r e c e i v e s a v o l t s / H z  s e t p o i n t s i g n a l from a p o t e n t i o m e t e r a t t a c h e d to the v e h i c l e a c c e l e r a t o r p e d a l . The v o l t s / H z s i g n a l i s l i m i t e d so t h a t i t cannot exceed a value which would r e s u l t of the motor.  i n magnetic  saturation  In t h i s simple c o n t r o l l o o p , motor torque i s  c o n t r o l l e d by the v o l t s / H z r a t i o s e t by the a c c e l e r a t o r p e d a l . Motor speed w i l l i n c r e a s e u n t i l  the motor torque i s balanced by  the l o a d t o r q u e .  The PWM  waveform g e n e r a t i o n f u n c t i o n s produce  the c o n t r o l  t h a t cause the i n v e r t e r switches to t u r n on and o f f .  signals  The  f u n c t i o n s must accept s e t p o i n t s f o r the i n v e r t e r output frequency and v o l t s / H z r a t i o and then a p p l y a modulation technique such as the t r i a n g l e i n t e r c e p t t e c h n i q u e to produce the d e s i r e d frequency and v o l t a g e .  an output waveform of  S i n c e the c o n t r o l l e r must  c o n t r o l s i x i n v e r t e r switches a t s w i t c h i n g f r e q u e n c i e s which be s e v e r a l k i l o h e r t z , the PWM  may  g e n e r a t i o n f u n c t i o n s must be v e r y  fast.  Due  to l i m i t a t i o n s of the s w i t c h i n g d e v i c e s i n the i n v e r t e r ,  PWM  f u n c t i o n s must a l s o ensure that c e r t a i n t i m i n g requirements  are met  by the generated c o n t r o l s i g n a l s .  the  For example, the  s w i t c h i n g frequency must n o r m a l l y be kept below the l i m i t a t which d e v i c e s w i t c h i n g l o s s e s b e g i n to overheat the d e v i c e .  At  the same time i t i s d e s i r a b l e t o keep the s w i t c h i n g frequency as  60  c l o s e to the l i m i t as p o s s i b l e so t h a t the waveform harmonics a r e at the h i g h e s t p o s s i b l e frequency. s w i t c h must normally  In t h y r i s t o r i n v e r t e r s , a  be on f o r a c e r t a i n minimum l e n g t h of time  i n order to ensure t h a t the commutation c i r c u i t s can recharge f o r the next  commutation.  Thus the PWM  g e n e r a t i o n f u n c t i o n s must  e l i m i n a t e a l l c o n t r o l p u l s e s s h o r t e r than t h i s minimum F i n a l l y , the PWM  time.  g e n e r a t i o n f u n c t i o n s must i n s e r t d e l a y s between  the t u r n i n g o f f of one s w i t c h i n a l e g of the i n v e r t e r and the t u r n i n g on of the o t h e r s w i t c h i n the l e g to ensure t h a t no conduction  The  overlap  occurs.  c o n t r o l p a n e l i n t e r f a c e f u n c t i o n s r e p r e s e n t those  that communicate w i t h t h e " o u t s i d e w o r l d " .  functions  In a c o n v e n t i o n a l  i n d u s t r i a l d r i v e they read s e t p o i n t s from potentiometers switches  and  on a c o n t r o l p a n e l and send i n f o r m a t i o n to i n d i c a t o r  lamps, meters, and d i s p l a y s on the p a n e l . such as the submersible  In embedded d r i v e s  t h r u s t e r s , they handle the communication  between the i n v e r t e r c o n t r o l l e r and the system t h a t i s s u p p l y i n g the c o n t r o l commands.  The m o n i t o r i n g  and p r o t e c t i o n f u n c t i o n s monitor the i n v e r t e r and  take p r o t e c t i v e a c t i o n i f c o n d i t i o n s occur which may cause damage to the d r i v e .  The a c t i o n s must be t a i l o r e d  to the f a u l t  c o n d i t i o n . F o r example, i f a l a r g e and r a p i d l y i n c r e a s i n g o v e r c u r r e n t , i n d i c a t i v e of a s h o r t c i r c u i t , i s d e t e c t e d , the i n v e r t e r must be immediately moderate o v e r c u r r e n t  shut down.  On the other hand, i f a  i s d e t e c t e d when the d r i v e i s a c c e l e r a t i n g ,  61  i n d i c a t i v e of too r a p i d a c c e l e r a t i o n ,  the a p p r o p r i a t e  action i s  to reduce the r a t e of a c c e l e r a t i o n .  The m o n i t o r i n g and p r o t e c t i o n  functions  may a l s o perform  checks on the c o n t r o l l e r and perform d i a g n o s t i c s a drive f a u l t . diagnostic  For i n s t a n c e ,  functions  3.4  Inverter  i n the event of  i f the i n v e r t e r shuts down, the  w i l l i n d i c a t e what c o n d i t i o n s  shutdown on a c o n t r o l p a n e l  caused the  display.  C o n t r o l l e r Design  Alternatives  The c o n t r o l l e r s i n many i n v e r t e r s  currently  i n production are  based on a mix of CMOS l o g i c c i r c u i t s and analog  integrated  c i r c u i t s . F o r the p a s t s e v e r a l years however, r e s e a r c h development has c e n t r e d  self  and  on m i c r o p r o c e s s o r based d e s i g n s .  Some of  these new m i c r o p r o c e s s o r based c o n t r o l l e r s a r e b e g i n n i n g t o appear i n p r o d u c t i o n  [49],  M i c r o p r o c e s s o r based c o n t r o l l e r s a r e a t t r a c t i v e because they a l l o w more r e l i a b l e and f l e x i b l e c o n t r o l l e r s to be b u i l t a t a lower c o s t . The i n c r e a s e d  reliability  of LSI components f o r the s m a l l previously.  The r e d u c t i o n  interconnections in f l e x i b i l i t y  comes from the s u b s t i t u t i o n  scale integrated  i n component  circuits  count and number of  r e s u l t s i n a more r e l i a b l e system. comes from the a b i l i t y  The  increase  to change c o n t r o l l e r  c h a r a c t e r i s t i c s by a l t e r i n g the m i c r o p r o c e s s o r software than making m o d i f i c a t i o n s  used  t o hardware.  62  rather  Since a m i c r o p r o c e s s o r  based c o n t r o l l e r uses l e s s components than a c o n t r o l l e r based small scale i n t e g r a t e d c i r c u i t s , i t i s normally cheaper to manufacture.  However, the c o s t of  development must be c o n s i d e r e d  on  considerably  software  when comparing the c o s t of a  m i c r o p r o c e s s o r based c o n t r o l l e r to the c o s t of a c o n t r o l l e r based s t r i c t l y on hardware.  Since  the d e s i g n  f l e x i b l e and design  requirements f o r our p r o j e c t emphasized a  r e l i a b l e i n v e r t e r c o n t r o l l e r , one  d e c i s i o n s was  of the  first  to base the c o n t r o l l e r on a microcomputer.  With t h i s d e c i s i o n made, i t i s n e c e s s a r y to p a r t i t i o n  the  c o n t r o l l e r functions  to  c a r r i e d out  between those f u n c t i o n s  e n t i r e l y by  be c a r r i e d out microcomputer.  small,  software and  t h a t are  those f u n c t i o n s  by a u x i l i a r y hardware under c o n t r o l of Some f u n c t i o n s  sequencing f u n c t i o n s and  be  t h a t are the  such as the system management  and  the c o n t r o l p a n e l i n t e r f a c e f u n c t i o n s  are w e l l s u i t e d to a software implementation. Others, such as torque/speed c o n t r o l f u n c t i o n s ,  the system p r o t e c t i o n  and  functions, require a closer  the PWM  to  waveform g e n e r a t i o n  examination of the t r a d e o f f s between software and  the  functions,  hardware  implementation.  3.5  Torque and  Speed  Control  Torque/speed c o n t r o l f u n c t i o n s  have t r a d i t i o n a l l y been implemented  as analog feedback c o n t r o l loops w i t h o p e r a t i o n a l a m p l i f i e r c i r c u i t s p r o v i d i n g p r o p o r t i o n a l or p r o p o r t i o n a l p l u s i n t e g r a l  63  c o n t r o l . These c i r c u i t s  are simple and have more than enough  bandwidth f o r motor c o n t r o l a p p l i c a t i o n s . implementation  i s inherently parallel;  Moreover, an  analog  m u l t i p l e feedback loops  can be c l o s e d or feedback s i g n a l s can be f i l t e r e d  simply  adding more components.  tend to d r i f t  w i t h time and o n l y one  However, analog  temperature.  c o n t r o l scheme.  r e d e s i g n and  A l s o , they are designed Adopting  to implement  c o n t r o l scheme r e q u i r e s  A software  based  control  c o n t r o l a l g o r i t h m s , i s d r i f t f r e e and  changed simply by reprogramming. d u p l i c a t e the bandwidth and circuit  a new  r e w i r i n g of the c i r c u i t .  loop, using d i g i t a l  circuits  by  with algorithms  be  However i t i s d i f f i c u l t to  i n h e r e n t p a r a l l e l i s m of the  running on a s i n g l e  F o r t u n a t e l y the bandwidth requirements loops are f a i r l y low.  can  analog  processor.  of many motor c o n t r o l  For example, as d i s c u s s e d i n the  c h a p t e r , the open loop speed response  previous  of a loaded i n d u c t i o n motor  i s dominated by a s i n g l e e l e c t r o m e c h a n i c a l time c o n s t a n t .  This  time c o n s t a n t i s on the o r d e r of 20 to 60 m i l l i s e c o n d s f o r a s m a l l ( 3 to 15 horsepower ), unloaded i n c r e a s e to s e v e r a l times  machine  [50] and  will  t h i s v a l u e when the machine i s loaded.  Assuming t h a t the c l o s e d loop bandwidth of a speed c o n t r o l doesn't  exceed the motor's open loop bandwidth, the loop  bandwidth w i l l be on the o r d e r of 5 to 10 H e r t z . response, at  loop  sample r a t e s f o r d i g i t a l  10 to 20 times  c o n t r o l l o o p s are u s u a l l y s e t  the loop bandwidth  [51, 52].  i n t e r v a l of 5 to 20 m i l l i s e c o n d s can be expected control loop.  For good  Thus a sample f o r a speed  T h i s i s not beyond the c a p a b i l i t i e s of a  64  m i c r o p r o c e s s o r , p a r t i c u l a r l y i f the c o n t r o l a l g o r i t h m i s kept simple.  In our case, the i n v e r t e r c o n t r o l l e r i s intended f o r use i n a v a r i e t y of a p p l i c a t i o n s . c o n t r o l requirements the f l e x i b i l i t y  It i s d i f f i c u l t  to p r e d i c t e x a c t l y the  of each p o t e n t i a l a p p l i c a t i o n .  i n h e r e n t i n the software based  very a t t r a c t i v e .  As a r e s u l t  i t was  Therefore,  c o n t r o l loop i s  decided t h a t the b a s i c  c o n t r o l l e r would c o n t a i n no analog c o n t r o l l o o p s .  I n s t e a d , an  analog to d i g i t a l c o n v e r t e r would be i n c l u d e d to a c c e p t feedback  and  s e t p o i n t s i g n a l s and  the feedback  analog  c o n t r o l would  be  c a r r i e d out by programs i n the m i c r o p r o c e s s o r .  3.6  System P r o t e c t i o n  Whether a p a r t i c u l a r system p r o t e c t i o n f u n c t i o n can be handled the m i c r o p r o c e s s o r determined  or must be performed  by the n a t u r e of the f a u l t  supposed to d e a l w i t h and fault  by  by e x t e r n a l c i r c u i t r y i s  c o n d i t i o n the f u n c t i o n i s  by the d e s i g n of the i n v e r t e r .  Common  c o n d i t i o n s t h a t the p r o t e c t i o n f u n c t i o n s must d e a l w i t h  are the  following:  a) I n v e r t e r shoot  through  or motor s h o r t c i r c u i t .  An  inverter  shoot through o c c u r s when both s w i t c h i n g d e v i c e s i n one the i n v e r t e r a r e on s i m u l t a n e o u s l y . d e f e c t i v e device or i n c o r r e c t or motor s h o r t c i r c u i t  l e g of  T h i s can occur because of a  switching s i g n a l s .  A shoot  through  i s c h a r a c t e r i z e d by a very r a p i d r i s e i n  65  c u r r e n t through one inverter.  The  or more of the s w i t c h i n g d e v i c e s  i n the  magnitude of the c u r r e n t i s l i m i t e d o n l y by  the  impedance of the w i r i n g .  b) Open motor phase.  I f a motor phase i s opened d u r i n g  the c u r r e n t i n the other phases i n c r e a s e s and i n v e r t e r switches and  thus some of  w i l l carry increased current.  magnitude of the f a u l t  operation,  The  the  r a t e of  rise  c u r r e n t are not as l a r g e as f o r a s h o r t  circuit.  c) Motor o v e r l o a d .  The  motor can draw a c u r r e n t g r e a t e r than  i n v e r t e r r a t i n g i f the motor i s loaded  beyond the d r i v e ' s r a t i n g  or i f the motor a c c e l e r a t i o n or d e c e l e r a t i o n r a t e i s too  high.  The  the  r a t e of r i s e of c u r r e n t i s l i m i t e d by the speed t h a t  motor s l i p  d) Bus  frequency  overvoltage  changes.  on r e g e n e r a t i o n .  When i n e r t i a l  loads  are  d e c e l e r a t e d , the k i n e t i c energy of the l o a d i s regenerated on to the DC  bus  of the i n v e r t e r .  Otherwise the energy  simply  capacitor u n t i l  into charging  the bus  back  T h i s energy must e i t h e r be  d i s s i p a t e d or f e d back to the AC bus. go  the  filter  the  will bus  v o l t a g e i s h i g h enough to cause a breakdown i n some component.  e) I n v e r t e r o v e r h e a t i n g . or a f a i l u r e  Improper i n s t a l l a t i o n of the i n v e r t e r  i n the c o o l i n g system can cause the i n v e r t e r to  overheat.  66  The normal p r o t e c t i v e a c t i o n when a shoot or  through, motor s h o r t ,  open motor phase o c c u r s , i s to t u r n the i n v e r t e r switches o f f  as r a p i d l y as p o s s i b l e . time and  I f the f a u l t  c u r r e n t s have a s h o r t  the i n v e r t e r switches a r e t r a n s i s t o r s or power MOSFETs,  the i n v e r t e r must be switched o f f i n a few microseconds to prevent  damage to the s w i t c h i n g d e v i c e s .  an i n t e r r u p t i n p u t i t i s d i f f i c u l t respond  rise  this quickly.  i n order  Even w i t h the use  f o r a microprocessor  to  Therefore external protective c i r c u i t s  r e q u i r e d to d e a l w i t h these f a u l t s .  of  are  However, a s i g n a l must be  sent to the m i c r o p r o c e s s o r , i n f o r m i n g i t of the o c c u r r e n c e  of the  fault.  In the case of a motor o v e r l o a d , the speed have to be as f a s t lower and  this and  s i n c e the r a t e of r i s e of f a u l t  the magnitude of the f a u l t  r e q u i r e d response  of response  does not  current i s  c u r r e n t i s lower.  The  depends on the exact nature of the f a u l t .  case the m i c r o p r o c e s s o r  can monitor  the motor l i n e c u r r e n t  take the a p p r o p r i a t e c o r r e c t i v e a c t i o n .  Alternatively, i f  the m o n i t o r i n g of motor c u r r e n t consumes too much p r o c e s s o r external c i r c u i t s and is  can be used  In  time,  to compare motor c u r r e n t to a l i m i t  send an i n t e r r u p t s i g n a l to the m i c r o p r o c e s s o r  i f the  limit  exceeded.  When an AC d r i v e i s r e g e n e r a t i n g , the r a t e of r i s e of v o l t a g e on the DC bus filter  i s l i m i t e d by the bus  filter  capacitor.  c a p a c i t o r i s n o r m a l l y q u i t e l a r g e and  s u b s t a n t i a l s a f e t y margin on the bus v o l t a g e .  The  bus  there i s normally a As a r e s u l t  there  i s ample time f o r the m i c r o p r o c e s s o r to take p r o t e c t i v e  action  once i t d e t e c t s t h a t the bus v o l t a g e has exceeded a l i m i t . an e x t e r n a l c i r c u i t  Again,  t h a t i n t e r r u p t s the m i c r o p r o c e s s o r when the  bus v o l t a g e exceeds the l i m i t can be used  i f the  continuous  m o n i t o r i n g of bus v o l t a g e p l a c e s too much of a demand on p r o c e s s o r time.  Overheating occurs very s l o w l y when compared to the time over which the o t h e r f a u l t c o n d i t i o n s can o c c u r . the m i c r o p r o c e s s o r can handle e a s i l y by sampling seconds  span  As a r e s u l t ,  the p r o t e c t i o n f u n c t i o n q u i t e  the i n v e r t e r temperature  once every  few  and t u r n i n g the i n v e r t e r o f f i f the temperature  exceeds  a maximum l i m i t .  3.7  P u l s e Width M o d u l a t i o n  The p u l s e width modulation to the m i c r o p r o c e s s o r . p u l s e w i d t h modulation  f u n c t i o n s p r e s e n t more of a c h a l l e n g e  C o n s i d e r the software  intensive  scheme shown i n F i g u r e 18.  The  microcomputer programs the programmable t i m e r so that i t generates an output w i t h a frequency 360 times the output frequency of the i n v e r t e r .  The programmable timer t h e r e f o r e  i n t e r r u p t s the microcomputer 360 output waveform.  times per c y c l e of the  Each time the microcomputer i s i n t e r r u p t e d , i t  sends the s w i t c h i n g p a t t e r n f o r the next i n t e r v a l of the output waveform to the p a r a l l e l output p o r t . t h i s PWM  inverter  scheme i s one degree  The  inverter  r e s o l u t i o n of  s i n c e a l l p u l s e s must be m u l t i p l e s  68  of one  degree ( l/360th of a c y c l e ) l o n g .  coarse  r e s o l u t i o n f o r a PWM  on the m i c r o p r o c e s s o r  Within  waveform. N e v e r t h e l e s s ,  are q u i t e severe.  of 60 H e r t z , the p r o c e s s o r  the demands  interval.  [53]  the  determine the s w i t c h i n g p a t t e r n f o r the next  In a d d i t i o n , some time must be r e s e r v e d  f o r the  Casteel  j u s t d e s c r i b e d would only operate  p r e - c a l c u l a t e d and  s t o r e d i n memory and  PWM to  55  no f u n c t i o n s other  than PWM  waveform  the c o n t r o l l e r performed  generation.  -A -A"  Data  -J3  -B -C •C  Interrupt Input Parallel Output Port Data  Clock  and  d e s p i t e the f a c t t h a t a l l the s w i t c h i n g waveforms were  Microcomputer  j~i_n_n  other  found t h a t an I n t e l 8080 based c o n t r o l l e r u s i n g a  scheme s i m i l a r to the one Hertz  must  s w i t c h i n g p a t t e r n to  f u n c t i o n s t h a t the i n v e r t e r c o n t r o l l e r must perform. Hoft  frequency  46 microseconds.  the 46 microsecond i n t e r v a l the m i c r o p r o c e s s o r  p o r t , and  relatively  At an i n v e r t e r  i s i n t e r r u p t e d every  s e r v i c e the i n t e r r u p t , send the new output  This i s a  Programmable Timer Timer Out  Figure  18  Software I n t e n s i v e PWM  Waveform Generator  Switching Signals To Inverter  O b v i o u s l y some of the PWM  waveform g e n e r a t i o n must be performed  by  a u x i l i a r y hardware, p a r t i c u l a r l y s i n c e i n v e r t e r output f r e q u e n c i e s up t o 400 H e r t z a r e r e q u i r e d .  One  approach  programmable t i m e r s to generate the PWM f o r one such system  i s shown i n F i g u r e  i s to make use of  pulses.  The b l o c k  diagram  19.  Freq. Gen. Counter  CLOCK  Phase A Counter  Delay Time  ••A Upper -•A Lower  Phase B Counter  Delay Time  - * B Upper  Delay Time  -•C Upper  »  -*B  Lower  Microcomputer. Phase C Counter  Interrupt Input  -#C  Lower  Interrupt Counter  Am 9513  Figure  The  19  Counter/Timer  c o u n t e r / t i m e r 1C used  Devices Am  9513.  Programmable Counter/Timer  Based PWM  Waveform  Generator  i n t h i s d e s i g n i s the Advanced M i c r o  The c o u n t e r s i n t h i s d e v i c e can be s e t up  t h a t each counter i s loaded a l t e r n a t e l y from one of two  so  registers  upon r e a c h i n g t e r m i n a l count. In a d d i t i o n the counter output  line  t o g g l e s a t each t e r m i n a l count.  T h i s allows the counters to be  used as p u l s e w i d t h modulators.  One  r e g i s t e r i s l o a d e d w i t h the  70  "on time" of the p u l s e and the o t h e r r e g i s t e r i s loaded w i t h the " o f f time", producing PWM  waveforms such as those shown i n F i g u r e  20.  Phase A  Register 1 Count  Phase B  Register 2 Count  Register 1 Count  Phase C  Register 2 Count  Register 2 Count  Register 1 Count  Interrupt  x  Figure 20  Load New Values  NT  Count  ^Load New Count Values  Programmable Counter/Timer  In o r d e r to v a r y the duty c y c l e of the PWM of the the fundamental  Output Waveforms  waveform over a c y c l e  frequency, the m i c r o p r o c e s s o r i s  i n t e r r u p t e d by the i n t e r r u p t counter which generates p u l s e s a t the c a r r i e r frequency of the PWM the m i c r o p r o c e s s o r l o a d s new registers. Frequency  waveform.  On each  interrupt,  duty c y c l e v a l u e s i n t o the counter  The i n v e r t e r output f r e q u e n c y i s determined  by the  Generator counter which i s programmed to s u p p l y a c l o c k  waveform which has a frequency which i s a m u l t i p l e of the i n v e r t e r output f r e q u e n c y .  T h i s c l o c k frequency i s then counted  71  by the Phase Counters I n t e r u p t Counter PWM  which generate  which generates  s i g n a l s generated  s i g n a l s and  the  the p r o c e s s o r i n t e r r u p t s .  by the c o u n t e r / t i m e r IC have o n l y  s t a t e s which means t h a t one be on.  the PWM  The  two  s w i t c h i n an i n v e r t e r l e g must always  As a r e s u l t , e x t r a c i r c u i t s must be added to i n s e r t  dead time r e q u i r e d between the t u r n i n g o f f of one i n v e r t e r l e g and  In t h i s PWM  the  s w i t c h i n an  the t u r n i n g on of the o t h e r s w i t c h .  g e n e r a t i o n t e c h n i q u e , the m i c r o p r o c e s s o r must  at a r a t e determined  by the c a r r i e r frequency  waveform. In t h y r i s t o r based  of the  respond  PWM  i n v e r t e r s , the c a r r i e r frequency i s  u s u a l l y kept below one k i l o h e r t z and  the p r o c e s s o r has a  reasonable amount of time between i n t e r r u p t s to perform  other  tasks.  switches,  I n v e r t e r s u s i n g t r a n s i s t o r s or power MOSFETs as  on the o t h e r hand, may k i l o h e r t z or more. which can be devoted  have maximum s w i t c h i n g f r e q u e n c i e s of 5  In t h i s case the time between i n t e r r u p t s to o t h e r t a s k s becomes r a t h e r s h o r t . D e s p i t e  t h i s problem, s e v e r a l modulators  u s i n g programmable timers i n  c o n j u n c t i o n w i t h a m i c r o p r o c e s s o r have been d e s c r i b e d i n the literature  [54, 55,  s w i t c h i n g frequency kilohertz. PWM  56].  For most of these d e s i g n s , the  i s l i m i t e d to a maximum of l e s s than  In a d d i t i o n , many of them are designed  modulators  inverter two  strictly  s i n c e t h e r e i s n ' t enough p r o c e s s i n g time  as  available  to c a r r y out the o t h e r f u n c t i o n s of an i n v e r t e r c o n t r o l l e r .  In  t h a t case, the c o n t r o l l e r becomes a m u l t i m i c r o p r o c e s s o r system w i t h one m i c r o p r o c e s s o r d e d i c a t e d to the g e n e r a t i o n of the s i g n a l s and  one  or more other m i c r o p r o c e s o r s  72  PWM  d e d i c a t e d to the  o t h e r c o n t r o l l e r f u n c t i o n s [57].  Such an approach can  e x c e l l e n t performance but i s l i k e l y f o r the submersible  An a l t e r n a t i v e PWM  drive  deliver  to be too l a r g e and  complex  application.  scheme i s shown i n F i g u r e 21.  In t h i s  case  the s w i t c h i n g waveform f o r an e n t i r e c y c l e i s s t o r e d i n r e a d / w r i t e memory as a b i t p a t t e r n .  T h i s b i t p a t t e r n i s then  read out of memory to the i n v e r t e r switches a t a r a t e p r o p o r t i o n a l to the d e s i r e d i n v e r t e r output p r o v i d i n g two banks of memory, one  frequency.  By  bank can be g e n e r a t i n g the  i n v e r t e r s w i t c h i n g s i g n a l s w h i l e the other bank i s being w i t h a new  waveform by the  T h i s approach has  loaded  microprocessor.  the advantage t h a t the m i c r o p r o c e s s o r o n l y has  to update the waveform when a change i n i n v e r t e r output v o l t a g e is required.  Thus, when the i n v e r t e r i s running a t c o n s t a n t  frequency, the p r o c e s s o r i s f r e e to c a r r y out other t a s k s . m i c r o p r o c e s s o r must generate new changing  frequency  waveforms when the i n v e r t e r i s  i n o r d e r to m a i n t a i n the v o l t s / H z r a t i o  there i s no a b s o l u t e requirement Slow m i c r o p r o c e s s o r  response  f o r i n v e r t e r output  frequency.  on p r o c e s s o r response  time.  frequency  i s determined  the l e n g t h of the waveform s t o r a g e memory and by i t s access assume the memory i s 2048 l o c a t i o n s l o n g and  time between accesses  but  simply r e s u l t s i n a low slew r a t e  The maximum p o s s i b l e i n v e r t e r output  If we  The  time.  the minimum  to s u c c e s s i v e l o c a t i o n s i s 500  73  by  nanoseconds,  Used To Select Source Of Waveform Memory Addresses  Programmable Counter/Timer  Memory Dota Outputs  Inverter Output Frequency Command  MicroProcessor  Figure  21  M e m o r y I n t e n s i v e PWM Waveform G e n e r a t o r  Used To Select Waveform Ram Which Contains Current Waveform  then the minimum l e n g t h of one i n v e r t e r output microseconds.  c y c l e i s 1024  T h i s corresponds to an i n v e r t e r output  of approximately  frequency  one k i l o h e r t z .  The l e n g t h of the the waveform s t o r a g e memory determines the r e s o l u t i o n p o s s i b l e i n the i n v e r t e r s w i t c h i n g i n t e r v a l s . example, a memory with  2048 l o c a t i o n s p r o v i d e s a r e s o l u t i o n of  0.176 degrees i n the i n v e r t e r s w i t c h i n g angles minimum p u l s e w i d t h the fundamental.  For  t h a t i s approximately  and a l l o w s a  .0005 of the p e r i o d of  T h i s k i n d of r e s o l u t i o n i s more than adequate  over most of the i n v e r t e r o p e r a t i n g range but, s u r p r i s i n g l y , not  be good enough a t low output  where the i n v e r t e r output switching  frequencies.  frequency  ( c a r r i e r ) frequency  allows  i s 1000 H e r t z .  There w i l l be 200  waveform.  on one of t e n (2048/200) d i s c r e t e widths.  coarse  c o n t r o l of the output  w i t h s h o r t access  times,  the case  i s 5 Hertz and the d e s i r e d  p u l s e s per c y c l e of the i n v e r t e r output o n l y take  Consider  may  voltage.  Each p u l s e can This  By u s i n g  the l e n g t h of the waveform  only  memories  storage  memory can be i n c r e a s e d s u b s t a n t i a l l y (up to 16384 l o c a t i o n s ) while  still  a l l o w i n g i n v e r t e r o p e r a t i o n to 400 or 500 H e r t z .  This a l l e v i a t e s frequencies  the r e s o l u t i o n problem at low i n v e r t e r output  but a l s o i n c r e a s e s the time r e q u i r e d to l o a d a new  waveform i n t o the waveform memory.  A number of PWM scheme  c o n t r o l l e r s based on some v a r i a t i o n of the b a s i c  j u s t d i s c u s s e d have been d e s c r i b e d  [58, 59, 6 0 ] .  Probably  the p r i n c i p a l drawback to a l l of them i s the l a r g e number of  75  components r e q u i r e d to implement t h i s  technique.  At an e a r l y stage i n the development of the c o n t r o l l e r f o r the submersible d r i v e , a p r o t o t y p e PWM j u s t d e s c r i b e d was  waveform g e n e r a t o r of the type  c o n s t r u c t e d i n o r d e r to g a i n some f a m i l i a r i t y  w i t h t h i s technique and  to e v a l u a t e i t s s u i t a b i l i t y  submersible d r i v e a p p l i c a t i o n .  The p r o t o t y p e was  f o r the  c o n s t r u c t e d on  an I n t e l SDK-85 microcomputer e v a l u a t i o n board which uses I n t e l 8085 m i c r o p r o c e s s o r .  Schematics  f o r the PWM  p o r t i o n s of the c i r c u i t a r e shown i n F i g u r e s waveform memory banks each c o n s i s t as 1024 is  generator  22 and  23.  The  two  of t h r e e IK x 1 RAMs o r g a n i z e d  l o c a t i o n s c o n t a i n i n g t h r e e b i t s each.  The memory l e n g t h  too s h o r t f o r good r e s o l u t i o n at low i n v e r t e r  f r e q u e n c i e s but was  the  output  c o n s i d e r e d adequate f o r i n i t i a l  experimentation.  The RAM  bank t h a t i s c u r r e n t l y s u p p l y i n g the i n v e r t e r s w i t c h i n g  s i g n a l s i s addressed by a 10 b i t counter formed from 74LS163 b i n a r y c o u n t e r s . The counter i s c l o c k e d by a frequency synthesizer c i r c u i t  c o n s i s t i n g of a CD4046 phase l o c k e d loop and  an I n t e l 8253 c o u n t e r / t i m e r .  A frequency s y n t h e s i z e r i s used  t h a t the output frequency can be changed i n s m a l l f i x e d increments.  In t h i s d e s i g n the increment was  0.5  Hz.  so  size Using a  simple programmable counter as a frequency g e n e r a t o r would  result  i n poor frequency r e s o l u t i o n a t h i g h e r output f r e q u e n c i e s where the counter i s l o a d e d w i t h s m a l l d i v i s o r s .  76  >1  u, < i7 14 13 a » » j  Vcc  •'• M f i  Vcc  A. it |5 14 13 iz H 10 4046  9  ( S )  1 2 ? 4 ?6 7 6 u u y V  TTTT  4DK.-85" DATA  I©®:  07  (j  K DSC  W( DJC  02C DI C  e  Vcc  8253  A7 1 1 u;uii  A4 A">  T T  CA4  T T 1  (?) 7  i C 10 II 14 i y 74L<,l'j7  9  T T  CAB  r I  T T~  5 1  5 2 •} C 10 4  I  Al A* ~X~ "X CA9 CA<t> CAI  A8 A9  A6.  i  -  T  5 <• 10 II 14 1}  74LSIS7  ©  4  IA7  IA&  7  9  AZ "X"  0 2 CA3  CA5 f I I T  (T)  74L<>^7 4  7 .9  * 2.5  A*. "X~ CJft CA^  4  "5 ADOEE&S. Bili  IZ  7  1  © — = £ :  OPER.No.  DATE  REVISION  OPER.No.  IA^  IA4  DATE  REVISION  MAKHI7 MAf I4/«I  IAS  IA<) 2A4> 2AI  2AZ 2A^ 2A4  KEY PROCESS OPERATION SEQUENCE  TOOLING  RELATIONSHIP  EEV.FW. K.ktAuflH C A -  ZAU  2A5  (BAUtuvrrtvH)  12. •'  ®  ELEMENTS  ELEMENTS  COHUECTfeO T O V c c  PREPARED BY AKCHIDB  DATE  ORIG. ISSUE  APPROVED BY  DATE  SHEET  FREQUENCY &  Figure  22  P r o t o t y p e PWM W a v e f o r m Part 1  C0UU6CTED TO <^UP.  2A7 2Afc 2A<)  OPERATION ELEMENTS  A D D R E S S  Generator  •  BIT 1 oF Feer4>  (?) 9  J © |Ad> U l IA2.  3  More. FOE AIL 'CW)7'l  <» 1011 14 n  741.^1-j 7  12-  IO/M 50t-9? CUTEL RU^  EST  A7 AS  T T  (s) :  7^-85 -Vc*.  (M. CAT  CA4  T 5 2 5 C 10 |l 14 1}  12-  —  - A4> J  ~x~ X T  1 1  A7 S*-85 _AD0eEK> Blft  - BD SPt-65 CJJTEL BU*  AC  A5  A} A4  7400  2+ 29 22 21 lO . 14 IB 17 14 15 14 '3  2.  OF ^  OPER. NO. SYNTHESIZER GENERATION  OPER.No.  DATE  REVISION  OPER.No.  DATE  REVISION  KEY PROCESS OPERATION SEQUENCE  MAY  TOOLING  PREPARED BY AfcOHIPE  RELATIONSHIP APPROVED BY  U  DATE  ORIG. ISSUE  DATE  SHEET  ELEMENTS  Figure  23  ELEMENTS  P r o t o t y p e PWM W a v e f o r m Part 2  ELEMENTS  VAYEfOELM EANf?  Generator  3  OF 5  OPER. NO.  OPERATION  AMD  OUTPUT  The  8085 m i c r o p r o c e s s o r  supplying  s e l e c t s the RAM bank that i s c u r r e n t l y  the i n v e r t e r s i g n a l s w i t h t h e BANKSWITCH s i g n a l .  This  s i g n a l c o n t r o l s a s e t of 74LS157 m u l t i p l e x e r s t h a t apply the counter and  outputs  apply  t o the c u r r e n t l y a c t i v e RAM bank's address  t h e 8085 address l i n e s to t h e o t h e r RAM bank.  lines  Another  74LS157 a p p l i e s a p p r o p r i a t e c o n t r o l s i g n a l s to the RAM banks.  The  RAM bank t h a t i s not c u r r e n t l y s u p p l y i n g t h e i n v e r t e r  s w i t c h i n g s i g n a l s i s s e t up so that t h e m i c r o p r o c e s s o r data to i t . The m i c r o p r c e s s o r  loads  t h e RAM bank w i t h t h e next  s w i t c h i n g p a t t e r n to be g e n e r a t e d . In t h i s d e s i g n , technique  employed i s the harmonic e l i m i n a t i o n  developed by P a t e l and H o f t .  can w r i t e  the PWM  technique  The r e q u i r e d s w i t c h i n g angles t o  e l i m i n a t e t h e 5th, 7th, and 11th harmonics w h i l e c o n t r o l l i n g t h e amplitude of t h e fundamental a t 5% i n t e r v a l s from 0 to 100% a r e listed  i n P a t e l ' s t h e s i s [61].  switching patterns output Due  waveform.  These v a l u e s were used to develop  f o r the f i r s t  90 degrees of the t h r e e phase  These 20 p a t t e r n s were then s t o r e d i n EPROM.  to t h e q u a r t e r and h a l f wave symmetry of the PWM  switching  p a t t e r n s , i t i s easy to generate t h e s w i t c h i n g p a t t e r n s remaining  f o r the  270 degrees of t h e t h r e e phase waveform from t h e s t o r e d  switching p a t t e r n f o r the f i r s t of r o t a t i o n must be r e v e r s e d ,  90 degrees.  When t h e d i r e c t i o n  t h e phase sequence of the generated  t h r e e phase waveform i s r e v e r s e d by l o a d i n g the s w i t c h i n g i n t o RAM i n descending o r d e r lowest  RAM  pattern  from the h i g h e s t RAM address to t h e  address.  79  The  PWM modulator was t e s t e d w i t h both t r a n s i s t o r and power  MOSFET i n v e r t e r s .  On the whole the performance was s a t i s f a c t o r y .  However, t h e r e were a few problems.  At low f r e q u e n c i e s  were h i g h peak c u r r e n t s i n the i n v e r t e r s w i t c h e s . to the f a c t 5th,  that the PWM  there  T h i s was due  technique chosen only e l i m i n a t e d the  7 t h , and 11th harmonics and e x e r c i s e d no c o n t r o l over the  remaining h i g h e r o r d e r harmonics. T h i s problem can be r e s o l v e d by adopting low  a PWM technique t h a t c o n t r o l s more of the harmonics a t  output f r e q u e n c i e s .  F o r example, the harmonic e l i m i n a t i o n  technique c o u l d be extended t o e l i m i n a t e the 5 t h , 7th, 13th,  17th, and 19th harmonics.  l o n g e r waveforn memory i n o r d e r  T h i s would probably  11th,  require a  t o a l l o w f o r the a d d i t i o n a l  r e s o l u t i o n r e q u i r e d i n the s w i t c h i n g  angles.  A l e s s t r a c t a b l e problem i s the amount of c i r c u i t r y r e q u i r e d t o implement t h i s PWM g e n e r a t o r .  The e q u i v a l e n t  ( i n board space) o f  a p p r o x i m a t e l y 30 16 p i n ICs were r e q u i r e d f o r the PWM T h i s does not i n c l u d e the m i c r o p r o c e s s o r components such as program s t o r a g e  generator.  and i t s a s s o c i a t e d  EPROM, RAM, and bus d r i v e r s .  A f t e r adding these components and the components r e q u i r e d t o support  the other  i n v e r t e r c o n t r o l l e r f u n c t i o n s , the t o t a l  count would probably c o n t r o l l e r with of the 218 mm.  approach t h e e q u i v a l e n t  chip  of 50 16 p i n ICs. A  t h i s many components would r e q u i r e two or t h r e e by 77 mm.  circuit  cards  t h a t a r e t o be used i n the  submersible.  The  i d e a l way t o reduce the c h i p count i s to i n t e g r a t e the PWM  80  g e n e r a t o r on to a s i n g l e c h i p . the i n v e r t e r c o n t r o l l e r was were not a v a i l a b l e a t UBC integrated c i r c u i t  At the time t h a t the d e s i g n of  started  ( S p r i n g of 1981),  facilities  f o r the d e s i g n and f a b r i c a t i o n of an  of the r e q u i r e d c o m p l e x i t y . PWM  circuits  that  were commercially a v a i l a b l e were designed f o r s w i t c h i n g power s u p p l i e s and were c o m p l e t e l y u n s u i t a b l e f o r t h r e e phase i n v e r t e r a p p l i c a t i o n s . I t appeared f o r the PWM  t h a t a r e l a t i v e l y h i g h component  g e n e r a t o r would have to be  accepted.  F o r t u n a t e l y , j u s t as the d e s i g n of an improved g e n e r a t o r j u s t d e s c r i b e d was  b e g i n n i n g , a PWM  v e r s i o n of the generator  designed s p e c i f i c a l l y f o r AC motor d r i v e a p p l i c a t i o n s announced.  count  PWM  IC  was  The HEF4752 AC Motor C o n t r o l l e r IC [62] i s  manufactured  by P h i l i p s and  i s distributed  i n North America  by  S i g n e t i c s . Samples of t h i s d e v i c e and a l l the a v a i l a b l e documentation suitability  on the d e v i c e were o b t a i n e d i n o r d e r to a s s e s s i t s  f o r our  application.  The d e v i c e has the f o l l o w i n g b a s i c f e a t u r e s :  a) I t uses a " r e g u l a r sampling" PWM  technique  [63].  This  a waveform and harmonic content s i m i l a r to t h a t produced t r i a n g l e i n t e r c e p t PWM  produces by  the  technique.  b) The c a r r i e r frequency to fundamental  frequency r a t i o i s changed  i n i n t e g e r s t e p s a t d i s c r e t e p o i n t s i n the output frequency i n o r d e r to keep the c a r r i e r frequency between a minimum and  81  range  maximum v a l u e .  This prevents  both very low c a r r i e r  frequencies  which would r e s u l t i n i n c r e a s e d harmonic c u r r e n t s and very h i g h c a r r i e r f r e q u e n c i e s which would r e s u l t  i n increased i n v e r t e r  switching l o s s e s .  c) S i g n a l s can be generated  t o c o n t r o l t h y r i s t o r i n v e r t e r s as w e l l  as t r a n s i s t o r and power MOSFET i n v e r t e r s .  d) Inputs  a r e a v a i l a b e to c o n t r o l the i n v e r t e r output  the v o l t s / H z r a t i o , the maximum c a r r i e r frequency,  frequency, the phase  sequence of the t h r e e phase waveform, and the delay between the s w i t c h i n g of the upper and lower d e v i c e s i n an i n v e r t e r l e g .  The maximum i n v e r t e r output  frequency  t h a t the d e v i c e can produce  i s s p e c i f i e d as 200 Hz i n the documentation.  However, i n t e s t s  on samples from two d i f f e r e n t p r o d u c t i o n l o t s , a l l d e v i c e s worked to output  On  f r e q u e n c i e s w e l l above 400 Hz.  the whole the HEF4752 seems to meet our needs admirably.  are o n l y two drawbacks t o the use of the d e v i c e . accept  the PWM s t r a t e g y chosen by the d e s i g n e r s  the d e v i c e i s n o t programmable.  F i r s t , one must of the IC s i n c e  However, the technique  very good r e s u l t s so t h i s i s o n l y a disadvantage  used g i v e s  i n research  a p p l i c a t i o n s where the e f f e c t s of d i f f e r e n t m o d u l a t i o n are being evaluated.  There  techniques  Since t h e i n v e r t e r c o n t r o l l e r i s designed  82  p r i m a r i l y f o r i n d u s t r i a l use,  t h i s i s not a severe handicap  i n our  case.  The  second problem i s t h a t the c o n t r o l s i g n a l s f o r the  output  frequency,  are f r e q u e n c i e s .  v o l t s / H z r a t i o , and maximum c a r r i e r For use  i n a microprocessor  would be b e t t e r i f the d e v i c e had  inverter frequency  based system i t  a parallel digital  input  i n s t e a d which would accept b i n a r y numbers as c o n t r o l i n p u t s . Such a d e v i c e has  been designed  a v a i l a b l e on the open market. frequency  by H i t a c h i  [64] but i t i s not  However, d i g i t a l l y  g e n e r a t o r s a r e r e l a t i v e l y easy  controlled  to d e s i g n so  this  i n t e r f a c i n g problem i s not a major o b s t a c l e to the use of  the  HEF4752.  Since the use of the HEF4752 PWM  generator  s u b s t a n t i a l r e d u c t i o n i n the c h i p count c o n t r o l l e r and the use was  a l s o reduces  IC r e s u l t s i n a  of the  the software  d e s i g n e f f o r t and  of the d e v i c e p r e s e n t s no s i g n i f i c a n t  d e c i d e d to base the PWM  c o n t r o l l e r on t h i s d e v i c e .  inverter  disadvantages, i t  g e n e r a t i o n p o r t i o n of the The  primary  since  inverter  r i s k with t h i s d e c i s i o n  i s t h a t the d e v i c e i s a v a i l a b l e o n l y from a s i n g l e s o u r c e . the d e v i c e were to be d i s c o n t i n u e d or i f the d e s i g n of the was  changed so t h a t i t no l o n g e r operated  c o n t r o l l e r would have to be c o m p l e t e l y  to 400 Hz,  redesigned.  the  If device  inverter  Since  the  a p p l i c a t i o n s of t h i s i n v e r t e r c o n t r o l l e r are i n s p e c i a l i z e d , volume a p p l i c a t i o n s i t i s p o s s i b l e to buy  enough of the  devices  i n advance to ensure a s u f f i c i e n t supply f o r s e v e r a l years  83  low  of  production.  3.8  Basic C o n t r o l l e r A r c h i t e c t u r e  With the b a s i c t r a d e o f f s made on what c o n t r o l l e r f u n c t i o n s  will  be performed by software and what f u n c t i o n s w i l l be performed by dedicated  hardware, i t i s p o s s i b l e t o develop a system  a r c h i t e c t u r e f o r the i n v e r t e r c o n t r o l l e r . shown i n F i g u r e  24.  a) Microcomputer.  This a r c h i t e c t u r e i s  The b a s i c components of the system a r e :  T h i s i s the h e a r t  of the c o n t r o l l e r and  c o n s i s t s of the m i c r o p r o c e s s o r , i t s c l o c k c i r c u i t , RAM, EPROM, and any r e q u i r e d b u f f e r c i r c u i t s .  I t also includes interrupt  i n p u t s f o r a r e a l - t i m e c l o c k and f o r f a u l t s i g n a l s from the inverter.  b) Real-time c l o c k . intervals. information.  T h i s i n t e r r u p t s the microcomputer  at regular  I t i s used i n c o n t r o l l e r f u n c t i o n s t h a t need  timing  F o r example,when the i n v e r t e r i s s t a r t e d , the DC  bus c a p a c i t o r must be a l l o w e d to charge through a r e s i s t o r f o r a defined  time b e f o r e  the main c o n t a c t o r a p p l i e s power t o the DC  bus.  c) A/D c o n v e r t e r .  T h i s i s used to a c c e p t i n p u t s such as c o n t r o l  s e t p o i n t s and s i g n a l s from the i n v e r t e r and motor.  d) P a r a l l e l i n p u t p o r t .  T h i s can be used e i t h e r as an i n p u t f o r  84  Real Time Clock  A/D Converter  Microcomputer Programmable Frequency Generator  CO  Microcomputer Data Bus  Pulse Width Modulator IC  Input Port Output Port  Opto-coupler Drivers  • Figure  24  f t f I f t  f i t ? Inverter  Controller  Architecture  p a r a l l e l b i n a r y d a t a from a h i g h e r l e v e l c o n t r o l l e r o r as i n p u t s f o r s w i t c h e s and o t h e r i n d i v i d u a l b i n a r y s i g n a l s .  e) P a r a l l e l output p o r t .  T h i s i s used as an o u t p u t f o r c o n t r o l  s i g n a l s f o r t h e PWM g e n e r a t o r  IC and f o r i n v e r t e r components such  as c o n t a c t o r s .  f ) Programmable frequency  generator.  T h i s s u p p l i e s t h e command  f r e q u e n c i e s f o r i n v e r t e r output f r e q u e n c y , maximum d e v i c e s w i t c h i n g frequency  v o l t s / H z r a t i o , and  t o t h e PWM g e n e r a t o r  IC under  c o n t r o l of the microcomputer.  g) P u l s e Width M o d u l a t o r I C . The P h i l l i p s HEF4752 g e n e r a t e s t h e i n v e r t e r s w i t c h i n g waveforms under t h e c o n t r o l of t h e microcomputer.  h) O p t o - c o u p l e r d r i v e r s . opto-couplers  These s u p p l y t h e c u r r e n t t o d r i v e t h e  on t h e c i r c u i t s t h a t c o n t r o l t h e i n v e r t e r s w i t c h i n g  devices.  Given t h i s b a s i c a r c h i t e c t u r e , i t i s now p o s s i b l e t o d i s c u s s i n d e t a i l t h e d e s i g n of t h e i n v e r t e r c o n t r o l l e r hardware.  86  Chapter 4 C o n t r o l l e r Hardware Design  With the b a s i c a r c h i t e c t u r e of the i n v e r t e r c o n t r o l l e r d e f i n e d , and  the d e c i s i o n s made on implementation of c o n t r o l l e r f u n c t i o n s ,  the next step was the d e t a i l e d d e s i g n of the c o n t r o l l e r c i r c u i t . The  d e s i g n was c a r r i e d out w i t h c l o s e a t t e n t i o n t o the number of  integrated  c i r c u i t s required.  The g o a l was to o b t a i n  performance from a minimum number of ICs so that  acceptable  the c o n t r o l l e r  would be r e l i a b l e , compact, and i n e x p e n s i v e  The  g o a l was a c h i e v e d through use of l a r g e s c a l e  circuits.  integrated  The microcomputer i n the c o n t r o l l e r c o n s i s t s of an  I n t e l 8085 m i c r o p r o c e s s o r , a 4 kbyte EPROM memory, and an I n t e l 8156  IC t h a t p r o v i d e s r e a d / w r i t e memory and I/O l i n e s .  The  microcomputer i s i n t e r f a c e d t o an ADC0808 a n a l o g to d i g i t a l converter  IC t h a t p r o v i d e s e i g h t analog i n p u t  controller.  l i n e s to the  The microcomputer i s a l s o i n t e r f a c e d to the HEF4752V  PWM g e n e r a t o r IC t h a t a c t u a l l y generates the i n v e r t e r  switching  signals.  The 21.5  c o n t r o l l e r i s v e r y compact, f i t t i n g cm p r i n t e d c i r c u i t board.  required, circuit  on a s i n g l e 7.5 cm by  Only 18 i n t e g r a t e d  r e s u l t i n g i n an e s t i m a t e d p a r t s c o s t  c i r c u i t s are  ( i n c l u d i n g the  board) of under $160 when the p a r t s a r e purchased i n  87  small q u a n t i t i e s .  The  d i r e c t labor  c o n t r o l l e r board i s e s t i m a t e d to be descriptions on  the  cost  to assemble  under $25.  of the  design.  i n this thesis  information  However, based on what  i n f o r m a t i o n i s a v a i l a b l e , i t i s apparent that described  Published  of i n v e r t e r c o n t r o l l e r s r a r e l y i n c l u d e  s i z e or c o s t  the  the  controller  i s among the most compact and  least  expensive.  D e s p i t e the the  s m a l l s i z e and  performance and  adequate. The  low  c o s t of  the c o n t r o l l e r hardware,  of the  c o n t r o l l e r are more than  flexibility  c o n t r o l l e r can  c o n t r o l PWM  inverters  t r a n s i s t o r s , power MOSFETs, or t h y r i s t o r s as frequency range of at l e a s t 2 Hz 0.5  Hz.  The  1 range.  v o l t s / H z r a t i o can  Analog and  feedback s i g n a l s . signals  from the  available  digital  to 400 be  c o n t r o l l e r since  Hz w i t h a r e s o l u t i o n  i n the  i n p u t s are  c o n t r o l panel components. d e s i g n to expand  the lines,  o r d e r address l i n e s are brought to connectors on the  the  printed  4.1  Microcomputer C i r c u i t  components.  Three f a c t o r s  s e l e c t i o n of the influenced  the  88  microcomputer  choice  of  and  edge of  board.  stage s t a r t e d w i t h the  and  are  low  This  to  available for f a u l t  the microcomputer data l i n e s , c o n t r o l  circuit  of  a d j u s t e d over at l e a s t a 10  Nine d i g i t a l output l i n e s  to c o n t r o l i n v e r t e r and  F i n a l l y , there i s p r o v i s i o n  switches over a  i n p u t s are a v a i l a b l e f o r c o n t r o l  Four i n t e r r u p t inverter.  using  microprocessor.  In ascending  o r d e r of importance,  i ) the speed and computational  they a r e :  power of the  microprocessor  i i ) t h e number and s i z e of c h i p s r e q u i r e d f o r a complete microcomputer system  iii)  the a v a i l a b i l i t y of low c o s t software and hardware development  The  tools  f a s t e r and more powerful  the m i c r o p r o c e s s o r , the more the  c o n t r o l l e r can do b e f o r e s e r i o u s d e g r a d a t i o n of response o c c u r s . Computational i s performing  time  power i s most important when the c o n t r o l l e r  c l o s e d loop c o n t r o l .  C o n t r o l a l g o r i t h m s make heavy  use of m u l t i p l y and d i v i d e o p e r a t i o n s . these o p e r a t i o n s can be decreased, bandwidth or the complexity  I f the time r e q u i r e d f o r  e i t h e r the c o n t r o l loop  of the c o n t r o l a l g o r i t h m can be  increased.  M i n i m i z i n g the number and s i z e o f c h i p s r e q u i r e d t o make up a complete microcomputer i s important  because of the s i z e  c o n s t r a i n t s imposed by the submersible  application.  c h i p microcomputer i s the best c h o i c e i n t h i s r e g a r d . microprocessor support  A single A  t h a t can f u n c t i o n w i t h a few h i g h l y i n t e g r a t e d  c h i p s makes an a c c e p t a b l e second  89  choice.  The a v a i l a b i l i t y  of good, low c o s t software and hardware  development t o o l s f o r the m i c r o p r o c e s s o r i s important f o r two reasons.  First,  c o n t r o l l e r was  the budget f o r the development of the i n v e r t e r  not l a r g e enough to a l l o w the purchase  expensive microcomputer development systems. be performed  d e s i g n was  Development had  w i t h equipment a l r e a d y a v a i l a b l e at UBC  equipment t h a t c o u l d be purchased complete,  i t was  of  a t low c o s t .  to  or with  Second, once the  to be t r a n s f e r r e d to a s m a l l company  which would manufacture submersible d r i v e s and o t h e r AC motor d r i v e s based on t h i s c o n t r o l l e r .  Since one  c o n t r o l l e r i s i t s programmability, software development f a c i l i t i e s money was  the company a l s o has  to have  f o r the m i c r o p r o c e s s o r .  Again,  not a v a i l a b l e f o r the company to purchase  software development  The  of the v i r t u e s of the  an  expensive  system.  combination of the t h r e e f a c t o r s narrowed the l i s t  p o t e n t i a l microprocessors considerably.  The  of  16 b i t  m i c r o p r o c e s s o r s r e a d i l y a v a i l a b l e a t the time (the l a t t e r h a l f 1981)  of  r e q u i r e d too many support c h i p s and, w i t h the e x c e p t i o n of  the T l 9900, were not supported by the microcomputer development f a c i l i t i e s at UBC.  The s i t u a t i o n has  changed.  Newer  m i c r o p r o c e s s o r s such as the I n t e l 80188 have most of support c i r c u i t s  i n t e g r a t e d on the m i c r o p r o c e s s o r c h i p .  a d d i t i o n , i n e x p e n s i v e p e r s o n a l computers can be used software f o r the 80188 s i n c e many of them use the compatible  their  I n t e l 8088 m i c r o p r o c e s s o r .  90  In  to develop  software  S i n g l e c h i p microcomputers a l s o had to be e l i m i n a t e d l a c k of low c o s t development f a c i l i t i e s . has changed.  Again t h i s s i t u a t i o n  Cross-assemblers which run on p e r s o n a l  now a v a i l a b l e f o r s e v e r a l s i n g l e c h i p  due to the  computers a r e  computers.  Of the m i c r o p r o c e s s o r s f o r which hardware and s o f t w a r e development f a c i l i t i e s m i c r o p r o c e s s o r was 8085  were a v a i l a b l e at UBC,  the I n t e l 8085  the most a t t r a c t i v e f o r t h i s a p p l i c a t i o n . The  b a s i c a l l y has the same i n s t r u c t i o n s e t as the I n t e l 8080  microprocessor.  A l a r g e amount of development s o f t w a r e i s  a v a i l a b l e f o r the 8080 f a m i l y of m i c r o p r o c e s s o r s .  At  assemblers and a compiler  language a r e  available.  f o r the PL/M  programming  R e l o c a t i n g macro-assemblers and compilers  P a s c a l , F o r t h , F o r t r a n , and B a s i c programming a v a i l a b l e on p e r s o n a l operating  UBC,  f o r the C,  languages a r e  computers t h a t use the p o p u l a r  CP/M  system.  On the hardware s i d e , the 8085 has support c h i p s a v a i l a b l e which allow  the c o n s t r u c t i o n of a s m a l l microcomputer system w i t h  p o r t s , EPROM and RAM three or f o u r ICs. unusually  memory, and a programmable  only  For an 8 b i t m i c r o p r o c e s s o r , the 8085 has an  powerful i n t e r r u p t system which has 5 i n t e r r u p t  and on-chip p r i o r i t y a r b i t r a t i o n . the d e s i g n  timer, using  I/O  inputs  This i s a u s e f u l feature  of the i n v e r t e r p r o t e c t i o n f u n c t i o n s  since  c a l l s f o r the use  of i n t e r r u p t s i g n a l s generated by f a u l t d e t e c t i o n c i r c u i t s i n the inverter.  91  A f i n a l advantage of the 8085 was f a m i l i a r i t y . i n other m i c r o p r o c e s s o r  based  I had used  the 8085  systems and was f a m i l i a r w i t h i t s  assembly language and hardware f e a t u r e s . on t h i s p r o j e c t c o u l d be devoted  T h e r e f o r e the d e s i g n  time  t o t a s k s other than l e a r n i n g about  a new m i c r o p r o c e s s o r .  The major drawback to the use o f the 8085 m i c r o p r o c e s s o r r e l a t i v e l y l i m i t e d p r o c e s s i n g power. as the new 16 b i t m i c r o p r o c e s s o r s  is its  The 8085 i s not as powerful  or some of the new s i n g l e c h i p  microcomputers such as the I n t e l 8051.  I t s most n o t a b l e  d e f i c i e n c y i s the l a c k of m u l t i p l y and d i v i d e i n s t r u c t i o n s i n i t s instruction set. and  However, p r e v i o u s e x p e r i e n c e w i t h the p r o c e s s o r  some p r e l i m i n a r y e s t i m a t e s o f the p r o c e s s i n g requirements f o r  the i n v e r t e r c o n t r o l l e r a p p l i c a t i o n suggested power of the 8085 would be adequate.  t h a t the p r o c e s s i n g  T h i s has proved  to be t r u e  f o r the a p p l i c a t i o n s i n which the i n v e r t e r c o n t r o l l e r has been used  to d a t e .  With the m i c r o p r o c e s s o r  chosen,  d e s i g n of the remainder  of t h e  microcomputer s e c t i o n of the c o n t r o l l e r c o u l d proceed. schematic  The  diagram f o r the microcomputer s e c t i o n i s shown i n  F i g u r e 25.  The  8085 has i n t e r n a l c l o c k g e n e r a t i o n c i r c u i t s so o n l y a c r y s t a l  and  two s m a l l c a p a c i t o r s a r e r e q u i r e d to complete the c l o c k  g e n e r a t o r . A l l v e r s i o n s of the i n v e r t e r c o n t r o l l e r b u i l t have used an 8085 running a t a 3 MHz c l o c k frequency.  92  to date  However i t  J  1 1  I.IK  rr^  o a*  vv RI  o "GO u(7T")— O—flay*  * —GD «  - GiD—  —(  f  )to  -GiD  Figure  25  Microcomputer S e c t i o n of I n v e r t e r C o n t r o l l e r  would be v e r y easy to upgrade to the frequencies  8085A-2 which runs a t  up to 5 MHz i f an a p p l i c a t i o n r e q u i r e d the  clock  extra  speed.  The power-on r e s e t c i r c u i t i n t h i s design  is  conventional.  P r o v i s i o n i s made f o r the a d d i t i o n of a r e s e t s w i t c h or some other external  The  reset signal  8085 has f i v e  source.  interrupt inputs.  the TRAP i n t e r r u p t i n p u t , which i s priority, INT 7.5  signal  dedicated  to f a u l t  i n t e r r u p t , which i s  dedicated INT 6.5  is  to the r e a l - t i m e  In the i n v e r t e r  non-maskable and has  highest  s i g n a l s from the i n v e r t e r .  next h i g h e s t i n p r i o r i t y , clock signal,  i n p u t can be connected  either  The remaining two i n p u t s , s i g n a l s from the  is  as d e s c r i b e d below.  INT 5.5 and INTR,  to f a u l t  The I n t e l  8156 RAM and I / O Expander IC s u p p l i e s  can a l s o be  inverter.  the microcomputer  with 256 bytes of r e a d / w r i t e memory, 22 b i d i r e c t i o n a l I / O clock.  At f i r s t  memory appears i n s u f f i c i e n t .  glance,  However,  256 b y t e s of  the i n v e r t e r  has no need to s t o r e l a r g e amounts of i n f o r m a t i o n . initial of and  d e s i g n of  variables  The  s i g n a l s from the  connected  and a r e a l - t i m e  The  to the END OF CONVERSION  from the A/D c o n v e r t o r o r to f a u l t  inverter.  controller,  the c o n t r o l l e r i t was estimated  lines,  read/write  controller During  that  the number  to be s t o r e d a t any one time would not exceed  that most of these would be s i n g l e byte v a r i a b l e s .  e s t i m a t e has been borne out i n p r a c t i c e ,  94  l a c k of  the  50  This  read/write  memory has  The  I/O  not proved to be a problem so f a r .  l i n e s on the  (Port A and  8156  Port B) and  are organized  one  P o r t C a r e s e t up as output  i n t o two  s i x l i n e port ports.  eight l i n e  (Port C ) .  Port B  F i v e l i n e s from these  a r e used f o r c o n t r o l f u n c t i o n s w i t h i n the c o n t r o l l e r . remaining  ports and  ports  The  l i n e s a r e a v a i l a b l e to c o n t r o l components such as  contactors  i n the i n v e r t e r or to c o n t r o l i n d i c a t o r lamps on  control panel.  P o r t A i s s e t up as an i n p u t p o r t .  l i n e s a r e a v a i l a b l e f o r use  as a p a r a l l e l d i g i t a l  speed commands from the submersible can a l s o be used to a c c e p t  controller.  the  Its eight i n p u t to  The  accept  eight  i n d i v i d u a l l o g i c i n p u t s from  lines  switches  or comparators.  The  8156  i s equipped w i t h a 14 b i t programmable c o u n t e r / t i m e r .  t h i s d e s i g n the i n p u t to the counter Am9513 c o u n t e r / t i m e r the counter  IC on the c o n t r o l l e r board.  i s connected to the INT  microprocessor.  The  i s a c l o c k frequency  counter  7.5  The  output  of  the  i s programmed to a c t as a r e a l - t i m e  I n t e l manufactures a companion c h i p to the 8156, i n c o r p o r a t e s EPROM memory and more I/O  package.  from an  i n t e r r u p t i n p u t on  c l o c k which i n t e r r u p t s the microcomputer at r e g u l a r  o n l y conta i n s 2K bytes  In  lines.  intervals.  the 8755, which  However the  chip  of EPROM y e t i s packaged i n a 40 p i n  For about the same board a r e a i t i s p o s s i b l e to i n c l u d e  a 2732 EPROM which c o n t a i n s to d e m u l t i p l e x  4K bytes  the 8085 address bus.  and  the 8212  T h i s was  95  latch  required  the o p t i o n chosen  s i n c e t h e e x t r a I/O l i n e s p r o v i d e d  by the 8755 were not r e q u i r e d .  So f a r , 4K bytes of EPROM has proved adequate f o r program storage.  However, f i t t i n g t h e program i n t o t h i s space has  o c c a s i o n a l l y been a b i t of a squeeze.  Programs f o r more complex  a p p l i c a t i o n s of the c o n t r o l l e r a r e l i k e l y storage.  to r e q u i r e more  At t h e time, the 2732 was t h e h i g h e s t  t h a t was r e a d i l y a v a i l a b l e .  Since  c a p a c i t y EPROM  t h a t time, EPROMs w i t h  c a p a c i t i e s up to 32K byte have appeared on t h e market. devices  use a 28 p i n package t h a t i s l a r g e r than t h e 24 p i n  package used by the 2732. one  These  of these d e v i c e s  However i t s h o u l d  be p o s s i b l e to f i t  on t h e same board by r e p l a c i n g t h e 8212  l a t c h , which i s housed i n a 24 p i n package, w i t h a 74LS373 l a t c h which i s housed i n a s m a l l e r  20 p i n package.  4.2 I n t e r f a c e t o t h e HEF4752V PWM Generator IC  The  microcomputer i s i n t e r f a c e d t o two other  elements of t h e  i n v e r t e r c o n t r o l l e r ; the PWM g e n e r a t o r IC and the analog t o digital  converter.  The i n t e r f a c e t o t h e P h i l i p s HEF4752V PWM  g e n e r a t o r IC i s t h e more complex of the two. ( F i g u r e 26 [65]) has 7 s i n g l e b i t b i n a r y c l o c k frequency c o n t r o l  The  c o n t r o l i n p u t s and 4  inputs.  7 s i n g l e b i t i n p u t s a r e l a b e l l e d I , K, L, CW, A, B, and C by  the m a n u f a c t u r e r . high  The HEF4752V  or low.  Four of these i n p u t s  The l o g i c l e v e l on i n p u t  can be t i e d  permanently  I determines whether  96  u  PINNING  0BC1  1  0BM2  2  27  OBC2  0BM1  3  26  VAV  RCT  4  25  1  CW  5  24  L  OCT  6  23  RSYN  K  7  22  OYM1  ORM1  8  21 OYM2  ORM2  9  20  OYC1  ORC1 10  19  OYC2  ORC2  11  18  CSP  FCT  12  17  VCT  A  13  16  C  SS  14  V  28  HEF4752V  *  V  DD  15 B  tnputt; group 24- L 25- I 7- K 5-CW 13 - A 15-B 16-C  I data data data data data data data  Inputs; group II 12 - FCT frequency clock 17-VCT voltage clock 4 - RCT reference clock 6 - OCT output delay clock  Outputs; group I 23 - RSYN R-phase synchronization 26 - VAV average voltage 18 - CSP current sampling pulses Outputs; group II 8 -ORM1 9 -ORM2 10 -ORC1 11 -ORC2 22 -OYM1 21 -OYM2 20 -OYC1 19 -OYC2 3 -OBM1 2 -OBM2 1-OBC1 27 -OBC2  R-phase main R-phase main R-phase commutation R-phase commutation Y-phase main Y-ph8$e main Y-phase commutation Y-phase commutation B-phase main B-phase main B-phase commutation B-phase commutation  SUPPLY VOLTAGE  7Z76992  HEF4752V HEF4752VP: 28-lead DIL; plastic (SOT-117). HEF4752VO: 28-lead DIL; ceramic (SOT-135).  rating  recommended operating  -0,5 to 18  4,5 to 12,5 V  FAMILY DATA see Family Specifications  F i g u r e 26 P h i l i p s HEF4752V Inputs and Outputs  97  the  output  driving  a  signals  transistor  suitable  for  mode  signal  the  thyristor  tied  is  to  In  jumper,  depending  C are  used  manufacturer.  microprocessor. low,  the  output  disabled.  The  When L i s  high,  input  allows  event  of  inactive. phase  a  fault The  of  or  motor  type  of  of  the  one  delay  or  is  interlock  input  can  be  either  high  or  the  interlock the  cases  rotation.  testing  inputs  is  of  an  must  on/off  switching control  where  this  they  be  control. from  the  turned  inverter  the  phase  IC.  This  Finally,  be  are  the  98  is  sequence is  low  by  both  the  tied  the  low.  by  When L IC  switching  signals to  device are  of  Inputs  controlled  inverter  switches  desired.  the  signals  switching  controls by  period  controller  bit  inverter  generated  with  tied  for  input  leg  which  CW i n p u t  this  K is  the  a  transformers  on what  control  the  becomes  same  L input  in  on  In  the  inverter  the  on.  depending used  type  transistor  is  device pulse  for  maintained  device  of  a  in  inverter  the  the  on i s  a  of  devices  inverter  outputs  a l l  waveform  direction  of  or  suitable  two  single  The  In  controller,  Input to  type  of  during  the  three  on  use  jumper,  inputs  this  only  In  remaining  a  the  turn  inverter  switching  Again  B and  the  controlled.  the  to  a  inverter  device  that  signal  by  control  between  switching  the  of  inverter.  interval  low  IC a r e  MOSFET)  facilitates  inverter. a  The  the  or  be  the  thyristor  output  This  frequency  period  by  the  high  a  by  power  turn a  isolation.  inverter  the  mode  either  clock  to  during  train.  voltage  (or  driving  continuously  pulse  produced  go  the is  is low.  enabled. off to of  in  This the  be the  three  used  to  control  A input  is  used  to  the  r e s e t the HEF4752V IC to a d e f i n e d i n i t i a l controller i s f i r s t connected  switched on.  s t a t e when the  These t h r e e i n p u t s a r e  to P o r t B on the 8156 so t h a t they can be c o n t r o l l e d by  the microcomputer.  The  f o u r c l o c k frequency i n p u t s t o the HEF4752V a r e l a b e l l e d FCT,  VCT,  RCT, and OCT by the manufacturer.  Two of these c l o c k  f r e q u e n c i e s a r e n o r m a l l y kept c o n s t a n t f o r a p a r t i c u l a r application.  The frequency of the RCT c l o c k s e t s l i m i t s  to the  maximum and minimum i n v e r t e r s w i t c h i n g f r e q u e n c i e s over a wide range  of i n v e r t e r output f r e q u e n c i e s .  the r a t i o of c a r r i e r  T h i s i s done by changing  ( s w i t c h i n g ) frequency t o m o d u l a t i o n  (output)  frequency i n d i s c r e t e s t e p s as the output frequency changes.  The  r a t i o s used by the c h i p a r e 168, 120, 84, 60, 42, 30, 21, and 15. The  s e l e c t i o n of the RCT c l o c k frequency  (f^rjx^  determines  the output f r e q u e n c i e s a t which the c a r r i e r t o modulation frequency r a t i o s w i l l be changed. f  RCT  i  s  (25)  where f ( s  fRCT =  different  2  8  0  x  f  s(max)  ) i - the d e s i r e d maximum s w i t c h i n g frequency. s  m  a  x  The v a l u e f o r f  for  The formula f o r s e l e c t i n g  R f  j j w i l l be d i f f e r e n t f o r i n v e r t e r s u s i n g  types o f s w i t c h i n g d e v i c e s but w i l l remain  a particular  constant  application.  The OCT c l o c k frequency i n p u t i s used i n c o n j u n c t i o n w i t h the  99  binary  i n p u t K t o s e t t h e i n t e r l o c k d e l a y p e r i o d r e q u i r e d between  the on time of one switch the o t h e r s w i t c h  i n an i n v e r t e r l e g and the on time of  i n the l e g .  When the K i n p u t i s low, t h e  f o r m u l a f o r the i n t e r l o c k delay  (26)  I n t e r l o c k delay  where f g c T ^  s t  n  period i s  (seconds) = 8/fQ^^,  frequency of the OCT c l o c k .  e  When the K  input i s high,  t h e formula f o r t h e i n t e r l o c k delay p e r i o d i s  (27)  (seconds) = 16/fQ,-.rp  The  I n t e r l o c k delay  i n t e r l o c k delay p e r i o d r e q u i r e d w i l l v a r y depending on t h e  switching  speed of the power d e v i c e s  i n the i n v e r t e r .  However,  the i n t e r l o c k d e l a y p e r i o d w i l l not v a r y  for a particular  a p p l i c a t i o n so f g r j ^ can be kept constant  f o r that  application.  The  remaining two c l o c k frequency c o n t r o l i n p u t s r e q u i r e v a r i a b l e  clock frequencies. output f r e q u e n c y . f-pCT  t  o  t  '  i e o u t  (28)  P  u t  The FCT c l o c k i n p u t c o n t r o l s the i n v e r t e r The formula r e l a t i n g  frequency f  fFCT =  3  3  6  0  x  In t h e s u b m e r s i b l e d r i v e , f  Q  f  Q  u  u  t  t h e c l o c k frequency  is  out  t  (and t h e r e f o r e f p ^ T ^  v a r i e s from about 2 Hz to 400 Hz.  T h i s i s a range of 200 : 1.  100  The  VCT  c l o c k i n p u t c o n t r o l s the i n v e r t e r v o l t s / H z  nominal value  of the VCT  c l o c k frequency f y r j ^ determines  output frequency at which the i n v e r t e r achieves T h i s nominal value  (29)  f  V C T  ratio.  can be c a l c u l a t e d as  ( n o m ) = 6720 x f  With f y c T f i x e d at t h i s v a l u e ,  o u t  100%  the  modulation.  follows:  (100%  modulation)  the i n v e r t e r output  voltage  w i l l be a l i n e a r f u n c t i o n of the output frequency up modulation p o i n t .  The  A f t e r t h a t , the v o l t a g e  to the  rises in a  100%  non-linear  f a s h i o n as the i n v e r t e r waveform makes the t r a n s i t i o n from a s i n u s o i d a l PWM  waveform to an unmodulated s i x step square wave.  Depending on the motor being  d r i v e n , the frequency a t which  modulation i s d e s i r e d can range from 50 Hz  to 400  must be v a r i a b l e over about a 10 to 1 range. v a r i a t i o n i n the v o l t s / H z o p e r a t i o n at low  s e t t i n g may  frequencies  due  to the i n c r e a s e d  effect  method of g e n e r a t i n g  VCT  i n p u t s r e q u i r e s some c o n s i d e r a t i o n .  of  the  flux.  the c l o c k f r e q u e n c i e s The  f o r the FCT  FCT  input  and  requires  output frequency of the i n v e r t e r must  be c o n t r o l l e d over a range of 2 Hz  to 400  frequency must be changed i n s m a l l s t e p s .  Hz.  In a d d i t i o n , the  Each step change i n  i n v e r t e r output frequency i s a l s o a step change i n motor frequency.  VCT  In a d d i t i o n , during  The  The  Thus  be r e q u i r e d  s t a t o r r e s i s t a n c e IR drop on the a i r gap  particular attention.  Hz.  100%  T h i s change i n s l i p  slip  frequency causes a change i n  101  motor torque and t h e r e f o r e i n motor c u r r e n t . large, large transient frequency  currents w i l l occur.  Step changes i n  s h o u l d be kept t o a f r a c t i o n of the normal s l i p  frequency.  A 0.5 Hz s t e p s i z e i s a good c h o i c e f o r s m a l l  i n d u c t i o n motors.  T h i s r e s u l t s i n the requirement  fprjx l ° k source generate a p p r o x i m a t e l y c  I f the step i s too  c  t h a t the  800 f r e q u e n c i e s  e v e n l y spaced between 6720 Hz (2 Hz output) and 1,344,000 Hz (400 Hz o u t p u t ) .  In  the case of the VCT s i g n a l i t i s d e s i r a b l e t o be a b l e t o  change i t s frequency i n s m a l l s t e p s ( f o r example, 5%) around the nominal  frequency. This a b i l i t y  i s r e q u i r e d when the c o n t r o l l e r  i s p e r f o r m i n g c l o s e d loop c o n t r o l of machine a i r gap f l u x o r when the c o n t r o l l e r i s compensating v o l t a g e to the i n v e r t e r .  f o r f l u c t u a t i o n s i n the i n p u t  The frequency range r e q u i r e d f o r the  VCT c l o c k i s from 336,000 Hz (100% m o d u l a t i o n a t 50 Hz output f r e q u e n c y ) to 2,688,000 Hz (100% modulation a t 400 Hz output frequency).  Generat i o n  of the FCT and VCT c l o c k f r e q u e n c i e s under c o n t r o l of  the microcomputer can be a c h i e v e d by t h r e e t e c h n i q u e s :  i ) programmable counter d i v i d i n g a f i x e d c l o c k frequency  i i ) b i n a r y r a t e m u l t i p l i e r d i v i d i n g a f i x e d c l o c k frequency  i i i ) phase-locked  loop frequency m u l t i p l i e r operated as a  102  d i g i t a l l y c o n t r o l l e d frequency s y n t h e s i z e r  Using a programmable counter i s not a v i a b l e however, because  alternative,  the c l o c k frequency must be s e v e r a l  megahertz i n o r d e r to a c h i e v e the r e q u i r e d frequency  hundred resolution  f o r the FCT s i g n a l . Even the c o a r s e r r e s o l u t i o n of the VCT would s t i l l  r e q u i r e a c l o c k frequency of 40 to 50 MHz.  h i g h frequency programmable d i v i d e r c i r c u i t  signal  While a  c o u l d be b u i l t u s i n g  ECL components, i t would have a h i g h p a r t s count and would not easy to i n t e r f a c e to the  be  microcomputer.  A b i n a r y r a t e m u l t i p l i e r generates output p u l s e s a t a frequency t h a t i s r e l a t e d to the i n p u t c l o c k frequency by a fraction.  rational  For example, a 12 b i t r a t e m u l t i p l i e r has  the  following  r e l a t i o n s h i p between i n p u t and output f r e q u e n c i e s :  < > 30  f  out = i n f  x  N/4096  where N i s an i n t e g e r between 0 and 4095.  In t h i s case a h i g h  c l o c k frequency i s not n e c e s s a r y i n o r d e r to o b t a i n the r e q u i r e d resolution.  However, the output p u l s e s generated by a r a t e  m u l t i p l i e r are u s u a l l y not evenly spaced. T h i s i s because r a t e m u l t i p l i e r generates i t s output p u l s e s by l e t t i n g  the  some of  the i n p u t p u l s e s pass to the output and s u p p r e s s i n g the remainder.  Thus the formula f o r f  t r u e as an average.  Q  u  t  g i v e n above i s o n l y  T h i s c o u l d pose a problem  i f a rate  m u l t i p l i e r i s used to generate the c o n t r o l f r e q u e n c i e s f o r the  103  HEF4752.  The HEF4752V uses the c o n t r o l f r e q u e n c i e s the s w i t c h i n g p u l s e s i t g e n e r a t e s .  to c o n t r o l the t i m i n g of  I t i s p o s s i b l e t h a t the  i r r e g u l a r s p a c i n g of the p u l s e s produced by a r a t e m u l t i p l i e r w i l l propagate through to the s w i t c h i n g p u l s e s and r e s u l t i n a PWM  waveform w i t h n o t i c e a b l e j i t t e r .  s p e c i f i c a t i o n sheet  U n f o r t u n a t e l y , the  s u p p l i e d f o r the HEF4752V p r o v i d e s  i n f o r m a t i o n on t h i s p o i n t .  no  In a d d i t i o n , the a p p l i c a t i o n example  s u p p l i e d by the manufacturer c o n s i s t s of an analog i n v e r t e r c o n t r o l l e r which generates the c o n t r o l f r e q u e n c i e s f o r the HEF4752V by means of v o l t a g e to frequency information i s provided frequencies  converters.  Thus no  on the requirements f o r c o n t r o l  generated by d i g i t a l means.  Loop Filter  Relerence  Frequency  Phase Comparator  Voltage Controlled Oscillator  T  Output Frequency  Programmable Counter (Divide by N)  N  F i g u r e 27  Digitally  C o n t r o l l e d Frequency  104  Synthesizer  The d i g i t a l l y c o n t r o l l e d frequency s y n t h e s i z e r ( F i g u r e 27) c o n s i s t s of a phase-locked i t s feedback  path.  l o o p w i t h a programmable counter i n  The output frequency  f  Q  u  t  of the  frequency s y n t h e s i z e r i s  (31)  f  Q  u  t  = N x  f  r  e  f  where N i s the d i v i s o r programmed i n t o the counter and is  f  r e  f  the r e f e r e n c e frequency a p p l i e d to the phase comparator.  In  t h i s case the r e s o l u t i o n i s dependent on the l e n g t h of the progammable c o u n t e r . generated  The range of f r e q u e n c i e s t h a t can  i s b a s i c a l l y l i m i t e d by the range  controlled oscillator  (VCO)  d i g i t a l phase comparators over the f u l l  VCO  of the v o l t a g e  i n the phase-locked  loop.  a l l o w the loop to remain  frequency range  be  Modern  i n phase l o c k  [66],  Quick p r e l i m i n a r y designs were c a r r i e d out f o r frequency g e n e r a t o r s based  on r a t e m u l t i p l i e r s and on  s y n t h e s i z e r s , to e s t i m a t e the require.  I t was  number of ICs each approach  e s t i m a t e d t h a t the r a t e m u l t i p l i e r  would r e q u i r e between 7 and  10 16 p i n ICs.  frequency s y n t h e s i z e r approach p i n IC.  frequency  was  would  approach  The e s t i m a t e f o r the  5 or 6 16 p i n ICs p l u s a  40  However, the 40 p i n IC used by the frequency s y n t h e s i z e r  had some a d d i t i o n a l c a p a b i l i t i e s which would be u s e f u l i n o t h e r p a r t s of the c o n t r o l l e r d e s i g n .  Thus t h e r e was  not much to  choose between the two a l t e r n a t i v e s i n terms of board  105  space  required.  As a l r e a d y d i s c u s s e d ,  the r a t e m u l t i p l i e r approach has the  disadvantage t h a t i t produces an output i n which the p u l s e s a r e unequally  spaced, which may cause j i t t e r  signals.  The p u l s e s  i n the s w i t c h i n g  produced by the frequency s y n t h e s i z e r , on  the o t h e r hand, a r e e q u a l l y spaced.  The frequency  synthesizer  approach t h e r e f o r e appeared t o be l e s s r i s k y , p a r t i c u l a r l y it  since  had been used s u c c e s s f u l l y i n the p r o t o t y p e c o n t r o l l e r  described  i n the p r e v i o u s  chapter.  As a r e s u l t , the d e c i s i o n was  made to use the frequency s y n t h e s i z e r technique to generate the FCT  and VCT c l o c k  Figure  frequencies.  28 shows the schematic diagram f o r the frequency  s y n t h e s i z e r c i r c u i t used t o generate the FCT and VCT c l o c k f r e q u e n c i e s . The programmable counters output f r e q u e n c i e s  which a r e used to s e t the  of the s y n t h e s i z e r a r e c o n t a i n e d  i n the  Advanced M i c r o D e v i c e s Am9513 Counter/Timer IC (see F i g u r e 29 [67]).  This device be loaded bit  contains  five  16 b i t programmable counters  by the microcomputer.  which can  In a d d i t i on there i s another 4  frequency d i v i d e r (FOUT) which can be s e t up by commands from  the microcomputer.  I n the i n v e r t e r c o n t r o l l e r d e s i g n ,  the 9513  i s s u p p l i e d the 3 MHz microcomputer c l o c k s i g n a l . The FOUT d i v i d e r i s s e t up to d i v i d e t h i s c l o c k frequency by f i v e to supply  a 600 kHz c l o c k s i g n a l t o the r e a l - t i m e c l o c k i n the 8156  106  CLOCK 5 1 G N M T O U S n ! R I A L - T I M E CLOCK AND A/D CONVERTER  Figure  28  Programmable Frequency  Synthesizer  'ST?)  :  SOURCE 1-5 GATE 1-S X1 • X2 •  OSCILLATOR  16-BIT COUNTER FREQUENCY SCALER  4-BIT COUNTER FOUT DIVIDER  INPUT SELECT LOGIC  S-BIT COMMAND REGISTER  OBO-OB7 ' OBS-DB1S '  -  V  .  COUNTER S LOGIC GROUP  COUNTER 4 LOGIC GROUP  i—r  8-BIT STATUS REGISTER  6-BIT DATA POINTER  BUS BUFFER AND MUX  OUTS  COUNTER 3 LOGIC GROUP  1  I  16-BIT MASTER MODE REGISTER  COUNTER 2 LOGIC GROUP  POWER ON RESET  COUNTER 1 LOGIC GROUP  i WR" • RD •  BUS INTERFACE CONTROL  c/B • C5 •  F i g u r e 29  and  General B l o c k Diagram f o r Am9513 Counter/Timer  IC  to t h e A/D c o n v e r t o r .  Counter  1 i n the 9513 i s programmed to d i v i d e the 3 MHz  clock  s i g n a l t o produce a 1680 Hz r e f e r e n c e frequency f o r the phase locked loops.  Counter  3 i s programmed t o d i v i d e the 3 MHz  clock  s i g n a l t o produce the RCT c o n t r o l frequency f o r the HEF4752V waveform g e n e r a t o r IC. feedback  PWM  The remaining t h r e e counters a r e i n the  loops of the frequency  synthesizers.  Two s e p a r a t e f r e q u e n c y s y n t h e s i z e r s a r e r e q u i r e d to generate the FCT c l o c k f r e q u e n c y .  T h i s i s due to component l i m i t a t i o n s . The  CD4046 phase-locked loop IC c o n t a i n s both a phase comparator and a VCO.  The VCO has a frequency range of about 1000 to 1 but i s  108  limited  to a maximum output frequency of between 500 kHz and 1  MHz when o p e r a t i n g from a 5 v o l t supply  [68].  The maximum  frequency r e q u i r e d f o r the FCT s i g n a l i s 1.344 MHz.  It i s  p o s s i b l e to use the phase comparator i n the CD4046 w i t h VCO such as the 74LS628 TTL VCO I C .  another  The 74LS628 can supply  f r e q u e n c i e s w e l l i n excess of the r e q u i r e d 1.344 MHz but i t s frequency range  i s limited  to about  10 to 1 [69],  The frequency  range r e q u i r e d f o r t h e FCT c l o c k frequency i s a t l e a s t  200 to 1.  Thus we have one VCO which has t h e r e q u i r e d frequency range but can't s u p p l y the r e q u i r e d maximum frequency w h i l e another VCO will  supply t h e r e q u i r e d maximum frequency but doesn't have t h e  frequency range r e q u i r e d .  The  s o l u t i o n i s t o use two frequency s y n t h e s i z e r s . The  s y n t h e s i z e r a s s o c i a t e d w i t h Counter  2 i n the 9513 uses  the VCO i n  the CD4046 and generates FCT f r e q u e n c i e s from 6720 Hz (2 Hz output  f r e q u e n c y ) to 403,200 Hz (120 Hz output f r e q u e n c y ) .  other frequency s y n t h e s i z e r , a s s o c i a t e d w i t h Counter 9513,  The  5 i n the  uses t h e phase comparator i n a CD4046 i n c o n j u n c t i o n w i t h a  74LS628 VCO t o generate the FCT f r e q u e n c i e s from 403,200 Hz t o 1.344  MHz (400 Hz output  frequency).  Some simple l o g i c  circuits,  c o n t r o l l e d by s i g n a l s from the microcomputer (FCT SELECT), s e l e c t s i g n a l s from one of t h e FCT sources to send IC.  to the PWM  generator  The o p e r a t i n g ranges of t h e two frequency s y n t h e s i z e r s  o v e r l a p around  t h e frequency where s w i t c h i n g o c c u r s (403,200 Hz)  and they a r e phase l o c k e d to a common r e f e r e n c e frequency so s w i t c h i n g from one s y n t h e s i z e r to the o t h e r i s c o m p l e t e l y  109  "glitch"  free.  Only a s i n g l e frequency s y n t h e s i z e r i s r e q u i r e d f o r t h e g e n e r a t i o n of t h e VCT c l o c k f r e q u e n c y .  However, s i n c e a maximum  frequency of 2.688 MHz i s r e q u i r e d , t h e s y n t h e s i z e r c o n s i s t s of the phase comparator s e c t i o n of a CD4046 used w i t h a 74LS628 VCO. Counter of  4 i n t h e 9513 i s used as t h e counter i n the feedback  path  the VCT s y n t h e s i z e r .  I t w i l l soon be p o s s i b l e to c o n s i d e r a b l y s i m p l i f y t h e d e s i g n of the FCT and VCT frequency s y n t h e s i z e r s .  A h i g h speed  silicon  gate CMOS v e r s i o n of the metal gate CMOS CD4046 phase-locked loop IC s h o u l d be a v a i l a b l e by mid 1984.  The new h i g h speed  silicon  gate CMOS ICs n o r m a l l y run t e n times as f a s t as t h e i r o l d e r metal gate c o u n t e r p a r t s .  T h e r e f o r e i t s h o u l d be p o s s i b l e to do away  w i t h one of t h e FCT frequency s y n t h e s i z e r s and w i t h t h e 74LS628 VCO i n the VCT s y n t h e s i z e r .  Besides r e d u c i n g t h e c h i p  count,  t h i s change w i l l a l s o make one of t h e counters i n the Am 9513 and  two output l i n e s on the 8156 a v a i l a b l e f o r o t h e r u s e s .  The d e s i g n of the l o o p f i l t e r s  f o r the phase-locked l o o p s f o l l o w s  the g u i d e l i n e s g i v e n by the manufacturer phase-locked loop IC [ 7 0 ] .  The r i s e  of the CD4046  time of the VCO c o n t r o l  v o l t a g e f o r a s t e p change i n the frequency command milliseconds. speed  i s about 20  There i s no n o t i c e a b l e r i n g i n g o r o v e r s h o o t .  of response has been more than adequate f o r a l l of t h e  a p p l i c a t i o n s of t h e i n v e r t e r c o n t r o l l e r to d a t e .  110  The maximum  This  r a t e of change of i n v e r t e r frequency i n these a p p l i c a t i o n s been l i m i t e d  to 200 Hz/sec due  has  to l i m i t a t i o n s on the c u r r e n t t h a t  the i n v e r t e r can s u p p l y . I t i s p o s s i b l e t h a t an a p p l i c a t i o n i n which the i n v e r t e r c o n t r o l l e r i s performing f a s t c l o s e d loop speed c o n t r o l of a low i n e r t i a motor might encounter some problems due  to the l a g i n the phase-locked  t h a t case i t may  loop response.  In  be n e c e s s a r y to r e d e s i g n the s y n t h e s i z e r s so  that they run a t h i g h e r f r e q u e n c i e s so t h a t loop f i l t e r s  with  s h o r t e r time c o n s t a n t s can be employed. The outputs of the s y n t h e s i z e r s would then be d i v i d e d down to get the f r e q u e n c i e s r e q u i r e d by the HEF4752V.  With the phase-locked  l o o p r e f e r e n c e frequency s e t a t 1680  Hz,  the programming of the frequency s y n t h e s i z e r s i s q u i t e easy. The  counters c o n t r o l l i n g the FCT s y n t h e s i z e r s a r e loaded w i t h  an i n t e g e r equal to twice the d e s i r e d i n v e r t e r output The  frequency.  r a t i o n a l e f o r t h i s can be seen from the f o l l o w i n g :  i ) Required FCT ii) iii)  frequency = 3360 x f i .n v e r t e r  S y n t h e s i z e r output frequency = N x f I f f r e f e r e n c e = 1680  reference  and N = 2 x f . inverter  then s y n t h e s i z e r output frequency = 3360 x f . inverter  T h i s p r o v i d e s a 0.5  Hz r e s o l u t i o n i n the i n v e r t e r  output  frequency.  The c o u n t e r c o n t r o l l i n g the VCT  s y n t h e s i z e r i s loaded  111  w i t h an i n t e g e r e q u a l 100  to 4 times the i n v e r t e r frequency  % modulation of the PWM waveform i s to o c c u r .  a t which  The r a t i o n a l e  f o r t h i s i s s i m i l a r to that g i v e n f o r the FCT frequency synthesizer.  4.3  The  Remainder of C o n t r o l l e r C i r c u i t  remainder of the i n v e r t e r c o n t r o l l e r c i r c u i t  F i g u r e 30. The analog a N a t i o n a l ADC0808. t h a t accept  i s shown i n  t o d i g i t a l c o n v e r t e r used i n t h i s d e s i g n i s T h i s d e v i c e has e i g h t analog  input  u n i p o l a r v o l t a g e s between 0 and 5 v o l t s .  channels  The  c o n v e r t o r has 8 b i t r e s o l u t i o n and completes a c o n v e r s i o n i n about  100 microseconds.  The primary reason  f o r choosing  this  c o n v e r t e r was t h a t i t i n c o r p o r a t e d an e i g h t i n p u t m u l t i p l e x e r and an A/D c o n v e r t e r  i n t o a s i n g l e package t h a t i n t e r f a c e d r e a d i l y  to the 8085 microcomputer.  The c o n v e r t o r  r e s o l u t i o n and i n p u t  v o l t a g e range have proved adequate i n a l l a p p l i c a t i o n s to date.  The  OCT s i g n a l to the HEF4752V PWM generator  the 3MHz microcomputer c l o c k .  IC i s s u p p l i e d by  Since t h e K input to t h e HEF4752V  can be jumpered h i g h or low, t h e user can s e l e c t i n t e r l o c k d e l a y p e r i o d s of e i t h e r 2.7 microseconds or 5.3 microseconds.  These  d e l a y s a r e adequate f o r i n v e r t e r s based on power MOSFETs o r f a s t power t r a n s i s t o r s . s i g n a l f o r those  P r o v i s i o n i s made to supply  cases  an o f f - b o a r d OCT  where a l o n g e r i n t e r l o c k d e l a y p e r i o d i s  required.  112  WJIHI  />-» - /» Q - < ! M S ) r  ft? - s Q — ( 5 3 ' |~|—(iwT) J  -(Foe)' i — &  )  «(j«D  «(iwo)  ••GIF)  — ' - T O  4ZD" * - ( Z > UI6 c ADcogpg  . . P  "( )->°. "0<>.  " O —  kz)» '•o- » CD« 'On i5  BJVERTEP,  a a D rj d a  SIGNALS  TO  Figure  SWITCHING OPTO-HOUPL£RS  30  Remainder o f I n v e r t e r  Controller  Circuit  i - PI -Qi-fi  The  i n v e r t e r switching  buffered  signals supplied  by the HEF4752 a r e f i r s t  by a CD4050 IC and then sent t o a 7416  i n v e r t i n g d r i v e r which s u p p l i e s  the c u r r e n t  open-collector  required  to d r i v e the  LEDs i n the o p t o - c o u p l e r s on the d r i v e r boards f o r the i n v e r t e r switches. The  The 7416 c o u l d  also d r i v e pulse transformers i f required.  commutation s i g n a l s generated by the HEF4752V f o r use i n  t h y r i s t o r i n v e r t e r s a r e brought t o connectors on the i n v e r t e r c o n t r o l l e r board but a r e not b u f f e r e d  Figure  i n any way.  31 shows the memory and I/O maps f o r the i n v e r t e r  c o n t r o l l e r . The address decoding was kept v e r y simple i n o r d e r t o minimize the c o n t r o l l e r c h i p count. are a v a i l a b l e f o r e x t e r n a l  However, some I/O addresses  d e v i c e s which can be i n t e r f a c e d  microcomputer i n the i n v e r t e r c o n t r o l l e r .  t o the  One a p p l i c a t i o n of the  i n v e r t e r c o n t r o l l e r has made use o f t h i s f e a t u r e  to i n t e r f a c e a  keypad and alphanumeric d i s p l a y t o the c o n t r o l l e r .  4.4  Inverter  Controller Circuit  Board  A f t e r the d e s i g n o f t h e i n v e r t e r c o n t r o l l e r was completed, a wire-wrapped p r o t o t y p e was c o n s t r u c t e d .  T h i s p r o t o t y p e was  debugged and then used t o t e s t the f i r s t  version  c o n t r o l l e r software.  Once i t was c l e a r t h a t  the d e s i g n was  of e r r o r s and met the b a s i c requirements o u t l i n e d the  of the i n v e r t e r free  i n Chapter 3,  schematics f o r the c o n t r o l l e r , a l o n g w i t h s p e c i f i c a t i o n s on  the p r i n t e d  c i r c u i t board format used by I n t e r n a t i o n a l  Submarine  E n g i n e e r i n g , were sent t o a company which s p e c i a l i z e s i n p r i n t e d  114  MEMORY  MAP  I/O  OOOO  00  AVAILABLE EXTERNAL  FOR DEVICES  OF  2732 EPROM  10 15 16 IF 20  OFFF IOOO  MAP  2F 30  8156 RAM  3F 40 41 42  IOFF  I 100  8156  UNUSED 87 88  NOT  USED  AVAILABLE EXTERNAL NOT AM95I3  USED REGISTERS  USED  USED  FF  F i g u r e 31 M e m o r y a n d I/O Map F o r I n v e r t e r  115  FOR  DEVICES  ADC0808 DATA R E G I S T E R & CHANNEL SELECT ADDRESSES  NOT  FFFF  AND  REGISTERS  NOT 7'F 80  PORTS  Controller  OO •  U3 mas  8256  S613  CTl  p 1  F i g u r e 32 Inverter Controller Circuit Layout  Board  —  RI  —  »i  11"taa*K  ch 5C  n't  -  'li  circuit  board l a y o u t .  The company was  successful i n f i t t i n g  e n t i r e c o n t r o l l e r on one p r i n t e d c i r c u i t of  the p r i n t e d c i r c u i t  board.  The b a s i c  board i s shown i n F i g u r e 32.  the  layout  The most  f r e q u e n t l y used l i n e s from the c o n t r o l l e r a r e brought to the edge connector P I . header  Less used l i n e s a r e brought to the r i b b o n c a b l e  P2.  While the l a y o u t shown i s i d e a l f o r the s u b m e r s i b l e a p p l i c a t i o n , and i s a c c e p t a b l e f o r other s t a n d - a l o n e a p p l i c a t i o n s , the c a r d shape and edge connector format are non-standard and not  therefore  v e r y good f o r a p p l i c a t i o n s where the i n v e r t e r c o n t r o l l e r i s  p a r t of a l a r g e r system.  However the a r e a of the i n v e r t e r  c o n t r o l l e r board i s almost i d e n t i c a l to t h a t of the p r i n t e d circuit  boards used i n the STD microcomputer  bus  system.  T h e r e f o r e i t s h o u l d be p o s s i b l e to r e d e s i g n the i n v e r t e r c o n t r o l l e r to f i t on an STD bus c a r d .  The c o n t r o l l e r c o u l d then  be used as a p e r i p h e r a l d e v i c e by a STD bus microcomputer  or,  a l t e r n a t i v e l y , the i n v e r t e r c o n t r o l l e r c o u l d make use of the wide range of c o m m e r c i a l l y a v a i l a b l e STD bus cards to expand i t s own capabilities.  117  Chapter Inverter  5  C o n t r o l l e r Software  Design  The i n v e r t e r c o n t r o l l e r software c o n s i s t s of components which are used i n v i r t u a l l y a l l a p p l i c a t i o n s and components which are specific  to p a r t i c u l a r a p p l i c a t i o n s .  This chapter w i l l  c o n c e n t r a t e on the d e s i g n of of those components, such as c o n t r o l l e r and i n v e r t e r i n i t i a l i z a t i o n , c o n t r o l l e r sequencing, and c o n t r o l of motor a c c e l e r a t i o n , d e c e l e r a t i o n , which are common to a l l a p p l i c a t i o n s . discusses applications  and  The f o l l o w i n g  reversing, chapter  of the i n v e r t e r c o n t r o l l e r and the d e s i g n  of some of the software components s p e c i f i c to these applications.  One  of the d i s t i n g u i s h i n g f e a t u r e s of the software i s t h a t  written  i n C, which i s a h i g h - l e v e l programming language.  m i c r o p r o c e s s o r based  making software development e a s i e r and  program.  possible, ability  language.  Besides  f a s t e r , the use of a h i g h  r e s u l t s i n a c o n t r o l l e r program t h a t i s e a s i e r to  document, m a i n t a i n , and modify language  Other  i n v e r t e r c o n t r o l l e r s d e s c r i b e d i n the  l i t e r a t u r e have been programmed i n assembly  l e v e l language  i t is  than the e q u i v a l e n t assembly  The c o n t r o l l e r s o f t w a r e i s designed, as f a r as  i n a modular f a s h i o n  to m a i n t a i n and modify  i n o r d e r to f u r t h e r enhance the the s o f t w a r e .  Another unique a s p e c t of the s o f t w a r e d e s i g n of the i n v e r t e r  118  c o n t r o l l e r i s t h a t i t i s o r g a n i z e d as a f i n i t e s t a t e machine. While the s t a t e machine approach t o software  d e s i g n has been used  i n a v a r i e t y of a p p l i c a t i o n s , i t does not appear to have been used p r e v i o u s l y i n c o n t r o l l e r s f o r power e l e c t r o n i c Designing  equipment.  the i n v e r t e r c o n t r o l l e r software as a f i n i t e s t a t e  machine i s c o n s i d e r a b l y l e s s prone t o e r r o r than the more ad hoc techniques  commonly used to d e s i g n the software  electronic  equipment.  5.1  One  f o r power  Software Development System  of the g o a l s of t h i s p r o j e c t i s to d e s i g n the i n v e r t e r  c o n t r o l l e r so t h a t i t can be e a s i l y and q u i c k l y adapted t o a new drive application.  Performing many of the c o n t r o l l e r f u n c t i o n s  w i t h computer software w i l l h e l p t o a c h i e v e t h a t g o a l i f the process of d e v e l o p i n g t h e software  I s made q u i c k and easy.  In  a d d i t i o n the software  should be designed  so t h a t i t i s easy t o  m a i n t a i n and modify.  These requirements  provide a strong  i n c e n t i v e f o r the use o f a h i g h l e v e l programming  language.  However, the machine language code produced by the t r a n s l a t i o n of the h i g h l e v e l language source code must be e f f i c i e n t  i n terms of  e x e c u t i o n speed and s t o r a g e requirements.  execution  Reasonable  speed i s r e q u i r e d i n o r d e r t h a t the c o n t r o l l e r can c a r r y out a l l i t s r e q u i r e d f u n c t i o n s without of response.  s e r i o u s d e g r a d a t i o n of i t s speed  F o r t u n a t e l y , the use of the P h i l i p s HEF4752V PWM  waveform generator  IC c o n s i d e r a b l y reduces  speed s i n c e many of the speed c r i t i c a l  the r e q u i r e d e x e c u t i o n  c o n t r o l l e r functions are  119  peformed by t h i s  IC.  Compact code i s r e q u i r e d so t h a t the  c o n t r o l l e r program can f i t i n t o the l i m i t e d EPROM space on controller  the  card.  A number of h i g h l e v e l languages were c o n s i d e r e d f o r t h i s p r o j e c t . In f a c t , some i n i t i a l u s i n g the PL/M system.  software  development work was  c r o s s - c o m p i l e r a v a i l a b l e on the UBC  However, the C language  [71] was  programming language f o r t h i s p r o j e c t .  finally  computer chosen as  [72, 73,  f e a t u r e s such as b i t m a n i p u l a t i o n and  i n s t r u c t i o n s which make i t a good assembly language y e t i t a l s o has h i g h l e v e l language f a c i l i t i e s , s t r u c t u r e s and  data t y p i n g , which support  to program d e s i g n .  The  shifting replacement,  such as  control  microprocessors.  used i n the  c o n t r o l l e r w i l l not r e s u l t  i n the o b s o l e s c e n c e  software  controller.  f o r the  As d i s c u s s e d i n the p r e v i o u s c h a p t e r , i t was  inverter of a l l the  important  to have a  development system f o r t h i s p r o j e c t .  The  development system used c e r t a i n l y meets t h i s requirement. based on an Apple co-processor  C  A f i n a l advantage of the C language i s t h a t  Thus a change i n the m i c r o p r o c e s s o r  low c o s t software  74],  a s t r u c t u r e d approach  i n e x p e n s i v e c o m p i l e r s a r e a v a i l a b l e f o r most  developed  are  e f f i c i e n t machine language  code f o r the 8080 f a m i l y of microcomputers language has  the  Benchmark t e s t s of h i g h  l e v e l language c o m p i l e r s have shown t h a t C compilers t y p i c a l l y among the b e s t i n p r o d u c i n g  done  I I p e r s o n a l computer equipped  with a  It i s  Z-80  card t h a t a l l o w s i t to run programs w r i t t e n f o r the  120  CP/M  operating  system.  The development software c o n s i s t s of a C  compiler which generates I n t e l 8080/8085 assembly language, a r e l o c a t i n g assembler and l i n k e r f o r the 8080/8085, and a t e x t e d i t o r f o r e d i t i n g the source f i l e s .  An EPROM programmer  t h a t plugs i n t o t h e Apple I I i s used to s t o r e t h e o b j e c t i n t o a 2732 EPROM.  card code  The e n t i r e system, i n c l u d i n g the computer, a  p r i n t e r , the EPROM programmer, and t h e development s o f t w a r e , can be purchased f o r under $5000.  5.2  Description  of C o n t r o l l e r  In any software development p r o j e c t form of system model as the b a s i s the model w i l l  Software  i t i s h e l p f u l to use some  f o r the design.  The n a t u r e of  depend on the n a t u r e o f t h e p r o j e c t .  In the  d e s i g n of a n u m e r i c a l a n a l y s i s program the model i s l i k e l y  to be  the mathematical a l g o r i t h m  that  out.  a p p l i c a t i o n , t h e model may c o n s i s t of  In a data p r o c e s s i n g  t h e program i s supposed to c a r r y  data f l o w graphs and d e s c r i p t i o n s  of data  structures.  A good model f o r t h e i n v e r t e r c o n t r o l l e r s o f t w a r e i s the f i n i t e s t a t e machine [75].  A finite  s t a t e machine i s a system which i s  i n one of a f i n i t e number of s t a t e s a t any one time.  The machine  makes a t r a n s i t i o n from one s t a t e t o another as a r e s u l t of some event. is  The s t a t e t h a t t h e system moves to on a s t a t e t r a n s i t i o n  determined only by the system's p r e s e n t s t a t e and the  o c c u r r e n c e of a p a r t i c u l a r event o r combination of events the p r e s e n t s t a t e .  The f i n i t e  during  s t a t e machine model has been used  121  i n a number of c o n t r o l o r i e n t e d  software designs, i n c l u d i n g  an  i n d u s t r i a l sewing machine c o n t r o l l e r [76], process c o n t r o l and  a c o n t r o l l e r for a hybrid  The  operation  of a f i n i t e s t a t e machine (FSM)  g r a p h i c a l l y by The  not  be  can  be  described  of a s t a t e t r a n s i t i o n diagram ( F i g u r e  The  mode i n which the  state  t a s k s being performed  l i n e s i n d i c a t i n g t r a n s i t i o n s are marked w i t h  t h a t causes the  the v a l u e of an  or simply the  33).  of c i r c l e s , each of which r e p r e s e n t s a  operating  change.  the c o n d i t i o n could  [78].  l i n e s i n d i c a t i n g t r a n s i t i o n s among s t a t e s . Each  r e p r e s e n t s an do  the use  diagram c o n s i s t s  s t a t e , and  e l e c t r i c vehicle  [77],  input  change of s t a t e .  The  condition  or program v a r i a b l e , an  c o m p l e t i o n of a l l the  tasks within  the  interrupt,  present  state.  The  s t a t e t r a n s i t i o n diagram e x p l i c i t l y shows the  conditions  cause a change of c o n t r o l w h i l e s u p p r e s s i n g much of the about the useful  functions  performed w i t h i n  t o o l when d e s i g n i n g  each s t a t e .  detail  T h i s makes i t a  c o n t r o l l e r s where much of the  d e t e r m i n i n g the  possible  to i d e n t i f y e r r o r s i n c o n t r o l f l o w from t h i s diagram.  diagram a t the  where more than one  top  of F i g u r e  where the  F i n a l l y , the state.  State  It i s also  34 shows an i n c o n s i s t e n t  t r a n s i t i o n i s possible  c o n d i t i o n A i s t r u e . The FSM  c o n t r o l sequence.  design  involves  The  correct  that  from s t a t e  middle diagram shows an  t r a n s i t i o n s f o r A and  B not  bottom diagram shows an FSM  FSM  1 when  incomplete  t r u e are not  specified.  w i t h an u n r e a c h a b l e  4 w i l l never be reached s i n c e D i s always f a l s e i n  122  Figure  33  State  Transition  123  Diagram  Figure  34  Errors in Control 124  Flow  s t a t e 2.  R e a l systems o f t e n have many s t a t e s and  t r a n s i t i o n s among them.  i f a s t a t e t r a n s i t i o n diagram i s  not  used as an a i d i n d e t e c t i n g  The  s t a t e t r a n s i t i o n diagram f o r the b a s i c FSM  and  eliminating  i n v e r t e r c o n t r o l l e r i s shown i n F i g u r e  RAM-I/O c h i p and modes r e q u i r e d all  the  the  i n i t i a l i z e s any  c a r r i e s out  the  initializing  the  to i n i t i a l i z e  inverter.  contactor  to connect the  the  detection  fault  checks, and initial  Once the  8156  operating  l o a d s and  starts for  software a l s o initialization  r e c o g n i z e d by  c o n t r o l l e r can  and  the  begin  inverter.  required  d e s i g n of the  The  t h a t are  Once t h i s i s done the  the  to the  requiring explicit  controller.  applied  r e s e t sequence r e q u i r e d  waveform g e n e r a t o r IC. variables  the  INITIALIZATION s t a t e .  counter/timer chip  enables those i n t e r r u p t i n p u t s  actions  model of  c o n t r o l l e r software c o n f i g u r e s  9513  c o u n t e r s , and  them.  When power i s  f o r proper c o n t r o l l e r o p e r a t i o n ,  the HEF4752V PWM  The  35.  i n v e r t e r c o n t r o l l e r , i t e n t e r s the  W i t h i n t h i s s t a t e , the  possible  I t i s v e r y easy to to d e s i g n a system  w i t h a l l of the above e r r o r s  to the  many  the  i n v e r t e r depend on  However they may  include  i n v e r t e r to the AC  closing a  supply,  initializing  c i r c u i t s , p e r f o r m i n g some i n i t i a l  s e t t i n g the d i s p l a y s  on  the  diagnostic  the c o n t r o l p a n e l to t h e i r  condition.  i n i t i a l i z a t i o n process i s complete, the s o f t w a r e makes  an u n c o n d i t i o n a l  t r a n s i t i o n to the OFF  state.  125  In t h i s s t a t e  the  POWER  INITIALIZATION  ON RESET  LEGEND: FC PF PDIR DIRCMND  ON/OFr SWITCH • O F F  -  F R E Q U E N C Y COMMAND PRESENT FREQUENCY PRESENT DIRECTION D I R E C T I O N COMMAND  F C >JPF A N D O N AND  INITIALIZATION  PDIR • OIRCMWD  C O M P L E T E  ACCELERATING  OFF .ON/OFF  S W I T C H .  ON  [ SYSTEK . RtSET ON/OFF  FC >  SWITCH  AMO  « OFF  , FC • PF  3 HZ  A N D O N AND  PD\R=  1 AND  O N AND  \PDIR=DIRCHND  STOPPED  'FOPF FC  WO  AND  \ RESET  'AND  t^HZ  F C < PF  ON  Fc-PF  OW  A N B PDIR = DlROANQ  >  PF £ . 1 M 2  'FC 'AND ENTER. F R O M A N Y V T A T E UPON R E C E I P T O F F A U L T INTERRUPT  FC^ OR(  35  DECELERATING  PF  - PF O M AND  PDIR « D I R C M W O  O F F A N O PF 7 3HZl  O R (PD1R.+ DIRCHN& A N D P F ?  Figure  CONSTANT SPEED  F C <• P F 'OR O F F O R P D I R * DIRCMND  Finite  State  A N D ON  AND  I Pu\R = OlRCrlND  OR O F F O R PDIR * DIRCMND  FAULT  DIRCMND  |FC> PF  ON  (zui)  Machine Model o f I n v e r t e r C o n t r o l l e r  program simply w a i t s f o r a s i g n a l to t u r n t h e d r i v e on. T h i s s i g n a l , marked as the ON/OFF SWITCH on the diagram,  may a c t u a l l y  come from a p h y s i c a l s w i t c h , o r i t may come as a command from a higher l e v e l c o n t r o l l e r . received,  When the s i g n a l t o t u r n the d r i v e on i s  t h e software makes a t r a n s i t i o n t o the STOPPED s t a t e .  In the STOPPED s t a t e the program determines d i r e c t i o n of motor r o t a t i o n and s e t s HEF4752V a c c o r d i n g l y . command i n p u t greater  the r e q u i r e d  the CW c o n t r o l i n p u t  The program a l s o monitors  to determine  t o the  the frequency  whether the frequency command i s  than the lower l i m i t  of 3 Hz.  I f i t i s , the program  makes a t r a n s i t i o n t o the ACCELERATING s t a t e .  At t h i s p o i n t  the HEF4752V outputs a r e enabled by s e t t i n g the L  c o n t r o l input  h i g h and the d r i v e begins o p e r a t i o n .  During the  time t h a t  the program i s i n the ACCELERATING s t a t e , the i n v e r t e r  frequency  i s incremented  accelerates.  a t a c o n s t a n t r a t e so t h a t t h e motor  The i n v e r t e r frequency i s c o n t i n u a l l y compared t o  the frequency command.  I f i t becomes equal to the frequency  command, a t r a n s i t i o n i s made t o t h e CONSTANT SPEED s t a t e . A l t e r n a t i v e l y , i f the frequency command i s changed so t h a t the i n v e r t e r frequency exceeds i t , or i f t h e d r i v e i s commanded t o change d i r e c t i o n o r t o t u r n o f f , a t r a n s i t i o n i s made to the DECELERATING s t a t e .  Assuming t h a t a t r a n s i t i o n t o t h e CONSTANT SPEED s t a t e has been made, t h e program ceases i n c r e m e n t i n g the frequency and s i m p l y  127  monitors  the frequency command, d i r e c t i o n command, and ON/OFF  SWITCH commands. i s greater  I f the frequency command i s changed so t h a t i t  than t h e i n v e r t e r frequency, t h e software makes a  t r a n s i t i o n back to the ACCELERATING s t a t e .  I f the frequency  command i s changed so t h a t i t i s l e s s than t h e i n v e r t e r frequency, o r i f the d r i v e i s commanded to t u r n o f f or r e v e r s e d i r e c t i o n , t h e software makes a t r a n s i t i o n to the DECELERATING state.  If the t r a n s i t i o n t o the DECELERATING s t a t e i s made, the program begins to decrement the i n v e r t e r frequency.  I f the d r i v e i s  being commanded t o r e v e r s e d i r e c t i o n o r to t u r n o f f , decrementing w i l l continue u n t i l point  the i n v e r t e r frequency reaches  3 Hz.  At that  a t r a n s i t i o n i s made back to the STOPPED s t a t e and t h e  i n v e r t e r switching  signals are disabled.  A l t e r n a t i v e l y , i f the  c o n t r o l l e r i s i n the DECELERATING s t a t e simply because the frequency command i s l e s s than the i n v e r t e r decrementing i s c o n t i n u e d u n t i l  frequency,  the i n v e r t e r frequency i s l e s s  than or equal to the frequency command.  I f the i n v e r t e r  frequency i s equal t o the frequency command, a t r a n s i t i o n i s made to the CONSTANT SPEED s t a t e . so t h a t i t becomes g r e a t e r  I f t h e frequency command i s changed  than t h e i n v e r t e r f r e q u e n c y , a  t r a n s i t i o n i s made to the ACCELERATING s t a t e .  Many i n v e r t e r f a u l t within  conditions  can be d e a l t w i t h by software  one of the s t a t e s a l r e a d y  a c c e l e r a t i o n or d e c e l e r a t i o n  discussed.  F o r example, i f the  r a t e causes the i n v e r t e r  128  current  limit  to be exceeded, the software i n the ACCELERATING o r  DECELERATING s t a t e can reduce the r a t e a t which the i n v e r t e r frequency i s changed. its  l i m i t during  S i m i l a r l y , i f the DC bus v o l t a g e  deceleration  exceeds  because of energy r e g e n e r a t e d  the motor, s o f t w a r e i n the DECELERATING s t a t e can take a c t i o n such as c l o s i n g a c o n t a c t o r  from  corrective  to connect a b a l l a s t  resistor  a c r o s s the DC bus.  S e r i o u s d r i v e f a u l t s , such as a motor s h o r t actions  require  which a l t e r the normal sequencing of the f i n i t e  machine. any  circuit,  T h e r e f o r e a FAULT s t a t e i s added which i s entered from  of the other s t a t e s when a f a u l t  TRAP i n p u t  state  of the 8085.  interrupt i s received  on the  The f i n i t e s t a t e machine can a l s o be  designed to e n t e r t h e FAULT s t a t e on r e c e i p t of a " p a n i c  stop"  s i g n a l from the c o n t r o l p a n e l . In t h e FAULT s t a t e , the i n v e r t e r switching the  signals are disabled  contactor  i n o r d e r to shut the i n v e r t e r o f f ,  ( i f any) c o n n e c t i n g t h e i n v e r t e r to the AC s u p p l y  i s opened, and any f a u l t i n d i c a t o r s on the c o n t r o l p a n e l a r e activated.  The c o n t r o l l e r s t a y s  i n the FAULT s t a t e u n t i l  i t is  r e s e t , a t which time i t e n t e r s the INITIALIZATION s t a t e .  This  f i n i t e s t a t e machine model i s q u i t e s i m p l e .  c a p a b i l i t i e s are s u f f i c i e n t submersible t h r u s t e r  drive.  for applications  However i t s  such as the  The f i n i t e s t a t e machine  properly  handles sequencing of the t h r u s t e r d r i v e f o r any combination of commands. the  F o r example, i f the d i r e c t i o n command i s changed w h i l e  drive i s operating,  the d r i v e w i l l d e c e l e r a t e  129  to a s t o p , the  phase sequence of the s w i t c h i n g  waveform w i l l  the  drive w i l l  the i n v e r t e r frequency matches  the  commanded f r e q u e n c y .  accelerate  until  S i m i l a r l y , i f the d r i v e i s commanded t o  turn o f f while operating, the  i n v e r t e r switching  t u r n i t s e l f on.  be r e v e r s e d , and  i twill  decelerate  to a s t o p ,  s i g n a l s , and then wait f o r a command t o  In a more complex d r i v e , t h i s model  as a u s e f u l framework  disable  serves  to which the a d d i t i o n a l f u n c t i o n s  required  by the d r i v e can be added.  5.3 Software Implementation  A listing  of the c o n t r o l program f o r a submersible t h r u s t e r  i s g i v e n i n Appendix 1.  Much of the program i s devoted t o  c o n t r o l l i n g the hardware on the i n v e r t e r c o n t r o l l e r board. device s p e c i f i c portions  drive  These  of the program a r e not o v e r l y  i n t e r e s t i n g and so w i l l not be d i s c u s s e d . i n t e r e s t t o see how the f i n i t e  However, i t i s of  s t a t e machine model of the  c o n t r o l l e r i s a c t u a l l y implemented i n the program.  The f u n c t i o n m a i n ( ) , which implements the s t a t e sequencer of the finite  s t a t e machine i s l i s t e d  /* Main f u n c t i o n f i r s t  below.  initializes  the system and then l o o p s c o n t i n u o u s l y  */  main() { initializeO; ^ i m p l e m e n t s t h e INITIALIZATION s t a t e */ w h i l e (ALWAYS) { c l o c k t i c k = 0; if  /* c l o c k t i c k s e t to 1 by i n t 7 5 ( ) i n t e r r u p t s e r v i c e r o u t i n e which handles r e a l - t i m e c l o c k * / ( f a u l t f l a g == TRUE) / * f a u l t f l a g s e t t o TRUE by t r a p ( ) i n t e r r u p t  130  s e r v i c e r o u t i n e which handles i n t e r r u p t s */ n e x s t a t e = FAULTSTATE; s w i t c h ( n e x s t a t e ) /* S t a t e sequencer */ { case OFFSTATE :  off(); case  case  case  case  case  break; STOPSTATE : stopped(); break; ACCSTATE : accelerating(); break; DECSTATE : decelerating(); break; CONSTSTATE : constantspeed(); break; FAULTSTATE : fault(); break;  default : fault(); break;  } while (!clockt i c k ) ; /* Loop w h i l e w a i t i n g f o r next r e a l - t i m e c l o c k i n t e r r u p t , then go through s t a t e sequencer again*/  }  }  The f u n c t i o n main() i s e n t e r e d a f t e r power i s a p p l i e d t o the c o n t r o l l e r or the c o n t r o l l e r i s r e s e t .  It calls  the  i n i t i a l i z e ( ) f u n c t i o n which c a r r i e s out the a c t i o n s for  the INITIALIZATION s t a t e .  One  the r e a l - t i m e c l o c k to i n t e r r u p t milliseconds.  required  of these a c t i o n s i s to s e t up  the m i c r o p r o c e s s o r every 5  T h i s r e a l - t i m e c l o c k i n t e r r u p t i s used  the s t a t e sequencer.  A f t e r every c l o c k i n t e r r u p t , the  uses the switch c o n t r o l statement  to d r i v e sequencer  to s e l e c t a f u n c t i o n t o  execute depending on the v a l u e of the v a r i a b l e nexstate which  131  fault  represents  the next s t a t e to be e n t e r e d from t h e p r e s e n t s t a t e o f  the f i n i t e s t a t e machine. actions  required  The f u n c t i o n s e l e c t e d c a r r i e s out the  f o r the new s t a t e and determines the new v a l u e  f o r the v a r i a b l e nexstate so t h a t the proper s t a t e  transition  w i l l be made on the next pass through the s t a t e sequencer.  One e x c e p t i o n  t o the p r a c t i c e of d e t e r m i n i n g the next s t a t e i n  the f u n c t i o n p e r f o r m i n g the a c t i o n s t r a n s i t i o n t o t h e FAULT s t a t e .  of the p r e s e n t s t a t e i s the  The i n t e r r u p t h a n d l e r r o u t i n e f o r  the TRAP i n t e r r u p t i n p u t , which r e c e i v e s f l a g v a r i a b l e (faultflag)  fault  i n t e r r u p t s , sets a  t h a t i s checked by the s t a t e  sequencer. I f f a u l t f l a g i s s e t , the s t a t e sequencer s e t s nexstate t o the v a l u e r e q u i r e d  to enter  the FAULT s t a t e .  Determining the t r a n s i t i o n to the FAULT s t a t e w i t h i n the s t a t e sequencer e l i m i n a t e s  redundant statements i n the f u n c t i o n s f o r  each s t a t e s i n c e the presence of a f a u l t always causes a t r a n s i t i o n to t h e FAULT s t a t e no matter what the present s t a t e of the  system.  The  a c c e l e r a t i n g O f u n c t i o n , l i s t e d below, which c a r r i e s out  the a c t i o n s  required  of the f u n c t i o n s  i n the ACCELERATING s t a t e , i s r e p r e s e n t a t i v e  f o r the other s t a t e s .  /*  accelerating function  /* C a r r i e s out f u n c t i o n s i t s frequency */  */  required while i n v e r t e r i s increasing  accelerating() { if  ( f a u l t f l a g == FALSE) startQ;  / * A c t i v a t e the i n v e r t e r switching s i g n a l s i f no f a u l t has o c c u r r e d  132  */  /* check i f t r a n s i t i o n to another s t a t e i s r e q u i r e d  */  i f ( o f f_or_rev()) n e x s t a t e = DECSTATE; else if(pos_freq_error()) n e x s t a t e = DECSTATE; else if(zero_freq_error()) nexsTate ~^ CONSTSTATE; else  { /*  n e x s t a t e = ACCSTATE; */ i n c _ f requency(); }  } The  function f i r s t  i n v e r t e r f a u l t has the  switching  enables the occurred.  s i g n a l s may  i n v e r t e r switching T h i s a c t i o n may  already  s i g n a l s i f no  be redundant  be enabled but  since  i t does no harm.  Then a s e r i e s of checks are performed to determine i f a t r a n s i t i o n to a s t a t e o t h e r than the p r e s e n t s t a t e i s T h i s i s done by a s e r i e s of c a l l s each perform a t e s t and instance,  required.  to lower l e v e l f u n c t i o n s  r e t u r n a v a l u e of TRUE or FALSE.  the f u n c t i o n o f f _ o r _ r e v ( ) checks whether  direction.  the new  I f a change of s t a t e i s r e q u i r e d ,  state i s stored  function returns clock i n t e r r u p t . is called  reverse  the code f o r  i n the v a r i a b l e n e x s t a t e and  the  to the s t a t e sequencer to wait f o r the I f no  change of s t a t e i s r e q u i r e d ,  to increment the i n v e r t e r frequency by  the a c c e l e r a t i n g ( ) f u n c t i o n r e t u r n s  For  the  c o n t r o l l e r i s being commanded to t u r n the d r i v e o f f or its  which  0.5  a  next function  Hz  and  then  to the s t a t e sequencer.  I t s h o u l d be noted t h a t the c o n t r o l l e r software i s w r i t t e n  in a  top-down, modular f a s h i o n .  the  At the  top  of the h i e r a r c h y  s t a t e sequencer f u n c t i o n main() which c a l l s  133  the  function  is  a s s o c i a t e d w i t h the p r e s e n t  s t a t e of the f i n i t e s t a t e machine.  T h i s f u n c t i o n i n t u r n c a l l s lower l e v e l f u n c t i o n s tasks.  The  d e t a i l s of a c c e s s i n g  s t a t u s r e g i s t e r s and operations  I/O  p o r t s , masking out b i t s i n  other hardware and  are h i d d e n i n the low  to perform i t s  application specific  level functions.  T h i s makes  the program e a s i e r to understand s i n c e the reader i s not inundated w i t h low o v e r a l l operation  l e v e l d e t a i l when t r y i n g to f o l l o w of the program.  the  I t a l s o makes i t e a s i e r to  adapt to changes i n the hardware or the a p p l i c a t i o n s i n c e only the low  l e v e l f u n c t i o n s have to be  rewritten.  Some assembly language support f u n c t i o n s  are r e q u i r e d  i n addition  to the program l i s t e d i n Appendix 1, which i s w r i t t e n almost e n t i r e l y i n C. header.  One  I t contains  of these f u n c t i o n s  is called  run-time  the code, executed immediately a f t e r a  system r e s e t , which i n i t i a l i z e s  the s t a c k p o i n t e r and  the f u n c t i o n main() i n the c o n t r o l program. The also contains  the  the code r e q u i r e d upon e n t r y  interrupt service routine.  The  program access to the 8085 I/O  other  run-time header  t o , and  functions  then c a l l s  e x i t from, an  g i v e the  i n s t r u c t i o n s (IN and  OUT)  C and  the i n s t r u c t i o n s which c o n t r o l the i n t e r r u p t system ( E I , DI, and  5.4  to RIM,  SIM).  E v a l u a t i o n of Software Development Using the C Language  Microprocessor described  based i n v e r t e r c o n t r o l l e r s that have been  i n the l i t e r a t u r e appear to have been programmed i n  134  asssembly language. Indeed, the use of assembly language to program c o n t r o l l e r s f o r power c o n v e r s i o n equipment universal.  i s almost  The reason n o r m a l l y g i v e n f o r the use of assembly  language i s t h a t the maximum p o s s i b l e e x e c u t i o n speed i s r e q u i r e d f o r the program.  Sometimes l i m i t a t i o n s  i n memory s i z e or the  l a c k of a h i g h l e v e l language c o m p i l e r a r e c i t e d as reasons f o r the use of assembly  language.  These l a s t two reasons a r e no  l o n g e r v e r y v a l i d s i n c e memory c o s t s a r e now  v e r y low and h i g h  l e v e l language c o m p i l e r s a r e a v a i l a b l e f o r many m i c r o p r o c e s s o r s . However, the q u e s t i o n of e x e c u t i o n speed remains.  I t i s t r u e t h a t a program w r i t t e n i n C w i l l execute more s l o w l y than the e q u i v a l e n t assembly language program  i f the assembly  language programmer i s r e a s o n a b l y competent.  However i f the  C program i s f a s t enough to meet a l l the requirements of the a p p l i c a t i o n , i t i s i m m a t e r i a l t h a t the assembly program would be f a s t e r .  In t h a t case the advantages of  programming i n a h i g h l e v e l language  The C program  language  predominate.  f o r the s u b m e r s i b l e t h r u s t e r d r i v e , d e s c r i b e d i n  the p r e v i o u s s e c t i o n , o p e r a t e s w i t h a 5 m i l l i s e c o n d c l o c k i n t e r v a l and has some time to s p a r e .  real-time  A considerably  more c o m p l i c a t e d program, w r i t t e n f o r a l i n e a r i n d u c t i o n motor d r i v e a p p l i c a t i o n , operates w i t h a 10 m i l l i s e c o n d c l o c k i n t e r v a l and a l s o has time to s p a r e . the response time i s more than adequate.  real-time  In both cases Interrupt  service  r o u t i n e s t o handle f a u l t s r e q u i r i n g v e r y f a s t response a r e  135  p a r t l y coded i n assembly p o r t i o n of the e n t i r e  language but these c o n s t i t u t e a s m a l l  program.  The primary reason why a h i g h l e v e l language l i k e C can be used s u c c e s s f u l l y i n t h i s i n v e r t e r c o n t r o l l e r i s that the PWM g e n e r a t i o n IC unloads a l a r g e number of speed c r i t i c a l from the m i c r o p r o c e s s o r .  waveform  operations  Another c o n t r i b u t i n g f a c t o r i s the use  of the f i n i t e s t a t e machine as a s o f t w a r e d e s i g n t o o l .  The  f i n i t e s t a t e machine model encourages an o r g a n i z e d and s t r u c t u r e d approach to the software d e s i g n which i n t u r n r e s u l t s i n a s i m p l e , c l e a n , and e f f i c i e n t  It i s l i k e l y  program.  t h a t some f u t u r e a p p l i c a t i o n s , i n v o l v i n g c l o s e d  loop  c o n t r o l of motor torque o r speed, w i l l need t o make more use of assembly language i n o r d e r to a c h i e v e adequate loop  bandwidth.  Even i n those cases however, i t makes sense t o w r i t e the m a j o r i t y of the program critical  i n a language l i k e C and w r i t e only t h e speed  s e c t i o n s of the program i n assembly  language.  The c o n t r o l program f o r the s u b m e r s i b l e t h r u s t e r d r i v e of about  consists  180 l i n e s of C language code ( i g n o r i n g comments) and  about 40 l i n e s of assembly language code. another 60 l i n e s of assembly functions.  There a r e about  language code i n the support  Of the C language code, about 80 l i n e s c o n s i s t of  d e f i n i t i o n s and d e c l a r a t i o n s which don't generate any machine language.  The machine language program,  produced  after  c o m p i l i n g , assembling and l i n k i n g the source programs,  136  fits  into  l e s s than 2K bytes of EPROM.  The program f o r the l i n e a r  i n d u c t i o n motor d r i v e a p p l i c a t i o n b a r e l y f i t s  i n t o 4K bytes of  EPROM a f t e r some r e w r i t i n g of the program to make i t more memory efficient.  Future a p p l i c a t i o n s w i l l  d e f i n i t e l y need more EPROM  space on the c o n t r o l l e r c a r d .  The advantages of a h i g h l e v e l language a r e i n the time r e q u i r e d to develop a program and i n the a b i l i t y the program.  t o m a i n t a i n and modify  The c o n t r o l program f o r the s u b m e r s i b l e  d r i v e took about a month t o w r i t e and debug. with published about  thruster  This i s i n l i n e  e s t i m a t e s t h a t programs a r e produced a t a r a t e of  10 l i n e s per day.  When the program f o r the l i n e a r  i n d u c t i o n motor d r i v e was w r i t t e n , much of t h e program f o r the submersible t h r u s t e r d r i v e c o u l d be used d i r e c t l y , so t h i s program a l s o took about a month to w r i t e d e s p i t e the f a c t t h a t i t i s about twice as long as the program f o r the s u b m e r s i b l e thruster drive.  I f the programs had been w r i t t e n i n assembly  language i t i s probable t h a t the development time f o r the s u b m e r s i b l e t h r u s t e r program would have been a t l e a s t two months and t h a t i t would have been c o n s i d e r a b l y  more d i f f i c u l t  t o use  t h i s program as a b a s i s f o r the development of the l i n e a r i n d u c t i o n motor d r i v e program.  C e r t a i n l y the top down, modular  s t r u c t u r e of the programs would be more d i f f i c u l t  to a c h i e v e i f  the programs were w r i t t e n i n assembly language.  Debugging a program w r i t t e n i n a h i g h l e v e l language i s d i f f e r e n t than debugging a program w r i t t e n i n assembly language.  137  In the  absence of h i g h l e v e l debugging t o o l s that a r e i n t e g r a t e d w i t h the c o m p i l e r , t h e r e i s l i t t l e in-circuit  to be gained from the use of  emulators, s i n g l e s t e p p i n g , and b r e a k p o i n t s s i n c e the  r e s u l t s don't mean much i n terms of the h i g h l e v e l program.  language  In cases where the t a r g e t system has an i n t e r f a c e to a  p r i n t e r or a t e r m i n a l , the h i g h l e v e l language program can be " i n s t r u m e n t e d " w i t h statements to p r i n t out i n f o r m a t i o n on the e x e c u t i o n of the program. t h i s f a c i l i t y was  In the case of the i n v e r t e r  not a v a i l a b l e .  controller  I n s t e a d , debugging c o n s i s t e d of  t h i n k i n g c a r e f u l l y about the observed problems i n the o p e r a t i o n of the c o n t r o l l e r , r e l a t i n g them to a s e c t i o n of the program which c o u l d cause the problem, f i n d i n g and c o r r e c t i n g the e r r o r , and then r e l o a d i n g the r e c o m p i l e d program i n t o EPROM to v e r i f y that the d i a g n o s i s was  The p r o c e s s was  correct.  a c t u a l l y l e s s p a i n f u l than i t appears.  h i g h l e v e l language program was  S i n c e the  s h o r t e r than the e q u i v a l e n t  assembly language program, and a l l o w e d the program d e s i g n to be expressed more n a t u r a l l y , t h e r e were fewer program e r r o r s to s t a r t with.  The h i g h l e v e l language program was  and u n d e r s t a n d , and was  better structured  assembly language program. Thus i t was  e a s i e r to read  than the average  e a s i e r to i s o l a t e the  s e c t i o n of the program r e s p o n s i b l e f o r a problem and e a s i e r to f i n d the program e r r o r i n that s e c t i o n of program.  F i n a l l y , the  need to r e c o m p i l e the program and reprogram the EPROM encouraged an o r g a n i z e d , e f f i c i e n t approach to debugging and p r o p e r , documented r e p a i r s .  In c o n t r a s t , the f a s t  138  turn-around p o s s i b l e  when debugging i n assembly language o f t e n encourages t r i a l  and  e r r o r approaches to debugging and the use of q u i c k , undocumented machine  language " p a t c h e s " t o c o r r e c t  errors.  On b a l a n c e , the d e c i s i o n to use a h i g h l e v e l language i n t h i s project  seems to be j u s t i f i e d .  The programs  produced to date  meet the speed requirements of the a p p l i c a t i o n s . applications  More demanding  can be d e a l t w i t h by u s i n g a f a s t e r v e r s i o n  of the  8085 m i c r o p r o c e s s o r , r e d e s i g n i n g the c o n t r o l l e r to use a more p o w e r f u l m i c r o p r o c e s s o r , or w r i t i n g some speed c r i t i c a l of the program i n assembly language. p r e v i o u s assembly language programming  portions  Based on e x p e r i e n c e w i t h p r o j e c t s , development  of a  h i g h l e v e l language program proceeds a t l e a s t twice as q u i c k l y as development economic  of the e q u i v a l e n t assembly language program.  implications  are obvious.  139  The  Chapter 6 Applications  of the I n v e r t e r  Controller  So f a r the i n v e r t e r c o n t r o l l e r has been used applications.  i n two d i f f e r e n t  The f i r s t i s the submersible t h r u s t e r  d r i v e which  was  the o r i g i n a l m o t i v a t i o n f o r the d e s i g n of the c o n t r o l l e r .  The  second  This  i s a c o n t r o l l e r f o r a l i n e a r i n d u c t i o n motor d r i v e .  chapter i s devoted  demonstrate  to d e s c r i b i n g  these two d r i v e s  since  they  the f l e x i b i l i t y and p r a c t i c a l i t y of the i n v e r t e r  controller i n realistic  applications.  Both d r i v e s make use of the wide frequency range controller.  of t h e  The submersible d r i v e operates over a range  400 Hz and the l i n e a r i n d u c t i o n 3 to 600 Hz.  The s m a l l  of 3 t o  motor d r i v e runs over a range of  s i z e and low p a r t s  count of the i n v e r t e r  c o n t r o l l e r a r e p a r t i c u l a r advantages i n the submersible a p p l i c a t i o n where compactness and r e l i a b i l i t y important.  I n the l i n e a r i n d u c t i o n  programmability  a r e extremely  motor d r i v e , the  of the c o n t r o l l e r i s a strong  asset  s i n c e the  d r i v e i s used i n e x p e r i m e n t a l work where parameters  such as  maximum i n v e r t e r f r e q u e n c y , v o l t s / H z r a t i o , c u r r e n t  limit  s e t p o i n t , and a c c e l e r a t i o n and d e c e l e r a t i o n for  d i f f e r e n t machines.  The  two d r i v e s  r a t e s must be changed  a r e both v i a b l e products t h a t can compete  e f f e c t i v e l y w i t h commercially a v a i l a b l e a l t e r n a t i v e s .  140  In the  case of the any  submersible t h r u s t e r d r i v e , t h e r e do not  other t h r u s t e r  drives  based on i n d u c t i o n  market.  The  c l o s e s t c o m p e t i t o r s are  motors.  The  AC  b r u s h l e s s DC  In a d d i t i o n , the  for  considerably  the  less sophisticated  The  only  possibly  more f l e x i b i l i t y  motors on  and  cheaper than  cannot compete w i t h the  the  i n d r i v e c h a r a c t e r i s t i c s than  commercially a v a i l a b l e i n v e r t e r t h a t was  on outdated t e c h n o l o g y .  DC  i n v e r t e r c o n t r o l l e r allows  c o n t r o l l e r s used by b r u s h l e s s DC  s u i t a b l e f o r the  be  the  d r i v e s based on b r u s h l e s s  motor d r i v e i s s m a l l e r  drive.  appear to  drives.  identified  as  l i n e a r i n d u c t i o n motor d r i v e i s based In terms of c o s t and  drive described  performance i t  i n this  chapter.  Both d r i v e s  c u r r e n t l y e x i s t as p r o t o t y p e s which have been  extensively  lab tested.  Both are  i n the p r o c e s s of  being  designed i n t o commercial systems.  6.1  Submersible T h r u s t e r  The  submersible t h r u s t e r drive  r a t e d at  1.5  HP.  Drive  A compact 400  (see F i g u r e Hz  36)  i s a small  drive  i n d u c t i o n motor, o r i g i n a l l y  designed f o r a i r c r a f t a p p l i c a t i o n s , i s used i n c o n j u n c t i o n power MOSFET i n v e r t e r . A gear r e d u c t i o n s h a f t and  the  i n v e r t e r and  motor can  f i l l e d h o u s i n g . A l t e r n a t i v e l y , the installed  i s used between the  p r o p e l l o r s h a f t of the d r i v e .  Chapter 3, the  c o n t r o l l e r card  is installed  i n the  motor  As mentioned i n  be mounted i n a common o i l  i n v e r t e r and  i n s e p a r a t e housings on the  with a  motor can  submersible.  be  The  submersible's e l e c t r o n i c s  141  c a n i s t e r which i s f i l l e d w i t h a i r a t one atmosphere p r e s s u r e . All  s i g n a l s between the i n v e r t e r and the c o n t r o l l e r pass through  opto-isolators  so the i n v e r t e r and c o n t r o l l e r a r e e l e c t r i c a l l y  i s o l a t e d from each o t h e r .  Figure  The  control strategy  36  Submersible T h r u s t e r D r i v e  f o r t h i s d r i v e i s simple, using  c o n s t a n t v o l t s / H z c o n t r o l of s t a t o r v o l t a g e a c c e l e r a t i o n and d e c e l e r a t i o n  rates.  a more complex c o n t r o l s t r a t e g y  open-loop  and f i x e d  In a t h r u s t e r  i s unnecessary.  application,  In the  p r o t o t y p e , the motor speed command i s e n t e r e d v i a a s l i d e p o t e n t i o m e t e r connected to the A/D c o n v e r t e r . A/D c o n v e r t e r i s i n t e r p r e t e d as a s i g n e d b i n a r y  142  The output of the number i n o f f s e t  binary  format.  Thus the p o t e n t i o m e t e r i s used to command speeds  i n both d i r e c t i o n s of r o t a t i o n .  The software that  reads and  i n t e r p r e t s the speed command i s i n one d i s t i n c t module which can be m o d i f i e d to d e a l w i t h speed commands i n the format s u p p l i e d by the  d e s i g n e r s of the s u b m e r s i b l e .  In a d d i t i o n  to the s l i d e p o t e n t i o m e t e r , the c o n t r o l l e r f o r the  p r o t o t y p e d r i v e i s a l s o equipped w i t h a s w i t c h to t u r n t h e i n v e r t e r on and o f f and a pushbutton t h a t of the microcomputer i n the c o n t r o l l e r . installed  to i n d i c a t e t h a t  causes a hardware r e s e t Three LED lamps a r e  the c o n t r o l l e r i s on, t h a t the  i n v e r t e r i s on, and t h a t a f a u l t has o c c u r r e d .  Since a c c e l e r a t i o n and d e c e l e r a t i o n  r a t e s a r e f i x e d and the  i n e r t i a of the l o a d does not change, p r o t e c t i o n  against  o v e r c u r r e n t due to too r a p i d a change i n i n v e r t e r frequency i s not  required.  A l s o , no s i g n i f i c a n t r e g e n e r a t i o n occurs when the  drive decelerates inertial.  since  the l o a d i s d i s s i p a t i v e r a t h e r  As a r e s u l t no p r o t e c t i o n  i s required  than  a g a i n s t an  o v e r v o l t a g e on the DC bus due to r e g e n e r a t e d energy.  Of the  f a u l t s which can o c c u r , the most common i s jamming of the p r o p e l l o r by a s t r a y p i e c e  of rope o r f i s h n e t .  equipped w i t h a f a s t a c t i n g c u r r e n t the  switching  The i n v e r t e r i s  limit circuit  that  shuts o f f  d e v i c e s and sends a f a u l t s i g n a l to the i n v e r t e r  c o n t r o l l e r i f the d r i v e  jams.  The i n v e r t e r c o n t r o l l e r software  e n t e r s t h e FAULT s t a t e on r e c e i p t of the f a u l t s i g n a l from the i n v e r t e r and d i s a b l e s  the i n v e r t e r s w i t c h i n g  143  signals.  In some  versions  of the s o f t w a r e , the c o n t r o l l e r e x i t s t h e FAULT s t a t e  when t h e speed command i s reduced t o zero so t h a t t h e o p e r a t o r can attempt t o r e s t a r t t h e d r i v e once t h e p r o p e l l o r i s unjammed.  The  t h r u s t e r d r i v e has been t h r o u g h an e x t e n s i v e  tests.  s e r i e s of tank  The d r i v e has been o p e r a t e d a t a c o n s t a n t speed  continuously  f o r two weeks.  I t has a l s o been c o n t i n u o u s l y  cycled  from f u l l speed i n one d i r e c t i o n t o f u l l speed i n t h e o t h e r d i r e c t i o n f o r a period  of t h r e e days.  F i n a l l y , a rope has been  thrown i n t o t h e p r o p e l l o r of t h e t h r u s t e r t o cause t h e d r i v e t o jam.  The d r i v e shut down p r o p e r l y  and was r e s t a r t e d once t h e  rope was removed.  Figure  37  Motor L i n e C u r r e n t ( V e r t i c a l : 5 A / d i v  Figure  37 shows t h e motor l i n e c u r r e n t  H o r i z o n t a l : 2 msec/div)  f o r the t h r u s t e r d r i v e .  can be seen, t h e waveform i s b a s i c a l l y s i n u s o i d a l .  144  When t h e  As  d r i v e i s operated be observed,  a t v e r y low speeds no cogging  i n d i c a t i n g t h a t harmonic torques a r e very s m a l l .  Representatives  of I n t e r n a t i o n a l Submarine E n g i n e e r i n g who have  seen demonstrations its  o r v i b r a t i o n can  of the t h r u s t e r d r i v e have been impressed  s m a l l s i z e and good performance.  by  They p a r t i c u l a r l y l i k e d the  smooth low speed performance o f the d r i v e ; a p p a r e n t l y the d r i v e s they a r e c u r r e n t l y u s i n g do not perform w e l l a t low speeds.  At  p r e s e n t , I n t e r n a t i o n a l Submarine E n g i n e e r i n g i s d e s i g n i n g a new s u m e r s i b l e which w i l l make use of t h i s  drive.  6.2 L i n e a r I n d u c t i o n Motor D r i v e  Cetec E n g i n e e r i n g of Burnaby B.C. i s d e v e l o p i n g l i n e a r i n d u c t i o n motors (LIMs) f o r use i n i n d u s t r i a l equipment such as c i r c u l a r saws, shakers, and g r i n d e r s .  Due to s i z e c o n s t r a i n t s on the  motors, the maximum p o l e p i t c h on the LIMs i s l i m i t e d .  Therefore,  to a t t a i n the r e q u i r e d speeds on the d r i v e n p o r t i o n of the machine, the LIM s t a t o r frequency must be r e l a t i v e l y h i g h - up t o 600 Hz i n some c a s e s . In some equipment the LIM speed must be variable. frequency  These two requirements  suggest  that a v a r i a b l e  i n v e r t e r be used as t h e LIM power s u p p l y .  Cetec attempted t o f i n d a commercially would meet t h e i r requirements. of o p e r a t i n g above 120 Hz. t h a t operated  a v a i l a b l e i n v e r t e r that  Most i n v e r t e r s were not capable  One s e r i e s of i n v e r t e r s was found  t o 400 Hz but i t was based on t h y r i s t o r  145  switches  and used a r a t h e r i n e f f i c i e n t s w i t c h o f f the d e v i c e s .  complementary commutation scheme t o  At 400 Hz the commutation l o s s e s were so  h i g h t h a t t h e i n v e r t e r output power r a t i n g was s u b s t a n t i a l y decreased.  As a r e s u l t  the i n v e r t e r s h a v i n g the r e q u i r e d  power r a t i n g were l a r g e and e x p e n s i v e .  output  Cetec decided t o fund  development of an i n v e r t e r , u s i n g more modern t e c h n o l o g y , t h a t would be s m a l l e r and l e s s expensive and would have t h e f l e x i b i l i t y r e q u i r e d f o r t h e i r development program.  The f i r s t v e r s i o n o f t h e i n v e r t e r was r a t e d a t 25 KVA; a 160 KVA v e r s i o n i s now b e i n g b u i l t .  The i n v e r t e r i s of t h e PWM type and  uses t r a n s i s t o r s as t h e power s w i t c h i n g d e v i c e s .  The i n v e r t e r  c o n t r o l l e r d e s c r i b e d i n t h i s t h e s i s i s used to c o n t r o l the inverter. open-loop  The c o n t r o l s t r a t e g y employed i s b a s i c a l l y an c o n s t a n t v o l t s / H z type.  However, the c o n t r o l l e r can be  switched i n t o a c l o s e d - l o o p speed c o n t r o l mode i n which the c o n t r o l l e r changes the i n v e r t e r frequency so t h a t t h e d i f f e r e n c e between a s e t p o i n t l e v e l from a p o t e n t i o m e t e r and a feedback s i g n a l from a speed band.  sensor i s s m a l l e r than some p r e s e t e r r o r  T h i s c o n t r o l mode i s i n t e n d e d f o r some LIM a p p l i c a t i o n s  where t h e motor speed must be kept a p p r o x i m a t e l y c o n s t a n t w i t h changes i n l o a d .  The speed  c o n t r o l loop i s not p a r t i c u l a r l y  a c c u r a t e or f a s t but i t s h o u l d meet the requirement application.  146  of t h e LIM  FAULT CURRENT  TO Figure  38  HALL E F F E C T C U R R E N T SENSORS  INVERTER  S i m p l i f i e d Schematic LIM Inverter  of  CONTROLLER  6.3  LIM D r i v e P r o t e c t i v e  A simplified The  Functions  schematic of the i n v e r t e r i s shown i n F i g u r e 38.  protective circuitry  i n t h i s i n v e r t e r i s c o n s i d e r a b l y more  complex than i n t h e i n v e r t e r f o r the submersible across  the DC bus monitors t h e bus v o l t a g e .  exceeds a maximum l i m i t , the sensor inverter controller. r e s i s t o r s across  drive.  I f the bus v o l t a g e  sends a f a u l t s i g n a l t o the  The i n v e r t e r c o n t r o l l e r then switches  the DC bus to absorb regenerated  the bus v o l t a g e has dropped below a lower l i m i t , sensor  removes the f a u l t  disconnects  A sensor  energy.  load Once  the bus v o l t a g e  s i g n a l and the i n v e r t e r c o n t r o l l e r  the l o a d r e s i s t o r s from the DC bus.  P r o t e c t i o n a g a i n s t s h o r t c i r c u i t s and shoot throughs i s p r o v i d e d by  inductor L I .  and,  I t l i m i t s the r a t e of r i s e of the f a u l t  current  through the secondary c o i l on the i n d u c t o r , sends a f a u l t  s i g n a l t o the i n v e r t e r c o n t r o l l e r .  This f a u l t  TRAP i n t e r r u p t i n p u t of the microcomputer. i n t e r r u p t occurs,  s i g n a l goes t o the  When the TRAP  the f i r s t a c t i o n taken by the microcomputer i s  to s w i t c h o f f a l l t h e i n v e r t e r s w i t c h i n g d e v i c e s . the c o n t r o l l e r e n t e r s the FAULT s t a t e u n t i l reset.  the c o n t r o l l e r i s  The time from the i n i t i a t i o n of a f a u l t  inverter switching microseconds.  s i g n a l s i s very  After that,  to the removal of  s h o r t - about 15 to 20  The d e s i g n of the c u r r e n t l i m i t i n g i n d u c t o r ( L I )  i s c o o r d i n a t e d w i t h the o v e r c u r r e n t  c h a r a c t e r i s t i c s of the  i n v e r t e r t r a n s i s t o r s , and the time r e q u i r e d to s w i t c h them o f f , to ensure t h a t f a u l t  c u r r e n t s do not r i s e to damaging  148  levels  b e f o r e the t r a n s i s t o r s a r e a b l e to t u r n o f f .  The  TRAP i n t e r r u p t  Stop pushbutton.  input  also receives  a s i g n a l from an Emergency  This pushbutton can be used by the o p e r a t o r i n  s i t u a t i o n s where the d r i v e must be shut down immediately. normal i n v e r t e r o n / o f f s w i t c h causes a c o n t r o l l e d which the i n v e r t e r c o n t r o l l e r f i r s t standstill.  The  provide p r o t e c t i o n  against  i n v e r t e r overloads.  lines  The c u r r e n t  and summed to produce a s i n g l e  s i g n a l which i s sent to one of the A/D channels on t h e  inverter controller. current  can take too l o n g .  sensors on the i n v e r t e r output  sensor s i g n a l s a r e r e c t i f i e d current  shut down i n  d e c e l e r a t e s the machine t o a  In some emergencies that  H a l l E f f e c t current  The  The i n v e r t e r c o n t r o l l e r compares t h i s  feedback s i g n a l to a p r e s e t  limit.  d e t e c t e d , the c o n t r o l l e r takes c o r r e c t i v e  The  nature of the p r o t e c t i v e  the  o v e r c u r r e n t and the c u r r e n t  I f an o v e r c u r r e n t i s action.  a c t i o n depends on the magnitude o f s t a t e of the c o n t r o l l e r .  For  example, i f the o v e r c u r r e n t i s r e l a t i v e l y s m a l l and the c o n t r o l l e r i s i n the ACCELERATING s t a t e , the c o n t r o l l e r w i l l s i m p l y decrease the r a t e of change of i n v e r t e r f r e q u e n c y .  On the  o t h e r hand, i f the o v e r c u r r e n t i s l a r g e , the c o n t r o l l e r w i l l down the i n v e r t e r .  149  shut  6.4  LIM D r i v e C o n t r o l  Panel F u n c t i o n s  The LIM d r i v e i n v e r t e r i s designed f o r use i n r e s e a r c h and development. adjustments  As a r e s u l t i t has p r o v i s i o n f o r many more than the s u b m e r s i b l e t h r u s t e r  i n d u s t r i a l v a r i a b l e speed d r i v e .  d r i v e or a standard  The c o n t r o l p a n e l i s equipped  w i t h a t e n t u r n p o t e n t i o m e t e r t o s e t the i n v e r t e r frequency, a s w i t c h to s e t the phase sequence,  and a s w i t c h t o t u r n the  i n v e r t e r on or o f f .  p r o v i s i o n i s made to s e t the  In a d d i t i o n ,  maximum i n v e r t e r frequency, the v o l t s / H z r a t i o , and d e c e l e r a t i o n adjustments  r a t e s , and the c u r r e n t  limit  the a c c e l e r a t i o n  setpoint.  These  a r e made by p o t e n t i o m e t e r s which a r e connected  to t h e  A/D channels of the i n v e r t e r c o n t r o l l e r .  The maximum i n v e r t e r frequency can be s e t between 90 and 600 Hz. The p o t e n t i o m e t e r t h a t  s e t s the i n v e r t e r frequency has a range  from the minimum frequency (3 Hz) t o the maximum f r e q u e n c y . The f r e q u e n c y r e s o l u t i o n i s m a i n t a i n e d a t 0.5 Hz. i n t e r n a l l y b u t , because  of the 8 b i t r e s o l u t i o n of the A/D c o n v e r t e r s which read  the p o t e n t i o m e t e r s , the frequency can o n l y be s e t w i t h a r e s o l u t i o n of 2 or 3 Hz when the maximum frequency l i m i t  i s 600  Hz.  i n which  This  does n o t p r e s e n t a problem  t h i s i n v e r t e r i s used.  i n the a p p l i c a t i o n s  The v o l t s / H z r a t i o can be a d j u s t e d so  that the i n v e r t e r PWM waveform reaches range from 50 Hz t o 500 Hz. r a t e s , which a r e r e a l l y r a t e s  100% modulation over a  The a c c e l e r a t i o n and d e c e l e r a t i o n of change of i n v e r t e r  can be a d j u s t e d from 10 Hz/second t o 200 Hz/second.  150  frequency,  In order to d i s p l a y the v a r i o u s i n v e r t e r frequency and installed  setpoints  l i n e current,  i n the c o n t r o l p a n e l .  The  and  the  an alphanumeric d i s p l a y i s display  commercially a v a i l a b l e k e y p a d / d i s p l a y c a r d  is actually a  i n t e n d e d f o r STD  i s i n t e r f a c e d to the  bus  computer systems.  The  a d d r e s s , d a t a , and  c o n t r o l l i n e s which are brought to connectors  on the  card  d a t a such as  inverter c o n t r o l l e r card.  i s used to s e l e c t the  The  keypad on the d i s p l a y  data to be d i s p l a y e d .  d i s p l a y i s a l s o used to d i s p l a y d i a g n o s t i c inverter fault  6.5  The  of the LIM  version  as  messages when an  designed and  d r i v e i n v e r t e r has  f o r the p a s t f o u r months.  performed s a t i s f a c t o r i l y .  f a u l t s i n the  alphanumeric  Drive  of the LIM  Cetec's l a b o r a t o r y has  The  card  occurs.  Evaluation  25 KVA  microcomputer  A l l the p r o t e c t i v e  have a c t u a l l y p r o t e c t e d  l i n e a r i n d u c t i o n motor.  adjustments and  the  speed c o n t r o l has  To  the The  been i n s t a l l e d on any  at  unit  functions  work  against  c o n t r o l panel  been t e s t e d y e t because no of the  date the  inverter  d i s p l a y a l s o work p r o p e r l y .  not  been i n use  linear induction  The  closed-loop  speed sensor  has  motors.  I t i s i n t e r e s t i n g to compare t h i s d e s i g n to a modern commercial design.  The  i n v e r t e r that  Mitsubishi Freqrol-E  [80,81] i s a modern t r a n s i s t o r  i s s i m i l a r i n many r e s p e c t s  i n v e r t e r . In f a c t , the  25 KVA  LIM  same t r a n s i s t o r s are used i n the  two  151  to the  i n v e r t e r s . The market due  Mitsubishi  to i t s compactness and  It i s r e p r e s e n t a t i v e AC  i n v e r t e r has  of the  Mitsubishi  60 Hz  that  i n v e r t e r but  The  selected  Mitsubishi  i s considerably  inverter.  Mitsubishi  The  the  i n v e r t e r can  be  range of r a t i o s t h a t  be v a r i e d  than the  deceleration  industrial practice. display capabilities  proportional addition,  r a t e s of  The  the  The  LIM  i n v e r t e r has  a  of change were not easily  be  of change.  incorporated  the  the  over a wide range from about  are v e r y s i m i l a r to those of the LIM since  can  range p o s s i b l e w i t h  i n v e r t e r c o n t r o l l e r could  programmed to produce lower r a t e s  entirely accidental  l e s s than  The  smaller  functions  1 Hz  16  the v e r y slow r a t e s  However, the  protective  and  i n v e r t e r a l l o w s s e l e c t i o n of  Hz/second to l e s s than 1 Hz/second.  required.  Hz  frequency r e s o l u t i o n i s  a c c e l e r a t i o n and  narrower range s i n c e  the  of 0.5  frequency range i s c o n s i d e r a b l y  different volts/Hz r a t i o s .  on  ratio.  s t a t e of the a r t i n g e n e r a l purpose  Hz w i t h r e s o l u t i o n s  This  of the LIM  comparable.  The  good p r i c e / p e r f o r m a n c e  the  i n v e r t e r operates over a frequency range of 6 to  or 6 to 120  respectively.  120  in  drives.  The  LIM  been s u c c e s s f u l  i n the M i t s u b i s h i inverter.  d e s i g n of the LIM Mitsubishi  of the LIM  which can  152  not  i n v e r t e r i s based  An  have  analog output  d r i v e a meter. In  some i n d i c a t o r lamps are used to i n d i c a t e  conditions.  is  i n v e r t e r does not  inverter.  to frequency i s s u p p l i e d  This  inverter  fault  From the p r e c e d i n g d i s c u s s i o n is  i t i s c l e a r that  c o m p e t i t i v e i n performance and  drives.  When the  the LIM  d r i v e are  compared, some of the  based on a custom LSI  The  Mitsubishi  IC but  t h r e e times l a r g e r than the  the  c i r c u i t s , many of the by a n a l o g i n t e g r a t e d This  c o n t r o l l e r board f o r the LIM  c i r c u i t s and  can  functions  be  D e s p i t e the use are  c a r r i e d out  In c o n t r a s t  still  about  drive LSI  carried  out  integrated  Mitsubishi  inverter.  New  control  the  c o n t r o l l e r i n the  e a s i l y s i n c e most  no  provision  systems which operate under computer c o n t r o l .  systems and  of a s u p e r v i s o r y  i n v e r t e r can  can  Finally,  f o r i n t e r f a c i n g to a  As a r e s u l t i t i s hard to i n t e g r a t e  c o n t r o l l e r i n the LIM  LIM  control  by microcomputer s o f t w a r e .  i n v e r t e r has  d i g i t a l system.  i t into  In c o n t r a s t ,  be r e a d i l y i n t e r f a c e d  be programmed to work under the  the  to control  computer.  As mentioned, a 160  This  of  small scale d i g i t a l  r e l i a n c e on hardware makes the  reprogrammed r a t h e r  are  being b u i l t .  LIM  c l o s e d - l o o p speed c o n t r o l can't be added w i t h o u t  the M i t s u b i s h i  digital  and  inverter controller is  c o n t r o l l e r functions  r e d e s i g n i n g the hardware. drive  drive  advantages of the  i n v e r t e r f a r l e s s f l e x i b l e than the LIM modes such as  w i t h commercial  c o n t r o l l e r board i s s t i l l  c o n t a i n s many more components.  circuits.  inverter  i n v e r t e r c o n t r o l l e r s of the M i t s u b i s h i  d r i v e become apparent.  and  features  the LIM  KVA  version  I t uses the  i n v e r t e r w i l l be  of the  LIM  inverter i s  same c o n t r o l l e r as  used i n f i e l d  the  25 KVA  currently inverter.  t e s t s of Cetec's equipment.  153  Assuming s u c c e s s f u l version  c o m p l e t i o n of f i e l d t e s t s , a s i m p l i f i e d  of t h i s i n v e r t e r , without a l l the adjustment  capabilities, will  be used i n p r o d u c t i o n v e r s i o n s  of Cetec's  equipment.  6.6 C o n c l u s i o n  The  two a p p l i c a t i o n s  discussed  wide range of AC d r i v e s c o n t r o l l e r described  that  i n t h i s chapter i l l u s t r a t e the  can be designed u s i n g  i n this thesis.  the i n v e r t e r  The two a p p l i c a t i o n s  power range from 1.5 KW to 160 KW and i n v o l v e  span a  the use of both  power MOSFETs and t r a n s i s t o r s as the i n v e r t e r power s w i t c h e s . Control the  p a n e l and p r o t e c t i o n  submersible t h r u s t e r  functions  t o q u i t e complex i n the LIM d r i v e .  However these two a p p l i c a t i o n s the  range from v e r y simple i n  do not come c l o s e t o e x h a u s t i n g  c a p a b i l i t i e s of the i n v e r t e r c o n t r o l l e r .  Drives using  c o n t r o l s t r a t e g i e s such as c o n t r o l l e d s l i p and other d e v i c e s such as t h y r i s t o r s can be designed u s i n g controller.  154  other  switching  this inverter  Chapter 7 Conclusion  An  i n v e r t e r c o n t r o l l e r has  been d e s c r i b e d  which has  the  following  features:  i.  The  controller controls  PWM  inverters using t r a n s i s t o r s ,  power MOSFETs, or t h y r i s t o r s as  ii.  I t operates over an 2 Hz  iii.  to 600  Most of  switches.  i n v e r t e r frequency range of a t  least  Hz.  the c o n t r o l f u n c t i o n s ,  g e n e r a t i o n of the  PWM  w i t h the e x c e p t i o n of  waveform, are  microcomputer s o f t w a r e w r i t t e n  performed  the  by  i n the C programming  language.  i v . The are  p u l s e width modulated i n v e r t e r s w i t c h i n g waveforms generated by a l a r g e  which i s c o n t r o l l e d by  scale integrated  circuit  the microcomputer i n the  inverter  controller.  v. The by  i n v e r t e r c o n t r o l l e r i s c o n t a i n e d on a s i n g l e 7.5 21.5  of p a r t s  cm  (161  and  cm  ) printed  d i r e c t labor  circuit  f o r the  $200.  155  board.  The  cost  c o n t r o l l e r i s under  cm  The  i n v e r t e r c o n t r o l l e r meets o r exceeds the d e s i g n o b j e c t i v e s  set  out f o r i t i n Chapter  successfully  i n two  1 and  Chapter  3.  I t has  a p p l i c a t i o n s ; a submersible  and a l i n e a r i n d u c t i o n motor d r i v e .  been used  thruster drive  Overall, this  inverter  c o n t r o l l e r d e s i g n must be c o n s i d e r e d a s u c c e s s .  The  approach taken to the d e s i g n of t h i s i n v e r t e r c o n t r o l l e r i s  different PWM  than the approach taken i n much of the l i t e r a t u r e  i n v e r t e r c o n t r o l l e r s p u b l i s h e d i n the l a s t  y e a r s . Many of these papers and Boys  [81], Rajashekara  Varnovitsky  [84], and Buja and F i o r i n i  d e s i g n of the PWM  by Green  [82], Pollman  [83],  [85]) c o n c e n t r a t e on  the  waveform g e n e r a t o r , s t u d i o u s l y i g n o r i n g the  a v a i l a b i l i t y of a p e r f e c t l y s a t i s f a c t o r y PWM form.  three or four  (see, f o r example, papers and V i t h a y a t h i l  on  As a r e s u l t , the PWM  g e n e r a t o r i n LSI  generator dominates the d e s i g n  i n terms of component count and  design e f f o r t .  The  both  other  f u n c t i o n s r e q u i r e d i n an i n v e r t e r c o n t r o l l e r o f t e n seem to be added as an a f t e r t h o u g h t , i f they are i n c l u d e d a t a l l .  In  c o n t r a s t , a more balanced and  "top down" approach was  the d e s i g n d e s c r i b e d i n t h i s t h e s i s .  Design  taken i n  started with a  c a r e f u l d e f i n i t i o n of a l l the o b j e c t i v e s t h a t the d e s i g n had to  meet and  then proceeded  w i t h an e v a l u a t i o n of the methods  a v a i l a b l e to meet these o b j e c t i v e s . emphasis on f l e x i b i l i t y ,  The  compactness, and  sheer performance or on n o v e l t y .  156  evaluation placed economy r a t h e r than  on  Another aspect of the d e s i g n which d i s t i n g u i s h e s i t from many of the designs i n the l i t e r a t u r e i s the way t h a t the i n v e r t e r c o n t r o l l e r can be r a p i d l y adapted  to new a p p l i c a t i o n s .  This  c a p a b i l i t y was a c h i e v e d by a s e r i e s of c o n s c i o u s d e s i g n d e c i s i o n s throughout  the d e s i g n p r o c e s s .  During the i n i t i a l  system  design,  the d e s i g n was p a r t i t i o n e d so t h a t most c o n t r o l l e r f u n c t i o n s a r e c a r r i e d out by microcomputer software w i t h the c o n t r o l l e r hardware p e r f r o m i n g support f u n c t i o n s .  The microcomputer i n the  c o n t r o l l e r was chosen w i t h an eye t o the a v a i l a b i l i t y low c o s t software development t o o l s .  of good,  F i n a l l y , the d e c i s i o n was  made to w r i t e the software i n the C programming language to speed  The  i n order  the program development p r o c e s s .  flexibility  of t h i s i n v e r t e r c o n t r o l l e r i s not a c h i e v e d  e n t i r e l y without c o s t .  The software i n t e n s i v e n a t u r e of the  c o n t r o l l e r , the use of a microcomputer t h a t has been a v a i l a b l e l o n g enough t o have good software development t o o l s , and the use of a h i g h l e v e l programming language,  combine to make the  c o n t r o l l e r slower than i t o t h e r w i s e might be. primarily affect  the c o n t r o l l e r ' s performance  involving closed-loop c o n t r o l .  This w i l l i n applications  However the dynamics of many AC  d r i v e s a r e dominated by a h i g h i n e r t i a l o a d .  In these cases a  f a s t c o n t r o l loop i s not r e q u i r e d so the i n v e r t e r c o n t r o l l e r can be used as a c l o s e d - l o o p c o n t r o l l e r .  On the hardware s i d e , t h i s i n v e r t e r c o n t r o l l e r i s d i s t i n g u i s h e d by i t s compactness, a c h i e v e d through the use of l a r g e  157  scale  integrated  circuits.  As noted i n the p r e v i o u s c h a p t e r , t h i s  c o n t r o l l e r i s a p p r o x i m a t e l y one  t h i r d the  s i z e of the  f o r a modern commercial t r a n s i s t o r i n v e r t e r , yet better circuit  performance.  However, the  controller  i s capable of  r a p i d development i n  t e c h n o l o g y s i n c e the hardware d e s i g n was  integrated  completed  now  a l l o w s f o r some s u b s t a n t i a l improvements i n the hardware d e s i g n . As  discussed  i n Chapter 4,  the  frequency s y n t h e s i z e r  generates c o n t r o l s i g n a l s f o r the be  s u b s t a n t i a l l y s i m p l i f i e d by u s i n g  of the  4046 phase l o c k e d  EPROM can or  be  replaced  l o o p IC.  waveform generator IC a new  s i l i c o n gate  In a d d i t i o n ,  by a h i g h e r d e n s i t y  the  m i c r o p r o c e s s o r w i t h an better  version  4K byte 2732  EPROM such as  to r e p l a c e  the  the  2764  I n t e l 80188 m i c r o p r o c e s s o r .  c o m p u t a t i o n a l c a p a b i l i t i e s than the  multiply  and  I n t e l 8085  algorithms.  the  80188 has  o p t i c a l s h a f t encoders.  inverter controller i s written  should be  Another p o s s i b l e  control  c o n t r o l l e r to  Since the  software f o r  p r i m a r i l y i n the C programming  t r a n s f e r of software to the new  fairly  These  b u i l t i n counter/timers  t h a t would be v e r y u s e f u l when i n t e r f a c i n g the  language, the  80188 has  divide operations i n i t s i n s t r u c t i o n set.  In a d d i t i o n ,  sensors such as  The  8085, i n p a r t i c u l a r i t  o p e r a t i o n s are p a r t i c u l a r l y u s e f u l i n c l o s e d - l o o p  the  can  27128.  A more d r a s t i c change would be  has  PWM  that  microprocessor  straightforward.  improvement i s to r e d e s i g n  controller printed  the  inverter  c i r c u i t board to conform to the  158  configuration  for  a microcomputer system bus  a l l o w the  c o n t r o l l e r to be  cards and  various  I/O  such as  cards.  c o n t r o l l e r card  designed w i t h the  possible since  then be  transferred  For example, an AC c o n t r o l l e r card  system p r o t e c t i o n  described  The  some of from  the  the  servo d r i v e c o u l d  c a r r y i n g out functions the  the PWM  be  waveform  under c o n t r o l of a  closed-loop  s c a l a r decoupled c o n t r o l a l g o r i t h m  control recently  by Bose [86] would be s u i t a b l e f o r a c o n t r o l l e r w i t h  t h i s type of  architecture.  There i s a l s o c o n s i d e r a b l e c o n t r o l l e r operating  p o t e n t i a l f o r f u r t h e r work w i t h  i n i t s s t a n d - a l o n e form.  c o n t r o l l e r i s e a s i l y reprogrammed, i t can of AC  T h i s would  Some i n t e r e s t i n g i n v e r t e r  microcomputer which would c a r r y out functions.  bus.  to another microcomputer, thereby improving  system throughput.  g e n e r a t i o n and  could  STD  r e a d i l y i n t e r f a c e d to microcomputer  c o n t r o l l e r designs would then be c o n t r o l l e r functions  the  drive applications.  scheme c o u l d  be  For  the  be used i n a v a r i e t y  example, a c o n t r o l l e d s l i p  implemented f o r t r a c t i o n a p p l i c a t i o n s  e l e c t r i c automobile or t r o l l e y bus reliability  Since  drives.  the  The  control  such  as  maintenance  and  advantages of a s i n g l e board i n v e r t e r c o n t r o l l e r  would be as a t t r a c t i v e i n these t r a c t i o n a p p l i c a t i o n s submersible t h r u s t e r d r i v e  application.  159  as  in  the  References  1. B.K.  Bose, " A d j u s t a b l e Speed AC D r i v e s - A Technology S t a t u s Review", IEEE Proceedings, v o l . 70, No. 2, pp. 116-135, February 1982  2. F. Peabody and K. Mauch, "A.C. V a r i a b l e Speed D r i v e s For S p e c i a l t y A p p l i c a t i o n s " , F i n a l Report on B.C. Science C o u n c i l P r o j e c t #56 (RC-2), September 1981 3. F. Peabody, "A.C. F i n a l Report 1982  V a r i a b l e Speed D r i v e s For S p e c i a l t y A p p l i c a t i o n s " , on B.C. S c i n c e C o u n c i l P r o j e c t #37 (RC-5), September  4. K.P.  P h i l l i p s , " C u r r e n t Source C o n v e r t e r f o r AC Motor D r i v e s " , IEEE T r a n s a c t i o n s on I n d u s t r y A p p l i c a t i o n s , v o l . IA-8, no. 6, pp. 679-683, Nov./Dec. 1972  5. M.G.  Say, A l t e r n a t i n g Current Machines, New 1976, p. 254  6. V.R.  S t e f a n o v i c " S t a t i c and Dynamic C h a r a c t e r i s t i c s of I n d u c t i o n Motors O p e r a t i n g Under Constant A i r g a p F l u x C o n t r o l " , i n Conference Record of IEEE 1976 I n d u s t r y A p p l i c a t i o n s S o c i e t y Annual Meeting, pp. 436-444  York: John Wiley & Sons,  7. F. B l a s c h k e , "The P r i n c i p l e of F i e l d O r i e n t a t i o n as A p p l i e d to the New TRANSVEKTOR Closed-Loop C o n t r o l System f o r R o t a t i n g - F i e l d Machines", Siemens Review, v o l . 34, pp. 217-220, May 1972 8. A. P l u n k e t t , " D i r e c t F l u x and Torque R e g u l a t i o n i n a PWM I n v e r t e r I n d u c t i o n Motor D r i v e " , IEEE Trans. Ind. A p p l . , v o l . IA-13, no. 2, pp. 139-146, M a r c h / A p r i l 1977 9. A. Abbondanti, "Method of F l u x C o n t r o l i n I n d u c t i o n Motors D r i v e n By V a r i a b l e Frequency, V a r i a b l e V o l t a g e S u p p l i e s " , i n Conference Record of IEEE/IAS 1977 I n t e r n a t i o n a l Semiconductor Power C o n v e r s i o n Conference, pp. 177-184 10. B. M o k r y t z k i , "The C o n t r o l l e d S l i p S t a t i c I n v e r t e r D r i v e " , IEEE Trans. Ind. Gen. A p p l . , v o l . IGA-4, no. 3, pp. 312-317, May/June 1968 11. P.D.  Agarwal, "The GM High-Performance I n d u c t i o n Motor D r i v e System", IEEE T r a n s . Power Apparatus and Systems, v o l . PAS-88, no. 2, pp. 86-93, Feb. 1969  12. A.K.  W a l l a c e , J.H. P a r k e r , and G.E. Dawson, " S l i p C o n t r o l f o r LIM P r o p e l l e d T r a n s i t V e h i c l e s " , IEEE T r a n s a c t i o n s on Magnetics, v o l . MAG-16, no. 5, pp. 710-712, September 1980  13. S.B.  Dewan and S.A. Mirbod, " S l i p Speed C o n t r o l i n an I n d u c t i o n Motor D r i v e w i t h a Phase Locked Loop", i n Conference Record of IEEE 1979 I n d u s t r y A p p l i c a t i o n s S o c i e t y Annual Meeting,  160  pp.  952-955  14. A. Abbondanti and M.B. Brennan, " V a r i a b l e Speed I n d u c t i o n Motor D r i v e s Use E l e c t r o n i c S l i p C a l c u l a t o r Based on Motor V o l t a g e s and C u r r e n t s " , IEEE Trans. I n d . A p p l . , v o l . IA-11, no. 5, pp. 483-488, Sept./Oct. 1975 15. R.G Schieman, E.A. Wilkes, and H.E. Jordan, " S o l i d - S t a t e C o n t r o l of E l e c t r i c D r i v e s " , IEEE P r o c e e d i n g s , v o l . 62, no. 12, pp. 16431660, Dec. 1974 16.  S.A. Rosenberg, S.B. Dewan, and G.R. Slemon, " I n v e r t e r Fed I n d u c t i o n Motor D r i v e Using Power F a c t o r C o n t r o l " , i n Conference Record of IEEE 1976 I n d u s t r y A p p l i c a t i o n s S o c i e t y Annual Meeting, pp. 810-813  17. A.E. F i t z g e r a l d , C. K i n g s l e y , and A. Kusko, E l e c t r i c Machinery 3rd ed., New York: McGraw-Hill, 1971, p. 350 18. R.B. M a a g , " C h a r a c t e r i s t i c s and A p p l i c a t i o n of Current Source S l i p Regulated AC I n d u c t i o n Motor D r i v e s " i n Conference Record of IEEE 1971 I n d u s t r y and General A p p l i c a t i o n s S o c i e t y Annual Meeting, pp. 411-413 19. E.P. C o r n e l l and T.A. L i p o , " M o d e l l i n g and Design of C o n t r o l l e d Current I n d u c t i o n Motor D r i v e Systems," IEEE T r a n s . Ind. A p p l . , v o l . IA-13, no. 4, pp. 321-330, J u l y / A u g . 1977 20. B. Adkins, The G e n e r a l i z e d Theory of E l e c t r i c a l London: Chapman & H a l l , 1957  Machines,  21. P.C. Krause and C H . Thomas, " S i m u l a t i o n of Symmetrical I n d u c t i o n Machinery", IEEE Trans. Power App. S y s t . , v o l . PAS-84, no. 11, pp. 1038-1053, Nov. 1965 22.  T.A. L i p o and A.B. P l u n k e t t , "A Novel Approach t o I n d u c t i o n Motor T r a n s f e r F u n c t i o n s " , i n Conference Record of IEEE 1973 I n d u s t r y A p p l i c a t i o n s S o c i e t y Annual Meeting, pp. 451-457  23. M.L. MacDonald and P.C. Sen, " C o n t r o l Loop Study of I n d u c t i o n Motor D r i v e s Using DQ Model", i n Conference Record of IEEE 1978 I n d u s t r y A p p l i c a t i o n s S o c i e t y Annual M e e t i n g , pp. 897-903 24. R. S t e r n and D.W. Novotny, "A S i m p l i f i e d Approach t o the D e t e r m i n a t i o n of I n d u c t i o n Machine Dynamic Response", IEEE T r a n s . Power App. S y s t . , v o l . PAS-97, no.4, pp. 1430-1439, May 1978 25. F. F a l l s i d e and A.T. Wortley, "Steady S t a t e O s c i l l a t i o n and S t a b i l i s a t i o n of V a r i a b l e Frequency I n v e r t e r - F e d I n d u c t i o n Motor D r i v e s " , Proceedings of the IEE, v o l . 116, no. 6, pp. 991-999, J u l y 1969 26. T.A. L i p o and P.C. Krause, " S t a b i l i t y A n a l y s i s of a R e c t i f i e r - I n v e r t e r I n d u c t i o n Motor D r i v e " , IEEE T r a n s . Power App. S y s t . , v o l . PAS-88, no. 1, pp. 55-66, January 1969 27. A. Kawamura and R. H o f t , "An A n a l y s i s of I n d u c t i o n Motor F i e l d  161  Oriented  or V e c t o r C o n t r o l " , i n Conference Record o f IEEE 1983 Power E l e c t r o n i c s S p e c i a l i s t s Conference, pp. 91-101 28. E.A. K l i n g s h i r n and H.E. Jordan, "Polyphase I n d u c t i o n Motor Performance and Losses on N o n s i n u s o i d a l V o l t a g e Sources", IEEE T r a n s . Power App. S y s t . , v o l . PAS-87, no. 3, pp. 624-631, March 1968 29. S.D.T. Robertson and K.M. Hebbar, "Torque P u l s a t i o n s i n I n d u c t i o n Motors w i t h I n v e r t e r D r i v e s " , IEEE Trans Ind. and Gen. A p p l . , v o l . IGA-7, no. 2, pp. 318-323, M a r c h / A p r i l 1971 30. J.M.D. Murphy, T h y r i s t o r C o n t r o l o f AC Motors", O x f o r d : Pergamon P r e s s , 1973, p. 100 31. B.J. Chalmers and B.R. Sarkar, " I n d u c t i o n Motor Losses Due t o N o n s i n u s o i d a l Supply Waveforms", Proceedings o f the IEE, v o l . pp. 1777 - 1782, December 1968  115,  32. V.B. Honsinger, " I n d u c t i o n Motors O p e r a t i n g from I n v e r t e r s " , i n Conference Record IEEE 1980 IAS Annual Meeting, pp. 1276-1285  33. P.L. A l g e r , I n d u c t i o n Machines 1970, pp. 265-272  2nd ed., New York: Gordon and Breach,  34. G.B. Kliman, "Harmonic E f f e c t s i n P u l s e Width Modulated I n v e r t e r I n d u c t i o n Motor D r i v e s " , i n Conference Record IEEE 1972 IAS Annual M e e t i n g , pp. 783-790 35. A. Schonung and H. Stemmler, " S t a t i c Frequency Changers With "Subharmonic" C o n t r o l i n C o n j u n c t i o n With R e v e r s i b l e V a r i a b l e Speed D r i v e s " , The Brown B o v e r i Review, pp. 555-577, Aug./Sept. 1964 36. J.W.A. W i l s o n and J.A. Yeamans, " I n t r i n s i c Harmonics of I d e a l i z e d I n v e r t e r PWM Systems", i n Conference Record IEEE 1976 IAS Annual Meeting, pp. 967-973 37. J . Zubek, A. Abbondanti, and C.J. Nordby, " P u l s e Width Modulated I n v e r t e r Motor D r i v e s With Improved M o d u l a t i o n " , IEEE T r a n s . Ind. A p p l . , v o l IA-11, no. 6, pp. 695-703, Nov./Dec. 1975 38. J.W.A. W i l s o n , " A d a p t a t i o n of P u l s e Width M o d u l a t i o n Theory For Use i n AC Motor D r i v e I n v e r t e r s " , i n Conference Record of IEEE 1977 IAS I n t e r n a t i o n a l Semiconductor Power C o n v e r t e r Conference, pp. 193-197 39. G.B. Kliman and A.B. P l u n k e t t , "Development of a M o d u l a t i o n S t r a t e g y For a PWM I n v e r t e r D r i v e " , IEEE T r a n s . Ind. A p p l . , v o l . IA-15, no. 1, pp. 72-79, Jan./Feb 1979 40. D.A. Grant, "A Technique f o r P u l s e Dropping i n P u l s e - W i d t h Modulated I n v e r t e r s " , P r o c . IEE, B, E l e c t r . Power A p p l . , v o l . 128, pp. 67-72, 1981 41. H.S. P a t e l and R.G. H o f t , " G e n e r a l i z e d Techniques o f Harmonic  162  E l i m i n a t i o n and Voltage C o n t r o l i n T h y r i s t o r I n v e r t e r s : Part I - Harmonic E l i m i n a t i o n " , IEEE T r a n s . Ind. A p p l . , v o l . IA-9, no. 3, pp. 310-317, May/June 1973 42. H.S.  P a t e l and R.G. H o f t , " G e n e r a l i z e d Techniques of Harmonic E l i m i n a t i o n and Voltage C o n t r o l i n T h y r i s t o r I n v e r t e r s : P a r t I I - V o l t a g e C o n t r o l Techniques", IEEE T r a n s . Ind. A p p l . , v o l IA-10, no. 5, pp. 666-673, Sept./Oct. 1974  43. G.S.  Buja and G.B. I n d r i , "Optimal P u l s e w i d t h M o d u l a t i o n f o r Feeding AC Motors", IEEE Trans. Ind. A p p l . , v o l . IA-13, no. 1, pp. 38-44, Jan./Feb 1977  44. A. Pollman, "A D i g i t a l Pulsewidth Modulator Employing Advanced M o d u l a t i o n Techniques", IEEE T r a n s . Ind. A p p l . , v o l IA-19, no. 3, pp. 409-414, May/June 1983 45. J.M.D. Murphy and M.G. Egan, "A Comparison of PWM S t r a t e g i e s f o r I n v e r t e r Fed I n d u c t i o n Motors", IEEE T r a n s . Ind. A p p l . , v o l . IA-19, no. 3, pp. 363-369, May/June 1983 46. R. G a b r i e l , W. Leonhard, and C. Nordby, " F i e l d - O r i e n t e d C o n t r o l of a Standard AC Motor Using M i c r o p r o c e s s o r s " , IEEE T r a n s . Ind. A p p l . , v o l . IA-16, no. 2, pp. 186-192, M a r c h / A p r i l 1980 47. R. G a b r i e l and W. Leonhard, " M i c r o p r o c e s s o r C o n t r o l of I n d u c t i o n Motor", i n Conference Record 1982 I n t e r n a t i o n a l Semiconductor Power C o n v e r t e r Conference, pp. 385-396 48. P. van der Gracht and K. Mauch, "A M i c r o p r o c e s s o r C o n t r o l l e d Three-Phase Power I n v e r t e r " , Computer Design, pp. 120-122 March 1977 49. A. Kusko and D. G a l l e r , "Survey of M i c r o p r o c e s s o r s i n I n d u s t r i a l Motor D r i v e Systems", i n Conference Record IEEE I n d u s t r y A p p l i c a t i o n s S o c i e t y 1982 Annual Meeting, pp. 435-438 50. R. S t e r n and D.W. Novotny, "A S i m p l i f i e d Approach to the D e t e r m i n a t i o n of I n d u c t i o n Machine Dynamic Response", IEEE Trans. Power App. S y s t . , v o l . PAS-97, no.4, pp. 1430-1439, May 1978 51. G.F.  F r a n k l i n and J.D. P o w e l l , D i g i t a l C o n t r o l of Dynamic Systems, Reading MA: Addison-Wesley,' 1980, pp. 285-287  52. P. K a t z , D i g i t a l C o n t r o l Using M i c r o p r o c e s s o r s , Englewood C l i f f s P r e n t i c e - H a l l , 1981, p. 236  NJ:  53. J . C a s t e e l and R. H o f t , "Optimum PWM Waveforms of a M i c r o p r o c e s s o r C o n t r o l l e d I n v e r t e r " , i n Proceedings 1978. IEEE Power E l e c t r o n i c s S p e c i a l i s t s Conference, pp. 243-250 54. S.R.  55. M.  Bowes and M.J. Mount, " M i c r o p r o c e s s o r C o n t r o l of PWM I n v e r t e r s " , IEE P r o c e e d i n g s , v o l . 128, p a r t B, no. 6, pp. 293-305, November 1981  V a r n o v i t s k y , "A Microcomputer-Based C o n t r o l S i g n a l Generator  163  for a  Three-Phase S w i t c h i n g Power I n v e r t e r " , IEEE T r a n s . I n d u s t r y A p p l i c a t i o n s , v o l . IA-19, no. 2, pp. 228-234, M a r c h / A p r i l 1983 56. B.K. Bose and H. S u t h e r l a n d , "A High-Performance P u l s e w i d t h Modulator f o r an I n v e r t e r - F e d D r i v e System U s i n g a Microcomputer", IEEE T r a n s . I n d u s t r y A p p l i c a t i o n s , v o l . IA-19, no. 2, pp. 235-243, M a r c h / A p r i l 1983 57. K. Mauch and M.R. I t o , "A M u l t i m i c r o p r o c e s s o r AC D r i v e C o n t r o l l e r " , i n Conference Record IEEE I n d u s t r y A p p l i c a t i o n s S o c i e t y 1980 Annual Meeting, pp. 634-640 58. W.J. Tuten, " M i c r o p r o c e s s o r C o n t r o l l e r f o r I n t e g r a t e d Power Module I n v e r t e r " , i n Conference Record of the 1977 IEEE/IAS I n t e r n a t i o n a l Semiconductor Power C o n v e r t e r Conference, pp. 471-476 59. E . Dwyer and B.T. O o i , "A Lookup T a b l e Based M i c r o p r o c e s s o r C o n t r o l l e r f o r a Three Phase PWM I n v e r t e r " i n Conference Record of t h e IEEE/ IECI 1979 Conference on I n d u s t r i a l A p p l i c a t i o n s of M i c r o p r o c e s s o r s , pp. 19-22 60. L. Humblet, F. De Buck, B. Verbecke, P. De V a l c k , A Realisation Example of a M i c r o p r o c e s s o r D r i v e n PWM T r a n s i s t o r I n v e r t e r " , i n Conference Record of IEE Power D i v i s i o n 2nd I n t e r n a t i o n a l Conference on E l e c t r i c a l V a r i a b l e Speed D r i v e s , pp. 151-156, 1979 11  61. H.S. P a t e l , " T h y r i s t o r I n v e r t e r Harmonic E l i m i n a t i o n U s i n g O p t i m i z a t i o n Techniques", Ph.D. D i s s e r t a t i o n , U n i v e r s i t y of M i s s o u r i - C o l u m b i a , 1971 62. S i g n e t i c s C o r p o r a t i o n , P h i l l i p s AC Motor C o n t r o l l e r Product I n f o r m a t i o n , A p r i l 1981 63. S.R. Bowes and B.M. B i r d , "Novel Approach t o t h e A n a l y s i s and S y n t h e s i s of M o d u l a t i o n Processes i n Power C o n v e r t o r s " , Proceedings of the IEE, v o l . 122, no. 5, pp. 507-513, May 1975 64. S. Morinaga e t . a l . , " M i c r o p r o c e s s o r C o n t r o l System w i t h I/O P r o c e s s i n g L S I f o r Motor D r i v e PWM I n v e r t e r " , i n Conference Record of IEEE/IAS 1981 Annual Meeting, pp. 1197-1202 65. P h i l i p s LOCMOS HE4000B I.C. F a m i l y , S i g n e t i c s Sunnyvale CA, p. 689, September 1981  Corp.,  66. F.M. Gardner, Phaselock Techniques, 2nd ed., New York: W i l e y , 1979, Chapter 6 67. Am9500 P e r i p h e r a l Products I n t e r f a c e Guide, Advanced M i c r o D e v i c e s , Sunnyvale CA, p. 4-48, 1980 68. COS/MOS I n t e g r a t e d C i r c u i t s , RCA Corp., S o m e r v i l l e NJ, p. 179, 1980  164  69. 1981  Supplement to the TTL Data Book f o r Design E n g i n e e r s , Texas Instruments I n c . , D a l l a s TX, p. 149, 1981  70. "The RCA COS/MOS Phase-Locked-Loop: A V e r s a t i l e B u i l d i n g B l o c k f o r Micro-Power D i g i t a l and Analog A p p l i c a t i o n s " , RCA A p p l i c a t i o n s Note ICAN-6101, RCA Corp., S o m e r v i l l e NJ, 1981 71. B.W.  Kernighan and D.M. R i t c h i e , The C Programming Language, Englewood C l i f f s NJ: P r e n t i c e - H a l l , 1978  72. J . G i l b r e a t h , "A H i g h - L e v e l Language Benchmark", BYTE, v o l . 6, no. 9, pp. 180-198, September 1981 73. J . G i l b r e a t h and G. G i l b r e a t h , " E r a t o s t h e n e s R e v i s i t e d : Once More through the S i e v e " , BYTE, v o l . 8, no. 1, pp. 283-326, January 1983 74. G.E.  Anderson and K.C. Shumate, " S e l e c t i n g a Programming Language, Compiler, and Support Environment: Method and Example", Computer, v o l . 15, no. 8, pp. 29-36, August 1982  75. S.T. A l l w o r t h , I n t r o d u c t i o n t o Real-Time Software D e s i g n , New York: S p r i n g e r V e r l a g , 1981, pp. 100-109 76. J.V. Landau, " S t a t e D e s c r i p t i o n Techniques A p p l i e d to I n d u s t r i a l Machine C o n t r o l " , Computer, v o l . 12, no. 2, pp. 32-40, February 1979 77. J.G Gander and H.U. L i e c h t i , " S t a t e Language f o r Real-Time Process C o n t r o l " , M i c r o p r o c e s s o r s and Microsystems, v o l . 5, no. 1, pp. 27-28, Jan/Feb 1981 78. H.A.  79  S u t h e r l a n d , B.K. Bose and C.B. Somuah, "A S t a t e Language f o r Sequencing i n a H y b r i d E l e c t r i c V e h i c l e " , IEEE Trans. Ind. E l e c t r o n i c s , v o l . IE-30, no. 4, pp. 318-322, November 1983  M i t s u b i s h i VVVF T r a n s i s t o r I n v e r t e r F r e q r o l - E S e r v i c e M i t s u b i s h i E l e c t r i c Corp., Tokyo  Manual,  80. E. Ohno e t . a l . , " G e n e r a l Purpose V a r i a b l e Frequency I n v e r t e r Using I n t e g r a t e d Power Module and L S I " , i n Conference Record IEEE 1982 Power E l e c t r o n i c s S p e c i a l i s t s Conference, pp. 478487 81. R.M.  Green and J.T. Boys, "Implementation of P u l s e w i d t h Modulated I n v e r t e r M o d u l a t i o n S t r a t e g i e s " , IEEE T r a n s . Ind. A p p l i c a t i o n s , v o l . IA-18, no. 2, pp. 138-145, M a r c h / A p r i l 1982  82. K.S.  R a j a s h e k a r a and J . V i t h a y a t h i l , " M i c r o p r o c e s s o r Based S i n u s o i d a l PWM I n v e r t e r by PWM T r a n s f e r " , IEEE T r a n s . Ind. E l e c t r o n i c s , v o l . IE-29, no. 1, pp. 46-51, Feb. 1982  83. A. Pollman, "A D i g i t a l P u l s e w i d t h Modulator Employing  165  Advanced  M o d u l a t i o n Techniques", IEEE T r a n s . Ind. A p p l i c a t i o n s , v o l . IA no. 3, pp. 409-413, May/June 1983 84. M. V a r n o v i t s k y , "A Microcomputer-Based C o n t r o l S i g n a l Generator f o r a Three-Phase S w i t c h i n g Power I n v e r t e r " , IEEE Trans Ind. A p p l i c a t i o n s , v o l . IA-19, no. 2, pp. 228-234 M a r c h / A p r i l 1983 85. G.S. Buja and P. F i o r i n i , "Microcomputer C o n t r o l of PWM I n v e r t e r s " IEEE T r a n s . I n d . E l e c t r o n i c s , v o l . IE-29, no.3, pp. 212-216, August 1982 86. B.K. Bose, " S c a l a r Decoupled C o n t r o l of I n d u c t i o n Motors", IEEE T r a n s . Ind. A p p l i c a t i o n s , v o l . IA-20, no. 1, pp. 216-225, January/February 1984  166  Appendix  Control  Program f o r _1 kW MOSFET I n v e r t e r f o r Submersible T h r u s t e r D r i v e s  /* T h i s program c o n t r o l s the o p e r a t i o n of a PWM i n v e r t e r used t o s u p p l y power to a v a r i a b l e speed i n d u c t i o n motor d r i v e . The a c t u a l p u l s e width modulation i s performed by a s p e c i a l purpose i n t e g r a t e d c i r c u i t manufactured by S i g n e t i c s . The c o n t r o l program performs the o v e r a l l sequencing and c o n t r o l f u n c t i o n s r e q u i r e d by the d r i v e . On power up, the c o n t r o l program e n t e r s an i n i t i a l i z a t i o n r o u t i n e [ i n t i a l i z e ( ) ] which performs v a r i o u s initialization functions. The PWM IC i s c o n t r o l l e d by a s e t of v a r i a b l e frequency p u l s e t r a i n s which determine the i n v e r t e r output frequency (FCT), v o l t s p e r Hertz r a t i o (VCT) and maximum d e v i c e s w i t c h i n g frequency (RCT). These f r e q u e n c i e s a r e s u p p l i e d by a computer c o n t r o l l e d frequency s y n t h e s i z e r c o n s i s t i n g of an AMD 9513 c o u n t e r / t i m e r , 4046 phase l o c k e d loop c h i p s , and 74LS628 VCO chips. The f i r s t p a r t of the i n i t i a l i z a t i o n simply s e t s up the 9513 c o u n t e r / t i m e r IC so t h a t the proper f r e q u e n c i e s can be generated. The timer i n the 8156 RAM-I/0 c h i p i s s e t up t o i n t e r r u p t the 8085 m i c r o p r o c e s s o r every 5 m i l l i s e c o n d s . The PWM c h i p i s a l s o r e s e t i n the i n i t i a l i z a t i o n r o u t i n e and some variables are i n i t i a l i z e d . A f t e r the i n i t i a l i z a t i o n r o u t i n e , the c o n t r o l l e r a c t s as a simple s t a t e machine. The c o n t r o l l e r i s always i n one of the f o l l o w i n g states: 1. OFF The o n / o f f s w i t c h i s o f f and the i n v e r t e r i s off. The speed c o n t r o l has no e f f e c t . 2. STOPPED The o n / o f f s w i t c h i s on and t h e speed c o n t r o l i s i n the zero p o s i t i o n . The i n v e r t e r i s o f f . 3. ACCELERATING The o n / o f f s w i t c h i s on and the speed c o n t r o l i s commanding an i n v e r t e r frequency h i g h e r than the p r e s e n t i n v e r t e r f r e q u e n c y . The i n v e r t e r frequency i s incremented by 0.5 Hz every time t h i s state i s entered. S i n c e the s t a t e machine sequencing i s c o n t r o l l e d by the 5 m i l l i s e c o n d c l o c k i n t e r r u p t t h i s corresponds to an a c c e l e r a t i o n r a t e of 100 Hz/sec. 4. CONSTANT SPEED The o n / o f f s w i t c h i s on and the speed c o n t r o l i s commanding an i n v e r t e r frequency equal to the present i n v e r t e r frequency.  167  5. DECELERATING T h i s s t a t e i s entered when a) The o n / o f f s w i t c h i s turned o f f w h i l e the i n v e r t e r i s o p e r a t i n g b) The o n / o f f s w i t c h i s on and the speed c o n t r o l i s r e q u e s t i n g a motor speed i n the o p p o s i t e d i r e c t i o n t o the present d i r e c t i o n . c) The o n / o f f s w i t c h i s on and the speed c o n t r o l i s commanding an i n v e r t e r frequency lower than the present i n v e r t e r f r e q u e n c y . The i n v e r t e r frequency i s decreased by 0.5 Hz on every e n t r y i n t o t h i s s t a t e . This corresponds to a d e c e l e r a t i o n r a t e of 100 Hz/sec. 6. FAULT T h i s s t a t e i s entered a f t e r the TRAP i n t e r r u p t on the 8085 has r e c e i v e d FAULTNUM of o v e r c u r r e n t s i g n a l s from the i n v e r t e r . To prevent a w i d e l y spaced s e t of o v e r c u r r e n t s i g n a l s ( p o s s i b l y c r e a t e d by n o i s e ) from e v e n t u a l l y c a u s i n g the i n v e r t e r t o e n t e r the f a u l t s t a t e , the counter keeping t r a c k of the number of o v e r c u r r e n t s i g n a l s i s decremented on every 5 m i l l i s e c o n d t i m e r interrupt. As a r e s u l t , the count w i l l only i n c r e a s e i f t h e r e i s a r a p i d s u c c e s s i o n of o v e r c u r r e n t s i g n a l s as wou occur i n a r e a l f a u l t . The i n v e r t e r i s o f f i n the f a u l t state. The c o n t r o l l e r w a i t s u n t i l the speed c o n t r o l i s r e s e t t o zero and then causes a t r a n s i t i o n to the stopped s t a t e so t h a t the i n v e r t e r can be r e s t a r t e d i f d e s i r e d . /* D e f i n i t i o n of Constant Values */ /* I n t e l 8156 RAM/10 c h i p //define  r e g i s t e r addresses (I/O mapped) */  COM_STATUS_8156  0x10  //•define PORTA  0x11  //define  PORTB  0x12  //define PORTC  0x13  //define  TIMER_LSB  //define TIMER_MSB  0x14 0x15  /* AMD 9513 Counter/Timer chip r e g i s t e r addresses (I/O mapped) */ //define  COMMAND_REG_9513  0X41  //define  DATA_REG_9513  0x40  /* AMD 9513 i n t e r n a l r e g i s t e r s */  168  //define MASTER MODE  0x17  //define CNTR1MODE  0x01  //define CNTR1LOAD  0x09  //define CNTR2MODE  0x02  //define CNTR2LOAD  0x0a  //define CNTR3MODE  0x03  //define CNTR3LOAD  Ox Ob  //define CNTR4M0DE  0x04  //define CNTR4L0AD  OxOc  //define CNTR5MODE  0x05  //define CNTR5L0AD  OxOd  //define REFREG  CNTR1L0AD  //define FREQREG1  CNTR2L0AD  //define FREQREG2  CNTR5L0AD  //define VCTREG  CNTR4L0AD  //define RCTREG  CNTR3L0AD  //def ine START 9513  0x7F  /* 9513 s t a r t  command */  /* N a t i o n a l ADC 0808 analog t o d i g i t a l c o n v e r t e r addresses (I/O mapped)*/ //define ADC  0x80  //define ADCO  0x80  /* A/D C o n v e r t e r */ /* Channel 0 Address */  /* Some macros t o handle v a r i o u s i n p u t s and outputs */  //define FREQ_SPEED_POT_SETTING adcin(ADCO) /* Frequency/Speed c o n t r o l pot connected t o A/D channel 0 */ //define FORWARD //define REVERSE /* CW i n p u t  output(P0RTB,portb=0xl0 | portb) output (PORTB ,portb=0xEF & p o r t b ) (phase sequence) t o PWM c h i p i s from p i n 4 o f p o r t B */  //define RESET_PWM_CHIP output(PORTB,portb=0x4 | p o r t b ) //define PWM_CHIP_RESET_OFF output(P0RTB,portb=0xFB & p o r t b ) /* A i n p u t ( r e s e t ) t o PWM c h i p i s from p i n 2 of p o r t B */  169  //define SELECT_LO_FREQ_FCT out put (PORTC, 0x01) //define SELE CT_HI_FREQ_F CT output (PORTC, 0x02) /* A c t i v e frequency s y n t h e s i z e r f o r g e n e r a t i o n of FCT /* p i n s 0 and 1 on Port C */  /* Macros f o r s w i t c h //define ON //define OFF  states  0x1 0x0  /* ON/OFF s w i t c h must be a t +5V  OFFSTATE STOPSTATE ACCSTATE DECSTATE CONSTSTATE FAULTSTATE  OxlB  /* some macros f o r v a r i o u s  */  */  /* Only Int 7.5  wait times  //def ine HALFSEC 50000 //define HUNDREDMICROSEC 10  //define TRUE  1  //define FALSE  0  //define FWD  1  //define REV  0  //define FAULTNUMBER  5  enabled  */  */  /* app. /* app.  macros f o r f l a g s and  /* E x t e r n a l V a r i a b l e s  when ON  0x0 0x1 0x2 0x3 0x4 0x5  //define INTERRUPT MASK  /* some simple  */  */  /* Macros f o r i n v e r t e r o p e r a t i o n s t a t e s //define //define //define //define //define //define  i s s e l e c t e d by  0.5 seconds */ 100 microseconds  l o g i c a l switches  */  */  /* number of o v e r c u r r e n t i n t e r r u p t s r e q u i r e d to shut down the i n v e r t e r */  */  char c l o c k t i c k ; /* f l a g to i n d i c a t e t h a t a 5 m i l l i s e c o n d c l o c k i n t e r r u p t has o c c u r r e d */ char n e x s t a t e ; /* c o n t a i n s number corresponding to the s t a t e the i n v e r t e r c o n t r o l l e r i s to e n t e r */ char f a u l t f l a g ; /* f l a g to i n d i c a t e t h a t the i n v e r t e r i s to e n t e r the f a u l t s t a t e */ char ovccount; /* c o n t a i n s count of the number of o v e r c u r r e n t i n t e r r u p t s r e c e i v e d from the i n v e r t e r on the 8085 TRAP i n p u t */ char p r _ d i r e c t i o n ; /* f l a g i n d i c a t i n g p r e s e n t phase sequence of i n v e r t e r */ char directioncommand; /* f l a g i n d i c a t i n g phase sequence s e t p o i n t */ i n t pr_frequency; /* c o n t a i n s present i n v e r t e r output frequency */ int freqload; /* c o n t a i n s v a l u e to be loaded i n t o 9513 to set  170  inverter /* c o n t a i n s /* c o n t a i n s /* c o n t a i n s  i n t frequencycommand; int oldvalue; char p o r t b ;  /* Main f u n c t i o n f i r s t  initializes  output frequency */ i n v e r t e r frequency s e t p o i n t */ p r e v i o u s v a l u e of speed pot s e t t i n g */ s t a t u s of Port B i n 8156 I/O RAM c h i p */  the system and  then loops c o n t i n u o u s l y */  main() { initialize(); w h i l e (ON) { c l o c k t i c k = 0; /* c l o c k t i c k s e t to 1 by i n t 7 5 ( ) */ i f ( f a u l t f l a g == TRUE) n e x s t a t e = FAULTSTATE; s w i t c h ( n e x s t a t e ) /* S t a t e sequencer */ { case OFFSTATE : off(); break; case STOPSTATE : stopped(); break; case ACCSTATE : accelerating(); break; case DECSTATE : decelerating(); break; case CONSTSTATE : constantspeed(); break; case FAULTSTATE : fault(); break; default : fault(); break;  } while (!clocktick) ; /* Loop w h i l e w a i t i n g f o r next c l o c k interrupt*/  }  initialize() { /* I n i t i a l i z e  9513  Counter/Timer  171  */  output(C0MMAND_REG_9513, OxFF); /* Master r e s e t f o r 9513 */ /* Master Mode R e g i s t e r */ setup_9513(MASTER  MODE,0xc300);  /* Set up 9513 f o r : /* - BCD d i v i s i o n on the s c a l e r /* - 8 b i t data bus /* - FOUT = F l / 3 /* - Comparators and Time of Day d i s a b l e d  /* Counter setup  */ */ */ */ */  1 */  9513(CNTRlMODE,0xB23);  /* Counter 1 s e t up f o r r e p e t i t i i v e count from l o a d r e g i s t e r w i t h */ /* source = F l */ setup_9513(CNTRlLOAD,1784); /* Counter 1 s e t to d i v i d e by 1784 to produce a 841 Hz r e f e r e n c e */ /* frequency f o r the PLLs */  /* Counter 2 */ s e tup_9 513(CNTR2M0DE,Ox 2 2 3); /* /* /* /*  Counter 2 s e t up f o r r e p e t i t i v e count from l o a d r e g i s t e r w i t h source = SRC2. Acts as c o n t r o l r e g i s t e r f o r the low frequency FCT o s c i l l a t o r . I n v e r t e r output frequency = Counter 2 Load R e g i s t e r / 2  */ */ */ */  /* Counter 3 */ setup_9513(CNTR3M0DE,OxB23); /* Counter 3 s e t up f o r r e p e t i t i v e count from l o a d r e g i s t e r w i t h /* source = F l . Counter 3 i s the RCT frequency s o u r c e . I t i s /* s e t to 2 8 0 * f s w i t c h  */ */ */  setup_9513(CNTR3L0AD,1); /* RCT i n i t i a l i z e d /* about 5.5 kHz.  to 1.5 MHz.  Inverter switching frequency i s  /* Counter 4 */  172  */ */  se tup_9 513(CNTR4M0DE,0x4 2 3); /* Counter 4 i s s e t up f o r r e p e t i t i v e count from t h e l o a d r e g i s t e r /* w i t h source = SRC4. Counter 4 i s the c o n t r o l r e g i s t e r f o r the /* VCT o s c i l l a t o r . VCT frequency = 1682 * Counter 4 l o a d r e g i s t e r setup_9513(VCTREG,  1600); /* Set VCT f o r 100% modulation a t 400 HZ  /* Counter 5 */ setup_9513(CNTR5M0DE,0x523); /* /* /* /*  Counter 5 i s s e t up f o r r e p e t i t i v e count from the l o a d r e g i s t e r w i t h source = SRC5. Counter 5 i s the c o n t r o l r e g i s t e r f o r the h i g h f r e q u e n c y FCT o s c i l l a t o r . I n v e r t e r output frequency = Counter 5 l o a d r e g i s t e r / 2  /* 8156 I/O - Timer I n i t i a l i z a t i o n */ output(TIMERJLSB, 0x88); output(TIMER_MSB, 0xD3); output(C0M_STATUS_8156, OxCE); /* 8156 Timer s e t to d i v i d e by 5000 (200 Hz o u t ) /* 8156 P o r t A = i n p u t , P o r t B = o u t p u t , Port C = output /* i n i t i a l i z e  some v a r i a b l e s */  p o r t b = ovccount = 0; f a u l t f l a g = FALSE; /* i n i t i a l i z e  i n v e r t e r f r e q u e n c y to 3 Hz */  p r _ f r e q u e n c y = 3; setup_9513(FREQREGl,6); setup_9513(FREQREG2,6); SELECT_L0_FREQ_FCT; /* S t a r t 9513 */ output(COMMAND_REG_9513,  START_9513);  /* I n i t i a l i z e PWM  c h i p */  RESET_PWM_CHIP; wait(HALFSEC); PWM_CHIP_RESET_OFF; /* Set up i n i t i a l  s t a t e */  n e x s t a t e = 0FFSTATE; /* Set up i n t e r r u p t mask and enable i n t e r r u p t s */  173  sim(INTERRUPT_MASK); enable();  }  /* /*  Returns  adcin Function  */  8 b i t v a l u e (as i n t ) from A/D channel whose address i s */ /* s p e c i f i e d by "num" */  adcin(num) char num;  { output(num,0); wait(HUNDREDMICROSEC); return(input(ADC));  } /*  wait F u n c t i o n  */  /* A c t s as a d e l a y f u n c t i o n . Delays a p p r o x i m a t e l y "time" * 10 /* microseconds when used w i t h a 3 MHz 8085 . wait(time) unsigned time;  { //asm  LOOP:  POP POP PUSH PUSH XRA DCX NOP ORA ORA JNZ  H D D H A D D E LOOP  //endasm } /* i n t 7 5  f u n c t i o n */  /* I n t e r r u p t s e r v i c e r o u t i n e . Responds t o timer i n t e r r u p t and gets */ /* speed command from A/D c o n v e r t e r . Then c a l c u l a t e s the frequency */ /* and d i r e c t i o n s e t p o i n t s */ int75()  { 174  */ */  i n t newvalue, raw; newvalue=FREQ_SPEED_POT_SETTING; i f ( a b s ( n e w v a l u e - o l d v a l u e ) > 1) /* Check f o r s i g n i f i c a n t change i n */ oldvalue=newvalue; /* v a l u e . */ /* Frequency s e t p o i n t b i n a r y format */  i s input  as an 8 b i t signed number i n o f f s e t  if  ((raw = o l d v a l u e - 128) > 0) /* c o n v e r t t o s t a n d a r d format and */ directioncommand = FWD; /* determine d i r e c t i o n s e t p o i n t */ else directioncommand = REV; if  ((raw = abs(raw) - 9) < 0) frequencycommand = 3 ; /* A deadband i s l e f t around the z e r o p o i n t else frequencycommand = (raw*10)/3 + 3 ; /* max frequency = 400 Hz */ if  (ovccount > 0) ovccount—;  */  /* Make sure t h a t a w i d e l y spaced s e t of o v e r c u r r e n t * / /* i n t e r r u p t s don't shut down the i n v e r t e r */  c l o c k t i c k = 1; } /* t r a p  f u n c t i o n */  /* Trap i n t e r r u p t s e r v i c e r o u t i n e counts the number of o v e r c u r r e n t i n t e r r u p t s r e c e i v e d from the i n v e r t e r . I f the number exceeds a l i m i t , the i n v e r t e r i s shut o f f and the f a u l t f l a g i s s e t */ trapQ { i f (-H-ovccount > FAULTNUMBER) { stop(); f a u l t f l a g = TRUE; }  }  /* o f f f u n c t i o n */ /* C a r r i e s  out the f u n c t i o n s  required  f o r the i n v e r t e r o f f s t a t e  */  off() { stop(); i f ( o n _ o f f _ s w i t c h ( ) == ON) n e x s t a t e = ST0PSTATE; /*else n e x s t a t e = OFFSTATE;*/  } /* /* C a r r i e s  stopped f u n c t i o n  out the f u n c t i o n s  required  */  f o r the i n v e r t e r stopped s t a t e  175  */  stopped() { stopQ; if(directioncommand  else  ==  FWD)  { FORWARD; pr_direction = }  FWD;  {  REVERSE; p r _ d i r e c t i o n = REV; } freqload =6; /* Set i n v e r t e r frequency setfrequency(freqload);  t o 3 Hz */  /* determine next s t a t e */ i f ( o n _ o f f _ s w i t c h ( ) == OFF) n e x s t a t e = OFFSTATE; e l s e if(frequencycommand>3) n e x s t a t e = ACCSTATE; else /* n e x s t a t e = STOPSTATE*/;  } /*  accelerating function  /* C a r r i e s out f u n c t i o n s r e q u i r e d accelerating()  */  w h i l e i n v e r t e r i s i n c r e a s i n g i t s frequency */  { if  ( f a u l t f l a g == FALSE) start();  /* check i f t r a n s i t i o n t o another  state i s required  i f ( o f f_or_rev()) n e x s t a t e = DECSTATE; else if(pos_freq_error()) n e x s t a t e = DECSTATE; else if(zero_freq_error()) n e x s t a t e = CONSTSTATE; else  { /*  n e x s t a t e = ACCSTATE; */ i n c _ f requency(); }  } /*  constantspeed  function  constantspeed()  176  */  */  { if  ( f a u l t f l a g == FALSE) start();  if(off_or_rev()) n e x s t a t e = DECSTATE; else if(pos_freq_error()) n e x s t a t e = DECSTATE; else if(neg_freq_error()) n e x s t a t e = ACCSTATE; else /* n e x s t a t e = CONSTSTATE;*/;  } /*  decelerating  function  */  decelerating() { i f ( f a u l t f l a g == FALSE) start(); i f ( p r _ f r e q u e n c y < 3) n e x s t a t e = STOPSTATE; else i f ( o f f _ o r _ r e v ( ) )  { /*  else /*  else  n e x s t a t e = DECSTATE; */ dec_f r e q u e n c y ( ) ; } if(pos_freq_error()) { n e x s t a t e = DECSTATE; */ dec_f r e q u e n c y ( ) ; } if(neg_freq_error()) n e x s t a t e = ACCSTATE;  else  }  n e x s t a t e = CONSTSTATE;  /* F u n c t i o n s implementing v a r i o u s t e s t s r e q u i r e d /* s t a t e or a c t i o n s to be c a r r i e d out */  to determine the next */  of f _ o r _ r e v ( ) { return(on_off_switch()==OFF||directioncommand!=pr_direction); } pos_freq_error() { return(frequencycommand < p r _ f r e q u e n c y ) ; } zero_f  req_error()  { return(frequencycommand == p r _ f requency); 177  }  neg_f r e q _ e r r o r ( ) { return(pr  frequency < frequencycommand);  /* /* Increases  inc_frequency function  i n v e r t e r frequency  by 0.5 Hz  */ */  i n c _ f requency() { freqload++; setfrequency(freqload); } /* dec_frequency /* As f o r i n c _ f r e q u e n c y except  function  frequency  */  i s decreased  */  dec_f r e q u e n c y ( ) { freqload—; setfrequency(freqload); } /* s e t f r e q u e n c y f u n c t i o n */ /* Programs 9513 f o r d e s i r e d frequency /* FCT g e n e r a t i o n . */  and s e l e c t s a p p r o p r i a t e VCO  f o r */  setfrequency(value) i n t value;  { p r _ f requency=value/2; disable(); synclQ;  / * d i s a b l e i n t e r r u p t s */ /* s y n c h r o n i z e to 9513 counter t o a v o i d c o n t e n t i o n over access to l o a d r e g i s t e r */ setup_9 513(FREQREG1.value); sync2(); /* s y n c h r o n i z e a g a i n */ setup_9513(FREQREG2,value) ; enable(); /* r e e n a b l e i n t e r r u p t s */ i f ( v a l u e > 250) SELECT_HI_FREQ_FCT; else SELECT_LO_FREQ_FCT;  /* i f i n v e r t e r frequency > 125 Hz */ /* use h i g h frequency VCO */  } /* Synchronizes of new count r e g i s t e r */  /* s y n c l ( ) f u n c t i o n */ l o a d i n g of new count f o r counter #2 (FREQREG1) w i t h s t a r t i n counter #2, thus a v o i d i n g c o n f l i c t over use of Load  syncl()  178  { //asm  Ml:  IN ANI MOV IN ANI CMP JZ  41H 4 B,A 41H 4 B Ml  ; READ 9513 STATUS REG ; MASK OFF COUNTER 2 OUTPUT STATUS BIT ; SAVE IT ; KEEP CHECKING COUNTER 2 OUTPUT FOR A ; CHANGE ; CHANGE INDICATES START OF NEW COUNT  //endasm } /* s y n c 2 ( ) f u n c t i o n */ /* As f o r s y n c l ( ) except checking counter #5 (FREQREG2) */ sync2() { //asm  M2:  IN ANI MOV IN ANI CMP JZ  41H 20H B,A 41H 20H B M2  //endasm }  /*  fault  function  */  /* Wait u n t i l t h e frequency s e t p o i n t i s reduced to 3 Hz. Then r e s e t the f a u l t v a r i a b l e s ( f a u l t f l a g & ovccount) and s e t up the c o n t r o l l e r to e n t e r t h e " s t o p p e d " s t a t e . */  fault() { while  ( frequencycommand > 3 ) on_overcurrent_indicator(); f a u l t f l a g = FALSE; ovccount = 0; of f _ o v e r c u r r e n t _ i n d i c a t o r ( ) ; n e x s t a t e = STOPSTATE;  } /* F u n c t i o n s t o read s w i t c h s t a t u s on_off_switch() { ~ //asm IN 11H ANI 1 MOV L,A  o r t o output c o n t r o l s i g n a l s */  /* I n v e r t e r o n - o f f s w i t c h connected to p i n 0 */ /* of Port A */  179  MVI  H,0  #endasm } start() {  /* L i n p u t ( o n / o f f ) t o PWM c h i p i s from p i n 3 of */ /* P o r t B. Green LED ( o n / o f f i n d i c a t o r ) i s */ /* connected t o p i n 0 of P o r t B */ output(PORTB,portb=0x9|portb); } StOpQ  { output(PORTB,portb= 0xF6 & p o r t b ) ; } on_overcurrent_indicator()  /* Y e l l o w LED connected to p i n 1 of P o r t B */  { output(PORTB,portb=0x2|portb); } of f _ o v e r c u r r e n t _ i n d i c a t o r ( ) { output(PORTB,portb= OxFD & p o r t b ) ; } setup_9513(reg,val) val; int r { //asm POP H POP D B POP PUSH B PUSH D PUSH H A,C MOV 41H OUT MOV A,E OUT 40H A,D MOV OUT 4 OH #endasm }  /* Loads a 16 b i t v a l u e i n t o the f r e q u e n c y */ /* c o n t r o l r e g i s t e r s of  ; r e t u r n address ;val 5 reg  ;9513 command r e g i s t e r ;9513 d a t a r e g i s t e r ;9513 d a t a r e g i s t e r  180  

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