UBC Theses and Dissertations

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UBC Theses and Dissertations

The induced polarization receiver Frýdecký, Ivan Igor 1980

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The I n d u c e d P o l a r i z a t i o n R e c e i v e r by I v a n I g o r F r y d e c k y A . S c . , U n i v e r s i t y of B r i t i s h C o l u m b i a , 1971 THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE i n THE FACULTY OF GRADUATE STUDIES D e p a r t m e n t ( o f G e o p h y s i c s and A s t r o n o m y We a c c e p t t h i s t h e s i s as c o n f o r m i n g t o the r e q u i r e d s t a n d a r d THE UNIVERSITY OF BRITISH COLUMBIA May 1980 Iva n I g o r F r y d e c k y , 1980 In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of Brit ish Columbia, I agree that the Library shall make i t freely available for reference and study. I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the Head of my Department or by his representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission. , Geophysics and Astronomy Department of .  The University of Brit ish Columbia 2075 Wesbrook Place Vancouver, Canada V6T 1W5 Date _ J ^ _ J ^ l J l l £ ABSTRACT The induced p o l a r i z a t i o n r e c e i v e r capable 'of d e t e c t i n g the intermodula-t i o n coupling products caused by the e l e c t r i c a l l y n onlinear ground employing adaptive f i l t e r s i s designed and constructed. The sum of two s i n e waves i s t r a n s m i t t e d to the ground. The f i r s t adap-t i v e notch f i l t e r r e j e c t s the received s i g n a l at the t r a n s m i t t e d frequen-c i e s . The second adaptive notch f i l t e r i s used as a spectrum analyzer to measure the F o u r i e r c o e f f i c i e n t s at eight d i s c r e t e i n t e r m o d u l a t i o n frequen-c i e s . The r e c e i v e r was t e s t e d f o r i t s a b i l i t y to recognized the intermodula-t i o n products and c a l i b r a t e d . i i TABLE OF CONTENTS Abstract i i Table of Contents i i i L i s t of Figures v L i s t of Tables v i Acknowledgement .. • v i i Section 1 I n t r o d u c t i o n 1 1.1 Instrument Proposal 2 Section 2 Theory 5 2.1 Basic Adaptive Feedback C i r c u i t 5 2.2 Notch F i l t e r 9 2.3 Double Frequency Notch F i l t e r 11 2.4 Highpass F i l t e r 14 2.5 F o u r i e r C o e f f i c i e n t Evaluator 15 Section 3 Instrumentation 17 3.1 I n t r o d u c t i o n 17 3.2 Block Diagram D e s c r i p t i o n . 17 3.3 D e t a i l e d C i r c u i t A n a l y s i s 20 3.4 Frequency Generator 1 20 3.5 Frequency Generator 2 25 3.6 Notch F i l t e r 25 3.7 Wave Analyzer 29 3.8 Input A m p l i f i e r 32 3.9 Power Supply 32 3.10 Front Panel 37 Sec t i o n 4 Maintenance and Troubleshooting 42 4.1 I n t r o d u c t i o n 42 4.2 Test Equipment 42 4.3 Maintenance 42 4.4 Input A m p l i f i e r Common-mode and DC Of f s e t Adjustment 43 4.5 Troubleshooting 43 4.6 Repair and Replacement 49 Section 5 Parts L i s t 51 5.1 Function Generator 1 51 5.2 Function Generator 2 51 5.3 Notch F i l t e r 51 5.4 Wave Analyzer 52 5.5 Input A m p l i f i e r 52 5.6 Power Supply 52 5.7 Front Panel and Cage 53 Section 6 Edge Connectors Connection 54 Section 7 Tests 60 7.1 I n t r o d u c t i o n 60 7.2 Zero L e v e l Measurement 60 7.3 Half-Wave R e c t i f i e d Sinusoid Test 61 7.4 Square Wave Test 63 7.5 Induced P o l a r i z a t i o n Tank Test 63 7.6 C a l i b r a t i o n Test 66 \ i i i S e c t i o n 8 F i e l d Measurement 69 8.1 Warning 69 8.2 Measurement 69 Section 9 Conclusions 71 Bi b l i o g r a p h y ••• 73 Appendix A 74 A . l Frequency Doublers 74 A. 2 Intermodulation Product Generator 75 Appendix B 77 B. l Lossy I n t e g r a t o r 77 Appendix C 78 C. l Device S p e c i f i c a t i o n s 78 i v L I S T OF F I G U R E S F i g u r e 1 S y s t e m U s e d B y M i t c h e l l 3 F i g u r e 2 P r o p o s e d I n d u c e d P o l a r i z a t i o n R e c e i v e r 4 F i g u r e 3 B a s i c A d a p t i v e F e e d b a c k C i r c u i t 4 F i g u r e 4 M o d i f i e d A d a p t i v e F e e d b a c k C i r c u i t 8 F i g u r e 5 A d a p t i v e C i r c u i t W i t h A u t o m a t i c F e e d b a c k C o n t r o l 8 F i g u r e 6 S i n g l e F r e q u e n c y N o t c h F i l t e r ( w o = l ) 12 F i g u r e 7 D o u b l e F r e q u e n c y N o t c h F i l t e r (<*>o=l> u l = 2 ) 13 F i g u r e 8 N o n l i n e a r I n d u c e d P o l a r i z a t i o n R e c e i v e r 18 F i g u r e 9 F r e q u e n c y G e n e r a t o r 19 F i g u r e 10 F r e q u e n c y G e n e r a t o r 1 , F G 1 , B o a r d 21 F i g u r e 11 F r e q u e n c y G e n e r a t o r 1 , F G 1 , B o a r d C o m p o n e n t L o c a t i o n 22 F i g u r e 12 F r e q u e n c y G e n e r a t o r 2 , F G 2 , B o a r d 23 F i g u r e 13 F r e q u e n c y G e n e r a t o r 2 , F G 2 , B o a r d C o m p o n e n t L o c a t i o n 24 F i g u r e 14 N o t c h F i l t e r , N F , B o a r d 27 F i g u r e 15 N o t c h F i l t e r , N F , B o a r d C o m p o n e n t L o c a t i o n 2 8 F i g u r e 16 Wave A n a l y z e r , WA, B o a r d 3 0 F i g u r e 17 Wave A n a l y z e r , WA, B o a r d C o m p o n e n t L o c a t i o n 31 F i g u r e 18 I n p u t A m p l i f i e r , I A , B o a r d 3 3 F i g u r e 19 I n p u t A m p l i f i e r , I A , B o a r d C o m p o n e n t L o c a t i o n 3 4 F i g u r e 20 P o w e r S u p p l y , P S , B o a r d 3 5 ) F i g u r e 21 P o w e r S u p p l y , P S , B o a r d C o m p o n e n t L o c a t i o n 36 F i g u r e 22 F r o n t P a n e l 4 0 F i g u r e 23 F r o n t P a n e l 41 F i g u r e 24 H a l f - W a v e R e c t i f i e d S i n u s o i d T e s t 68 F i g u r e 25 S q u a r e Wave T e s t • 6 8 F i g u r e 26 E l e c t r o d e ' s C o n f i g u r a t i o n F o r I P T a n k T e s t 68 F i g u r e 27 C a l i b r a t i o n T e s t 6 8 F i g u r e 28 S i n e D o u b l e r 76 F i g u r e 29 C o s i n e D o u b l e r • 7 6 F i g u r e 30 I n t e r m o d u l a t i o n F r e q u e n c y G e n e r a t o r ... 76 F i g u r e 31 L o s s y I n t e g r a t o r 76 v L I S T OF T A B L E S T a b l e I R e f e r e n c e F r e q u e n c i e s U s e d I n Wave A n a l y z e r • • 4 5 T a b l e I I " Z e r o " I n t e r m o d u l a t i o n L e v e l s ( f i = 6 5 m H z , f 2 = 20 m H z ) 6 2 T a b l e I I I H a l f - W a v e R e c t i f i e d S i n u s o i d 62 T a b l e I V S q u a r e Wave 6 2 T a b l e V I P T a n k T e s t W i t h o u t D i o d e . . . . 6 5 T a b l e V I I P T a n k T e s t W i t h D i o d e 6 5 T a b l e V I I C a l i b r a t i o n T e s t 67 v i ACKNOWLEDGEMENT I w o u l d l i k e t o t h a n k s D r . R . D . R u s s e l l f o r p r o p o s i n g s u c h a n i n t e r e s -t i n g t o p i c , f o r h i s many a n d u s e f u l l c o m m e n t s a n d f o r h i s a b u n d a n t p a t i e n c e . I a l s o w i s h t o e x t e n d my t h a n k s t o M r . R . G . C u r r i e a n d M r . D . A . S e e m a n n f o r t h e i r c r i t i c a l r e v i e w o f t h i s w o r k a n d t o D r . D . L . T i f f i n a n d G e o l o g i c a l S u r v e y o f C a n a d a f o r t h e i r s u p p o r t . T h e p r o j e c t w a s f u n d e d b y N a t u r a l S c i e n c i e s a n d E n g i n e e r i n g R e s e a r c h C o u n c i l o f C a n a d a g r a n t # A - 0 7 2 0 a n d N a t u r a l - A p p l i e d a n d H e a l t h S c i e n c i e s R e s e a r c h C o m m i t t e o f U n i v e r s i t y o f B r i t i s h C o l u m b i a . v i i SECTION 1 INTRODUCTION Geophysical e x p l o r a t i o n techniques employing induced p o l a r i z a t i o n assume that the eart h i s e l e c t r i c a l l y l i n e a r . This assumption i s made i n v i r t u a l l y a l l work d e a l i n g w i t h e l e c t r i c a l s i g n a l s i n the ground but there i s l i t t l e evidence to suport i t (Sumner, 1976). N o n l i n e a r i t i e s have been observed at the l a b o r a t o r y s c a l e by Katsube (1973) and other workers. M i t c h e l l (1978) attempted to determine i f these e l e c t r i c a l n o n l i n e a r i -t i e s could be measured i n the f i e l d . The r e s u l t s of h i s study were i n c o n c l u -s i v e , as the time required to develop a system capable of d e t e c t i n g any i n -termodulation coupling caused by the e l e c t r i c a l l y n onlinear ground m a t e r i a l s precluded s u f f i c i e n t f i e l d work. The main components of M i t c h e l l ' s system ( F i g . 1) c o n s i s t e d of a high voltage t r a n s m i t t e r to form a p o t e n t i a l f i e l d i n the ground, a r e c e i v e r to monitor t h i s f i e l d and a recording system. The t r a n s m i t t e r was d r i v e n by the summed output of two sine wave generators. This double s i n u s o i d s i g n a l drove a high voltage programmable power supply and an i n v e r t i n g a m p l i f i e r which drove a second power supply; The outputs of these power s u p p l i e s were then connected to current e l e c -trodes to form a p o t e n t i a l f i e l d i n the ground. This f i e l d was monitored through two p o t e n t i a l e l e c t r o d e s connected to a high input impedance d i f f e r e n t i a l a m p l i f i e r . The two sinusoids generated by the t r a n s m i t t e r were subtracted, a f t e r amplitude and phase adjustment, from the output s i g n a l of the d i f f e r e n t i a l a m p l i f i e r to remove the fundamen-t a l frequencies. This s i g n a l together w i t h the output s i g n a l from the - 1 -d i f f e r e n t i a l a m p l i f i e r a n d t h e d r i v e s s i g n a l o f t h e h i g h v o l t a g e p r o g r a m m -a b l e p o w e r s u p p l i e s w e r e d i g i t i z e d a n d r e c o r d e d o n a n i n e t r a c k d i g i t a l t a p e r e c o r d e r . T h e r e c o r d e d d a t a w e r e a n a l y z e d o n a d i g i t a l c o m p u t e r t o c a l c u l a t e t h e f r e q u e n c y s p e c t r u m f o r t h e r e c e i v e d s i g n a l . T h e s y s t e m h a d t w o w e a k p o i n t s : f i r s t l y t h e r e m o v a l o f t h e f u n d a m e n t a l f r e q u e n c i e s w a s d o n e m a n u a l l y , a t e d i o u s a n d d i f f i c u l t j o b , a n d s e c o n d l y , i t w a s n o t a p o r t a b l e s y s t e m . M i t c h e l l ( 1 9 7 8 ) r e c o m m e n d e d t h e d e v e l o p m e n t o f a t r u l y p o r t a b l e a u t o -m a t i c i n s t r u m e n t , w h i c h c o u l d be u s e d f o r d e t a i l e d s t u d i e s o f e l e c t r i c a l n o n l i n e a r i t i e s i n t h e e a r t h . T h e d e s i g n a n d c o n s t r u c t i o n o f s u c h a s i n s t r u m e n t i s d e s c r i b e d i n t h i s t h e s i s . 1 .1 I N S T R U M E N T P R O P O S A L T h e i n s t r u m e n t , a n i n d u c e d p o l a r i z a t i o n r e c e i v e r c a p a b l e o f d e t e c t i n g n o n l i n e a r i t i e s i n t h e e a r t h s h o u l d g e n e r a t e t w o s i n u s o i d a l f r e q u e n c i e s , d r i v e t h e h i g h v o l t a g e p r o g r a m m a b l e p o w e r s u p p l i e s , a m p l i f y t h e s i g n a l r e c e i v e d f r o m t h e p o t e n t i a l e l e c t r o d e s , r e m o v e t h e t w o t r a n s m i t t e d f r e q u e n -c i e s a n d e v a l u a t e F o u r i e r c o e f f i c i e n t s o f t h e s i n u s o i d s c o r r e s p o n d i n g t o a n y i n t e r m o d u l a t i o n c o u p l i n g . T h e b l o c k d i a g r a m o f s u c h a n i n s t r u m e n t , c a l l e d h e r e a n o n l i n e a r i n d u c e d p o l a r i z a t i o n r e c e i v e r , i s s h o w n o n F i g . 2 . T h e m a i n f u n c t i o n o f t h e r e c e i v e r i s t h e e v a l u a t i o n o f t h e F o u r i e r c o e f f i c i e n t s f o r g i v e n f r e q u e n c i e s u s i n g a n a d a p t i v e f e e d b a c k c i r c u i t . A s w i l l be s e e n l a t e r , t h i s c i r c u i t i s a l s o u s e d a s a n o t c h f i l t e r i n t h e r e c e i v e r . - 2 -P r o g r a m m a b l e Power S u p p l y T Programmable Power S u p p l y irnmr 1 ////////// F i g u r e 1. System Used By M i t c h e l l F r e q u e n c y G e n e r a t o r N o t c h F i l t e r D r i v e o u t p u t t o power s u p p l i e s A m p l i f i e r Coef f i c i e n t E v a l u a t o r R e a d o u t R e c e i v e r i n p u t F i g u r e 2 . P r o p o s e d I n d u c e d P o l a r i z a t i o n R e c e i v e r F i g u r e 3 . B a s i c A d a p t i v e F e e d b a c k C i r c u i t SECTION 2 THEORY 2.1 BASIC ADAPTIVE FEEDBACK CIRCUIT The s i g n a l s x ^ ( t ) from each input element are adjusted i n amplitude and i n phase by a weighting f a c t o r s c-^(t) and summed to produce an output s i g n a l y ( t ) ( F i g . 3). The weights c ^ ( t ) are adjusted by a feedback c i r c u i t t o minimize the mean square e r r o r of the e r r o r s i g n a l e ( t ) , which i s the d i f f e r e n c e between a reference s i g n a l R (t) and the output s i g n a l y ( t ) . The s i g n a l y ( t ) contains a d e s i r e d s i g n a l d ( t ) and a noise component n ( t ) : y ( t ) = d ( t ) + n ( t ) (1) When the reference s i g n a l R (t) i s equal to the d e s i r e d s i g n a l d ( t ) , the e r r o r s i g n a l e ( t ) contains only the unwanted noise n ( t ) . M i n i m i z i n g e ( t ) corresponds to minimizing of the unwanted s i g n a l s (Compton, 1976). The above system i s used i n adaptive antenna systems with a number of input elements and only one reference s i g n a l . On the other hand, the induced p o l a r i z a t i o n r e c e i v e r has only one input but r e q u i r e s s e v e r a l s i g n a l s w i t h quadrature components to be used as the reference s i g n a l s . Exchanging the input and reference terminals of the o r i g i n a l c i r c u i t w i l l s a t i s f y the r e -c e i v e r requirements without changing the adaptive c i r c u i t behavior, ( F i g . 4). The use of the quadrature components of the reference s i g n a l R^(t) allows replacement of the complex weights c ^ ( t ) w i t h two r e a l weights w i ( t ) and W2(t) f o r amplitude adjustment only. Let the r e f e r e n c e . s i g n a l - 5 -be a s i n g l e frequency s i g n a l w i t h R i ( t ) as i t s cosine component and R2(t) as i t s sine component. R l ( t ) = C cos R 2 ( t ) = C s i n (u>0t+<|>) (3) The output s i g n a l , y ( t ) on F i g . 5, i s the weighted sum y ( t ) = WiRiCt) + w 2R2(t) = ZwjRiCt) (4) The d i f f e r e n c e between the input s i g n a l , x ( t ) , and the output s i g n a l forms the e r r o r s i g n a l e ( t ) e ( t ) = x ( t ) - EwiRjCt) (5) and the mean square e r r o r i s e 2 ( t ) = x 2 ( t ) - 2 E w i R i ( t ) x ( t ) + S w i w j R i ( t ) R j ( t ) (6) The Widrow-Hoff l e a s t mean square a l g o r i t h m (Widrow, 1975) i s used to minimize equation (6). This a l g o r i t h m i s based on the method of steepest descent, according to which the rate of change of the weight w i s propor-t i o n a l to the negative gradient of e ( t ) £ - - u grad e 2 ( t ) (7) at - 6 -where the parameter y c o n t r o l s the s t a b i l i t y and the rate of convergence. The l e a s t mean square a l g o r i t h m estimates the gradient of the mean square e r r o r w i t h the gradient of the instanteneous value of e ( t ) ^ = - y grad e 2 ( t ) (8) where grad e Z ( t ) - 2 e ( t ) Swi _6e ^ w 2 / = -2 e ( t ) R 2 (9) Then dw-j ^ = 2y e ( t ) R i ( t ) (10) and i n i n t e g r a l form w ± ( t ) = 2y /e(T)R i(x) + w 1 0 (11) Equation (11) suggested the s t r u c t u r e of the feedback loop shown on F i g . 5. I t w i l l now be determined i f t h i s adaptive feedback loop c i r c u i t can act as a notch f i l t e r and evaluate the F o u r i e r c o e f f i c i e n t s (the amplitudes) of the input s i g n a l at the given f r q u e n c i e s . I f i t can, i t i s a s u i t a b l e element f o r a nonlinear induced p o l a r i z a t i o n r e c e i v e r . - 7 -R i ( t ) R2(t) 0 wi(t ) E ^ 2 ( t ) Automatic Feedback C i r c u i t e ( t ) i y ( t ) . x ( t ) Figure 4. Modified Adaptive Feedback C i r c u i t - 8 -2.2 NOTCH FILTER The behaviour of the c i r c u i t i n F i g . 5 i s determined by e v a l u a t i n g i t s t r a n s f e r f u n c t i o n . Let the feedback loop be broken at point A, applying the same reference s i g n a l as i n equation (2) and (3) R l ( t ) = C cos (u)0t+<l>) (12) R 2 ( t ) = C s i n (a)0t+<|)) (13) and an impulse f u n c t i o n at the input x ( t ) = a <S(t-t 0) = e ( t ) (14) The r e s u l t i n g inputs to the i n t e g r a t o r s are ^ ± = KaC cos ((D0t+<t)) 6 ( t - t 0 ) (15) = KaC s i n (u)0t+<j>) 6 ( t - t 0 ) (16) where K i s the i n t e g r a t i o n constant. The response of the i n t e g r a t o r to the u n i t impulse i s a u n i t step f u n c t i o n u ( t ) . This convolving u ( t ) w i t h the input s i g n a l to the i n t e g r a t o r s y i e l d s wx = KaC cos (o)0to+<|>) u ( t - t 0 ) (17) w2 = KaC s i n (a>0to+<t>) u ( t - t r j ) (18) - 9 -and y i ( t ) = KaC 2 cos (o)0to+<t>) cos (u>0t+<j>) (19) y 2 ( t ) = KaC 2 s i n (a)0t0+<t>) s i n (u)0t+<|>) (20) Adding equations (19) and (20) y ( t ) = KaC 2 cos o ) 0 ( t - t 0 ) (21) Let the input impulse be of a u n i t y amplitude a p p l i e d at time tg=0, and the reference s i g n a l be of u n i t amplitude, then y ( t ) = K cos (i>0t (22) The open loop t r a n s f e r f u n c t i o n G(s) i s X(s) S^+WQ Take the e r r o r s i g n a l e ( t ) as the input s i g n a l of the closed loop. Hence the cl o s e d loop t r a n s f e r f u n c t i o n H(s) i s H(s) -gW- = (2A) X(s) S^+KS+UQ This i s the t r a n s f e r f u n c t i o n of notch f i l t e r . Therefore the adaptive feedback system on F i g . 5 behaves as the notch f i l t e r w i t h notch frequency o) 0, bandwidth K (the i n t e r v a l of frequencies over which the magnitude H(s) - 10 -r e m a i n s w i t h i n 3 dB o f i t s v a l u e a t t h e m i d b a n d ) a n d u n i t y g a i n , i f t h e e r -r o r s i g n a l i s t a k e n a s t h e o u t p u t s i g n a l . L o g m a g n i t u d e v e r s u s l o g f r e q u e n c y g r a p h o f t h e n o t c h f i l t e r w i t h t h e t r a n s f e r f u n c t i o n H ( s ) i s s h o w n i n F i g . 6. T h i s t y p e o f t h e f i l t e r i s s u p e r i o r t o a f i x e d a n a l o g f i l t e r a s t h e n o t c h f r e q u e n c y i s e x a c t l y a t t h e r e f e r e n c e f r e q u e n c y a n d t h e p r o b l e m o f f r e q u e n c y v a r i a t i o n o f t h e s i g n a l t o be r e j e c t e d c a n be d i s r e g a r d e d . T h i s i s p a r t i c u l a r y i m p o r t a n t f o r t h e n o n l i n e a r i n d u c e d p o l a r i z a t i o n r e c e i v e r w h e r e t h e d r i v e s i g n a l o f t h e t r a n s m i t t e r i s u s e d a s t h e r e f e r e n c e s i g n a l . 2.3 DOUBLE F R E Q U E N C Y NOTCH F I L T E R T h e p r e v i o u s a n a l y s i s c a n b e e x p a n d e d b y u s e o f t h e m u l t i p l e f r e q u e n c y s i n u s o i d a s t h e r e f e r e n c e s i g n a l ( G l o v e r , 1 9 7 7 ) . L e t t h e r e f e r e n c e s i g n a l b e t h e s u m o f t w o s i n u s o i d s R i ( t ) = cos o)Qt + cos a>it (25) R 2 ( t ) = s i n a)Qt + s i n m\t (26) T h e n t h e c l o s e d l o o p t r a n s f e r f u n c t i o n H ( s ) i s H ( S ) ~ K s K s ( 2 7 ) 2 2 2 2 s +0)o s +u>i w h i c h i s t h e n o t c h f i l t e r w i t h t w o n o t c h f r e q u e n c i e s OJQ a n d <$i» T h e l o g m a g n i t u d e v e r s u s l o g f r e q u e n c y d i a g r a m f o r t h e d o u b l e n o t c h f i l t e r i s s h o w n i n F i g . 7 . T h e a b i l i t y o f t h e d o u b l e n o t c h f i l t e r t o r e j e c t s e v e r a l f r e q u e n c i e s - 11 -F igu re 6. S ing le Frequency Notch F i l t e r (O)Q=1) CM II II O 3 U <U 4J iH •H fa X! a o S 3 o c oj cr <u fa x> O Q 0) U 60 •H fa - 13 -simultaneously i s employed by the r e c e i v e r . The frequencies used are s u f f i c i e n t l y low to assume the a t t e n u a t i o n due to the c a p a c i t i v e -reactance of the ground to be n e g l i g i b l e i n comparison to the r e s i s t i v e a t t e n u a t i o n (Sumner, 1976). 2.4 HIGHPASS FILTER Let the reference s i g n a l be of zero frequency, U>Q=0 R x(t) = cos uj 0t = 1 (28) R 2 ( t ) = s i n u)0t = 0 (29) and the input impulse be of u n i t y amplitude a p p l i e d at time tg=0 x ( t ) = 6(t) = e ( t ) (30) Then the output y ( t ) i s y ( t ) = K u ( t ) (31) The open loop t r a n s f e r f u n c t i o n G(s) i s G(s) Y(s) = K X(s) s (32) and the closed t r a n s f e r f u n c t i o n H(s) i s H(s) = E(s) = _ s (33) X(s) s+K - 14 -T h i s i s t h e t r a n s f e r f u n c t i o n o f a h i g h p a s s f i l t e r . T h e r e f o r e t h e a d a p -t i v e f e e d b a c k s y s t e m b e h a v e s a s t h e h i g h p a s s f i l t e r ( W i d r o w , 1 9 7 5 ) w i t h 3 dB a t t e n u a t i o n a t t h e f r e q u e n c y K w h e n t h e r e f e r e n c e s i g n a l i s a DC s i g n a l . T h e r e i s n o n e e d t o m a t c h t h e p h a s e o f t h e s i g n a l , o n l y o n e f e e d b a c k l o o p i s n e e d e d -2 . 5 F O U R I E R C O E F F I C I E N T E V A L U A T O R T h e a d a p t i v e f e e d b a c k s y s t e m p e r f o r m s a s t h e n o t c h f i l t e r . T h e r e f o r e i f t h e i n p u t s i g n a l x ( t ) i s t h e s i n u s o i d o f t h e same f r e q u e n c y a s t h e r e f e r e n c e s i g n a l x ( t ) = b c o s u> 0 t ; X ( s ) = b - j — ( 3 4 ) S +0)Q T h e n t h e e r r o r s i g n a l E ( s ) i s E ( s ) = H(s)X<s) = 2 S 2 + % - F - r = 2 J " 2 ( 3 5 ) s z + K s + o > 0 s +u>0 s +Ks+u>fj E q u a t i o n 35 s h o w s t h a t t h e e r r o r s i g n a l e ( t ) w i l l e x p o n e n t i a l l y d e c a y a s i t i s e x p e c t e d t o d o , a n d a f t e r s u f f i c i e n t a d a p t a t i o n t i m e , w i l l g o t o z e r o . T h e f i n a l v a l u e t h e o r e m c a n be u s e d t o s h o w t h i s b s 2 l i m e ( t ) = l i m s E ( s ) = l i m — = 0 ( 3 6 ) t = o o s + 0 s-K) s 2 + K s + u ) 0 2 When t h e e r r o r s i g n a l e ( t ) r e a c h e s z e r o , t h e w e i g h t s w ^ ( t ) a n d w 2 ( t ) b e c o m e c o n s t a n t , a s t h e r e i s a z e r o i n p u t t o t h e i n t e g r a t o r s . T h e s e w e i g h t s a r e t h e s i n e a n d c o s i n e c o n t e n t o f t h e i n p u t s i g n a l x ( t ) i . e . F o u r i e r - 15 -c o e f f i c i e n t s of the input s i g n a l . The ampl i tude i s b - / W 1 2 + w 2 2 (37) and the phase i s <j) = a r c t g — (38) wi In the case of an input s i g n a l c o n t a i n i n g n o i s e , the notch f i l t e r behaves i n the manner desc r i bed except tha t the e r r o r s i g n a l , e ( t ) , does not reach z e r o . The above system eva lua tes the F o u r i e r c o e f f i c i e n t s at one f requency o n l y , the f requency of the re fe rence s i g n a l , t he re fo re i t w i l l be c a l l e d a wave a n a l y z e r . - 16 -SECTION 3 INSTRUMENTATION 3.1 INTRODUCTION The r e c e i v e r i s designed as a spectrum analyzer operating at s e v e r a l f i x e d frequencies and as a d r i v e r f o r the high voltage programmable power s u p p l i e s . The spectrum analyzer c o n s i s t s of f o l l o w i n g modules; two f u n c t i o n generators FG1 and FG2, a double notch f i l t e r NF, a wave analyzer WA w i t h d i g i t a l readout, a v a r i a b l e gain input a m p l i f i e r IA and a power supply PS (Fig.8).. The d r i v e r c o n s i s t s of two b u f f e r s on the double notch f i l t e r module. Each module i s b u i l t on a separate p r i n t e d c i r c u i t board and these boards are i n s e r t e d i n a card cage w i t h easy access to a l l components. Numerous a c c e s s i b l e t e s t points are provided to f a c i l i t a t e t r o u b l e s h o o t i n g . 3.2 BLOCK DIAGRAM DESCRIPTION Each frequency generator has i t s own quadrature o s c i l l a t o r and frequen-cy doubler f o r generating quadrature s i g n a l s of fundamental and second har-monic frequencies. The output s i g n a l from both generators are fed through a sw i t c h i n g network to a frequency adder and s u b t r a c t o r generating intermodu-l a t i o n products at frequencies required f o r the wave a n a l y z e r , ( F i g . 9). The double notch f i l t e r i s comprized of three adaptive feedback loops, two of these forming the notch f i l t e r w i t h dual notch frequencies. The t h i r d loop i s the notch f i l t e r w i t h the zero notch frequency which behaves as a highpass f i l t e r . As the buffered sine reference s i g n a l from the double notch f i l t e r i s used as the d r i v e s i g n a l , the frequencies contained i n the t r a n s -mitted s i g n a l are always equal to the notch frequencies. - 17 -F r e q u e n c y G e n e r a t o r FG1 < \/ A S w i t c h i n g N e t w o r k A < F r e q u e n c y G e n e r a t o r FG1 N o t c h F i l t e r N F i 1 I n p u t A m p l i f i e r I A T I n p u t F r o m P o t e n t i a l E l e c t r o d e s 3 W a v e A n a l y z e r D i g i t a l WA R e a d o u t P o w e r S u p p l y P S D r i v e O u t p u t T o P r o g r a m m a b l e P o w e r S u p p l i e s F i g u r e 8 . N o n l i n e a r I n d u c e d P o l a r i z a t i o n R e c e i v e r Swi tch ing Network L iff O I-t C OJ OJ r H 3 rO O" 3 OJ O U Q fa 4 4 co o o fa ffff_ O J-i (3 OJ 0) i—I 3 X> o* 3 OJ O U Q fa * 4 rJ O •U CO rJ OJ C OJ o >, o c OJ 3 cr OJ S-l fa OJ u 3 M •H fa CM U oo o CN] o fa - 19 -The wave analyzer c o n s i s t s of the two adaptive feedback loops f o r ev a l u a t i n g sine and cosine F o u r i e r c o e f f i c i e n t s at a s i n g l e frequency, these c o e f f f i c i e n t s are dis p l a y e d on a d i g i t a l readout. A high input impedance a m p l i f i e r i s the f i r s t stage of the input a m p l i -f i e r followed by a low pass f i l t e r and a two stage v a r i a b l e gain a m p l i f i e r . 3.3 DETAILED CIRCUIT ANALYSIS 3.4 FREQUENCY GENERATOR 1 (FG1 board) (Figures 10 and 11) The FG1 board c o n s i s t s of a p r e c i s i o n q uadratic o s c i l l a t o r , two f r e -quency doublers which generate the second harmonics, and c i r c u i t to generate the intermodulation products (see Appendix A f o r operation of the frequency doubler and the intermodulation product generator). The quadrature o s c i l l a t o r 0SC1 generates two 0.065 Hz ( f i ) s i n u s o i d s . These are fed through frequency doublers ( m u l t i p l i e r s M i l and M12) generating the second harmonics connected through edge connector pins 6, 7, 16 and 17 to frequency s e l e c t switch S4 loc a t e d on a f r o n t panel. The s i g n a l s from the S4 and S5 switches (the f i r s t or second harmonics of the f i and f 2 f r e q u e n c i e s ) are fed through the M13 and M14 m u l t i p l i e r s to the A l l d i f f e r e n c e a m p l i f i e r and the A12 summing a m p l i f i e r (the intermodula-t i o n generator) generating the sine waves of the sum and d i f f e r e n c e f r e -quency. These si n u s o i d s are fed through edge connector pins 3 and 4 to frequency s e l e c t switch S6 l o c a t e d on the f r o n t panel. The potentiometers P l l and P12 adjust the frequency and the symmetry of the quadrature sinusoids generated by the o s c i l l a t o r 0SC1. - 20 -F igu re 10. Frequency Generator 1, FG1, Board 'kcu o o o Hen 'Men 'kcu Rll i — i PI2 | RI2 c=3 n 11 OSCI R\6 i z z s c O C/3 Rll/ R I I 4 C ^ R/13 Rl/5 I 1 RI/<S I 1 Rl l ? Mil A13 I 1 RIS MI2 O 1 1 RII2 A// I 1 A/2 11=1 1 £116 M/3 M l * O O O I TPI 'UCI2 '/M RIS RI9 i 1 CJ4 O Figure 11. Frequency Generator 1, FG1, Board Component Location R2J ©-X( X2 Q Yl Z\ y? 12 M23 M 2 4 X( X2 0 Yl Z\ Y2 Z2 «2/l - A M ^ — — R2I2 T7>5 R2IC • W V ,TP<S -4^ @ © ^ 7 — - < ® @ -I5V — T rzY22) F igu re 12. Frequency Generator 2, FG2, Board 'MC21 %C2\\ 'HC2I o O O o C25 P2I R2I I 1 P22 | R22 05C2\ R2£ , , f 1 O o o ITPI 'UC22\ %C22 1 1 R2IS R 2 I ? (12/ Q R 2 4 0 R27-R23 I I A2/ R2I2 < 1 R2I£ ' 1 A2I6 M23 R2S 1 1 O £24 Figure 13. Frequency Generator 2, FG2, Board Component Location 3.5 FREQUENCY GENERATOR 2 (FG2 board) (F igu res 12 and 13) This board i s the same as the FG1 board w i th the f o l l o w i n g e x c e p t i o n s . The quadrature s i n u s o i d s generated by the 0SC2 o s c i l l a t o r a re 0.020 Hz ( f 2 ) ' The M23, M24 m u l t i p l i e r s , the A21 summing a m p l i f i e r and the A22 d i f f e r e n c e a m p l i f i e r which form the i n te rmodu la t i on product genera tor generate the c o -s ines of the sum and d i f f e r e n c e f requenc ies of the s i n u s o i d s s u p p l i e d by the S4 and S5 swi tches through edge connector p ins 8, 9, 14 and 15. 3.6 NOTCH FILTER (NF board) (F igures 14 and 15) Three adap t i ve feedback c i r c u i t s are l oca ted on t h i s board , the f i r s t two form the double notch f i l t e r f o r the two fundamental f r equenc ies and the t h i r d removes the DC component of the input s i g n a l and the DC o f f s e t of the input a m p l i f i e r . The a c t u a l notch f i l t e r i s s l i g h t l y d i f f e r e n t from i t s b lock diagram on F i g . 5. The output s i g n a l y ( t ) w i th i t s p o l a r i t y i n v e r t e d by the i n t e g r a t o r i s not requ i red f o r the f i l t e r i n g f u n c t i o n as the e r r o r s i g n a l e ( t ) i s the f i l t e r ' s output s i g n a l (eqn. 24) and the re fo re the two summing j unc t i ons are rep laced by a s i n g l e one, A34 summing a m p l i f i e r . The rece i ved s i g n a l (from IA board) i s f e d , p i n 16, to the input of the A34 summing a m p l i f i e r . The output s i g n a l , e ( t ) , from the A34 summing a m p l i -f i e r i s m u l t i p l i e d by the re fe rence s i g n a l R^( t ) = s i n o^t + s i n u>2t i n the M31 m u l t i p l i e r . The m u l t i p l i e r ' s output s i g n a l i s s c a l e d by a r e s i s t a n c e network R31, R32 and R33. The r e s i s t a n c e network has a m u l t i p l y i n g e f f e c t on - 25 -the i n t e g r a t i o n constant K = where R = R31 + R33 + R 3 ^ 3 3 and e l i m i n a t e s the need f o r l a r g e value components. The scaled s i g n a l i s i n -tegrated by A31 i n t e g r a t o r then m u l t i p l i e d again by the reference s i g n a l R l ( t ) i n the M32 m u l t i p l i e r and fed i n t o the input of the A34 summing amp l i -f i e r to c l o s e the loop. As the feedback loop uses only sine components of the reference s i g n a l , only the si n e components are removed from the received s i g n a l . The second feedback c i r c u i t , c o n s i s t i n g of the M33 and M34 m u l t i p l i e r s and the A32 i n t e g r a t o r , performs the same f u n c t i o n as the f i r s t one but employs the reference s i g n a l R 2 ( t ) = cos oi^t + cos o)2t f o r removal of the cosine components of the received s i g n a l . The M35, M36 m u l t i p l i e r s and A33 i n t e g r a t o r w i t h t h e i r a s s o c i a t e d com-ponents comprise a DC notch f i l t e r . The reference s i g n a l i s the DC l e v e l taken from R313 and R314 voltage d i v i d e r . The A35 and A38 summing a m p l i f i e r s sum the sine and cosine components of the fundamental frequency sinusoids to form the reference s i g n a l s R i ( t ) and R 2 ( t ) required f o r the double notch f i l t e r i n g . The reference s i g n a l R i ( t ) i s buffered by A36 b u f f e r and i n v e r t e d by A37 i n v e r t i n g b u f f e r . The output s i g n a l s of these two b u f f e r s are used as the d r i v e s i g n a l s f o r the high voltage programmable power s u p p l i e s . R e s i s t o r s R34, R38 and R312 pr o t e c t the i n t e g r a t o r ' s inputs against discharge of feedback c a p a c i t o r s through the o p e r a t i o n a l a m p l i f i e r s . The adaptation time of the adaptive feedback c i r c u i t s i s p r o p o r t i o n a l - 26 -R322 ( 6 ) 'SAA/" F igu re 14. Notch F i l t e r , NF, Board 00 R 3 / 3 I 1 O C34 O O R i i 4 6 M35 M53 Mil A 3 £ A 3 5 C Z D R 3 2 I I IR322 A 3 3 A 32 A3) R3G ^ 5 E E ) R 5 2 3 0' i io ?? i = 3 R3ig R52 o o o T P / C 3 5 0 R 3 3 I r5i6 A 3 4 I I [ R 3 ) J C ~ I R 5 2 4 C32 R330 D C3I R329 A3? A32? R325 r I N 3 6 M 3 4 M52 A5& r 3 R526 l 1 O £ 3 5 Figure 15. Notch F i l t e r , NF, Board Component Location to the i n t e g r a t i o n constants of the A31, A32 and A33 i n t e g r a t o r s . These con-stants are very s m a l l , K « 5 x 10~ , as the bandwith of the notch f i l t e r i s equal to the i n t e g r a t i o n constants. The S10 switch (FAST NF) disconnects the R32 and R36 r e s i s t o r s of the r e s i s t a n c e networks at the inputs of the A31 and A32 i n t e g r a t o r s thus e l i m i n a t i n g t h e i r m u l t i p l y i n g e f f e c t on the i n t e g r a t i o n constant r e s u l t i n g i n a decreased adaptation time. 3.7 WAVE ANALYZER (WA board) (Figures"16 and 17) This board c o n s i s t s of two adaptive feedback c i r c u i t s forming the notch f i l t e r f o r determining the F o u r i e r c o e f f i c i e n t s . The r e s u l t i n g weights from t h i s f i l t e r can be monitored on the d i g i t a l readout. The s i g n a l from NF board ( p i n 16) i s fed to the u n i t y gain input of the A44 a m p l i f i e r and then to the A43 summing a m p l i f i e r . The A43 output s i g n a l i s m u l t i p l i e d , i n the M41 and M42 m u l t i p l i e r , by the reference s i g n a l of the frequency set by the S4, S5 and S6 switches; scaled by the r e s i s t o r network R41, R42, R43, R45 and R46, R47, R48 and R410 which has the m u l t i p l y i n g e f f e c t on the i n t e g r a t i o n constant K; i n t e g r a t e d i n the A41 and A42 i n t e g r a -t o r ; m u l t i p l i e d , i n the M43 and M44 m u l t i p l i e r , by the reference s i g n a l and fed to the A43 summing a m p l i f i e r to c l o s e the feedback loop. The DC voltage at the output of the i n t e g r a t o r s , pins 19 and W, i s monitored on the d i g i t a l panel meter. R44 and R49 r e s i s t o r s p r o t e c t the i n t e g r a t o r ' s i n p u t s against discharge of feedback c a p a c i t o r s through the o p e r a t i o n a l a m p l i f i e r s . - 29 -C4I R4)2< r p 6 \ Y VW-@ -T7>2 M43 X/ X2 0 y/ z/ 22 TP5 V X/ X2 0 Yl Zl Y2 z? TP4 V A4y? -A/vV #4/4 -AAAA TP3 A 4/5 R4/6 F igu re 16. Wave A n a l y z e r , WA, Board I O O O O o O TP/ Q C A Z M 4 2 M4t f ) R 4 6 ^49 || K44 ft 48 ft 4/0 £47-0 s> \nMI R4I3 r-r s\ U D ^ « s R4I4-0 R42 u i—i A45 R 4 I 6 R4/7-C4<2 0 K 4 / 2 64/ £ 4 4 R423C Q«4/, O _ S R 4 2 ' |CZ=) R422 /?4a?c—i R 4 / 9 J R4 /£ A 44 M 4 4 ^ 4 3 F i g u r e 1 7 . W a v e A n a l y z e r , WA, B o a r d C o m p o n e n t L o c a t i o n 3.8 INPUT AMPLIFIER (IA board) • (Figures 18 and 19) This board c o n s i s t s of a high input impedance d i f f e r e n t i a l a m p l i f i e r , a low pass f i l t e r and a two stage v a r i a b l e gain a m p l i f i e r . A m p l i f i e r s A51, A52 and A53 with t h e i r a s s ociated components comprise a very high input impedance d i f f e r e n t i a l a m p l i f i e r w i t h the gain of 1 or 10 s e l e c t e d by the S51 switch. They amplify the s i g n a l received (pins C and K) from the p o t e n t i a l e l e c t r o d e s . The a m p l i f i e d s i g n a l i s then fed through a l o s s y i n t e g r a t o r w i t h u n i t y g a i n , A54, (Appendix B) followed by the A55 a m p l i f i e r (with a step gain of 1 or 10 set by the SI switch on the f r o n t panel) and the A56 a m p l i f i e r (with the v a r i a b l e gain of 1 to 10 adjusted by the PI potentiometer on the f r o n t panel). R517, P53, R518; R519, P54, R520 and R521, P55, R522 r e s i s t a n c e net-works c o n t r o l the DC o f f s e t s of the A53, A54 and A55 a m p l i f i e r s . 3.9 POWER SUPPLY (PS board) (Figures 20 and 21) IC61, Q61, Q62 and t h e i r a s s o c i a t e d components comprise the high current dual t r a c k i n g voltage r e g u l a t o r supplying ±15 VDC w i t h R61 and R62 r e s i s t o r s l i m i t i n g the current to 0.6 A f o r short c i r c u i t p r o t e c t i o n . A three t e r m i n a l voltage r e g u l a t o r IC62 s u p p l i e s ±5 VDC which i s required by the d i g i t a l panel meter. - 32 -RS2 F igure 18. Input A m p l i f i e r , IA, Board o o QCSI o o O TP; RS32 I ) A 56 RS9 - -ASS R5I4 .R5I3 R5\6 0 [P54 RS20 RSI5ME R5S R52I £ § 3 R5I& O C52 R5m 3 CSl A 5 4 S S I A 5 3 | W 5 l ^ C=D«5/9 c — I I 1 RST* P. 53 A52 I 1 R526 R5I2 \RS23 PSIWPS2. R53 RS25 R5I F igu re 19. Input A m p l i f i e r , IA , Board Component Loca t i on Figure 20. Power Supply, PS, Board Figure 21 . Power Supply, PS, Board Component Lo c a t i o n 3.10 FRONT PANEL (Figures 22 and 23) The f r o n t panel c o n s i s t s of i n t e r f a c e connectors, c o n t r o l s and the d i g i t a l panel meter. IN - input BNC t e r m i n a l s ZERO/MEAS - toggle s w i t c h , when i n MEAS p o s i t i o n the input terminals are connected to the input of the a m p l i f i e r . In ZERO p o s i t i o n an i n t e r n a l t e s t s i g n a l , the sine component of the double notch f i l t e r reference s i g n a l attenuated by R71, R72 and R73 r e s i s t o r s i s fed to the a m p l i f i e r f o r zero l e v e l c a l i b r a t i o n . GAIN 1/10 - toggle switch f o r the step c o n t r o l of the a m p l i f i e r gain (1 and 10) and the potentiometer f o r v a r i a b l e gain of 1 and 10 f o r the t o t a l gain c o n t r o l of 1 to 100 of the input a m p l i f i e r . FAST NF - momentary sw i t c h , when i n FAST p o s i t i o n , disconnects the i n -t e g r a t o r ' s r e s i s t a n c e network on the NF board f o r a shorted adaptation. UPDATE/LT - toggle s w i t c h , when set i n UPDATE the panel meter i s updated every 0.25s, i n LT p o s i t o n the meter d i s p l a y lamps are t e s t e d and i n the middle p o s i t i o n the d i s p l a y holds the l a s t reading. - 37 -X+Y/X-Y - toggle switch. In the X+Y p o s i t i o n , the sum of the frequencies set by the W1/2W1 and W2/2W2 switches are generated f o r the reference s i g n a l s i n the WA board. In the X-Y p o s i t i o n the d i f f e r e n c e s are generated. METER SWITCH - r o t a r y switch. When set to 5V the meter d i s p l a y s the 5 VDC power supply v o l t a g e . In 15V and -15V p o s i t i o n +15 VDC and -15 VDC power supply voltages are dis p l a y e d . In WS and WC p o s i t i o n the amplitude of the sine and cosine component of the input s i g n a l of the fundamental frequencies are d i s p l a y e d . In FS and FC p o s i t i o n s the amplitude of the sine and cosine component of the input s i g n a l at the frequency set by the X+Y/X-Y, W1/2W1 and W2/2W2 switches are d i s p l a y e d . In NFO p o s i t i o n the instantaneous a m p l i -tude of the output s i g n a l from the NF board i s d i s p l a y e d . And i n IAO p o s i -t i o n the instantaneous amplitude of the output s i g n a l from the IA board i s di s p l a y e d . W1/2W1 - toggle switch. In the Wl p o s i t i o n the fundamental frequency (0.065 Hz) i s used f o r the generation of the reference s i g n a l f o r the WA board. In the 2W1 p o s i t i o n the second harmonic (0.130 Hz) i s used. W2/2W2 - toggle switch. In the W2 p o s i t i o n the fundamental frequency (0.020 Hz) i s used f o r the generation of the reference s i g n a l f o r the WA board. In the 2W2 p o s i t i o n the second harmonic (0.040 Hz) i s used. DVM - BNC connector f o r an a u x i l i a r y voltmeter connected p a r a l l e l w i t h the input of the panel meter. - 38 -START - toggle switch. Used i n the START p o s i t i o n to shorten the amplitude build-up time, as i t takes a f i n i t e time to build-up the amplitude of the o s c i l l a t i o n to i t s f i n a l value. (In START p o s i t i o n the build-up time i s about 15 seconds.) OUT - output BNC terminals w i t h the d r i v e s i g n a l f o r the high voltage programmable power s u p p l i e s . - 39 -o R2 RI A A A / ' W V -ZERO I N R 3 S3 OUT _ MEAS WI FG1 (19 F G 2 (19 V?) FG1 S2 W) FG2 S T A R T F A S T FG1 FG1 F G 1 FG1 2W1 F A S T > 4 D WA S 7 ^ U — © WA I I S 1 0 NF NF " ® I A SI UPDATE PI I A ( X ) 1 10 - ( T ) I A W2 FG1 F G 2 F G 2 F G 2 0 — , @ FG1 j*-OlS) F G 2 F G 2 ( j V ^ i I S5 F G 2 (g)—I | ® FG1 _ ^ 1 « — ( 9 ) FG2 F G 2 2W2 NF NF N F P S (T) " - ^ DVM NF I A V) I A S 8 L T F G 1 ( 3 ) - | X - Y 2 ) WA F G 1 (4V-1 j l S6 ^ 2 $ WA F G 2 X+Y POWER ON PS (17 PS (u)-S l l AC 1 I F i g u r e 2 2 . F r o n t P a n e l U P D A T E DVM O Z E R O 1 G A I N L T F S POWER ON • • • WC F C ME A S 10 1 10 X - Y WS NFO Wl W2 S T A R T o o • • • - 1 5 V • I A O • • • O O F A S T F A S T X+Y 15V 2W1 2W2 + I N - WA N F 5V + OUT -F igure 23. Front Panel SECTION 4 MAINTENANCE AND TROUBLESHOOTING 4.1 INTRODUCTION This s e c t i o n provides maintenance and s e r v i c e i n f o r m a t i o n f o r the non-l i n e a r induced p o l a r i z a t i o n r e c e i v e r . Adjustment procedures and t r o u b l e -shooting i n f o r m a t i o n are a l s o i n c l u d e d . 4.2 TEST EQUIPMENT Test equipment required f o r maintaining and checking the performance of the r e c e i v e r i s l i s t e d below. S i m i l a r t e s t equipment may be s u b s t i t u t e d pro-vided that required c h a r a c t e r i s t i c s are the same as those l i s t e d . D i g i t a l Multimeter, Fluke 8012A, 3-1/2 d i g i t , r e s i s t a n c e range: 20 k and 200 k ; voltage range: 20 VDC. Spectrum Analyzer, NIMBUS 440, frequency range: DC to 20 Hz w i t h r e s o -l u t i o n 0.005 Hz. Frequency Generator, IEC F34, frequency range: 1 kHz w i t h output voltage at l e a s t 1 Vpp. 4.3 MAINTENANCE Maintenance was s i m p l i f i e d to minimize the number of adjustments. Only the input a m p l i f i e r (IA board) and the frequency generators (FG1 and FG2 boards) requ i r e p e r i o d i c checks and adjustments. - 42 -4.4 INPUT AMPLIFIER COMMON-MODE AND DC OFFSET ADJUSTMENT Step 1 - Feed a 1 kHz, 1 Vpp sine wave p a r a l l e l i n t o both r e c e i v e r input terminals and monitor t e s t point 2 (TP2), the A53 a m p l i f i e r output. Set S51 switch to lOx p o s i t i o n and adjus t P51 trimming potentiometer to obtain the minimum TP2 s i g n a l . Set the S51 switch set to l x p o s i t i o n and adjust P52 trimming potentiometer to ob t a i n the minimum TP2 s i g n a l . Step 2 - Short the input terminals and observe a DC l e v e l on t e s t point 2. Adjust the P53 trimming potentiometer to minimum DC l e v e l . Step 3 - Adjust the P54 trimming potentiometer to minimum l e v e l on t e s t point 3. Step 4 - Observe the DC o f f s e t on tes t point 4 at the minimum and maximum gain of the A55 and A56 a m p l i f i e r s . Adjust the P55 trimming poten-tiometer to the minimum average DC o f f s e t . Note: Steps 2, 3 and 4 are not c r i t i c a l , the DC o f f s e t can be as high as se v e r a l hundred m i l l i v o l t s . To determine whether or not the DC o f f s e t should be adjusted, shorten the input terminals and set the S10 meter switch to IAO p o s i t i o n . I f the panel meter d i s p l a y s a decimal point adjust the DC o f f s e t , t h i s way the o f f s e t i s kept at no more than ±200 mV. 4.5 TROUBLESHOOTING The f o l l o w i n g procedure should be used when the r e c e i v e r has f a i l e d and the cause of the f a i l u r e i s unknown. The step-by-step procedure o u t l i n e d , together w i t h the theory of operation as discussed i n Secti o n 3, w i l l a l l o w the operator to determine the mode of f a i l u r e of a l l major components of the re c e i v e r . - 43 -S t a r t w i t h a thorough v i s u a l i n s p e c t i o n , l o o k i n g f o r burned-out or loose components, broken wires or other s i m i l a r c o n d i t i o n s that might suggest a problem. I f no obvious f a u l t i s l o c a t e d , proceed w i t h the e l e c t r i c a l check-out. WARNING: The power supply board, PS board, contains exposed terminals at f u l l l i n e v o l t a g e . Step 1 - Turn power o f f and check the c o n t i n u i t y of the fuse l o c a t e d on the PS board. Step 2 - Remove a l l p r i n t e d c i r c u i t boards from the card f i l e . Remove a l l a u x i l i a r y equipment connected to the f r o n t panel. Step 3 - Plug i n the PS board and turn power on. The d i g i t a l panel meter should be l i t , i f not measure the voltage on t e s t p o i n t 4. This voltage should be +5 VDC ±0.25 V. Observe the voltages on t e s t p o i n t s 2 and 3. They should be +15 VDC ±0.5 V and -15 VDC ±0.5 V wit h the d i f f e r e n c e i n magnitude l e s s than 0.3 V. Step 4 - Turn power o f f and plug i n the FG1 board. Turn power on and sw i t c h the START switch to START p o s i t i o n . Observe the e x p o n e n t i a l l y i n -c r e a s i n g DC l e v e l on t e s t point 2. When a p o s i t i v e or negative maximum i s reached t u r n the START switch o f f . The f o l l o w i n g wave-forms should be observed on the i n d i c a t e d t e s t p o i n t s on the FG1 board. Test point 2 - A s i n e wave w i t h a pe r i o d 15.4 s (65 mHz) ±0.3 s, and an amplitude ±9.5 Vp ±0.5 V. - 44 -Test point 3 - A sine wave with a period 7.7 s (130 mHz) ±0.15 s, and an amplitude ±9.5 Vp ±0.5 V. Test point 4 - A sine wave same as on TP3 wi t h a 90° phase s h i f t . Test point 5 - A c l i p p e d sine wave with a frequency determined by a p o s i t i o n of the W1/2W1 switch (65 or 130 mHz). Test point 6 - The same waveform as on TP5. Step 5 - Turn power o f f and plug i n the FG2 board. Turn power on and switch the START switch to START p o s i t i o n . Observe the e x p o n e n t i a l l y i n c r e a s i n g DC l e v e l on t e s t point 2. When a p o s i t i v e or negative maximum i s reached turn the START switch o f f . The f o l l o w i n g waveforms should be observed on the i n d i c a t e d t e s t p o i n t s on the FG2 board. Test point 2 - A sine wave with a period 50 s (20 mHz) ±1 s, and an amplitude ±9.5 Vp ±0.5 V. Test point 3 - A sine wave with a period 25 s (40 mHz) ±0.5 s, and an amplitude ±9.5 Vp ±0.5 V. Test point 4 - A sine wave same as on TP3 wi t h a 90° phase s h i f t . Test point 5 - A sine wave with an amplitude ±9.5 Vp ±0.5 V and a frequency determined by a p o s i t i o n of W1/2W1 and W2/2W2 switches, see Table I . Switch p o s i t i o n TP5 [mHz] TP6 [mHz] Wl W2 45 85 Wl 2W2 25 105 2W1 2W2 90 170 2W1 W2 110 150 Table I . Reference Frequencies Used In Wave Analyzer - 45 -Note: Observe t e s t p o ints 5 and 6 on the FG1 board. The s i n u s o i d s i g n a l on TP5 on the FG1 board should be the same frequency as the s i g n a l on TP6 on the FG2 board, and the s i n u s o i d s i g n a l on TP6 on the FG1 board should be the same frequency as the s i g n a l on TP5 on the FG2 board. Step 6 - Turn power o f f and plug i n the NF board. Turn power on and t u r n the START switch to START p o s i t i o n f o r approximately 15 seconds. Observe the s i g n a l s on t e s t points 2 and 3, they should be summed si n u s o i d s of fundamental frequencies generated by the FG1 and FG2 board. Connect t e s t point 8 to t e s t point 2 and observe the f o l l o w i n g waveforms: Test point 6 - A waveform with e x p o n e n t i a l l y i n c r e a s i n g amplitude from zero to a constant value w i t h an i n v e r t e d p o l a r i t y i n comparison to TP8. Test point 7 - The same waveform as on TP8 but w i t h e x p o n e n t i a l l y decreasing amplitude to zero ( l e s s than 0.25 Vpp). M31 output - A s i n u s o i d with a p o s i t i v e o f f s e t and an exponen-t i a l l y decreasing amplitude to zero ( l e s s than 0.1 Vpp). A31 output - A DC l e v e l e x p o n e n t i a l l y decreasing from a random value to -10.2 V ±0.2 V. Note: The exponential process, t y p i c a l l y 30 minutes, can be sped up by switching the FAST NF switch to FAST p o s i t i o n . Remove the connection between t e s t p o i n t s 8 and 2, discharge C31 - 46 -c a p a c i t o r (or tu r n power o f f , then on and tu r n START switch on f o r approximately 15 seconds). Connect t e s t p o i n t 8 to t e s t point 3 and observe the f o l l o w i n g waveforms: Test point 5 - The same s i g n a l as on TP6 above. M33 output - A s i m i l a r s i g n a l as on M31 output above. A32 output - The same s i g n a l as on A31 output above. Remove the connection between t e s t points 8 and 3, discharge C32 c a p a c i t o r (or tu r n power o f f , then on and tu r n START switch on f o r approximately 15 seconds). Connect t e s t p o i n t 8 to Y^ input of the M35 m u l t i p l i e r and observe f o l l o w i n g waveforms: Test point 4 - A DC l e v e l e x p o n e n t i a l l y i n c r e a s i n g from zero ( l e s s than 0.1 Vpp) to -2.4 V ±0.1 V. Test point 1 - A DC l e v e l e x p o n e n t i a l l y decreasing from +2.4 V ±0.1 V to zero ( l e s s than 0.1 Vpp). M35 output - A DC l e v e l e x p o n e n t i a l l y decreasing from a p p r o x i -mately ±0.6 V to zero ( l e s s than 0.1 Vpp). A33 output - A DC l e v e l e x p o n e n t i a l l y i n c r e a s i n g from a random l e v e l to -10.0 V ±0.1 V. Remove the connection between t e s t point 8 and Y]_ input of the M35 m u l t i p l i e r . Step 7 - Turn power o f f , remove NF board and plug i n the WA board. Turn power on and switch the START switch to START p o s i t i o n f o r a p p r o x i -mately 15 seconds. Connect t e s t point 6 to p i n 2 and observe the f o l l o w i n g waveforms: - 47 -Test point 2 Test point 3 A sine wave same as on TP6, but i n v e r t e d . The s i n u s o i d as of TP2 with exponentialy decreasing amplitude to zero ( l e s s than 0.2 Vpp). Test point 5 - A s i n u s o i d as on TP6, but w i t h an e x p o n e n t i a l l y i n c r e a s i n g amplitude from zero to a maximum (±9.5 Vp). Test point 6 - A sine wave with an amplitude ±9.5 Vp and a frequen-cy determined by a p o s i t i o n of the W1/2W1 and W2/2W2 switches, see Table I . - A negative o f f s e t sine wave of twice the frequency of the TP6 s i g n a l w i t h an e x p o n e n t i a l l y i n c r e a s i n g amplitude. - A s i n u s o i d w i t h twice the frequency as on TP6 and an ex p o n e n t i a l l y decreasing amplitude to zero ( l e s than 0.2 Vpp). A42 output - A random DC l e v e l l e s s than 0.25 V i n magnitude. M41 output M42 output Remove the connection between t e s t point 6 and 2, discharge C41 c a -c a p a c i t o r (or t u r n power o f f , then on and t u r n START switch on f o r approximately 15 seconds). Connect t e s t p o i n t 2 to p i n 21 and observe the f o l l o w i n g waveforms: Test point 4 - The waveform as on TP5 above. Test point 5 - The waveform as on TP5 above. M41 output - The same as M42 output above. A41 output - The same as A42 output above. M42 output - The same as M41 output above. - 48 -A42 output - The same as A41 output above. Remove the connection between t e s t point 2 and p i n 21. Note: The exponential process can be sped up by s w i t c h i n g the FAST WA switch to FAST p o s i t i o n . Step 8 - Turn power o f f and plug i n the NF and IA board. Turn power on and switch the START switch to START p o s i t i o n f o r approximately 15 seconds. Adjust common-mode r e j e c t i o n and DC o f f s e t as i n s e c t i o n 4.4. Set ZERO/MEAS switch to ZERO p o s i t i o n and observe the f o l l o w i n g waveforms: A51 output - The same as A51 in p u t . A52 output - The same as A52 input. Test point 2 - The same as the A52 output but i n v e r t e d i f the S51 switch i s i n l x p o s i t i o n and lOx l a r g e r i f the S51 switch i s i n lOx p o s i t i o n . Test point 3 - The same as on TP2 but i n v e r t e d . Test point 4 - The same as on TP5 but i n v e r t e d and w i t h an a m p l i -tude set by the gain potentiometer PI on the f r o n t panel. Test point 5 - The same as on TP3 but w i t h an amplitude one or ten times l a r g e r depending on a p o s i t i o n of the gain switch on the fr o n t panel. 4.6 REPAIR AND REPLACEMENT Repair of the r e c e i v e r c o n s i s t of r e p l a c i n g d e f e c t i v e components - 49 -l o c a t e d during t r o u b l e s h o o t i n g . The replacement should be c a r e f u l l y c o n s i -dered as same parts are c r i t i c a l . The i n t e g r a t o r s and the input a m p l i f i e r s A51 and A52 should be BIFET equivalents of 741 o p e r a t i o n a l a m p l i f i e r s . The r e s i s t o r s i n each adder, sub-t r a c t o r and frequency doubler are s e l e c t e d f o r a r a t i o match w i t h i n 0.5%. The c a p a c i t o r s should have low d i e l e c t r i c a b s o r b t i o n and low d i s s i p a t i o n f a c t o r . The o s c i l l a t o r chip (#2) on FG1 board re q u i r e s an a d d i t i o n a l r e s i s t o r R110 ( l o c a t e d on the bottom of the board). The amplitude of the generated s i g n a l decays without t h i s r e s i s t o r . When the o s c i l l a t o r chip i s replaced, i t should be test e d f o r i t s a b i l i t y to r e t a i n constant amplitude without the R110 r e s i s t o r , and i f a r e s i s t o r i s required i t should be of the highest value p o s s i b l e to minimize d i s t o r t i o n of the output waveform. - 50 -SECTION 5 PARTS LIST 5.1 FUNCTION GENERATOR 1 M i l , 12, 13, 14 Analog Devices AD534J m u l t i p l i e r A l l , 12 RCA CA3140S BiMOS o p e r a t i o n a l a m p l i f i e r OSC1 Burr-Brown 4423 p r e c i s i o n quadrature o s c i l l a t o r R l l , 12 R e s i s t o r 150 tt 10% R13, 14, 16, 18, 111, 113 114, 115, 117,118 R e s i s t o r 10k 5% R14 R e s i s t o r s 8k2 + 390 tt 5% R17 R e s i s t o r s 33k + 2k2 II 2k2 5% R19 R e s i s t o r lk 10% R110 R e s i s t o r 360k 10% R l l 2 R e s i s t o r s 10k + 3k3II2k2 5% R116 R e s i s t o r s 10k + 2k2 5% C l l , 12 Capacitor, m e t a l l i z e d polycarbonate 26.2 uF C13, 14 Capacitor, tantalum 10 uF 25 V P H , 12 Bourns 3006Y-1-500 trimming potentiometer 50 tt 5.2 FUNCTION GENERATOR 2 M21, A21, 0SC2 R21, R23, 214 R24 R27 R29 R211 R216 C21, C23, P21, 22, 23, 24 22 22 25, 26, 28, 213 , 215, 217, 218 , 212 22 24 22 Analog Devices AD534J m u l t i p l i e r RCA CA3140S BiMOS o p e r a t i o n a l a m p l i f i e r Burr-Brown 4423 p r e c i s i o n quadrature o s c i l l a t o r R e s i s t o r 47 tt 10% R e s i s t o r 10k 5% Re s i s t o r s 8k2 II 100k 5% Re s i s t o r s 33k + 10kII36k 5% R e s i s t o r l k 10% R e s i s t o r s 10k + lk2 5% R e s i s t o r s 10k + 2k2 5% Capac i t o r , m e t a l l i z e d polycarbonate 26.2 uF Capacitor, tantalum 10 uF 25 V Bourns 3006Y-1-500 trimming potentiometer 50 tt 5.3 NOTCH FILTER M31, 32, 33, 34, 35, 36 Analog Devices AD534J m u l t i p l i e r A31, 32, 33, 34, 35, 36, 37, 38 RCA CA3140S BiMOS o p e r a t i o n a l a m p l i f i e r R31, 35, 39 R e s i s t o r 22k 5% R32, 36, 39 R e s i s t o r 12k 5% R33, 37, 311 R e s i s t o r 1M5 5% R34, 38, 312, 314, - 51 -C31, 32, 33 C34, 35 C a p a c i t o r , m e t a l l i z e d po lycarbonate 16.0 uF C a p a c i t o r , tanta lum 10 uF 25 V 5.4 WAVE ANALYZER M41, 42, 43 , 44 Analog Devices AD534J m u l t i p l i e r A41, 42 , 43 , 44 RCA CA3140S BiMOS o p e r a t i o n a l a m p l i f i e r R41, 46 R e s i s t o r 33k 5% R42, 47 R e s i s t o r l k2 5% R43, 48 R e s i s t o r 1M5 5% R44, 49 , 411, 412 R e s i s t o r 10k 5% R45, 410 R e s i s t o r 22k 5% R413, R e s i s t o r s lOOklllOOk 5% R414, 415, 416, 417 418, 420 R e s i s t o r 100k 5% R419 R e s i s t o r lk 5% R421 R e s i s t o r s 3k3 + 27k 1127k %5 R422 R e s i s t o r 10k + lk 5% C41, 42 , C a p a c i t o r , m e t a l l i z e d po lycarbonate 16.0 uF C43, 44 C a p a c i t o r , tanta lum 10 uF 25 V 5.5 INPUT AMPLIFIER A51, 52, 53, 54, 55, 56 R51, 53, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526 R52, 54, 511, 513, 514, 515, 516 R55, 57 R56 R58 R59 R510 R512 P51, 52 P53, 54, 55 C51 C52, 53 C54 S51 TI TL071C o p e r a t i o n a l a m p l i f i e r R e s i s t o r 10k 5% R e s i s t o r 100k 5% R e s i s t o r 1M5 5% Not ass igned R e s i s t o r s 470k + 270k 5% R e s i s t o r s 10kII l k 5% R e s i s t o r s 22k II l k 5% Not ass igned Bourns 3299W-1-502 tr imming potent iometer 5k Bourns 3299W-1-103 tr imming potent iometer 10k C a p a c i t o r , 0.1 uF C a p a c i t o r , tanta lum 10 pF 25 V C a p a c i t o r , ceramic 300 pF G r a y h i l l 76d01 DPDT DIP sw i tch 5.6 POWER SUPPLY IC61 IC62 Q61, 62 N a t i o n a l Semiconductor LM325N vo l tage r e g u l a t o r Vo l tage r e g u l a t o r 7805, three t e r m i n a l , f i x e d T r a n s i s t o r 2N3055 - 52 -BR61, 62 Varo VM 18 r e c t i f i e r bridge R61, 61 R e s i s t o r s 2.2 ft II 2.7 Q II 6.2 ft 5% 1/2W C61, 62 Capacitor, e l e c t r o l y t i c 100 uF 40 V C63, 64, 68 Capacitor, ceramic 0.01 y.F 50 V C65, 66, 67 Capacitor, e l e c t r o l y t i c 470 uF 16 V F61 Fuse 3/10 A, slow blow 5.7 FRONT PANEL AND CAGE SI JBT JMT-123 switch 52, 7, 10 JBT JMT-226 switch 53, 4, 5, 6 JBT JMT-223 switch 58 JBT JMT-131 switch 59 Centralab PA-2001 r o t a r y switch S l l Armaco SI13 switch PI Centralab JC-105 l i n e a r potentiometer IM TR1 Hammond 166J36 transformer TR2 Hammond 166J8 transformer R71, 72 R e s i s t o r 100k 5% R73 R e s i s t o r l k 5% I n t e r n a t i o n a l M i c r o t r o n i c s A3180030 d i g i t a l panel meter, autoranging ±0.2 V, ±2 V, ±20 V, ±200 V, 3-1/2 d i g i t s - 53 -SECTION 6 EDGE CONNECTORS CONNECTION Frequency Generator 1 Pi n Function P i n Function 1 + 15 VDC A + 15 VDC 2 B 3 s i n (x-y) C 4 s i n (x+y) D 5 E 6 s i n u>it F 7 s i n 2io 2t H • -8 s i n x J 9 s i n y K 10 . L 11 M 12 . GND N GND 13 R 14 cos X 15 s i n y S 16 cos 2o)1t T 17 cos u>it U 18 V 19 s t a r t W s t a r t '20- X 21 Y 22 - 15 VDC Z -15 VDC - 54 -Frequency Generator 2 Pin Function P i n Function 1 + 15 VDC A + 15 VDC 2 • B 3 cos (x-y) C 4 cos (x+y) D 5 E 6 s i n o>2t F 7 s i n 2o>2t H 8 s i n x J 9 cos y K 10 L 11 M 12 GND N GND 13 R 14 cos X P 15 s i n y S 16 cos 2u>2t T 17 cos u)2t U 18 V 19 s t a r t w s t a r t 20 X 21 Y 22 - 15 VDC Z - 15 VDC - 55 -Notch F i l t e r P i n Function P i n Function 1 + 15 VDC . A + 15 VDC 2 B 3 s i n to^t + s i n a>2t C s i n o^t + s i n u)2t 4 D 5 s i n i i ^ t E 6 s i n a>2t F 7 H 8 J 9 output K -10 L 11 M 12 GND N GND 13 f as-t R f a s t 14 WS . P WC 15 S 16 input T 17 cos u>2t U 18 COS OJ^ t V 19 W 20 X 21 Y 22 - 15 VDC Z - 15 VDC - 56 -Wave Ana lyze r P i n Func t i on P i n Func t i on 1 + 15 VDC A + 15 VDC 2 R ( t ) - s i ne component B 3 C 4 D 5 E 6 F 7 H 8 J 9 K 10 L 11 M 12 GND N GND 13 f a s t R f a s t 14 lOx inpu t - not used P 15 lOOx input - not used S 16 lx inpu t T 17 • U 18 V 19 FS W FC 20 - X 21 R ( t ) - cos ine component Y 22 • - 15 VDC Z - 15 VDC - 57 -Input A m p l i f i e r P i n Func t i on P i n Func t i on 1 + 15 VDC A + 15 VDC 2 B 3 C input 4 - D 5 • E 6 F 7 H 8 J 9 K input I 10 L 11 M 12 GND N - GND 13 R 14 P • 15 S 16 • T output 17 ; U v a r i a b l e ga in 18 V step ga in common 19 w lOOx step ga in - not used 20 X • lOx s tep ga in 21 "Y 22 - 15 VDC z - 15 VDC - 58 -Power Supply P i n Function P i n Function 1 + 15 VDC A + 15 VDC 2 B ;3 + 5 VDC C •4 D 5 8 VAC E 6 8 VAC F 7 H .8 18 VAC J :9 18 VAC K 10 L 11 M 12 GND N GND 13 R 14 P 15 110 VAC S 110 VAC 16 T 17 110 VAC U 110 VAC 18 V 19 W 20 X 21 Y 22 - 15 VDC .Z - 15 VDC - 59 -SECTION 7 TESTS 7.1 INTRODUCTION Several t e s t s were conducted to determine the performance of the non-l i n e a r induced p o l a r i z a t i o n r e c e i v e r as a spectrum analyzer and i t s a b i l i t y to recognize intermodulation c o u p l i n g . 7.2 ZERO LEVEL MEASUREMENT The f i r s t t e s t determined the "zero" intermodulation l e v e l s . The r e -c e i v e r i s an analogue instrument and as such i t c o n s i s t s of a c t i v e c i r c u i t devices. These devices are not p e r f e c t l y l i n e a r w i t h o f f s e t voltages and other imperfections causing the adaptive loop to adapt to some l e v e l r e f -l e c t i n g these imperfections even w i t h zero input. The assumption made i s that t h i s random steady s t a t e l e v e l does not vary an appreciable amount from i t s mean value due to temperature and any other e f f e c t s . The same imperfections i n the frequency generator and the r e c e i v e r ' s a m p l i f i e r cause the generation of unwanted intermodulation products. The steady s t a t e c a l l e d the "zero" intermodulation l e v e l s r e f l e c t the sum of these effects.. The measurement of the "zero" l e v e l s was done by s e t t i n g the ZERO/MEAS switch to ZERO p o s i t i o n w i t h the a m p l i f i e r gain adjusted to about twenty. In t h i s s e t t i n g , the sine component of the reference s i g n a l of the notch f i l t e r NF was fed through the R71, R72 and R73 attenuator to the p o s i t i v e input of the a m p l i f i e r w i t h the negative input grounded. A f t e r s u f f i c i e n t adaptation time the notch f i l t e r r e j e c t e d the input s i g n a l and the wave analyzer out-puts l e v e l e d out to a steady s t a t e . The FS and FC values measured represent - 60 -t h e " z e r o " l e v e l s o f t h e i n t e m o d u l a t i o n p r o d u c t s i n t h e i n p u t s i g n a l . T h e r e a d o u t a t e a c h f r e q u e n c y w a s t a k e n a f t e r 4 5 m i n u t e s a d a p t a t i o n t i m e w i t h t h e F S , F C , W S , a n d WC v a l u e s a v e r a g e d o v e r s e v e r a l m i n u t e s a s t h e s e v a l u e s o s c i l l a t e d a r o u n d t h e i r s t e a d y s t a t e l e v e l d u e t o m o d u l a t i o n e f f e c t w i t h i n t h e a d a p t i v e f e e d b a c k c i r c u i t ( G l o v e r , 1 9 7 7 ) . T h e WS a n d WC v a l u e s , T a b l e I I , a r e t h e a m p l i t u d e s o f s i n e a n d c o s i n e c o m p o n e n t s o f t h e i n p u t s i g n a l a t t h e f u n d a m e n t a l f r e q u e n c i e s . T h e F S a n d F C v a l u e s a r e t h e a m p l i t u d e s o f t h e s i n e a n d c o s i n e c o m p o n e n t s o f t h e i n p u t s i g n a l a t f r e -q u e n c i e s s e l e c t e d by t h e f r e q u e n c y s e l e c t s w i t c h e s o n t h e f r o n t p a n e l . 7 . 3 H A L F - W A V E R E C T I F I E D S I N U S O I D T E S T T h e n e x t t e s t w a s d o n e b y p l a c i n g a d i o d e a c r o s s t h e j u n c t i o n o f t h e R 7 1 a n d R 7 2 r e s i s t o r s a n d t h e g r o u n d , F i g . 2 4 . T h e a m p l i f i e r g a i n h a d n o t b e e n c h a n g e d f r o m t h e " z e r o " l e v e l s m e a s u r e m e n t . T h e r e c e i v e r i n p u t s i g n a l r e s e m b l e d a h a l f - w a v e r e c t i f i e d s i n u s o i d , t h e r e f o r e i t i s e x p e c t e d t o d e t e c t o n l y t h e c o s i n e c o m p o n e n t s o f t h e e v e n h a r m o n i c s . T h e r e s u l t s o f t h i s t e s t a r e i n T a b l e I I I . R M S [ V ] i s a r o o t m e a n s q u a r e o f t h e F S a n d F C v a l u e s t o i n c l u d e p o s -s i b l e p h a s e s h i f t a n d RMS[%] i s d e f i n e d a s / ( F S - F S 0 ) 2 + ( F C - F C o ) 2 / / ( W S - W S o ) 2 - K W C - W C 0 ) 2 * 1 0 0 . T h e W S 0 , W C 0 , F S 0 a n d F C Q a r e t h e " z e r o " i n t e r m o d u l a t i o n l e v e l s a s i n T a b l e I I . A s e x p e c t e d t h e c o s i n e c o m p o n e n t o f t h e e v e n h a r m o n i c s w e r e m e a s u r e d . T h e s u m a n d d i f f e r e n c e o f t h e f u n d a m e n t a l f r e q u e n c i e s , w e r e o f t h e h i g h e s t a m p l i t u d e a n d t h e f o u r t h h a r m o n i c s a r e a b o u t f i v e t i m e s s m a l l e r w h i c h c o r -r e s p o n d s t o t h e o r e t i c a l v a l u e s . T h e a m p l i t u d e s o f t h e t h i r d h a r m o n i c s w e r e a l m o s t t h e same a s f o u r t h h a r m o n i c s t h e r e f o r e t h e y s h o u l d be a s s u m e d t o b e r e a l . - 61 -Frequency ws 0[v] wc 0[v] FS 0[V] FC 0[V] RMS 0[V] RMS 0[%] f l + f 2 +8.82 -0.340 -0.064 -0.147 0.160 1.82 f l - f 2 +8.82 -0.347 -0.068 - -0.142 0.157 1.79 2 f i " f 2 +8.79 -0.345 • -0.075 -0.136 0.155 1.79 2 f i + f 2 +8.78 -0.346 -0.068 -0.163 0.177 2.01 2 f L + 2 f 2 +8.77 -0.341 -0.066 -0.154 0.168 1.9 2f! - 2 f 2 +8.76 -0.347 -0.072 -0.134 0.152 1.73 f l - 2 f 2 +8.75 -0.347 -0.065 -0.130 •0.145 1.65 f l + 2 f 2 +8.75 -0.347 -0.069 -0.155 0.170 1.94 Table I I . "Zero" Intermodular;ion Levels (f i =65 mHz, f 2 = 20 mHz) Frequency WS [V] WC [V] FS [V] FC [V] RMSF[V] RMSF[%] f l + f 2 +4.86 -0.580 -0.554 +1.112 1.26 26.0 f l - f 2 +4.82 -0.566 -0.017 -1.40 1.26 26.0 2 f i " f 2 +4.73 -0.540 -0.174 -0.162 0.102 2.1 2 f i + f 2 +4.82 -0.525 +0.021 -0.090 0.115 2.4 2fx + 2 f 2 +4.86 -0.547 -0.099 +0.078 0.234 4.8 2 f i - 2 f 2 +4.78 -0.525 -0.084 +0.116 0.25 5.2 f l ~ 2 f 2 not m< iasured f l + 2 f 2 +4.75 -0.540 -0.001 -0.115 0.081 1 . 7 Table I I I . Half-Wave R e c t i f i e d Sinusoid Test Frequency •WS [V] WC [V] ES [V] FC [V] , RMSF[V] RMSF[%] f l + f2 +7.22 -0.392 -0.058 -0.175 0.029 0.4 f l ~ f 2 +7.18 -0.393 -0.066 - -0.094 0.048 0.66 2 f i " f 2 +7.19 -0.396 -1.32 -0.276 1.253 17.35 2 f i + f 2 +7.19 -0.403 +1.08 +0.037 1.165 16.14 2fl + 2 f 2 +7.22 -0.403 -0.029 -0.143 0.039 0.54 2 f i " 2 f 2 +7.24 -0.401 -0.056 -0.128 0.017 0.24 f l " 2 f 2 +7.22 -0.389 +0.964 -0.094 1.01 14.0 f l + 2 f 2 +7.22 -0.409 +0.98 -0.099 1.05 14.55 Table IV. Square Wave Test - 62 -7.4 SQUARE WAVE TEST The next t e s t was done w i t h a p a i r of diodes placed across the j u n c t i o n of the R71 and R72 r e s i s t o r s and ground f o r a full-wave c l i p p i n g , F i g . 25. The voltage of the r e s i s t o r s j u n c t i o n i s about ± 5 Vp without the DI and D2 diodes. This voltage i s c l i p p e d to approx. ± 0.6 Vp and the s i g n a l approximates a square wave. The r e s u l t s of the t e s t are i n Table IV. The square wave can be expanded to sine or cosine s e r i e s of odd har-monics depending on the o r i g i n . Table IV shows strong sine components of the odd frequencies. The d i f f e r e n c e i n the amplitude of the conjugate even f r e -quencies i s q u i t e l a r g e , more than 50%, t h e r e f o r e the input s i g n a l contains none or i n s i g n i f i c a n t amount of the even frequency components. 7.5 INDUCED POLARIZATION TANK TEST The f o l l o w i n g t e s t s were conducted i n an induced p o l a r i z a t i o n tank. A block of concrete mixed w i t h p y r i t e was used to simulate an "ore body". The tank was then f i l l e d w i t h sand and saturated w i t h water. The c o n f i g u r a t i o n of the e l e c t r o d e s i s shown on F i g . 26. Only one high voltage programmable power supply was used w i t h the gain lowered by i n c r e a s i n g the input r e s i s t a n c e as noted i n each t e s t . The r e c e i -ver's input a m p l i f i e r gain had been decreased by s w i t c h i n g the S51 switch to gain 1 p o s i t i o n . During the f i r s t t e s t the diode on F i g . 26 was removed and the power supply gain decreased by i n s e r t i n g lOOkft r e s i s t o r between the r e -c e i v e r ' s d r i v e output and the power supply's voltage c o n t r o l i n p u t . This y i e l d e d a p o l a r i z a t i o n voltage of ±45 Vp between the current e l e c t r o d e s and a p o l a r i z a t i o n current of ±4.8 mAp being fed through the current e l e c t r o d e s . The r e s u l t s of t h i s t e s t are shown i n Table V. - 63 -No s i g n i f i c a n t intermodulation coupling was found as values of the F o u r i e r c o e f f i c i e n t s are too small to be d i s t i n g u i s h e d . The s i m i l a r i t y of amplitudes at the f i + f 2 and f\ - f 2 frequencies could be the r e s u l t of the intermodulation c o u p l i n g . The amplitude of the f ^ + 2 f 2 frequency shows n o t i c e a b l e coupling but the amplitude of i t s frequency conjugate f\ - 2 f 2 i s l e s s than one h a l f and the other odd frequencies produce no cou p l i n g . The value of the intermodulation coupling at the f^ + 2 f 2 frequency i s ther e f o r e caused by other f a c t o r s . The second t e s t was conducted with the diode placed across the poten-t i a l f i e l d as shown on F i g . 26. In t h i s t e s t the power supply gain was f u r -ther decreased to produce a p o l a r i z i n g voltage of ±24 Vp. The r e s u l t s of t h i s t e s t are shown i n Table VI. In t h i s t e s t the cosine terms of the even frequencies dominate as would be expected. The f\ + f 2 and f^ - f 2 frequencies produced 1% c o u p l i n g . The next higher even harmonics were of very small amplitude, compared w i t h the t e s t i n Table I I I , one tenth smaller and ther e f o r e can not be recognized. However, since t h e i r RMS values were almost i d e n t i c a l , the 2f\ + 2 f 2 and 2fi - 2 f 2 terms were probably r e a l though t h e i r amplitude can only be e s t i -mated. The amplitudes of the conjugate odd harmonics d i f f e r by more than 50% and therefore t h e i r presence can not be a t t r i b u t e d to the interm o d u l a t i o n c o u p l i n g . The previous t e s t s were designed to recognize the interm o d u l a t i o n coup-l i n g s which were c a l c u l a t e d i n terms of the amplitude of the r e c e i v e r ' s i n -put s i g n a l at the fundamental frequencies. Whether the c a l c u l a t e d values were the absolute or r e l a t i v e value i s not known. The f o l l o w i n g test' was de-signed to c a l i b r a t e the non l i n e a r induced p o l a r i z a t i o n r e c e i v e r . - 64 -Frequency WS [V] WC [V] FS [V] FC [V] RMSF[V] RMSF[%] f l + *2 +8.58 -0 .427 -0 .097 -0 .160 0.035 0.34 +8.89 -0 .424 -0 .075 -0 .120 0.021 0.24 2 f l " f2 +8.96 -0 .424 -0 .079 -0 .135 0.004 0.05 2fl + f 2 +8.77 -0.431 -0.067 -0 .157 0.003 0.04 2 f x + 2 f 2 +9.01 -0 .413 -0 .074 -0 .157 0.009 0.1 2 f x - 2 f 2 +9.07 -0 .399 -0 .070 -0 .139 0.005 0.06 f l " 2 f 2 +9.07 -0 .407 -0 .029 -0 .142 0.038 0.43 f l + 2 f 2 +9.02 -0 .410 -0 .014 -0 .143 0.084 0.9 Table V. IP Tank Test Without Diode Frequency f l f l 2 f l 2 f l 2 f i 2 f l f l f l + f 2 - f 2 " f 2 + f 2 + 2 f 2 - 2 f 2 - 2 f 2 + 2 f 2 WS [V] +8.57 +8.57 +8.58 +8.60 +8.61 +8.63 +8.66 +8.67 WC [V] -0 .491 -0 .473 -0 .493 -0 .494 -0.491 -0 .497 -0.501 -0 .503 FS [V] -0.061 -0 .062 -0 .080 -0 .046 -0 .058 -0 .062 -0 .073 -0 .045 FC [V] -0 .232 -0.051 -0 .125 -0 .175 -0 .160 -0 .140 -0 .127 -0 .169 RMSF[V] 0.085 0.081 0.012 0.025 0.010 0.012 0.009 0.028 Table V I . IP Tank Test With Diode 7.6 CALIBRATION TEST The r e c e i v e r ' s input s i g n a l was the sine component of the notch f i l -t e r ' s reference s i g n a l attenuated 20 dB and summed w i t h the cosine wave of the f i - f 2 frequency which was f i r s t attenuated 20 dB and then fed through v a r i a b l e r e s i s t o r Rv f o r f u r t h e r a t t e n u a t i o n , F i g 27. The r e s u l t s of t h i s t e s t are shown i n Table V I I . The top h a l f of Table VII was produced by decreasing the intermodula-t i o n s i g n a l , the bottom h a l f by i n c r e a s i n g the interm o d u l a t i o n s i g n a l to see the e f f e c t of the steady s t a t e e r r o r w i t h adaptation from higher and lower l e v e l s to the steady s t a t e . The f i r s t column contains c o r r e c t e d values of the input intermodulation s i g n a l c a l c u l a t e d by use of the a c t u a l values of the r e s i s t o r s i n the attenuator. The RMSW and RMSF values are the root mean square values of WS, WC and FS, FC correct e d f o r "zero" intermodulation l e -v e l s measured a f t e r the c a l i b r a t i o n t e s t . RMS[%] i s defined as RMSW[V]/RMSF[V] * 100 and e r r o r i s defined as RMSF[ % ] /Input[%] * 100. The c a l i b r a t i o n t e s t showed that the measured values r e f l e c t the con-tent of the input s i g n a l . When the amplitude of the s i g n a l caused by the i n -termodulation coupling was l e s s than 3% of the received s i g n a l at the funda-mental frequencies the e r r o r of the measurement was more than 10%. This was caused by the measured amplitudes being lower than "zero" i n t e r m o d u l a t i o n l e v e l s which were random hence the s i g n a l - t o - n o i s e r a t i o was l e s s than one. As the t e s t was done only once i t i s d i f f i c u l t to make any statement about accuracy of the measurement, but the o v e r a l l e r r o r can be estimated at g e n e r a l l y l e s s than 20%. The mean e r r o r f o r t h i s c a l i b r a t i o n t e s t was 12.9%. - 66 -Input[%] Ri [k f i ] WS [V] WC [V] RMSW[V] FS [V] FC [V] RMSF[V] RMSF[%] Error[%] 9.76 99 +10.05 -0 .407 10.00 -0 .088 +0.922 1.062 10.62 + 8.8 4.9 198 +10.07 -0 .293 10.01 -0 .071 +0.421 0.561 5.60 +14.3 2.95 330 +10.07 -0 .283 10.01 -0 .071 +0.185 0.325 3.25 +10.0 0.98 990 +10.08 -0 .278 10.02 -0 .059 - 0 . 0 2 3 0.117 1.17 +19.4 0.49 1980 +10.08 -0 .276 10.02 -0 .059 -0 .081 0.060 0.59 +26.5 0.27 3560 +10.07 -0 .272 10.01 -0 .068 -0 .116 0.024 0.24 - 1 1 . 0 0.49 1980 +10.07 -0 .263 10.01 -0 .063 -0 .081 0.059 0.59 +20.4 0.98 990 +10.08 -0 .262 10.02 -0 .063 -0 .027 0.113 1.13 +15.3 2.95 330 +10.07 -0 .271 10.01 -0 .084 +0.174 0.314 3.14 + 6.4 4.9 198 +10.07 -0 .264 10.01 -0 .090 +0.387 0.527 5.26 + 7.4 9.76 99 +10.07 -0 .252 10.01 -0 .116 +0.911 1.051 10.50 + 7.6 Table V I I . C a l i b r a t i o n Test R71 R72 - A / W • W V -I F igu re 24. Half-Wave R e c t i f i e d S inuso id Test R71 R72 -AyW 9 9 V \ A r Dl ^ ^ D2 F igu re 25. Square Wave Test F igu re 26. E l e c t r o d e ' s C o n f i g u r a t i o n For IP Tank Tes t , a = 23 cm 984 kfi s i n u>\ + s i n 0)2 vV^ 98.3 kfi Rv cos (0)1-0)2) V A 4 > — W V -981 fi 9.87 kfi - A A A / to r e c e i v e r F i gu re 27. C a l i b r a t i o n Test - 68 -SECTION 8 FIELD MEASUREMENT 8.1 WARNING Use extreme c a u t i o n du r ing measurements. Turn both h igh v o l t a g e programmable power s u p p l i e s OFF when hand l i ng the cur ren t e l ec t r odes and t h e i r supply conductors as they ca r r y dangerously h igh v o l t a g e s . 8.2 MEASUREMENT Step 1 - Turn the r e c e i v e r on , set the ZERO/MEAS sw i t ch to ZERO p o s i t i o n , set the meter sw i t ch to IAO p o s i t i o n , t u rn the START sw i t ch on , se t the input a m p l i f i e r board sw i t ch to ga in 1 and the s tep ga in sw i t ch on the f r o n t pane l to ga in 10 and the v a r i a b l e ga in to two. Wait u n t i l the IAO vo l tage reaches the maximum and then ad jus t the v a r i -ab le ga in f o r an IAO vo l tage of approx imate ly +12.5 or - 1 2 . 5 v o l t s . Turn the START sw i tch o f f , the IAO vo l tage should o s c i l l a t e between ±10 v o l t s . Set the meter sw i t ch to WS and ho ld the FAST NF sw i t ch i n FAST p o s i t i o n u n t i l WS reaches approx imate ly +9.0 or - 9 . 0 v o l t s . Step 2 - Wait 30 minutes , take FS and FC r e a d i n g s . As these va lues o s c i l -l a t e , take s e v e r a l read ings and average. Repeat every 30 minutes f o r each f requency , the recorded va lues are the " z e r o " i n te rmodu la t i on l e v e l s . Step 3 - P lace the copper cur ren t e l e c t r o d e s and porous-pot p o t e n t i a l e l e c -t rodes to form a Schlumberger a r ray w i th na = 4 m and a = 1 m, c o n -nect the cu r ren t e l e c t r o d e s to the output t e rm ina l s of the h igh vo l tage programmable power s u p p l i e s , p lace the jumper w i re between the common (ground) t e rm ina l s of the power s u p p l i e s and connect the - 69 -d r i v e s i g n a l s from the r e c e i v e r to the power s u p p l i e s . Connect the porous-pot e l e c t r o d e s to the inpu t t e r m i n a l s . Turn the power s u p p l i e s on. Step 4 - Set ZERO/MEAS sw i t ch to MEAS p o s i t i o n , set the meter sw i t ch to IAO p o s i t i o n , ad-just the ga in of the inpu t a m p l i f i e r f o r the IAO vo l t age to o s c i l l a t e between ± 9 v o l t s . As the peak vo l t ages occur on ly every »12.5 minutes the output s i g n a l should be monitored f o r s e v e r a l minutes . Step 5 - Swi tch the FAST NF sw i t ch to FAST p o s i t i o n and moni tor WS v o l t a g e . When t h i s vo l t age o s c i l l a t e s around some constant va lue r e l e a s e the FAST NF s w i t c h . The WS vo l tage should be around ±9 v o l t s , ad jus t the ga in i f necessary . Step 6 - Wait 30 minutes . Read the WS, WC, F S , and FC va lues averaged over s e v e r a l minutes . Repeat every 30 minutes f o r each of the e igh t f i x e d f r e q u e n c i e s . The FS and FC va lues at the f^ + 2 f 2 f requency o s c i l l a t e e x t e n s i v e l y and may be ommited. Step 7 - Subt rac t the " z e r o " i n te rmodu la t i on l e v e l s from the measured FS and FC v a l u e s . C a l c u l a t e root mean square va lues of WS, WC and F S , FC va lues at each f requency. C a l c u l a t e content of the i n te rmodu la t i on products i n the input s i g n a l . - 70 -SECTION 9 CONCLUSIONS An induced p o l a r i z a t i o n r e c e i v e r employing the analogue adap t i ve no tch f i l t e r s capable of d e t e c t i n g the i n te rmodu la t i on coup l i ng caused by the e l e c t r i c a l n o n l i n e a r i t i e s i n the ground was designed and c o n s t r u c t e d . The r e c e i v e r f u n c t i o n s as a spectrum ana l yze r measuring the s i ne and cos ine components of the i n te rmodu la t i on products at e igh t f requenc ies generated by the sums and d i f f e r e n c e s of the two fundamental f requenc ies and t h e i r second harmonics. The r e c e i v e r was c a l i b r a t e d to es t imate the accuracy of the measure-ments. The i n te rmodu la t i on s i g n a l w i t h ampl i tudes between 0.25% and 10% of the s i g n a l at fundamental f r equenc ies was fed to the r e c e i v e r . The minimal s i g n a l was measured w i t h 11% e r r o r but dur ing the f i e l d measurements an e r r o r up to 20% can be expec ted . The s i g n a l w i t h lower ampl i tudes can be recogn ized by comparing the ampl i tudes a t the conjugate f r equenc ies as t h e i r ampl i tudes can be on ly es t imated due to e r r o r caused by dec reas ing s i g n a l -t o - n o i s e r a t i o . The s i g n a l s t r ansm i t t ed and rece i ved by the r e c e i v e r are of very low f r e q u e n c i e s . Adapt ive f i l t e r s w i t h a very narrow bandwith and very long adap ta t i on t ime are r e q u i r e d , hence the measurement t ime may extend over s i x to e igh t hours . In view of p o s s i b l e e r r o r s , repeated measurements are not p r a c t i c a l . The a d d i t i o n of a second wave ana l yze r board would a l l o w the measurement of the ampl i tudes of the conjugate f requency components at the same time r e s u l t i n g i n h a l v i n g the measurement t ime. - 71 -The other p o s s i b i l i t y would be the use of a d i g i t a l system which would not r equ i r e the " z e r o " i n te rmodu la t i on l e v e l s measurement. The components a t a l l e igh t f requenc ies would be c a l c u l a t e d at the same time thus dec reas ing the measurement t ime to one hour thereby e l i m i n a t i n g two major drawbacks of the analogue r e c e i v e r . The system cou ld c o n s i s t of a m ic roprocessor i n c o n -j u n c t i o n w i t h a m u l t i p l i e r ch ip or a c a l c u l a t o r ch ip used as the m u l t i p l i e r and us ing F o u r i e r t rans fo rm or the d i g i t a l adap t i ve f i l t e r i n g to eva lua te F o u r i e r c o e f f i c i e n t s . The r e c e i v e r can be used w i t h some hardware m o d i f i c a t i o n s f o r measuring m u l t i p l e f requency induced p o l a r i z a t i o n e f f e c t s . The phase angle measure-ments can be done as suggested i n S e c t i o n 2. The d i g i t a l r e c e i v e r cou ld be programmed to perform s e v e r a l f u n c t i o n s s imu l t aneous l y . - 72 -BIBLIOGRAPHY Compton, R . T . , "An Exper imenta l Four-Element Adapt ive A r r a y " , IEEE Trans , v o l . AP-24 , no. 5 , pp. 697-706, Sep. 1976. G l o v e r , J . R . , "Adapt ive Noise C a n c e l l i n g A p p l i e d to S i n u s o i d a l I n t e r f e r e n c i e s " , IEEE T r a n s . , v o l . ASSP-25, no . 6, pp .484-491 , D e c 1977. Ka tsube , T . J . , Ahern , R .H . and C o l l e t t , L . S . , " E l e c t r i c a l Non l inear Phenomena i n R o c k s " , Geophys ics , v o l 38, pp 106-124, 1973. M i t c h e l l , G . G . , "The Search f o r In te rmodu la t ion Coup l ing i n the Ground" , M.Sc. t h e s i s , U n i v e r s i t y of B r i t i s h Columbia, 1978. She ingo ld , D . H . , E d . , " M u l t i p l i e r A p p l i c a t i o n G u i d e " , Analog Devices I n c . , P .O. Box 796, Norwood MA 02062, 1978. Sumner, J . S . , " P r i n c i p l e s of Induced P o l a r i z a t i o n f o r Geophys ica l E x p l o r a t i o n " , E l s e v i e r S c i e n t i f i c P u b l i s h i n g Company, Amsterdam, 1976. Widrow, B. et a l . , "Adapt ive Noise C a n c e l l i n g : P r i n c i p l e s and A p p l i c a t i o n s " , P roc . IEEE, v o l 63, no. 12, pp 1692-1716, Dec 1975. - 73 -Appendix A A . l FREQUENCY DOUBLERS The f requency doublers employ the t r i gonome t r i c i d e n t i t i e s 2 s i n tot cos tot = s i n 2tot (39) 2 2 cos tot - s i n tot = cos 2tot (40) The m u l t i p i e r ' s t r a n s f e r f u n c t i o n i s Z i - Z 2 = ( X i - X 2 ) ( Y i - Y 2 ) (41) assuming un i t ampl i tude s i n u s o i d s . Thus f o r the s i ne doubler X : = s i n tot Y1 = cos tot Zx = 1/2 E 0 (42) X 2 = 0 Y 2 = 0 Z 2 = 0 S u b s t i t u t i n g these parameters i n t o equat ion 41 E Q = 2 s i n tot cos tot = s i n 2tot (43) The diagram i n F igure 28 dep i c t s equat ion 43 e x a c t l y . - 74 -For the cos ine doubler X ! = cos cot Y i = X 2 Z i = 1/4 E 0 (44) X 2 = c o s " * + s i n ^ Y 2 - 0 Z 2 = 0 S u b s t i t u t i n g these parameters i n t o equat ion 41 2 2 EQ = cos cot - s i n u>t = cos 2cot (45) The diagram i n F igu re 29 d e p i c t s equat ion 45 e x a c t l y . A .2 INTERMODULATION PRODUCT GENERATOR These c i r c u i t s generate quadrature s i n u s o i d s of the sum and d i f f e r e n c e f requenc ies and employ d i r e c t l y the f o l l o w i n g t r i gonome t r i c i d e n t i t i e s s i n ( x + y ) = s i n x cos y + s i n y cos x (46) s i n (x - y) = s i n x cos y - s i n y cos x (47) and cos ( x + y ) = cos x cos y - s i n x s i n y (48) cos (x - y) = cos x cos y + s i n x s i n y (49) The products i n the above equat ions are generated by the m u l t i p l i e r s and fed through the summing and d i f f e r e n c e a m p l i f i e r s to form the sum and d i f f e r e n c e f requency quadrature s i g n a l s (F igu re 30) . s i n cot s i n 2cot F i g u r e 2 8 . S i n e D o u b l e r c o s cot R R — W V -s m cot X I X 2 0 Z l Y l Z2 Y 2 c o s 2cot 3R R F i g u r e 2 9 . C o s i n e D o u b l e r s i n x c o s x Sin, y X I X 2 0 Z l Y l Z2 Y 2 C O S X c o s y « X I -X 2 0 Z l Y l Z2 Y 2 s i n ( x - y ) c o s ( x + y ) s i n ( x + y ) c o s ( x - y ) F i g u r e 3 0 . I n t e r m o d u l a t i o n F r e q u e n c y G e n e r a t o r F i g u r e 3 1 . L o s s y I n t e g r a t o r - 76 -APENDIX B B . l LOSSY INTEGRATOR Cons ider the i n t e g r a t o r (F igure 31) w i t h the feedback impedance Ro X f = — — t— . The t r a n s f e r f u n c t i o n of t h i s i n t e g r a t o r i s g i ven as r I+R2C2S H(s) = | (50) l+( 1+A) (—UR 1C 2S) R 2 and assuming the o p e r a t i o n a l a m p l i f i e r ga in to be i n f i n i t e , then H(s) ^ (51) J L + R 1 C 2 s Thus f o r R 1 C 2 S « 1 , equat ion 45 i s reduced to - — and the c i r c u i t R_2 operates as an i n v e r t i n g a m p l i f i e r . For R 1 C 2 s » l , equat ion 45 i s reduced to 1 and the c i r c u i t ac t s as an i d e a l i n t e g r a t o r . R 1C2S Let R i = R2 and —U = u>0, then H ( s ) = ^ _ (52) s + u>0 which i s the t r a n s f e r f u n c t i o n of a f i r s t order RC f i l t e r . Thus the l o s s y i n t e g r a t o r performs as the f i r s t order RC f i l t e r . - 77 -Appendix C C . l DEVICE SPECIFICATIONS On the f o l l o w i n g pages are cop ies of manu fac tu re r ' s data sheets cover ing some of the components used i n the r e c e i v e r . These are presented to a i d i n s e r v i c i n g , maintenance and t r o u b l e s h o o t i n g . The data sheets are a l s o u s e f u l i n case a s i m i l a r component must be obta ined i n an emergency. LEAVES 79-105 HOT FILMED PREVIOUSLY COPYRIGHTED MATERIAL - 78 -LINEAR TYPES TL071, TL071A, TL071B, TL072. TL072A. TL072B, INTEGRATED TL074, TL074A, TL074B, TL075, TL075A. TL075B CIRCUITS LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS 24 DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES • Low Noise ... V n * 18 nV/VrTi Typ • Low Harmonic Distortion . .. 0.01% Typ • Wide Common-Mode and Differential Voltage Ranges • Low Input Bias and Offset Currents • Output Short-Circuit Protection • High Input Impedance ... JFET-lnput Stage • Internal Frequency Compensation • Low Power Consumption • Latch Up Free Operation • High Slew Rate ... 13 V/pi Typ description lhe JFET-inpul operational amplifier! of thfl TL071 sci ies are designed si Jow-nuise versions of theTL081 series amplifiers with lower input bias current, oflset cutient, and otlttit voltage. The low harmonic dis-i on ion and low noise make the TL071 series idujlly suited as amplifiers (or hiuh-fidelity and audio pie-amplifier application!. Each 'amplifier features JFE1 inputs (tor high input impedance) couplod with bipolar output stages all integrated on a single monolithic chip. Device types with an " M " suffix are characterized for operation over the full military temperature range of -55°C to 125°C, those with an "I" suffix are characterized for operation from -25°C to 65 C, and those with a " C " suffix are characterized for operation from 0"C to 70°C. TL07I, TL071A,TL071B JO OR I* DUAL-IN LtNL L PLUG IN PACK AO E PACKAGE ITOP VILWl (TOP VIEW) PIN 4 IS IN I L I C T K I C A L C O N T A C T WITH THE C A S l TL072. TL072A.TL072B JO OR P DUAL-INLINE L PLUG-IN PACKAGE PACKAGE (TOP VIEW) ITOP VIEW) Mitrvl sis* f j ^ " ^ ^ ^ , ouimi PIN 4 IS IN E L E C T R I C A L C O N T A C T WITH THE C A S t TL074, TL074A, TL074B J OR N DUAL-INLINE PACKAGE (TOP VIEW) TL076. TL076A,TL076U JOHN DUAL-IN-LINE PACKAGE (TOP VIEWI ' l l J I i l l i J t i rLi t t i^ C - 79 -TYPES TL071. TL071A. TL071B, TL072, TL072A. TL072B. TL074, TL074A, TL074B, TL075. TL075A. TL075B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS electrical characteristics, VQCI " 115 V PARAMETER TEST CONDITIONS 1 TL07-M TL07_AM TL07_I . T L 0 7 - C T L 0 7 _ A C TL07_BC UNIT MIN T V P MAX MIN TVP MAX MIN TVP MAX V i O Input O I I M I vol lay* R$ - t>0 a . T A - n-c II. '72. '74. 7b 3 6 3 6 3 10 *7IA. *72A.'74A, *7bA 2 3 3 6 '71B. '72B.'74B. '7bB 2 3 « s ' '71.'72. '74. '7b 9 B 13 mV '7IA. "72A. '74A. "7bA b 7 b '7IB. '720. '74B. '7bB b TamtKxatuia loaMx-tnt "VIO ol >nt<u 1 o i l Ml vullaga RS - M i l . T A " I1.ll1.n9i 1 0 1 0 10 l|Q Input o l l w i (.uttvnit T A - 2s"c •71. 72. 74. 7b b bO 5 bO b bO pA •71A. *72A. '74A.'7bA b 60 b bO '71B. *72u.-74B.'7bB b bO T A * ' u " ••nga •71. *72. *74. '7b 20 10 2 "71 A. '72A. *74A. '7bA 20 2 nA *71B.'726.'74B.'7bB 2 l|g Input but c u " t n t 1 T * - 3b"C "71. *72, *74. *76 30 200 30 200 30 200 P A '71A. -72A, '74A. '7bA 30 2O0 30 200 7IB. 72B. '74B. '75B 30 200 T A » lull range '71. '72. *74. -.7b bO 20 7 nA "71A. '72A. '74A. '75A bO 7 "71B. *72B. '740, '7bB 7 Common m o l * input v o l f a n e * T A - 2b" C 71. 72.'74. 7b 112 112 110 V '71A,'72A.'74A.'7bA 112 112 •71B, '72B. -74B. '7bB • 12 Mimmom pt«ktopttk V O P P ' Output vollafla twing 1 A - 2 5 - C H L - 10 kn 24 27 24 27 24 27 V T A - full ranoa H|_ > 10 kll 24 24 24 H L > 2 kll 20 24 20 34 20 24 L*«tr**>anal dillaianltal V P vol lay* amplication H L > 2 k l l . V Q - I 10V, T A • 3b ' c •71. '72. '74. '7b bO 200 bO 300 2b 700 V/mV •7IA. '72A, '74A. '7bA bO 200 bO 200 '7IB.'72B.'74U.'7bB 60 200 H L > 7 kll. v 0 • • 10V, 1 A - lull '71. '72. '74. '76 2b 7b lb '7IA, '72A. '74A. '7bA 2b 2b '7111. '7211. '74U.'7bB 7b B | Umly Hdin tiantlvvtUlh l A - 7b' C 3 3 3 MHi i , Input ( m i l M H t 1 A - 35" C 10'2 1 0 " 1 0 1 2 11 Common-iDOdi raj act ion CMRR 71. 72.'74. 76 BO BB BO 86 70 76 dB P15 ^ 10 k l l , T A " 2b"C 7IA.'72A.'74A.'7bA BO B6 80 B6 : 710, '72B. '74B. '7bB BO 86 Supply vOllaga lajaciion k S V H i . i . o U V c C t ' - 1 v , 0 > 71. 77. '74. '7b BO 86 80 BS 70 76 dB HJJ < 10 kl). 7IA.'72A/74A.'7bA SO BC 80 B6 T A " 3b c 71B. '77U. '74B. '7bB BO 80 Supply cu'ianl C C ((>•> •mplil .Ml No ly«1. No ligful. T A - 2 5 - C • 1.4 2.6 14 2 6 1.4 aV mA V 0 l ' V 0 J Channal wpaf»lion A V D - 100. T A • 2b'C | 120 120 170 dB ' A i l miKdi'iinci mm tpaciliad unoti opan-loop tondii'Oni unlit* oihaiwlM noiad. Full imngm lo» T A •» -bfe*C IO 176 C iot T L 0 7 _ M » n d T L O J . A M . -24* C to aa'C Io* T L Q 7 _ l : a « d 0*C 10 70*C lot T L 0 7 _ C . T L 0 7 _ A C , and T L 0 7 _ B C . t lnpui »>••• t t » i * n i i o l a FET-mpul ova-rational amplit.ar *>a normal function r*>ai*a cur'anli . w h k h »>• lampaiaiura •antillira. *ur»a • •chniu.ua* muti ua uHttt thai will n i i i i t ian ttta Jootlion lamparaiura a* Cloaa IO ina ambianl lampai alura a* l« po**ibla. TYPES TL071. TL071A, TL071B. TL072, TL072A, TL072B, TL074. TL074A, TL074B. TL075. TL075A, TL075B, LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS schematic (each amplifier) P1A.V1.NO I M l l DC RAT IMO FACTOR • 1 mmtC absolute maximum ratings over operating free-air temperature range (unless otherwise noted) •rc 4 r c nc N'C M'C TL07-M TL07_AM TL07 - I TL07.C TL07_AC TL07.BC UNIT Supply vollaea. V c c * lM« Not* 1) 18 18 18 V Supply .oliaga. V c c - laaa Nota 11 — IB — I B -18 V Ditlaianiial inpul voliaga (.aa N o n 21 130 • 30 • 30 V Input vollag* IM* NOW 1 and 31 116 • 15 • 16 V niiiaitnn ol output ih o i l ciicuil liaa Nol* 41 Unlimitad Unlimitad Unlimitad Conlinuoul total diuipalion •• lor balow) 2 5 C lia*-air J, JG.N, or P Packaga 680 680 680 mrV tamparaiuia lt*a NOIB 61 L Packaga 626 625 626 Opaiaimg I'aa air tampaiatura ranga -66 to 126 -26 to 85 0 to 70 "C SIIUM tamriaiaiuia lano* -66 10 160 -65 to 160 -65 to 150 "c Laad lampaialuia 1/10 inch liom cata lot 60 tacond* J, JG, or L Packaga 300 300 300 •c La.d tampa'aiui. 1/16 Inch liom cm lot 10 aaconth N or P Packag* 260 •200 260 •c KOTfS: 1. All .o l i .g . . . I u « , a.c.pt dlltarant..! .oll.ga*. « • with . . . p - d to tn . » o ralaranc. (ground! ot t h . .upply . o i l . . . . " h a -tha lero retatanca laval It tha midpoint batw.cn V c c . and V c c _ . 2 DHI.i.nil.l » o l i . g « . ' a al lha nonln.atling Input tarminal wilt, laapacl to Ih* In.artlng Input taimlnal. 1 T h . magnliud. ol tha Input .o l i .g . mu.i n*».r . . c .ad th. m.gnltud. ol Ih. .upply .o l i . g . or 15 »ol». w h i c h — , U la... 4. T h . outpui ma, b . .hort.d to ground or 10 aitha, .upply. T .mp.r . iur . and/or .upply . o l t . g - mu.i b. limlt.d to an.u.a that Ih. di»»tp«lion rating It nol a-ca*d*d. 6. Fo. o»>r*l ion .bov. 2t'C l<—»\r l imp t i i i u i * , IO Olutpallen D a i « l i n B T •*><•. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slaw rata at unity gain V| - 10 V. C L • lOOpF. R L - 2 k l l . * V P - ' 13 V/pl 1, RIM tim* V| • 20 mV. RL • 2 kO. 0.1 PI Ovarihool lactor C L • lOOpF. A v D " 1 101. IB nV/^/Hi v„ EquWalanl input noiM vollaga Rs • toon 1 • 10 H i to 10 kHi 4 . HY l„ Equivalent inpul noita currant Rs - ioo n. I - 1 kHi 0.01 PA/V/HT TMD Total harmonic ditlotliOn V o l . n » l " l > v -R L » J kn. RS < 1 k(l, 1 - 10 kHi o.oik - 81 -Solid State Division Linear Integrated Circuits Monolithic Silicon CA3140B, CA3140A, CA3140 Types U") CD All Types B-Lud TO-5 With Dual-ln-Li Formed Leads -DIL-CAN" (S Suffix) H-1787 All Types 8-Lead TO-5 (T Suffix) BiMOS Operational Amplifiers With MOS/FET Input, Bipolar Output Features: • MOS/FET Input Stage (a) Very high input impedance (Zifj) — 1-5 TO. typ. (b) Very low input current — 10 pA typ. at ± 15 V (c) Low input-offset voltage (V|Q) — to 2 mV max. (d) Wide common-mode input-voltage range (VICR) — can be swung 0.5 volt below negative supply-voltage rail (e) Output swing complements input common-mode range (f) Rugged input stage — bipolar diode protected • Directly replaces industry type 741 in most applications The CA3140B, CA3140A, and CA3140 are integrated-circuit operational amplifiers that combine the advantages of high-voltage PM0S transistors with high-voltage bipolar tran-sistors on a single monolithic chip. Because of this unique combination of technologies, this device can now provide designers, for the first time, with the special performance features of the CA3130 C0S/M0S opera-tional amplifiers and the versatility of the 741 series of industry-standard operational amplifiers. TheCA3140,CA3140A,and CA3140 BiMOS operational amplifiers feature gate-protected • MOS/FET (PMOS) transistors in the input circuit to provide very-high-input impedance, very-low-input current, and high-speed per-formance. The CA3140B operates at supply voltages from 4 to 44 volts; the CA314QA and CA3140 from 4 to 36 volts (either single or dual supply). These operational amplifiers are internally phase-compensated to achieve stable operation in unity-gain follower oper-ation, and, additionally, have access termi-nals for a supplementary external capacitor if additional frequency roll-off is desired. Terminals are also provided for use in appli-cations requiring input offset-voltage nulling. The use of PMOS field-effect transistors in the input stage results in common-mode in-put-voltage capability down to 0.5 volt below the negative-supply terminal, an important attribute for single-supply applications. The output stage uses bipolar transistors and in-cludes built-in protection against damage from load-terminal short-circuiting to either supply-rail or to ground. The CA3140 Series has the same 8-lead termi-nal pin-out used for the "741" and other^  • Includes numerous industry operational amplifier categories.such as general-pur-pose, FET input, wideband (high slew rate) • Operation from 4-to-44 volts Single or Dual supplies • Internally compensated • Characterized for ± 15-volt operation and for TTL supply systems with operation down to 4 volts • Wide bandwidth — 4.5 MHz unity : gain at ± 15 V or 30 V; 3.7 MHz at 5 V • High voltage-follower slew rate - 9 V/us • Fast settling time — 1.4 us typ. to 10 mV with a 10-Vp.p signal • Output swings to within 0.2 volt of negative supply ^ • Strobable output stage - . Applications: • Ground-referenced single-supply amplifiers in automobile and portable instrumentation • Sample and hold amplifiers • Long-duration timers/multivibrators (microseconds—minutes—hours) • Photocurrent instrumentation • Peak detectors • Active filters • Comparators • Interface in 5 V TTL systems & other low-supply voltage systems • All standard operational amplifier applications • Function generators • Tone controls • Power supplies • Portable instruments • Intrusion alarm systems 2 to .8 2 t o 2 to •fe. O to o i T r a o ^ n w k l i ) RepiHired ^ MM remit) Regittr*d*(s) Information turnnhtd Dy RCA n b*lajvtd to be K t u r a t i and if imblr Hcnwffvtf. no rtsporn.bi.ity h auurntd by RCA for - i l l UM, nor lot any tnUtrtftrntnit ol pattnii or Olhoi i»jh i i of t h u d p v t a n w h « h may m u l l f r om i t i uu. No Ircanu d panted by MD pi-cation ot oihtnvru undat any pattni M patent liohlt ol RCA. Printed in USA/3-77 Supersedes issue dated 5-76 - 82 -File No. 957 CA3140B, CA3140A, CA3140 industrystandard operational amplifiers. They operation at supply voltages ranging from 4 are supplied in either the standard 8-lead .',.«> 4 4 voltt, for applications requiring pre-TO-5 style package (T suffix),or in the 8- 'mium-grade specifications and with electrical lead dual-in-line formed-lead TO-6 style pack- : limits established for operations over the age "DIL-CAN" (S suffix). The CA3140 l i ^ . - range from-55°C to-M25°C. The CA3140A available in chip form (H suffix). The' and CA3140 are for operation at supply volt-:CA3140A and CA3140 are aisoavallable In T C»9»« "P to 36 volts (±18 volts). The CA3140 an 8-lead dual-In-line plastic package (Mini-...., ages up to 36 volts (±18 volts). All types can DIP-E suffix). The CA3140B Is Intended for' ' v'' be operated safely over the temperature range .-' ;. .;.'<•[. •-: • ., from -56°C to + 125°C. • T Y P I C A L E L E C T R I C A L C H A R A C T E R I S T I C S • . C H A R A C J E R , S T I ? s : . . . . -•'V';-^ ;•• • TE8T 'CONDITIONS /..v.v*,« ••» v . ' , ' ! v - ' - ; - 15V , : .•~TA-26°C CA3140B (T.S) CA3140A (TAE) CA3140 (T.S.E) UNITS Input Offset Voltage ••'' . Adjustment Resistor ' \'" Typ.Value ol Re-sistor Between Term. 4 and 6 or 4 and 1 to Adjust ' Max.Vio 43 18 4.7 kfl Input Resistance R, • .•5>a-.' , 1.5 1.5 1.5 TO Input Capacitance "C| . 4 ' • 4 4 pF Output Resistance Ro ! i ,f • 1 ' • • " ' • 60 60 .60 - n Equivalent Wideband . Input Noise Voltage Y f e e n. (See Fig. 39) •• ... BW«'l40kHi RS-1 Mi. •: 48'j , .. 48 ' ' 48 Equivalent Input Noise Voltage (SeeFig.lO) . •" • =• «n f - ' l kHi Rs- 40 40 40 nVA/RT f-10 kHz loon 12 12 12 Short-Circuit Current to Opposite Supply Source IQM* . .' ... ; • .~t 40 "" 40 40 mA Sink IQM- . 18 18 18 mA Gain-Bandwidth °> • Product. (See Figs. 5 &I8) fT 4.5 4.6 4.5 . MHz Slew Rate. (See Fig.6) ' "' SR • ' • ' " 1 1 " - . . 9 9 9 • V/p's Sink Current From Terminal 8 To Terminal 4 to Swing Output Low :~ • vi . 220 220 220 HA Transient Response: Rise Time R L - 2 M i C L-100pF " 0.08 0.08 0.08 Ul Overshoot (See Fig. 37) ' V 10 10 10 % Settling Time ai 10Vp.p< (See Fig. 17) 1 mV • t, R L » 2 «l CL-100pF Voltage Follower 4.5 4.5 4.5 10 mV 1.4 1.4 1.4 * . <~ . • •-2-V - 83 -CA3140B, CA3140A, CA3140 File No. 957 ELECTRICAL CHARACTERISTICS FOR EQUIPMENT DESIGN At V* - 15 V, V - " 15 V, T A - 25°C Unlets Otherwise Specified L I M I T S UNITS C H A R A C T E R I S T I C CA3140B CA3140A CA3140 Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Input Oflset Voltage. |V|o| - 0.8 2 - 2 5 - 5 15 mV Input Oflset Current. |hol - 0.5 10 - 0.5 20 - 0.5 30 pA Input Current, l| - 10 30 - 10 40 10 50 pA Large-Signal 50k 100k - 20k 100k - 20k 100 k - V/V Voltage Gain, A O L * ' (See Figs. 4.1BI 94 100 - 86 100 - 86 100 - dB Common-Mode Rejection Ratio. CMRR (See Fig 9) _ 20 50 - 32 320 - 32 320 uV/V 86 94 - 70 90 - 70 90 - dB Common-Mode Input-Voltage Range. V|CB (See Fig.20) -15 -15.5 to • 12.5 12 -15 -15.5 to • 12.5 12 -15 -15.5 to • 12.5 11 V Power-Supply Rejection AV|0/AV _ 32 100 100 150 - 100 150 uV/V Ratio, PSRR (See Fig 11) 80 90 - 76 80 76 80 - dB Max. Output Voltage" V O M + • 12 13 _ • 12 13 + 12 13 V (See Figs.13.20) V o M - -14 -14.4 - -14 -14.4 - -14 -14.4 -Supply Current, l + (See Fig.7 ) - 4 . 6 -, * 6 - 4 6 mA Device Dissipation. Prj - 120 180 - 120 180 - 120 180 mW Input Current, Ii* (SeeFig.19) - 10 30 - ; 10 - - 10 — nA Input Offset Voltage I V ^ * 1.3 3 3 - - 10 mV Input Offset Voltage Temp. Drift, AV | 0 /AT '• - 5 -. 6 - 8 - uV / *C Large-Signal Voltage Gain, A O L A (See Figs.4,18) 20k 100 k _ 100 k _ _ 100k - V/V 86 100 - - 100 - - 100 dB Max. Output VoM+ + 19 + 19.5 V Voltage* V O M - -21 -21.4 - - - - - -Large-Signal Voltage Gain. A Q L * * 20 k 50 k V/V 86 94 dB - , 0 - .- 1 At R L - 2 kfi. 4 Al T A - - 5 5 ° C to+125°C, V + - 15 V, V - - 15 V. Vo - 26Vp.p. R L - 2 kJl. * AtVo-+19V,-21 V. andRL-2kn. * At V+- 22 V, V - - 22 V. mi i w v t © — ®~ —\y^- -Qoum/r » -© -TOP VIEW | _ Functiontt diiymt ol th§ Sand T Suffixes'" CA3140uritL -3-E Suffix - 84 -File No. 957 . CA3140B, CA3140A, CA3140 M A X I M U M R A T I N G S , Absolute-Maximum Values: • DC SUPPLY VOLTAGE ' (BETWEEN V* AND V~ TERMINALS) . OIFFERENT1AL-MODE INPUT VOLTAGE COMMON-MODE DC INPUT VOLTAGE ' INPUT-TERMINAL CURRENT • ~- . . * DEVICE DISSIPATION: " -WITHOUT HEAT SINK - • ' :; UPT0 55°C;-\ : A B O V E 5 6 ° c " . ' ' . . . ;'. -'. 'i -WITH HEAT SINK - . . . . . . . Up 10 bS°C . . . . . .. ' . ' . , , V . . . . . . . . ].-' Above 55°C -. - . .-TEMPERATURE RANGE: j ! ' " ! : ' < ' OPERATING (ALL TYPES) . ..; . •• . \ • STORAGE IALL TYPES) . .' . • . . OUTPUT SHORT-CIRCUIT DURATION* . LEAD TEMPERATURE (DURING SOLDERING): . AT DISTANCE 1/16 ± 1/32 INCH (1.69 ±0.79 MM) FROM CASE FOR 10 SECONDS MAX. ' . CA3140. CA3140A CA3140B 36V 44 V ± 8 V ± 8 V (V + +8 V) to (V- -0.5 V) . 1mA . . . . . 630 mW Derate linearly 6.67 mW/°C . . . . . . 1 W Derate linearly 1E.7 mW/°C . . . - S 6 l o + 1 2 5 ° C . . . .-66lo+150 oC INDEFINITE +265°C * Short circuit may be applied to around or to either supply. TYPICAL ELECTRICAL CHARACTERISTICS FOR DESIGN GUIDANCE At V + - 5 V , V - - 0 V , T A - 25°C ; , CA3140B (T,S) CA3140A (T.S.E) CA3140 (T,S,E) UNITS Input Offset Voltage Iviol 0.8 2 5 mV Input Offset Current ••• l'io| 0.1 0.1 . 0.1 pA Input Current • 1 r • l| ' ; 2 2 2 • pA Input Resistance • . 1 1 1 • Tfl -Large-Signal Voltage Gain AOL 100 k 100k 100k V/V (See Figs.4.18) 1 100 100 100 dB Common-Mode Rejection Ratio,' CMRR. 20 32 32 »/V/V 94 90 90 dB Common-Mode Input-Voltage Range :,VICR -0.5 -0.5 -0.5 V f '(See Fig.20) ; ... :' .. 2.6 . 2.6 2.6 Power-Supply Rejection Ratio...'; AV|o/AV+; 32 100 100 uV/V '.- • • —rr- - . ' : 90 ' 80 80 dB Maximum Output Voltage •V0M +- ,3 3 3 V - (See Figs. 13,20) -'.[ VOM" 0.13 0.13 0.13 Maximum Output Current: .' • I ' * ' Source • - ' . . . " ' ' l0M + •' 10 >. .' - 10 10 mA Sink •OM" • . 1 1 1 Slew Rate (See Fig.6) 7 7 7 V/u« Gain-Bandwidth Product (See Fig.5) fT 3.7 3.7 3.7 MHz Supply Current (See Fig.7) 1 + 1.6 1.6 1.6 mA Device Dissipation PD 8 8 8 mW Sink Current from Term. 8 to Term. 4 to Swing Output Low 200 200 200 uA - 85 -CA3140B, CA3140A, CA3140 File No. 957 Fig.2 — Block diagram of CA3140 series. BUS QftCUT r-INPUT STAGE t^g:=jt.-jjLLi-LiL-i: OFFSET NULL ALL MSSTANCE VALUES ARE IN OHMS. 6 ® sTMoec J , © •tca.tmr Fig.3 — Schematic diagram of CA3I40 tariat. CIRCUIT DESCRIPTION Fig.2 is a block diagram of the CA3140 Series PMOS Operational Amplifiers. The input terminals may be operated down to 0.5 V below the negative supply rail. Two class A amplifier stages provide the voltage gain, and a unique class AB amplifier stage provides the current gain necessary to drive low-impedance loads. \ A biasing circuit provides control of cascoded constant-current flow circuits in the first and second stages. The CA3140 includes an on-chip phase-compensating capacitor that is sufficient for the unity gain voltage-follow-er configuration. Input Stages — The schematic circuit diagram of the CA3140 is shown in Fig.3. It con-sists of a differential-input stage using PMOS field-effect transistors |Q9, Q10) working into a mirror pair of bipolar transistors (Q11, Q12) functioning as load resistors together with resistors R2 through R5. The mirror-pair transistors also function as a differen--5 -- 86 -File No. 957 CA3140B, CA3140A, CA3140 tial-to-single-ended converter to provide base-current drive to the second-stage bipolar transistor (Q13). Offset nulling, when de-• sired, can be effected with a 10-kfi poten-' tiometer connected across terminals 1 and . 5 and with its slider arm connected to termi-nal 4. Cascode-connected bipolar transistors Q2, Q5 are the constant-current source for the input stage. The base-biasing circuit for the constant-current source is described sub-sequently. The small diodes D3, D4, 05 pro-vide gate-oxide protection against high-volt-age transients, e.g., static electricity. ;' Second Stage — Most of the voltage gain in the CA3140 is provided by the second amp-lifier stage, consisting of bipolar transistor • '' . 1 ' Q13 and its cascode-connected load resis- ' tance provided by bipolar transistors Q3,04. i K- - On-chip phase compensation, sufficient for . .. a majority of the applications is provided by i) • V CI. Additional Miller-Effect compensation | •' ': (roll-off) can be accomplished, when de-{ ' sired, by simply connecting a small capa-! . ' , : • • citor between terminals 1 and 8. Terminal ! ' 8 is also used to strobe the output stage into ' • quiescence. When terminal 8 is tied to the •, . i ' negative supply rail (terminal 4) by mechani-, cal or electrical means, the outDUt terminal 6 swings low, i.e., approximately to terminal : 4 potential. Output Stage - The CA3140 Series circuits ' • - . ; . . employ a broadband output stage that can j .sink loads to the negative supply td comple-• ' " ". ment the capability of the PMOS input'stage ! - when operating near the negative rail. Quies-j cent current in the emitter-follower cascade ! ''. circuit (Q17, Q18) is established by tran-sistors (Q14, 015) whose base-currents are "mirrored" to current flowing through diode ! D2 in the bias circuit section. When the 1 CA3140 is operating such that output ter-minal 6 is sourcing current, transistor 018 , functions as an emitter-follower to source current from the V+ bus (terminal 7), via D7, R9, and Rll.- Under these conditions, the collector potential of Q13 is suffi-ciently high to permit the necessary flow of . base current to emitter follower 017 which, in turn, drives Q18. 'When the CA3140 is operating such that output terminal 6 is sinking current to the .' V-bus, transistor Q16 is the current-sinking element. Transistor 016 is mirror-connected • to D6, R7, with current fed by way of 021, - R12, and Q20. Transistor 020, in turn, is ' 'biased by current-flow through R13, zener ,t D8, and R14. The dynamic current-sink is controlled by voltage-level sensing. For purposes of explanation, it is assumed that , -output terminal 6 is quiescently established . at the potential mid-point between the V+ !" and V— supply rails. When output-current sinking-mode operation is required, the col-lector potential of transistor Q13 is driven below its quiescent level, thereby causing Q17, Q18 to decrease the output voltage at terminal 6. Thus, the gate terminal of PMOS transistor 021 is displaced toward the V - bus. • „- thereby reducing the channel resistance of Q21. As a consequence, there is an incre-mental increase in current flow through Q20, R12, Q21, D6, R7, and the base of , ;Q16. As a result, Q16 sinks current from terminal 6 in direct response to the incre-mental change in output voltage caused by 018. This sink current flows regardless of load; any excess current is internally supplied by the emitter-follower Q18. Short-circuit .. . protection of the output circuit is provided -by Q19, which is driven into conduction by • : the high voltage drop developed across R l l ', under output short-circuit conditions. Under these conditions, the collector of 019 di-. : -.verts current from Q4 so as to reduce the 'base-current drive from Q17, thereby limit-ing current flow in 018 to the short-cir-~ cuited load terminal. Bias Circuit — Quiescent current in all stages (except the dynamic current sink) of the . .CA3140 is dependent upon bias current flow in Rl." The function of the bias cir-... cuit is to establish and maintain constant-•: current flow through DI, Q6, Q8 and D2. D1 is a diode-connected transistor mirror-connected in parallel with the base-emitter ''-'.' junctions of 01. 02, and Q3. DI may be -' considered as a current-sampling diode that senses the emitter current of 06 and auto-matically adjusts the base current of Q6 ' (via Q1) to maintain a constant current through Q6, 08, D2. The base-currents in - Q2, Q3 are also determined by constant-current flow DI. Furthermore, current in diode-connected transistor D2 establishes the currents in transistors 014 and 015. ;'-6-- 87 -CA3140B, CA3140A, CA3140 File No. 957 CO I LOAD lit$JJTAMCC (KLt • 1 Ul LCOO CJMaTAMCC (Ct.l< KM3 if £ * 9 \ t s < 1— IO* AI-wntT T t»ERATU>C • n«m.T V O L T M C (v\ v")— V O L T * »»t 1 -frtxx Fjff.^  — Open-loop vol age gain vs supply voltage • and tempera tura. , . JU»m.T VOLTAOC tV*. VI - VOL TV Fig. 5 — Gain-bandwidth product vs tuppfy voltage and temperature. sut»n.v V O L T M C iv*. v">- VOLTS Fig. 6 — Slew rata vs supply voltage and tempera tura. MM VOLTMC (V*. VT-V0LT1 M C t - t r o ' Fig. 7 — Quiescent supply currant vs supply voltage and temperature. > 1 i S > n AttalMf Ttt-PtAATUM <TAl -J3*C SUffLT VOLTAOt: V*>DV,V'»BV 1 V r. \ ^ S 3 * 0 DO K F M O U C N C T tit—m Fig.8 — Maximum output voltage swing vs frequency. o» o» FREOUCMCT II)-Hi Fig.9 - Common-mode rejection rath . vt frequency. 1 2 ' ***>, Wm.Y VOLTAOf: V*>I8 V. ¥"•-»¥ MI01CNT TCHPCJUTURZ (TA)-Z3'C 2 ' s \ > • 1 s s s 1: FKguCJCT (I)—Mi * »*vf. 10 — Equivalent input noise voltage vs frequency. Fig. 11 — Power supply rejection rath vs frequency. -7-- 88 -f ^4423^ microcomputer porlphorals/powqr supplies '. signal jCpndiUoriing ooir)Ppn«nli/*ropU1iw»t..,i doto. acquisition/; lyUainS/dolB,fc«iivortur«?'.. PRECISION Q U A D R A T U R E O S C I L L A T O R FEATURES Sine and Cosine Oulpuli Resistor Programmable Frequency Wide Frequency Range 0.002 Hz lo 20 kHz _ Low Olstorllon O 0.2% max up lo 5 kHz Easy Adjustments Small Size Low Cost DESCRIPTION The Model 4423 ii a precision quadrature oscillator. It has two outputs 90 degrees out ol phase with each other, thus providing line and cosine wave outputs available at the same lime. The 4423 is resistor programmable and is easy lo use. It has low distortion(0.2% mux up to 3 kill.) and excellent frequency and amplitude stability. The Model 4423 also includes an uncommitted operational amplifier which may be used as a buffer, a j level shifter or as on independent operational amplifier. The 4423 is packaged in a versatile, imall. low cost DIP package. ^•mlcrpcwp^ dnta^.ac'gu'^ , l rocWputa^ P.iiji'nnSll'ccmdiVwii •fdaia'l'prjqulsllip^ '; mlciScompmer^^rlplioie •/riiiorpyW .7.'slgi)al'/'eondltionln6 XTnlcrDVo'mputVrrP ^iy^i'iohdltio'jil^g-cempS O burr-Brown H«Msick Cnrporsiion l»7s - 89 -S P E C I F I C A T I O N S tvbjtit Ul tJunjf oalltuwl ku<u.f •ii»>.tl«:*lhi'>l l>p««il .'It' . Pimrr Suppl) Unkrtt. lit tit I • E L E C T R I C A L MIN TYP MAX UNITS FREQUENCY 20 Ok UJ J 210% Hi |-t«jMM7 Ra.au/* (u»<«WI 2 K'* oa*jl Ik 20k Hi t lauucaO R*o«r |»Mti| 1 Hi and 3 ("•) .0 001 11 20k 11 111 Awunr ol t nuuanry 1 ><>*•'""•* ft btaaalilf <n limptiaittii IM tioo ppm/'C i)aadiain>« Pka** Lift*) 10 1 dtfit* DISTORTION Si** OwipM UM* 1) OOOilli la SI Hi 01 % St Hi ta 2ukHi as % CSVM Output tpia 7) OOtUHi in Silii as ft MHi U> 201 Hi 01 ft OUiofiMM n Tamper •tun O0IS «/*C OUTPUT AmpUxla I Sua*) Al 30 LIU t l 7 rs V rau «« Taaipcraiiira 0.0] ft/X n Sapol} 04 V/V Output ClURM 1.1 3 mA Ouipui wnpctlarM i n UNCOMMITTED OP AMP iapul OIIKI VoUat* 1.3 »v Input but.> t:«ii(ril 273 nA Inftwl JmprJ*tn» 1 Mil Open 1 uop Gaia TC dB Output CuitrrM 3 mA POWER SUPPLY Baled Supply Vohaf« l\i VDC Supply V©li*§r Rant* 112 H I VDC QUICKCS! Current in mA TEMPERATURE RANGE 0 •70 X OpaiaiiMa 05 413 T SiMaf*' •ii • 111 * Mar a* uiranxd lot balm accuracy. P I N C O N N E C T I O N S 1. 11, Sina Oulput 3. f i*gu*ncy Adjuatmanl 3. •••gwaocv Ad|t*imani 4. • In, Uncomminad Op Amp 0. -In, Uncommliiad Op Amp •. Output. Uncommliiad Op Amp 7. f j , Coatoa Output R. Ftaquancv Ad) u* I man l 0. -V ( c , -IfiVOC 10. «V e e , «16VDC 11. Common 12. f rax>tM)ncv Adiuatmont 13. *(*qu»nty Adjuaimani 14. r-iaquancv Ad|uatm»nt M E C H A N I C A L TO 0 u J / || O.B1tT.n> Mn 1 ""I0.O3O"! ROW SPACING • 1.» (0.300') WEIGHT-3.4 gnu (0.1 2 QI) CONNIXTOH • 14 pin DIP connacloi Pin ntalailal and plallni computlilon conform Io ma Hind 300) (•oluarablHly) of MIL-STDSSJ (aacapt paragraph 3.2). • FIGURE I. Equivalent Circuit. - 90 -T Y P I C A L P E R F O R M A N C E C U R V E S lUHi lOOIIi I k H i lOkHi IDOkH Ktaquaocy FIGURE 2. I O O H I I M l i lOkHi lOOkHa Fraqwancy FIGURE 3. EXTERNAL CONNECTIONS I. 20 kHz Quadrature Oscillator The 4423 docs not require any external component to obtain a 20 kHz quadrature oscillator. The connection diagram is as shown in Figure 3. • 1 «o> <n> (5) V j ) — O E ^ 10 ito 3»l20*)t L i 4423 ^ - i - O t j . 10c»i7aI2DOl IIGURF. 5. 2. Resistor Programmable Quadrature Oscillator For r»i*lor programmable frequencies in Ihe 2 kHz 10 20 kHz frequency range, Ihe connection diagram is shown in Figure 6. Note thai only two resislort ofequa) value arc required. The resistor Kcan be expressed by, 3.785f , K in kfi 42.05 - 2f fin kHz . l) J J> 3 O E , - I D 2s~*—°Ea- 10 FIGURE6. , 3. Quadrature Oscillator Programmable to 0.002 Hz For oscillator frequencies below 2000 Hz, use of two capacitors of equal value and two resistors of equal value as shown in Figure 7 is recommended. Connections shown in Figure 7 can be used to get oscillator frequency in the 0.002 Hz to 20 kHz range. too Tamparalura °C FIGURE 4. The frequency f can be expressed by: 42.03 R <C + 0.001) (3.785 +2R) where, f is in Hz C is in uF and R is in kfl FIGURE 7. For best results, the capacitor values shown in Table I should be selected with respect to their frequency ranges. 30 k i l l 3 k i l l 300 Hi 1 10 lo 10 3 kHi 200 H i 20 H i c 0 O.OtpF 0.1 uF 30 H i 3 H i 0.3 H i 0.03 H i to to lo lo 1 Hi 0.3 111 0.02 Hi 0.003 H i ! * • K I O J J F I O O O U F TABLE 1. After selecting (he capacitor for a particular frequency the value of the required rciislorcan be obtained by using the resistor selection curve shown in.Figure 8 or by the ~ expression: 3.785f(C +0.001) R a 1 where, K 42.05 - 2f (C + 0.001) . . R is in kfl I is in Hz and C is in uF - 91 -lu l t i lUUMi KHKOUKNCV FIGURE 8. The curves shown in Figure 8 ore provided only AS a nomographic design aid. The selection of capacitor values i i no) limned io the values shown in Figure 8. Any suitable combination of R and C values which satisfies the expression relating R, F and Cas shown above, would work satisfactorily with the 4423. NOTES ON TYPES OF CAPACITORS TO USE: There arc various kinds of capacitors available for use. There arc polarized, also known as DC capacitors and non-polarized, also known as ACcapacitors available. Of these two types, the polarized capacitors cannot be used with 4423 lo set the frequencies. Commonly available non-polarized capacitors include NPO ceramic, silver mica, teflon, polystyrene, polycarbonate, mylar, ceramic disc etc. A comparison is shown in Table II. Capacunor Icmparaiura Diuipaiton Ra*ot <j.F) CMnWicnll pproZ-C Factor i%) NPO C'litnil 5pF-0l ».F M 0-03 .Silver Mica 3pF-QM7»F W 003 OUUI . 100 f.F 200 001 OOul • M O IPO O0J Pulytarbooalt 0 001 - (WO *F w 001 Mdalucd Teflon 0 001- 100 *F 60 Ol Mtitlucd -Puiytaiboftatt Mylai t,t,,A*' 0.001 - 1000 «>F 10 04 O0UI • I00U »F 700 07 MftaluTcd Mylar 0 001 • JUUO ».F . 700 1 itttmm Due 3pF-03,.F i 0,000 » .TABLE II. For use with the 4423 oscillator, the choice of capacitors depends mainly on the user's application, error budget and cost budget. Note that the specifications of 4423 do not include the error contribution of the external components. The errors sourccd by external components -normally have to be added lo the 4423 specifications. As a general selection criteria we recommend the use of Ihe above table. Start from the top of the list in the above table. If the capacitor is found unsuitable due to it being loo large in size, too expensive, or is not easily available, then move down in the list for the next best selection. In any case do not choose or use any capacitors with dissipation factors greater than 1%. Such a capacitor would stop 4423 oscillation. DISSIPATION FACTOR (DF) A capacitor can be modeled by an ideal capacitor in parallel with an internal resistor iwhosc value depends on its dissipation factor (OF). Mathematically, the inletnal rcaiklor K it given by, R I 2irf C(DF) where R is in fl, f is the Hz, and C is in farads. For example, the DF of ceramic disc capacitors is of the order of 3%, which for a 0.01 pF capacitor would look like having an internal resistor of 530kfl al I kHz. The 530 kO value resistor is small enough to stop Ihe 4423 oscillator from oscillating. Some capacitor manufacturers use ihe terms "Power Factor" (PF) or "Q Factor" (Q) instead of the term "Dissipation Factor". These terms arc similar in meaning and are mathematically related by, (FF) • (DF) \fl + (DF)1 I (DF) OSCILLATION AMPLITUDE It takes a finite time to build up the amplitude of Ihe oscillation to its final full scale value. There ii a relationship between the amplitude build-up time and the frequency. The lower the frequency, the longer the amplitude build-up time. For example, typically it takes 250 seconds al I Hz, 30 seconds at 10 Hz, 4 seconds at 100 Hz, 400 milliseconds at I kHz, and 40 milliseconds at 10 kHz oscillator frequencies. There are two methods available to shorten this normal amplitude build-up lime. But there is also a relationship between the amplitude build-up time and distortion at final amplitude value. When the amplitude build-up lime is shortened, the distortion can gel worse. One method to shorten the amplitude build-up time is lo connect a resistor between pin 3 and pin 14. The lower this resistor is Ihe shorter will be Ihe time: to build up amplitude of Ihe oscillation, and worse will be Ihe distortion of the output waveform. For example, a lOOkfl resistor would shorten the amplitude build uptime from 15 seconds lo I second at 20 Hz frequency, but the distortion could be degraded from tpically 0.03% lo 0.5%. The olher method is io momentarily insert a Jkflresistor via a reset switch bet wen pin 3 and pin 14. The amplitude of oscillation is built up instantaneously when ihe reset switch is pushed. There will be no degradation of distortion wilh Ihis method since the IkO resistor docs not remain in Ihe circuit continuously. rtlniad IN U i A . PDS3B6A April, 1977 92 -f j \ j ANALOG idl DEVICES PRELIMINARY TECHNICAL DATA . F E A T U R E S Pra l r immad t o 1 0 . 2 6 % Max 4 -Quad rant E r ro r ( A D 6 3 4 L ) A l l I npuu (X . Y and Z l D i l f t rant ia t , H loh Impadanca for I (X, -X,HY,-Y S i / 101 + Z a T r a n i f t r F u n c t i o n Scala-F actor Adjus tab le to Provida u p to X 1 0 0 Ga in L o w Noisa Des ign: BOuV rmi, l O H i - I O k H z L o w Cent, M o n o l i t h i c Cons t ruc t i on Excal lant L o n g T e r m Stabi l i ty A P P L I C A T I O N S High Qua l i ty A n a l o g Signal Processing Di f ferent ia l Ra t i o and Percentage C o r n p u t a l i o r a Algebraic and T r i e o n o m a t r l c F u n c t i o n Synthesis Wideband, H igh-Cre i t rms - to -DC Convers ion A c c u r a l ! Voltage C u n U o l l a d Osci l lators and Fi lters P R O D U C T D E S C R I P T I O N T h e A D S 34 it a mono l i th i c laser t r immed four-quadrant mult i -plier-divider having accuracy spec i f i ca t ion! previously found on ly in expensive hybr id or modu la r products . A m a x i m u m mult ip l icat ion crrur o f 1 0 . 2 5 % U guaranteed for llie A D S 34 L without any external t r imming. Exce l lent supply-reject ion, low temperature coe f f i c ien t ! and lung term stabil ity of the on-chip thin f i lm re i i i turs and bur ied i c n c r reference preserve accuracy even under adverse cond i t ions o f use. h is the first multiplier to offer ful ly d i f ferent ia l , high impedance operat ion on all in-puts, including the Z - input , a feature which greatly increases its f lexibi l i ty and case o f use. T h e scale factor is pre t r immed to the standard value o f 10.00; by means o f an external resis-tor, this can be reduced by any a m o u n t d o w n l o 3, with corresponding reduct ions in bias current and noise level. The wide spectrum o f appl icat ions i n d the availabil ity of sev-eral grades c o m m e n d thU mul t ip l ier as ihe first choice for all new designs. T h e A D 5 34J ( 1 1 % max error) . A D S 34K (10.3% max) and A D S 3 4 L ( 1 0 . 2 3 % m a x ) axe specif ied for operat ion over the 0 to *70'c temperature range. T h e A D 5 3 4 S ( 1 1 % max) and A D 5 3 4 T (30 .5% max) arc specif ied over the extended temperature range, -55 l o * 125 C. A l l devices are available in the hermetical ly sealed T O - 1 0 0 meta l can. Internally Trimmed Precision I.C. Multiplier P R O V I D E S G A I N W I T H L O W N O I S E The A D S 34 ii the first general purpose multipl ier capable o f providing gains up to X l O O , f requent ly eliminating the need fot separate ins t rumentat ion ampl i f iers to precondi t ion the inputs. In ef fect , the A D 5 3 4 can be very effectively emp loyed as a variable gain d i f ferent ia l input amplif ier with high c o m m o n mode reject ion. T h e gain o p t i o n ti available in all modes, and will be f o u n d to s impl i fy the implementat ion o f many funct ion-fitting algorithms such a i those used to generate sine and tan-gent. T h e ut i l i ty o f this feature is enhanced by the inherent low noise o f the A D 5 3 4 : 90 /JV , rms (depending on the gain), a factor o f 10 lower than previous mono l i th ic multipl iers. Dr i f t and feed through arc also substantial ly reduced over earlier designs. U N P R E C E D E N T E D F L E X I B I L I T Y The precise ca l ibrat ion and di f ferent ia l 'Z-input provide a degree o f f lex ib i l i ty f o u n d in no other currently available mu l -tiplier. Standard MDSSR func t ions (mult ip l icat ion, divis ion, . squaring, square-rooting) are easily implemented while the restriction to part icular i nput /output polarities imposed by earlier designs has been e l iminated. Signals may be summed in-to the output , will) or w i thou t gain and with cither a positive or negative sense. M a n y new modes based on impl ic i t - funct ion synthesis have been made possible, usually requir ing on ly ex-ternal passive component s . T h e output can be in the f o r m o f a current, if desired, faci l i tat ing such operations as integration. Information fumtahad by Analog Dowkoi to baliavad io ba occur a tt and ratiabla. Howovar. no raapona Jollity It aaaumod by Analog DOT icat lot In uaa; nor tor any l n t n n o a m a n » ol paiarttt or oth>t rtohu Ol third patfiia* wirtich may raauli from In uaa. No Ikanaa b {pan lad by ImpJica-lion of othaivwM undar any pa tan I or patartl rigti u ol Analog Otvkaa. Routa 1 Industrial Park; P.O. B o x 280; Norwood, Mass. 02062 T a l : 617/3284700 T W X ; 710/394^677 W n t C o a i t M id -Wa i t . — Texas 213/695-1763 312/894-3300 214/231-6094 - 93 -S P E C I F I C A T I O N S - IOV<X.Y<- lQV V, - 114 » l i » V 0vpicol8t+2&"C,wilh t V s " lbV, R L >2k, urilou othBiwiw AIM i i i v M , . J ^ IU l l A u , 1 0 ! * B » » tO.Mfcnvaa Sttlu^ V o l I n « x St»Lnf Volllft S«ff>Jr MtUnJ »>ru« I V t - l l l V ) > I V X - ]UV pk-pk V - 1 I W • V - 10V pk-pk ' x - n o v X • 10V pkpk »MU y . IOV pk fk rntu H.1%-10.011%/C 10.11% 10 OJ*/*C t o o n so.4* JO 01* t0.1% 1001% i o o n * / c to. I* S00I* / *C 10 J * to o o a * / C 10 001%/C tO I* (0.1* *»u) «Olk(O.IJ%lBu) l O 0 l % U O l « m u > S0.0O3* <*0.l» max) tO 1 J * (0.1% mu> >0 0 i » ( 0 U * n u ) 1001*110 l*tn««) 10U01%( '0 . l *m»») DIVIDER PtRSOKMANCI MjUAXtX PSKr-ORMANCt Ttuufa Iwtctna X i > X | X • IOV •|0V<Z<*I0V X - IV - | V < Z < « I V 0 iv < x < tov - I0V<Z<*I0V (X , -X , ) 10.71*. no* 11.1* 10.J* 10 »% 101* - I0V<X<*I0V WJUAHtHOOTIX rfcRI-OXMANCI T l U l l « FuMLlM Z| > Z] 1 « J k m * 1 J V < Z < 10V INPtrt AMPLlMtKS IX, V ind Z»' V'IOCJJ Xj (XIMI VoliafC,X, V Dtifl OIlxl Votu|«. Z Doll CMHR gt. V. Z) Bu> Conrnl Utltcl Cwrnal K»ir4 At ntikcy Uhlf. orCMK) . Oyci*iirtf (DOT.) SMW. 10V pk-pk D.I I. Input • 0 Mall, laput * 0 tlOV 111V l lmV <»30mV m*a> IOOfiV/*C l lrnVtHOmV a n ) 10O»JV/"C •UdB (aOdU Mia) 0.a*iA<l*lA m»i> O.ljiA lUMll I I M V <i|0mV mi>) * * |0*iV/*C * • l l >V ( I I SnV inu) 13m V (1 IDoiV •»•) |0QMV/"C •Odfl (TOdB mia) " 0U1MAI01>IA « OI/ITUT AMPLlUk" ' OfK» Loup Caia Sauii Sajakl «W I* AmpMwta Intx Ovtp»i Valxflf Sk - R I M SclllaaJ 1a»< la 11% Owlpwl Impcihnct 1 KoiM SptctraJ D*a«ly M(t4<tM*a NtMM Cu>AU " l 0 0 ^ * " : V*u i WV pk pk flVooT ' ' O V Uftily^un. (Mk l t i SP - 10 SF - 1 (Notr *> r> IMIa in SMIli f . lOllt la I Ok Hi I - 101 li io IOa.Ha. kf - J (N<H. a) "l " B ' ^ A " T 0 1 7 UdB IMtll 10k Ul H l V m i a lOV/pi 1*« o.m Oa>V/v/Ii7 04fiV/</lTi ImV rml •UtiV mti aO>jV n»* 10mA POWIH SUPPLY SPkCIHCATIONi a«pp<r Carnal PRICks" Rurrf Perform*nu O p f i m j Q o K H l M "11-14, ~ * (11-ff) |IW-ttt) »I1V II l o t i l V 4mA (6mA m u l "~»J* 00 • 11.00 • 1*00 • 1*00 110 00 114.00 • 11.00 •41 00 • It 00 ti)M, .0114k H O * n u X O O ) % / C B i 0 0Ol«J *Cn (XkjV/'Cn' 110f<V/'C 100»V/*C m atoo 1*00 141.00 1*0 00 171.00 SAO UO - 94 -UN CUNMliUKA' l ION & DlMLNMONS •> ihowo in JiiiMnuont and (nun). B S K 3 -TOP VIEW a i l P DIMENSIONS Si PAD LAYOUT I—-OPTIONAL TKIMMINCi CONFIGURATION ABSOLUTE MAXIMUM KATINCS Supply V o l i i i r lmc in» l Puwer D i i i ip i l iun Oulpul Sliuil<:iu'uil IU C iuund ' Inpul V s l l i i r i . X , X , Y , Y j Z , Z j Hsiru Operating Tempciaiuic Hang e Storage Tcmpcialurr Kangf Lead Temperature, 60| aolucring AD1I4J, K,L| AIHI4S.T nav SlXlinW Indrlinilc U i o *7U C -6J 10 * 150*C -J) to • m*c l l 'NCI IONAl. DkSCKll'TION Figure I ii a functional block diagram of iht AD534. Inpuu * •re convened to differential currents by three identic*! voltagc-to-currcni conveners, rich trimmed for zero offset. The prod-uct of the X- and Y-current, it generated by a multiplier cell using (.iliK-n'i tianslincar technique with in internal scaling voltage equivalent 10 13.33V it the inputs, providing over-range capacity. The Z signal is multiplied by i fixed factor of 0.7J. which rciturci the overall scaling voltage, SF. to 10.00, also laser trimmed to value. The differrncc between XY/SF and Z U then applied to the high gain output amplifier. This permits various closed loop configurations and dramsticatly reduces nonlincaritici due to the input amplifiers, a dominant source of distortion in earlier designs. The effectiveness of the new scheme can be judged from the fact that under typical condi-tion, as a multiplier the nonlincariry on the Y-input, with X at full scale (MOV), is 10.005% of F.S., even at its worst point, which occurs when X * 16.4V, it is typically only 10.023% of KS. Nonlincarity for signals applied to the X-input, on the other hand, is determined almost entirely by the multiplier element and i i parabolic in form. This error is • major factor in deter-mining the overall accuracy of the unit, and hence, ll closely related lo the device grade. IMAMtltMl** a u MINI TftAMtMft rUNCTION v,-»[t».-K.ff|-*l. -U,-I.l] Figure 1. ADS34 Functions/ Block Dltgrmm The gcncraliicd transfer function for the AU334 is given byi V O U T - A —1 ~ L - (Z. - Z2) SF where A • open loop gain of output amplifier, typically 70dU at D.C. X, Y, I - input voltages (full scale - 1SF, pcak-11.25SF) SF - scale factor, pre trimmed to 10.00 but adjustable by the user down to i. In moil cases the open loop gain can be regarded as infinite, and SF will be 10. The operation performed by the AD534, can then be described in tcrmi of equation! (X, - X j ) (Y| 7 Y j ) •» 10<Z, - Z 2 ) The user may adjust SF for values between 10.00 and i by connecting an external resistor in scries with a potentiometer between SF and -Vg. The approximate value of the total resist-ance for a given value of SF is given by the relationship] SF RSH - 5.4K -10 • SF - 95 -I., .1 I,, U J V . U , in l»t-v I'urir.itt, SI . Ihik ha- i l » l,-li • ,l...u|.l l.V m i n . Coiivi.li r 4 l . l 1 i.iJmli.ii) w JII.I tlnll <-JII be adiirvi <l by divri;i%i.ig cull rllct'l of miirasing signal gam with c the lusiomary tnefc-w in uoiic and uffket*. Nule Uui (lie peak mpui signal is always limited Iu I.25SF (i.e., 15V fur SF * 4) so the overall trail.(cr function will show a maxi-mum gain of 1.25. The performance wiih small input signal., however, 1- impiovcd by using a lower SF since the dynamic lange of the input, i. now fully utilized. Hand width is unaffect-cJ by the use of this option. Supply voltages of U S V arc generally assumed. However, satis-factory operation is possible down tu 18V (see curve 1). Since all inputs maintain a cunswnt peak input capability of 11.23SF some feedback attenuation will be necessary to achieve output voltage swings in excess of 112V when using higher supply voltages. OPERATION AS A MULTIPLIER Figure 2 shows the basic connection for multiplication. Note that the circuit will meet all specifications without trimming. figure 2. Beiic Multiplier Connection In some cases the user may wish to reduce A.C. feedthrough to • minimum (as in a suppressed Carrier modulator) by applying an external trim voltage of about UOmV to the X or Y input (see Optional Trimming Configuration, page 3). Curve 4 shows the typical A.C. feedthrough with this adjustment mode. Note that the Y input is a factor of 10 lower than the X input and should be used in applications where null suppression is critical. The high impedance Zj terminal of the AU534 may be used to sum a further signal into the output. In this mode the output ( amplifier behaves as a voltage follower with a 1MHz small signal bandwidth and a 20V/,ui slew rate. This terminal should always be referenced to the ground point of the driven system, particularly if this is remote. Likewise the differential input*": shuuld be referenced to their respective ground potentials 10 realize the full accuracy of the AD514. A much tower scaling voltage can be achieved without any reduction of input signal range using a feedback attenuator at shown in Figure 3. In this example, the scale is such that Voirr • XY, so that the circuit can exhibit a maximum gain of 10. This connection results in a reduction of bandwidth to about SOkllz without the peaking capacitor Cp • 200pF. In addition, the output offset voltage is increased by a factor of 10 nuking external adjustments necessary in some applications. Adjustment il made by connecting a 4.7M1J resistor between Zj and the slider of a pot connected across the supplies to provide 1300mV of range at the output. Feedback attenuation also retains the capability for adding a signal to the output. Signals may be applied to the high imped -Figure 3. Connection! for Scale-Factor of Unity ancc Z j terminal where they are amplified by *10 or to the common ground connection where they arc amplified by +1. Input signals may also be applied to the lower end of the lOkil resistor, giving a gain of -9. Other values of feedback ratio, up to X100, can be used to combine multiplication with gain. Occasionally it may be desirable to convert the output to a current, into a load of unspecified impedance or O.C. level. For example, the function of multiplication is sometimes followed by integration] if the output is in the form of • current, a simple capacitor will provide the integration function. Figure 4 shows how this tan be achieved. This me thud can also be applied in squaring, dividing and square rooting modes by appropriate choice of terminals. This technique is used in the voltage-con-trolled low-pass filter and the differential-input voltagc-to-frcquency converter shown in the Applications Section. -rz, _ i t»i- » i » t»(-.iiiY,-rii i ± Figure 4. Conversion of Output to Current OPERATION AS A SQUARER Operation as • squarcr is achieved in the same fashion as the multiplier except that the X and Y inputs are used in parallel. The differential inputs can be used to determine the output polariry (positive for X| • Y| and X j • Y j , negative if cither one of the inputs is reversed). Accuracy in the squaring mode is typically a factor of 2 better than in the multiplying mode, the largest errors occurring with small values of output for input below IV. If the application depends on accurate operation for inputs that arc always less than 13 V, the use of a reduced value of SF is recommended as described in the FUNCTIONAL DESCRIPTION section (page 3). Alternatively, a feedback attenuator may be used to raise the output level. This U put to use in the diffcrencc-of-squares application to Compensate for the factor of 2 loss involved in generating the sum term (see Figure 10). - 96 -Typical Performance Curves o y p i u i n +25*c. w i th i v , -+i5v, u n i o u o i i u w i w m t e d ) - 97 -G E N E R A L I N F O R M A T I O N SERIES 3 0 0 D .P .M. • IMC's Series 300 D.P.M. was designed with three major objectives In mind: reliability, flexibility, and low cost. Proven reliability is achieved through use of off-the-shelf, field-tested large scale integration devices. Because of this, > IMC's D.P.M.'s have the lowest component count per unit in the industry. Only IMC's Series 300 offers literally hundreds of combinations as standard off-the-shelf items because of its design flexibility and modular construction. f Through the use of. package and design ingenuity, the Series 300 offers the lowest price and the fastest delivery in the ! industry. For ease of installation, the Series 300 has a decal on the rear with pin termination information for connecting the unit. The front bezel is unmarked for acceptance of a proprietary label in place of or in addition to IMC's label. Special labels can be printed for a nominal charge. Basically, the Series 300 consists of two printed circuit ' boards: the mother board and the display board. The mother board contains all the circuitry required to convert an analog ' signal into digital format. The display board converts the digital format into seven segment numerical characters. All ! other signals and power required to drive the option boards are available on the mother board. Performance .pacification, of Series 300 model, are determined by , option selected. See specific option. SET-UP PROCEDURE SERIES 3 0 0 D.P.M. 1. Verify that the model number ordered is the same as the ; model number indicated on the decal on the rear of the housing. 2. Make connections to the rear connector as indicated by the : decal. The hold input (pin 6A) must be grounded for normal 1 operation, and pin 5A must be left open in the case of an • L.E.D. display or must have a pull-up resistor (4.7K to 9.1 K) to +5 (intensity control) in the case of a planar display. 3. After applying power to the unit, short the plus and minus inputs, and wait for one minute warm-up to assure that the unit zeros. 4. Apply a full scale signal as determined by the range of the instrument, remove the front bezel, and adjust (if required! the full scale potentiometer on the tower right hand corner •">. of the display. , 5. Compare set-up results with those contained on the final acceptance sheet, (included with unit) a THE MINUS SIGNAL INPUT AND THE DIGITAL -GROUNDS ARE INTERNALLY CONNECTED. CARE , MUST BE TAKEN TO AVOID GROUND LOOPS. IF THE i UNIT DOES NOT ZERO (FOLLOWING STEPS 2 & 3) A ' GROUND LOOP EXISTS AND MUST BE REMOVED. 7. Please notice that a 1,000 microfarad capacitor must be connected between digital ground and +5V. 8. Please refer to specific option sheets for theory of operation '. and trouble shooting tips. 9. Should you have any problems, please do not hesitate to call us giving details as to the specific systems and hook-up conditions. We will do everything we can to assist you. 10. Connectors are available as follows: a) Input connector for main board and digital comparator board - order part No. ISC-18, $4.50 ea. b) AC Power Supply connector — order part No. 506A-20, $2.50 ea. c) Planar display connector — order part No. 5012A-20, $3.00 ea. • . V 0 SPECIFICATIONS A/D CONVERTER BOARD — Bd. No. 300A INPUT RANGE: «u.»»mV. i<M.»nV. al.mV. «t».MV. a IM BV. and x 10OOVDC "ltd rangea. IMPEDANCE: >1000 Magohma or *1».ftnV and 11.990V range, 10 Magohma on olnar ring,,. BIAS CURRENT: 4 plcoampt POLARITY: Bipolar - Automatic : NOISE REJECTION: 8MB lor powar tupply. NUR ol 'OdB @ 6 O H 1 ZERO: Automatic itro (On raquatt. a manual oflael la available) - OVERVOLTAGE:Upto1200VOC. In any ranga.. OENERAl READING HOLD: PoiKK* latt raiding ratanHon. POWER CONSUMPTION: VOW mulmimv 0.8W nominal. OUTPUT ACCURACY: aO.05%, >H LS8 ol raadlng LINEARITY: x0.OS%, xv, LSB SPEED: 10 convaratona/aaeond nominal. STEP RESPONSE: lOOmaac Irom zaro to full acala. TEMPERATURE DRIFT: xtt LSB/10'C TEMPERATURE COEFFICIENT: Wppm/'C OVERRANGE: Flaahlng 4Hz dlaplay. ADJUSTMENT: Front panal lull acala adluatmant. WAAM-UP TIME: 1 mmuta to apaclflad accuracy. TEMPERATURE: Operating; 0*C to +SVC Sloragt: -20'Cto +4VC Paris layout drawing ol BO 300 shows location ol RX and RY resistors that are changed to select Instrument's range. See Table 1 on Page 2. M O T H E R B O A R D BD. 3 0 0 CIRCUIT DESCRIPTION When an analog signal it applied to pint 1A and 2A of the edge connector, It will be connected directly to pint 15 and 2 of the LD-111 I.C., providing no attenuating retiston for scal-ing are Included in the unit. A clock signal is generated by the NE555 I.C. which drives the digital processor to properly time all the required signals for the A-D conversion and also drives the DC-DC converter through Q4. . The DC-DC converter converts the 5VDC power input into +12VDC. Enough power is generated to drive all the A-D con-verter circuitry, and any other option board that might be in-cluded in the D.P.M. The digital processor directly drives the 7 segment decoder driver and the hex inverter.These digital signals are also brought to the option connector for use in additional circuitry. Since the system operates with a signal generated reference voltage, this reference voltage must be stable in order to guaran-tee stable readings throughout the temperature range of the in-strument. This signal is applied to pin 10 of the LD-111 through Q3 and Q4. All the circuitry required to operate the A-D con-MOD R A N G E R 1 Ry 30X1 31X 32X 33X 34X 35X 19.S9MV-1995MV 1599V . 19.00V 1995V 1000V .Ik 10K > - 100K • • 100K 100K 100K o .. •;. 0 . ; . 0 •-.' 9M 95M 959M • N.U. , N.U. • N.U. 1M 100K 10K Automatic 10K . 0. ' N.U. •NOTE: A L L RES. .196 60 PPM MF. 1. EREF. FOR RATIO METRIC OPTION ONLY. 3. PLANAR DISPLAY OPTIONAL INTENSITY CONTROL INTERNAL. 4. SOME MODELS ONLY. . 6 . M - MYLAR. version is contained in the LD-110 and LD-111 I.C.'s.Very few components are required externally for their operation. Positive last reading retention (hold) is accomplished by leaving pin 6A open at the rear edge connector. When open, Q1 is cut off preventing the digital processor from changing its format. During normal operation the hold input should be maintained at ground. Automatic zero is accomplished every time the digital pro-cessor completes its cycle. The only adjustment necessary is a full scale adjustment that can be easily accomplished by remov-ing the front bezel and adjusting the screwdriver head of the potentiometer located in the lower right hand corner of the dis-play board. ' ' Decimal point selection is easily accomplished by grounding the appropriate pin at edge connector. The range of the instrument is changed by inserting the appropriate resistors (RX and RY) as shown on Table 1. TROUBLE SHOOTING TIPS S Y M P T O M POSS IBLE C A U S E C U R E N O D I S P L A Y D I S P L A Y D O E S N O T C H A N G E N O N S Y M M E T R Y NO Z E R O 1. Defective SN7447/DD700 2. No clock lignal (Check NE555 and Q4) 3. Defective SN7404/LD-110 4. No Intensity Control Resistor (Planar display) 1. Unit on hold 2. Defective LD-110/LD-111 3. No reference for E r e f 4. Defective.Cj n t i C6 5. Defective Q1 1. Defective Q3 2. External Ground Loop 3. Defective LD-111 1. Defective LD-110 2. Defective C4/C5 3. External Ground Loop 1. Replace 2. Check±12V supply 3. Replace 4. Add 1. Ground pin 6A 2. Replace 3. Repair 4. Repair 5. Replace 1. Replace 2. Correct 3. Replace 1. Replace 2. Replace 3. Correct - 101 -SPECIFICATIONS: BDS 301 and 312 DISPLAY BOARD - 5 OPTIONS AVAILABLE 0.3" or 0.4" HIGH LIGHT EMITTING DIODE (LED's) -Bd. No. 301 and 312 ' COLORS: Red — 10/15 foot nominal viewing distance, Green — 10/15 foot nominal viewing distance, Yellow — 12/18 foot nominal viewing distance, Orange — 18 foot nominal viewing distance. POWER CONSUMPTION: 100mW, nominal, 200mW, max. LAMP TEST: For lamp test, loading sink 1.5mA. L.E.D. D ISPLAY O P T I O N BDS. 301 A N D 3 1 2 o to CIRCUIT DESCRIPTION This printed circuit board contains the LE.D. displays, segment limit resistors, and the digit drivers."' The common anode type LE.D. displays are connected to +5V through their individual anode drivers (QI through Q4). Because these anode drivers are of the PNP type, both the 7 segment and the anode driver signals at the pins of the printed circuit board must be of negative logic. To light up a proper segment, that particular segment has to be grounded through : its resistor and the anode driver of that particular display must also be grounded at the same time. This is also true when : decimal points are to be lighted. SYMPTOM NO DISPLAY ONE DIGIT ALWAYS LIT, OR DOES NOT LIGHT UP SEGMENT OR SEGMENTS DO NOT LIGHT NO "+" SIGN TROUBLE SHOOTING TIPS POSSIBLE CAUSE • 1. No power 2. No clock, check NE555 ... 1. Q1-Q4 defective 2. Defective SN7404 on mother board 3. Defective LD-110 on mother board -1. Defective SN7447 on mother board 2. Broken connection 3. Defective resistor 1. Defective SN7404 on mother board 2. Defective readout 3. Broken connection 4. Defective LD-110 CURE 1. Correct • 2. Try lamp test 1. Replace 2. Replace 3. Replace 1. Replace 2. Correct, try grounding. 3. Replace 1. Replace 2. Replace 3. Try grounding pin 12 4. Replace 4 o OJ * i I I I »•!• Gr| al .. g # & g@ vu T K TH/tsy IK Die. S.PL. 3. A/,. 3a/ /&'usee u,/r// 0.3"&'s/k4ZS MODELS 301 and 312 5 j A U T O M A T I C R A N G E B D . 3 0 4 j CIRCUIT DESCRIPTION ! This board contains the' precision resistors and analog j switches as well as proper time signals to automatically change j . the range of the instrument. ] Normally the shift register outputs are in the logical 1 state i -and the analog switches (DG172) are in the off state. When an overrange condition occurs, the digital processor clocks out all digit select lines simultaneously. These four lines are detected • by the four input nand gates (SN7420) which,when all four in-puts are in the logical 1 state, will switch their output to the | zero state, triggering the timer (NE555). This in turn generates a single pulse at its pin 3 which is fed to the shift register pin 1. This clock signal advances the shift register to position 1 forcing the analog switch to turn on and to attenuate the input signal via R1, P1, and R2. At the same time the proper decimal point (1.999) is lighted to indicate the new .range. If an overrange condition still exists, the sequence of events will repeat until | the instrument finds the proper range'. SPECIFICATIONS: BD 304 UP/DOWN STEP RESPONSE: 360ms DECIMAL POINTS: Automatic RANGES: Four- ±200mV. ±2V, ±20V, and ±200V. OUTPUTS: Decimal points 5 TTL loads TEMPERATURE: Operating; 0*0 to +60*C Storage; - 20 ' C to +85*0 : An underrange signal is generated by the digital processor whenever the input's signal value is below 10 counts. At this point the thousands digit select I ine and the BCD 8 line switch to logical 1 simultaneously. This signal is utilized by QI and Q2 to reset the shift register and bring the analog switches to an off state condition. Therefore, in the event that the input signal changed from a high value to a medium value, the autorange circuitry will reset itself, to the most sensitive range and seek the appropriate range for the signal input. SYMPTOM DOES NOT UP-RANGE UNIT "HUNTS" DOES NOT DOWN RANGE NON-LINEARITY TROUBLE SHOOTING TIPS POSSIBLE CAUSE 1. Defective SN7420, NE55V, SN7496,or DG172 . 2. Poor Vcc filtering 1. Defective Q i , 0.3 or Di -D3 1. Defective Q ^ Q o o r SN7496 1. Defective DG-172 2. Defective LD-111 on mother board CURE 1. Replace 2. Correct 1. Replace 1. Replace 1. Replace 2. Replace CO 2 « A O-OOZ-•1<U /I o o - O t S u 5 5 H ? t y D i oi B UJ Q O 2 105 -Appendix C C l DEVICE SPECIFICATIONS On the f o l l o w i n g pages are cop ies of manu fac tu re r ' s data sheets cove r i ng some of the components used i n the r e c e i v e r . These are presented to a i d i n s e r v i c i n g , maintenance and t r o u b l e s h o o t i n g . The data sheets are a l s o u s e f u l i n case a s i m i l a r component must be obta ined i n an emergency. - 78 -

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