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An electronic airborne display system Stewart, Ian 1979

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AN ELECTRONIC DISPLAY  AIRBORNE  SYSTEM  BY  IAN  B.A.Sc,  STEWART  U n i v e r s i t y o f W a t e r l o o , 1977  A THESIS SUBMITTED I N P A R T I A L FULFILMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF A P P L I E D  SCIENCE  in THE FACULTY OF GRADUATE STUDIES Department  of E l e c t r i c a l Engineering  We a c c e p t t h i s t h e s i s a s c o n f o r m i n g to the r e q u i r e d s t a n d a r d .  THE U N I V E R S I T Y OF B R I T I S H COLUMBIA A p r i l , 1979  (c)  Ian  Stewart,  1979  In p r e s e n t i n g  t h i s t h e s i s i n p a r t i a l f u l f i l m e n t o f the r e q u i r e m e n t s f o r  an advanced d e g r e e a t the U n i v e r s i t y o f B r i t i s h C o l u m b i a , I a g r e e t h a t the L i b r a r y s h a l l make i t f r e e l y a v a i l a b l e f o r r e f e r e n c e and I f u r t h e r agree that permission f o r s c h o l a r l y p u r p o s e s may by h i s r e p r e s e n t a t i v e s .  for extensive  study.  copying of this thesis  be g r a n t e d by the Head o f my Department o r I t i s u n d e r s t o o d t h a t c o p y i n g or p u b l i c a t i o n  o f t h i s t h e s i s f o r f i n a n c i a l g a i n s h a l l not be a l l o w e d w i t h o u t written  permission.  Department nf  Electrical  Engineering  The U n i v e r s i t y o f B r i t i s h Columbia 2075 Wesbrook P l a c e V a n c o u v e r , Canada V6T 1W5 Date  A p r i l 12,  1979.  my  ii  ABSTRACT  An and  electronic  tested.  over  iii)  analog  type  proved cockpit  cockpit  congestion,  ii)  increased  flexibility  in  decreased testing  complexity  and  software  in  simulation,  instrumentation.  given.  display  The EADS d e s i g n e d  current  reduced  airborne  design,  A  detailed  cockpit  and  designed  advantages  These  pilot  are:  reaction  i) time,  instrumentation,  associated  reduced  was  several  displays.  with  ground  o v e r a l l cost  description  implementation  (EADS)  to have  decreased  hardware and v )  system  of  the  testing  of  of  iv) based  cockpit  hardware this  EADS  and is  i i i  TABLE OF CONTENTS  ABSTRACT  i i  TABLE OF CONTENTS  i i i  L I S T OF ILLUSTRATIONS  v i  L I S T OF TABLES  viii  ACKNOWLEDGEMENT I.  II.  ix  INTRODUCTION  1  1.1  Overview of  1.2  Review of  1.3  Scope  Electronic  previous  Airborne Displays  w o r k i n EADS  9  of t h e s i s  12  SYSTEM DESCRIPTION 2.1  Overall  2.2  Data  2.3  Central  system  14 description  14  Acquisition Unit Processing  18  Unit  description  22  2.3.1  General  2.3.2  CPU h a r d w a r e d e s c r i p t i o n  1  Selection  of  CPU  22 25  criteria  25  CPU c o n f i g u r a t i o n  27  Final  DFM i n t e r f a c e  30  Pilot  Entry Device  32  description  33  2.3.3  CPU s o f t w a r e  Software  development  Real-time  Command Mode  38  D i s p l a y Mode  40  executive  tools  33 34  iv 2.4  Display  IV.  43  Processing Unit  44  2.4.1  General  2.4.2  DPU m a c r o commands  45  2.4.3  DPU h a r d w a r e d e s c r i p t i o n  50  2.5  III.  U p d a t e Mode  description  o f DPU  ALU format  56  Branch format  58  Common f i e l d s  59  Vector Generator  61  2.5.1  General description  2.5.2  Hardware  selection  of  vector generator  and d e s c r i p t i o n  SYSTEM PERFORMANCE 3.1  Overall  3.2  Real-time  3.3  Display  3.4  Vector  CONCLUSIONS 4.1  4.2  44  62 66  system performance e x e c u t i v e performance  processor generator  performance performance  AND DIRECTIONS  FOR FURTHER RESEARCH  Conclusions  Directions for  61  66 74 75 76 77 77  further  research  REFERENCES  79  80  APPENDIX  A  CPU F l o w c h a r t s  APPENDIX  B  CPU  Program L i s t i n g s  APPENDIX  C  DPU  Microinstruction Fields  83  90 138  V  APPENDIX  APPENDIX  D  E  APPENDIX  F  APPENDIX  G  CPU  B l o c k Diagrams  DPU S c h e m a t i c s  DPU C o n t r o l  Vector  144  Store L i s t i n g s  Generator  141  Schematics  157  165  L I S T OF ILLUSTRATIONS  Figure  1  Point  plotting  organization  3  Figure  2  Display  organization  with  vector  Figure  3  Display  organization  with  display  Figure  4  Block  diagram  System  of  block  EADS d i s p l a y  Figure  5  Figure  6  Figure  7 iCPU  Figure  8  Figure  9  Typical  Figure  10  State  Figure  11  Photograph  Figure  12  Block  Figure  13 D i a g r a m  of  pilot  Figure  14  Diagram  of  RDYC  Figure  15  Command  handler  Figure  16  Structure  Figure  17  List  Figure  18  Bit  Figure  19  Block  Figure  20 i  Centralized and  Block  diagram  of  during  system a  refresh  o f DAU  display of  of  of  organization  cycle display  cycle system  device  list  29  36 configuration tasks  41  51  o f DPU  53  fields  55  Structure  of  ALU s l i c e  Figure  22  Structure  of  microsequencer  Figure  23  Block  Figure  24  Photograph  vector  take-off  38  46  21  of  24  32  display  of  19  entry  Figure  diagram  cycle  30  table  Microinstruction  16  DFM i n t e r f a c e  architecture  diagram  6  23  DPU commands  slice  5  21  complete of  4  15  distributed  DAU t i m i n g  diagram  processor  diagram  vs  diagram  generator  56 slice  60  generator  63  format  70  Figure  25  Photograph  of  engine  Figure  26  Photograph  of  landing  data  format  format  viii  L I S T OF TABLES  Table  1 Comparison  of  existing  airborne  display systems.  73  ix  ACKNOWLEDGEMENT  I  would  like  to  thank  all  a s s i s t e d me i n c o m p l e t i n g t h i s Special aid  and  to  thank  spent  to  Grateful of  for  t h a n k my w i f e ,  this  Canada  for  work.  his  many  Karen,  for  and d r a w i n g f o r t h i s  acknowledgement  who  have  thesis.  throughout  Dr.P.D.Lawrence  i n typing  Council  individuals  t h a n k s t o my s u p e r v i s o r D r . M . R . I t o  encouragement  would l i k e  those  is  financial  for his  I  would  helpful the  constant also  like  suggestions.  t i m e and e f f o r t  I she  thesis.  made  to  support  S c h o l a r s h i p n o . 1560 and o p e r a t i n g g r a n t  the  National  through  no.67-9054.  Research  Postgraduate  1  CHAPTER I 1.1  INTRODUCTION  OVERVIEW OF ELECTRONIC AIRBORNE D I S P L A Y SYSTEMS  Before displays, airborne an  taking let  with  the  and  safe  thesis  This  used  EADS  is  example,  a  electronic dynamic  to  inferior  There  a  airspeed  type  an  use  a  type  the  in  by  type  display  pilot  this analog  indicator, displays.  because  its  it  information. information  For about  heading. the  pilot's  ability  analog  form.  display  device  symbology.  At  To  criteria. cost  and  The  this, allows  present,  plasma  resolution  to  large  do  which  o n l y d e v i c e of reasonable  this  however,  analog  him  efficient  i n f o r m a t i o n by d i s p l a y i n g a  in  analog  an  attitude  of  displays exploit  must  meets  and  in  is  provide  handled  multifunction  the  to  (EADS)  described  now  types  electronic  display  plane  indicator,  several  (CRT) i s  which  appear; to  as  analog  of  the  airborne  an  aircraft  and many o t h e r  information  display  exactly  display  d i s p l a y may g i v e  displays  reliability  airspeed  airborne  cathode ray tube  begun  information  the  an  fly  the  attitude,  the  to  electronic  airborne  of  electronic  displays  quickly assimilate of  required  known  Electronic  part  pilot  indicator  single  plane's  electronic  the  at  what  The  s u c h as  descent  look  describe  The  by  manner.  simultaneously  the  is.  displays  of  in-depth  first  information  instruments rate  us  display  instrument  an  cost panel are  the and has still  the CRT. are  t h r e e methods used  to  get  the  i n f o r m a t i o n on  the  2  CRT.  These  and  are  commonly known a s  raster  scan.  information the  screen,  The  stroke  on the  the  to  screen,  the  a pair scan  line  The beam i s  again turned  refreshed. 50  at  which the  include  the  the  the  with  screen  to  to  display  rate  must  prevent  pilot  of  the the  has  screen  of  start  beam o n beam  been  pilot,  on  display.  the  or  across  completely  beam p a s s e s  the  is  then  continuously  be  high  screen  depends  the  more  enough,  flicker.  order  to  a point  on  t h e beam  is  The  and  number  rewritten on  rate  flicker  factors.  wavelength,  location,  order  minimum  before of  the  or  is  These  brightness,  light-to-dark  ratio  and  g e n e r a l l y been  the  object[1].  recent  d i s p l a y s has  EADS  resolution  to  date.  and  the  The  stroke  absence  of  written aliasing  displays[6],[3],[4].  update  driving  a  light  written  better scan  on  age,  stroke  common t o r a s t e r  available  the  flickering  offers  circuitry  the  a pair  sweeping  o n when t h e  variation, retinal  The u s e  In  entails  t o be v i s i b l e  pilot's  s i z e of the  display  d i s p l a y from  i n f o r m a t i o n needs t o be r e f r e s h e d  to  with  of  points  i n f o r m a t i o n on  co-ordinates  until  turned  refresh  cycles/sec,  apparent  rule  the  generates  individual  space  written  off.  The  of  the  method  a l l methods,  brightness  co-ordinate  end  by l i n e ,  screen which i s  In  the  of  display  illuminating  CRT beam a c r o s s  raster  covered.  in  by  p l o t t i n g , stroke  plotting  w r i t t e n d i s p l a y generates  co-ordinates The  point  screen  defined  by moving the  off.  The  point  the  these  the  CRT, t h e r e  must  be  some  control  display.  Several  organizations  can  broken  down  be  into  are three  3  configurations. The f i r s t  and b y f a r  the  simplest  is  shown i n f i g u r e  1.  Y AXIS  T  COMPUTER  E  INTENSITY  I E  Figure  In  this  displayed  the  computer  screen,  must  the  must  computer  The s e c o n d a  vector  drawn.  time  a  of  system  is  that  refreshing  useful  work.  This  a point plotting display,  since  point,  its  refresh  time  for  then  intensifying  organization has is  been  intensify  the  vector  is  s i m i l a r to added.  the  appropriate  pairs  shown i n t h i s of  generator  the  first  A block  shown i n f i g u r e  generator  co-ordinate The  constantly  the  beam.  sequence  pairs[2].  generator  The v e c t o r end  its  commonly t e r m e d  display architecture  and  deal  by  must  problem w i t h t h i s  a great  specify  organization  computer  The m a j o r  generated  co-ordinate  plotting  the  limiting is  of  Point  spend  configuration  are  1.  image.  thus  Symbols  X AXIS  organization  the  ">i CRT  except  diagram  that  of  this  2. figure  the  vector  or  then  moves  the  accepts the  line beam,  segment  start to  tracing  be out  4  X  X.Y.Z VALUES^  COMPUTER  —  —  VECTOR GENERATOR  INTENSITY:  _ „ . .__. _,  ^  Y  Figure the  line  segment  computer's relieved are  2. D i s p l a y o r g a n i z a t i o n  command.  of  to  be  fact  With  calculating  are  that  the  beam  this the  or  off  organization  Both  along  analog  These  must  of the  the  and  will  supply  generator  depending  the  line  is  now  which  type  vector in  suffers  of  the  segment  discussed  still  all  on  computer  digital  be  This configuration  computer  each r e f r e s h  on  points  available.  i n CHAPTER I I .  during  the  intensified.  generators detail  with  with vector  the  more  from  the  co-ordinates  screen[2],[3].  The t h i r d and m o s t p o w e r f u l o r g a n i z a t i o n  is  shown i n  figure  3. The reduces  display the  continually in  the  load  on  updating  display  to update  the  displayed  image.  vector  processing  file  the  the  the  used  The  when i t  in  generate  this  unit  figure, (CPU)  on t h e  information  CPU i s  now o n l y  wishes  previous to  shown  processing  based  memory(DFM) .  As i n is  central  screen  display f i l e  generator  unit(DPU)  to  change the  organization, the  line  some  segments  by  stored  required current type  of  on  the  5  DISPLAY RLE  GPU  Figure screen.  The  The stroke the  PROCESSOR  GENERATOR  display  reduces  increased  VECTOR  3. Display organization  transformations again  DISPLAY  the  overhead  written  organization display  memory i s  screen,  around first  is  found  configuration.  performing  at  the  This  expense  of  in  conjunction  with  the  The d i s p l a y  processor  in  s c a n d i s p l a y may b e a s s i m p l e a s a n a d d r e s s  and t u r n s  through  the d i s p l a y  t h e beam o n when a b i t i n t h e  file  display  set.  In a d d i t i o n the  of  and t r a n s l a t i o n .  CPU b u t  a n d beam c o n t r o l w h i c h c y c l e s  ( s c r e e n memory) file  on t h e  CRT  processor  capable  scaling  $H  complexity[2],[4].  case of a r a s t e r  register  with display  may b e  s u c h as r o t a t i o n ,  hardware last  processor  BEAM  to p r o c e s s i n g  there  the p l a n e .  must This  case the c e n t r a l  be  information  some  method  c a n b e done processing  of  and d i s p l a y i n g i t o n gathering  i n one o f  unit  data  two w a y s .  from  In  the  i n the system gathers  the  6  data  itself.  data  acquisition  second the  In the  system  second  unit  thus  case a separate p r o c e s s i n g  (DAU),  further  is  used  reduces  the  to  gather  the  unit,  the  data.  The  overhead  on  the  CPU i n  thesis  uses  DAU a p p r o a c h .  this  system,  system. The  EADS  described  Figure 4 gives  in  this  a b l o c k diagram of  the  illustrating  the  l o c a t i o n o f t h e D A U , C P U , and D P U .  DFM  Figure  4.  B l o c k diagram of  The EADS s h o u l d a l l e v i a t e current  analog  The  instruments. tends  to  critical is  the  Displaying  overburden  Information  is  often  congestion  instruments  EADS d i s p l a y  several  the  problem  use of  of all  pilot  redundant  phase of f l i g h t [ 5 ] . O f t e n , serious  GENERATOR  organization  problems  that  exist  with  instrumentation.  most  instrumentation  VECTOR  DPU  CPU  DAU  problem  in a limited  a the  and or  with  large  current  number  of  information, increase not  all  his  required  analog dedicated the  time,  reaction  time.  in  a  particular  especially with m i l i t a r y aircraft, arises  space  in  trying  i n v i e w of the  to  fit  pilot[6].  all  a the  7  The their  problem  inflexibility.  decided  upon  change time  third  the  and  the  Once  a  cockpit  displays  organization  progresses,  format  analog  little  without  has  can be  a substantial  is been  done cost  to and  investment[7].  the  pilot.  shifting that  problem e x i s t s  With  modern  direction  of  a  monitoring  mode  displays large  is  the  portion  analog both  analog  data  expensive computer  convertors  or  (D/A's)  Finally,  for  the  the  an  for  is  used.  cost  of  steadily  increasing.  to  the  of  the  active  the  role  pilot's control  of  role  is  element  to  current  analog  c o n t r o l mode p i l o t n o t  displays  that and  by  time  digital  changing  the  lack  adequate  status  with  current  analog  new r o l e [ 9 ] .  generated and  the  However,  exists expense  instruments  is  cost  this  difficulty  be  of  Current  problem  of  to  that  of  aircraft,  monitor.  pilot.  another  because  day  was d e s i g n e d  and w a r n i n g s y s t e m s Yet  from  flight  instrumentation  the  conventional  design  instrumentation  The f o u r t h  be  with  to  some  involved be  tested  external  consuming  with  precise,  reliable  conventional  s o p h i s t i c a t i o n of instruments  many  of  problems  This  can an  instruments now b e  when the  to  the  given  evaluating  cockpit.  follows:  for  require  whether  analog  w h i c h go i n t o  1) i n c r e a s e d p i l o t w o r k l o a d due number o f d i s c r e t e instruments.  A  digital-to-analog  instruments  We c a n s u m m a r i z e t h e s e p r o b l e m s a s  2) c o c k p i t c o n g e s t i o n reason.  device.  c o n s i d e r a t i o n must  analog  testing.  will  regardless  computer  Serious  in  large  same  3) i n f l e x i b i l i t y changes.  in  4) i n s t r u m e n t s l a c k warning i n f o r m a t i o n . 5) i n s t r u m e n t s 6)  making  instrumentation  sufficient  are d i f f i c u l t  r e l i a b l e instruments  are  to  status  test.  expensive.  and  9  1.2  REVIEW OF PREVIOUS WORK I N ELECTRONIC AIRBORNE D I S P L A Y S The  principal  displays on  research  airborne  display  indication  efforts  then  landing  (V/TOL)  were  displays  (EADI) aimed  that  at  displays  and v e r t i c a l s h o r t  with  the  aerodynamic the be  t i m e was  .  the  advent  by  with  impairment  qualities of  reduced  pilot  electronic  airborne  it  the  use  essential  electronic  in  the  for  late  vertical  take-off  The  reasons  The  take-off  and  the  of parameters  of  characteristics  in  a  was h o p e d of  plane  that  multiplexed  information  in  of  the  this  pilot  more  on  which  aircraft,  due  to  the  nature.  With  workload  could  displays  a  (V/STOL)  emphasis  a V/TOL o r V/STOL  flight  attitude  and l a n d i n g for  Work  1960's.  in flying  needed  EADS,  or  i n c r e a s i n g number  p i l o t had to d e a l w i t h  along  (EADS)  r e a l l y began  aircraft[10],[11],[12],[13]  the  on  h a v e b e e n made b y v a r i o u s m i l i t a r y o r g a n i z a t i o n s .  electronic  EADS a t  efforts  providing  easily  the  assimilated  form. Displays hardwired  digital  The s y s t e m s generator  were  overloading  the  landing Aviation heading  As  for  military  by  and  the  took  raster  display  scan  to  the  type  figure  memory  before,  the  the  raster  led  of  a  displays[14].  2 with  for  this  form  to  vector  problems  scan of  computer.  EADS a g a i n g o t began  Facilities  time  similar  mentioned  systems [ 1 5 ] .  of  that  configured  the main  The n e e d  at  computer  replaced  configuration.  as  developed  a boost  emphasis  Much o f  the  on  Landing  early  all-weather  w o r k was  Experimental  All-Weather  i n the  Centre  Systems  done  take-off  by  (NAFEC)  (AWLS).  seventies  the  National  under  Some  and  work  the was  10  also of  undertaken these  experiments  instrument  flying,  From steadily the  by the  this  B o e i n g A i r p l a n e C o m p a n y . The m a i n was  to  reduce  the  l a n d i n g and t a k e - o f f  point  increasing.  e x i s t i n g analog  on,  work  EADS  can  on  pilot  thrust  workload  during  conditions.  the  FADS  provide  approach  several  has  been  advantages  over  controls:  1) reduced pilot workload through the i n t e g r a t i o n o f i n f o r m a t i o n a n d more f l e x i b l e displays. 2) to  reduced c o c k p i t c o n g e s t i o n information integration.  problems  3) flexible display systems to e f f i c i e n t instrument m o d i f i c a t i o n s . 4) sufficient abnormal f l i g h t  automation situations.  in  due  allow  detecting  5) efficient system testing due to d i g i t a l n a t u r e and m o d u l a r i t y o f d e s i g n . 6) greater redundancy. One o f Digital  the  Avionics  program has at  biggest  been  have  the  undertaken  Group  of  the  Airforce  Base, to  to  major  Rockwell  Digital  Flight  display  of  effort  is  information  in  System  flight  are handled by d u p l i c a t e d  area  project.  Avionics  Ohio[16]. a Hot  explore  is  The  the This  Laboratory  main  thrust  Bench w h i c h would all  concepts  of  systems.  International.  Management  system  (DAIS)  Airforce  develop  flexibility  to  made i n t h i s  System  avionics information  Another  due  efforts  at  DAIS p r o g r a m was  sufficient  electronic  recent  Information  Wright-Patterson  behind  reliability  the  progress This  at  system  (DFMS)[18].  management  the  and  Collins is  In  Radio  called  the  this  system,  aircraft  control  d i g i t a l f l i g h t management  computers.  11  The  EADS  projects  have  mentioned The m o s t  display  systems  resulted  previously. severe of  developing  such  fact  to  that  centralize  in  resulting  the  realization  However,  some  these problems  a  system.  The  date  the  EADS's  the  functions  from  of  deficiencies  being  second  the  the  display  leads the  to  severe  EADS c a n n o t  areas the  processor  of  digital  system.  to  handle  problems take  in  can  system,  t o n a r r o w down a d e f e c t i v e  of  have  area.  a  the and  since  a  in  and  the to  flight  w i t h perhaps  display again  load.  This  cost.  Also  made  significant  become  exist.  attempted  control  developments  without  testing  i n a complex c e n t r a l i z e d  of  reliability  advantage  technology  Finally,  some  benefits  lies  m a n a g e m e n t , and d a t a a c q u i s i t i o n i n t o one c o m p u t e r , a  other  still  deficiency  display,  and  expense i n v o l v e d i n  developed  of  these  in  certain  redesign  significant  i t becomes more  of  problem difficult  12  1.3  SCOPE OF THESIS The  purpose  which a l l e v i a t e s  of  this  already  these design  is  the  design  of  a  the  achieved  advantages in  EADS.  obtained The  over  following  analog is  objectives:  1) r e d u c e  cockpit instrument  congestion.  2) d e c r e a s e p i l o t r e a c t i o n t i m e b y : 2.1) d i s p l a y i n g only the information r e q u i r e d f o r t h a t p a r t i c u l a r phase of flight. 2 . 2 ) d e c r e a s i n g a n g l e o f e y e movement r e q u i r e d to scan a l l i n s t r u m e n t s . 2.3) d i s p l a y i n g i n f o r m a t i o n i n a form suitable for the pilot's required actions. 2.4) d i s p l a y i n g warning information an a t t e n t i o n - g e t t i n g manner. 2.5) u s i n g symbols which b e t t e r information displayed.  in  present  3) increase flexibility in cockpit i n s t r u m e n t a t i o n by making changes i n d i s p l a y format to be made m o r e easily than in current instrumentation. 4) d e s i g n s y s t e m c o m p o n e n t s i n a d i s t r i b u t e d fashion, thus e n a b l i n g changes i n various s e c t i o n s at a l a t e r date without effecting p e r f o r m a n c e o f r e m a i n i n g s e c t i o n s and a l s o increasing reliability in duplicated systems. 5) the s y s t e m s h o u l d show a significant reduction i n instrumentation costs. 6) decrease the r e q u i r e d to d r i v e equipment. 7)  new  the p r e v i o u s l y mentioned problems, w h i l e at  same t i m e m a i n t a i n i n g displays  thesis  increase  ease of  complexity instruments  of equipment in simulation  testability.  a  list  EADS the type of  13  The d e s c r i p t i o n o f t h e which deals involved gives  in  a  the  in  at  directions software  the  Chapter  by for  the  for  II.  design  further  the  and d e s i g n  described  description  flowcharts  schematics  purpose  EADS  detailed  described arrived  with  system i t s e l f  and  of  Chapter and  by  listings,  EADS d e s c r i b e d  of  this  the IV  testing  research.  is  The  found the  i n Chapter  various  thesis.  performance contains of  this  the  firmware  listings  throughout  these  the  III EADS  conclusions  EADS,  Appendices  elements  Chapter of  II  along contain and  with the  circuit  chapters.  14  CHAPTER I I  SYSTEM DESCRIPTION  2 . 1 OVERALL SYSTEM DESCRIPTION A block  diagram  shown i n f i g u r e As s e e n  which  attempts  shown  processing  units.  Acquisition  Unit  from  include  attitude  data,  area  flight  available.  attached  to  the  known a s  stored  this  chapter  is  The  the  consists  these  main job the  engine  problems  of  is  data,  of  units to  plane.  such  stored  Store  an  three  main  the  Data  data  from  is  acquire  These  elements  communications  would  data,  and  (on b o a r d n a v i g a t i o n computer)  information,  Data  the  The a d v a n t a g e s  5,  of  around  DAU, i s  of  later.  first  director  some  processing  in  read a  Memory  via  several  dedicated  (DSM) .  I/O  shared  if  ports storage  The DAU s o f t w a r e  is  i n ROM.  The  DSM i n f o r m a t i o n  Processing Pilot  in  a distributed  circumvent  figure  (DAU) whose  elements  is  to  in  The  various  one  EADS h a s  be d i s c u s s e d  system,  the  this  centralized designs.  organization w i l l  from  EADS d e s c r i b e d  5.  experienced with  data  the  i n f i g u r e 5,  architecture  The  of  Unit  Entry  checking can  be  the  data  (CPU) b a s e d  Device  for  faults  interpreted has  commands o u t The refreshes  been to  (PED). and by  read  on The  pilot  Display  processed,  the  CRT v i a  the  data  Processing CPU w r i t e s  co-ordinate  by  requests  the  DPU commands a  turn  CPU p r o c e s s e s  formatting  the  in  t h e D i s p l a y F i l e Memory  DPU r e a d s the  is  the  entered the  in  Central via  information,  a manner  Unit the  the  (DPU).  which Once  n e c e s s a r y DPU  (DFM). stored driven  in  the  vector  DFM a n d generator.  DAU PROGRAM STORE  CPU PROGRAM STORE  DISPLAY FILE  @  t  EXTERNAL  CENTRAL ROCESSING UNIT  DEVICES  DAU RAM AREA  DAIfA STORE MEMORY EXTERNAL CONTROL  F i g u r e 5. S y s t e m b l o c k  diagram  PILOT ENTRY DEVICE  DISPLAY PROCESSING "UNIT  VECTOR GENERATOR  16  The CRT i s and  refreshed  giving  continuous  the  at  a r a t e o f 50 H z , t h u s p r e v e n t i n g  moving  elements  on  the  screen  a  flicker look  of  motion.  The  distributed  advantages  over  nature  more  of  the  centralized  advantage can be i l l u s t r a t e d by the  system  display  offers  systems.  following  several The  first  figure.  (a)  Figure  In can  system  handle  properly  system each  will  type  (a),  the  should  distributed  6.  this  still  Distributed  i f a failure occurs,  load.  network  remains  Centralized vs  However, latter  in  (b) ,  function  the  properly  functioning.  remaining  system  processor several  the  will  develop  processor  not  function  a  fault.  modules  may  fail  as  as  long  one  In  the  and  the  module  of  17  The  distributed  advantage of a  major  redesign  on  system  centralized  system.  microcomputers of  systems.  is The  individually  a l l o w an e m u l a t o r  cost  the  also  enables  t e c h n o l o g i c a l advances  distributed  tested  system  for  system  and  to  the  remaining  somewhat three  units  to  in  to this from  without  Finally, test  than  system the  take  the the  can  be  system  to.  place.  The u s e  of  units  reduces  the  overall  t o more c o m p l e x c e n t r a l i z e d  display  distributed  compared  modules.  removed  in its  designer  s p e c i f i c modules  easier  logically  function  these  in  the  low  cost  18  2 . 2 DATA A C Q U I S I T I O N UNIT (DAU) Little It and  was f e l t  that  the  a possible  gather  rate  figure,  as  of  bit  8085  Because  form,  the  the  it  into  the  than  that  handle  the  several  to  sample  the  data  read  by the  format  analog  the  data  of  However,  if  we  DSM. S i n c e  processing  look  at  DSM we  the  unit  the can  CPU l o a d s  time,  the  microcomputer  such  task.  from  16  bit  The  analog  to  around  the  to be  in  words  see  new  conflict.  not to  DAU a n d  a  mutually  is  it  times  at  solution.  changes  CPU d o e s  Thus,  a  the  may u s e  relative  we c a n a l l o w a c c e s s  resource  for  16  when  the DSM.  o n l y one  therefore  This  this  expected in  The  Keeping  data  CPU i s  DAU i s  sec.  multiplexed  this  in  per  acquisition  the  period  time  plane.  satisfactory  an 8 b i t  sharing  the  the  of the  d a t a on a C R T [ 1 9 ] .  between  inactive,  routine  description  the  times  is  conflict exists  the  a  purpose  10  A potential  requires  is  around  studies,  control  DAU m u s t  resource  of  less  several  could  would  converters  writing  the  of  following  elements  i n m i n d , we f i n d  Intel  digital  is  fairly  a c h i e v e d by spending  section,  various  d e s i g n of the DAU.  the DAU.  dynamic a i r b o r n e  microcomputer  plane.  from  last  actual  DAU w o u l d b e  However, the  required  sampling rate the  the  c o u l d be  i n the  a result  observation  of  configuration for  data  sampling  as  design  remaining u n i t s .  As m e n t i o n e d to  was p l a c e d o n t h e  thus g r e a t e r b e n e f i t  on t h e of  emphasis  into  require  at  any  which When  the  the  CPU i n  exclusive one  time.  each  the  DPU  DFM. D u r i n g  access  to  the  data  is this  the DSM;  t h e DSM b y t h e DAU w i t h o u t  by b u f f e r i n g  unit  obtained  fear by  19  the  DAU d u r i n g  unloading DFM,  the  the  buffer  the  into  CPU i s  the  except  that  the  CPU a n d  detail  the  DSM memory i s  D P U . The  design  section,  of  the  DSM a n d  CPU i s  then  updating  the  conflict.  CPU a n d DAU s h a r e  in a later  reading  DSM when t h e  we c a n s u c c e s s f u l l y a v o i d t h e The d e s i g n o f  the  time  similar  the the  to  that  memory p o r t s DFM w i l l  so we n e e d n o t  be  dwell  of  t h e DFM  rather  than  discussed  on t h e  in  design of  t h e DSM h e r e . The during  DAU i s  the  a  slave  b e g i n n i n g of access  to  the  to  the  the  C P U . The  CPU s t a r t s  display refresh  DAU  when  DSM i s  available.  the  t i m i n g o f t h e DAU a n d CPU o p e r a t i o n s  c y c l e and Figure  7  t h e DAU tells  illustrates  during a refresh  cycle.  START OF NEXT DISPLAY REFRESH CYCLE  DPU FINISHES REFRESHING SCREEN AND SIGNALS CPU  START OF DISPLAY REFRESH CYCLE  the  V  DAU LOADS DSM CPU UPDATES DFM  DAU BUFFERS DATA CPU READS DSM  OTHER TASKS  OTHER TASKS  Figure  The  program  t h e DAU f o r the  7.  lead  for  the  DAU c a n  new i n s t r u m e n t s  replacement  should  CPU a n d DAU t i m i n g d u r i n g  to  of  the  or  for  be  savings  stored  new p l a n e s  ROM p r o g r a m  significant  a refresh  memory. in  in  cycle  ROM. M o d i f y i n g  will  only  This  down-time  and  require  flexibility upgrading  20  costs.  The  impedance testing  state  or  necessary  DAU e x t e r n a l  for to  so  that  the  D S M . Thus c o s t l y a n a l o g during  8  may  device  also can  be be  put  used  systems.  For  simulation,  instrument  data  in digital  equipment  s i m u l a t i o n i s not  Figure DAU.  another  duplicated  supply  busses  illustrates  to  drive  the  in  high  either it  is  form  cockpit  to  for only the  displays  required. the  basic  elements  required  by  the  DSM BUFFER  PROGRAM STORE  RAM  I  ADDRESS BUS TO DSM  He  8085  ,  R/W  T.  A8:15 ALE  CONTROL FROM CPU  ADO:7 DATA BUS TO DSM  1 8  IADDRESS SELECT  256 - N CHANNEL  8  A/D  8  "7 16  I/O DECODE  ~~T~  8  T N DIGITAL PORTS  TRANSDUCERS DIGITAL  DEVICES  256-N  %—  Nx8 ro  F i g u r e 8.  B l o c k d i a g r a m o f DAU  22  2 . 3 CENTRAL PROCESSING UNIT (CPU)  2 . 3 . 1 GENERAL D E S C R I P T I O N OF CPU As m e n t i o n e d retrieve  data  commands  to  function  on t h e  (PED).  a  base,  data  that  it  warn  the  may  from  be  Device  the  DSM and  stored  in  basis  of  the  stored  pilot  of  be  On t h e  marginal  description  configured  into  four  Display  CPU w i l l Mode.  In  the DSM, m o d i f y display such  as  file  this it,  and  a  by  commands r e c e i v e d f r o m t h e The  information stored  be l o a d e d i n t o the  end  of  the  the  the  the  50Hz  time  of  these  faulty  i f CPU t i m e i s we  can  modes.  see  into  also  the  how t h e CPU are  is  time  termed Mode. in  information  copy  any  static  file  based  on  can  The CPU  DPU commands i n  display  CPU  its  it  available.  These  read  resultant  CPU w i l l  the  of  Entry  checks,  conditions.  portion  the  from the data  buffer. the  the  The  display  pilot. i n the  display f i l e  DFM when t h e  display refresh.  real  and m i s s i o n  CPU w i l l  Update Mode. F i g u r e 9 i l l u s t r a t e s A  s p e c i f i c plane  tasks,  large  scales  processed  DSM a g a i n s t  from  Command M o d e , a n d C o n t r o l  store  The  the  operating  mode,  and  buffer.  labels  information  spend  this  Pilot  basis or  exercise the  i n mind,  the D i s p l a y Mode, Update Mode, The  the  to  i n t o m e a n i n g f u l DPU  CPU must  check data  a l s o be i n v o l v e d w i t h o t h e r this  it  commands r e c e i v e d f r o m  for.  any  CPU's main f u n c t i o n i s  D F M . The  i n ROM, f o r  i s b e i n g used  the  transform  The CPU c a n a l s o  Keeping can  i n Section 2.1,  clock  buffer  DPU r e l i n q u i s h e s  This  state  a typical  signals  the  is  the  known a s  display  start  will  of  then  DFM a t is  the  cycle. the  refresh  23  START OF NEXT DISPLAY REFRESH CYCLE  DPU FINISHES REFRESHING SCREEN AND SIGNALS CPU  START OF DISPLAY REFRESH CYCLE  v  V  V  Y7777s DPU IS IDLE.  DPU REFRESHES CRT CPU READS DSM DAU BUFFERS DATA  CPU LOADS DFM T0yy\ DAU LOADS DSM OT  Figure c y c l e to  the  should s t a r t required well  reading  is  when  it  has  exclusive file  of  buffer.  The lowest  lists  the  to  the  CPU t h a t  the  resultant  i n the  refreshing  the  display f i l e  updates  spent  the  on  exiting  the  next  refresh  cycle  The  Update is  t h e CPU  the  Mode,  used  other  CPU now  DFM f r o m  as  buffer. on  The DPU s i g n a l s display.  t h e DSM  DPU commands  time r e m a i n i n g can be processed.  it  has  display  any  time  to handle  other  tasks.  priority  of  cycle  indicates  scales  DFM and  Again, the  or  yet  Command Mode i s  receives  storing  the  not  completed  use  priority  and  complete,  remaining before low  signal also  labels  p r i o r i t y tasks  display  and p r o c e s s i n g any i n f o r m a t i o n f r o m  pilot  any s t a t i c  When t h i s low  DPU. This  by the  as  9. T y p i c a l  task  commands f r o m tasks  to  be  treated  in the  the  as  the  system.  CPU b a c k g r o u n d t a s k , In  PED a n d q u e u e s  executed.  The  this the  position  mode,  requested of  a  task  the  or CPU  task  in  in  the  24  list  is  will  be The  running  dependent serviced Control the  Figure  on  before Mode  its  priority.  those of  lower  encompasses  t a s k s r e q u e s t e d by the 10 i l l u s t r a t e s  Figure  10. S t a t e  Tasks  the  higher  of  priority  priority. time  the  CPU s p e n d s  pilot.  t h e s e modes  diagram  of  diagrammatically.  display  cycle  in  25  2.3.2  CPU HARDWARE DESCRIPTION  2 . 3 . 2 . 1 SELECTION C R I T E R I A Three  main  considerations  selecting  the  the  command  DPU  explained This  in  word  word  section  width  processor; The  CPU h a r d w a r e  width.  effective  consideration  real-time nature  section.  E a r l i e r w o r k done  representative  as  well  commands, The facility 100  too  slow for  the  the  reduced  the  in  the  do  16 b i t  m u l t i p l i c a t i o n and d i v i s i o n  The  reason  for  built  arithmetic  operations  criteria  in  criteria  limits  hardware  or  on  the  priority, previous  executive  for  produced  bit  this,  data  selection  microprogrammed  have  in well  obvious,  the  a  w i d e DPU  CPU s h o u l d  is  an  CPU[20].  to  this  the  have  the  16  a 16 b i t  that  bit  Considering  consideration  with  was  use  16  processor.  8085,  system. to  is  reasons  a  multiple  Intel  due  these  CPU s h o u l d  third  DSM. T h i s  the under  since it  of  the  receives chips  multiply  to and  instructions.  The p r o c e s s o r bit  selecting 8086,  to  an 8 b i t  the  the  throughput  d e c i s i o n was made t o  from  16  suited out  when  w i d e DPU command.  described  this  of for  on a s i m i l a r r e a l - t i m e  executive  several  divide  CPU as  processor,  CPU d o e s  those  the  well  handle  bit  usee.  the  of  16 b i t  that  to  account  decided,  rule  8  as  a  into  The f i r s t  was  use  was  executive  task  real-time  to  does not  multiple  a  It  particularly  t h i s by i t s e l f second  taken  configuration.  2.4.2,  is  were  which best  microprocessor. the  TI9900 over  M o t o r o l a 6809,  suited  There the  were  t h e s e g o a l s was t h e three  main  TI9900,  reasons  remaining p o s s i b i l i t i e s , the  Zilog-Z8000,  National's  PACE  and  for Intel  IMP,  and  26  GI's  CP1600I21]. The  main reason  architecture. working  registers  registers  context this  real-time  other  in  architecture  T I 9 9 0 0 was  processors,  in  the  external  switches  second  remaining  the  the  the  both  CPU w i t h memory.  for  devices  PACE,  was  for  the  tools.  I M P , 9900  and o f t h e s e ,  and  only the  selecting  a  this  t h i r d reason  Tektronix  Although  has  program  and the  three  and  data  organization rapidly,  thus  development  not  thesis,  Tektronix available.  8002  of  At  of  CPU s e l e c t i o n ,  the  time in  development  future  8002,  efforts  once  the with  full  a  and  the only  production,  chassis,  T I 9 9 0 0 was t h e supporting  development  additional  the  extender  boards.  system  th i s  device  scale  a 4 slot  s e l e c t i n g the  for  over  the  TI9900 o f f e r e d  available  TI9900  of  CP1600 w e r e  for  the  availability  b o a r d , memory e x p a n s i o n and p r o t o t y p i n g  of  register  9900  This  efficiently  very suitable  reason  development  The  the  its  executive[22].  The  related  selecting  maintained  residing  handles making  Unlike  for  of  the  EADS c o u l d b e  memory  for  the  existence the  9900.  system done  on  8002  for the was  27  F I N A L CPU CONFIGURATION  Thus t h e computer. 4  slot  for  final  This board,  chassis  card  photograph  the  of  the  of the  detailed  of  TMS4042-2  words  of  EPROM e x p a n d a b l e  static  d r i v e n by  output  is a  of  the  with  a  (TM990/512) an  power  extended supply.  A  11.  DPU, v e c t o r  to  TMS9900  4K w o r d s .  system  shown 3MHz  a  RAM, expandable  communications  TM990/100M b o a r d being  triple  contains  programmable  asynchronous  generator,  board  generator  later.  TM990/100M b o a r d  TMS9901  cards  vector  description  words  a  purchased  prototyping  DPU and a  also  c o m p l e t e s y s t e m i s shown i n f i g u r e  and CRT w i l l b e g i v e n The  T M 9 9 0 / 1 0 0 M was  ( T M 9 9 0 / 2 0 1 ) , and  A more  a CPU was a T I 9 9 0 0 s i n g l e  ( T M 9 9 0 / 5 1 0 ) , two  development  memory  decision for  giving  CPU,  512 w o r d s ,  interface  and  a  a  TMS9902  CPU i s  machine  IK  contains  and  The  256  also  A b l o c k diagram  Appendix D.  clock,  bit  The b o a r d  controller. in  to  16  of  the  currently  cycle  time  of  4K w o r d s  of  333nsec. The T M 9 9 0 / 2 0 1 memory e x p a n s i o n b o a r d TMS4045 s t a t i c 2716  EPROM  RAM e x p a n d a b l e  expandable  configurations  are  to  8K w o r d s  16K w o r d s .  switch  memory e x p a n s i o n b o a r d  to  selectable.  The  These output, vector  0.46  requirements  open  frame  generator  and  8K w o r d s  RAM and  A block  EPROM  diagram  o f TMS memory of  the  i s g i v e n i n Appendix D.  The c o m p l e t e s y s t e m p o w e r r e q u i r e m e n t s a m p s , +12 v o l t s a t  contains  amps, are  supply.  a r e +5 v o l t s a t  and - 1 2 v o l t s a t  0.20  amps.  met b y a LAMBDA L O T - W - 5 1 5 2 - A The  -5V  and D P U , i s r e g u l a t e d  supply,  3.26  required  triple by  from -12V s u p p l i e d to  the the  DPU b o a r d .  30  2 . 3 . 2 . 3 DFM INTERFACE The  CPU m u s t  and  the  the  DAU s i d e .  similar  communicate w i t h  D F M . As m e n t i o n e d  to  However,  that  of  previously,  the  the  12  interface.  gives  Appendix  interface  a E  resources,  little to  DFM. T h e r e f o r e ,  w i l l be d e s c r i b e d i n d e t a i l Figure  two s h a r e d  the only  t h e DSM  w o r k was  done  DSM w i l l  be  the  on  very  DFM i n t e r f a c e  here.  detailed  block  contains  the  diagram  of  the  schematics  DFM  for  this  interface.  R/W LOGIC  A  1 "7  CPU ADDR  DISPLAY RLE MEMORY  12 DPU ADDR  V  B U F F E R  16/  CPU DATA  16^ 16/  DFM DMA Figure__12.  On the  C P U . As  enables the  initial  the  CPU s i d e  Block  system  seen  in  startup, figure  CPU a d d r e s s of  the  d i a g r a m o f DFM i n t e r f a c e  onto  control  of  the  12,  the  the  DFM a d d r e s s  multiplexor. It  DFM i s  read/write  also  bus  enables  given  control  to  logic  by  selecting  the  CPU d a t a  31  on  to  CPU  the  DFM d a t a  then  commands  initializes into  DPU o n t h e is  from  enabling  the  of  the  of  refresh  the  date.  data  of  DFM t o the  fault  These  the  the  DFM a t occurs  currently  data  disrupting  completion the  that  allow for The  the  start  i n the  the  DFM i s  then  have  a  compatible  with  both  bits  four  is  initial  DPU  g i v e n to  control  t h e DPU o n i t s  refresh  the  are  12  bit  currently  now d i s a b l e d  the  the  no  control  Intel  2114,  CPU a n d  time the  used.  is  the  of  refresh  4 bit 450  at any  D F M . On  control  regain  returned.  lk x  The  prevent  DPU r e t u r n s  display  address  4K w o r d s  to  with  automatically  next  the  of  interaction  minimum a c c e s s the  The  e x p a n s i o n o f t h e DPU t o  CPU w i l l of  buffer.  This transfer  start  refresh,  DPU a n d  up o f  10  DPU's  C P U . The  made  writes  cycle.  buffer  the  RAMs  times.  only  display  the  tri-state  m u l t i p l e x o r now s e l e c t s  DPU. Note  two b i t s  later  CPU  address  the  DFM, i e . ,  DFM. C o n t r o l  start  The  the  other  of  the  by  a c c o m p l i s h e d b y a CPU command t o  cycle.  a  bus  of  control  even  if  a  The DFM i s static  nsec,  RAMS.  which  DPU i n s t r u c t i o n  is  cycle  32  P I L O T ENTRY  The P i l o t on  the  RS232C PED.  E n t r y D e v i c e (PED) i s  CPU. C u r r e n t l y , type The  terminal  most  light  of  when  the  likely  be  the  previous  CPU t h a t  the  accidental  be  for  available been pilot  for  detected. to  select  possible  system  to  be  indicate  restarts,  individual  keys  emulate  the  However, of  the  TMS9902  in  practice  programmable  13.  f l i g h t phase  their  after  be is  instruments.  be  An  will  end  to  reset system  will  key  will  errors to  of  signal  executed.  command k e y  available  requiring keys  depressed to  fatal be  The  execution.  A hardware  will  and  via  set  port  keyboard to  displayed.  A clear  reasons.  an i n p u t  PED c o n f i g u r a t i o n  key depressed  Additional  used  CPU  a  w h i c h must  key h i t s .  obvious  of  a particular  present,  circumvents  the  to full  shown i n f i g u r e  instruments  command k e y w i l l  present,  that  to  to  being  consist  represent  depressed  is  with  controller.  13. Diagram of  Each key w i l l subset  link  linked  keys s i m i l a r to  Figure  a  is  connected  CRT t e r m i n a l  communications  PED w i l l  function  a  f u l l - d u p l e x data  asynchronous the  DEVICE  allow  This also be have the  33  2 . 3 . 3 CPU SOFTWARE  SOFTWARE DEVELOPMENT TOOLS  The tools. the  CPU s o f t w a r e The  software  AMDAHL  cross  470/V.  assembler  assembler  for  was  for  the  Assembly  developed  the  using  CPU was was  the  and  accomplished  specifically  for  several  written  for  the  IBM 370/VM  development assembled  using  this  9900 was w r i t t e n u s i n g  GASS w h i c h was w r i t t e n British  generated  a  at  resident  C P U . The  general the  C o l u m b i a b y W. D e t t w i l e r [ 2 3 ] . The o b j e c t  University code  was  i n s m a l l modules by l o a d i n g these modules i n t o  resident  on  memory  expansion  board,  and  T M 9 9 0 / 4 0 1 - 1 TIBUG m o n i t o r t o v e r i f y  the  code.  tested  470  and  it  was  again  ANN ARBOUR t e r m i n a l Microsystems  M1000  created and  a  on the 1200 b a u d  PROM p r o g r a m m e r  where  then  to the  then  using  Once t h e  an  of  t h e RAM the  c o d e was  down l o a d e d  link,  cross  assembler  debugged  the  on  via  an  International  code  was  loaded  i n t o EPROM. The  TIBUG  development  by  monitor  allowed  supplying  memory, s i n g l e s t e p ,  set  the  fast,  capability  b r e a k p o i n t s and  efficient to  load  search.  software  memory,  read  34  2 . 3 . 3 . 2 REAL-TIME The multiple of  EXECUTIVE  CPU s o f t w a r e task  type  is  around  a  multiple  priority,  r e a l - t i m e e x e c u t i v e . The c h o i c e o f  e x e c u t i v e was b a s e d  the  centered  on the  following  assumptions  this made  type about  system: 1) m u l t i p l e number o f  tasks.  2) v a r i a b l e number o f t a s k s 3) p r i o r i t y i s queued.  changes  per  deferred  priority.  while  the  task  4) i n t e r r u p t s a r e c h r o n o l o g i c a l l y q u e u e d tasks of i d e n t i c a l p r i o r i t y l e v e l s . 5) maximum number o f t a s k s q u e u e d a t a n y one t i m e i s 1 0 .  that  for  will  be  6) h a r d w a r e i n t e r r u p t s c a n b e s i m u l t a n e o u s , but o n l y s i n g l e t a s k per p r i o r i t y . 7) o n l y 16 l e v e l s o f h a r d w a r e i n t e r r u p t s allowed. Before  describing  look b r i e f l y executive  at  the  looks  of  the  task  is  then  pre-empted and  with  is  the  queued  interrupting or  tasks  same  priority  the than  chronological  RDYB  the  are  tasks  ready-blocked of  scheduling  in  are  scheduler.  which  have Tasks  are  let  in  task,  us  Tasks  the  of the  and  which  pre-empted been which  task.  or  system. the  to  time  the  task  priority have  RDYP  queued are  first  real-time  The h i g h e s t  considered  pre-empting  queuing of tasks  tasks  queued.  ready  state.  of  This  a  priority  the  detail,  t a s k w h i c h was r u n n i n g a t  pre-empted.  by  in  a r e a l - t i m e e x e c u t i v e . The  interrupt  started  and  the  executive  o c c u r s , the  interrupt  associated  job of  after  When a n i n t e r r u p t  this  are  are  been state in  pre-empted have  This  same p r i o r i t y  a  a by  higher  implements level.  35  A task run  to  may a l s o  completion.  then  schedules  task  i n the  On  occurs  relinquishing,  or a l l o c a t e s  the  c o n t r o l to the  when t h e  task  has  real-time  executive  next highest  priority  queue.  The r e a l - t i m e the  r e l i n q u i s h . This  architecture  requiring  a  executive for  of the  small  this  system takes  advantage  TI9900 to develop an e f f i c i e n t  amount  of  storage  (164  words  of  executive  of  program  store). To the  illustrate  following  Command  the  memory.  specified of  the  in  service  linked  to  set  up.  This  say  the is  at  the  highest the  14  saved  program  The  interrupt  done  current status  is  If  tasks  the  of  the of  table  begins  at  in  lower  the  set  new t a s k ,  the  of  the  priority of  the  then  branches  to  the  routine  first  the  counter,  linked  on i t s front same  queues  task's  and p r i o r i t y )  this  the  also  priority  register  at  is  a  the  inserting  dependent  priority is  then  program  illustrates  list  tail.  by  in  location  register  and  The  is  (ie.,  Figure  new the  the  take  new R 1 4 , R 1 5 , and R 1 3  vector  the  us  value  and  i n the  let  currently  the  execution  of  routine.  task.  position in  saved  is  CPU i s  occurs,  Once i n t o  task  executive  the  interrupt  l o c a t i o n , current list.  priority  the  the  register,  Program  table.  information  register  is  task  pre-empted  status  are  address  pre-empted  interrupt  task's  The  that  status  set  in  this  pre-empting  the  counter,  specified  of  interrupt  respectively.  location of  Suppose  an  register  registers  end  When  program  current  operation  example.  Mode.  current  the  run  current into  a  list.  The  priority,  that  and  the  priority  lowest already  36  PRIORITY  RDYC  0  0  PRIORITY  0  STATUS  STATUS OLD P C  OLD  PC  OLD WP  OLD  WP  0  Figure exist,  the  new  priority.  task  Once  list  removes  be  task  also  the  its  gets  after  status  Note that  the  from  the the  tasks  task  queued to  list  task  same  queued,  the  the  The  head  status  e x e c u t i o n at  pre-empted  the  same m a n n e r .  at  list.  CPU b e g i n s  is  i n the task  of  may b e  the at  The  of of  the this  specified  the  head  of  is  called  list. The  RDYC  inserted  control  p r o g r a m i s r e s u m e d and t h e locations.  RDYC  pre-empted(RDYP)  now a l l o c a t e s  and  Diagram of  will  the  p r e - e m p t i n g (RDYB) scheduler  14.  linked  list  list  since  information  about  the  state  task  on w h i c h  it  handles  the  task  vector  the  tasks  both  stored  RDYB in  (TSV).  are  the  queued  and  RDYP  queue  is  Flowcharts  tasks. often  a  The  called  describing  the  description  all  e x e c u t i v e can be found i n Appendix A . As  can  be  interrupts,  both  seen  hardware  e x e c u t i v e when t h e y handled  by  the  corresponding requesting  from  occur.  TMS9901. to  service.  the  the  and  software,  are  Simultaneous hardware This  highest Once  previous  the  chip  generates  priority executive  queued  by  the  interrupts  are  an  device has  interrupt currently  queued  this  37  interrupt s e r v i c e are  the  remaining  lower  priority  t h e n queued i n a s i m i l a r  manner.  devices  requesting  38  2 . 3 . 3 . 3 COMMAND MODE The mode,  the  pilot.  CPU m o n i t o r s  an  of  such  the  tables  that  stored  a valid  to  handler  generates  new t a s k handler required a  the  and for  and  the  a  is  list.  real-time the such  EADS. as  These  status  work i s  of  end  of  the  task  required. refer  a  As an  to f i g u r e  a  command, tables  one  15.  Command h a n d l e r  and  appended  simply  the  the  command  or  executed by t h i s of  a  flexibility  and d e c i d e s  example  a  command  table-driven  e a s i l y updated  to  with  itself  CPU t h e  key  together  The  enters  upon  the  command.  operation  of  15.  CHAR  table  NEXT TABL  EOT  D  EOT  TABLE! Figure  entered  command.  EOC  EOT  latter  linked  queue  the  buffered  table  TYPE * s e e example in text  keys  this  from  final  the  t o be  CHAR  CON  of  In  and  this  are  a  to  gives  appropriate  the  that  use  To a d d  echoed  tables  interrupt The  commands  Once  up a t  Commands a r e  i n the  are  compares  executive  this.  for  detected.  vector  software  RDYC  Command M o d e .  depressed  command w i l l  command h a n d l e r  TYPE  key  state  the  PED, w a i t i n g  i n EPROM.  task  command c o d e  other  the  in  system  priority No  the  is  command h a n d l e r  pointer  to  task  the  end-of-command  detected,  set  background  Command k e y s w h i c h a r e  until is  CPU's  configuration  T5V NODE  39  When  the  keys  end-of-command  key,  an  it  E is  word. the  found,  If  assumed  p o s s i b l e next  end  table. of  If  an  pilot  the  and  to  be  check f o r type  the  is  is  i n Appendix A .  of  then an If  the  an  associated  for  with  following  search  is  found  end-of-command TSV t o  warning the the  1. I f  containing  the  EOC s t a t u s  error  waits  table  the is  an  (EOC) s t a t u s  t h e word  repeats  an  by  check t a b l e  then  then sends i t s  command h a n d l e r  and d i a g r a m s  will  found,  until  reached,  followed  an end-of-command  address  reached.  command h a n d l e r  the  depressed,  command h a n d l e r  continues  (EOT) i s  EOT s t a t u s  Flowcharts found  will  are  k e y s . The c o m p u t e r  This  table  reached  the  a CONTINUE(CON)  E is  next  ED  on  the the  or  an  status  is  executive.  sent  corrected  to  the  command.  Command Mode c a n  be  40  2 . 3 . 3 . 4 D I S P L A Y MODE The  majority  Display the  Mode.  of  In  this  DSM, p r o c e s s e s  along  with  the  mode,  this  other  CPU t i m e the  will  likely  CPU g a t h e r s  i n f o r m a t i o n , and  associated  be  in  the  information  stores  DPU commands  spent  in  the  the  from  information display  file  buffer. Each display loaded  display  tasks into  group of this  display  format.  task  the  scanning  of  display  task  counter,  inverted  and  Pointers  buffer,  when  updated  after  selection  each  every  indicates  the  informs  the  display  buffer,  CPU a n d  display f i l e  are  are  requests  associated the  several  tasks  pilot  with  a  each  CPU o f how  this  in  repetition This  the  is  then  count,  method  (ie.,  CPU  figure  often  resulting  task  s h o u l d be  DPU commands  structured  as i n f i g u r e  16.  loaded  16.  The  logically which  enables  c y c l e s ) . A zero r e s u l t display  starts  0003 w o u l d  buffer.  Display tasks  has  these  cycle,  shown  cycle.  4 refresh  the  to  w i t h each t a s k ,  current  refresh  that  pilot  the  is  of a t a i l o r e d update frequency  an u p d a t e once operation  with  counter  This  associated  anded  the  processed.  beginning  the  repetition  to be  by  it.  A repetition  information is  the  with  these d i s p l a y t a s k s .  At  by  requested  associated a  particular  format  from  is the  cause this  processed into  the  41  TYPE  REPCOUNT  POINTER  TASK ADDR  DATA  0 0 0 7  0 3  0 0 0 4  DATA 0 0 2 0  EOT TO OTHER DISPLAY TASKS Figure  The display task  type  16.  field,  task  to  Structure  of  display  shown i n f i g u r e  follow.  The  16,  following  tasks  specifies  are  the  current  04  -  causes  of  display  FE Static  o f s t a t i c DPU commands  a jump t o a d i s p l a y d a t a u p d a t e  05 - g e n e r a t e s a l i s t  s p e c i f i e s a n end o f  DPU  commands  task  reside  in  EPROM  display.  Dynamic  data  resides  in  from  display  data  update  routine  a  processes  the  simply  a display  information  indicates  to  t a s k has been  RAM a n d  and s t o r e s the  routine  o f d y n a m i c d a t a i n RAM  and  n e c e s s a r y DPU commands t o d r a w l a b e l s a n d s t a t i c  of  type  types: 03 - g e n e r a t e s a l i s t  type  the  display  reached.  it  is  which  contain  the  symbols on usually  reads  i n R A M . The  task handler  the  updated the  DSM,  end-of-task that  the  end  42  The  d i s p l a y update  elements  of  reading  the  error  the  routines  mentioned  display task handler.  required  conditions  data  and  from  the  processing  before  These  routines  DSM, c h e c k i n g the  are  data  to  the  look  the  key after  data  for  at  the  arrive  r e q u i r e d DFM commands. The generated the of  display by  each  display f i l e commands  DFM t o  allow  handler  has  relinquishes  task  and  display  buffer, the  itself  to are  into  the a  required  the the  the  complete  buffer.  preceded by the  l o c a t i o n of of  DPU commands  display f i l e  DPU commands a r e  update  scanned  loads  task  starting  random  low p r i o r i t y tasks Mode.  handler  these  commands  D F M . Once  the  display  task  In  number in  display buffer,  the task it  r e a l - t i m e e x e c u t i v e and any r e m a i n i n g  processed  before  the  start  of  the  Update  43  2 . 3 . 3 . 5 UPDATE MODE The the  U p d a t e Mode b e g i n s o n c e t h e DPU h a s  screen  generating  (Figure 9). a  level  handler which i s at In in  interrupt.  display  specified  in  file  the  i n the  the  This  CPU i n s e r t s  buffer  locations  display f i l e  into  the  preceding buffer.  CPU o f  allows  a higher p r i o r i t y l e v e l  the Update Mode, the  the  stored  6  The DPU s i g n a l s  finished this  the  to  refreshing event  display  DFM a t set  Once t h i s  the of  is  found  in  listings  for  Appendix for  the  the A at  CPU a r e  routines the  end  previously of  this  DFM commands completed,  described  report.  l o c a t e d i n Appendix B .  stored  addresses  u p d a t e mode r e l i n q u i s h e s t o a n y r e m a i n i n g l o w e r p r i o r i t y Flowcharts  task  finish.  t h e DPU commands  each  by  The  the  tasks. can  be  program  44  2 . 4 D I S P L A Y PROCESSING UNIT (DPU) 2 . 4 . 1 GENERAL D E S C R I P T I O N As m e n t i o n e d  i n Section 2.1,  DPU commands s t o r e d co-ordinate rate the  of  i n t h e DFM a n d r e f r e s h  driven vector  50Hz  to  prevent  CPU a n d h a l t s  the DPU's main task i s  generator. screen  itself  the  refreshed  The DPU i s  o n c e a l l commands  read  CRT d i s p l a y v i a a  The CRT i s  flicker.  to  i n the  at  started  DFM h a v e  a by  been  processed. For DPU  reasons  is  configured  microsequencer The two  set.  The  The  written make  up  The  for  this  highest  DPU commands  lowest at  around  later,  an  the  this  make  level  is  level,  using  firmware  for  instead  of  software  since  strongly  linked  be e a s i l y a l t e r e d  the  up  termed  the  to  is  the  the  series  unit  architecture level  architecture  AMD2900  and a r i t h m e t i c and l o g i c  software  levels.  level.  to be d i s c u s s e d  the  can  macro micro  micro  of  i f d e s i g n changes  are  be  separated  termed level  level.  term  instructions  architecture  bit-slice  the  at  the  The  programs  is  used  level  are  machine, but  needed.  macro  available,  firmware this  into  instruction  instructions  D P U . The  the  (ALU).  commonly the  of  yet  can  45  2 . 4 . 2 DPU MACRO COMMANDS The design  use of  set  development  The based  the  at  the  for  DPU m a c r o  w o r k done  the  space  The  16 b i t  with  the  CPU. Only  command. A l s o , DPU  vector  commands  moving  of  bit  for  17,  vector are  a  is  This  its  time  and  EADS  was  was  carried  Massachusetts.  of  its  compatibility for  bit  X  each  generation 10  DPU commands  bit  DPU of  a  display  the  and  commands screen.  the  sequence i n which  the  control  which The  17.  can be  are  subdivided  commands. related  control  DPU commands,  The  to  the  commands  are  contained  in  executed.  DPU commands i n e a c h o f t h e s e two g r o u p s  the  in  a DPU m a c r o  work  required  10  commands  those on  the  beam  o p c o d e and  select  and  this  s e l e c t i o n of  word w i d t h a l l o w s the  the  the DFM, are The  for  o f t h e DPU commands i s g i v e n i n f i g u r e  groups,  to  the  chosen because  set  shown i n f i g u r e  related  tradeoffs  space.  A list  two  this  reliability.  CPU w o r d  16 b i t  instruction  co-ordinate  into  the  of  software  command s e t  in  the  a 16 b i t m a c r o w o r d w i d t h was d e c i d e d  w i d t h was one  design  writing  Charles Stark Draper Laboratory i n  upon.  As  of  and  shuttle[19] .  As m e n t i o n e d e a r l i e r ,  good  The  amount  execution,  c o m p l e x i t y , s i z e and  l a r g e l y on t h e set  of  set.  enables  hardware/software  i n c l u d e the  speed  design of  command out  tradeoffs  architecture  instruction  involves several  time,  cost,  microprogrammable  own m a c r o  D P U . These  hardware  a  one's  instruction the  of  a  12 b i t  argument.  The o p c o d e  c o r r e c t m i c r o r o u t i n e needed  consist  enables  to i n t e r p r e t  the  of a 4 DPU t o  a particular  3 4 0 OPCODE  15 ARGUMENT  NOP JUMP TO SUBROUTINE NOT  DRAW  SET  0 0 0 1  USED  0 0  1 0  SYMBOL  0 0  1 1  SUBROUTINE  SYMBOL  ROM ADDRESS  BRIGHTNESS  0 1 0  0  BRIGHTNESS  BRANCH  0 1 0  1  BRANCH  NOT  USED  0  1 1 0  HALT  SHORT  VECTOR  X  CO-ORDINATE  Y  CO-ORDINATE  10  0 0  V\%  1 0 0 1  V\U  010  DRAW SHORT VECTOR SYMBOL ROM RETURN FROM SUBROUTINE  NOT  USED  NOT  USED  1  1  \MU  oo  1 1 0  1  -F  0 1 0 0 0 0 0 0 0 0 0 0  1 1 1 0  1 1 1 1 F i g u r e 17. L i s t  o f DPU commands  ADDRESS  LEVEL  ADDRESS  47  macro  instruction.  particular The  The  opcode b e i n g  vector  argument  meaning  on  the  and  draw  executed.  commands c o n s i s t  1) d r a w s h o r t  of  vector  2)  load  10 b i t  X co-ordinate  3)  load  10 b i t  Y co-ordinate  4)  draw v e c t o r  5)  set  beam  depends  brightness  6) d r a w s y m b o l The  V / l bit  vector to  1,  will  commands, the  be  visible  on  determines current  will  on  the  the  [0,0]  i n short  beam i n t e n s i t y .  screen. the  the or  location  The  relative  this  R/A will  to  the  vector  be  the  lower,  the  is  d r a w n and  is  set  bit  to  no v e c t o r  drawn  left  the  R/A b i t  is  be added  to  the  current  p o s i t i o n to  the  1,  If  absolute  if  Otherwise  a  vector  is  set thus  0,  the  will  be  (relative/absolute)  Thus,  position.  bit  l o c a t i o n but  vector  is  If  next  screen.  whether  location  the  found  i n t e n s i f i e d when t h e  b e moved t o  visible  screen.  controls  beam i s  beam w i l l  This  (visible/invisible),  the  co-ordinates  hand value  relative [0,0]  bit  to  the  location.  corner  of  the  of  the  argument  a r r i v e at  the  new beam  will  be  enable  the  treated  as  absolute. The vectors  short having  vector a  was  maximum l e n g t h  b o t h X and Y c o - o r d i n a t e s b e a g r e a t memory s a v e r short  vectors.  selected  with  of  to 16  divisions  DPU t o  draw  in  either  or  one DPU command. T h i s  proves  to  when d r a w i n g s y m b o l s w h i c h  require  many  48  The l o a d  10 b i t  X and  command, e n a b l e s  the  the  screen.  load  the  draw  several the  vector  times  other The  how  set  useful  one  the  beam  to  total  the  axis without  are  draw  when  space of  move  respecifying  the  intensified  in maintaining  their  symbol  ROM a t  the  in this in  vector  separate  DPU t o  command e n a b l e s  useful of  commands b e g i n n i n g stored  draw  co-ordinate  Y commands  enable  plus  from  the  the  beam  value  length.  DPU t o on  of  This  the  specified at  this  ROM h a v e  t h e DPU t o  The c o n t r o l g r o u p  DPU t o  location  and  to  executing the next  consists  instruction,  The  short  opcode  to  these  of  return  brightness is  also  screen.  the  location.  screen.  instruction  enables  a different  ROM w h e n  command r e t u r n s  subroutine  command  select  the  constant  i n h i g h l i g h t i n g w a r n i n g i n f o r m a t i o n on the  symbol  to  load  appears  is  regardless  The  stay  X and  beam-brightness  instruction  vectors  to span the  command  along  Y commands,  axis.  bright  This  The  user  10 b i t  access  the  execute  t h e DPU  vector  commands  enable  the  instructions.  DPU t o The  NOP  command i n t h e D F M . the  branch  from  instruction,  subroutine  jump  instruction,  and NOP i n s t r u c t i o n . The  branch  specified jumping  instruction  location  over  areas  in  the  of  code  enables  DFM. T h i s stored  in  the  DPU  to  instruction the  jump is  DFM t h a t  to  useful  a in  c o n t a i n DPU  subroutines. The jump t o jump of  to  the  subroutine  a specified next  instruction also  location in  instruction  to  be  the  enables  the  DFM. However, the  executed  on  returning  DPU t o  location from  the  49  subroutine level  of  is  stored  in  subroutining i s  a  in  s a v i n g DPU c o d e  rulers  are  to be drawn.  the  from  where  the  in  the  microcode.  symbol  microroutine.  microinstruction symbol  included limited  symbol  This  is  causes  can  also  wait  when  such  as  execution  at  address  register.  a branch  to  return  from  a  be  executed  one  extremely  structures  return  causes  It  DPU command due  to  the  usefulness  types  and b r a n c h  could  types  to  the  used  the  Fetch  the  draw  as  outside  include  complexity  circle, Although  available for set  considered  application  on compare. are  were  hardware  included generate  t i m e , DPU o p c o d e s These  i n the  Only  of  a  the  3 draw  routine.  Other  These  cycle  instruction  i n s t r u c t i o n begins  NOP i n s t r u c t i o n  routine  register.  repetitive  subroutine  location previously stored Finally,  address  allowed. This  useful  The r e t u r n  return  scale  i m p l e m e n t e d w i t h some a d d i t i o n a l  and  but  required  of  other reset  and  airborne  draw dashed not  were  possible beam,  rotate at  this  instructions.  which  hardware[24],[25].  their  graphics.  line,  implemented  not  could  be  50  2 . 4 . 3 DPU HARDWARE As is  alluded  simple  display of  and  based  these  to  earlier,  very  o n commands  as p o s s i b l e .  microcomputer  task  indeed.  general great  deal  system to be  very  of  job.  the  future  without  the  A  the  D F M . The  with  as  16 b i t  j o b would be a  power  unused.  hardware  a  of  inherent  adding  cumbersome in  other  debugging  s y s t e m was  purpose  microprocessor  On t h e  in  a  such  a  hand,  a  hardwired  designed  more  the  execution  little  this  spent  ease  of  the  use  it  would  facilities  to  the  however,  be  met  general  purpose  advent  enables  large  of  design  yet  designer  and  testing  microprogrammable  architecture  yields  to  produce  efficient  enough t o  accomodate  flexible  bit-slice  the  a a  enough  of  can,  in  microprogrammed  facilities,  The  change  inherent  specialized  of i t s  series,  hardwired  and  The  design  AMD2900  from  display  refresh  or  go  Once s u c h  by  changes.  DPU m u s t  an 8  the  be  inefficiencies  architecture[26].  utilization  The  the  date.  microcomputer,  machine  refreshing  a conventional, general  of  terms  of  quickly  for  would  in  flexibility  without  deal  would  inflexible  The  done  hardware,  time  a later  reads  containing  system  do t h e  system at  be  A great  purpose  it  To t a i l o r  system,  c h i p and a s s o c i a t e d  task  specialized.  commands m u s t  overhead  the  families, to  meet  such this  overhead  a  as  the  criteria  required  in  a  machine.  bit-slice  components information.  that  processor operate  Figure  18  is on  shows  4  built  using  bit  chunks  the  basic  a or  set  of  LSI  slices  architecture  of  of a  51  bit-slice  As  processor[27]  can  sections.  be  One  manipulates  the  microsequencer  Figure  18.  seen,  the  Bit  slice  architecture  bit-slice  processor  section  is  built  around  the  data.  The  other  section  is  element  and h a n d l e s  the  consists  of  ALU element built  around  two and the  c o n t r o l and s e q u e n c i n g o f  the m i c r o i n s t r u c t i o n s . At  the  available. 3000  time of  These were  series,  Macro-logic the  Advanced series,  Motorola  DPU was a s  the  10800  DPU d e s i g n ,  the  six bit-slice families  were  Memories 6701/67110,  Intel  Monolithic  Micro  Devices  Texas I n s t r u m e n t ' s series.  2900  series,  Fairchild's  7 4 S 4 8 1 / 8 2 and SBP0400 and  The s e l e c t i o n  c r i t e r i a used  follows: 1)  Availability  2) 4 b i t - s l i c e count  architecture  to  reduce  chip  for  the  52  3) C a p a b i l i t y f o r 200 n s e c f u t u r e speed enhancements 4) A n i n t e r n a l r e g i s t e r The Texas  Fair child  Instrument's  internal  register  processor.  This  interfaced  to  available,  and  For  and  these  circuit  and  file.  This  the  meet the  the  only  the  a  200 n s e c  diagram of  the  for  the  chip  time  AMD2909  an  series  count  was  cycle  The  lack  AMD2900  low  AMD2901 A L U and  wide.  series  microsequencer,  the  for  2 bits  Motorola  leaves  the b a s i c elements  schematics  are  promised  AMD2909  could  as  A block  series  time  file  series  processor  reasons,  were s e l e c t e d  Intel  cycle  when  currently requirement.  microsequencer  i n the DPU.  DPU i s  shown  in  figure  display  processor  can  19 be  and  the  found  in  for  the  Appendix E . In control  order store  to of  allow the  use  DPU, the  the  CPU c y c l e  time  to  allow  200nsec  a  the  or  666  of  cycle  nsec.  cycle  available  t i m e was i n c r e a s e d  The DPU was  time  EPROM  should  however,  faster  to  twice  designed  PROMs  come  available. As  suggested  microprogrammed architecture.  machine  It  DPU f i r m w a r e w i t h First referring from  let to  the  us the  DFM  microinstruction. the  10  bit  earlier,  macro  is best  the  microinstructions  are  strongly  then  to  linked  i n c l u d e the  t h a t of the hardware trace  through  diagram during The  in  figure  the  address  address  the  machine  d e s c r i p t i o n of  the  e x e c u t i o n o f a DPU command, 19.  this  register.  the  the  configuration.  A DPU command  execution of  to  of  of  the  DPU command  The  upper  4  is  read  previous is  held  in  bits  of  the  MEMC CPU rL ADDR BUS  122:1 • MLPX^  12 MACRO  F  3  sJ2  CPU DATA1  <'16 DFM  [BUFFER  |  SYMBOL ROM  :  16  He "To L^:  SYMBOL [ADDR REG  ,'16 8  12  LRJ  LONG LATCH  ]fiDDR REG  SHORT X LATCH  CONTROL LATCH  SHORT Y LATCH  PNTENSITYI LATCH  /12 uSEQ  10  ALU  CONTROL  QON' ROL  STORE  no  20 | PIPELINE  MEMORY CONTROL  ICON.  12  no 10  INTENSITY CONTROL  ALU  M D  M D  '10' C  t  L  REGISTER  LATCH CONTROL  RAMP  CLOCK CONTROL  '10 " x b no  V Y  a  10  M D  M  t  t  CONTROL -C=-MEMC  "lO  '10 LO  -LC  1-<* ICON  F i g u r e 1 9 . B l o c k d i a g r a m o f DPU  54  command entry  are  padded  address  command.  of  with the  This  4 rightmost  microroutine  scheme  microinstructions  to  16  remaining  12 b i t s  of  the  latches.  Each  of  entry  address  address  microinstruction bit  pipeline  fetching current is  of  formed  each  loaded  stores  this  DPU  number  of  i n the  the  argument  bit  DPU command.  latches  The  argument  argument  from  the  upper  will  four  through the microsequencer  of  fetched  register the  for  8  of  a  later  be  operands.  DPU command i s p a s s e d starting  These  realize  maximum  DPU command a r e latches  p r o v i d i n g the to  the  instructions  p o s s i b l e DPU command f o r m .  The  used  limits  these  used as ALU s o u r c e  zeros  to p o i n t  of  the  to  the  the  appropriate  microroutine.  Each  from  control store  is  a  (instruction  next  bits  register)  microinstruction  i n s t r u c t i o n . Addressing of  done b y t h e m i c r o s e q u e n c e r  the  under  loaded which  while  rest  into  20  enables  executing  the  of  the  microroutine  c o n t r o l of  the  NXT f i e l d  in  the m i c r o i n s t r u c t i o n . There  are  these formats make  up  two  basic  have s e v e r a l  the  processing  corresponding  fields  breakdown of each f i e l d The involving  first the  microinstruction  f i e l d s which c o n t r o l the unit.  are  The  shown  in  is  A L U . The e n a b l e  used  or  formats  figure  for  bit  20.  i s used  halting  the  to  arithmetic  enables  which i s n o r m a l l y h e l d i n a stopped  as b r a n c h i n g ,  two  Each  of  devices and A  that their  detailed  can be found i n Appendix C.  format  The s e c o n d f o r m a t  formats.  the  clock  operations to  the ALU  mode.  implement program c o n t r o l  processor  to  wait  for  such  a vector  to  55  0  X  •2 3  ALS  5 6  8 9  ALD  NXT  INC  NXT  MEM 9  Figure be  drawn.  20.  18  REG MEM INC SEL  BRANCH ADDRESS  0  1 0 1 1 1 2 13 1 5 1 6  1011  1213 1516  Microinstruction  fields  E "a B  .1819  56  2 . 4 . 3 . 1 A L U FORMAT Figure Three  of  21  shows  these  the  slices  structure  make  up  of  the  the  12  AMD2901  bit  ALU s l i c e .  ALU u s e d  in  this  system.  »l  »l  »!  Figure  21.  The A L U f u n c t i o n s on  the  are  decoded  and n e g a t i v e subtract  i n checking for  or p o s i t i v e o f f s e t s . and  pass.  ALU s o u r c e t o b y p a s s  The  pass  of  ALU s l i c e  i n the  DPU command c u r r e n t l y b e i n g  microcode overhead  add,  Structure  2901 h a r d w a r e ,  executed. r e l a t i v e or  This  allows  data  t h e A L U a n d go d i r e c t l y t o  reduces  absolute  The A L U f u n c t i o n s  the  vectors  decoded  selected the  based  by  are the  destination.  57  This the  is  c o n v e n i e n t when l o a d i n g t h e m a c r o a d d r e s s  return-from-subroutine  the b r i g h t n e s s The argument signals the h a l t the  address  also  strobe,  used  to  address on  a  upon by the  is  the  the  ( A L S ) may  macro  decoded  symbol  general  register  operands  or  register  operated 16  latches,  load  or  brightness  D / A from  latch.  ALU s o u r c e  are  register  register.from  from  address  the  draw  a n end used  symbol  ALU a l o n g w i t h  purpose  registers  selected  by  the  in  selected  register.  ALU s o u r c e  indicate strobe,  be  to  Two  field.  refresh  load  the  the other  These  are  cycle,  and  s y m b o l ROM  command.  These  sources  are  the  stored  i n 4 of  the  the  2 bit  of  from  data  A L U . The register  general  select  purpose  field  (REG  SEL). The  ALU o u t p u t  general purpose control, latches  the  future  registers  macro  (0-2)  enhancement  ( A L D ) may  be  u s u a b l e as A L U s o u r c e s ,  address  of the v e c t o r  Three b i t s  destination  register  or  the  any  of  the  4  the  brightness  X and Y c o - o r d i n a t e  generator. are  left  available in  of micro c a p a b i l i t i e s .  the  ALU f o r m a t  for  58  2 . 4 . 3 . 2 BRANCH FORMAT The  branch  format  m i c r o i n s t r u c t i o n branches, The  8  bit  branch  address  connected  d i r e c t l y to  specifies  a  branch,  microsequencer executed The When  this  and  is  used  and  to  to  control  specified  the  execute  in  the  vector  generator.  the  branch  format  2909 m i c r o s e q u e n c e r .  then  this  addresses  address the  next  unconditional  is  If  passed  the  is  NXT f i e l d  through  microinstruction  the  to  be  in microstore. branch bit  draw o p e r a t i o n  format is  set,  on the  also the  contains vector  CRT. T h i s  greater d e t a i l i n section  2.5.2.  the  vector  generator  operation  control  executes  will  be  a  bit.  vector  discussed  in  59  2 . 4 . 3 . 3 COMMON F I E L D S Common t o NXT, as  and  well  a l l m i c r o i n s t r u c t i o n formats  ENAB f i e l d s . as  those  A l l options  mentioned  are  associated  the  with  p r e v i o u s l y can be  MEM, I N C ,  these  found  in  fields  Appendix  C.  or  The  MEM f i e l d  symbol  ROM a s  is a 2 bit the  field  which s e l e c t s  memory c o n t a i n i n g t h e  either  current  t h e DFM  DFM command  instruction. The  INC f i e l d  register  the  incrementing of  and s y m b o l ROM a d d r e s s  The data  controls  ENAB f i e l d  enables  the  register.  or  disables  the  ALU c l o c k ,  i s n o t d e s t r o y e d when e x e c u t i n g b r a n c h f o r m a t The  NXT  field  microsequencer w i l l Figure  22  controls  select  DFM a d d r e s s  from  where  so  that  instructions.  and  how  the  the next m i c r o i n s t r u c t i o n a d d r e s s .  illustrates  the  structure  of  the  AMD2909  four  multiplexer  microsequencer. The is  used  microsequencer to  select  branch address (the  next  source  from  either  multiplexer  the  the  next  or  microcode  command l i s t  used  the  the  counter  stack,  as  the  address[28].  This  f o u r b i t NXT f i e l d .  initialization  for  microprogram  subroutine  that  address,  the microsequencer address  t o b e e x e c u t e d on t h e n e x t c l o c k The  a  the  microinstruction  i s c o n t r o l l e d by the  zero thus c a u s i n g the  input  opcode d e r i v e d e n t r y  address)  During a reset operation, to  a  the branch format,  sequential  of  contains  is  routine i n control  set  store  cycle. current  c a n be found i n A p p e n d i x F .  version  of  the  DPU  Figure  22.  Structure  of microsequencer  slice  61  2 . 5 VECTOR GENERATOR 2 . 5 . 1 GENERAL The the  vector  DPU a n d  intensity most  generator  on  command  between  recently  co-ordinates. end  DESCRIPTION  the  from  the  new end  the  X and Y c o - o r d i n a t e s  DPU, draw  co-ordinates,  The v e c t o r as  accept  previously supplied  supplied  co-ordinates  accept  the  must  generator new s t a r t  co-ordinates.  should  The  s h o u l d be r e l a t i v e l y c o n s t a n t  Either and  the  the  points  line  analog  circuit  latter  method  section.  then  possible on  the  chosen  by  line  to  are  illuminating  the  treat  reasons  specifed  line  the  and  end last  ready  to  should  be  l o c a t i o n s , and  generation.  calculated these  the  line.  vector  the  and  the  and b e  along the  CRT beam a l o n g for  then  desired  approaches  straight  drawn  moves was  a  start  generated  intensity  two  the  of  the  co-ordinates  s h o u l d b e g i n and end a t  are  line  co-ordinates  ie.,  straight,  There  a  from  digitally  points,  specific  discussed  in  or  an  line.  The  the  next  62  2 . 5 . 2 HARDWARE SELECTION AND DESCRIPTION The  design  criteria  for  the  vector  generator  used  in  the  EADS w e r e 1) s i m p l i c i t y o f 2)  l o w DPU o v e r h e a d  3)  limited  4)  smooth l i n e s  5)  capability for  The  digital  Differential Rate  hardware  number o f  future  methods  Analyzer  (DDA),  Multiplier(BRM)  adjustments  speed  considered the  [ 3 ] , [ 2 ] , [ 4 2 ] , [431•  of co-ordinates which are  required  segment.  were the  inherent vector  especially  The  low speed,  generator,  method,  with  Enroute  A l l of  Digital  problems  lines  Binary  these  methods  used to approximate with  some DPU o v e r h e a d  these  required  lacking  these  c o n s i d e r e d were  and  visual  the  methods  to  set  up  smoothness,  these  methods  methods,  This  Terminal  Montreal[17].  method  Figure  23  integration  method,  was  the  number  of  The  sensitive  generator. t h e °^ , 1-o< m e t h o d  proved  System  the  t h e <\, l - o < m e t h o d [2] , [3] , [42] , [43] .  alignments r e q u i r e d by the  promising.  the  i n the BRM.  exponential  Of  major  and  The a n a l o g m e t h o d s  problem  were  S y m m e t r i c a l DDA, a n d t h e  produce a l i s t line  enhancement  very  seemed  satisfactory  (JETS)  developed  gives  a  block  by  in  the  most  the  Joint  CAE I n d u s t r i e s  diagram  of  the  in  vector  generator[3]. To straight  describe line:  its  operation  consider  the  equation  of  a  M D C M D A C  Yb  ON  64  X = X a ( l - o i ) + XboC Y = Ya(l-«<.) + Yb-rfwhere  [Xa,Ya]  end  are  the  co-ordinates.  trace  out  figure  the  23,  equation converters low  cost  (MDAC).  by  particularly  using  The r e c e n t  integrator  shown  linear.  To  and  co-ordinates  voltageo4.is  then  set  to  beam i s o n w h i l e t h e is  to be  beam.  CRT t i m e  Similarly,  past to  0  and  the into  1-°^ i n  the  their  analog  devices  Also  the  need the  switch I  is  1,  at  ramp  not  be  starting  respective  similarly  from 0 to  to  these  vector,  Yb a r e  the  to  digital  diagram  [X,Y]  Referring  o f o^. a n d  the  the  latches  loaded.  closed.  i f the  The  The CRT  line  segment  this  1.  end  co-ordinates  some d e f l e c t i o n l a g when a c c e l e r a t i n g  some  o s c i l l a t i o n s occur  problem the  The beam  overcome the  Initially the  Xb and  ramp r i s e s  a l l o w t h e beam t i m e t o  load  loaded  there i s  t h e b e a m . To a v o i d continued  in  pair  1.  of  are  intensified.  In p r a c t i c e , the  to  attractive.  generate  X a and Y a a r e  end  0  availability quite  [Xb,Yb]  co-ordinate  multiplying  circuit  co-ordinates the  the  and  multiplication  by  the  the  of  asoCmoves f r o m  that  obtained  co-ordinates  values line  see  makes  generated  The  desired we  is  starting  it  was  is  then  would  alleviate  the  pairs  and r e s e t t i n g  settle with thought  sweep  necessity the  then  turned  deflection lag  co-ordinates  and  ramp i s  ramp.  Xb  it  and  thet<.ramp of  and  give  off  at  the 1  to  off. be  with  down  reloading  b e l o w 0 and  0 to  turned  would Yb  decelerating  started on a t  t h e beam  that  when  from the  beneficial the 1 two  new to  0.  to  start This  co-ordinate  65  However,  one  drawback  with  t h e c^, I-** m e t h o d  is  that  the  equation: V. + V = 1 must  be  kept  results.  It  one  side.of  but  not  that  the  either  is  This  the  with  dependent  on  p r o b l e m was  driving over  on  screen.  the  l o w , and  allows if  is  The to  vector, beam  ramp  equation  1024  could  g o i n g from 0 to  t h e oC, l-o( m e t h o d the  length  the  integrator.  speed  and  thus  short  parts  line  on  Therefore,  for  for  lines  of  final  design  reduce  the  copy  for  acceptable  a l w a y s b e met 1 or  the  long  it  is  lines set  screen  is  from  that  for  1 to  0,  the  line  constant  ramp  a DPU command  which  for  a  This  c o n t r o l of  to  the  higher.  then line  ramp  allowed intensity  voltage  T h i s method  be b r i g h t e r  schematic  number  of  is  shown  DPU commands  the  than  is also  others,  area.  end  in  Appendix  required  to  G.  In  draw  a  automatically reset  co-ordinates  into  the  new  p a i r need be  the  start  specified  generation.  CRT u s e d  display.  old  so t h a t o n l y one c o - o r d i n a t e  each v e c t o r  usuable  in  t h e DPU m i c r o c o d e d d r a w r o u t i n e s  and  The CRT  the  part  desired.  co-ordinates for  1  overcome by a d d i n g  voltage  the  certain  that  order  ramp,  drawback  control  set  within  both.  intensity  set  to  was f o u n d  Another  speed.  true  This  to  d i s p l a y these vectors  CRT h a d  a  two  phosphor  was  a T e k t r o n i x 602  screen  of  8x10  cm  66  CHAPTER I I I  SYSTEM PERFORMANCE  3 . 1 OVERALL SYSTEM PERFORMANCE The  overall  looking  at  how t h e  information A  system  is  of  in  five  when  considerably analog  11  compared  instrumentation.  with  panel  best  to  be  earlier  described designs.  requirements  illustrates  requirements  than  at  of  currently  by This  1.  least  conventional  earlier  the  by  e v e n when d u p l i c a t e d ,  area  a  cockpit this  size  conventional will  require  required  by  the  instrumentation.  Although p i l o t reaction has  up  over  shown  The s y s t e m ,  less  area  realized  Figure  can  i n a comparison g i v e n i n table  cockpit  was  instrumentation. reduction,  system measures  illustrated  reduction  factor  performance  been  shown  from  previous  t i m e can be d e c r e a s e d  t i m e measurements were n o t made, studies  that  the  pilot  it  reaction  by:  1) D i s p l a y i n g o n l y t h e i n f o r m a t i o n r e q u i r e d for that particular phase of the flight[29],[30]. 2) D e c r e a s i n g the r e q u i r e d to see a l l  angle of eye movement instruments[29],[30].  3) D i s p l a y i n g i n f o r m a t i o n i n a f o r m s u i t a b l e for the p i l o t ' s r e q u i r e d a c t i o n s [ 9 ] . 4) Displaying warning information attention getting fashion[31]. 5) U s i n g s y m b o l s w h i c h b e t t e r information displayed[9]. Figures formats  24,25,  possible  instrumentation a  set  of  engine  and 26 g i v e e x a m p l e s  with  the  required  EADS.  for  parameters;  Figure  takeoff; and  represent  of  the  24  could  figure  figure  in  26  an  the  types of  represent  25 m i g h t could  display the  represent  represent  the  67  glide  slope  (ILS).  and  Notice that  capable rather  than  greater  aircraft, display  of  that and  is  is  the  this  be  EADS.  the  landing  that  this  particular  information  system  system  flight  all  the  is  phases,  time  to  scan  these  considerably better  than  the  required  required  degrees  required  illustrated  in  form  displayed  The w a r n i n g  a brighter  repetition  beam,  or  in  as  in  by  the  displays  90  some  degrees  commercial  space  shuttle  26 i l l u s t r a t e s  could  represent  the  glide  glide  path  (the an  ability  pilot's  vertical  warning  getting  be  fashion  highlighted with  the  use  by  to  flash  of  to  display information i n  (the  bar)  to  the  square  horizontal a  would  to  put  actions.  runway  bar)  plane  figure and  (bright  t h e n move the  This  the  square)  the  bars  on  its  until proper  course.  Figure represent  24 shows the  the  ability  to  choose  information  displayed.  could indicate  the  of  could  the v e r t i c a l speed,  indicate  indicate  can  required  slope  I L S . The p i l o t  intersected  landing  attention  information  the  the  with  an  figures,  count.  for  equipped  in  the  c a n b e made  suitable  they  illustrate  currently  40  not  can  Figure a  instrument  system[32].  information  the  figures  e y e movement  This  Although  using  an  aircraft.  20 d e g r e e s .  with  these  for  displaying a l l  The a n g l e  or  path  of d i s p l a y i n g i n f o r m a t i o n for  conventional  is  glide  the  altitude  airspeed  and  the  the  The  plane, the  centre  symbols which right  the  vertical  left  vertical  top h o r i z o n t a l r u l e elements  better  could  rule rule could  represent  68  the  plane  attitude.  information  they  These  symbols  d i s p l a y then  the  A maximum o f  used.  twice  the  space A  shuttle  good  changes figure  figure  is  is  display  deal  of  provided  thorough  the  system  insensitive supply  system  suffered  analog  type  symbols can of  symbols  in  system.  testing  no  cockpit  be in  instrumentation  A display  to  format  was  fatal  generated  such  as  implement.  c o n f i g u r a t i o n worked w e l l .  surrounding  transients  the  system.  this  reliability  to  256 d i f f e r e n t  flexibility by  face  a l l o w a b l e number  24 r e q u i r e d o n l y 3 man d a y s  The d i s t r i b u t e d no  the  represent  simple clock  display usually used. This  better  done,  errors  once  and  debugged,  seemed  electromagnetic by other  fully  remarkably  noise  equipment  Although  and  on t h e  power  same  test  bed. The  system  current  analog  $2200, This  initial  ease  testing the  in  significant  data to  of  testing period.  The  price  of  complete  individual units  total  in  cost  system  equipment  $500 -  cost  and  the  for  a  $700  over was CRT. single  alone. this  system  Each  system.  was  unit  was i n d i v i d u a l l y d e s i g n e d the  reduction  acquisition  the  indicator  design  architecture  a  instrumentation.  the  compared  altitude  The  of  type  excluding  can be  analog  shows  Thus  verified in  during  the  distributed  and d e b u g g e d b e f o r e the  the  ability  to  final  test  should ease the burden of o v e r a l l  each system  testing. A simulate  decrease a plane  in  complexity  equipped  with  of this  the  equipment  d i s p l a y was  required  also  to  realized.  69  This  decrease  in  only  took  small  displays  six  complexity 10  line  shown i n f i g u r e s  is  indicated  routines  24,25,  and  to 26.  by  the  simulate  fact  that  it  data  for  the  F i g u r e 24. Photograph of  take-off  format  Figure  25. Photograph of engine data  format  Figure  26.  Photograph  of landing  format  73  EADS Nunber o f 3 Distributed Processors Complexity o f MEDIUM Distributed Elements Ability to Display Selected Information  YES  R e q u i r e d Scan A n g l e (°)  <20  Cockpit Area R e q u i r e d by Display(sq.in  25  R e f r e s h Rate  Conventional Space Aircraft Shuttle Instrumentation Display [40] System[32]  DIAS [6]  ELANDIS [34]  DFMS [18]  >7  2  2  2  HIGH  MEDIUM  HIGH  HIGH  LOW  YES  NO  YES  YES  NO  <20 *** > 100  <40 » 54 .  <20  <40  *** > 100  *** > 100  VARIABLE VARIABLE VARIABLE VARIABLE  55Hz  *  <90 *** > 800 CONTINUOUS  V o l ume R e q u i r e d by Processing Eq uipment (cu.in.)  420  **  3400  **  **  Nunber o f Allowable Symbols  256  **  0  **  128  *  Visible Screen Addressabilit  1024x 1024  **  1024x 1024  **  1024x 731  *  Flexibility  HIGH  HIGH  MEDIUM  HIGH  HIGH  LOW  Cost o f Processing and D i s p l a y Equipment($)  5000  *** *** *** *** >20000 >100000 >100000 >100000  *** 8000  *** > 10000  * Information not a p p l i c a b l e ** I n f o r m a t i o n n o t a v a i l a b l e *** E s t i m a t e d from p u b l i s h e d l i t e r a t u r e T a b l e 1. Comparison  o f e x i s t i n g d i s p l a y systems.  74  3 . 2 R E A L - T I M E EXECUTIVE PERFORMANCE The and  real-time  about  46 w o r d s o f  X 10 u s e e where  to  queue  N is  executive and  the  start  a  ELANDIS, The  list.  limit  set  that  an i n t e r r u p t of  one.  lower than a n d DFMS  the  i n the  was  words  to  currently  the  in to  memory  of  PROM  550 u s e e + N current  the  task,  queue.  The  relinquish a  task  requirements  are  8096 w o r d s o r m o r e r e q u i r e d b y  the  systems[6],[34],[18].  judged  design  These  164  requires  138 u s e e + N X 10 u s e e  new  This  about  and r e t u r n  tasks  e x e c u t i v e c a n queue  RDYC  requires  R A M . The e x e c u t i v e  number  requires  significantly DIAS,  executive  up t o  12 t a s k s ,  acceptable  before  based  c r i t e r i a . However, the  c a n be h a n d l e d c a n be e x t e n d e d  if  needed.  on  filling the  number  10 of  the task tasks  75  3 . 3 D I S P L A Y PROCESSOR PERFORMANCE The AMD2900 was w e l l was  realized  on  one  considerable  reduction  requirements  of  DPU was  at  was  set  choosen  generator slower would in  to  in  nsec  alleviate  allow f u l l  the  the  DPU d e s i g n .  prototyping  space  when  twice the  the  that  The of  DPU a n d  to  of  the  design  This  to  cycle  is  ELANDIS  time  of  of  having the  A faster of  the This  a  clock  use  of  control  the  a  the  CPU b o a r d .  allow  speed  The  the  necessity  control store.  utilization  card.  compared  system[34] .  or  exclusively for  the store  DPU i f  needed  future.  The DPU t o  vector  connections.  These  connectors, soft  666  to  TM990/512  DEC GT40  i 2 7 0 8 EPROM a s  the  52  a  suited  errors  interface.  without were These  a  generator  connections ground  generated errors  vectors.  These  errors  refreshed  every  20 m s e c .  an i n t e r c o n n e c t i n g  interface  It  was  because  of  the  at  not  These  path with  made  plane.  occured are  were  requires  a rate fatal  errors  a ground  of  using  found noise about  since  c o u l d be plane.  the  the  use  wire  that  wrap  several  across one  of  in  this 10**5  screen  reduced by  is  using  76  3 . 4 VECTOR GENERATOR PERFORMANCE The  vector  some e n h a n c e m e n t  generator i n the  performance  speed  of  the  was  adequate.  However,  generator  would  vector  be  desirable. The maximum  ramp  voltage vector  vector  for  generator  speed  this  speed.  of  takes  40 u s e e  7X10**5  speed  is  8.2  This vector  volts  volts,  speed  to  draw a v e c t o r  per the  sec. level  corresponds  The for  to  at  a  reference  the  highest  a screen  writing  s p e e d o f a p p r o x i m a t e l y 10**3 m / s e c . The It  characters  would be  desirable  more c h a r a c t e r s The  of  appropriate The  The  is  be  acceptable  allow  Other  quite types  results.  dim  of  during  CRTs  and d i s p l a y w e r e a b l e t o p r o d u c e  resolved  down  l i m i t e d by the  l i n e a r i t y of any 2cm o f  upper  gave  appeared  light.  30% t o  with  screen f i l t e r s would help r e s o l v e t h i s problem[32].  could  output  ambient  usec/character.  time.  used  screen  400  time by about  one  display the  time of  this  screen at  on  high  reduce  vector generator  resolution  the  on the  displays  conditions  10% f o r  to  T e k t r o n i x 602  However,  which  took an average  right  the  the  hand  to  part  spot w i d t h of the  generated  screen.  corner  one  vectors  The g r e a t e s t  which  from t h e X and Y d r i v e r s .  requires  in  This  beam.  was  on  error the  512.  lines  the  average  o c c u r i n g near  largest  voltage  77  CHAPTER I V CONCLUSIONS AND DIRECTIONS FOR FURTHER RESEARCH 4.1  CONCLUSIONS The  the  electronic  following  airborne  display  system  advantages over c o n v e n t i o n a l  1) C o c k p i t i n s t r u m e n t a t i o n by a f a c t o r of at l e a s t commercial systems.  designed  exhibited  instrumentation:  a r e a was 40 o v e r  reduced typical  2) The electronic display system was designed to allow instrumentation to be c a t e g o r i z e d i n t o f l i g h t p h a s e s , o n l y one o f w h i c h i s d i s p l a y e d a t a n y one t i m e . T h i s categorization reduces the amount of information d i s p l a y e d to the p i l o t by a factor of about five over conventional cockpit instruments. 3) T h e a n g l e o f e y e movement r e q u i r e d to scan all instruments was reduced by 70 degrees over that of conventional analog type i n s t r u m e n t a t i o n . 4) The d i s p l a y p r o c e s s o r in the system enabled the use of symbology which r e p r e s e n t e d the i n f o r m a t i o n b e i n g d i s p l a y e d t o t h e p i l o t i n a f o r m more s u i t a b l e than conventional instrumentation. 5) W a r n i n g i n f o r m a t i o n c a n b e d i s p l a y e d i n a more a t t e n t i o n - g e t t i n g f a s h i o n than current a n a l o g type i n s t r u m e n t a t i o n t h r o u g h the use of blinking and increased intensity on s e l e c t i v e p a r t s of the s c r e e n . 6) Increased flexibility in cockpit instrumentation over conventional analog type instrumentation was realized by a l l o w i n g changes i n instrumentation to be made i n s o f t w a r e r a t h e r t h a n i n h a r d w a r e a s with commercial systems. 7) A r e d u c t i o n i n t h e o v e r a l l s y s t e m compared to earlier d i s p l a y systems t a b l e 1) was a l s o r e a l i z e d . 8) The d i s t r i b u t e d n a t u r e o f the e n a b l e s enhancements i n s u b s e c t i o n s s y s t e m w i t h o u t the need f o r change remaining subsections.  cost (see  system of the i n the  78  Only  three  sections  implemented -  the  Several illustrate the  of  formats  speed time  of to  number  which  the  of  a  generator.  characters  45 c h a r a c t e r s .  final  system.  was  which  this  complete was this  and p r i v a t e  system.  Some  set  voiced.  of  developed system.  situations.  and  actually  order  These were  400  can  be  this  was  shown  usee.  This  displayed  specifically  reluctance  to  in  instruments  the  overall  accept to  decreasing  his  a  feeling  n a t u r e would prove b e n e f i c i a l to  workload  in  shown  d e s i g n was  that  the  reaction  the  speed  to in  the  to be  too  the  report,  the  comment  pilot time  from  display  that  a  to the  on a  system  system  i n reducing in  the  several  switch  single was  screen low i n  to  the  average  limits  on  p i l o t s were g i v e n a chance  analog  However,  It  in  T h i s number may p r o v e  Although not mentioned commercial  were  performance.  character  about  this  here  generator.  showed some w e a k n e s s  vector  draw  described  were  c a p a b i l i t i e s of  s e c t i o n on s y s t e m An a r e a  EADS  C P U , DPU a n d v e c t o r  display  the  the  of his  emergency  79  4 . 2 DIRECTIONS FOR FURTHER RESEARCH It  i s hoped at  continue for  on  further  this  this  system.  development  (1) for  time that  Generating the p i l o t .  (2) Improving generator.  The  research  areas  and d e v e l o p m e n t  showing  the  greatest  will need  are: acceptable  display  the  of  speed  formats  the  vector  (3) D e v e l o p i n g a complete s e t o f m o n i t o r i n g routines to enable the CPU t o detect p o s s i b l e emergency c o n d i t i o n s . (4) Enhancing system reliability by d e v e l o p i n g t o t a l s y s t e m i n t e g r i t y c h e c k s and self testing routines for the individual u n i t s i n the system. (5) D e v e l o p i n g a r e l i a b l e p a c k a g i n g t o meet a i r b o r n e s a f e t y c r i t e r i a . (6) R e s e a r c h i n t o best illustrate displayed.  scheme  the symbology r e q u i r e d to the information being  ( 7 ) R e s e a r c h i n t o new d i s p l a y s o t h e r than t h e CRT t o i m p r o v e t h e r e a d a b i l i t y under v a r i o u s ambient l i g h t c o n d i t i o n s . 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F l a n d e r s , " S t a t e - o f - t h e - A r t Displays For N A S A ' s Space S h u t t l e " , E l e c t r o - O p t i c a l Systems D e s i g n , 20, F e b . (1979). [33] A . R . D o u c e t t e , " D e s i g n D e c i s i o n s Spectrum, 29, August, (1976).  for  a  Head-Up  Display",  [34] W . H o l s t e i n , " E L A N D I S - A V e r t i c a l S i t u a t i o n D i s p l a y " , AGARD Conference Proceedings, No.56, 31-1, (1975). [35] P.J.Edmunds, "Digital A v i a t i o n R e v i e w , N o . 3 5 , 17,  Computers (1976).  for  Head-Up  [36] R.A.Hess, " A n a l y t i c a l Display Design Conducted Under Instrument Meteorological T r a n s a c t i o n s o n S y s t e m s , Man a n d C y b e r n e t i c s ,  Displays",  for Flight Tasks Conditions", IEEE 7, 6, 4 5 3 , ( 1 9 7 7 ) .  [37] P.J.Klass, "More A i r l i n e Avionics Integration A v i a t i o n Week and S p a c e T e c h n o l o g y , N o v e m b e r , ( 1 9 7 , 6 ) .  Seen",  [38] M . R . M u r p h y , L . A . M c G e e , E . A . P a l m e r , C . H . P a u l k , T . E . W e m p e , " S i m u l a t i o n E v a l u a t i o n o f T h r e e S i t u a t i o n and G u i d a n c e D i s p l a y s for V/STOL Aircraft Zero-Zero Landing Approaches", IEEE T r a n s a c t i o n o n S y s t e m s , Man and C y b e r n e t i c s , 8 , 7 , 5 6 3 , ( 1 9 7 8 ) . [39] C . T . S h e r i d a r , (1978).  "Space  [40] W . K . K e r s h n e r , The U n i v e r s i t y P r e s s , Iowa,  Shuttle  Instrument (1977).  Software",  Flight  Datamation,  Manual,  Iowa  [41] D . J . W a l t e r s , " T h e E l e c t r o n i c D i s p l a y o f P r i m a r y Data",AGARD Conference P r o c e e d i n g s , NO.55, (1968). [42] D . G r o v e r , V i s u a l D i s p l a y U n i t s and T h e i r S c i e n c e and T e c h n o l o g y P r e s s , E n g l a n d , ( 1 9 7 6 ) . [43] S . D a v i s , C o m p u t e r Jersey, (1969).  Data  Displays,  [44] E . S . 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Circuit  83  APPENDIX A  NITIALIZATIO HALT DPU INITIALIZE SYSTEM POINTERS SET UP FREE NODES FOR RDYC L I S T COPY PROM COPY OF RAM INTO RAM  I  SET UP 50Hz REAL TIME CLOCK  SETUP COMMAND HANDLER PRIORITY WAIT FOR A KEY TO BE ENTERED VIA PED  "IS I T A CLEAR COMMAND BUFFER VALUE OF KEY HIT  CLEAR BUFFER  (DECQD^ 86 RESET BUFFER POINTER  GET FIRST TABLE ENTRY  FLAG COMMAND ERROR  IS-CHAFOIN  INC TO NEXT ENTRY IN TABLE  < E U F F E R = THIS TABLE^ENJRY- " YES  J  ,IS-CHAR7""ANLOC 'YES  COPY TRSV INTO NODE INSERT NODE CNTO RDYC L I S T  NO  —»  RESET CHARACTER BUFFER  (COMMAND HANDLER)  1 GET NEXT TABLE  INC BUFFER POINTER  87  INTERRUPT SERVICE ROUTINE (INTRSV)  GET A FREE NODE FOR RDYC L I S T  SAVE TISV IN NODE ON RDYC L I S T  GET ANOTHER FREE MODE  SAVE TRSV IN NODE ON RDYC L I S T  GET HIGHEST PRIORITY RDYC TASK  LOAD UP NEW TSV  REMOVE NODE FROM RDYC L I S T  INSERT NODE IN FREE L I S T  ISPATCH TASK  88  DISPLAY silODE^ SET UP DISPLAY MODE PRIORITY FOR INTERRUPT SERVICE ROUTINE  ^INTERRUPT SERVICE*) ^ « R O U T I  ENABLE DPU TO START REFRESH CYCLE SET POINTER TO TOP OF DISPLAY TASK BUFFER  IF NOT ONE OF REMAINING TYPES  DISPLAY ERROJ^-  GO TO NEXT lENTRY IN BUFFER  SET UP UPDATE PRIORITY FOR INTERRUPT SERVICE ROUTINE  SET POINTER TO TOP OF DISPLAY F I L E BUFFER  GET DFM START ADDRESS  I  GET NUf4BER OF DPU COM!1ANDS TO FO .LOW COPY C DMMANDS INTO DFM  90  APPENDIX B  2 3 4 5 6 7 8 9 10 11 12 13 14 IS 16 17 IS 19 20 21 22 23  ********************************************************************** * *  ELECTRONIC AIRBORNE  DISPLAY  VERSION  SYSTEM  1.0  **********************************************************************  )  25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 47 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85  r  *******************************A**************************************.  *  *;  * THIS SECTION OF CODE INITIALIZES THE AIRBORNE DISPLAY SYSTEM. THIS *; * ROUTINE IS EXECUTED ON POWER DP AND RESET CONDITIONS. *; * • *; ***********************************************************************  BASE ORG  DECIMAL X'1000'  EOL EOC CMDPKIOR DISPRIOR UPPRIOR EOT CLEAR CERROR EOJ VECTR DISUPD DYNINF DISERR  EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU  X'FFFF' X'ODOO' 05 03 04 X'FEOO' X'OAOO' X'0707' X'.O900" X'0300' X'0400' X'0500' X'0707'  [END OF COMMAND jCOMMAND HANDLER PRIORITY JDISPLAY MODE PRIORITY ;UPDATE PRIORITY jEND OF TABLE ;CLEAR COMMAND JCOMMAND ERROR NUMBER ;END OF JOB ;VECTOR DISPLAY ;DATA UPDATE ;DYNAMIC DATA UPDATE jDISPLAY MODE ERROR NUMBER  INIT  LI MOV*  RO,X'7000* RO.DFM  [SET FIRST WORD IN DISPLAY FILE ;T0 HALT  LI MOV*  RO.CHRBUF RO.BUFPTR  ;SET CHARACTER BUFFER POINTER ;TOP OF CHARACTER BUFFER  LI MOV*  RO.DISBUF RO.DSPPTR  ;SET DISPLAY BUFFER POINTER ;T0 TOP OF DISPLAY BUFFER  SETO*  REPCNT  ;SET UP DISPLAY REPETITION CNTR  1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000  ¥VVT  ODOO 0005 0003 0004 FEOO OAOO 0707 0900 0300 0400 0500 0707  1000 02007000 1004 C800FOOO 1008 0200D1FE 100C C800D1FA 1010 0200D264 1014 C800D1F6 1018 0720D1F4 101C 0200000F 1020 C800O160 1024 0200FFFF 1028 C800D1FC 102C 1030 1034 1038 103C 1040 1042 1044 1046 104A  0202000C O200D164 C800D162 0201D17C C4010000 0602 1304 05CO 0221000A 10F8  104C 0200D228 1050 C800D226 1054 1058 105C 105E 1062  0200188A 0201DA6A C090 0282FFFF 1304  »  i i ! »  »  IHIT1  INIT2 J INIT3  LI MOV*  .R0.15 RO.CPRIOR  ;SET SOFTWARE PRIORITY TO LOW jVALUE  LI MOV*  RO,X'FFFF' RO.RDYC  jSET RDYC TO J EMPTY  LI LI MOV* LI MOV* DEC JEQ INCT AI JMP  R2.12 RO.FRLST RO.FRLSP Rl,NODES R1,*R0 R2 INIT2 RO R1.10 INIT1  ;NUMBER OF FREE NODES ;SET FREE LIST POINTER ;T0 TOP OF LIST ;AND LOAD UP FREE LIST iWITH 12 FREE NODES i ;IF FINISHED GO TO NEXT INIT ;INC LIST POINTER ;ADD OFFSET TO NEXT FREE NODE ;ADD NEXT FREE NODE  LI MOV*  RO.DTBUP RO.DTBUFP  ;SET DISPLAY TASK BUFFER POINTER ;T0 TOP OF DISPLAY TASK BUFFER  LI LI MOV CI JEQ  RO.RDATAS+2 R1, RDATA+2 *R0,R2 R2,X'FFFF' INIT4  ;INITIALIZE RAM AREA jBY COPYING PROM COPY ;INTO RAM AREA ;CHECK FOR END OF COPY ;EXIT COPY ROUTINE IF END FOUND  ho  86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  1064 1066 1068 106 A  C442 05CO 0SC1 10F8  106C 1070 1074 1076 1078  020C0100 02010753 33C1 1E00 1003  MOV INCT INCT JMP  E2,»R1 SO El INIT 3  ; STORE WORD IN RAM AREA ;INC PROM POINTER ;INC RAM POINTER ;LOOP  LI LI LDCR SBZ SBO  R12,X'O10O' R1,X*0753' R1.15 0 3  ;SET UP REAL TIME CLOCK ;F0R 50HZ REFRESH RATE ;L0AD CLOCK ;SET TO INT MODE ;ENABLE CLOCK  LIMI  15  ;ENABLE ALL INTERRUPTS  LUFI B*  CMDWRK CMDHDL  jLOAD UP NEW WORKSPACE POINTER ;JUMP TO COMMAND HANDLER  »  107A 0300000P 107E 02E0D020 1082 0460125C  INIT4  »  /  103 104 105 106 107 108 109 110 HI  ;**»»«*****»««»***»*«****»»***»*••»»«**•**»*»*«**»»*«**»»******«*»*«***  ;*  *i  ;* THIS SECTION CONTAINS THE TASK SCHEDULER,ALLOCATE, AND DEALLOCATE * ;* ROUTINES. SPRIOR SHOULD CONTAIN THE PRIORITY OP THE INTERRUPTED * ;* TASK. CPRIOR SHOULD CONTAIN THE PRIORITY OF THE INTERRUPTING TASK. * ;* INTRSV IS THE START OF THE INTERRUPT HANDLER• SCHEDLR IS THE START * ;* OF THE SCHEDULER ROUTINE. * ;* * ***********************************************************************  113  ;  114  ;*  115 116 117  '  ;******«»«**«*»««*«***i>*****4»***»******»»*****»**»»****«*»*«»*«****»*  118  119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148  '  ;* ROUTINE TO LOAD PRE-EMPTED TASK AND PRE-EMPTING TASK INTO RDYC ;* LIST OP TASK SCHEDULER. ;* 1086 DOOO  1088 108A 108A 06A010P6 108E 022D001B 1092 C420D1P8 1096 05C0 1098 C41D 109A 05C0 109C 064D 109E C41D 10 AO 05C0 10A2 064D 10A4 C41D 10A6 0220FPFA 10AA 06A0110E 10AE 022DFFE6 10B2 06A010F6 10B6 10BA 10BC 10BE 10C0 10C2 10C4 10C6 10CA  C420D160 05C0 C40F 05C0 C40E 05C0 C40D 0220FFFA . 06A0110E  : INTRSV  !  J  (  WORD WORD BL*  SCHEDWP INTRSV+4 GTFREE  AI MOV* INCT MOV INCT DECT MOV INCT DECT MOV AI BL* AI BL*  R13.30 SPRIOR,*R0 RO *R13,*R0 RO R13 *R13,*R0 RO R13 *R13.*R0 R0.-6 INSERT R13.-26 GTFREE  MOV* INCT MOV INCT MOV INCT MOV AI BL*  CPRI0R,*R0 RO R15,*R0 RO R14,*R0 RO • R13,*R0 R0.-6 INSERT  ;SET UP URKSPACE POINTER ;SET UP PC ;GET A FREE NODE ;POINTED TO BY RO ;GET PRE-EMPTED R15 ;SAVE PRE-EMPTED PRIOR ;INC NODE POINTER JSAVE PRE-EMPTED R15 ;INC NODE POINTER ;DEC WORKSPACE POINTER. ;SAVE PRE-EMPTED R14 ;INC NODE POINTER ;DEC WORKSPACE POINTER ;SAVE PRE-EMPTED R13 ;RESET RO TO TOP OP NODE ;INSERT NODE IN RDYC LIST ;RESET R13 TO ORIGINAL VALUE ;GET A FREE NODE POINTED ;T0 BY RO ;SAVE INTERRUPTING PRIORITY ;INC NODE POINTER ;SAVE PRE-EMPTING R15 JINC NODE POINTER ;SAVE PRE-EMPTING R14 JIHC NODE POINTER ;SAVE PRE-EMPTING R13 ;RESET RO TO TOP OF NODE iINSERT NODE INTO RDYC LIST jNEXT STATEMENT IS SCHEDULER  ISO 1S1 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170  * * THIS ROUTINE SELECTS THE HIGHEST PRIORITY TASK FROM THE RDYC LIST * AND DISPATCHS THIS TASK TO THE CPU. * 10CE 10D2 10D6 10D8 10DA 10DC I0DE 10EO 10E2 10E4 10E8 10EC 10FO 10F4  C320D1FC C81CD160 05CC C3DC 05CC C39C 05CC C35C 05CC C81CD1FC 022CFFF8 06AOU02 026FOOOF 0380  SCHEDLR  MOV* MOV* INCT MOV INCT MOV INCT MOV INCT MOV* AI BL* OR I RTVP  RDYC.R12 *R12,CPRIOR R12 *R12,R15 R12 *R12,R14 R12 *R12,R13 R12 *R12,RDYC R12.-8 REMOVE R15,X'000F'  * * * *  ;GET AODR OF HIGHEST PRIOR TASK •.RESTORE CURRENT PRIORITY ;INC NODE POINTER [RESTORE R15(ST) ;INC NODE POINTER [RESTORE R14(PC) ;INC NODE POINTER [RESTORE R13(WP) [INC NODE POINTER [SET RDYC POINTER TO NEW NODE [RESET NODE POINTER TO TOP [ADD NODE TO FREE LIST [SET STATUS TO LOW PRIORITY [DISPATCH NEW TASK  172  *  173 174 175 176 177 178 179 180 181 182 183 184 185 186 187  *  * R O U T I N E TO GET A F R E E NODE FROM THE F R E E L I S T AND * NODE S T A R T I N G A D D R E S S .  SET RO TO THE  * 10F6 C02OD162 10FA O5E0D162 10FE C 0 1 0 1100 045B  *  GTFREE  MOV* INCT* MOV B  FRLSP,RO FRLSP *R0,RO *R11  ;R0 GETS ADDRESS OF FREE NODE 1INC FREE LIST POINTER ;GET NODE ADDRESS INTO RO JRETURN  * *  * *  * ROUTINE TO ADD NODE REMOVED FROM RDYC LIST BACK TO FREE LIST.  *  188 189 190 191 192 193  1102 0660D162 1106 C2A0D162 110A C68C H O C 0 4 5B  REMOVE  DECT* MOV* MOV B  FRLSP FRLSP,RIO R12,*R10  *Rll  [DECREMENT FREE LIST POINTER ;GET ADDR OF NEW FREE POINTER [INSERT FREE NODE ADDR INTO LIST [RETURN  195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219  * ROUTINE TO INSERT A NODE POINTED TO BY RO INTO THE RDYC LIST * IN ORDER OF ITS PRIORIY.  HOB C050  1110 11H 1118 111A 11 IE 1120 1122 1124  C0A0D1PC 0203D1FC C142 0285FFFP 1308 C112 8101 1105  1126 1128 112C 112E 1130 1132 1136 1138  C0C2 02230008 C093 10F4 C4C0 02200008 C402 045B  INSERT  MOV MOV* LI INSERT 1 MOV CI JEQ MOV C JLT •  MOV AI MOV JMP INSERT2 MOV AI MOV B  *R0,R1 RDYC.R2 R3.RDYC R2.R5 R5.EOL INSERT2 *R2,R4 R1.R4 INSERT2 R2.R3 R3.8 *R3,R2 IHSERTl R0,*R3 R0,8 R2,*R0 *R11  CET PRIORITY OF TASK R2 IS FORWARD POINTER R3 IS BACKWARD POINTER CET NODE WORD CHECK FOR END OF LIST IF SO INSERT NODE GET PRIORITY OF CURRENT NODE CHECK WITH NODE TO BE INSERTED IF LOWER MAGNITUDE (HIGHER PRIORITY) THEN INSERT SET BACK POINTER TO THIS NODE SET UP FORWARD POINTER CHECK NXT NODE INSERT BACKWARD LINK MOVE POINTER TO FWRD LINK INSERT FRWD LINK RETURN  CO  222  ,**»»«»*******«««***»***»»***»«***»»********»***»»****  223  ;*  224 225 226 227 228 229 230  ;* THIS SECTION CONTAINS THE CODE USED TO READ THE DISPLAY TASK PILE j * AND UPDATE THE DISPLAY BUFFER BASED ON THE COMMANDS CONTAINED IN ;* THE FILE.THE DISPLAY TASK FILE IS UPDATED VIA PILOT SCREEN REQUESTS.' ;* DSPLMD IS THE START OF THE DISPLAY MODE. ;* THIS CODE STARTS EXECUTION ON AN INTERRUPT FROM THE REAL TIME ;* CLOCK, SIGNALING THE START OF THE DPU DISPLAY CYCLE. ;*  231  1  1  ;id****************************************************************'***  233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 2B4  113A 03000001 113E 020C0100 1142 1E00 1144 1D03 1146 C820D160D1F8 114C 02000003 1150 C800D160 1154 02O0D264 1158 C800D1P6 115C 04201086 1160 020C0100 1164 1E18 1166 ID 18 1168 1E00 116A 1D06 116C 0200D22S 1170 C120D226 1174 8100 1176 1311 1178 C090 117A 40A0D1F4 117E 1303 1180 05C0 1182 05C0 1184 10F7 1186 05C0 1188 C050 118A 04C2 118C D0B1 118E 0282FE0O 1192 13F7 1194 02820900 1198 1604 119A 1192 05AOD1K4 11A2 0460IOCS 11A6 02820300 11A8 1320 11 AC 02820400 11AE 1317 11B2 02820500 1307  LIMI LI SBZ SBO MOV8 LI MOV* LI MOV* BLWP* LI SBZ SBO SBZ SBO LI MOV* DSPLMD1 C JEQ MOV SZC* JEQ INCT DSFLMD2 INCT JMP DISTSK INCT MOV CLE MOVB CI JEQ CI JNE DISTSK1 INC* 8* DISCHT CI  DSPLMD  JEQ  CI JEQ CI JEQ  1 R12,X'0100' 0 3 CPRIOR.SPRIOR RO.DISPRIOR RO.CPRIOR RO.DISBUF RO.DSPPTR INTRSV R12,X'0100' X'18' X'I8' 0 6 RO.DTBUF DTBUFP.R4 R0.R4 DISTSK1 *R0,R2 REPCNT.R2 DISTSK RO RO DSPLMD1 RO *R0,R1 R2 *R1@,R2 R2.E0T DSPLMD2 ' R2.E0J DISCHT REPCNT SCHEDLR R2.VECTR DISVEC R2.DISUPD DISUPDT R2.DYNINF DYNDAT  DISABLE INTERRUPTS SET, UP CRU BIAS ENTER INT MODE CLEAR CLOCK INT SAVE PRIORITY LOAD DISPLAY PRIORITY SET UP CURRENT PRIORITY RESET DISPLAY BUFFER POINTER TO TOP OF BUFFER SCHEDULE INTERRUPTING TASK SET UP CRU BIAS START DPU RESET START BIT SET TO INT MODE ENABLE DPU INT SET DISPLAY TASK POINTER TO TOP LOAD UP TASK BUFFER POINTER CHECK FOR END OF BUFFER EXIT GET REP COUNT CHECK IP SUBTASK READY TO DISPLAY IF SO,EXECUTE DISPLAY TASK INC DISPLAY TASK POINTER TO NEXT TASK ENTRY CHECK NEXT ENTRY GET TASK BLOCK ADDRESS ,INTO R l CLEAR R2 GET BLOCK TYPE ,IT IT END OF TASK(EOT) ,IF SO,GET NEXT TASK ,IS IT END OF JOB(EOJ) ,IF NOT THEN CONTINUE ; INC REPCOUNTER •RELINQUISH .CHECK FOR DRAW VECTOR ;IF SO DO IT [CHECK FOR DATA UPDATE [IF SO DO IT [CHECK FOR DYNAMIC DATA [IF FOUND .INSERT IT INTO BUFFER  *  •  * OTHER ROUTINES ASSOCIATED WITH DISPLAY TASK TYPES CAN BE ADDED HERE * * IN ORDER OF FREQUENCY OF USE. * 11B4 11B6 11BA 11BE 11C0  C080 02000707 06A0132E C002 10E0  ******************* ************** ************************************** MOV LI BL* MOV JMP  R0.R2 RO.DISERR WRITE R2.RO DSPLMD2  [SAVE RO [IF NO TYPE FOUND THEN ERROR [DISPLAY ERROR [RESTORE RO [CONTINUE WITH NXT TASK  286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303  •*  ;* ROUTINE TO UPDATE DISPLAY BUFFER FROM RAM ;* INPUT-R1 CONTAINS POINTER TO DISPLAY TASK •*  11C2 D0B1 11C4 06C2 11C6 C191 11C8 05C1 11CA CODI 11CC 05C1 11CE C141 11D0 C046 11D2 06A011F8 11D6 C045 11D8 0460118A  * *  • *<ii«>*i*it*<«*«i>llitit»*i»l>*lt**tll*<i<<i<iitttt*>lk«**««««*»t<**t««t**<ll****l>< ; DYNDAT MOVB *R1@,R2 ;GET t OF DPU COMMANDS SWPB ;INTO LOWER 8 BITS R2 MOV *R1,R6 [GET RAM ADDRESS OF DATA ;INC POINTER INCT RI MOV *R1,R3 [GET DFM ADDRESS ;INC POINTER INCT RI MOV R1.R5 [SAVE RI MOV R6.R1 ;R1 GETS RAM ADDRESS BL* INSDSP ;INSERT DATA INTO BUFFER MOV R5.R1 [RESTORE RI B* [PROCESS NEXT TASK DISTSK+4  t-  c  30} 306 307 308 309 310 311 312 313 314 315 316  * * ROUTINE TO OBTAIN DATA FROM DAU AND UPDATE DISPLAY BUFFER * INPUT-R1 CONTAINS DISPLAY TASK BUFFER POINTER *  11DC 11DE 11E0 11E2 11E4  0581 C091 05C1 0692 0460U8A  DISUPOT  INC MOV INCT BL B*  RI •R1.R2 RI *R2 DISTSK+4  jINC DISPLAY TASK POINTER ;GET ROUTINE ADDRESS ;INC POINTER [EXECUTE DISPLAY ROUTINE [PROCESS NEXT DISPLAY TASK  O ro  318 319 320 321 322 323 324 325 326 327 328 329 330 331  * * * ROUTINE TO WRITE DISPLAY FILE ADDRESS AND CORRESPONDING DPU COMMAND * * TO GENERATE A VECTOR ON THE DISPLAY INTO THE DISPLAY BUFFER. * * INPUT* * * *********************************************************************** 11E8 11EA 11EC 11EE UFO 11F4  DOBl 06C2 C0D1 05C1 06A011F8 0460U8A  DISVEC  MOVB SWPB MOV INCT BL* B*  *R19,R2 R2 *R1,R3 RI INSDSP DISTSK+4  ;R2 GETS NO. OF DPU COMMANDS ;SWAP BYTES JR3 GETS DFM ADDDRESS ;SET RI TO DATA ;INSERT DATA INTO DFM BUFFER ;CET NEXT TASK ENTRY  ***»**••••*•*•*•****•*»*•***•*  333  334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354  t****************************************  * * * ROUTINE TO INSERT DISPLAY FILE INFORMATION INTO THE DISPLAY BUFFER. * * INPUT - RI CONTAINS THE ADDRESS OF THE CONSECUTIVE DPU COMMANDS * * R2 CONTAINS THE NUMBER OF DPU COMMANDS TO BE STORED * * - R3 CONTAINS THE CORRESPONDING DFM ADDRESS *  * ********************************************************  11F8 C220D1F6 HFC C603 U P E 05C8 1200 C602 1202 05CB 1204 C611 1206 05C1 1208 0602 120* 1301 120C 10FA 120E 05C8 1210 C808D1F6 1214 04SB  INSDSP  MOV* MOV INCT MOV INSDSP1 INCT MOV INCT DEC JEQ JMP INSDSPX INCT MOV*  DSPPTR.R8 R3,*R8 R8 R2,*R8 R8 *R1,*R8 RI R2 INSDSPX INS0SP1 R8 R8.DSPPTR •Rll  *  GET CURRENT DISPLAY BUFFER PTR STORE DFM ADDRESS INC BUFFER POINTER STORE NUMBER OF COMMANDS INC BUFFER POINTER STORE DATA INTO DFM BUFFER INC COMMAND POINTER DEC DATA COUNTER IF FINISHED PROCESS NEST TASK ENTRY STORE NEXT COMMAND INC BUFFER POINTER UPDATE DFM BUFFER POINTER GET NEXT TASK ENTRY  O -P-  356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385  ;* [* THE FOLLOWING ROUTINE UPDATES THE DISPLAY FILE ON A DPU INTERRUPT ;* 1216 12U 12U 1220 1222 122B 122C 1230 1234 1238 123C 1240 1242 1244 1246 1248 124A 124C 124E 1250 1252 1254 1256 1258  03000001 020C0100 1E00 1E06 C820D160D1F8 02000004 C800D160 04201086 0200D264 C060D1F6 02040001 8040 130A CODO 05C0 C090 05C0 C4D0 05C0 0602 13F6 05C3 10FA 046010CE  ; UPDATE  UPDAT1  UPDAT2  UPDATZ  LIMI LI SBZ SBZ M0V9 LI MOV* BLWP* LI MOV* LI C JEQ MOV INCT MOV INCT MOV INCT DEC JEQ INCT JMP B*  1 RU.X'OIOO' 0 6 CPRIOR.SPRIOR RO.UPPRIOR RO.CPRIOR INTRSV RO.DISBUF DSPPTR.Rl R4.1 RO.Rl UPDATX *R0,R3 RO *R0,R2 RO *R0,*R3 RO R2 UPDAT1 R3 UPDAT2 .SCUEDLR  *.  *;  DISABLE INTERRUPTS SET UP CRU BIAS ENTER INT MODE CLEAR DPU INT SAVE CURRENT PRIORITY LOAD NEW PRIORITY SET NEW PRIORITY SCHEDULE TASK GET TOP OF BUFFER Rl GETS ADDRESS OF LAST ENTRY INITIALIZE OFFSET COUNT CHECK FOR END OF DATA IF SO RELINQUISH GET STARTING ADDRESS IK DFM INC BUFFER POINTER GET NUMBER OF DPU COMMANDS INC BUFFER POINTER LOAD DFM INC BUFFER POINTER DEC DATA COUNT IP ZERO CHECK FOR END OF BUFFER INC DFM POINTER LOAD NEXT DFM COMMAND RELINQUISH  o  388 389 390 391 392 393 394 395 396 397  ;*  .*  THIS SECTION CONTAINS THE CPU COMMAND HANDLER. THIS ROUTINE ACCEPTS • * COMMANDS FROM THE INPUT DEVICE, DECODING THEM AFTER RECEIVING AN • * END OF COMMAND(EOC) CHARACTER. THIS ROUTINE THEN SCHEDULES THE • * ROUTINE REQUIRED BY ENTERING THE ACCOMPANYING TASK NODE INTO THE • * APPROPRIATE SPOT IN THE RDYC LIST. THE ROUTINE THEN BRANCHES TO THE TASK SCHEDULER TO DISPATCH THE NEXT TASK. •* •**********************************  *; *; *• *• *•  *.  ». *;  I  o ON  \  399  . M*********************************************************************  400  j *  401 402 403 404  ; * ROUTINE TO INPUT A COMMAND CHARACTER AND BUFFER IT IN THE CHARACTER * ; * BUFFER. THE COMMAND I S DECODED WHEN A EOC CHARACTER I S RECEIVED. * ;* * ; *************************************************************  405  406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422  125C 1260 1264 1268 126C 1270 1274 1278 127A 127E 1280 1284 1286 128A 128E 1292 1296  03000001 02000005 C800D160 030000FF 06A0135A 06A0132E 02800DOO 1310 02800A00 1307 C060D1FA D440 05A0D1FA 04601268 0200D1FE C800D1FA 04601268  CMDHDL  CMDHDL 1  CLRCMD  '  LIMI LI MOV* LIMI BL* BL* CI JEQ CI JEQ MOV* MOVB INC* B* LI MOV* B*  1 RO.CMDPRIOR RO.CPRIOR r O O P F '  READ WRITE RO.EOC DECODE RO,CLEAR CLRCMD BUFPTR,RI R0,*R1 BUFPTR CMDHDL 1 RO.CHRBUF RO,BUFPTR CMDHDL 1  *  SET HIGH PRIORITY LOAD CURRENT PRIORTY WITH PRIOR OF COMMAND HANDLER SET TO LOW PRIORITY GET A CHARACTER ECHO CHARACTER IS IT EOC CHARACTER I F SO,DECODE COMMAND IS IT A CLEAR COMMAND I F SO,CLEAR COMMAND GET CURRENT BUFFER POINTER BUFFER CHARACTER INC BUFFER POINTER GET NEXT CHARACTER ,GET START OF BUFFER ADDRESS RESET BUFFER POINTER GET NEXT CHARACTER  o  424  .  425 426 427 428 429 430  ;* ;* ROUTINE TO DECODE A COMMAND HELD IN THE CHARACTER BUFFER. THE J * CORRESPONDING TRSV NODE IS THEN LOADED INTO THE RDYC LIST FOR ;* EXECUTION AT THE PROPER TIME. THE ROUTINES INSERT, AND GTFREE ARB ;* REQUIRED. ;*  431  432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457  ' < '  .A*********************************************** 129A 129E 12A2 12A6 12A8  0201136A 0200D1FE C800D1FA 04C2 D091 12AA O282FE00 12AE 1322 12B0 0561 12B2 9411 12B4 1304 12B6 02210003 12BA O46012A6 12BE 0601 12C0 D091 12C2 02820D00 12C6 1611 12C8 05C1 12CA C051 12CC 06A010F6 12D0 02030004 12D4 C411 12D6 05C0 12D8 05C1 12DA 060} 12DC l&FB 458 12DE 0 2 2 o r r r s 459 12E2 06A0110E 460 12E6 04601300 461 12EA 05C1 462 12EC C051 463 12EE 0580 464 12F0 046012A6 465 12F4 02000707 466 12F8 06A0132E 467 12FC 0460125C  • DECODE  LI LI MOV* DECODE1 CLR MOVB CI JEQ INC CB JEQ AI B* DMATCH DEC MOVB CI JNE INCT MOV DMATCH1 BL* LI DLOOP MOV INCT. INCT DEC JNE AI  BL*  NTABLE  DERROR  B* INCT MOV INC B* LI BL* B*  RI,TABLE 1 RO.CHRBUF RO,BUFPTR R2  *R1,R2 R2.EOT DERROR RI *R1,*R0  DMATCH R1.3 DECODEl RI *R1,R2 R2.E0C  NTABLE RI *R1,R1 GTFREE R3,4 *R1,*R0 RO RI R3 DLOOP RO.-B INSERT CMDHLOX RI *R1,R1 RO DECODEl RO,CERROR WRITE CMDHDL  LOAD UP FIRST CHAR TABLE ADDRESS RESET CHARACTER POINTER CLEAR R2 GET FIRST WORD CHECK FOR END OF TABLE IF SO THEN FLAG ERROR INC TABLE POINTER CHECK FOR A HATCH IF SO CHECK FOR EOC SET POINTER TO NEW ENTRY CHECK NEXT ENTRY CHECK TYPE FOR AN EOC CHARACTER IF NO EOC,GO TO NXT TABLE INC TABLE POINTER RI GETS ADDRESS OF RDYC LIST GET A FREE NODE SET UP LOOP COUNTER MOV INFO TO TRSV NODE INC NODE POINTER ,INC INFO POINTER DEC LOOP COUNTER IF NOT FINISHED THEN LOOP (SET RO TO START OF NODB (INSERT NODE INTO RDYC H I T (RELINQUISH jGET NEXT TABLE ADDRESS [INTO RI ;GET NXT CHAR (CHECK NEXT TABLE (LOAD RI WITH ERROR CHAR (DISPLAY ERROR (GET NXT CHARACTER  4(9  * ***************************************************  470 471 472 473  ;* ;* ;* ;*  475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492  ' ROUTINE TO QUEUE COMMAND HANDLER BACK UNTO RDYC LIST BEFORE RELINQUISHING.  1300 1304 1308 130C 1310 1312 1314 1316 1318 131A 131E 1322  03000001 02011326 06A010F6 02030004 C411 05C0 05C1 0603 16FB 0220FFF8 06A0110E 046010CE  [ CMDHLDX LIMI LI BL* LI DLOOFl MOV INCT INCT DEC JNE AI BL* B*  1326 1328 132A 132C  0005 9A0F 125C D020  CMDNODE WORD WORD WORD WORD  •  *; *; *; *; 1  1 Rl,CMDNODE GTFREE R3.4 *R1,*R0 RO Rl R3 DLOOPl R0.-8 INSERT SCHEDLR  [DISABLE INTERRUPTS [SET UP NODE FOR CMDHDL ;GET A FREE NODE ;SET UP LOOP COUNTER [LOAD UP NODE [INC POINTER [INC POINTER [DEC LOOP COUNTER [IF NOT FINISHED THEN LOOP [SET RO TO START OF NODE [INSERT NODE INTO RDYC LIST [RELINQUISH  X'0005' X'9A0F' CMDHDL CMDWRK  [PRIORITY [STATUS [TASK ADDRESS [WORKSPACE  o  »•  I  I ' t  THIS SECTION OF CODE CONTAINS THE DEVICE SUPPORT ROOTINES FOR THB PILOT ENTRY DEVICE(PED)  *; *; *i  502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528  ***************************o********************o*****************^ *  *;  * ROUTINE TO WRITE A CHARACTER TO PED. CHARACTER IS CONTAINED IN UPPER*; * 8 BITS OF RO. A 200 HSEC WAIT IS INSERTED ON A CARRIAGE RETURN *; * INPUT-RO CONTAINS CHARACTER TO BE WRITTEN IN UPPER 8 BITS *;  * 132E 1332 1336 1338 133A 133C 133E 1340 1342 1346 1348 134A 134C 134E 1350 1352 1354 1356 1358  02OAOEA6 020C0080 ID 10 1F16 16F9 3200 IE 10 0980 0280000D 1607 0A3A 1F16 16FE 1F17 16FC 060A 16FE 0A80 045B  *. i  **«********************«*»*»*»*«****»*****»**«*****«*******«*»******«*«. RIO,3750 PED WAIT COUNT WRITE LI R12,X'80' SET UP CRU BIAS LI 16 SET RTSON SBO IB 22 TRANSMIT BUFFER EMPTY? JNE WRITE IF NOT,THEN WAIT SEND CHAR TO PED LDCR R0,8 16 RESET RTSON SBZ GET CHAR INTO LOWER 8 BITS SRL R0.8 IS IT A CR RO.X'OOOD' CI WRITEX IF NOT EXIT JNE IF NOT WAIT FOR CR SLA RIO,3 22 IS IT FINISHED? WRITE1 TB WRITE1 IF NOT WAIT JNE IS IT FINISHED? TB 23 WRITE1 IF NOT WAIT SOME MORE JNE RIO 200 MSEC WAIT FOR CR WRITE2 DEC WRITE2 JNE WRITEX SLA R0.8 MOV CHAR TO UPPER 8 BITS *R11 B RETURN TO CALLING ROUTINE  f  530 531 532 533 534 535 536 537 538 539 540 541 542 543 544  •******************************t************************************t**4 j * ROUTINE TO READ A CHARACTER FROM PED AND STORE IT IN UPPER 8 BITS •* OF RO j * OUTPUT-RO CONTAINS CHARACTER IN UPPER 8 BITS  * *  •* .A*********************************************** * * * * * * * * * * * * * * * * * * * * * * * •  135A 020C0080 135E 1P15 1360 16FC 1362 04C0 1364 3600 1366 1E12 1368 045B  READ  LI TB JNE CLE STCR SBZ B  R12,X'80' 21 READ RO R0.8 18 *R11  [LOAD CRU BIAS [RECEIVE BUFFER FULL? ;IF NOT WAIT [CLEAR RO [GET CHAR INTO RO [ENABLE RECEIVE BUFFER [RETURN TO CALLING ROUTINE  I—  1  546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570  !*  ;* TABLES FOR PILOT COMMANDS ENTERED V I A FED. •* ******************************************************* 136A 0 0 4 3 136C 1384  TABLE 1  WORD WORD  X'0043' TABLE2C  FIRST LETTER ' C NXT TABLE ADDRESS  136E 0044 1370 138E  WORD WORD  X'0044' TABLE2D  FIRST LETTER 'D' NXT TABLE ADDRESS  1372 0054 1374 1394  WORD WORD  X'0054' TABLE2T  FIRST LETTER 'T* NXT TABLE ADDRESS  1376 004C 1378 139A  WORD WORD  X'004C TABLE2L  NXT TABLE ADDRESS-  137A 0053 137C 13AA  WORD WORD  X'0053' TABLE2S  NXT TABLE ADDRESS  137E 0045 1380 13A4  WORD WORD  X'0045' TABLE2E  FIRST LETTER ' E ' NXT TABLE ADDRESS  1382 FE00  WORD  X'FEOO'  END OF FIRST TABLE  FIRST LETTER ' L '  FIRST LETTER 'S'  *  :  572 573 574 575 576 3//  578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598  0D4C 13B0 0D53 13B8 FEOO  TABLE2C  WORD WORD WORD WORD WORD  X'OD4C CTP.CL X'0D53' CTP.CS X'FEOO'  ;CL, COMMAND ;TASK POINTER ADDRESS jCS COMMAND [TASK POINTER ADDRESS ;END OF TABLE 2C  138E 0D54 1390 13C0 1392 FEOO  TABLE2D  WORD WORD WORD  X'0D54' CTP.DT X'FEOO'  ;DT COMMAND ;TASK POINTER ADDRESS jEND OF TABLE 2D  WORD WORD WORD  X'0D4F' CTP.TO X'FEOO'  ;T0 COMMAND jTASK POINTER ADDRESS ;END OF TABLE 2T  WORD WORD WORD WORD WORD  X'0D46' CTP.LF X'0050' CTP.LP X'FEOO*  ;LF COMMAND ;TASK POINTER ADDRESS ;LP COMMAND iTASK POINTER ADDRESS ;END OF TABLE 2L  WORD WORD WORD  X'0D44' CTP.ED X'FEOO'  jED COMMAND jTASK POINTER ADDRESS ;END OF TABLE 2E  WORD WORD WORD  X'0D52' CTP.SR X'FEOO'  ;SR COMMAND ;TASK POINTER ADDRESS jEND OF TABLE 2S  1384 1386 1388 138A 138C  1394 0D4P 1396 13C8 1398 FEOO 139A 139C 139E 13A0 13A2  0D46 13D0 0050 13D8 FEOO  13A4 0D44 13A6 13E0 I3A8 FEOO  i TABLE2T  TABLE2L  i TABLE2E  t  13AA 0D52 13AC 13E8 13AE FEOO  TABLE2S  600 601 602 603 604 605 606 607 608 6(19  610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644  *  COMMAND TASK BLOCKS FOR COMMANDS ENTERED VIA FED  *  it*********************************************************************  CTWP.Cl.  JPRIORITY •.STATUS ;TASK ADDRESS [TASK WORKSPACE  WORD WORD WORD WORD  X'9A0F' CT.CS CTWP.CS  [PRIORITY [STATUS [TASK ADDRESS [TASK WORKSPACE  CTP.DT  WORD WORD WORD WORD  4 X'9A0F' CT.DT CTWP.DT  [PRIORITY [STATUS [TASK ADDRESS [TASK WORKSPACE  0004 9A0F 1418 DOAO  CTP.TO  WORD WORD WORD WORD  4 X'9A0F' CT.TO CTWP.TO  [PRIORITY [STATUS [TASK ADDRESS [TASK WORKSPACE  13D0 13D2 13D4 13D6  0004 9A0F 1434 DOCO  CTP.LF  WORD WORD WORD WORD  4 X'9A0F' CT.LF CTWP.LF  [PRIORITY [STATUS [TASK ADDRESS [TASK WORKSPACE  13D8 13DA 13DC 13DE  0004 9A0F 1440 DOEO  CTP.LP  WORD WORD WORD WORD  4 X'9A0F' CT.LP CTWP.LP  [PRIORITY iSTATUS [TASK ADDRESS [TASK WORKSPACE  13E0 13E2 13E4 13E6  0004 9AOF 144C D100  CTP.ED  WORD WORD WORD WORD  4 X'9A0F' CT.ED CTWP.ED  [PRIORITY .•STATUS [TASK ADDRESS [TASK WORKSPACE  13E8 13EA 13EC 13EE  0001 9A0F 1460 D120  CTP.SR  WORD WORD WORD WORD  1 X'9A0F' CT.SR CTWP.SR  [PRIORITY [STATUS [TASK ADDRESS [WORKSPACE  13BO 13B2 13B4 131)6  0004 9A0F 13F0 D040  CTP.CL  13B8 13BA 13BC 13BE  0001 9A0F 13FC D060  CTP.CS  13C0 13C2 13C4 13C6  0004 9A0F 1404 D080  13C8 13CA 13CC 13CE  WORD WORD WORD WORD  4 X'9A0F' CT.CL  646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688  * * M * * M * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * T M * * * * * * * * * * * * * * * * * * * * * * * * * * *  * *  *  ROUTINES ACCESSED VIA COMMAND TASK POINTERS  *  13F0 0200147C 13F4 06AO1468 13F8 046010CE  CT.CL  LI BL* B*  RO.DTP.CL DTINSERT SCHEDLR  ;GET DISPLAY TASK POINTER ADDRESS jINSERT IT INTO DISPLAY TASK BLOCK RELINQUISH  13FC 03000000 1400 04600080  CT.CS  LIMI B*  0 X'0080'  ;SET PRIOR TO HIGH ;BRANCH TO MONITOR  1404 1408 140C 1410 1414  0200AOOO 02029000 0200DA64 06A01468 046010CE  CT.DT  LI LI LI BL* B*  RO.X'AOOO' R2,X'9000' RO.DTP.DT DTINSERT SCHEDLR  jY CO-ORD MASK jX CO-ORD MASK ;GET DISPLAY TASK POINTER ADDRESS -.INSERT IT INTO DISPLAY TASK BLOCK RELINQUISH  1418 141C 1420 1424 142B 142C 1430  02001480 06A01468 02001484 06A01468 02001488 06A01468 046010CE  CT.TO  LI BL* LI BL* LI BL* B*  RO.DTP.TO DTINSERT RO.DTP.TOl DTINSERT R0.DTP.TO2 DTINSERT SCHEDLR  jGET DISPLAY TASK POINTER ADDRESS •.INSERT IT INTO DISPLAY TASK BLOCK ;GET NEXT TASK POINTER ;INSERT IT ;GET NEXT TASK POINTER ; INSERT IT RELINQUISH  1434 O2O0148C 1438 06A01468 143C 046010CE  CT.LP  LI BL* B*  RO.DTP.LF ' DTINSERT SCHEDLR  ;GET DISPLAY TASK POINTER ADDRESS [INSERT IT INTO DISPLAY TASK BLOCK [RELINQUISH  1440 0 2 0 0 1 4 9 0  CT.LP  LI BL*  B*  RO.DTP.LP DTINSERT SCHEDLR  (GET DISPLAY TASK POINTER ADDRESS [INSERT IT INTO DISPLAY TASK BLOCK (RELINQUISH  LI BL* LI BL* B*  RO.DTP.EO DTINSERT RO,DTP.EDI DTINSERT SCHEDLR  [GET DISPLAY TASK POINTER ADDRESS [INSERT IT INTO DISPLAY TASK BLOCK [GET NEXT TASK POINTER [INSERT IT INTO DISPLAY TASK BUFFER [RELINQUISH  LIMI B*  1 INIT  [SET TO HIGH PRIORITY [INITIALIZE SYSTEM  1444  06A01468  1446 046010CB 144C 1450 1454 1458 145C  02001494 06A01468 02001498 06A01468 046010CE  1460 03000001 1464 04601000  I CT.ED  CT.SR  690 691 692 693 694 695 696 697 698 699 700 701 702 703 704  ' '  1468 146C 146E 1470 1472 1474 1476 147A  C060D226 C450 05CO 05C1 C450 05C1 C801D226 045B  ROUTINE TO INSERT A DISPLAY TASK POINTER INTO DTBUP INPUT-RO CONTAINS ADDRESS OF DISPLAY TASK POINTER  MOV* MOV INCT INCT MOV INCT MOV* B  DTBUFP.Rl *R0,*R1  RO RI *R0,*R1  RI Rl.DTBUFP *R11  ' '  GET FREE BUFFER SPACE INSERT REP COUNT INC DISPLAY TASK POINTER ADDRESS INC DISPLAY BUFFER POINTER INSERT DISPLAY TASK ADDRESS INC DISPLAY BUFFER POINTER RESTORE DISPLAY TASK BUFFER POINTER RETURN  706 707 708 709 710 711 712 713 7H 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734  *  *  *  DISPLAY TASK POINTERS  *  *************************************************************** 147C 0000 147E 149C  DTP.CL  WORD WORD  X'0000' DT.CL  REPEAT EVERY REFRESH DISPLAY TASK ADDRESS  1480 0007 1482 14BE  DTP.TO  WORD WORD  X'0007' DT.TO  REPEAT EVERY 7 REFRESHES DISPLAY TASK ADDRESS  1484 0007 1486 159C  DTP.TOl  WORD WORD  X'0007' DT.TOl  REPEAT EVERY 7 REFRESHES DISPLAY TASK ADDRESS  1488 OOOO 148A 15BC  DTP.TO2 WORD WORD  X'0000' DT.T02  REPEAT EVERY REFRESH DISPLAY TASK ADDRESS  148C 0008 148E 15E6  DTP.LP  WORD WORD  X'0008' DT.LF  FLASH ON AND OFF EVERY 8 REFRESHES DISPLAY TASK ADDRESS  1490 OOOO 1492 15FA  DTP.LP  WORD WORD  X'0000' DT.LP  REPEAT EVERY REFRESH DISPLAY TASK ADDRESS  1494 0007 1496 1694  DTP. ED  WORD WORD  X'0007* DT.ED  REPEAT EVERY 7 REFRESHES DISPLAY TASK ADDRESS  1498 OOOO 149A 1796  DTP.EDI WORD WORD  X'0000' DT. EDI  REPEAT EVERY REFRESH DISPLAY TASK ADDRESS  00  736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794  **»»»*««*»********«**»»«*«»«»»»»»*««««»*»*»««*«*«*»*»«^  •*  *  149C 030E 149E F00O 14A0 AOOP 14A2 900F 14A4 BOOO 14A6 3000 14A8 3007 14AA 300B 14AC 3014 14AE 301C 14B0 3022 14B2 302A 14B4 3033 14B6 3038 14B8 3042 14BA 7000 14BC FEOO  DT.CL  14BE 032D 14C0 FOOO 14C2 5013 14C4 8FE0 14C6 84DF 14C8 8C80 14CA 845F 14CC 8EE0 14CE 84SF 14D0 8C80 14D2 84DF 14D4 D400 14D6 8C1F 14D8 87E6 14DA 8C04 ' UDC VH 14DE 8C17 14E0 87E2 14E2 8C04 14E4 87E6 14E6 D400 14E8 40FF 14EA 9244 14EC A180 14EE BOOO 14F0 1001 14F2 1001 14F4 1001 14F6 1001 14F8 8FE0 UFA 91C0 UFC A1C4 U F E BOOO 1500 100A 1502 100A  DT.TO  >  *j *; *;  DISPLAY TASKS  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'030E' X'FOOO' X'AOOF' X'900F' X'BOOO' X'3000' X'3007' X'300B' X'3014' X'301C X'3022' X'302A' X*3033' X'3038' X'3042' X'7000' X'FEOO'  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'032D' X'FOOO' X'5013' X'8FE0' X'84DF' X'BCBO' X'B45F' X'8EE0' X'845F' X'8C80' X'84DF' X'D400' X'BCIF' X'87E6' X'8C04' X'87E2' X'8C17' X'87E2' X'8C04' X'87E6' X'D400' X'40FF' X'9244' X'A180' X'BOOO' x'ioor' X'lOOl' X'lOOl' X'lOOl' X'SFEO' X'91C0' X'A1C4' X'BOOO' X'lOOA' X'lOOA'  i 13 VECTOR COMMANDS jSTARTING ADDRESS IN DFM ; j jMOVE BEAM WRITE 0 WRITE 1 WRITE 2 WRITE 3 WRITE 4 WRITE 5 WRITE 6. WRITE 7 WRITE 8 WRITE 9 RESET END OF TASK 3 RULES DFM ADDRESS BRANCH OVER SUBROUTINES START OF VERTICAL RULE SUBROUTINE  RETURN START OF HORIZONTAL RULE SUBROUTINE 1 t  I 1 [RETURN ;SET BRIGHTNESS [DRAW ALTITUDE RULE  [DRAW AIRSPEED RULE  795 796 797 798 799 800 801 802 803 804 80S 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 B42 843 844 845 846 847 848 849 850 851 852 853  1504 100A 1506 100A 1508 8C1F 150A 9044 150C A180 150E BOOO 1510 1001 1512 1001 1514 1001 1516 1001 1518 8FE0 151A 7000 151C 033D 151E F058 1520 A078 1522 9254 1524 BOOO 1526 3000 1528 A0B8 152A 9254 152C BOOO 152E 300B 1530 A0F8 1532 9254 1534 BOOO 1536 301C 1538 A138 153A 9254 153C BOOO 153E 302A 1540 A178 1542 9254 1544 BOOO 1546 3038 1548 9014 1S4A A078 154C BOOO 1S4E 300B 1550 A0B8 1552 9014 1554 BOOO 1556 3007 1S58 A0F8 155A 9014 155C BOOO 155E 3000 1560 A138 1562 9014 1564 BOOO 1566 3007 1568 A178 156A 9014 156C BOOO 156E 300B 1S70 A1D4 1572 90B8 1574 BOOO 1576 301C 1578 A1D4  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'lOOA' X'lOOA' X'BCIF' X'9044' X'A180' X'BOOO' X'1001' X'lOOl' X'1001' X'1001' X'BFEO' X'7000' X'033D' X'F058' X'A078' X'9254' X'BOOO' X'3000' X'A0B8' X'9254' X'BOOO' X'300B' X'A0F8' X'9254' X'BOOO' X'301C X'A138' X'9254' X'BOOO' X'302A' X'A178' X'9254' X'BOOO' X'3038' X'9014' X'A078' X'BOOO' X'300B' X'AOBS' X'9014' X'BOOO' X'3007' X'A0F8' X'9014' X'BOOO' X'3000' X'A138' X'9014' X'BOOO' X'3007' X'A178' X'9014' X'BOOO' X'300B' X'A1D4' X*90B8' X'BOOO' X'301C X'A1D4'  DRAW VERTICAL SPEED RULE  SCALE LABELS DFM ADDRESS  834 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 665 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912  157A 90F8  157C BOOO  157E 3014 1580 A1D4 1582 9138 1584 BOOO 1586 300B 1588 A1D4 158A 9178 158C BOOO 158E 3007 1590 A1D4 1592 91B8 1594 BOOO 1596 3000 1598 7000 159A FEOO 159C 159E 15A0 15A2 15A4 15A6 15A8 1SAA 15AC 15AE 15B0 15B2 15B4 15B6 15B8 15BA  030D FODO A0F8 90CO BOOO 401F 91C0 B800 40FF A120 9148 BOOO 1001 8FE0 7000 FEOO  15BC 0400 15BE 17B2 15C0 0507 13C2 DA6A 15C4 FOES 15C6 0400 15C8 17CE 15CA 0507 15CC DA78 15CE F0F4 15D0 0400 15D2 17EA 15D4 0512 15D6 DA86 15D8 FlOO 15DA 0400 15DC 1806 15DE 0507 15E0 OAAA 15E2 F122 15E4 FEOO 15E6 0307 15E8 F12E 15EA A080  ;  DT.T01  5 DT.T02  DT.LF  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'90F8'  i  X'3014' X'A1D4' X'9138' X'BOOO' X'300B' X'A1D4' X'9178' X'BOOO' X'3007' X'A1D4' X'91B8' X'BOOO' X'3000' X*7000' X'FEOO'  i i i i  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'030D' X'FODO' X'A0F8' X'90C0' X'BOOO' X'401F' X'91C0' X'B800' X'40FP' X'A120' X'9148' X'BOOO' X'lOOl' X'8FE0' X'7O0O' X'FEOO'  ATTITUDE SCALES  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'040O' DR.ALTD X'O507' RD.ALTD X'FOES' X'0400' DR.VRSP X'0507' RD.VRSP X'F0F4' X'0400' DR.HZST X'0512' RD.HZST X'FIOO' X'0400' DR.ARSP X'0507' RD.ARSP X'F122' X'FEOO' X'0307' X'F12E' X'AOBO'  SCALE POINTERS ALTITUDE POINTER (RAM DATA  X'BOOO'  j  DFM LOCATION VERTICAL SPEED RAM DATA DFM LOCATION HORIZONTAL SITUATION RAM DATA DFM LOCATION AIR SPEED POINTER .DATA PROCESS ROUTINE RAM DATA .END OF TASK ;7 DPU COMMANDS (DISPLAY FILE ADDRESS  913 9U 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971  15EC 1SEE 15F0 15P2 15F4 15F6 15F8  9128 BOOO 300B 3007 3000 7000 FEOO  15FA 0400 15FC 1822 15FE 0321 1600 FOOO 1602 5015 1604 8FE0 1606 8FE0 1608 8FE0 160A 8FE0 160C D400 160E 8DE0 1610 8DE0 1612 8DE0 1614 8DE0 1616 D400 1618 8C1F 161A 8C1F 161C 8C1F 161E 8C1F 1620 D400 1622 8C0F 1624 8C0F 1626 8C0F 1628 8C0F 162A D400 162C A110 162E 9130 1630 BOOO 1632 40IF 1634 8C1E 1636 8DE0 1638 8C0F 163A 8FC0 163C 8DFE 163E 840F 1640 8FDE 1642 7000 1644 0505 1646 DABS 1648 F040 164A 030C 164C F048 164E 1006 1650 1006 1652 1006 1654 1006 1656 8DE0 1658 8C1E 165A 1001 165C 1001 165E 1001  S DT.LP  WORD WORD WORD WORD WORD WORD WORD  X'9128' X'BOOO' X'300B' X'3007' X'3000' X'7000' X'FEOO'  DISPLAY COURSE ERROR  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'0400' DR.GLSP X'D321' X'FOOO' X'5015' X'8FE0' X'8FE0' X'8FE0' X'8FE0' X'D400' X'SDEO' X'8DE0' X'8DE0' X'SDEO' X'D400' X'BCIF' X'8C1F' X'8C1F' X'SCIF' X'D400' X'8C0F' X'8C0F' X'8C0F' X'8CDF' 'X'D400' X'AllO' X'9130' X'BOOO' X'401F' X'8C1E' X'SDEO' X'8C0F' X'SFCO' X'8DFE' X'840F' X'SFDE' X'7OO0' X'0505' RD.GLSP X'F040' X'030C' X'F048' X'1006' X'1006' X'1006* X'1006' X'8DE0' X'BClE' X'1001' X'1001' X'1001'  GLIDE SLOPE AND PATH UPDATE ROUTINE  RESET END OF TASK  DYNAMIC LOCATION OF GLIDE SLOPE RELATIVE PARTS OF GLIDE SLOPE  972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 .026 .027 028 029 030  1660 1001 1662 8C0F 1664 7000 1666 0505 1668 DAC2 166A F05E 166C 030C 166E F064 1670 1010 1672 1010 1674 1010 1676 1010 1678 8C0F 167A 8DE0 167C 100B 167E 100B 1680 100B 1682 100B 1684 8FC0 1686 7000 1688 0400 16SA 1886 168C 050D 168E DACA 1690 F07A 1692 FEOO 1694 1696 1698 169A 169C 169E 16A0 16A2 16A4 16A6 16A8 16AA 16AC 16AE 16B0 16B2 16B4 16B6 16B8 16BA 16BC 16BE 16C0 16C2 16C4 16C6 16C8 16CA 16CC 16CE 16D0 16D2  032B FOOO 500A 8FE0 84DF 8C80 845F 8EE0 845F 8C80 84DF D400 A180 9088 BOOO 1001 1001 1001 1001 8FE0 A180 9108 BOOO 1001 1001 1001 1001 8FE0 A180 9188 BOOO 1001  i DT.ED  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'1001' X'SCOF' X'7O0O' X'0505' RD.GLPT X'F05E' X'030C X'F064' X'1010' X'1010' X'1010' X'1010' X'8C0F' X'8DE0' X'lOOB' X'lOOB' X'lOOB' X'lOOB' X'8FC0' X'7000' X'0400' DR.HDNG X'050D' RD.HDNG X'F07A' X'FEOO'  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'032B' X'FOOO' X'SOOA' X'8FE0' X'84DF' X'8C80' X'845F' X'8EE0' X'845F' X'8C80' X'84DF' X'D400' X'AIBO' X'9088' X'BOOO' X'1001' X'1001' X'1001' X'1001' X'8FE0' X'A180' X'9108' X'BOOO' X'1001* X'1001' X'1001' X'1001' X'8FE0' X'A180' X'9188' X'BOOO' X'1001'  DYNAMIC PART OF GLIDE PATH  RELATIVE PART OF GLIDE PATH  HEADING ROUTINE  DISPLAY ENGINE DATA DFM ADDRESS JMP PAST SUBROUTINES START OF RULE SUBROUTINE  START OF MAIN ROUTINE START OF FIRST RULE  START OF SECOND RULE  START OF THIRD RULE  1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068  16D4 16D6 1608 16DA 16DC 16DE 16E0 16E2 16E4 16E6 16E8 16EA 16EC 16EE 16F0 16F2 16F4 16F6 16F8 16FA 16FC 16FE 1700 1702 1704 1706 1708 170A 170C WOE 1710 1712 1714 1716 1718 171A 171C 171B  1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089  1722 1724 1726 1728 172A 172C 172E 1730 1732 1734 1736 1738 173A 173C 173E 1740 1742 1744 1746 1748  loot  i no  1001 1001 1001 8FE0 A180 9208 BOOO 1001 1001 1001 1001 8FE0 7000 0351 F054 A178 9098 BOOO 3038 A138 9098 BOOO 302A A0F8 9098 BOOO 301C A0B8 9098 BOOO 300B A078 9098 BOOO 3000 9118 A178 BOOO  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  IOIO  wimu  9118 A138 BOOO 3014 9118 A0F8 BOOO 300B 9118 A0B8 BOOO 3007 9118 A078 BOOO 3000 9198 A178 BOOO 3038  WORD WORD WORD WORD WORD WORD WORD ' WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  1*1001' X'lOOl* X'lOOl' X'8FE0' X'A180' X'9208' X'BOOO' X'lOOl' X'lOOl' X'lOOl' X'lOOl' X'8FE0' X'700O' X*0351' X'F054' X'A178' X'9098' X'BOOO' X'3038' X'A138' X'9098' X'BOOO' X'302A' X'A0F8' X'9098' X'BOOO' X'301C X'A0B8' X'9098' X'BOOO' , X'300B' X'A078' X'9098' X'BOOO' X'3000' X'9118' X'A178' X'BOOO' %• j o t c ' X'91l«' X'A138' X'BOOO' X'3014' X'9118' X'AOFS' X'BOOO' X'300B' X'9U8' X'A0B8' X'BOOO' X'3007' X'9118' X'A078' X'BOOO' X'3000' X'9198' X'A178' X'BOOO' X'3038'  START OF  LABELS START OF  8  6  [4  2  ,0  START OF  1 4  3  2  1  'o  , START OF  1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 till 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142  174A 9198 174C A138 174E BOOO 1750 302A 1752 9198 1754 A0F8 1756 BOOO 1758 301C 175A 9198 175C A0B8 175E BOOO 1760 300B 1762 9198 1764 A078 1766 BOOO 1768 3000 176A 9218 176C A178 176E BOOO 1770 301C 1772 A138 1774 9218 1776 BOOO 1778 3014 177A A0F8 177C 9218 177E BOOO 1780 300B 1782 AOBB 1784 9218 1786 BOOO 1788 3007 17BA A078 178C 9218 178E BOOO  1790 3000 1792 7000 1794 FEOO 1796 1798 179A 179C 179E 17A0 17A2 17A4 17A6 17A8 17AA 17AC 17AE 17B0  0400 184B 0306 F0F4 5080 8FC7 85F6 8FD6 8C0P D400 0511 DAE4 F100 FEOO  1 DT.ED1  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'9198' X'A138* X'BOOO' X*302A' X'9198' X'A0F8' X'BOOO' X'301C* X'9198* X'AOBS' X'BOOO' X'300B' X'9198' X'A078' X'BOOO' X'3000' X'9218* X'A178' X'BOOO' X'301C X*A138' X'9218' X'BOOO' X'3014' X'A0F8* X'9218' X'BOOO' X'300B' X*AOB8' X'9218' X'BOOO' X'3007' X'A078' X'9218' X'BOOO' X'3000' X'7000' X'FEOO'  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'0400' DR.ENQ X'0306' X'F0F4' X'5O80' X'8FC7' X'85F6' X'8FD6' X'8C0F' X'D400' X'0511' RD.ENG1 X'FIOO' X'FEOO*  START OF LABELS FOR FOURTH RULE  I  t I BHD Of TASK COLLECT ENCINE DATA ROUTINE ADDRESS POINTER SUBROUTINE DFM ADDRESS  END OF SUBROUTINE DYNAMIC DATA  1144 1145 1146 1147 1148 1149  1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192  1193 1194 1195 1196 1197 1198 1199 1200 1201 1202  1* ;* (*  DISPLAY ROUTINES  •  17B2 C160D1F4 17B6 0A65 17B8 0245FFOO 17BC 06C5 17BE 02250080 17C2 0206A000 17C6 E185 17C8 C806DA6C 17CC 04 5B  DR.ALTD MOV* SLA AND I SWPB AI LI SOC MOV* B  REPCNT.R5 R5.6 R5,X'FF00' R5 R5,X'0O8O' R6,X'A000' R5.R6 R6.RD.ALTD1 *RII  ;GET AIRSPEED ;PROCESS IT jGET MS 8 BITS ;GET B BITS INTO LS BYTE ; ;R6 GETS Y MASK ORI WITH R5 LOAD IT RET  17CE C160D1F4 17D2 0A55 17D4 0245FF00 17D8 06C5 17DA 02250080 17DE 0206A000 17E2 E185 17E4 C806DA7A 17E8 045B  DR.VRSP HOV* SLA ANDI SWPB AI LI SOC MOV* B  REPCNT.R5 R5.5 R5,X'FF00' R5 R5,X'0080' R6,X'AO0O' R5.R6 R6.RD.VRSP1 *R11  GET VERTICAL SPEED PROCESS IT GET MS 8 BITS GET 8 BITS INTO LS BYTE  17EA C160D1F4 17EE 0A65 17F0 02453F00 17F4 06C5 17F6 022500D8 17FA 0206A000 17FE E185 1800 C806DA88 1804 045B  DR.H2ST  MOV* SLA ANDI SWPB AI LI SOC MOV* B  REPCNT.R5 R5,X'0006' R5,X'3F00' R5 R5,X'00D8' R6,X'A0O0' R5.R6 R6.RD.HZST1 *R11  GET PITCH  1806 C160D1F4 180A 0A4S 180C O245FF0O 1810 06CS 1812 O225O0CO 1816 02069000 181A E185 181C C806DAAC 1820 045B  DR.ARSP  MOV* SLA ANDI SWPB AI LI SOC MOV* B  REPCNT,R5 R5.4 R5,X'FF00* R5 R5,X'00C0' R6,X'9000' R5.R6 R6.RD.ARSP1 *R11  •GET X MASK OR INTO X MASK .UPDATE SPEED ;RET  1822 C160DIF4 1826 0A45 1828 0245FF00 1B2C 06C5 182E C1C5 1830 02250080 1834 0206A000 1838 E185 183A C806DABA 183E O22700C0 1842 02069000 1846 E187 1848 C806DAC2  DR.GLSP  MOV* SLA ANDI SWPB MOV AI LI SOC MOV* AI LI SOC MOV*  REPCNT,R5 . R5.4 R5,X'FF00' R5 R5.R7 R5,X'O080' R6,X'A000' R5.R6 R6 RD.GLSP+2 R7,X'00C0' R6,X'9000' R7.R6 R6.RD.GLPT  ,GET REPCNT ;PROCESS IT jCET MS SIG BITS ;INTO LS BYTE ;SAVE DATA ,ADD OFFSET ;GET Y MASK JOR DATA INTO Y MASK ;UPDATE DATA [PROCESS NEW DATA ;GET X MASK ;OR DATA INTO X MASK [UPDATE DATA  f  R6 GETS Y MASK ORI WITH R5 LOAD IT RET  PROCESS IT  UPDATE IT RETURN GET REPCNT PROCESS IT GET MS SIG BITS INTO LS BYTE  * * *  1203 184C 04 5B 1204 120S 184E C160D1F4 1206 1852 C1C5 1207 1854 0A65 1208 1856 0245FFOO 1209 185A 06C5 1210 185C 02250080 1211 1860 0206A000 1212 1864 E146 1213 1866 C805DAE4 1214 186 A C805DAF4 1215 186E 0A57 1216 1870 0247FF00 1217 1874 06C7 1218 1876 02270080 1219 187A E1C6 1220 187C C805OAEC 1221 1880 C805DAFC 1222 1884 045B 1223 1224 1886 045B  •  DR. EMC  ft  DR.HDHG  B  *R11  MOV* MOV SLA ANDI SWPB AI LI SOC MOV* MOV* SLA ANDI SUPB AI SOC MOV* MOV* B  REPCNT,R5 R5.R7 R5,6 R5,X'PF0O* R5 R5,X'0080' R6,X'A000' R6.R5 R5.RD.ENC1 R5.RD.ENG3 R7.5 R7,X'FF00' R7 R7,X'0080' R6.R7 R5.RD.ENG2 R5.RD.ENG4 *RU  B  *R11  ; RETURN GET SIMULATED DATA SAVE IT PROCESS DATA  GET VECTOR DATA INTO 7 MASK 1 STORE DATA ; PROCESS DATA  [GET VECTOR DATA INTO Y MASK 1 STORE DATA I STORE DATA ;RETURN ;TO BE ADDED  1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260  • ************************** ;* • START OF PROM COPT >* ;* • ************************** 1888 0000  RDATAS  188A 188C 188E 1890 1892 1894 1896 1898 189A 189C 189E 18A0 18A2 18A4 18A6 18A8 18AA 18AC 18AE 18B0 18B2 18B4 18B6 18B8 18BA 18BC 18BE 18C0  9234 A09B BOOO 8FC7 8C1D 8DE7 7000 9044 AO 80 BOOO 8DE7 8C1D 8FC7 7000 91 AO AOEB BOOO 8FE0 8FE0 8FE0 8FE0 8FE0 8C17 87EO 87EO 8C08 8FE0 8FE0  1261 16C2 8FE0  RS.ALTD WORD RS.ALTD1 WORD WORD WORD WORD WORD WORD RS.VRSP WORD RS.VRSF1 WORD WORD WORD WORD WORD WORD RS.HZST WORD RS.H2ST1 WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  1262 126} 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284  18C4 ISC6 18CB 18CA 18CC 18CE 18D0 18D2 18D4 18D6 18D8 180 A 18DC 16DE 18E0 18E2 18E4 18E6 18E8 18EA 18EC 18EE 18F0  SFEO 8FE0 7000 A1B4 9100 BOOO 8EDE 8DC0 8ECF 7000 40FF A100 90C0 BOOO 7000 9100 A080 BOOO 7000 A190 90C0 BOOO 300B  WORD WORD WORD RS.ARSP WORD RS.ARSP1 WORD WORD WORD WORD WORD WORD WORD RS.GLSP WORD WORD WORD WORD RS.ta.PT WORD WORD WORD WORD RS.HDNG WORD WORD WORD WORD  WORD  !  X'OOOO' X'9234' X'A09B' X'BOOO' X'8FC7' X'8C1D' X'8DE7' X'700O' X'9044' X'A08D' X'BOOO' X'8DE7' X'SCID' X'8FC7' X'7000' X'91A0' X'AOEB' X'BOOO' X'BFEO' X'SFEO' X'8FE0' X'8FE0' X'8FE0' X'8C17' X*87E0' X'87EO* X'8C08* X'8FE0' X'8FE0' X'BFEO' X'SFEO' X'8FE0' X'7000' X'A1B4' X'9100' X'BOOO' X'8EDE' X'8DC0' X'8ECF' X'7000' X'40FF' X'AIOO' X'90C0' X'BOOO' X'7000' X'9100' X'AOBO' X'BOOO' X'7000' X'A190' X'90C0* X'BOOO' X'300B'  -.START OF PROM COPT ALTITUDE DATA  1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311  18F2 18F4 18F6 18F8 18FA 18FC 18FE 1900 1902 1904 1906 1908 190A 190C 190E 1910 1912 1914 1916 1918 191A 191C 191E 1920 1922 1924 1926  3007 3000 A190 9180 BOOO 301C 3038 3033 7000 AOOO 9078 BOOO 107B AOOO 90F8 BOOO 107B AOOO 9178 BOOO 107B AOOO 91F8 BOOO 107B 7000 FFFF  WORD WORD WORD WORD WORD WORD WORD WORD WORD RS.ENG1 WORD WORD WORD WORD RS.ENG2 WORD WORD WORD WORD RS.ENG3 WORD WORD WORD WORD RS.ENG4 WORD WORD WORD WORD WORD WORD  X'3007' X'3000' X'A190' X'9180' X'BOOO' X'301C' X'3038' X'3033' X'7000' X'AOOO' X'9078' X'BOOO' X'107B' X'AOOO' X'90F8' X'BOOO' X'107B' X'AOOO' X'9178' X'BOOO' X'107B' X'AOOO' X'91F8' X'BOOO' X'107B' X'7000' X'FFFF'  ENGINE POINTER DATA  END OF PROM COPT  1313  1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1332 1353 1354  DOOO DOOO D020 D040 D060 D080 DO AO DOCO DOEO D100 D120 DUO DUO D162 D164 D166 D168 D16A D16C DUE D170 D172 D174 D176 D178 D17A D17C D1F4 D1F6 D1F8 D1FA D1PC DIFE  D226 D228 D264 DA64  0010  0010 0010 0010 0010 0010 0010 0010 0010 0010 0010 OOOO D164 D17C D186 D190 D19A D1A4 DUE D1B8 D1C2 D1CC D1D6 D1E0 D1EA 00 3C FFFF D264 OOOO DIFE  mr  0014 D228 001E 0400 0002  • ************************************************************** •* *• •* RAM STORAGE AREA *; ;* *• ************************************************************************. ORG X'DOOO' SCHEDWF BLOCK 16 [SCHEDULER WORKSPACE CMDWRJC BLOCK 16 [COMMAND HANDLER WORKSPACE 16 [CL WORKSPACE CTWP.CL BLOCK 16 [CS WORKSPACE CTWP.CS BLOCK 16 [DT WORKSPACE CTWP.DT BLOCK CTWP.TO BLOCK 16 [TO WORKSPACE 16 CTWP.LF BLOCK [LF WORKSPACE 16 CTWP.LP BLOCK [LP WORKSPACE 16 CTWP.ED BLOCK [ED WORKSPACE CTUP.SR BLOCK 16 [SR WORKSPACE 16 [WORKSPACE FOR UPDATE ROUTINE UPDATWS BLOCK CPRIOR WORD 0 [CURRENT PRIORITY FRLSP WORD [FREE LIST POINTER FRLST FRLST WORD NODES WORD NODES+10 WORD NODES+20 WORD NODES+30 WORD N0DES+40 WORD NODES+50 WORD NODES+60 NODES+70 WORD WORD NODES+80 WORD NODES+90 WORD NODES+100 NODES+110 WORD 60 [FREE NODE AREA NODES BLOCK ' X'FFFF' [REPCOUNTER RE PC NT WORD [DISPLAY BUFFER POINTER DSPPTR WORD DISBUF 00 SPRIOR WORD [PRIORITY SAVE CHRBUF BUFPTR WORD [BUFFER POINTER [RDYC LIST RDYC WORD X'FFFF' [CHARACTER BUFFER 20 BLOCK CHRBUF DTBUFP [DISPLAY TASK BUFFER POINTER WORD DTBUF 30 DTBUF BLOCK (DISPLAY TASK BUFFER BLOCK 1024 (DISPLAY BUFFER DISBUF BLOCK 2 [AREA FOR DISPLAY TESTS DTP.DT  1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414  DA68 OOOO DA6A 9234 DA6C A09B DA6E BOOO DA 70 8FC7 DA72 8C1D DA74 8DE7 DA76 7000 DA78 9044 DA7A A08D DA7C BOOO DA7E 8DE7 DA80 8C1D DA82 8FC7 DA84 7000 DA86 91A0 DA88 AOEB DA8A BOOO DA8C 8FE0 DA8E BFEO DA90 8FE0 DA92 8FE0 DA94 8FE0 DA96 8C17 0A98 87EO DA9A 87EO DA9C 8C08 DA9E 8FE0 DAAO 8FE0 DAA2 8FE0 DAA4 8FE0 DAA6 8FE0 DAA8 7000 OAAA A1S4 DAAC 9100 DAAE BOOO DABO 8EDE DAB 2 8DC0 DAB 4 8ECP DAB 6 7000 DABB 40FF DABA A100 DABC 90C0 DABE BOOO DACO 7000 DAC2 9100 DAC4 A080 DAC6 BOOO DAC8 7000 DACA A190 DACC 90C0 DACE BOOO DADO 300B  • ************************* i* RAM DATA ;* ;* • ************************* RDATA X'0000' WORD \  RD.ALTD WORD RD.ALTD1 WORD WORD WORD WORD WORD WORD RD.VRSP WORD RD.VRSP1 WORD WORD WORD WORD WORD WORD BD.BZST WORD RD.HZST1 WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD RD.ASSP WORD RD.ARSP1 WORD WORD WORD WORD WORD WORD RD.CLSP WORD WORD WORD WORD WORD RD.G1.PT WORD WORD WORD WORD RD.HDNG WORD WORD WORD WORD  X'9234' X'A09B' X'BOOO' X'8FC7' X'8C1D' X'8DE7' X'7000' X'9044' X'A08D' X'BOOO' X'8DE7' X'8C1D' X'8FC7' X'7000' X'91A0' X'AOEB' X'BOOO' X'8FE0' X'SFEO' X'8FE0* X'SFEO' X'8FE0* X'8C17' X'87E0* X'87EO' X'8C08' ' X'8FE0' X'SFEO' X'8FE0' X'8FE0' X'SFEO' X'7000' X'A1B4' X'9100' X'BOOO' X'8EDE' X'8DC0' X'8ECF' X'7000' X'40FF' X'AIOO' X'90C0' X'BOOO' X'7000' X'9100' X'A080' X'BOOO' X'7000' X'A190' X'90C0' X'BOOO' X'300B'  [START OF RAM COPT ALTITUDE DATA  1415 DAD 2 3007 1416 DAD4 3000 1417 DAD6 A190 1418 DAD 8 9180 1419 DADA BOOO 1420 DADC 301C 1421 DADE 3038' 1422 DAEO 3033 1423 DAE2 7000 1424 DAE4 AOOO 1425 DAE6 9078 1426 DAE8 BOOO 1427 DAEA 107B 1428 DAEC AOOO 1429 DAEE 90F8 1430 DAFO BOOO 1431 DAF2 107B 1432 DAF4 AOOO 1433 DAF6 9178 1434 DAF8 BOOO 1435 DAFA 107B 1436 DAFC AOOO 1437 DAFE 91F8 1438 DBOO BOOO 1439 DB02 107B 1440 DB04 7000 1441 DB06 FFFF  ED.ENG1  RD.ENG2  RD.ENG3  BD.ENG4  WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD WORD  X'3007' X'3000' X'A190' X'9180' X'BOOO* X'301C X'3038' X'3033' X'7000' X'AOOO' X'9078' X'BOOO' X*107B' X'AOOO' X'90F8' X'BOOO' X'107B' X'AOOO' X'9178' X'BOOO' X'107B' X'AOOO' X'91F8' X'BOOO* X*107B' X'7000' X'FFFF'  ENGINS POINTER DATA  END OF RAM COPY  1443 1444 1445  FOOO FOOO 0800  DFM END  ORG BLOCK  X'FOOO' 2048  [DISPLAY FILE ORIGIN ;DFM  DEFINED  1348 42 13S0 41 420 406 409 476 489 36 1320 1330 652 656 659 681 673 677 687 665 606 611 616 636 626 631 641 621 1321 1322 1323 1327 1325 1326 1328 1324  433 436 465 1444 1353 268 47 37 258 266 45 312 326 453 480 445 451 1150 1180 1205  VALUE  A  7 E 0 E C 8 0 6 5 0 0 0 C 4  C 4  0 0 8 0 8 0 0 0 8 8 8 0 0 0 0 0 0 0 0 A  6 4  0 4 2  7 3 6 A  0 C 8 4  0 E C 2  6 E  NAME  BUFPTR CERROR CHRBUF CLEAR CLRCMD CMDHDL CMDHDL1 CMDHLDX CMDNODE CMDPRIOR CMDWRK CPRIOR CT.CL CT.CS CT.DT CT.ED CT.LF CT.LP CT.SR CT.TO CTP.CL CTP.CS CTP.DT CTP.ED CTP.LF CTP.LP CTP.SR CTP.TO CTWP.CL CTWP.CS CTWP.DT CTWP.ED CTWP.LF CTWP.LP CTWP.SR CTWP.TP DECODE DECODEl DERROR DFM DISBUF DISCNT DISERR DISPRIOR DISTSK DISTSK1 DISUPD DISUPDT DISVEC DLOOP DLOOP1 DMATCH DMATCH1 DR.ALTD DR.ARSP DR.ENG  REFERENCES  54 465 53 414 415 100 419 460 477 407 99 62 608 613 618 638 628 633 643 623 573 575 579 593 587 589 597 583 609 614 619 639 629 634 644  416  418  421  420  434  1348  467 422  492 139  491  158  237  240  370  1346  303  316  331  624  413 444 439 51 56 265 281 238 254 251 270 271 269 457 484 442 890 905 1130  435  464  239  1190 1224 1170 1160 233 250 256 1346 742 999 1129 910 921 760 872 889 1352 1351 697  2  6 A E A  4 2  6 C  4 6 6 A E C C  8 6 8  712 1354 730 733 724 727 715 718 721 293 46 35 43 34 39 1331  C  1332  4 6 0  179 SO  71 78 83 91 342 352 346 202 205 216 120 1344 461 .363 364 395 396 424 428  4 4 8 C  0 0 4 8 2  0 0 0 F  0 2  C C C C  8 E  2 E  8 0 6 C A A C A C  4 C  DR.GLSP DR.HDNG DR.HZST DR.VRSP DSPLMD DSPLMD1 DSFLMD2 DSPPTR DT.CL DT.ED DT.ED1 DT.LF DT.LP DT.TO DT.T01 DT.T02 DTBUP DTBUFP DTINSERT DTP.CL DTP.DT DTP.ED DTP.EDI DTP.LF DTP.LP DTP.TO DTP.TOl DTP.T02 DYNDAT DYNINF EOC EOJ EOL EOT FRLSP FRLST GTFREE INIT INIT1 INIT2 INIT3 INIT4 INSDSP INSDSPX INSDSP1 INSERT INSERT1 INSERT2 INTRSV NODES NT ABLE RD.ALTD RD.ALTD1 RD.ARSP RD.ARSP1 RD.ENG1 RD.ENG2  922 993 900 895 257 263 57 713 731 734 725 728 716 719 722 78 79 653 684 652 661 681 683 673 677 665 667 669 273 272 412 264 206 262 69 68 122 688 76 73 89 85 301 350 351 135 215 207 121 70 1339 448 892 1157 907 1187 1140 1220  2B4 241  342  353  371  248 249 662  1351 697 666  703 668  670  180  190  191  451  478  147  459  486  210 242 1332 1340  369 1333 1341  1334 1342  674  678  682  1336  1337  1338  447 438 179 1331 137  330  1213  1335 1343  1432 1436 1407 1402 1411 1377 1378 1370 1371 1361 1231 1349 538 190 1345  BD.ENG3 RD.ENG4 RD.CLPT  1233 1234 1265 1266 1294 1298 1302 1306 1277 1272 1281 1247 1248 1240 1241 32  RS.ALTD RS.ALTD1 RS.ARSP RS.ARSP1 RS.ENG1 RS.ENG2 RS.ENG3 RS.ENG4 RS.GLPT RS.GLSP RS.HDMG RS.HZST RS.HZST1 RS.VRSP RS.VRSP1 RO  RD.Gl.SP RD.HDNG RD.HZST RD.HZST1 RD.VRSP RD.VRSP1 RDATA RDATAS RDYC READ REMOVE REPCNT  13  RI  42 43  RIO RU  44  R12  45  R13  1214 1221 976 959 995 902 1177 897 1167 82 81 65 410 168 59 1205  50 64 81 131 144 217 252 36J 379 421 465 541 673 70 202 298 328 433 450 480 191 182 1168 91 164 511 124 164  1202 1198  157 540  166  203  204  253  266  1150  1160  1170  1180  1190  51 65 83 133 145 218 255 368 380 434 480 542 677 71 209 299 329 437 450 482 192 193 1178 157 165 538 127  53 68 87 134 146 238 256 370 407 435 481 652 681 75 259 300 347 440 453 697 510 219 1188 158 166  54 69 125 139 179 239 258 373 408 441 485 659 683 82 261 302 348 441 455 698 520 354 1203 159 167  56 71 126 140 181 240 259 375 412 453 515 661 698 86 293 312 371 443 461 700 525 528 1222 160 192  57 74 127 141 181 241 280 376 414 454 517 665 699 88 295 313 373 445 462 701  61 78 128 142 202 248 281 377 417 458 518 667 701 92 296 314 416 446 462 702  62 79 130 143 216 250 283 378 420 463 527 669  544 1224 161 234  704  1158  162 243  163 363  129  130  132  133  136  145  93 297 326 417 449 477 703  46 47 34  E P 2  R14 R15 R2  35  3  R3  36 37  4 5  R4 R5  38  6  R6  39  7  R7  40 41 157  8 9  R8 R9 SCHEDLR  319 347 552 372 578 592 586 596 582 362 329 38) 373 379 38 44 510 527 521 525  0  E  8 A 4 E  4 A A 4 6 0  e  0  c 4 0 E  6 A 2  SCHEDWP SPRIOR TABLE 1 TABLE2C • TABLE2D TABLE2E TABLE2L TABLE2S TABLE2T UPDATE UPOATWS UPDATX UPDAT1 UPDAT2 UPPRIOR VECTR WRITE WRITEX WRITE1 WRITE2  143 141 67 212 264 313 436 204 375 208 205 1154 1170 1182 1194 1210 295 1175 1198 1194 1219 342  162 160 72 214 268 315 437 212 379 209 206 1156 1171 1183 1195 1212 300 1176 1200 1199  169 83 218 270 326 438 213 383 249 299 1160 1172 1184 1197 1213 1155 1177 1201 1201  84 . 252 272 327 446 214 452 250 302 1161 1173 1186 1205 1214 1156 1185 1202 1206  86 253 280 345 447 216 456 372 1150 1162 1174 1190 1206 1220 1157 1186 1211 1215  203 260 283 349 660 297 479  205 261 293 377  208 262 294 381  328 483  343  1151 1163 1176 1191 1207 1221 1165 1187 1212 1216  1152 1164 1180 1192 1208  1153 1166 1181 1193 1209  1166 1196 1219 1217  1167 1197  343  344  345  346  347  352  353  267 685 120 125 433 553 556 568 562 565 559  385  487  654  663  671  675  679  237  366  411  466  374 382 384 367 268 282 519 522 526  NO ERRORS POUND IN ABOVE ASSEMBLY  524  514  1218  138  APPENDIX C  139  X  ALD  ALS  REG MEM INC SEL p  BRANCH ADDRESS  0  'A J±  MEM INC  9 1011  1213  £  NXT  "A B  NXT . 1819  1516  BRANCH FORMAT FIELDS BRANCH ADDRESS - 10 b i t m i c r o i n s t r u c t i o n b r a n c h  address  - b i t 9 i s MS DRAW - 0 NOP - 1 s t a r t ramp f o r v e c t o r g e n e r a t o r  i n 1/2  clock cycle  ALU FORMAT FIELDS ALU S o u r c e ( A L S ) - 000 NOP  ALU D e s t i n a t i o n - 000 NOP  - 001 x S h o r t  - 001 X  - 010 y S h o r t  - 010 Y  - O i l Long  - O i l PC  - 100 Macro a d d r e s s register(PC)  - 100 _  - 101 H a l t s t r o b e  - n o N o t used  - 110 Load s y m b o l * address - I l l N o t used  - i l l Not used  R e g i s t e r S e l e c t - 00,Dummy (REG S E L ) _ Q 1  x  - 10 Y  11 S u b r o u t i n e r e t u r n address r e g i s t e r  m  Intensity N o t  u s e d  140  COMMON FIELDS Memory S e l e c t ( M E M ) - 00 -  01  - 10  Symbol  - 11  None  Next A d d r e s s C o n t r o l ( N X T ) - 0010  ALU Enable(ENAB)  *  Increment C o n t r o l ( I N C ) - 00 - 01  None DFM  -  0011  -  0100  -  1111  ROM  None DFM A d d r e s s  - 10  Symbol A d d r e s s  - 11  None  Load s t a r t i n g a d d r e s s Fetch next i n s t r u c t i o n Jump t o s t a r t i n g a d d r e s s Branch  - 0 ALU c l o c k n o t e n a b l e d - 1 ALU c l o c k e n a b l e d  These s i g n a l s a l t h o u g h n o t s p e c i f i c a l l y ALU s o u r c e s have been p u t h e r e f o r hardware r e d u c t i o n w i t h t h i s a p p r o a c h  ** A l t h o u g h o n l y 2 b i t s would n o r m a l l y be r e q u i r e d f o r t h i s f i e l d 4 were used w i t h t h e i n t e n t i o n o f e n a b l i n g f u t u r e enhancements t o the microsequencer  141  APPENDIX D  TMS 9901  ' • TIM 9904  48 MHz  RESET  i  RAM  .4 . . •  r  EPROM  1  RAM  EPROM  u  I  1  i:  j  TMS 9902  TMS 9901  RS 232 INTERFACE  BUFFERS  TTY INTERFACE  IF  I/O CONNECTOR  TERMINAL CONN.  BUS CONNECTOR B l oGk:-:diagram-:6f - :TM9 9 0 / IPOM ;  -p-  EPROM  STATIC  'MEMORY  RAM  MEMORY  h  ADDRESS DECODE &TIMING LOGIC  —I  X  BUFFERS  BUS  CONNECTOR  Block diagram  o f TM990/201  144  APPENDIX E  S3  i  f  zs  • z  3/> 33  i .?  3 :  4* -  T ,4  IS  Jl Jl  2s/sr? *Y 12 S7>/ 3Y 38 4* a.  4 ^  14 tY IS 2* tSISJ ZY zs 2Y JlL 3B JL 44 4Y  DFM ADDRESS " DECODING ~  r it 7  SZ  I 1—  1  1FT Sf  2P&  2o  A* 3t  D-^  i  /*V Zl/4 3»  7415*4/ I*  i3  4  It  3*? Q-^}-^ /7  47 4S  78  0  4t>  ADZ  n  3>3  Z/J/  IL  7? 44 5  '8  b  4i  1—  U7~  w 10  /O  4tser-L>o  • o  I  14  JLl.  J 4 s i  2//*.  3?*  I  : r<La-  0< ? ys-  Dl 73 it  7>3 CS  /h /Ii 14 it At 3, 43 Z//4 13 13 7)7 44 4S ?t 4* . *, if 47 7>3 /t. 43 »? <5  8 9 7o  42_  /A. 74*514/  ;//.  /Z. /3  \  /A. 7S /4  /S  /4<{j£ 79  —0"  3>/>/V» 0-VS~+  Si  S6  59F 43. St  .  DISPLAY FILE MEMORY:  ' ON  O—  3W. Sneer 2 ps? /Z/ Pi  /A* Sn^tr,  /?/>4/L /z/7f.  SB  Sf CioCKI*  V  13  7^/ Co  S7  04  MACRO ADDRESS REGISTER  ej>j> JO SP t - er  Co  2  3.9  ^/  \z>  \/4 J3_  ^ 74/t,/ >mflt>DX o: ?/ Co IS ,  Sneer 3 op IZ Ms : r.  /?P/M  M/71  NEXT ADDRESS SELECTION I fit/ $ra*t#r /lrtn- • t  Sfm/IO t><T+ Cc S7  3>PlL S«eer S ar fZ  S8  O 3-—D  xi/«vy  SS  O  O DWO:tl+ 58 2>fU.  !  &4 Ao  1  is/38 Ai  3  -tit  1  /If. JM-4  ^eys-  M -qtf —D £Pcs -  sfe  *  BOS  -W -ah  : 5*  94 9s /9  £o-4  REGISTER  SID -O XASt'  -oXtw^'"  Ai  Si -Hi «. g,  $3  T  /f3 _ t-siaXy-  f4lU  as-  S3 • • •  /6 EP sr  6 ...  fitter-Z>i> /Vg^Q  ALU  SYMBOL A D D R E S S -  Co lS~  ep er  <fA (PA  8 f  74 lb I $j>  S3  OPERAND  DECODING  /2> <pj> 1L. = 0 Z>YmAi>6:7f Co  Jt.0 I—O  -D  iW7» —  r-v7  s?  S7.»  .£> CLOCK-  S? /oesr88  ZyVZ  LJS3.79  1IM^ I I  1* 3>  ' <&ssr-  ^  uJ3  Ml.*-  cut CiA  •e^  T.  -OyccZeXo •  4 !  DPU  CLOCK CONTROL  H-  77/*  S~77eer 9  /£  1  BtWf-  57 'o—.  V If Cue /<r 1> 3t 3Q 4J> 7.S274 4* Sf 5? CP XV4 ft 1* 7t gp &7 &>  Y  Bi  O8  -£37  -a*  INTENSITY CONTROL LATCH  -or • • • -a «• 1  -O 3  -ai  X CO-ORDINATE LATCHES  ; ' !  •;  U l  ~1>PCC' • S//£tST  7/ Of /Z.  se 6s.vo o://+Cc S/b  S  * 4° IJ> la I w isi 74 *•<> 3D 3Q- ID ,i 4T> — 49IS 12L- 4 /+ hi, L^LL. 5  ID 32> 4J> JL 14  7±  lb 13174*4 3d 10 40 It St!  7 Y CO-ORDINATE LATCHES  V  -  I*  /q  II  13 4P  m  M- *-  cm  19  X2>  LSI7S A? rtfis-V 3?  CU;  1  4^  1%  It  II  ML  33> ftl V  s  cut  i i ,.  49  r  Slb •sso vciK4y£>-  J  P4  -a 3/ -a 32-  -ai?. -a  34 -Q3S  -a 34  -a a -a * -a -a JL4 -a *s z  _ •  ^ 6  - 0 *-  7  -n 38 -a if 4o  -a  -a So  In  157  APPENDIX F  158  ********************************************** *  *  * *  * *  THE FOLLOWING I S THE CONTENTS OF THE CONTROL STORE REQUIRED BY THE DPU I N THE E A D S . .  * * *********************************************************************** ADDR  MICROCODE  COMMENTS  *********************************************************************** * * *  ROUTINE TO FETCH A DPU COMMAND FROM THE DFM  *  * * *********************************************************************** 0000 0001 0002  FFFC84 FFFC86 FFFC28  GET DFM COMMAND LATCH THE DFM DATA LOAD STARTING ADDRESS AND JUMP  *********************************************************************** * * *  ROUTINE TO EXECUTE A JUMP TO SUBROUTINE  *  * * *********************************************************************** 0010 0011 0012  FF0607 FED807 F0009E  STORE OLD PC LOAD UP NEW PC BRANCH TO FETCH ROUTINE  *********************************************************************** * * *  ROUTINE TO EXECUTE A DRAW CHARACTER  *  * * *********************************************************************** 0030 0031 0032 0033  FFFD04 FFFD06 FFFD04 FFFD48  NOP ENABLE SYMBOL ROM NOP LOAD STARTING ADDRESS AND BRANCH  *********************************************************************** * * *  ROUTINE TO SET I N T E N S I T Y L E V E L  *  * * *********************************************************************** 0040 0041  FEE007 F0009E  LOAD BRIGHTNESS VALUE RETURN TO FETCH ROUTINE  *********************************************************************** * * *  ROUTINE TO EXECUTE A BRANCH  *  * * *********************************************************************** 0050  FED807  LOAD NEW PC  58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116  0051  F0001E  BRANCH TO FETCH ROUTINE  ********************************************************* * *  ROUTINE TO HALT DPU  159  * *  * * *********************************************************************** 0070 0071  FF4007 F0001E  SET HALT FLAG BRANCH TO FETCH ROUTINE  *********************************************************************** * * *  ROUTINE TO DRAW SHORT VECTOR  *  * * *********************************************************************** 0080 0081 0082 0083 0084 0085 0086 0087 0088 0089 0089  FE4A07 FE9407 FFFE06 FFFC06 FE0A07 FE1407 F00206 FFFC06 FFFC06 FFFC06 F0019E  LOAD SHORT X LOAD SHORT Y DRAW VECTOR NOP LOAD NEW SHORT X LOAD NEW SHORT Y RESET BEAM NOP NOP NOP BRANCH TO FETCH I  *********************************************************************** * * *  ROUTINE TO LOAD LONG VECTOR Y  *  * * *********************************************************************** 0090 0091  FECA07 F0009E  LOAD LONG Y BRANCH TO FETCH ROUTINE  *********************************************************************** * * *  ROUTINE TO LOAD LONG VECTOR X  *  * * *********************************************************************** 00A0 00A1  FED407 F0009E  LOAD LONG X BRANCH TO FETCH ROUTINE  *********************************************************************** * * *  ROUTINE TO DRAW VECTOR  *  * * *********************************************************************** 00B0 00B1 00B2 00B3 00B4  FFFE06 FFFC06 FE0A07 FE1407 F0029E  START RAMP NOP LOAD NEW X LOAD NEW Y BRANCH TO FETCH ROUTINE AND RESET BEAM  160 117 • *************************************** 118 •* *• 119 ROUTINE TO DRAW SHORT VECTOR I N SYMBOL ROM *; •* 120 *; »* 121 • ************************************************************************ 122 OOCO FE4B07 123 LOAD SHORT X 00C1 FE9507 124 LOAD SHORT Y FFFF06 125 00C2 DRAW VECTOR 126 FFFD06 00C3 NOP FE0B07 127 00C4 LOAD NEW SHORT X 00C5 128 FE1507 LOAD NEW SHORT Y 00C6 F00306 129 RESET BEAM FFFF06 00C7 130 NOP FFFF06 00C8 131 NOP 132 FFFF06 00C9 NOP F0C11E 133 OOCA BRANCH BACK TO DRAW CHARACTER ROUTINE 134 135 • ***********************************************************************• 136 •* *• 137 ROUTINE TO EXECUTE A RETURN FROM SUBROUTINE *; •* 138 •* *• . ************************************************************************ 139 140 FE5E07 LOAD UP OLD PC 141 OODO F000A6 142 00D1 INC PC ADDRESS 00D2 F0009E BRANCH TO FETCH ROUTINE 143 END OF F I L E  161 j ******************************+**************************************** ;* * ;* DPU COMMANDS USED I N SYMBOL ROM TO GENERATE DPU SYMBOLS * ;* *  1 2 3 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57  ; ;* 0 * 0000 C480 0 0 0 1 CCOF 0002 CD80 0003 CC1E 0004 CF60 0005 C5E0 0006 0000 ;* 1 * 0007 C500 0008 CCOF 0009 C51E OOOA OOOO * 2 * OOOB C480 OOOC CC08 OOOD CD80 OOOE CC07 OOOF CF60 0010 C41E 0 0 1 1 CD80 0 0 1 2 C480 0 0 1 3 OOOO ;* 3 * 0 0 1 4 C480 0 0 1 5 CD80 0 0 1 6 CCOF 0 0 1 7 CF60 0 0 1 8 C596 0 0 1 9 CF60 001A C5F7 001B OOOO ;* 4 * 001C C580 001D CCOF 0 0 1 E CEF9 001F CD80 0020 C494 0 0 2 1 OOOO ;* 5 * 0022 C480 0023 CD80 0024 CC08 0025 CF60 0026 CC07 0027 CD80 0028 C49E 0029 OOOO ;* 6 * 002A C480 002B CD80  ;  58  002C  CC08  59  002D  CF60  60 61  002E 002F 0030 0031 0032  C417  62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103  ;* 7 0033 0034 0035 0036 0037 ;* 8 0038  CCOF CD 80 C49E OOOO  * C480 CD8F CF60 C5FE OOOO  *  C480 0039 CD80 003A C408 003B CF60 003C C417 00 3D C C O F 0 0 3 E CD 80 003F CC1E 0040 C480 0041 OOOO ;* 9 * 0042 C5E0 0 0 0 0 0 0  043 044 045 046 047 048  CCOF CF60 CC16 CD80 C497 OOOO  ;* A * 0049 C4 00 4A CD 004B CD 004C C7 004D CC 004E 004F  80 OF IE 67 EO  C516 OOOO  ;* B * 0050 C480 0051 CCOF 0052 CDOO 0053 CC92 0054 0055 0056  CE73 CEEO C500  106 107 108  0057 0058  109 110 111 112 113  CC9 CE7 CEE C4A  005A 005B C580 0 0 5 C OOOO ;* C * 005D C480  114 115  005E 005F  CCOF CD 80  116  0060  C77E  104 105  0059  3 3 O 0  117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175  0061 0062 0063 ;* D 0064 0065 0066 0067 0068 0069 006A 006B 006C 00 6D ;* E 006E 006F 0070 0071 0072 0073 0074 0075 0076 ;* F 0077 0078 0079 007A 007B 007C 007D ;* M 007E 007F 0080 0081 0082 0083 0084 ;* 0 0085 0086 0087 0088 0089 008A 008B 008C 008D ;* P 008E 008F 0090 0091 0092 0093 0094 0095  CD80 C4A0 0000 C480 CCOF CDOO CC93 CC17 CE73 CEEO C480 C580 OOOO  * C480 CCOF CD 80 C776 CDOO C6F7 CD 80 C480 OOOO  * C480 CCOF CD80 C776 CDOO C517 OOOO  * C480 CCOF CD I E CD OF CC1E C480 OOOO  * C580 CEE5 CC05 CD05 CD 14 CC14 CEF4 C580 OOOO  * C480 CCOF CDOO CC92 CE73 CEEO C5D7 OOOO  ;* T 176 0096 177 0097 178 0098 179 0099 180 009A 181 009B 182 •* 183 > OF F I L E  * C580 CCOF C6C0 CDCO C49E OOOO k  165  APPENDIX G  < ; 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D-  D,  7  ' so- * 1  ' iQ\ 7Q-  7  At7Slo  . yes-  \ BO-  /oa-  /.SB  .v£c o - i i:  ft;  n Oi / J D/ f O! / f Di /* O/7D,/t O:  /o  Sf/eer  Z or 3  ; Suaer  <3 or 3  


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