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Design and test of a real-time voice communication system for power line communication channels Dorbolo, Rick G. 1994

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Design and Test of a Real-Time Voice Communication System for Power Line Communication Channels by Rick G. Dorbolo B. Sc. EE., The University of Manitoba, 1991 A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE in THE FACULTY OF GRADUATE STUDIES DEPARTMENT OF ELECTRICAL ENGINEERING  We accept this thesis as conforming to the required standard  THE UNIVERSITY OF BRITISH COLUMBIA January 1994 © Rick G. Dorbolo, 1994  in  presenting  degree  at  this  the  freely available copying  of  department publication  in  partial  fulfilment  of  University  of  British  Columbia,  I agree  for  this or  thesis  reference  thesis by  of  this  of  f/fC  for  his  and study. scholarly  or  thesis  for  her  I further  purposes  gain shall  permission.  Department  -^nCcJ  The University of British Vancouver, Canada  Date  DE-6 (2/88)  fl  7  Cr.ic.,  Columbia  /?f  ^Y>P^!^q  /  requirements that  agree  may  representatives.  financial  the  It not  that  the  Library  an  granted  is  understood allowed  by  advanced  shall make  permission  be  be  for  the that  without  for  it  extensive  head  of  my  copying  or  my  written  Abstract Intrabuilding electric power distribution lines provide easy access and universal coverage for digital speech communications. However, power line communication channels exhibit unpredictable and variable levels of signal attenuation and noise. To enable effective communication requires appropriate forward error correction of the encoded speech. This thesis describes the design, implementation and testing of synchronization, voice compression and forward error correction algorithms required to achieve a robust real-time communication link across power line channels. Communication was connection oriented and synchronous with a selectable baud rate of 9600 bps or 19200 bps. Synchronization (delineation) was accomplished using a seven bit synchronization marker placed between frames of encoded speech.  The encoded speech data was  generated using the U.S. digital cellular standard VSELP 7950 bps voice encoder. Error detection and correction bits were added to the speech data to produce aggregate data rates of approximately 9600 and 19200 bps. Error detection of the perceptually significant bits was provided through the use of a seven bit CRC in the 9600 bps encoded speech. The 19200 bps scheme employed an error detection/correction scheme where the amount of protection was based on the perceptual significance of each parameter. The synchronization algorithm was implemented in hardware and tested.  Synchronization was  maintained at bit-error rates (BERs) greater than 0.1. Subjective testing of the synchronization algorithms under random noise indicated that the 9600 and 19200 bps coding schemes were usable with channel BERs up to approximately 7x10^^ and 2x10"^, respectively. Tests performed on actual power line communication channels indicated approximately equal performance using either the 9600 or 19200 bps coding scheme, due to the comparatively higher BER of the 19200 bps channel.  Table of Contents Abstract  ii  List of Figures  vii  Acknowledgments Chapter 1  x introduction  1  Power Lines and Power line Modems  1  Topic 1  Power line Topology  1  Topic 2  Power line Modems  2  Topic 3  Problems Encountered with PLMs  4  Voice Compression Technology  5  Topic 1  Requirements of Compressed Speech  5  Topic 2  Synchronous Communication Environment  6  Outline of Thesis  7  Voice Processing  9  Section 1  System Overview  9  Section 2  VSELP Compression Algorithm  9  Section 3  Forward Error Correction with VSELP  11  Section 4  Channel-Induced Degradations  14  Topic 1  Bit Errors  14  Topic 2  Processing Delay  15  Section 1  Section 2  Section 3 Chapter 2  iii  Topic 3  Lost Frames  16  Frame Synchronization  18  Synchronous DLL Design Requirements  18  Topic 1  Low Overhead  18  Topic 2  Channel Random and Burst Errors  19  Topic 3  Bit Slip Errors  20  Topic 4  Synchronization Time  20  Synchronization Algorithm Developed  21  Topic 1  Motivation  21  Topic 2  Description  22  Chapter 3 Section 1  Section 2  Subtopic 1 Theoretical Performance Under AWGN  24  Subtopic 2 Marker Selection  26  Section 3  Finding an Optimal Walk Distance  28  Section 4  Modem Hardware Modifications  31  Chapter 4  Quantitative and Qualitative Measurements  37  Section 1  Real-Time Quantitative Measurements  37  Topic 1  Test Pattern Generation and Decoding  37  Topic 2  Bit Error Rate  41  Topic 3  Performance of Sequential Filter  41  iv  Section 2  Subjective Measurements  43  Topic 1  Subjective Test Procedure  44  Topic 2  Testing Perceptual Significance of Parameter Errors  45  Subtopic 1 Background  45  Subtopic 2 Test procedure  46  Subtopic 3 Test Results  47  Topic 3  Lossless scores  50  Subjective Evaluation of FEC schemes  50  Error Control in Speech Coding  53  Error Control Options and Background  53  9600 bps Coding Scheme  54  19200 bps Coding Algorithm  56  Selection of Parameter Significance  59  Parameter Interleaving  60  Topic 1  Optimum Interleave Distance  62  Topic 2  Compatibility of Symbol Data with Burst Error Channel  63  Comparison of 9600 and 19200 bps Performance  64  Conclusions  69  Section 1  Summary  69  Section 2  Future Work  70  Section 3 Chapter 5 Section 1 Topic 1 Section 2 Topic 1 Section 3  Section 4 Chapter 6  V  Bibliography Appendix A  73 Subjective Test I Instruction Sheet  79  Subjective Test Instructions  79  Topic 1  Procedure  79  Topic 2  Rating Scale  79  Subjective Test II Instruction Sheet  80  Subjective Test Instructions  80  Topic 1  Procedure  80  Topic 2  Quality Scale  80  Appendix C  Firmware Listings  81  Appendix D  Schematic Diagrams  Section 1  Appendix B Section 1  111  VI  List of Figures Figure 1  Typical domestic power supply (A). Typical commercial/industrial power supply (B)  3  Figure 2  One Way Voice Processing System  9  Figure 3  Block diagram of VSELP speech decoder  Figure 4  The RO and LPC1 parameter versus time for the utterance "SPEECH  11  TEST' Figure 5  13  The LAG parameter and frame energy (RO) parameter versus time for the utterance "SPEECH"  Figure 6  14  End to end processing delay components of VSELP based speech encoder  Figure 7  16  Power line channel contains periodic error bursts spaced 1/120 second apart in addition to random errors  19  Figure 8  Placement of synchronization markers in the speech data stream. . . 22  Figure 9  Synchronization algorithm  Figure 10  Simulated synchronization time in bits for frame lengths of 168, 336,  24  672, and 1344 bits  26  Figure 11  Autocorrelation of the chosen marker  28  Figure 12  Number of times frame synchronization was lost versus channel BER and maximum walk distance during a 90 second test interval for a channel "bad" cross-phase (X-phase) and of the same phase Vll  30  Figure 13  Number of times frame synchronization was lost versus channel BER and maximum walk distance, during a 90 second test interval for a channel "good" cross phase (X-phase)  Figure 14  31  Maximum number of frames lost versus channel BER and maximum walk distance, during a 90 second test interval  31  Figure 15  Differential encoder (a), differential decoder (b)  33  Figure 16  Number of times carrier synchronization was lost over a 90-second interval  34  Figure 17  Original bit sync circuit (a), bit sync circuit with random walk filter (b). . 35  Figure 18  State transition diagram for a length N random walk filter with inputs Up/Down and outputs UP'/DOWN'  36  Figure 19  Construction of test pattern  39  Figure 20  Processing steps required for subjective testing  45  Figure 21  MOS score versus symbol error rate for the GSPO and LAG parameters with and without error detection  Figure 22  MOS score versus symbol error rate for the Frame energy (RO) and 1st LPC coefficient with and without error detection  Figure 23  48  MOS score versus symbol error rate for the 2nd and 4 LPC coefficient with and without error detection  Figure 24  48  49  MOS score versus symbol error rate for the residual vectors CODE1 and C0DE2, 6th LPC coefficient, and with error detection the for residual vectors and the 8th LPC coefficient viii  49  Figure 25  Symbol and CRC placement of class 1 symbols  Figure 26  Mean degradation curves before and after error correcting bits are assigned  Figure 27  66  A comparison of the full rate encoding schemes with a random binary symmetric channel and various power line channels  Figure 32  65  A comparison of the half rate and full rate encoding schemes for a random binary symmetric channel  Figure 31  63  A comparison of the number of symbols with errors with and without interleaving as a function of bit error rate  Figure 30  63  Double errors as a function of average bit error rate and symbol spacing  Figure 29  61  Periodic burst error spacing for (a) same phase transmission (b) cross phase transmission  Figure 28  58  67  A comparison of the half rate (9600 bps) and full rate (19200 bps) encoding schemes over four power line communication channels.... 68  Acknowledgments I would like to acknowledge Dr. Robert Donaldson for his supervision during this thesis and for recommending this exciting and challenging thesis topic. His guidance during the development of this thesis has proved invaluable. I also wish to thank Barry Butemowsky, Haleh Hobooti, and Raymond Woo for their assistance. Barry's technical assistance with the power line modems was a great help. Haleh generously donated her time to proof reading this thesis. Raymond Woo assistance and cooperation allowed me to complete my subjective tests without difficulties. In addition I would like to thank the many students who provided me with valuable advice and suggestion. Finally, I wish to thank all the people who volunteered to participate in my subjective tests. Their assistance was essential for this thesis.  Chapter 1 - Introduction In-building electrical power distribution circuits are ubiquitous in coverage and easily accessed using a standard 120 volts wall plug. Distribution circuits provide a potential communications medium [1,2, 3]. Power lines were not designed for communication, however, and are subject to numerous impairments such as noise, frequency and time fading, phase inversion, bursty errors, and intersymbol interference. Accurate models for power line communication channels are unavailable. Modems designed to use power line channels for data transmission can be complex [2, 4, 5]. Transmission of speech over a power line is potentially more difficult than data transmission. However there are applications where speech transmission is desirable. One compelling application is an intercom or a building public address system. Two enabling technologies that are becoming available are the single chip digital power line modems and low rate digital speech encoders. A combination of these technologies may allow for cost effective implementations of digital speech over power lines. This thesis describes the transmission and real-time transmission of compressed speech using a 9600/19200 bps power line modem. This introductory chapter provides an overview of the problems faced, background, and an outline of the thesis.  1.1 Power Lines and Power line l\/lodems Power line Topology Figure 1 a illustrates a typical residential power service. Each house is supplied from a distribution transformer with two 120 volt lines (with a 180° phase difference) and a neutral. This power supply is delivered, via branch circuits, from a circuit panel to all locations within the residence [1, 6]. The  branch circuits can be configured to supply a line-to-neutral source of 120 volts or else a line-to-line source of 240 volts. A typical industrial/commercial supply (figure lb) is three phase. As in the residential case, the loads are supplied by branch circuits and are placed between the supply line and neutral. Although both residential and commercial/industrial power supplies have been studied in the past, this thesis will only be concerned with the problems encountered for an industrial/commercial power distribution; commercial/industrial power line channels are much more hostile than residential power channels. Two issues concerning power line topology are relevant to this thesis. First, power line modems are connected onto the power line (plugged in) in the same manner as loads. Second, the physical distance between modems is not the only determinant of communication quality of connection. This fact results from the building wiring method. Transmission along the same branch circuit will provide the best connectivity. Transmission across different branch circuits on the same phase often requires the signals to travel across the central circuit panel. Thus, transmissions between modems located far from the circuit panel and across different branch circuits are normally subject to much greater attenuation than transmissions on the same branch circuit. Finally, transmissions across power phases are subject to even greater attenuation. The modem signal, in this case, must propagate across phases through capacitive coupling between the power lines, by propagation across windings in the distribution transformer, or through loads placed between power phases. Thus, signals between two modems placed in adjacent rooms may be plugged into different phases and as a result, may experience unanticipated levels of noise or attenuation.  Power line Modems Power line modems (PLMs) operate principally in the same way as telecommunication and radio  Distribution Transformer  25kv line  Residential JMOMJ Transformer  mmm  c  JH^Ilso _ Service to House A  >  I L..  Phase C Load  Service to House B  Watt-Hour Meter Circuit breakers Switches  m  120v loads  -A\——J  Phase A Loads Phase B Loads  Circuit Panel  240v loads  (A)  (B)  Figure 1 Typical domestic power supply (A). Typical commercial/industrial power supply (B).  modems [7]. The salient issues with regard to power line modems design include high signal attenuation, high noise, and a usable bandwidth between 50kHz and 300kHz [1, 8]. Considerable research involving power line communication has been conducted at the University of British Columbia. The culmination these efforts has been two modem designs. The first is a single chip implementation of an FSK modem [9] with a baud rate of 1.2 — 19.6 kbps. The second is versatile LSI implementation of a PSK modem with an adjustable baud rate of 1.2 — 19.6 kbps [4]. The PSK modem was used in this thesis to perform the speech-over-powerlines implementation. In addition to these two modems, further work is presently underway to produce a single chip, all-digital PSK modem.  Recently, two commercial products have been released. Echelon Incorporated has developed a power line modem module as part of an in-building control system. Adaptive Networks [10] has also developed a line of single chip power line modems. These modems claim speeds of lOOkbs and lOOOkbs. Further, they boast throughputs of 10kbps and 100kbps with a BER of 10"^ using proprietary spread spectrum and error correction techniques. Complete details on these modems are unfortunately unavailable due to their proprietary nature.  Problems Encountered with PLMs Power line communication channel response varies with the distance between the transmitter and receiver as well as with the number and type of power line loads. As a result, power line channels exhibit highly variable frequency versus attenuation characteristics and noise power density profiles. Further, these characteristics may change over time due to load changes. The channels resulting from the above conditions have highly variable noise and attenuation and have no reliable model. Without a model, accurate analysis of different transmission schemes becomes difficult or impossible. In the past [4, 11], analysis was performed assuming binary symmetric transmission over a guassian noise channel. All such analysis can at best result in a gross approximation of the actual performance. Later in this thesis, a power line channel model is described which includes noise produced by a periodic noise source and a binary symmetric noise source. Data transmissions across power lines are subject to noise caused by the variety of electrical loads. The worst offenders are those which regularly and rapidly switch on and off line. Examples include universal motors, dimmer switches, and computer power supplies [1, 3, 12]. In addition to producing noise, the loads may also greatly attenuate signal transmissions. This combination of high attenuation  along with high noise will produce a channel with low signal to noise ratio (SNR) or a channel which can change from high SNR to low SNR as loads change. In addition to the possibly high bit error rates (BER), power line channel errors are bursty and exhibit periodicity [1, 3, 5, 13]. These bursty, periodic errors must be considered in designing any forward error correction (FEC) scheme which, unfortunately, adds complexity to the communication system.  1.2 Voice Compression Technology The power line modem chosen had a selectable bit rate of 1.2kbps-19.6kbps. Standard telephone grade digitalized speech requires a data rate of 64kbps or 32kbps. Thus, some form of low rate speech encoding was required to perform real-time transmission of speech across the power lines. This section outlines some currently available speech compression technologies and the requirements for use with the power line modem selected.  Requirements of Compressed Speecii The first requirement of digitized speech is a data rate below 19200bps. Many methods exist which provide voice compression below 32 kbps. Speech coding between 14 kbps and 32 kbps provides good to excellent quality speech suitable for toll-grade telephony. Coding rates between 6kbps and 13kbps provide fair to good speech quality suitable for mobile radio or voice mail applications. Rates below 6kbps provide poor to fair quality coding suitable for secure voice applications. The ratings are given in [14] where the specific algorithms are explained in detail. Improvements in the speech coding algorithms, along with an increase in digital signal processor (DSP) performance, have allowed for a continual improvement in speech qualities at various bit rates.  The second requirement of the speech compression algorithm is tolerance to channel errors. As stated earlier, power line communication is subject to noise, primarily from electrical loads. Voice coding techniques generally are able to tolerate BERs on the order of 10"^. Higher error rates can cause rapid degradation of sound quality. Two schemes are available to maintain speech quality in the presence of channel errors. The first approach uses traditional error control coding techniques such as block codes or convolutional codes to reduce the effective BER [15]. Of course, adding error control bits reduces the net channel rate which implies that a lower bit rate voice code must be used and hence a lower error free sound quality. A second approach to reduce the significance of channel errors is to construct voice coding algorithms to reduce the perceptual significance of errors [16]. Later in this thesis, a voice coding technique is described which provides graceful degradation of voice quality with a BER from 10"^^ to 10"'. The third requirement of the coding technique is a real-time implementation requiring two conditions. First, the coding algorithm must be simple enough to be executed in real-time. Such is the case if the voice coder can process a section of speech in the same or less time than the transmission time of the speech sample. Second, the end-to-end processing delay must be sufficiently small to allow for normal conversation. The end-to-end processing delay consists of the algorithmic processing delays, coding delays and any communication delays. For a real-time implementation the end-to-end processing delays should be less than 200ms.  Synchronous Communication Environment In the design of a power line speech communication system, it is necessary to choose between a packet oriented or synchronous connection oriented data transmission scheme. Prior to this thesis, much research was directed towards packetized, power line computer data transmission [3, 4, 11], Computer data requires a very small BER (<10"') and no tolerance to lost bits. An ARQ scheme which would  achieve such low BERs over power lines has been implemented [17]. Unfortunately, the scheme requires large overheads, which results in throughputs lower than that of a synchronous system during the periods of low channel noise and even lower during high noise conditions. Compressed voice data does not require the very low BERs provided by a packetized ARQ scheme. The voice coding technique employed in this thesis worked satisfactorily with a BER to 10"^ and with some lost bits. Given the low channel rate of 19.2 kbps, efficiency of the connection scheme was of great concern. It was clear that a synchronous system would be required. Given the requirement for synchronous communication, much of this thesis involved the design and implementation of a synchronous system. The synchronization schemes constructed will be shown to function effectively at BERs greater than 10"^  1.3 Outline of Thesis The body of the thesis is broken into four sections: voice processing, frame synchronization, quantitative and qualitative measurements, and forward error correction. Chapter 2 describes the VSELP voice processing algorithm and introduces the concepts of speech frames and speech symbol parameters. Chapter 2 also describes the impairing effects of channel disturbances and the need for forward error correction. Chapter 3 describes modem synchronization. First the requirements of this communication system are presented. This is followed by a detailed description of the algorithm implemented as well as the measured performance. The chapter ends with hardware modifications required to enhance the synchronization performance for use with voice communication.  The bulk of the experimental procedures and results are provided in chapter 4. The chapter begins with a description of the quantitative channel parameters. The scheme used to generate pseudo-random test patterns is presented. This is followed by the channel BER measurements, as well as the measurements used to quantify the performance enhancements of the hardware modifications. Mean opinion score (MOS) testing methodology is presented next. MOS tests used to assess speech parameter sensitivity are presented followed by a summary of the test results. Finally, the MOS test used to measure the effectiveness of the FEC scheme is presented. Chapter 5 begins with some FEC background followed by a description of the two FEC schemes used in this thesis. The reasoning behind the parameter interleaving and the choice of parameter distance is also presented. The chapter ends with a subjective sound quality comparison of the 9600 bps and the 19200 bps encoding schemes. Chapter 6 provides a brief summary and the conclusions of the thesis along with recommendations for future work.  Chapter 2 - Voice Processing 2.1 System Overview This chapter describes the VSELP compression algorithm and explains the motivation for the forward error correction algorithm used. The test setup, shown in figure 2, was used to test one way (half duplex) transmission of speech. A voice signal was sampled at 8000 samples/second to 12 bits using an IBM pc and A/D card. The 12 bit sampled speech was next padded to 16 bits, source encoded using the VSELP algorithm and channel encoded using forward error correction (FEC) on a SUN SPARC workstation. The voice data was then transmitted over the power line channel. Finally, the received speech data was similarly decoded, decompressed and stored or played back. Speech  N,  •^«v>.—y-  • A/D  VSELP Encoder  Channel Encoder (FEC)  Modem  " 128 kbps 8000 Sample/s @ 16 bits  7.9 kbps  9.6-19.2 kbps  VSELP Decoder  Source Decoder  Channel  '' Output  <!i\}h-  D/A  Figure 2 One Way Voice Processing System  2.2 VSELP Compression Algorithm The VSELP algorithm [18, 19] performs the 8:1 voice compression to produce output at 7950 bps, as required by the power line channel. This algorithm was chosen as the target algorithm in this thesis for several reasons: 1.  Algorithm complexity is moderate.  2.  The VSELP algorithm is standardized and open, and has been chosen as the North American cellular phone standard [20, 21].  3.  The algorithm is tolerant to channel errors.  4.  VSELP CODEC chips are commercially available [22]. Other CELP algorithms [23, 24] were considered, but they were deemed less desirable because of  their proprietary status and restricted availability. The VSELP compression scheme is a modification of the CELP [25, 26] voice compression algorithms. CELP (Code Excited Linear Predictive coding) algorithms begin by processing pulse code modulated (PCM) [27, p. 22] speech samples using a linear predictive (LPC) filter [28]. The LPC filter removes most of the harmonic redundancy from the speech. Next, the residual from the LPC filter is vector quantized [27, 29, pp. 273-7]. The quantized residual vector and the LPC filter parameters form the compressed speech code to be transmitted (or stored). The received speech is decoded by first expanding the received quantized residual vector using a codebook, by creating an inverse LPC filter from the received LPC filter parameters, and finally by passing the expanded vector through the inverse filter. In the absence of channel errors a close approximation of the original speech results. Figure 3 is a block diagram of the VSELP speech decoder. The VSELP algorithm differs from the generic CELP algorithm in that it uses two fixed codebooks, one adaptive codebook, and three gain parameters to quantize the residual. This codebook structure speeds the vector quantization process by using three small codebooks rather than one large codebook. Further, the codebooks are constructed to reduce the degradation caused by bit errors. The VSELP algorithm processes speech on a frame-by-frame basis. The frame consists of fifty 8kHz samples, and represents 20ms of speech. For each frame, the frame parameters, including LPC parameters 10  and the frame energy are calculated. The frames are further divided into four subframes. Residual vectors are calculated for each subframe. The residual vectors (CODE_l and CODE_2), adaptive codebook vector (LAG), and gain vectors (GSPO) are known as subframe parameters. Table 1 lists the number of bits to encode each parameter. In total, the frame parameters require 43 bits and the subframe parameters account for 116 bits of the data stream. A detailed description of the parameters in table 1 is given in the digital cellular phone standard [18, 30] The performance loss due to bit errors varies according to the parameter corrupted. For example, the residual codewords were designed to have redundancy. An error in a residual encoder parameter will have a smaller impact than an error in an LPC parameter. When designing FEC schemes, the sensitivity of each parameter to bit errors must be considered. Measurements to determine the sensitivity of each parameter are discussed in chapter 4. ^ D _^ E C - • O ^ D E _^ R _^  '' Long Term Filter State  Rx  >(^  -*{X)— '  CodetKxik 1  fcf  1  *KJ ,  Spectral Postfilter  Synthesis Filter  speech out  r. reflection coef. R frame enegry L lag 1 Codeword 1 H Codeword 2 GSP0P1 Gain C )deword b  ta.  *  GSP0P1 1  1  ftj  'd  GSP0P1 Codebook  Codebood 2  -^•^?n  ^\y—  r.  fc.  R _»,  Translation  ^ ^  1  Figure 3 Block diagram of VSELP speech decoder.  2.3 Forward Error Correction with VSELP VSELP encoded speech is noticeably degraded by bit errors. A bit error rate (BER) of 10"* produces a noticeable degradation in sound quality. BERs higher than 10"^ produce frequent unpleasant clicks. 11  Frame Parameters Parameter  Subframe Parameters Codeword bits  Parameter  Codeword bits  RO  5  LAG_1  7  LPCl  6  CODEl_l  7  LPC2  5  C0DE2_1  7  LPC3  5  GSP0_1  8  LPC4  4  LAG_2  7  LPC5  4  CODEl_2  7  LPC6  3  CODE2_2  7  LPC7  3  GSP0_2  8  LPC8  3  LAG_3  7  LPC9  3  CODEl_3  7  LPCIO  2  CODE2_3  7  GSP0_3  8  LAG_4  7  CODEl_4  7  CODE2_4  7  GSP0_4  8  Table 1 Frame and Subframe parameters for VSELP CODEC.  pops and unnatural sounding tones. FEC is therefore essential to maintain high quality communication in a high BER power line environment. Three categories of techniques are available to improve the sound quality of VSELP coded speech. The first is to construct the VSELP code to be tolerant to bit errors. This can be accomplished, for example, by quantizing vectors with grey codes or by requantizing other parameters to a log scale from a linear scale. The second method uses traditional forward error correction (ffiC) methods such as trellis encoding, and Viterbi decoding and interleaving to decrease the decoded BER. A third method makes use of parity or CRC bits to detect errors in the frame parameters. When a code-word error is detected,  the code-word from the previous frame or subframe can be substituted for the damaged code-word. This is possible because codewords often remain stationary from frame to frame. Figures 4 and 5 show how the speech parameters vary over time. Figure 4 gives the frame energy (RO) and the first LPC coefficient (LPCl) for the utterance "SPEECH TEST'. The other reflection coefficients behave similarly to RO. A significant interframe autocorrelation of RO and the LPCl parameter are observed. Figure 5 shows how the LAG parameter varies between subframes. The lag parameter value appears more random between subframes than does RO, but does show correlation between subframes, especially at higher frame energies. The specific FEC encoding methods examined will be discussed later in this thesis. The goal is to find a combination of FEC and error detection techniques to minimize the effect of bit errors.  ^KT-  ^  r ^\r^U n  ^  jJ  B  i  5^  4  )o  f .  •  0. 40  fc-i  'n  m  *-  ^irJ^ »i  Ifl^r  SJ  '  0 80  •  \ i-.  "-^  1  u\ -^ LH. .  n n  n.  J T-> I  1J  —»  •  Time (seconds) - •» - Frame Energy (RO)  —— LPC1 Parameter  Figure 4 The RO and LPCl parameter versus time for the utterance "SPEECH TEST'  13  1.2 0  140 12a 1(X> 38  (0 Q-  Time (seconds) —— Lag Value  0.60  - — - Frame Energy  Figure 5 The LAG parameter and frame energy (RO) parameter versus time for the utterance "SPEECH"  2.4 Channel-Induced Degradations Transmission over power line channels causes bit errors which degrade the reconstructed speech sound quality. Random and periodic burst errors occur and some speech frames are never received. This section briefly discusses the effect of these errors on the quality of the decoded speech.  Bit Errors Two categories of bit errors are observed in power line communications. Random (impulse) errors are caused from electrical loads such as electric heaters or lamps switching on or off. Such switching occurs infrequently, and associated errors tend to be infrequent as well. Periodic errors are caused by devices which switch on and off rapidly. Drill motors, computer power supplies, and dimmer switches are examples of such devices, with the latter two producing noise at 120Hz. Both types of noise cause errors with burst length ranging from several bits to several dozen bits (approximately 0.5ms to 2ms). 14  The effects of channels errors as well as methods to minimize their impact on transmitted speech will be discussed in later chapters.  Processing Delay Time is required to perform speech compression, channel coding, transmission, reception, decoding and decompression. End-to-end delay is defined as the time from the first sample of speech input at the microphone to when that sample is reconstructed at the output speaker (this definition differs somewhat from one-way coding delay which does not include the transmission time [31]). Delay in excess of 1 ms. is perceptible, but end-to-end delay greater than 200ms is considered unacceptable [32, 33]. As shown in figure 6, the three components of end-to-end delay include frame-formation (algorithmic delay), channel delay, and coding delay. 1.  Frame-formation delay is a fixed 20ms delay equal to the time to accumulate enough samples to constitute a speech frame. The VSELP coding algorithm requires all 160 speech samples to be present before the LPC parameters can be computed. Thus, a minimum 20ms delay is introduced.  2.  Channel delay is the time required to transmit (physically) a speech frame from transmitter to receiver. The channel delay can vary between zero and 20ms, depending on the channel rate. Because the entire channel capacity is used to transmit the voice data, the channel delay is 20ms.  3.  Encoding and decoding delays represent the amount of time for the VSELP and channel coding algorithms to process speech. These delays depend on the processing hardware speed and the software code execution time. In a single-processor real-time implementation, frame encoding delay and decoding each must be less than 20ms (the duration of a frame).  End-to-end delay which is the sum of the above delays, will vary between 40 and 80ms depending on the particular implementation. 15  Output  Speech VSELP Processor  Input Buffer  Channel Coder  Tx Buffer  H  Channel  [»•  Rx Buffer  Channel Decoder  Frame-Fon•nati on = 20 ms Delay),,"''  >  Encoding Delay  -^»•  Channel Delay = 20 ms  ,_^  >  VSELP Decoder/ Buffer  K])))  Decoding Delay  .^  Figure 6 End to end processing delay components of VSELP based speech encoder  Lost Frames In addition to the bit errors described above, massive errors may occur on power line channels. A massive error results in a received speech frame which contains mostly incorrect data (BER ~ 0.5). Massive errors have two causes. The first is loss of or incorrect initial frame synchronization. A failure in bit timing recovery causes bit slip, which causes speech frame data to be shifted by at least one bit. In such a case, every speech parameter at the receiver will be decoded incorrectly. At those times when the modem synchronization algorithm attempts initially to synchronize or re-synchronize the modems, missynchronization may also occur if the frame synchronization algorithm accidentally locks onto a marker sequence in the data stream'. A mis-synchronized frame, when decoded, will have every parameter incorrect. A frame with all the coded speech parameters incorrect produces an unpleasant sounding click or chirp. The second cause of massive errors is a long error burst or a channel fade. Power line communication on marginal channels is marked with many such random fades. These fades result from equipment being  Bit stufifing is used in data communication to prevent occurrences of the marker sequences from being repeated in the data sequence. Tfiis technique could not be used here because bit stuffing changes the length t)etween markers. Errors in the stuff bits or in the bits preceding the stuffed bits will result in mis-decoded frames and frame lengths. Mis-decoded frame lengths usually cause loss of frame synchronization. In addition, because stuff bits are added after FEC they cannot be protected.  16  switched on line or from high load events. The result is a large number of incorrectly received bits. As before, such a long error burst will produce unpleasant clicks and pops in the received frame. The FEC coding scheme, described in chapter 5, includes provisions to detect and mask frames which contain massive errors. When a frame with massive errors is detected, the parameters from the previous frame are used. If a succession of massive error frames are detected the output is gradually muted as silence is deemed preferable to noise.  17  Chapter 3 - Frame Synchronization For data to be transmitted synchronously, the receiver and transmitter must be synchronized (delineated). Frame synchronization is required by the receiver to determine the start of each transmitted speech frame, to enable successful decoding of the compressed speech data. This chapter describes the frame synchronization algorithm developed for this speech-over-powerlines communication system. The requirements of the synchronization routine are presented, the algorithm is explained, and the measured performance of the algorithm is presented. The chapter ends with a section describing the enhancements performed on the hardware of an existing data modem.  3.1 Synchronous DLL Design Requirements This section details the synchronization requirements of this voice-over-powerlines communication system.  Low Overhead The selected voice coding algorithm required a transmission rate of 7950 bps. The modems had selectable bit rates of 19200 and 9600 bps. Transmission of voice data at the 9600 bps rate leaves 9600 - 7950 = 1650 bps either for synchronization, or FEC or both. This amounts to 1650/50 = 33 bits/frame. A minimum amount of FEC requires an overhead of 8 bits/frame. There remains 25 bits/frame for synchronization (a maximum of 13% of the bandwidth.) We are interested in a synchronization scheme with minimum overhead to maximize the remaining bits available for FEC.  Channel Random and Burst Errors Channel errors impair modem synchronization by increasing the time required to synchronize the modems, and by increasing the likelihood that modems will lose synchronization. It was desired to have the modems able to synchronize with a BER of up to 10~'. This value was chosen because a BER of 10"' was felt to be an upper limit on the coded speech tolerance to channel errors. The power line channel was found to have bursty periodic errors along with random errors [5, 13]. The periodic errors occur every l/120th of a second [1]. At 19200 baud, these burst errors may affect several to dozens of bits per burst depending on the power line conditions. Periodic errors are a result of the 60 Hz power line cycle. Transmission over the same phase is characterized by a burst error occurring at 120 Hz, while transmission across phases results in two bursts (one from each phase) occurring every 1/120 of a second. This difference in error distribution will be discussed further in terms of parameter interleaving.  Periodic Errors  Random Errors  Figure 7 Power line channel contains periodic error bursts spaced 1/120 second apart in addition to random errors.  Burst errors are easier to overcome than random errors. The synchronization algorithm is optimized to function best with synchronization words (markers) which are likely to be either error free or completely destroyed (i.e. hit by burst errors). Conversely, if the periodic nature of errors is not taken into account, synchronization will not be possible. 19  Bit Slip Errors Bit slip is the most difficult impairment to deal with in terms of bit synchronization. A failure in bit timing recovery results in a bit slip. When a bit slip occurs the net effect is an apparent change in the size of the received frame, and frame synchronization usually will be lost. The probability of bit slips depends on the ability of the bit timing recovery circuitry. The original power line modems were designed to transmit packeted data on channels with relatively low bit error rates (BERs <10"^). This allowed the modems to operate with the most basic of bit synchronization circuits. When attempts were made to implement synchronous communication bit slips was identified as a major problem. Accordingly, the modem synchronization routine was modified to correct for single bit slips. Later in this chapter, circuitry which reduces the number of bit synchronization losses is presented. Unfortunately, the number of bit slips for our modem/channel combination has not been characterized; although we know bit slips will occur, we do not know the probability.  Synchronization Time When a modem begins transmitting, the receiving modem requires time to establish frame synchronization. The interval of time from when the first bit is transmitted to the time when the receiving modem has established a lock will be defined as the synchronization time. Obviously, we would like this interval to be as small as possible. In applications such as intercom or building public address, synchronization times less than 400ms are suitable. Other applications such as infant monitors, which are connected for long durations, would function acceptably with longer synchronization times. Two factors affect the synchronization time. The first is the number of bits used for synchronization. The larger the number of bits dedicated to synchronization, the shorter will be the synchronization time. 20  The second factor is the channel bit error rate. As stated previously, the synchronization time increases as the channel BER increases.  3.2 Synchronization Algorithm Developed This section provides a motivation and a detailed description of the synchronization algorithms used in this thesis.  Motivation Frame synchronization through the use of a fixed binary pattern or "sync word" embedded between successive fixed length frames is the most commonly used method of synchronization and is the method used here. Once the position of the sync word is detected, the receiver may obtain the position of each bit relative to the sync word. Frame synchronization technique has been very well studied. Optimal solutions have been developed[34, 35] for finding the location of markers in a block of data subject to gaussian noise. While these solutions are optimal for gaussian channels, they require a considerable amount of storage space and real-time processing. The requirements of this thesis dictate the use of a simpler scheme. Further, the power line channel is not a gaussian channel and the optimality of these schemes is not assured for other channels. The scheme chosen to implement the synchronization routine is a simplification of those described elsewhere [36, 37]. These algorithms were developed for use in radio communications and were each specifically adapted for use with burst errors due to jamming interference, which is similar to the burst noise of the power line channel. Computationally, the algorithm presented requires only 2 bytes of storage when implemented as part of the modem microcontroller. 21  Description The synchronization scheme requires the periodic placement of markers into the data stream, as shown figure 8. The markers are placed at the start of every nth speech frame. Typically n was varied between 1 and 3.  Marker Marker; 8 bits  Frame 1  Frame 2  Frame n  Marker  Frame: 159 to 374 bits Figure 8 Placement of synchronization markers in the speech data stream.  The synchronization algorithm used by the modems is described in figure 9. The following pseudocode describes the synchronization algorithm for an M bit long marker. 1.  Set the Confidence Counter (CC) to zero.  2.  Shift a bit received from the power line into the input register.  3.  Compare content of input register to the marker. If contents are not equal go to step 2.  4.  Increment CC.  5.  Get N frames of data from the power line.  6.  Shift M bits into the input shift register.  7.  Compare the shift register to the marker; if the marker has 0 or 1 errors increment CC and go to step 10.  8.  Decrement CC.  9.  If CC = 0 go to step 1.  10. If the value of CC is greater than the walk_distance parameter decrement CC. 11. Go to step 6.  22  The algorithm begins in the Start/Reset state (step 1.) Here, the receiving modem waits for the receipt of an error free marker (steps 2 and 3.) When a marker is found, the confidence counter is incremented; the modem transmits N frames to the host, and then loads in the next marker (steps 4-6). The modem enters sync state 1 which corresponds to the value of the confidence counter. If this marker has more than one error the modem returns to the start/reset state. If the marker has one or zero errors sync state 2 is entered. As in state 1, the number of errors in the received marker determines the next state (steps 5-11.) The sync state may increase to an arbitrary number, defined as the "walk distance," given that correct markers are received. As the walk distance is increased, the likelihood that the modem will mistakenly enter a lost sync state (due to random errors) decreases, but the time till the modem recognizes synchronization loss from a bit slip and attempts to resynchronize is increased. Not included in the description above is a provision added which attempts to correct for single bit slips. The modem implementation of step 7 from the above listing also compares the marker to bit shifted markers. If a bit shifted marker is received, then a bit will be either added or removed from the next frame in an attempt to resynchronize the modems. Unfortunately, characterization of the frequency of bit slip occurrences is difficult. Consequently, the present criteria as to which marker patterns should be interpreted as a bit shift was chosen using a trial-and-error method as opposed to more formal analytical methods. Presently, the criteria used is the receipt of a single marker which is exactly the same as a shifted version of the marker. The probability of this condition being satisfied by a properly synchronized marker corrupted by random errors is given by (1) below where P^sc is the probability of a faulty bit slip correction, Pe is the probability of a bit error, and the binary sequence "01100101" is used as the marker.  P/5.C = 2Pe'(l - Pef 23  (1)  Search for marker  Searching / Sync Lost  Marker Correct  >1 Errors | in Marker  >1 Errors in Marker  Sync Aquired  0 or 1 Errors in Marker  0 or 1 Errors in Marker  in Marker  Figure 9 Synchronization algorithm  This value is important because if Pftsc is too high, synchronization will be lost more often from falsely detected bit slips than from actual bit slips.  Theoretical Performance Under AWGN  Once the first marker has been found, the action of the 24  algorithm is identical to that of a random walk process[38, pp 212-3]. The state is increased (a step to the right) when a marker with one or zero errors is received, and the state is decreased (a step to the left) when a marker with two or more errors is received. This "walk" can increase to a maximum distance N, and remains at state N when one or zero errors are found in the received marker. Given the above situation, the probability (Pr) that a step to the right will be taken is the probability of one or zero errors. For a binary symmetric channel, Pr = i l - Pef  + 8Pe{l  - Pef  (2)  where Pe is the probability of a random bit error. Provided Pr > 0.5, the value of N is made sufficiently large, and no bit slips occur, frame synchronization using the above algorithm will be maintained. As N is decreased, the likelihood that random errors will cause the process to "walk" leftward to the start/reset state (therefore causing loss of synchronization) increases. One, therefore, is motivated to choose a large value of N to reduce the probability that a false loss of synchronization (described above) will occur. However, when a bit slip occurs the number of frames lost until synchronization reoccurs is approximately proportional to N, which suggests that N be a small value. The synchronization algorithm described above was simulated with additive white gaussian noise (binary symmetric channel) to determine a suitable value for N and to determine the synchronization time. These simulations were performed assuming that bit slip errors would not occur and that the synchronization algorithm would not attempt to correct for bit slip errors. To determine a suitable value of N, 30000 frames of 168 bits each were transmitted with a given Pg. The value of N was increased until no loss of synchronization was observed. Thirty thousand frames equals 600 seconds of speech, which was felt to be a likely time between bit slip synchronization loss. The results are as follows: for Pe = 0.12 a suitable N was 9, for Pe = 0.1 a suitable N was 6, for Pe = 0.07 a suitable N was 4. These values 25  of Pe are presented because, as stated earlier, the synchronization algorithm was designed to work with a BER up to 10^'. Thus, a suitable value of N, for use with a channel with a BER up to 10""^ is at least 6. Simulations were also used to determine the synchronization time, which was measured versus channel error rate and frame length. Figure 10 gives the synchronization time required for a channel with a BER from 0 to 0.15, and frame lengths from 168 to 1344 bits. Each point on figure 10 was obtained from the average synchronization time of 400 simulated synchronization attempts. The average synchronization time in seconds is determined from figure 10 by dividing the average synchronization delay in bits by the channel bit rate. Thus, given that a synchronization time less than 250ms is desired for a channel BER up to 0.1 and a data rate of 19200 bps, a frame length of 366 bits or less should be chosen. A coded speech frame with 8 bits of parity protection is 168 bits long, therefore two frames of speech can be transmitted between synchronization markers with an acceptable synchronization time. 20000.0  0)  E c o  ly  .A  /  15000.0 ^A' _/  _j{y 1(3—GFrame size 168 bits 3--£]Frame size 336 bits O - 0Frame size 672 bits A r - A Frame size 1344 bits  10000.0 . ^ ' <y  o c  P  -•  .<f  >.  .--e>''  5000.0 CD  o^O-  _--o-  - 0 -^R--a  rhr:uq.  g - . - B •O  S88  o ^e-^-—e  0.0 0.00  0.05  a"  H 0.10 Channel BER  0,15  Figure 10 Simulated synchronization time in bits for frame lengths of 168, 336, 672, and 1344 bits.  Marker Selection  The marker is chosen to provide the best possible synchronization performance  with the least overhead. Marker overhead is proportional to the product of the marker length and the 26  frequency at which the marker is placed into the data stream (the marker-to-marker distance.) Up to a point, the longer the marker, the longer the distance between successive markers can be. Thus, there is a trade-off between marker length and marker-to-marker distance. The requirement of framed speech transmission prescribes that a minimum marker distance be at least 364 bits, which is the length of a half-rate encoded frame. The other requirements, mentioned earlier in this chapter, dictate that the marker be around 8 bits long. Therefore, an 8 bit long marker was chosen on the basis of the 8 bit microcontroller word length. The standard marker sequence is usually chosen to have the lowest possible autocorrelation sidelobes. Barker sequences[39, pp 351-2] have ideal autocorrelation functions and are often used as markers. For an 8-bit marker, only a small amount of sidelobe information is available. For the algorithm described in section 3.2, the autocorrelation properties are not important at all. Only when the addition of bit slip correction is included into the algorithm are low sidelobes required. It seemed possible and practical to have the synchronization algorithm attempt to correct for bit slips. It was therefore required that:  1.  A one-bit-shifted version of the marker have as low an autocorrelation function as possible.  2.  The bit-shifted versions (a right shift and left shift) be distinct.  The second requirement provides a distinction between a bit shift resulting from a lost bit or an inserted bit. Based on these criteria, the marker sequence 01100101 was chosen by an exhaustive computer search. This sequence, when shifted by one bit to the right or left, will have 2 bits in agreement and 5 bits different. These facts were used to obtain eqn. (1). The autocorrelation function of the marker, when bracketed by a random bit stream, is shown in figure 11.  27  -2  0 bit position  2  Figure 11 Autocorrelation of the chosen marker.  3.3 Finding an Optimal Walk Distance Earlier, a suitable value of N was developed by simulating the synchronization algorithm. This section presents the synchronization results obtained from transmission of pseudo-random frames over power line communication channels. To find the most suitable value of N, test frames were transmitted between two modems over a variety of channels. No measured false-unlocks were detected on any of the channels with a BER < 10"^^ and values of N>2. Channels with a BER > 10"^, however, required a larger value of N to reduce the probability of frame synchronization loss. Detailed measurements were performed for 3 representative channels: a same-phase channel, a low random noise cross-phase channel, and a cross-phase channel with a high noise level. The tests were performed between 8pm and 10pm which is a time when channel conditions are found to remain constant. Once a suitable channel was found, 90 seconds (9820 frames) of 21 byte frames at 28  19200 bps were transmitted. The BER and the number of times the frame synchronization was lost were measured. Then, the output power from the modem was reduced, thereby increasing the BER, and the same test was run again. A 90-second test period was chosen to reduce the likelihood that the power line channel would vary during a test. The results from these tests are displayed in figures 12 and 13 where the BER reported was the average over the 90-second period. The number of times frame synchronization was lost is shown in figure 12 for the case of cross-phase and same-phase transmission. Curves A - C were measured for the same X-phase channel, which is an example of a channel with both burst and random noises. Curve D is a same-phase transmission. There are several items to note from this figure: 1.  For N below some threshold, synchronization loss probability is prohibitively high.  2.  For N above some threshold, synchronization loss probability is low.  3.  A value of N=8 appears optimum.  4.  In a high random noise environment a large value of N is required.  5.  The same-phase transmission has a higher BER, yet works well with a smaller value of N.  6.  Higher values of N are required in higher noise environments.  7.  Even with high N values frame synchronization may be lost. Figure 13 gives the number of times frames synchronization is lost versus the maximum walk distance  N for a channel with lower random noise than in figure 12. For this channel two points can be made, in addition to points 1 and 2 above 3.  A value of N = 6 appears optimum.  4.  As the BER increases the number of bit-slips increases also.  29  Combining this list with the one based on figure 12 leads to other observations. As the BER increases so does the optimum N. For high noise conditions an optimum value of N would be 8, 9 or 10. The product of walk distance and number of times frames were lost versus the maximum walk distance is of interest. This product gives the maximum number of frames lost until the synchronization algorithm enters the START/RESET state. This product is shown in figure 14 for the three representative channels of figures 12 and 13. We observe that the product reaches the lowest point and remains constant after a walk distance of N = 9 or 10, and remains approximately constant for curves A, D, E, F, and G, but increases for line B, C, and H via bit slips. Thus, a value of N = 9 or 10 appears to be best for minimizing the number of lost frames.  I 5 0)  E CO  E  10.0 Walk distance  20.0  Figure 12 Number of times frame synchronization was lost versus channel BER and maximum walk distance during a 90 second test interval for a channel "bad" cross-phase (X-phase) and of the same phase.  30  10.0 Walk distance  20.0  Figure 13 Number of times frame synchronization was lost versus channel BER and maximum walk distance, during a 90 second test interval for a channel "good" cross phase (X-phase). 600.0  500.0 m  E (0  400.0  1 1 1 1  ", 1 ,1 M .1  a O A - BER 0.026 (X-phase) B a B - BER 0.050 (X-phase) <> - O C - BER 0.087 (X-phase) A A D - BER 0.12 (same phase) • ^ - < E - BER 0.028 (X-phase) -\ \- F - BER 0.031 (X-phase) X ~ - K G - BER 0.051 (X-phase) iti mH- BER O.oeo (X-phase)  1 + il t  1  O  1  0)  300.0  E E  \  200.0 i:\  \ \ ^  100.0  0.0 0.0  5.0  10.0 15.0 Maxinfium walk distance  20.0  Figure 14 Maximum number of frames lost versus channel BER and maximum walk distance, during a 90 second test interval.  3.4 Modem Hardware Modifications This section describes hardware modifications performed to enable existing data modems to work 31  over poor quality channels. The modified power line modem was designed originally to transmit computer data [4]. Convolutional encoding and majority logic decoding enhancements to the modem are described in [11]. The designs were intended for general data transmission and were optimized to provide low bit error rates on good channels. At channel BERs above 10"'^ frequent bits slips and carrier phase synchronization loss were observed. These problems are unacceptable for speech transmission as bit slip will result in lost frame synchronization and carrier synchronization loss results in bit inversion. Two simple enhancements were performed which alleviated these problems. The problem of carrier synchronization loss was solved by differentially encoding the bits (DPSK). The problem of bit slips was corrected by adding a random walk filter in the bit synchronization circuits. Differential encoding handles carrier synchronization loss by encoding the bits such that the absolute phase of the received signal does not carry information. Data is encoded by difference in the carrier phase between bits. Figure 15 illustrates how differential encoding and decoding is performed before the modulator and after the demodulator, respectively, using the equations[40] M„'=M„_i'®M„  (3)  Rn = Rn®Rn-l  (4)  where M, is the i-th bit to the modulator and M / is the i-th differentially encoded bit. Likewise, Ri is i-th received bit from the demodulator and Ri is the i-th differentially decoded bit from the demodulator. Because the differential encoded signal does not depend on the absolute phase of the received signal, a carrier phase slip will result in the inversion of only one or two bits. The main problem with DPSK is an increased BER because of error propagation. decoding algorithms produce two bit errors for a single received bit error. 32  Differential  Thus, at high SNR a  differentially coded communication system will have approximately twice the BER of a coherent system. Figure 16 approximates^ the number of frames corrupted by carrier synchronization loss as a function of channel BER (which was calculated only from frames which did not experience carrier synchronization loss) for a 90-second period, over the same phase, with a framelength of 48 bytes at 19200 bps. Given the large number of frames corrupted due to carrier loss, differential encoding was considered necessary.  to modulator  XOR R' . " n-1  from demodulator  to decoder  One bit  Delay  'n-1  (b)  Figure 15 Differential encoder (a), differential decoder (b).  The second modification to the hardware was the inclusion of a random walk filter (also known as sequential filter) [41, 42] in the bit-synchronization circuitry. As stated, the original modem was designed to transmit computer data with a low error rate and high SNR. With high SNR a modest bit synchronization circuit was effective. Voice communication does not require such high SNR, but under lower SNR excessive bit jitter as well as bit-slip were observed.  ^  A frame with more then 25% bits in error is considered here to have lost carrier synchronization. If carrier synchronization loss occurred  near enough to the end of the frame then it would not have been recorded. Similarly, frames damaged from other means are recorded here as damaged by carrier loss, although this event was considered unlikely.  33  CO o  2000.0  0) CO  o w E  1000.0  CO  0.0 0.0001  0.001  0.01 Channnel BER  0.1  1  Figure 16 Number of times carrier synchronization was lost over a 90-second interval.  Figure 17a gives the original bit synchronization circuit used in the power line modem. The circuit generated the bit synchronization (bit sync) signal by dividing down a 24X-clock signal. When the phase detector detects bit sync, the clock is divided by 24. If the phase of the bit sync signal is detected leading, then the counter counts to 26 instead of 24, effectively lengthening the bit. Similarly, if the bit phase detector detects the bit sync signal lagging, then the counter is set only to 22. This simple method effectively performs bit synchronization. At lower SNRs, the phase detector will produce incorrect phase differences and thus spurious UP/DOWN signals. The net effect, under random noise, is to increase the phase jitter. However, during a deep fade such as the periodic fades which may last dozens of bits on power line channels, loss of sync-lock may be lost result in bit slip and frame synchronization loss. Adding a random walk filter after the phase detector reduces spurious UP/DOWN phase detector signals. Figure 18 illustrates the action of an N-step random walk filter. The filter generates an UP' signal 34  upon receipt of sufficient UP signals for it to "walk" N-steps in the up direction. Given that spurious UP/DOWN signals from phase detectors are random, the likelihood that a false UP' or DOWN' signal will be generated decreases approximately exponentially with N [38, pp 212-3]. Thus, by increasing N the number of spurious UP'/DOWN' signals can be reduced to an arbitrarily small value. The trade-off for this increased performance is a reduced locking-range and an increased lock-time. The circuit chosen was constructed using an N=16 step filter. The hardware implementation is given in Appendix D. A 16 step filter was chosen on the basis of simple construction and performance, up to BERs of 0.1. Baud*24 I Received Bits Phase Dector  up Bit Sync  Counter down  (a) Baud*24 Received Bits Phase Dector  up down  Random Walk Filter  up Counter down'  (b) Figure 17 Original bit sync circuit (a), bit sync circuit with random walk filter (b).  35  Bit Sync  Up  Up  Up  Up  Down Figure 18 State transition diagram for a length N random walk filter with inputs Up/Down and outputs UPVDOWN'  36  Chapter 4 - Quantitative and Qualitative IVIeasurements This chapter describes the quantitative and subjective measurements performed to evaluate power line voice communication quality. The procedure used to measure the real-time channel parameters, BER, and number of lost frames is described. This description is followed by a summary of the quantitative results obtained. A description of the subjective test procedure is given, followed by the test results used to estimate the sensitivity of the encoded speech parameters to noise.  4.1 Real-Time Quantitative l\/leasurements The quantitative measurements recorded during the development of the synchronization algorithm and FEC schemes included BER, number of lost frames, number of synchronization losses, and number of mis-synchronizations. This section describes the method used to measure these performance indicators as well as the measured results.  Test Pattern Generation and Decoding Given that the synchronization algorithm was intended to synchronize speech frames, ideally the essential parameters would be measured using compressed speech data. Unfortunately, measuring these parameters directly from received speech data in real-time would be difficult. For example, determining the BER in real-time requires the receiver to have a priori knowledge of the correct speech data. The frame-to-frame randomness of speech data makes this task computationally difficult. One approach is to use test patterns which are related mathematically from byte-to-byte and frame-to-frame. 37  The test pattern was constructed to fulfill the several requirements. It must posses a frame id number in order to enable determination of the number of frames lost and the time between synchronization losses. The number and location of errors should be measurable to enable determination of the BER and correlation (burstiness) of errors. The test method must be sufficiently robust to work in a high noise environment with up to 20 percent BER. The test pattern length should be arbitrary to allow testing of any frame length. The test pattern generation should be simple and rapid enough for real-time analysis. Finally, the test pattern should be representative of the speech data (compressed speech data appears more or less random from bit-to-bit and frame-to-frame). Test pattern randomness is very important with regard to bit and frame synchronization.  Bit  synchronization requires delineation of bit edges[43], while frame synchronization requires detection of frame markers. In the case of frame synchronization, frame-to-frame randomness is essential; a frame containing the synchronization marker sequence repeated in consecutive frames could result in a false synchronization lock. Fixed (non-random) test frames require the exclusion of the sync marker. Using frames which exclude the marker sequence is inappropriate because speech data will contain some markers, unless bit stuffing is used. The encoding technique uses a 16-bit frame id along with the byte position within the frame to produce pseudo-random frames. The pseudo-random frame is derived using the frame id. The id is first rotated by the number of one bits the integer contains, to obtain id: id = rot(id, ones(id))  (5)  where the function rot(a,b) rotates the binary a 6-times to the left, and the function ones(a) gives the number of ones in the binary representation of a. Next, id it is split into two bytes: high and low. high = id/-IBS ,  low = i''d%255 38  (6)  where % denotes the remainder function. Finally, the frame values of aj through a ^ and bi through bna are calculated using: ai = lfsr(2i) ® high  bi = lfsr(2z + i) Q low  (7)  The symbol© denotes modulo-2 exclusive OR. The function Ifsr(y) is the output of a "maximal length" linear feedback shift register[44, p 175] at the yth time step. The a„'s and 6„'s are arranged to form a frame as shown in figure 19. Previous  sync  a1  k  b1  a2  b2  a3  b3  a4  b4  Last sync  Next Frame  1 - 255 bytes Figure 19 Construction of test pattern  The received frames are decoded in a reverse manner. First, the received bytes are processed using an operation which is the inverse of eqn. (7): highn = lfsr(2n) ® a„,  loWn = lfsr(2n + 1) © 6„  (8)  Once decoded, the highCs, and /ow,'s are compared. If the frame has not been corrupted then highi = high2 = ... = highn = high' as well lowi = I0W2 =  ••• = loWn = low'. Under such  noiseless conditions high' and low' are processed with a reverse of equations (7) and (5), respectively: t' = high' * 255 + low' i'= rotri i' onesi i  (9) (10)  where rotr(a,b) performs afc-foldright rotation of symbol a, and i' is the decoded frame number. Finally, by using the value of /', the transmitted frame can be reconstructed using (5), (6), and (7). A comparison of the original and the reconstructed frames provides the number and location of bit errors within the frame. 39  In the case of a noise corrupted transmission, if a sufficient number of highi values are the same then that value is chosen as high'. Likewise, sufficient "agreement" among the /ow, leads to a low' value. More specifically, the algorithm used for the qualitative measurements in this thesis employed the agreement condition: highi = high2 = highs & lowi = I0W2 = I0W3  (11)  The probability of a random frame producing a false agreement is Pfa = 2^^^ ~ 10~^°. The probability that random errors will cause a failed agreement is given by Pna = l-(l~BERf^  (12)  where Pna is the probability random channel errors will cause a failed agreement (ie 11 is not satisfied) and BER is the channel bit error rate. With noisy transmission, the agreement condition (11) is met with probability P„a- When the condition is met, /' is used in equations (5), (6), and (7) to generate an error free frame. The error free frame is then used to determine the number of bit errors in the received frame.  If noise has  corrupted any of the first 6 bytes then the agreement condition will not be met (with approximately Pfa). In this case, the frame id from the previous frame is incremented and used as the basis to generate the error free frame. Receipt of a frame with the agreement condition met, therefore, provides a "decoder synchronization" which is used to decode the test frames in which the agreement condition is not met. As long as P„a is sufficiently large and Pfa sufficiently small, this scheme of measuring the number and location of errors is effective. For example where the BER = 0.01, 38% of frames (P„a = 0.38) will satisfy the agreement condition. With a higher BER = 0.1, P„a = 0.006. Such small values of Pna may be unacceptable because this implies that a large number of frames are received between decoder 40  synchronizations. The bursty nature of power line errors, however, meant that Pna is a conservative value and therefore we did not observe long periods of time between frame synchronizations. This method of encoding therefore turns the frame id into pseudo random data. Through the use of more complex agreement conditions it is possible to adapt this method for testing of channels with BERs approaching 0.5.  Bit Error Rate BER measurements over power line channels through the electrical engineering building at the University of British Columbia were performed. By varying the location of the transmitting and receiving modems, BERs ranging from 10"^ to values in excess of 0.2 were observed. These results are consistent with those described previously for this modem [4, 11]. The BER was found to change by as much as one order of magnitude during the course of a day. In addition, the BER across some channels would change by a factor of 2 or 3 over the time-frame of a few seconds. Thus, it is important to consider the measurement period of a recorded BER value. In most cases in this thesis, the measurement period was 60 seconds. Further, it was discovered that channel quality was less variable in the evening, between 8-10 pm, when most building equipment would not be switched on and off randomly. Thus, the channel measurements reported were taken during this time.  Performance of Sequential Filter The design of a random walk filter was discussed in chapter 3. Its effect on the bit error rate and the synchronization loss rate parameters is presented below. The objective of these measurements was to determine how much (if any) improvement is obtained using a random walk filter. The best way to observe the performance improvements is by measuring the above parameters over the same channel with 41  and without the sequential filter in place. Unfortunately, the power line channel conditions vary with time. To help reduce the time varying effects, the following measurement scheme was chosen. 1.  The channel BER was measured with the sequential filter in place.  2.  BER and frame and synchronization loss over a 60 second interval were measured using the sequential filter.  3.  BER and frame and synchronization loss over a 60 second interval were measured without using the sequential filter.  4.  BER and frame and synchronization loss over a 60 second interval were measured again using the sequential filter.  5.  If initial BER (step 2) and re-measured BER (step 4) differ by more than 4 percent, then steps 1 through 5 were repeated.  A 60 second measurement interval was chosen to minimize the effect of the time varying channel. Test data were transmitted across 3 different power line channels to perform these measurements. By varying the output power of the transmitting modem, the parameters could be measured over a range of bit error rates. The results obtained from measurements across three typical channels appear in table 2. Part A of table 2 shows the results obtained within the UBC Electrical Engineering (MCLD 458) communication lab across power phases. At full modem transmit power, a BER of 5.9x10"^ was measured for the modem with the sequential filter employed. No bit-slips were measured with or without the sequential filter. As the output power of the modem was reduced, the BER increased. With a BER of about 0.93x10"^, the first bit slips without the sequential filter were recorded. As the output power was further reduced, the number of bit slips occurring increased both with and without the sequential filter. However, table 2 42  shows that the number of bit slips occurring was very much greater without the filter. We can further compare the BER with and without the sequential filter. We observe that at low BERs (high SNR) the BER with and without the sequential filter is approximately the same. At lower SNR, however, the BER without the sequential filter can be up to 20% higher. Similar results were obtained with the other channels (parts B and C of table 2). Use of the sequential filter considerably reduced the number of times bit synchronization was lost. The reduction is large at high BER values. The BER was not greatly affected by the sequential filter, but was always lower with it than without it. (A) X-phase "good" channel  (B) X-phase "poor" channel  with seq. filter  without filter  with seq. filter  without filter  with seq. filter  without filter  BER  BER  BER  BER  BER  BER  bit slips  bit slips  bit sUps  (xlO-2)  (xl0^2)  (C) same phase "poor" channel  bit sUps  bit sMps  (xlO-2)  (xlO-2)  bit shps  (xlO-2)  0.059  0  0.067  0  1.46  0  1.45  0  1.93  0  2.10  8  0.15  0  0.16  0  1.92  0  2.00  3  2.03  0  2.05  34  0.93  0  1.00  2  2.97  0  3.94  121  2.41  0  4.71  38  3.24  0  3,75  15  4.71  0  6.38  82  2.93  0  3.44  122  3.77  .5  4.15  9  4.93  1.5  6,61  131  4.07  0  6,54  764  4.19  6.5  4.87  15  10.3  4.5  11,6  216  6.73  4  8.28  42  12.5  7  14.6  470  Table 2 Number of times bit synchronization was lost and BER for three typical channels with and without the addition of a random walk receiver filter  4.2 Subjective Measurements Two series of subjective measurements were performed.  The first series was used to measure  the perceptual significance of errors in selected speech code parameters. The second series of tests 43  determined the performance of the communication system as a function of channel quality (BER) and data transmission rate (9600 bps and 19200 bps). This section describes the experimental method and the results obtained in the perceptual sensitivity experiments.  Subjective Test Procedure In both series of tests speech samples were recorded in a quiet room. The recording apparatus consisted of a Sony F-VX30 dynamic microphone, KROIiN-HITE model 3202 dual variable filter for input and output low-pass anti-aliasing filtering (with a cutoff at 3300 Hz), 12-bit A/D converter on the Spectrum 56001 DSP board running on an IBM-AT compatible, and a Sony TC-330 cassette/reel tape recorder used as a microphone preamplifier. Sampling was performed at 8000 samples/second. This hi-fidelity system provided a digital audio signal of higher quality than would be available in a typical application of this communication system, thus allowing an assessment of the voice coding algorithms. The speech data was then transferred to sun workstations for processing. The processed speech data was then transferred back to the computer in the quiet room to be played to listeners. The speech test using the modem required the additional step of transferring the data to the IBM PC's interfaced to the modems. This arrangement is shown in figure 20. Blocks 3 and 4 were required when measuring the performance across the power line. Subjects in the quiet room listened to the speech samples reconstructed and played from the D/A converter of the Spectrum 56001 DSP board. The Sony TC-330 cassette/reel tape recorder amplified the signal to the level appropriate for the JVC HA-D500 headphone. As with the recording setup, the quality of the system exceeded the performance of any application of a communication system employing the VSELP algorithm. 44  IBM PC with DSP card 1,(6)  SUN Workstation  2,5  Quiet Room  ti  o  CD  3 CD  Figure 20 Processing steps required for subjective testing.  The listening tests for perceptual significance measurements were conducted with subjects chosen from students and staff in the electrical engineering department. They were seated in the quiet room at a desk in front of the test computer and given the test instructions (Appendix A and B). The computer recorded the score for each of the samples.  Testing Perceptual Significance of Parameter Errors Background  As stated in chapter 2, the output of the speech encoder is a frame of speech parameters.  Errors in some parameters are more noticeable than errors in others. This section presents the method used to determine the perceptual significance of each parameter as well as the results obtained. Three common subjective measurement procedures include: isopreference method, relative preference method, and the category-judgement method[45]. The category judgement method has the listener assign a category to a sample of speech relative to some subjective standards. This method was chosen for our use. The commonly used categories are based on a five point scale: unsatisfactory = 1, poor = 2, fair = 45  3, good = 4 and excellent = 5. When the listening tests are performed with a set of subjects the mean opinion score (MOS) of the sample is recorded. MOS ratings are commonly used as a subjective standard for comparison of communication system and speech compression algorithms [46, 47, 48]. For example, toll grade communication is 4.0- 4.5. The VSELP compression algorithm has a MOS of approximately 3.5 [20, 49].  Test procedure  The category judgement test method described above was used, but with a modified  set of MOS categories. These categories were based on speech degradation with respect to an errorfree compressed sample as opposed to speech absolute quality. This was done because the amount of speech degradation symbol errors produced was to be measured, rather than the quality of the signal, and because with VSELP compressed speech does not qualify for the "excellent" category. A similar approach was chosen by Coleman [49] where a five level "Listening Effort Scale" was used to estimate speech intelligibility. Subjects were given two reference samples, a "good sample" consisted of the compressed speech without errors; a "poor sample" included many errors and was arbitrarily chosen as a lower limit of speech quality. With respect to these two references, subjects were asked to select the appropriate category from the list below. By judiciously choosing a poor reference sample, the test could be better focused to discern minors degradation in quality. Further, the choice of categories 4 and 5 attempted to force the subjects to answer the question "At what level are symbol errors detectable?" 5 - Equal to or better than good sample 4 - Slightly worse than the good sample 3 - Significantly worse than good sample 46  2 - Slightly better than poor sample 1 - Worse than or equal the poor sample  The test consisted of 120 voice samples. Each sample contained two phonetically balanced sentences [45] read by a male and female speaker and chosen from the list: "Lift the square stone over the fence.", "Mesh wire keeps chicks inside.", "The two met while playing on the sand.", "Eight miles of woodland burnt to waste.", and "The crooked maze failed to fool the mouse." Three female and two male readers were used. All readers spoke with a Canadian accent.  Test Results  Fourteen subjects participated in these tests. The MOS scores for the RO, LPCl, LPC2,  LPC4, GSPO, LAG, CODEl, and CODE2 parameters are graphed as a function of symbol error rate in figures 21 to 24. These graphs enable direct comparison of the perceptual sensitivity of the parameter errors. As well, they show the utility of adding error detection. The error detected scores give the sound quality improvement when damaged speech parameters are replaced with the most recent correct parameter. Table 3 restates the data given in figures 21 to 24 which highlight the relevance of forward error correction. This table answers the question "At what symbol error rate does a perceptual decrease in quality occur?" For example a MOS score of 4.0 has category of "slightly worse than good sample." Thus, compressed speech with a symbol error rate of 0.019 in the RO parameter will have a MOS of 4.0 when decoded. We can compare this to the 0.15 symbol error rate the protected RO parameter can tolerate before decoded speech has a MOS of 4.0.  47  5.0  '  '  ^^----..^^r^.. --"  ""•^TTZ^I^^CA^-X:;-^^^^  "" 4.0  X;  ^^^V^  *  • UVG GSPO wftti error defection — — LAG with error detection  o o CO c o  ———^ \  "^^ * ^\.^ ^SK Q—EIGSPO  \  \ \ ^ S \ \^  \ ^-^ , •v. V  3~.r'-'^  ~V  \  \ "^Vx  ^^•"^--ra^  :s 3.0 Q,  ^ -^  \  o c  •  \ \  CO  2.0  H' L ^^ ^f.  1.0  0.001  0.01  0.1  Probability of Symbol Error Figure 21 MOS score versus symbol error rate for the GSPO and LAG parameters with and without error detection.  5.0 <><. • - $ > .  ••.  4.0 G~-€)Fio  o o  w c o .S 3.0  O - -O LPOl RO with error detection LPCl witti error detection  Q.  o c  03 0)  2.0  1.0  0.001  0.01  0.1  Probability of Symbol Error Figure 22 MOS score versus symbol error rate for the Frame energy (RO) and 1st LPC coefficient with and without error detection.  48  5.0  ^-—*-~^r £o o  9- VLPC2 < ^ -<J-PC4 LPC2 with error detection LPC4 witti error detection  4.0  c o '.£ 3.0 a. O c  ^-^~9::^:^:^^—^-^  v....  \\  ^  \  \ \ \  ^ N .  ~  ^  \  X\  -  ^' \  ">  \ j  ).001  \  ""•—J^  CO  2.0  _  V\ • \~--x \ ^ ^ ^ \ \ ^ ^v \ "^-^ ^  •>  \  \  -.  \  \  <"^ \ \  V  0.01 0.1 Probability of Symbol Error  Figure 23 MOS score versus symbol error rate for the 2nd and 4 LPC coefficient with and without error detection.  0.001  0.01 0.1 Probability of Symbol Error  Figure 24 MOS score versus symbol error rate for the residual vectors CODEl and CODE2, 6th LPC coefficient, and with error detection the for residual vectors and the 8th LPC coefficient.  49  Paramter symbol error rate  (Unprotected symbols/protected) (xlO"^) CODE  M.O.S  RO  LPCl  LPC2  LPC4  LPC6  LPC8  GSPO  LAG 1&2  4.0  1.9/15  1.5/7  3.7/12  7.5/35  27/NM  NM/79  1.5/6.3  0.7/10  5/12  3.5  3.0/27  4.0/15  7.2/30  15/50  42/NM  NM/NA  4.5/13  3/20  21/24  3.0  5.0/40  7.0/25  15/40  24/69  65/NM  NM/NA  9.0/27  9.0/35  33/50  NA = not applicable, NM = not measured. Table 3 Summary of MOS degradation used to determine error sensitivity of compressed speech parameters.  Lossless scores Listening tests place the quality of the VSELP encoder with a MOS score between 3.5 and 4.0[20, 49]. Voice coders scoring above 4 are considered high-quality, producing no noticeable quality degradation compared to a standard telephone line [14]. Voice coders with a MOS score of 3.5 produce "communication quality" speech that is a level of quality "characterized by a level of speech degradation that is easily detectable but not bad enough to impede natural telephone communication" [14]  4.3 Subjective Evaluation of FEC schemes Subjective testing was used to compare the quality of speech encoded at 9600 bps with a minimal amount of FEC versus 19200 bps encoded speech with considerably more FEC. The implementation of these two methods is described in the following chapter. These subjective tests had two goals. The first was to compare the quality of the 19200 bps encoded speech versus the quality of 9600 bps encoded speech over a random noise channel to determine the noise tolerance increase offered by the FEC schemes. 50  The second goal was to determine the net sound quality difference of the 9600 bps implementation and the 19200 bps implementation. This comparison was required to determine if the increase in channel errors caused by the higher baud rate transmission would negate the benefits of the additional FEC. Similar subjective tests of voice compression algorithms have been conducted previously to determine the quality of compressed speech for use over mobile channels using DPCM speech coding at 16-32 kbps [50], and to evaluate the RPE-LTP 13kbit/s GSM [49] algorithm subject to random noise. These tests used the MOS rating technique to assess the overall quality of the communication system subject to noise. MOS scoring is used in our subjective tests as well. Speech sample creation is described below. First, four representative power line channels (modem locations) were chosen. In each case, the transmitting modem was located in MCLD 458. The receiving modem was placed either in the hallway near the MCLD 458 or in MCLD 203. The phase into which the transmitting modem was plugged could be changed to allow for same-phase or cross-phase transmission. Transmissions to the nearby hallway were considered to be over a "good channel" while longer distance transmissions to room 203 were considered to be over a "poor channel." The four channels created can be described as 1 - good same-phase, 2 - good cross-phase, 3 - poor same-phase, 4 - poor cross-phase. For each of the four channels, measurements were performed with the transmitter power varying from 7.1v to .071v RMS (77dBmV to 37dBmV). Thereby, the performance with many types of channel conditions could be measured. Next, the speech samples were transmitted. These tests were performed between 8pm and 10pm which is a time when power line conditions were found to be consistent. For each of the four test channels, the following steps were used create the speech samples: 1.  The transmitter power was set to maximum (77dBmV).  2.  The channel BER was measured at 19200 bps for 30 seconds. If the BER was less than 10"', the  19200 bps encoded speech sample was transmitted. 3.  The 9600 bps encoded sample was transmitted.  4.  The rate was then increased to 19200 bps and the channel BER was remeasured for 30 seconds.  5.  If the channel BERs of steps 2 and 4 were within 10% of each other, then the two speech samples were stored, the transmitter power was reduced, and steps 2 to 4 were repeated to create a new set of speech samples. If the channel BER of steps 2 and 4 were not within 10% of each other, then steps 2 to 4 were repeated without changing the transmitter power.  With the speech samples stored, the final step was to decompress them and perform subjective tests in which 19 people were asked to rate the randomly ordered samples according to the following fivecategory MOS scale 1 = unsatisfactory, 2 = poor, 3 = fair, 4 = good, 5 = excellent. The instruction sheet supplied to the candidates appears in appendix B. As with the previous test, the subjective tests were conducted in the quiet room with the aforementioned speech processing apparatus. The sentences chosen were "Fairy tales should be fun to write." and "The juice of lemons makes a fine punch", read by a female and male reader, respectively.  52  Chapter 5 - Error Control in Speech Coding This chapter describes the two schemes implemented which enhance the quality of speech transmitted over a noisy power line channel. The motivations and general options available for error control and forward error correction (FEC) are presented, followed by a detailed description of the speech coding algorithms. Finally, a subjective sound quality comparison of the two speech coding and transmission methods is presented for both a random noise channel and power line channel.  5.1 Error Control Options and Background Various approaches are available to improve the sound quality of compressed speech. The first scheme makes use of a voice compression algorithm designed to minimize the effect of channel errors [51]. The VSELP scheme [30] chosen reduces the significance of bit errors through the use of vector residual quantization, log scale LPC scalar quanitization with grey coding, and post-filtering. In the second scheme, redundant bits are added to the encoded bit stream to provide symbol error detection. As stated in chapter 2, the codewords tend to remain stationary from frame to frame. We can often reduce the perceptual significance of an error in a parameter by substituting the previous parameter. The third available method is to employ conventional FEC code to reduce the BER following decoding. Typically, this may involve the use of convolution encoding and decoding, or BCH block coding and decoding. The scheme created to deal with the power line burst errors for the thesis uses a code repetition scheme. Later, it will be shown how this provides both error detection and correction. When protecting speech parameters on a symbol-by-symbol basis one would ideally allocate error control bits on the basis of the perceptual significance of errors in a given parameter. This is the basis 53  of the subjective testing performed in chapter 4. Allocation of protection bits on the basis of perceptual significance is used for mobile communication [52, 53, pp 81-95] where symbols are protected using BCH block codes [15, pp. 141-77], In addition, LeBlanc describes channel coding [54] of CELP encoded speech for a mobile channel using Reed-Solomon or rate punctured convolutional codes along with convolutional interleaving. In addition to allocation based on the perceptual significance of errors in encoded parameters, it is appropriate to consider allocating redundant bits to allow for graceful degradation or a minimal level of service in severe noise conditions. Codewords which are essential for a minimal level of communication would be allocated additional error correction bits, possibly at the expense of sound quality on better channels. Ideally, the perceptual significance errors in each bit of each symbol would be considered when formulating an FEC scheme; however, three problems arise. First, measuring the significance of each encoded bit by subjective testing would be very time intensive. Second, finding the perceptual significance of errors in a single bit does not necessarily provide information on the effect of multiple bit errors. Third, there exists no theoretical scheme for encoding of variable importance data which also allows for symbol error detection.  9600 bps Coding Scheme The 9600 bps coding scheme was designed to work with the power line modem in 9600 bps mode. This scheme is a simplification of the method chosen for the USDC digital cellular phone standard [18]. The FEC method described in the standard begins by using a seven bit cyclic redundant code (CRC) [15] to confirm the accuracy of the 12 most perceptually significant bits of each frame. To provide further 54  redundancy, the 84 most significant bits of each frame along with the aforementioned CRC are 1/2 rate convolutionally encoded and interleaved. The complete bit stream rate is 13500bps. When the speech frame is received, it is first de-interleaved and then trellis decoded. Next, the CRC is checked. If the CRC check fails, the 12 most perceptually significant bits from the most recent packet (which passed the CRC check) would be utilized. This method has not been tested using the PLM because the aggregate rate of 13.5 kbps would under-utilize the 19.2 kbs channel capacity. The 9600 bps FEC method implemented for this thesis work was a simplified version of the USDC method. Here, only the seven bit CRC is calculated using the 12 most significant bits. These "most significant bits" are specified in the USDC standard but no justification is given for their validity. The aggregate bit stream including the eight bit synchronization marker, seven-bit CRC, and two bits of modem overhead result in a 8800 bps bit stream; (7-f-2-i-8-i-159)*50 = 8800 bps. This allows transmission at the lower bit rate of 9600 bps and leaves available some bandwidth for additional signaling. Decoding the received bit stream requires recalculating and comparing the CRCs. If the CRCs are equal (CRC agreement) the received frame is sent to the voice decoder. If the CRC are not equal, then depending on how many frames recieved since the last CRC agreement the following will occur: If the last CRC agreement was one or two frames previous then the parameters from the last correct frame^ are used. If last CRC agreement was three to five frames previous, then the parameters from the last correct frame are used, but the RO (frame energy) parameter is decremented by two (4 dB). If the last CRC agreement was six or more frames previous then the RO parameter is set to zero, muting the output. Thus, if a succession of incorrect CRCs are received, the parameters from the last correct frame are  '  A "correct frame" is understood as a frame where the received and recalculated CRC are equal. This condition will exist, with a small  probability, even if the CRC protected bits are in error.  55  recycled for two frames and then the output is muted over the next three frames. This would occur typically if frame synchronization was lost. The advantages of using this method include simple implementation, ability to transmit in full duplex mode at a baud rate of 19.2 kbps, and a lower bit rate (9600 bps) for more robust communication when 19200 bps is not viable. Conventional forward error correction is not provided. The CRC detects only errors of the most significant speech parameter bits. Therefore this method provides speech protection only through the use of error detection and parameter repeat. A disadvantage of using this method is its comparative intolerance to noise with speech quality becoming unacceptable when BER ~ 10"^.  5.2 19200 bps Coding Algorithm A full-rate (19200 bps) voice coding scheme was desired to utilize the full 19200 bps bandwidth. Requirements for this scheme include a simple implementation executable in real-time and the ability to provide symbol error detection and error correction. Also, the error correction scheme must be suited to function in a burst noise environment, and, the voice coding scheme must provide a graceful degradation in speech quality during noisy communication times. Given these criteria and the symbol perceptual sensitivity data in chapter 4, a simple scheme was constructed where the speech parameters are divided into three classes. Class 3 symbols are the least important. No error correction or error protection is provided. Class 2 symbols were considered significant enough to require a four bit error protection CRC. Class 1 symbols required the most protection. Class 1 symbols each had a four bit CRC (similar to the class 2 symbols), but in addition, each symbol and corresponding CRC was duplicated. This simple method provided both error detection and error correction of class 1 symbols. 56  Class 1  Class 2  Class 3  Name  Total Bits  Name  Total Bits  RO  2(4+5)=18  LPC3  4+5=9  LP6  3  LPCl  2(4+6)=20  LPC4  4+5=9  LPC7  3  LPC2  2(4+5)=18  LPC5  4+4=8  LPC8  3  Name  Total Bits  LAG_l-4  2*4(7+4)=88  LPC9  3  GSP0_l-4  2*4(8+4)=96  LPCIO  2  Total =  240  +  26  CODEl_l-4  4*8=32  CODE2_l-4  4*8=32  +  78  =344  Table 4 Redundant bit allocation for symbols.  Table 4 provides a listing of symbol class and the number of bits required by each parameter, as well as the total number of bits required. Class 3 symbols comprise most of the 344 bits per frame. The aggregate bandwidth required for this implementation including the encoded data, synchronization marker and modem overhead is (344+8+2) = 354 bits/frame or 17700 bps. Parameter decoding was somewhat more complicated than the encoding. Received parameters are first deinterleaved. Next, the CRC value of each class 2 symbol is computed (CRCc) and compared to the received CRC value (CRCr). If the CRCs were equal (CRCc = CRCr), then the parameter received is passed to the voice decoder. If the recomputed and received CRCs are not equal, then the parameter from the last frame with a CRC agreement is used. Decoding class 1 symbols requires recomputing and comparing CRCs for both copies of the received parameter. Call Pri and Pr2 the first and second copies of the received parameter, respectively. Likewise, call CRCri, CRCr2, CRCd and CRCc2 the received CRC and computed CRC values of Pfi and Pr2, respectively. The following method is used to determine which parameter is accepted: 1.  If Pri = Pr2, CRCri = CRCd, and CRCr2 = CRCc2 then select Pri 57  2.  If PH 7^ P r2, CRCri = CRCci, and CRCr2 / CRCc2 then select P^i  3.  If Pri 7^ Pr2, CRCri 7^ CRCd, and CRCr2 = CRCc2 then select Pr2  4.  If Pri = Pr2, CRCri 7^ CRCd, and CRCr2 7^ CRCc2 then select Pri  5.  If Pri 7^ Pr2, CRCri 7^ CRCd, and CRCr2 7^ CRCc2 then compare Pri or Pr2 and choose the parameter with the smaller hamming distance compared with the parameter used in the last frame.  Rule 1 is chosen if no errors are detected. Rules 2 & 3 apply if the parameter copies do not agree. In this case, the parameter which does not have a CRC error is chosen. Rule 4 assumes the received parameters are correct but both CRCs are erroneous. Rule 5 assumes that one of the parameter copies is correct but both CRCs are incorrect. In this case, the parameter closest to the parameter used in the last frame is chosen. These rules were optimized for a burst noise environment. The CRC values are placed immediately after the symbol as shown in figure 25. This way a burst will hit the symbol and its CRC, as opposed to hitting the symbol and CRC of another symbol.  Symbol i copy 1  CRC i copy 1  other symbols and crc in frame  Inter-symbol distance (interleave distance)  h  Time  Symbol i copy 2  ORG i copy 1  1  H  *'  Figure 25 Symbol and CRC placement of class 1 symbols.  In addition to the above, the decoding algorithm detects synchronization loss. The frame is considered to be mis-synchronized if it contains 15 or more CRC errors. In such a case, all the parameters from the last frame are used again. This recycling continues for three frames, after which the output is muted. 58  This coding scheme was chosen primarily because of its simplicity. It is very likely that a more efficient coding scheme could be constructed. Unfortunately, selection of better schemes is made difficult without an appropriate general model for power line communication channels.  Selection of Parameter Significance Allocation of error control bits to compressed speech is a difficult task. Ideally, each bit produced by the compression algorithm would be equally significant.  Such speech data would then be best  protected from errors using an FEC scheme which reduces the channel BER. Unfortunately, the data stream produced by the voice encoder is not uniform with respect to error significance. In addition, there is a need for symbol error detection which recognizes the periodic bursty nature of channel errors, as well as the need for a simple coding algorithm. Making this task more difficult is the fact that data regarding the perceptual significance of each coded speech symbol was measured in isolation from other parameters effectively assuming that errors occurred only in one parameter at a time (chapter 4.) We have no information on how the combination of several symbol errors would be perceived. Without direct information on the perceptual effects of errors in several parameters, the following allocation rule emerges: For any bit error rate, the sound quality degradation (caused by errors) will be no less than that produced by errors only in the most perceptually sensitive parameter. This rule is roughly analogous to the rule "A chain is no stronger than its weakest link" Based on this rule, error control bits were allocated as follows: 1.  The MOS degradation curves for all the tested parameters (given in chapter 4) were plotted on the same axis. A representative illustration appears in figure 26a. The probability of symbol errors was adjusted for relative parameter length (number of bits each encoded parameter requires). 59  2.  A target MOS degradation curve is constructed. A representative illustration of this is shown in figure 26a. In our case, the residual parameter degradation curve was selected as the target degradation curve because the residual parameter is less sensitive to noise than most other parameters, and the residual parameter is too large to be error protected.  3.  By assigning error control bits, the MOS degradation curves of the parameter will be shifted to the right. The object is to assign sufficient bits to each parameter such that parameter's degradation curve will lie on the target degradation curve.  4.  If the degradation curves of each parameter lie at, or to the right of, the target curve and unused error control bits remain available, then the target curve is shifted to the right and step 3 is repeated.  5.  When all the error control bits have been assigned, the composite MOS degradation curve will look approximately like figure 26b.  Step 3 was accomplished by adding either a four-bit CRC, or by duplicating the parameter and the CRC, Adding the CRC provides error protection (a class 2 symbol). Therefore, the degradation curve of a class 2 symbol is replotted using the symbol with error detected scores provided in section 4.2. With the symbol and the CRC repeated (a class 1 symbol), the likelihood that both copies received will be damaged symbols is approximately the square of the probability that one symbol copy and its CRC will be damaged. Thus, a class 1 symbol has a degradation score of a class 2 symbol with the probability of symbol error re-scaled to the square root of its probability of error.  5.3 Parameter Interleaving Given that the errors on the power line are often bursty and periodic, an appropriate interleaving of the repeated speech parameters used by class 1 symbols greatly reduces the likelihood that both the original 60  Raw Parameter Degradation Parameter 3  /  Parameter 6  Parameter 4 ' Parameter 5  Parameter 1 Parameter 2  Adjusted Symbol Error Rate  (A) Protected Parameter Degradation  'arameter 1 Parameter 2 Parameter 3 Parameter 4 Parameter 5  <0  Adjusted S y m b o l Error Rate  (B) Figure 26 Mean degradation curves Isefore and after error correcting bits are assigned.  61  and redundant parameters will be hit by a burst error. This section describes parameter interleaving which will minimize the effect of errors on a periodic burst error power line channel.  Optimum Interleave Distance As discussed previously in chapter 3, bit errors are correlated and periodic with a period of 1/120 seconds. Error correction is facilitated by transmitting repeated parameters in a way which reduces the probability of having an error in both the original and repeated parameter. Two general categories of periodic channel errors are considered.  The simpler case involves  transmission on the same phase, as shown in figure 1. Typical error patterns [5] for the same phase case are shown in figure 27a. The more complex case occurs with cross-phase transmission. Typical error patterns for cross-phase transmission situations are shown in figure 27b. Periodic same-phase errors occur with a frequency of 120 Hz. To minimize the effect of these errors, the repeated parameters are placed ^* j ^ seconds after the initially transmitted set. This corresponds to exactly 80 full rate bits. Such placements will minimize the number of double parameter errors. Cross-phase errors are much harder to combat. As shown in figure 27b, two error bursts may be encountered. These burst are centered 60 degrees (1/360 seconds) apart. This results in a much wider effective burst period. As with the same-phase transmission, the redundant parameter should be placed I * no seconds after the first. Figure 28 is an example of a cross-phase transmission within the electrical engineering (Macleod) building. The duplicate eight-bit symbol was spaced a distance ranging from zero to 100 bits from the original eight bit symbol. For the lower BERs, the percentage of frames with both parameters damaged (a double error) reaches a minimum with an 80 bit (1/240 second) separation. At higher BERs, there is no clear optimum separation which reduces the probability of double errors over cross-phase transmissions. 62  Time 1/120 sec.  1/120 sec.  (a)  Time  Figure 27 Periodic burst error spacing for (a) same phase transmission (b) cross phase transmission.  40.0 - -  ^  30.0  \A/\y  BER = 0.11 BER = 0.08 BER = 0.05  \ w  I  20.0  o "° 10.0 0.0  0.0  — X"  20.0 40.0 60.0 80.0 Distance between symbols  100.0  Figure 28 Double errors as a function of average bit error rate and symbol spacing  Compatibility of Symbol Data with Burst Error Channel In addition to having good properties with respect to leaving a copy of a transmitted parameter value undamaged, the periodic burst errors on the power line also result in fewer symbol errors than a random error channel. Burst errors will create errors in only a few symbols, as opposed to random 63  errors which may damage many symbols. We can show the difference between a random channel and a burst channel as follows. Consider a burst error of length L bits with period P bits and a symbol of length M bits. The probability of a symbol error Pse is _M L-1 _ M + L-1 -'^selburst ^ p" ^ p~ p  <-^3)  Assuming a periodic error burst occurs at 60Hz, and a 19200 baud rate, error bursts will occur every 320 bits. We may calculate an effective error rate as BER = | ^ , given a single periodic burst of length / bits with a burst period ofp = 320 bits. Using equation 13, we may calculate the probability of a symbol error. We can now compare the symbol error rate with random errors to the symbol error rate with burst errors. The probability of a symbol error given random errors is  ^•iplrandnm se I random ~ [^ ~ ^e  I  (14)  A plot of the number of symbol errors as a function of channel BER for both the periodic burst error case and the random error channel indicates a substantially lower symbol error rate with a burst channel.  5.4 Comparison of 9600 and 19200 bps Performance Figures 30, 31 and 32 summarize the subjective quality tests by comparing the 19200 bps and the 9600 bps encoding schemes. These tests measure the subjective quality, as described in chapter 4, of the encoded speech subject to errors caused by the power line errors and random errors. 64  1.0 2 0.8 Qi •5  E 0.6 >. CO  o >^ 0.4 la 2 0.2  Random Errors, length = 8 bits Burst Errors, length = 8 bits Random Errors, length = 12 bits Burst Errors, length = 12 bits  Q_ ..., 0.0 0.0001  ^ . ^ ^ - i - ^ V - - ' ' ^ - ' ^  0.001  0.01 Average bit error rate  0.1  Figure 29 A comparison of the number of symbols with errors with and without interleaving as a function of bit error rate.  Figure 30 provides a comparison of the MOS of the 19200 bps and 9600 bps encoding schemes subject to random bit errors. This figure provides a comparison of the encoding schemes on the sole basis of channel error rate. Several salient result can be noted from figure 30: 1.  All MOS scores are higher for the 19200 bps encoding method, provided BER < 0.10.  2.  The 19200 bps encoded voice data was found to be tolerant to at least twice as many errors as the 9600 bps encoded voice data, for the BER range of figure 30.  3.  The 19200 bps and 9600 encoded scores fell below 2 (poor) for BER of 3.8x10-^ and 1.7x10^^ respectively.  In addition, we observe that the quality (MOS) of the 19200 bps encoded sample reaches its maximum approximately at a BER of 2x10"-' where an error free sample scores 4.5. Likewise, the quality of the 9600 bps encoded sample reaches its maximum at approximately a BER of 5x10^. 65  5.0  0.01  0.001  Bit Error Rate Figure 30 A comparison of the half rate and full rate encoding schemes for a random binary symmetric channel  Figure 31 compares the MOS of the 19200 bps coding scheme, when subject to binary symmetric errors as well as to power line errors. These results demonstrate the difference in sound quality between a random noise channel and the periodic bursty power line channel. The main results obtained from figure 31 include: 1.  The quality score at BERs below 0.01 (approximately) appear similar for the power line and random error channels. This result probably arises because at low BER the error bursts are short and appear randomly.  2.  At higher BERs (above 0.01), the quality scores tend to be higher for power line channels than for 66  the random error channel. Burst errors tend to corrupt many bits in the same speech parameter, rather than few bits in many parameters.  5.0  •  ' 1  •—•  1  1  1  M  •  — » _  CD 4 . 0 i—  o o  '  CO c  o .£ 3.0  °•  Q.  o  CO CD  2.0  1.0  1  1  1  1  1  0.001  1  •  m\ u  nanQom error cnannei ^Desi iiij • powerline ch. 1 D powerline ch. 2 • powerline ch. 3 H powerline ch. 4  c  D  1  , 1  0.01 Bit Error Rate  •  1  L-  1  1  \  1  L  r  0.1  Figure 31 A comparison of the full rate encoding schemes with a random binary symmetric channel and various power line channels.  Figure 32 presents the results of the quality measurements for the 9600 bps and 19200 encoding schemes with transmission over power line communication links. These results include the effects on channel BER of bit slips, mis-synchronizations and other degrading effects caused by transmission over power lines. 67  The measurements in figure 32 give no convincing indication as to which method provides better performance. The decrease in channel quality brought on by transmission at 19200 bps (as compared to 9600 bps) has negated the beneficial effects of a more accurate coding scheme. Since both schemes appear to work equally well, we may conclude that the lower rate 9600 bps scheme is more practical because of its simpler implementation. Figure 32 does indicate that for BER < 0.03, MOS for the 19200 bps scheme exceed 2.5. This statement cannot be made for the 9600 bps scheme which shows MOS < 1.5 for BER ~ 0.02. 5.0  0.001  0.01 Bit Error Rate  Figure 32 A comparison of the half rate (9600 bps) and full rate (19200 bps) encoding schemes over four power line communication channels.  68  Chapter 6 - Conclusions 6.1 Summary This thesis presented a system for real time voice transmission of speech over power lines. This system employed synchronous digital transmission, voice compression, and forward error correction. Data transmission across the power line is subject to many disturbances. Subjective testing was performed to determine how to minimize the effect of these disturbances. The thesis work was divided into two parts. The first involved substantial and essential modifications to the existing power line modems, which were designed to transmit packetized data. The modifications necessary to transmit compressed speech required the insertion of periodic synchronization markers into the compressed data, as well as the design and employment of a real-time algorithm to perform the synchronization and to detect its loss. Converting the modems to transmit synchronous data required determination of a suitable marker sequence, distance between markers, and other parameters required by the synchronization routine. In addition, the modem hardware had to be enhanced to prevent bit slip, which was a major cause of lost synchronization. The synchronization algorithm was designed and modified to perform on channels with a bit error rate as high as 0.1. The second area of study involved determination of an effective method to encode and protect speech data. This work required information on which components of the compressed speech frame were sensitive to errors. Subjective listening tests were used to obtain the required information. In these tests, errors were added to individual speech parameters, and human subjects were asked to rate the degradation in speech quality. Using this information, two schemes were created to protect speech data. The data rate of the VSELP encoder is 7950 bps. Given the selectable modem data rates of 9600 and 19200, two 69  coding schemes were created. For the 9600 bps case, only a small amount of bandwidth was available to implement forward error correction. A CRC was used to determine whether one of the 12 most significant bits were corrupted; if corruption occured the previous frame was repeated. For most parameters, the degradation caused by errors was reduced when error detection was employed and the parameter from the previous frame was substituted for the corrupted parameter. This requirement for parameter protection provides motivation for the use of a symbol-by-symbol protection scheme. In the case of 19200 bps transmission, a complex encoding strategy was devised which placed each of the symbols into one of three groups. The first group required no error correction. The second group was provided with only error detection. The third group received both error detection and correction. The categorization for each symbol was chosen on the basis that the combined degradation of speech quality caused by errors in many speech parameters would be dominated by parameters which were most sensitive to errors. Subjective testing was used to determine the best error control scheme. Under random noise tests with equal bit error rates, the 19200 bps encoding scheme tolerated 2 to 3 times more bit errors at a given MOS score than the 9600 bps scheme, depending on the channel bit error rate, as expected. The question was "Would the greater number of channel errors encountered with a 19200 bps modulation scheme (as opposed to 9600 bps) offset the coding gains?" The answer was yes. Tests on power line channels yielded similar speech quality for both data rates. The simplicity of the lower rate technique suggests that it is the preferred choice. However, for BER > 0.02 it appears that 19200 bps is the preferred choice.  6.2 Future Work Future work towards voice over power line can be grouped into the areas of constructing a complete real-time system, advances in speech coding, and advances in error control coding. 70  The release of a single-chip VSELP voice codec announced in April 1993 for use in commercial digital cellular phones enables the construction of a complete real-time communication system. This chip contains the digital and processing components required for two-way voice communication, and was designed as part of a chip set. Adapting the present modem design to work with this chip would be straightforward. The most involved step of the adaptation would be de-interleaving the output from the chip. By replacing the microcontroller with a more powerful digital signal processor, the VSELP coding and modem control could be performed with a single chip. With the use of a single chip modem, a complete speech transceiver could be constructed with only a few chips. This hardware implementation would likely be time intensive because it involves re-implementing the VSELP algorithm. One other hardware option is to redesign the modulator/demodulators of the power line modems. If cellular phone standard, :7r/4 shifted differentially encoded quadrature phase modulation at 13200 bps was used, then the cellular phone VSELP coding chip could be used directly. This would include the FEC coding used for cellular phones. This would not be an optimal implementation, but it may be cost effective. Two schemes which may enable full duplex communication across power lines include using time division duplex or frequency division duplex to divide the power line channel into two synchronous channels. Experiments towards time division duplex were conducted by the author and this scheme was found workable with minor modifications to the modem transmitter circuitry. The frequency division alternative assigns different carrier transmission frequencies to each of the modems. Reed Solomon or BCH codes could replace the simple code repetition scheme used. Any coding gains would directly improve sound quality over noisy channels. An optimal scheme which could take 71  into account the bursty periodic errors, as well as graceful degradation of voice quality in the presence of errors would have to be determined. Voice coding algorithms are continually developing. Presently, voice coding chips with half the data rate of the VSELP chip have been proposed. These chips are still under development, but similar parameter sensitivity experiments could be conducted with these chips. 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Jayant, "High-Quality Coding of Telephone Speech and Wideband Audio," IEEE Communication Magazine, Vol 28, No. 1, pp 796-818, January 1990. [48] William R. Daumer, "Subjective Evaluation of Several Efficient Speech Coders," IEEE Transactions on Communication, Vol. 30, No. 4, pp. 655-62, April 1982. 77  [49] Alan Coleman et al., "Subjective Performance Evaluation of the RPE-LTP Codec for the PanEuropean Cellular Digital Mobile Radio System," in IEEE Global Telecommunications Conference (Globecom '89), Boston, MA, U.S.A., pp. 1075-79, 1989. [50] David J. Goodman and Carl-Eric W. Sundberg, "Quality of Service and Bandwidth Efficiency of Cellular Mobile Radio with Variable Bit-Rate Speech Transmission," IEEE Transactions on Vehicular Technology, Vol 32, No. 3, pp 211-16, August 1983. [51] Richard V. Cox, W. Bastiaan Kleijn and Peter Kroon, "Robust CELP Coders for Noisy Backgrounds and Noisy Channels," in International Confrence on Accoustics, Speech and Signal Processing, Glasgow, Scotland, pp. 739^2, 1989. [52]M.H. Khan et al., "Forward Error Control Coding for Mobile Communication Systems," in 38th IEEE Vehicular Technology Conference, Philadephia, Pennsylvania, U.S.A, pp 509-15, 1988. [53]Bishnu S. Atal, Vladimir Cuperman and Allen Gersho, Advances in Speech Coding. Boston: Kluwer Academic Publishers, 1991. [54]W.P. Lebanc, S. Hanna and S.A. Mahmoud, "Performance of a Low Complexity CELP Speech Coder Under Mobile Channel Fading Conditions," IEEE 39th Vehicular Technology Conference, Vol. 2, pp 647-51, 1989.  78  Appendix A Subjective Test I Instruction Sheet Subjective Test Instructions Thank you for taking part in this speech listening test. In this test you will be asked to subjectively rank the quality of various speech samples by assigning a score from 1 (poor quality) to 5 (good quality) for each sample.  Procedure 1. 2. 3.  4.  Review the good quality and poor quality references by using the computer menu or by pressing the 'g' or 'p' keys. Listen to the references as many times as you require to familiarize yourself. Listen to the speech sample by using the menu or by pressing the 's' key. Rate the speech sample from 1 to 5 using the menu or the keys ' 1 ' to ' 5 ' . Rate samples equal to or better than the good reference as 5. Rate samples equal to or worse than the poor reference as 1. Rate the other samples between 2 and 4 as you see fit. You may listen to the speech samples and the references as many times as required to make your rating. Repeat steps 1 & 2 until all the speech samples have been rated. It may be difficult to rank some samples, but please try your best. Thanks.  Rating Scale 5 - Equal or Better than "good" sample 4 - Slightly worse than "good" sample 3 - Significantly worse than "good" sample 2 - Slightly better than "poor" sample 1 - Equal or Worse than "poor" sample  79  Appendix B Subjective Test II Instruction Sheet Subjective Test Instructions Thank you for taking part in this speech listening test. In this test you will be asked to subjectively rank the quality of various speech samples by assigning a score from 1 (unacceptable quality) to 5 (excellent quality) for each sample.  Procedure 1. 2. 3. 4. 5.  Sit in front of computer with headphones on. Listen to the speech sample by pressing the 's' key or by using the menu. Determine the sample's sound quality value as per the "quality scale" below. You may listen to the speech sample as many times as required to make your rating. Record the sound quality value of the speech sample from 1 to 5 by pressing the keys ' 1 ' to ' 5 ' or by using the menu. Repeat steps 2 - 4 until all the speech samples have been rated. Sample selection and record of your rating will be performed automatically by the computer. It may be difficult to rank some samples, but please try your best. Thanks.  Quality Scale Value  Sound Quality  5  Excellent  4  Good  3  Fair  2  Poor  1  Unacceptable  80  Appendix C Firmware Listings Synchronous Communication Demo Program Written by Rick Dorbolo Aug. 1993 File: PLV009.ASM Written in Intel 8051 assembly code hardware addresses . equ PORT, 0 ; ascii characters . equ CR, h'OD equ LF, h'OA ESC, h'lB equ SYNCH, h'CC equ equ SYNCL, h'AA equ SOPKTH, h'9D equ SOPKTL, h'61 equ H_S0P1, h'37 equ H_S0P2, h'38 equ H_E0P1, h'a3 equ H_E0P2, h'a4 EVEN, h'02 equ equ ODD, h'Ol  .opde f .opdef .opdef .opde f .opdef .opdef .opde f .opde f .opde f  TX^BITS, PM_CLK, MOD_ENC, RELAY_CONTROL, DEC_OUT, CTS, CLK^SET, RTS, PARAM,  Pl.O Pl.l PI. 2 PI. 3 PI. 4 PI. 5 PI. 6 PI. 6 PI. 7  to modulator or encoder clock to set parameters modulator=l, encoder=0 1 = rx, 0 = tx from decoder to DTE set tx&rx clocks request to send* param{C2ClBlB0) shft reg  .opdef .opdef .opde f .opde f .opdef .opde f .opdef . opdef  TxD_DTE, RxD_DTE, RX„BITS, BIT__SYNC, BAUD_24, TX_DATA_CLK, SYNC_ASYNC, DCD,  P3.0 P3.1 P3.2 P3.3 P3.4 P3 .5 P3.6 P3.7  from DTE to DTE rx bits from demod bit synchronization baud X 24 to DTE sync or async data carry detect  ; DATA MEMORY assignments .segment .data .data .org 0x20 FLAG: . rs 1 . equ BAUDO, (FLAG - 0X20) + 0 . equ BAODl, (FLAG - 0X2 0) + 1 equ CI, (FLAG - 0X2 0) + 2  storage for flags  C2, . equ CODEC, . equ ESCAPED, . equ XEDOFF, . equ TEST, . equ FLAG2: .rs 1 (FLAG2 .equ M O D E DSTATE, . equ  transmit .equ .equ .equ  • org  -  0X2 0) 0x20) 0x20) 0x20) 0x20)  - 0x20) + 0 (FLAG2 0x20)  0=no; l=yes  0=no; l=yes (2*dclk) additional storage for flags 0=async/l=sync temp state flag  related constants and data BUF_SIZ, 40 XON^LMT, (BUF_SIZ * 1 / 4) XOFF_LMT, (BUF_SIZ * 3 / 4)  state: zeroes: buffer: dmemory: in_sr: invert: decoded: r_state: temp: sfrm_lth: sf_cntr: frm_reps: distance:  . code .org START: ajmp  (FLAG (FLAG (FLAG (FLAG (FLAG  . rs . rs . rs .rs . rs . rs . rs .rs . rs . rs . rs . rs . rs  1 1 BUF_SIZ 1 1 1 1 1 1 1 1 1 1  Subframe Length Current Subframe Number of subframes Random walk distance  0 INIT 0x40  INIT: ; set up stack pointer ; note: stack is only 32 bytes deep (0x60 to 0x7f) mov SP, #0x60 ; reset the bits that control the modem hardware mov A, OxFF mov PO, A mov PI, A mov P2, A mov P3 , A set up the 8051's internal counters to : integrate and dump counter for rx bits tl : used as baud rate generator for serial port in async operation mov TMOD, #b'00101101 mov TLO, #0 mov THO, #0 setb TRO ; turn on timer/counter 0 clr setb  RI ITl  bit sync in INTl  82  clr EA clr TI mov THl, #255 setb TRl mov s Enn_lth,#21 mov frm_reps,#1 mov distance,#10 setb CTS cpl CTS set up SCSI'S serial port mov SCON, #b'01010000 SBUF, #0 mov say hi to the dte DPTR, #hello mov acall puts clr A putch acall mov FLAG, #0x00 acall ch_baud mov r_.state, #8  disable all interrupts baud rate = 3 8.4 to host turn on timer 1  mode 1, rx enabled  send a zero to terminate the hello string 0 for C2C2BaudlBaudO  initialize by generating a sampling time 1 clock cycle beyond the present  reset up stack pointer note: stack is only 32 bytes deep (0x60 to 0x7f) mov SP, #0x60 TX_BITS clr send 0's to codec setb ITl bit sync in INTl clr lEl clear any previous edges setb RELAY^CONTROL CTS setb mov INVERT, #0 ; set to no invert acall delay ; wait for relay to settle jb RI, transmit Ijmp reset transmit mov clr cpl cjne acall cjne acall exit: ajmp  A, SBUF RI CTS A, #ESC, exit getch A, #'I', exi t cmdwait  ; get character ; clear indicator ; is it the escape character? ; yes, get another character is this one 'I'?  reset  This routine test bi-directional syncronization simple test routine for retrieving a byte from p-line and sending up to host (no codec)  83  ************************ Synchronization Routine  ^*******  Register bank utilization RO == input shift register Rl == sychronization state 0 == searching, 1 <--> 4 How many markers have been found R2 == loop counter variable R3 == result of correlation lookup R4 == last Marker R6.7 == non-differential decoded input bit R5 == syndrom of last Marker R7 == loop counter register .equ .equ  MARKER, b'OllOOlOl; DIFMKR, b'00100110;  *r * * * * *  This is the interframe marker This is the differential marker  *  Routine Istpkt  **************** pktlst: mov R1,#0 clr TX_BITS setb CLK_SET clr CLK__SET  Initialize Rl to zero ie. searching Send Zeros to codec Syncronize CODEC clock (somehow ?)  ;This initial part looks for the first synchonization flag SYl: ; Has the host send up a character jnb Rl, syl_rl ;get character acall getch ;Is it an initialize cjne A, #'l',syl_r2 ;Is r_state now 0 djnz r_state,syl_rl ; Yes it is, now reset ajmp init SY1__R2 : mov r_state,#4 SY1_R1: acall getbit mov A,RO mov R4,A mov DPTR,#covar move A,@A + DPTR mov R3,A anl A,#b'00111111 cjne a,#b'00100000,SYl mov A,R6 xrl A,#DIFMKR mov DPTR,#onebits move A,@A + DPTR  ;get the next bit from the powerline shift into A and RO ;store last marker in R4 ;search the correlation table for contents of A store correlation result in R3 check to see if byte is marker ? Have we found the Marker with no errors /determine correlation with differently encoded marker  84  an! A,#b'00001100 cjne A,#0,inverts mov invert,#0 s j mp SYA inverts: mov invert,#255  ;if correlation is 4 of getter assume not inverted ;is correlation result greater then 4 ;yes set invert to non invert  ;Set invert to invert  ;Now the initial marker has been found we can start to tx the first frame SYA: mov Rl,#l ;Start Rl off at 1 ajmp SYC ; Now go get frame  ******************* ******************* * get_frm Routine * s_get_fr:  acall acall acall acall acall acall  getbit getbit getbit getbit getbit getbit  Throw these away  s_g_f_c:  clr TX_BITS clr CLK SET  :Send Zeros to codec  ;Now we must try to resync, the next byte should be a Marker mov B,#b'00000000 ;Initial the DPSK state acall getbit  acall bytesimp mov A , R 0 mov R4,A mov A,R6 xrl A, #DIFMKR mov DPTR, #onebits move A,@A + DPTR anl A,#b'00001100 cjne A,#0,invt2 mov invert,#0 sjmp cont invt2: mov invert,#255  ;Get a bit for unknown reasons  ;store last marker in R4 /determine correlation with differently encoded marker  ;if correlation is 4 of getter assume not inverted ;is correlation result less then 4 ;Yes set invert to no invert  ;Set invert to invert  cont: mov A,R4  85  mov DPTR,#covar move A,SA + DPTR mov R3,A anl A,#b'00111111 cjne a,#b'00100000,SY4 inc Rl mov a,Rl cjne a,distance,SY3 dec Rl SY3: clr CTS mov SBUF,#'M' ajmp SYC  /search the correlation table for contents of A ;store correlation result in R3 ;check to see if byte is marker ? ;it is! now inc Rl upto 8 and go get next frame  ; DEBUG SEND CONSTANT TO HOST  SY4: mov A,R3 anl A,#b'00000011 ; mov R5,A cjne R5,#b'00000000,SY4A  ;The Marker has been corrupted! perform action specifed by table ;Store the syndrom in R5 ;Has a single error occured  ; Yes a single bit error has occure, let pretend it did't happen inc Rl ;it is! now inc Rl upto 8 and go get next frame mov a,Rl cjne a,distance,SY4AA dec Rl SY4AA: clr CTS mov SBUF,#'m' ; DEBUG SEND CONSTANT TO HOST ajmp SYC SY4A: dec Rl ;Reduce the sycnonization score cjne A,#b'00000001,SY5; See if Marker has been shift one to the left mov A,R4 ;It has. Now try to correct damage, start by placing marker into RO mov RO,A clr CTS mov SBUF,#'L' ; DEBUG SEND CONSTANT TO HOST cjne R1,#0,SYC_LEFT ajmp syn_rst  ;I guess sync has been lost go do bitwise search.  SYS: cjne R5,#b'000000010,SY6 ;Are we one bit ahead? acall getbit ;we are one bit ahead so get a bit to discard clr CTS mov SBUF,#'R' ; DEBUG SEND CONSTANT TO HOST cjne Rl,#0,SYC ajmp syn_rst SY6: clr CTS mov SBUF,#'S' cjne Rl,#0,SYC ajmp syn_rst  ;sync has been lost go do bitwise search. ;Assume then that the marker by corrupted but not shifted ;DEBUG SEND CONSTANT TO HOST  ;sync has been lost go do bitwise search.  . ********************* ;• ROUTINE GET FRAME *  86  »:*** + ***•*  ;This repeats code from SYC SYB ;NOTE changes in that code will have to be reflected here SYC_LEFT: ACALL GETBIT DEBUG TRY TO GET ANOTHER BIT jnb CODEC,SYClALEF Is Codec enabled acall delayll Yes, Wait for 19200 phase correction acall delayll acall delayll acall delayll SYCIALEF: jnb BIT^SYNC,SYCIALEF setb CLK^SET clr CLK_SET jnb CODEC,SY2„LEFT mov r7,#8 acall getbit  ;Wait for rising edge (for CODEC syncronization) ;Syncronize CODECS clock Is Codec enabled Yes, Get initializing first 9 half rate bits do not send to host. Decreasing r7 from 9 to 8 will force bitcodc to miss 2 bits and calling getbit bit will get one of them  SYCILEFT: acall bitcodc djnz r7,SYCILEFT acall getlbyte sjmp Sy2ALEFT  ;get the next byte ;Bypass non-codec medician  SY2_LEFT: acall get7bit  ;Get 7 bits  SY2ALEFT: mov R2,sfrm_lth mov sf_cntr,frm_reps sjmp SYD  ;Common Codec & non codec initialization stuff ;initialize the loop center ;Initialize subframe counter ;Rejoin Loop  SYC: ACALL GETBIT j n b CODECSYCIA acall delayll acall delayll acall delayll acall delayll SYCIA: jnb BIT^SYNC,SYCIA setb CLK_SET clr CLK_SET jnb CODEC,SY2 ; mov r7,#9 mov r7,zeroes  ;Get bits  DEBUG TRY TO GET ANOTHER BIT Is Codec enabled Yes, Wait for 19200 phase correction  ;Wait for rising edge (for CODEC syncronization) ;Syncronize CODECS clock Is Codec enabled Yes, Get initializing first 9 half rate bits do not send to host. Yes, Get initializing first zeroes half rate bits do not send to host.  SYCl: acall bitcodc djnz r7,SYCl  ;Get bits  SY2: mov sf_cntr, frm__reps  :Initialize subframe counter  87  Sy2A: mov R2,sfrm_lth SY2B: acall getlbyte SYD: mov SBUF, A SYE: cjne R2,#16,SYF mov a,state cjne a,#'r',SYF setb CTS  SYF: djnz R2,SY2B dj nz s f_cntr,SY2A jnb CODEC,SYG acall bitcodc clr TX__BITS SYG: ret  /initialize the loop confer ;get the next byte ;send the byte to host  ;Are we m state 'r' receive ;set the CTS line.  loop to get next byte We have just recieved a subframe loop to get next subframe Is Codec Enanbled ? Yes, Eat the following bits ;We have just received a frame and sent it to host  Recieve Subroutines  rx_m(Dd<g ; setb psw. 3 clr psw. 4 setb RELAY_CONTROL RI clr ret  ;Setup to modem for rx ;setup mC to use bank 01 for RO to R7  getbit smpl__sln: jnb lEl, smpl_sln mov A, TLO mov TLO, #0 lEl clr mov DPTR, #bit_tab A, @A + DPTR move rrc A mov a RO rrc a mov dmemory, A xrl a b mov RO,a mov b dmemory anl b #b'10000000 mov a dmemory rlc a mov a R6 rrc a mov R6,a  ;Get a bit from the powerline and place into RO and A  ;set relay to rx position  ;wait for falling edge ;read length of pulse ;clear counter ;clear edge indicator ;map sum into proper output ;bit in C, confidence in A ;place the next bit frm C into the shift register and A  decode store result in shift register Update state ;These lines store the non-encoded data in in_sr ;a shift register R6  ret getlbyte; mov R7,#8 byl: acall getbit jnb CODEC,byla xrl A,invert rlc A acall delayll mov TX_BITS,C mov c,DEC_OUT mov A,decoded rrc A mov decoded,A  acall getbit xrl A,invert rlc A acall delayll mov TX_BITS, C mov A,decoded sjmp byl3  ;Get a byte from the power line and place it in A, and RO.  ;Is the codec enabled ;Invert bit if required  ; Send the last bit to codec /place the decoded output into variable decoded  ;Invert bit if required  ;Send another bit to codec  byla: mov a,RO byl3: djnz r7,byl  ret  bitcodc:  ;This PROCEEDURE gets 2 bits from the powerline and places them ; into the codec.  acall getbit xrl A,invert rlc A acall delayll mov TX_^BITS,C mov c,DEC_OUT mov A,decoded rrc A mov decoded,A acall getbit xrl A,invert rlc A acall delayll mov TX^BITS, C mov A,decoded ret  /Invert bit if required /Timing Adjustment /Send the last bit to codec /place the decoded output into variable decoded  /Invert bit if required /Timing adjustment /Send another bit to codec  /End of bitcodc  89  bytesimp;  ;Get a byte from the power line and place it in A, and RO. ;Do not use codec  mov R7,#8 simp: acall getbit mov a,RO djnz r7,simp ret  ;Get next seven bits and place it in A and RO.  getVbit: mov R7,#7 byl2: acall getbit djnz r7,byl2 ret  ;Calling this PROCEEDURE produces an 11 machine cycle delay delayll: nop nop nop nop nop nop nop ret ; end of Proceedure delayll  Using the above scheme the prob of an false detect = 1/256 the prob of a second false detect is 2/156 + 16/256  ********************************* * BI-DIRECTIONAL TIMING DIAGRAM * ********************************* The CTS line tells the host which state the modem is in CTS LINE  1 0  modem action  TTTT sl23  Host action  TTT 123  TTRRRRR .... 22sl234  RRTT 22sl  TWWWWWWWRRRRR .... RRRT 2 12345 1121 1 890/  R T == Transmit R == Recieve W == Wait  90  i t * * * * * * * * * * * * * *  RECIEVE SECTION  ***************  Each frame is taken asyncroniously from the host and buffered  CTS LINE  1 ... 0 SENT BY HOST 1 2 3 4 5 20 21 RX BY MODEM FR HOST 1 2 3 4 19 20 21 SEND BY MODEM SSSSSS111111222222333333444444. 1999200021111 RI line  1 XXXXX 0 XXXXX-  using registers:  RO - input pointer Rl - output pointer & byte number R2 R3 R5 R6 ~ generic loop counter R7 - bit counter syn_rst: ; reset up stack pointer ; note: stack is only 32 bytes deep (0x60 to 0x7f) mov SP, #0x60 jnb CODEC,syn_rsta mov DPTR,#c_enbld acall puts sjmp syn_rstb syn_rsta: mov DPTR,#c_dnbld acall puts syn_rstb: mov DPTR,tparamets acall puts mov a,s frm_lth acall putch mov a,frm_reps acall putch mov a,di s tance acall putch  Echo frame length parameter Echo Subframe Parameter Echo Max Random walk distance  ; Echo Baud rate and Codec Info mov DPTR, #bdegu acall puts mov A, FLAG acall putch mov a,state cjne a,#'a',s_rstl ajmp syn_a s_rstl: cjne a,#'b',s_rst2 ajmp syn_b  Are we m  state a  Are we in state b  91  s_rst2 cjne a,#'r',s_rst3 ajmp syn_r s_rst3 ajmp syn_s  syn_a: mov DPTR,#slook_a acall puts acall tx_mode acall syncro acall send_frm acall rx_mode mov Rl,#1 loop_a acall rx_mode acall s_get_fr acall tx_mode acall send_frm ajmp .oop_a  syn_b: mov DPTR,#slook_b acall puts acall rx_mode acall delay acall delay acall rx_mode acall pktlst loop_b acall tx_mode acall send_fnn acall rx_mode acall s_get„fr ajmp loop_b syn_r: mov DPTR,#slook_r acall puts acall rx_mode acall delay acall delay acall rx_mode acall pktlst loop_r: acall s_g_f_c jnb RI, syn__rl acall getch cjne A, #'I',syn_r2 ;;; dec r_state djnz r_state,syn_rl ajmp init  Are we in Continous Receive Syncronous mode  We must be in Continous Send Syncronous Tx mode  Tell host seaching for Marker Send a syncro and get a next frame  Start Rl off at 2 for debuggin  Tell host seaching for Marker This should get rid of any bit txed for host  6=8  cycles  Tell host seaching for Marker  Has the host send up a character get character Is it an initialize Yes, now increase r_state Is r_state now 0 Yes it is, now reset  syn_r2: mov r_state,#4 syn_rl: ajmp loop_r  92  syn_s : mov DPTR,#slook_s acall puts jnb CODEC,syn_s„b mov DPTR,#c_enbld acall puts sjmp syn„s_.c  ;Tell host in Continus send mode  syn_s_b: mov DPTR, #c__drLbld acall puts syn_s_c : acall tx_mode loop_s: acall s_s_f_c clr cts ajmp loop_s  s_s_f_c: setb CTS ajmp frm_srt  Turn on flow, you now have 8/34k seconds to read next Character Send a frame  send_frm: setb CTS wbla: jnb TX_DATA_CLK, wbla setb TX_BITS wblb: jb TX_DATA_CLR,wblb wb2a: jnb TX_DATA_CLK, wb2a clr TX_BITS wb2b: jb TX_DATA_CLR,wb2b  frm_srt: mov a,#buffer add a,sfrm_lth mov RO, a mov Rl, a mov sf_cntr,frm_reps clr RI setb MOD^ENC clr B  ;Turn on flow, you now have 8/34k seconds ;to read next Character ;send a 1 bit over the line ;wait for high  ;wait for low  ;send a 0 bit over the line ;wait for high  ;wait for low  Set input pointer to beginning data Set output pointer to beginning of data Start subframe counter with aprropriate number of frames Empty discard any late bytes so as to ensure starting at start of frame ByPass encoder for Flag Clear DPSK memory ; Send a 0 to start with  acall fill_buffer mov a,# 0 zerol: jnb TX_DATA_CLK, zerol xrl A,B  ;wait for high /Differential Encode Bit  93  rrc A mov TX_BITS, C mov B.0,C zero2: jb TX_DATA_CLK, zero2  sendsync: mov A, #101 mov R7, #8 acall fill_buffer  stxsubl: jnb TX_DATA_CLK, stxsubl  ;move next bit to carry ;output the bit /Store the output B.O  ;wait for low  :1st character to tx is FLAG :initialize R7 for an 8 bit byte  ;wait for high  xrl A,B  ;Differential Encode Bit  rrc A mov TX^BITS, C mov B.0,C  ;move next bit to carry ;output the bit ;Store the output B.O  Stxsub3: jb TX„DATA_CLK, stxsub3 acall fill_buffer djnz  R 7 , stxsubl  ;wait for low ;try to fill buffer after each bit ;go do the next bit  ; Flag sent ;Send a 0 after flag acall fill_buffer mov a,#0 zero3: jnb TX_DATA_CLK, zeroB xrl A,B rrc A mov TX_BITS, C mov B.O,C  ;wait for high /Differential Encode Bit ;move next bit to carry /output the bit /Store the output B.O  zero4: jb TX_DATA_CLK, zero4  /wait for low  j nb CODEC,txbpas1 /Is Codec Enabled clr TX_BITS /Yes, Wait one full rate bit txwaitl: jnb TX_DATA_CLK, txwaitl /wait for high txwait2: jb TX_DATA_CLR,txwait2 /wait for low  94  ; Activate Codec if required txbpasl: mov A,@R1 dec Rl jnb CODEC,loopbyte setb CLK^SET clr CLK„SET clr MOD_ENC sjmp loopbyte loop_s_f: mov a,#buffer add a,s frm_lth mov Rl, a mov A,@R1 dec Rl  loopbyte: mov R7, #8 acall fill_buffer  loopbit: jnb TX_DATA_CLK, loopbit jb CODEC,txsub2 txsublb: xrl A,B txsub2: rrc A mov TX_BITS, C mov B.0,C txsubS : jb TX_DATA_CLK, txsub3 acall fill„buffer jnb CODEC, txsub4 txsubSa: jnb TX_DATA_CLK,txsub3a  ;Get 1st byte ;decrease the output pointer ;Are we using the encoder ? ;Yes, Enable CODEC clock and sync it ;enable CODEC  Set output pointer to beginning of data Get 1st byte decrease the output pointer  :initialize R7 for an 8 bit byte  ;wait for high ;ls the CODEC disabled ? ;Yes, Differential Encode Bit ;move next bit to carry ;output the bit ;Store the output B.O wait for low try to fill buffer after each bit Are we using the CODEC  ;Yes CODEC in place now wait ;for another high  acall fill_buffer txsubSb: jb TX_DATA_CLK,txsub3b  ;Wait for a low  txsub4: djnz  ;go do the next bit  R7, loopbit  At this point check to see wether or not to turn on flow from host this should occure if 1 - We have just txed 2nd from last byte of subframe 2 - We are not transmitting the last subframe of a frame cjne Rl,#buffer+2,txsub4a2 djnz sf_cntr,txsub4al ajmp txsub4a2  1 - Have we just Txed 2nd last byte 2 - Are we on the last subframe We have not enabled flow. Continue  95  txsub4al: ; We have just txed 2nd last sub-frame now turn on flow and reset ; buffer input pointer setb CTS mov a,#buffer add a,s frm_lth mov RO, a txsub4a2: mov A,@R1 dec Rl cjne Rl,#buffer-1,loopbyte  inc sf_cntr djnz sf_cntr,loop_s_f  Set input pointer to beginning data  Get next byte decrease the output pointer have we reached the end of the frame buffer ? Yes we have, now get ready to send next subframe or frame Are we done frame ? ;Yes, finish up frame  txsub4a4: jnb CODEC,txsubS mov R7,zeroes txsub4a: acall s_0_cd djnz R7,txsub4a txsu±)5 : ret  ;Is Codec Enabled ? ;Yes, Send half rate zero bits  ;Frame sent  ************************** * Subroutine FILL_BUFFER * t * * * * * * * fill_buffer: mov temp,a jb Rl, step4 ret  step4: mov a,SBUF clr Rl mov ®R0,a cjne a, #'I',step4a dec r_state djnz r_state,steps ajmp init step4a: mov r_state,#8 steps: cjne RO,#buffer+1,step6 clr CTS mov a,temp ret step6: dec RO mov a,temp ret  ;store a for deration of subroutine ;Is there a character waiting ;No, then return .. this better ;not happen getting 1st character  ;put character into buffer and A ;reset character waiting flag Is it an initialize Yes, now increase r_state Is r_state now 0 Yes it is, now reset  ;Last Character was not ;an I so reset r_state ;Is the buffer full to end of subframe/frame ? ;Yes it is. So stop flow ;Yes it is. So return ;reduce input buffer pointer ;return to pre-subroutine state  96  Subroutine tx_mode  tx__mode: clr RELAY_CONTROL clr psw.3 clr psw.4 setb MOD_ENC  1 1 1 1  ret  cycle set relay to Tx position cycle Select register bank 00 cycle cycle bypass encoder  2 cycles 6 = total cycles  t * * * * *  ************************************  *  * Subroutine syncro - send a syncronization burst t * * * * * * * * * * * ^  **************^  syncro: mov R6, #10  initialize loop to send 10 '10101010' bytes  syncrol: mov R7, #8 mov A, #h'AA syTXCro2 : jnb TX_DATA_CLK, syncro2 rrc A mov TX BITS, C  ; initialize R7 for an 8 bit byte ;put 10101010 symbol into A ;wait for high ;move next bit to carry ;output the bit  syncro3: jb TX_DATA„CLK, syncro3 djnz R7,syncro2 djnz R6,syncrol  wait for low go do the next bit have we send the 10 bytes  ret  *  r  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  r * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *  Proceedure s_0_cd - send a zero to codec for a half rate bit * t * * * * * * * * * * * * * * * * * *  r  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  S_0_cd: acall fill_buffer  s_0„a: jnb TX_DATA_CLK, s_0_a mov b,# 0 clr TX^BITS s__0_b: jb TX_DATA_CLK, s_0_b acall fill_buffer  ;wait for low ;try to fill buffer after each bit  s__0_c: jnb TX_DATA_CLK,s_0_c  ;wait for another high  wait for high Clr the DPSK memory Send a zero to codec  97  *  *  acall fill_buffer s__0_d: jb TX_DATA_CLK,s_0_d ret  ;Wait for a low  ; End of s_0_cd  ********************** * Barry's Subroutines **********************  wait for commands: ESC to initialize the modem, anything else to run the modem '\xOO' is ignored mov A, #CR cmdwait: echo acall getch acall toupper acall Ijmp chksync cjne A, #'?' chkquest DPTR, #helpinfo mov puts acall cmdwait sjmp chksync: cjne A, #'S', chkq acall getch acall toupper cjne A,#'A',chksynl mov state,#'a' mov DPTR,#init_a_m acall puts Ijmp syn_rst chksynl: cjne A,#'B',chksyn2 mov state,#'b' mov DPTR,#init_b_m acall puts Ijmp syn_rst chksyn2: cjne A,#'R',chksyn3 mov state,#'r' mov DPTR, #init_r_m acall puts Ijmp syn_rst  send out a <CR><LF> wait for a character convert to upper case TEST line jump right away to sync chksync  Are we in mode A Yes we are in mode A Tell host mode a is initiated  Are we in mode B Yes we are in mode B Tell host mode B is initiated  Are we in mode R Yes we are in mode R Tell host mode R is initiated  chksynS: ;We must be in mode S mov state,#'s' mov DPTR,#init_s_m acall puts Ijmp syn_rst  ;Tell host mode S is initiated  98  chkq: cjne A,#'Q',chkk acall getch mov sfrm_lth,a acall getch mov frm_reps,a acall getch mov distance, a Ijmp cmd_ret  chkk: mov acall acall sjmp chkb: acall mov acall mov acall sjmp chkp: mov acall mov acall Ijmp chkv: mov acall ajmp chkz: Ijmp cmd_ret:  cjne A, #'K',chkb DPTR, #kprompt puts getword cmdwait cjne A, #'B', chkp getch FLAG, A getch zeroes, A ch_baud cmdwait cjne A, #'P', chkv DPTR, #bdequ puts A, FLAG putch cmdwait cjne A, #'V', chkz DPTR, #version puts cmdwait cjne A, #'Z',cmd_ret INIT ret  ch_baud; mov clr setb mov mov clr setb mov mov clr setb mov mov clr setb ret  mov C, C2 PARAM, C PM_CLK PM_CLK C, CI PARAM, C PM^CLK PM__CLK C, BAUDl PARAM, C PM_CLK PM_CLK C, BAUDO PARAM, C PM^CLK PM CLK  send 02 to codec  send CI to codec  send BAUDl to mux  send BAUDO to mux  CODEC bypass set by host  puts Prints the zero terminated string pointed to by DPTR to the DTE.  99  puts : move inc jz acall s jmp cpl ps2:  clr A, @A DPTR ps2 echo puts CTS ret  A DPTR  get next character advance pointer jump out if end-of-string send out characters do it again Toggle CTS to see if it works  putch Prints the character in A to the DTE.  putch: clr mov ret  jnb TI, putch TI SBUF, A  wait for transmit buffer empty clear interrupt flag send character  echo Prints the character in A to the DTE expanding <cr> to <cr><lf>.  echo: cjne mov acall mov echol:  acall putch A, #CR, echol A, #LF putch A, #CR ret  send the character check for cr if so, send a If restore A (A was CR)  getch Waits for a character from the DTE then gets it and returns it in A.  getch: clr mov cpl ret  jnb RI, getch RI A, SBUF CTS  loop until receive buffer is full clear receive interrupt flag get received character  printword Prints the word pointed to by RO. Note that MSByte is stored in the byte pointed to by RO and the LSByte is stored in the byte pointed to by RO+1.  printword: acall inc mov acall ret  mov A, SRO printbyte RO A, @R0 printbyte  get MSByte print it point to LSByte get it print it  toupper Converts the letter in A to upper case.  100  toupper: jc cjne jnc add tul:  compare quit if compare jump if convert  cjne A, tul A, #'z' H , • + 3 tul A, #'A' 'a' ret  with 'a lower with 'z higher  getdigit Reads a single hex digit from the serial port. A. C will be set if CR was pressed.  getdigit: acall cjne setb ret notcr: jc cjne jnc acall add s jmp gdl: jc cjne jnc acall add gd2: ret  read a character convert to upper case check for CR return with C set  acall getch toupper A, #CR, notcr C c^ne A, #'0' getdigit A, f 9 ' + l , ' + 3 gdl echo A, #-'0' gd2 cjne A, #'A' getdigit A, #'F'+1, getdigit echo A, #-'A'+10 clr C  Returns the value in  •+ 3  try again if < '0' try for letter if > '9' display subtract offset •+ 3  ; try for a letter ch is < 'A' ch is > 'F' display subtract offset return with C clear  getbyte Reads a 2 digit hex number from the serial port. A. C will be set if CR was pressed.  getbyte: acall 3C mov acall jc xch swap orl clr ret gbl: ret  mov B getdigit gbl B, A getdigit gbl A, B A A, B C mov  A  #0  Returns the value in  assume 0 try to get a digit jump out if CR pressed store in B try to get a digit jump out if CR pressed combine two bytes  return with C clear retreive partial result return (C set)  getword Reads a 4 digit hex number from the serial port. Stores the value at the location pointed to by RO. Note that the MSByte is stored at the low address.  101  getword: clr A clear out the value mov @R0, A inc RO mov @R0, A ; initialize digit counter mov B, #4 ; read a digit gwl: acall getdigit ; get out if CR was pressed jc gw3 now we must shift the 2 byte value left by 4 bits and combine xch A, SRO swap A xch A, @R0 xchd A, @R0 dec RO xch A, @R0 swap A xch A, @R0 xchd A, @R0 inc RO djnz go do the next digit B, gwl gw3: ret delay Delays execution by "512 clock cycles. Destroys RO.  delay: dl: ret  mov djnz  RO, RO,  #0 dl  " CONSTANT STRINGS * i  r  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  -  *  hello: version:  • db  .db  "19200 BPS Intra-Building Power Line Modem (PLV009DEMO, OCTOBER, 1993)\r\0" "Intra-Building Power Line Modem (PLV009DEMO, OCTOBER 1993) \0"  kprompt:  .db  "Enter start of packet pattern> \0"  bdequ:  .db  "\rBAUD = \0"  helpinfo: .db .db .db .db .db .db .db .db  .db "\rB "\rP "\rS "\rQ »\r? "\rZ "\rESC •\r\0"  slook a: slock b:  .db .db  "\rl9200 BPS Intra-Building Power Line Modem. Command Summary" Enter baud rate" Print baud rate" Enter sync word" Print user settable paramters" Print help info" Initialize" I - User mode"  "Sync-Lost h=a \0" "Sync-Lost h=b \0"  102  o -• 3  ^ 01 ^i Q  H- n rr '^ tn ..  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S> rr  H3 Hrt H(11 rf (H (5 & 0.  =  o o o o  tri Ir^ 0 0 m 01 r t rr p- 3II II m n ^ o  ^ o  = =  db db db db db db db db db db db db db db db db db db db db  3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,  4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,  4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5,  e. 4, 5, 5, 6, 5, 6, 6, 7,  5 6 6 7 4 5 5 6 5 6 6 7 5 6 6 7 6 7 7 8  ; ; ; ; ; ; ; ; ; ; • ; ; • ; ; • • • •  (176, (180, (184, (188, (192, (196, (200, (204, (208, (212, (216, (220, (224, (228, (232, (236, (240, (244, (248, (252,  177, 181, 185, 189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233, 237, 241, 245, 249, 253,  178, 182, 186, 190, 194, 198, 202, 206, 210, 214, 218, 222, 226, 230, 234, 238, 242, 246, 250, 254,  179) 183) 187) 191) 195) 199) 203) 207) 211) 215) 219) 223) 227) 231) 235) 239) 243) 247) 251) 255)  This is a table of the values to be output to port 1 according to the number o f bits in the early+late values. Bit 4 gives the decoded bit value and bits 3..0 give the confidence value, bit 6 is set to one so that pi.6 can be used as an input port note that we go up to 26 because the bit sync can move to 25 samples bit„tab: .db .db .db .db .db .db .db .db • db  .db .db .db .db .db .db .db .db .db .db .db .db .db .db .db .db .db .db .db  (12 « 1) f 0 (11 « 1) f 0 (10 « 1) + 0 (9 << 1) + 0 (8 << 1) + 0 (7 << 1) + 0 (6 << 1) + 0 (5 << 1) + 0 (4 << 1) + 0 (3 << 1) + 0 (2 << 1) + 0 (1 << 1) + 0 (0 << 1) + 0 (1 << 1) + 1 (2 << 1) + 1 (3 << 1) + 1 (4 << 1) + 1 (5 << 1) + 1 (6 << 1) + 1 (7 << 1) + 1 (8 << 1) + 1 (9 << 1) + 1 (10 « 1) + 1 (11 « 1) + 1 (12 « 1) + 1 (12 « 1) + 1 (12 « 1) + 1 (12 << 1) + 1  ; number o : ones = 0 ; number o E ones = 1 ; number o E ones = 2 number of ones = 3 number of ones = 4 number of ones = 5 number of ones = 6 number of ones = 7 number of ones = 8 number of ones = 9 number of ones = 10 number of ones = 11 number of ones = 12 number of ones = 13 number of ones = 14 number of ones = 15 number of ones = 16 number of ones = 17 number of ones = 18 number of ones = 19 number of ones = 20 number of ones = 21 ; number of ones = 22 ; number of ones = 23 ; number of ones = 24 ,- number of ones = 25 ; number of ones = 26 ; number of ones = 27  The number of bits in the early+late values. Bit 4 gives the decoded bit value and bits 3..0 give the confidence value. This table is used for interleaving, ie. when the preamble is sent  104  ; at half of the bit ; Note that we go up bit_tab_2 .db 24 << 1 + 23 << 1 + .db 22 << 1 + .db .db 21 << 1 + 20 << 1 + .db • db 19 << 1 + .db 18 << 1 + 17 << 1 + .db 16 << 1 + .db 15 << 1 + .db 14 << 1 + .db .db 13 << 1 + .db 12 << 1 + .db 11 << 1 + .db 10 << 1 + .db 9 << 1 -f8 << 1 + .db 7 << 1 + .db 6 << 1 + .db .db 5 << 1 + .db 4 << 1 + .db 3 << 1 + .db 2 << 1 + .db 1 << 1 + .db 0 << 1 + .db 1 << 1 + 2 << 1 + .db 3 << 1 + .db .db 4 << 1 + .db 5 << 1 + .db 6 << 1 + 7 << 1 + • db .db 8 << 1 + .db 9 << 1 + .db 10 << 1 + .db 11 << 1 + .db 12 << 1 + .db 13 << 1 + .db 14 << 1 + .db 15 << 1 + .db 16 << 1 + .db 17 << 1 + .db 18 << 1 + .db 19 << 1 + .db 20 << 1 + .db 21 << 1 + .db 22 << 1 + .db 23 << 1 + .db 24 << 1 + .db 24 << 1 + .db 24 << 1 + .db 24 << 1 + .db 24 << 1 + .db 24 << 1 + .db 24 << 1 +  ra -e. It is similar to to 52 because the bit s 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1  number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number number  of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of  ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones ones  =0 =1 =2 =3 =4 =5 =6 =7 =8 =9 = 10 = 11 = 12 = 13 = 14 = 15 = 16 = 17 = 18 = 19 = 20 = 21 = 22 = 23 = 24 = 25 = 26 = 27 = 28 = 29 = 30 = 31 = 32 = 33 = 34 = 35 = 36 = 37 = 38 = 39 = 40 = 41 = 42 = 43 = 44 = 45 = 46 = 47 = 48 = 49 = 50 = 51 = 52 = 53 = 54  sync is detected if 0, 1, 2, 3, 13, 14, 15, or 16 bits match sync word  105  sync_ok: .db 1,  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16  ; 0:too many errors, 1:0 or 1 error, 2:0 or 1 error but data inverted data_ok: .db 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16  This table gives the correlation of the input to the number 'bOOOO 1101 The table format is SNVVWOO 0/1 = Noninvert/Invert Where S Not used N value of correlation 0 <--> 8 W W 00 = No Rotation Suggested 00 01 = Left Rotation Suggested 10 = Right Rotation Suggested 11 = More then one error. Rotation unadvised Nov 16,1992 With the introduction of DPSK the S field is not longer used New DPSK flag is the 101 decimial  covar: .db b' 00010011 00010111 .db 00001111 .db 00010011 .db 00010111 .db 00011011 .db 00010011 .db 00010111 .db 00001111 .db 00010011 .db 00001011 .db 00001111 .db 00010011 .db .db b' 00010111 .db b' 00001111 .db b' 00010011 .db b' 00001111 .db b' 00010011 .db b' 00011011 .db b' 00001111 .db b' 00010011 .db b' 00010111 .db b' 00001111 .db b' 00010011 .db b' 00001011 00001111 .db 00000111 .db .db b' 00001011 .db b' 00001111 00010011 .db 00001011 .db  106  CL  Ch Ch Q4 Oa Ch Ch \  B & ^ & ix 9 ^ i  o o o  & & & & & & & & & & & & & & & & & & & & & & & & & & & & g= g^ & & & & & & & & & & & & i & & & &  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 O k-" H' H • H'OHH-'H'h-'MI-'HI-^l-'l-'h-'l-'hJh-'' OH'h-'OI-'l-^OF-'f-'H'l-'l-'M H'l-'l-'h-'l-'OI-'l-' h - ' O l - ' O O M O O f - ' O O O O I - ' O H O O h - ' O H M O O M O O I - i O O I - J I - ' O I - ' O M I - i O M I - ' O O O h - ' O O H ' O O I - ' O O M H ' O O H O I - ' H O O O h - ' O O K ' O O h - ' H O t - ' O O M O M I - J O l - ' O O I - ' l - ' O O I - ' O H ' O h - ' O O h - ' O i - ' H ^ O O i_i l_i 1 ^ l_i H* W H* H H M I M l-J (-" H* M h-- O M h-' O h-* h-' h"' I (_i f ^ 1 ^ l_i H' H" H W M M O M M h-^ H' 0  o  0 0 0  j_i  0 0 0  1^  0 0 0  0 0 0  l_i  0 0 0  t_i  0 0 0  0 0 0  0 0 0  O H ' M O I - ' M O l - ' t-^ O f-" O O h-' K t - ' O M M M h - ' M H ' M O M I  .db b '00001111 .db b '00010011 .db b '00010111 • db b'00001111 .db b '00010011 .db b '00011011 .db b '00011100 .db b '00010111 .db b '00011011 .db b '00011100 .db b '00100000 .db b '00011011 .db b '00011100 .db b '00010111 .db b '00011011 -db b '00010011 .db b '00010111 .db b '00011011 .db b '00011100 .db b '00010111 .db b '00011011 .db b '00010111 .db b '00011011 .db b •00011011 .db b •00010111 .db b'•00011011 .db b'•00011100 .db b'•00010111 .db b''00011011 .db b' 00010011 .db b' 00010111 .db b' 00001111 .db b' 00010011 .db b' 00010111 .db b' 00011011 .db b' 00010011 .db b' 00010111 .db b' 00001111 .db b' 00010011 .db b' 00001011 .db b' 00001111 .db b' 00010011 .db b' 00010111 .db b' 00001111 .db b' 00010011 .db b' 00001011 .db b' 00001111 .db b' 00011011 .db b' 00011011 .db b' 00001111 .db b' 00010011 db b' 00001011 db b' 00001111 db b' 00001011 db b' 00001111 db b' 00011011 db b' 00001011 db b' 00001111 db b' 00010011 db b' 00001011  108  Oi a a a & & tr tr & tr & tr & tr 0&i tr tr trtrcrtr&&5^F&FFcra'&5^trtrFtrtrcr&&&tr5^&crtrb^ crcrcro'crtrD'trcra'cra'a'trtrcrcrcrcrcrtTa'trcrtrtrtrD'crcrtrtrD'trcrD'trt^ o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o OH^Of-'MMh-'Mf-^HH'f-'l-'MH'HI-'t-'HOOKOOMOO MMOH'l-^OOMOMh^' l_.^_l^_'l-'00ooooooo OOh-'H^Ht-'OOf-'OI-'' O O M f - ' O M M h - ^ l - ' i - ' O I - ' O O I - ' K O i - ' O I - ' O O h - ' W O O O M O O M O O M O t - '  8^  OOh-'OOh-'Oh^OOOt-'OOl-'OOt-'OMOOI-'OOI-'OOOMOOOOOOl-' l_l^^l_i|_l^->[_l^_l|_l|_l t-'h-'Hl-^H^I-'l-'h-^l-'MMt-'MOf-'l-il-'l-J H H» H^ K I  o  O O H^ O M OMOOt-^MOOI-'OOt-^OOI-'HOh-^OOMI-'  .db b '00001111 .db b '00010011 .db b '00010111 .db b '00001111 .db b '00010011 .db b '00001011 .db b '00001111 .db b '00011010 .db b '00011010 .db b '00001111 .db b '00010011 .db b '00001011 .db b '00001111 .db b '00010111 .db b '00011011 .db b '00010011 .db b '00010111 .db b '00011011 .db b'•00011100 .db b''00010111 .db b''00011011 .db b''00010011 .db b''00010111 .db b' 00011011 .db b' 00011011 .db b' 00010111 .db b' 00011011 .db b' 00010011 .db b' 00010111 .db b' 00010011 .db b' 00010111 .db b' 00011011 .db b' 00010011 .db b' 00010111 .db b- 00011011 .db b' 00010011 • db b'00010111 • db b '00001111 .db b' 00010011 db b' 00001011 db b' 00001111 db b' 00010011 db b' 00010111 db b' 00001111 db b' 00010011  . end  START  110  Appendix D Schematic Diagrams  111  i  -R' 0000  OODO  ^„00  ff\ ffi|,. r\'.  nwoN  Pin  HI  , I I I I Ttrt  Hi"  .<hSm' Ci D S O M ID  53SS58 gSSSSSS dd PI * » T- O  As A  *  12  i  


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