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A new power line modem and its performance in power line channels Zhong, Tao 1996

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A NEW POWER LINE MODEM AND ITS PERFORMANCE IN POWER LINE CHANNELS by TAO ZHONG B.Sc, Shanghai Jiao Tong University M.Sc, Simon Fraser University A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE in THE FACULTY OF GRADUATE STUDIES DEPARTMENT OF ELECTRICAL ENGINEERING We accept this thesis as conforming to the required standard THE UNIVERSITY OF BRITISH COLUMBIA May 1996 © Tao Zhong, 1996 In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of British Columbia, I agree that the Library shall make it freely available for reference and study. I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the head of my department or by his or her representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission. Department The University of British Columbia Vancouver, Canada DE-6 (2/88) Abstract Intrabuilding electrical power supply lines provide readily accessible communication links. The Hot and Neutral lines in power line cable are used as the transmission channel in most power line communications scenarios. The Hot-Neutral is a hostile communication channel with high noise, high signal attenuation, changing impedance and signal fading. To avoid these difficulties, the Neutral-Ground channel is proposed and tested. Using Neutral-Ground channels in power line communication has advantages of lower attenuation, reduced impulse noise, higher input resistance, less signal fading, and more stable links. Neutral-Ground channels are viable as communication links when the transmitter-receiver separation is large enough to cause excessive signal attenuation for Hot-Neutral links and are recommended as the transmission channels in power line communications wherever possible. A power line modem was designed and developed. The modem was built around an untested prototype Binary Phase Shift Keying (BPSK) modulation and demodulation VLSI chip. The modem is supervised and controlled by a microcontroller. The firmware offers robust modem parameter control and data link control. The power line modem was tested on Hot-Neutral and Neutral-Ground channels. The modem BER is reasonably close to that determined assuming a white Gaussian noise channel. Using Neutral-Ground channels enables power line communications over wider distances with less transmitting power than when Hot-Neutral channels are used. Communications in Neutral-Ground are not affected by either the power line phases of the transmitter and receiver or by electric loads on power lines. Using an appropriate communications protocol, the modems successfully transferred large files from one computer to another via in-building poxyer line links. ii Table of Contents Abstract ii List of Tables vii List of Figures viii Acknowledgment xi Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Background and Objectives 2 1.3 Thesis Outline 3 Chapter 2 Transmission Media: Power Line 4 2.1 Electrical Power Networks and Wiring Plans 4 2.1.1 Electrical power supply networks 4 2.1.2 In-building wiring plans 5 2.1.3 Ground 7 2.2 Characteristics of Hot-Neutral Channel 9 2.2.1 Attenuation 9 2.2.2 Noise 9 2.2.3 Signal fading 10 2.3 Neutral-Ground as a Communication Channel 10 2.3.1 Circuit loop in Neutral-Ground channel 11 2.3.2 Attenuation analysis for Hot-Neutral and Neutral-Ground 13 2.3.3 Cross phase communication 15 2.4 Summary 15 iii iv Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 17 3.1 Noise 17 3.2 Signal and Noise Spectra 21 3.3 Attenuation 24 3.4 Fading and Impedance 26 3.5 Summary 27 Chapter 4 Hardware Design and Implementation 29 4.1 Overall Design 29 4.1.1 Overall modem design considerations 29 4.1.2 Transmitter 31 4.1.3 Receiver 32 4.1.4 Control of the modem 32 4.2 BPSK Digital VLSI Chip 33 4.2.1 Chip overview 33 4.2.2 Pin assignments 35 4.2.3 Clocks and parameters 36 4.3 Hardware Implementation 38 4.3.1 Microcontroller pins 38 4.3.2 Digital circuits 39 4.3.3 Analog circuits of receiver 42 4.3.4 Analog circuits of transmitter 43 Chapter 5 Firmware Design and Implementation 45 5.1 Overall Design 45 V 5.1.1 Open Systems Interconnection 45 5.1.2 Dataflow 46 5.1.3 Overall design of firmware 47 5.2 Transmit Module 48 5.2.1 Functions of the transmit module 48 5.2.2 Preamble 49 5.2.3 Transmit module flow chart 50 5.3 Receive Module 51 5.3.1 Receive module functions 51 5.3.2 Flow chart of receive module 52 5.4 Initialization and Command Modules 54 Chapter 6 Test Results 56 6.1 Receiver Waveforms 56 6.1.1 Analogue to digital conversion 56 6.1.2 Waveforms on BPSK chip 58 6.2 Theoretical BER Analysis in White Noise 59 6.2.1 BER of an optimum BPSK demodulator in white noise 60 6.2.2 BER of BPSK with a hard limiter 60 6.3 BER Performance of the Modem 63 6.3.1 BER and BLKER measurement procedure '. 64 6.3.2 Bit error rate 65 6.3.3 Block Error Rate '. 68 6.4 Comparisons of BER in Two Channels 70 6.4.1 Test sites 70 6.4.2 BER and BLKER at different receiving sites 71 6.4.3 BER versus transmitting power 74 6.5 Software Testing 76 6.5.1 Carrier sensing 76 6.5.2 File transfer 77 6.6 Summary 79 Chapter 7 Conclusion 80 7.1 Summary 80 7.2 Future Work 81 Glossary 83 Bibliography 84 Appendix A. BPSK Chip Pin Layout 89 List of Tables Table 1.1 Comparisons of common in-building communications media 1 Table 3.1 Signal attenuations in EE building, Neutral-Ground channel; transmitter was on forth floor, room 458 24 Table 3.2 Summary of comparisons between Not-Neutral and Neutral-Ground channels ...28 Table 4.1 Pin assignment of the BPSK chip 35 Table 4.2 Carrier frequency control (14.2556 MHz clock) 37 Table 4.3 Bit rate control (4.9152 MHz clock) 37 Table 4.4 Pin description for the 80C31 controller 38 Table 5.1 Commands used in command module 54 vii List of Figures Figure 2.1 Residential power delivery scheme (modified from [9]) 6 Figure 2.2 Commercial/Industrial three-phase power delivery scheme (modified from [9])....7 Figure 2.3 An example of Neutral-Ground channel 11 Figure 2.4 Analysis of Neutral-Ground channel 12 Figure 2.5 Circuit loop of in phase Hot-Neutral channel 13 Figure 3.1 Block diagram of test circuit 17 Figure 3.2 Hot-Neutral noise at test point 1 ; 18 Figure 3.3 Neutral-Ground noise at test point 1 19 Figure 3.4 Hot-Neutral noise at test point 2 20 Figure 3.5 Neutral-Ground noise at test point 2 20 Figure 3.6 Hot-Neutral noise spectrum 21 Figure 3.7 Neutral-Ground noise spectrum 22 Figure 3.8 Hot-Neutral spectrum of signal plus noise 23 Figure 3.9 NeutralJGround spectrum of signal plus noise 23 Figure 3.10 Signal attenuations for Hot-Neutral and Neutral-Ground channels for the same transmitting and receiving locations 25 Figure 3.11 Signal in Hot-Neutral 26 Figure 3.12 Signal in Neutral-Ground 27 Figure 4.1 Block of diagram of power line modem data transmission system 29 Figure 4.2 Block diagram of Power Line Modem interfaces 30 Figure 4.3 Transmitter block diagram 31 Figure 4.4 Receiver block diagram 32 viii Figure 4.5 Block diagram of power line modem control unit 33' Figure 4.6 Block diagram of self-test module... 34 Figure 4.7 Differential coding block diagram ; 34 Figure 4.8 Schematic for 27128A EPROM connection 39 Figure 4.9 Schematics for BPSK chip connection 40 Figure 4.10 RS-232C interface 41 Figure 4.11 Second order Butterworth band pass filter 42 Figure 4.12 Receive amplifier 43 Figure 4.13 Hard limiter circuit : 43 Figure 4.14 Transmitter analog circuits 44 Figure 5.1 Seven-layer OSI network architecture 45 Figure 5.2 Block diagram of data flow 46 Figure 5.3 Block diagram of firmware modules 47 Figure 5.4 Transmit module physical layer functions 48 Figure 5.5 Transmit module data link layer functions 49 Figure 5.6 Packet format 49 Figure 5.7 Transmit module flow chart 51 Figure 5.8 Receive module data link layer functions 52 Figure 5.9 Receive module flow chart 53 Figure 6.1 Signal waveforms (Hot-Neutral) before (upper trace) and after bandpass filters (lower trace) 57 Figure 6.2 Signal waveforms after bandpass filters (upper trace) and after hard limiter (lower trace) 58 Figure 6.3 Digital waveforms on BPSK chip ix 59 Figure 6.4 Block diagram of receiver simulation 61 Figure 6.5 BER vs. SNR of BPSK with and without a hard limiter 62 Figure 6.6 Bandwidths of signal and noise ; 63 Figure 6.7 Block diagram for BER and BLKER tests connection 64 Figure 6.8 Measured Bit Error Rate at 38.4 Kbits/sec 65 Figure 6.9 Measured Bit Error Rate at 19.2 Kbits/sec 66 Figure 6.10 Measured Bit Error Rate at 9.6 Kbits/sec 66 Figure 6.11 Block Error Rate at 38.4 Kbits/sec 68 Figure 6.12 Block Error Rate at 19.2 Kbits/sec 69 Figure 6.13 Block Error Rate at 9.6 Kbits/sec 69 Figure 6.14 In-building test sites 71 Figure 6.15 BER with receivers in the same room as transmitter (N&G represents the transmission in Neutral-Ground channel) 72 Figure 6.16 BLKER with receivers in the same room as transmitter 73 Figure 6.17 BER with receiver at different building locations, Neutral-Ground channels only... : 73 Figure 6.18 BLKER with receiver at building different locations, Neutral-Ground channels only ; 74 Figure 6.19 BER for Hot-Neutral channel from site A(x) to site A(y) 75 Figure 6.20 BER for Neutral-Ground channel from site A to site G 76 Figure 6.21 Block diagram of transmitting part of carrier sensing test function 77 Acknowledgment I would like to express my sincere gratitude to my supervisor, Dr. Robert W. Donaldson for his support, supervision, and guidance during the course of this thesis. I would also like to thank Barry Butternowsky for his helpful suggestions on the modem design and Hansen Wang for his help during the prototype making and testing of the modem. xi Chapter 1 Introduction 1.1 Motivation The growing need for in-building data communications services such as email, printer sharing and local area networking (LAN) is creating a growing demand for fast, cheap, reliable and flexible in-building communication transmission facilities. In-building communication media include optical fiber, coaxial cable, twisted pair, wireless radio and existing phone lines. The features of these media are summarized in Table 1.1. As an alternative to these media, existing in-building electric power line networks can also be used as communication channels., Table 1.1 Comparisons of common in-building communications media Optical fiber Coaxial cable & twisted pair Wireless Existing phone line Power lines Cable installation needed? yes yes no no no Cost very high high high low low Bit rate (bits/sec) > 2 0 M 100K - 2 0 M < 1 M . < 28.8 K < 19.2K Point to point capabil-ity yes yes yes yes yes L A N environment yes yes yes no yes Node addition/dele-tion requirements change layout change layout easy depends on phone line availability easy Interference between L A N s ? no no yes not applicable no Optical fibers, coaxial cable and twisted pair are the common transmission media used for in-building LANs. These LANs usually support higher bit rates as high as 100 Mbits/sec. However, the cost of cable installation is expensive and adding a new node normally requires installation of additional cables. For simple LAN functions (printer sharing, email etc.), an optical fiber or coaxial cable LAN may not be cost effective in many cases. 1 Chapter 1 Introduction 2 Wireless data communication does not need cable installation and offers flexibility of terminal location, addition or deletion. However, wireless modems are relatively expensive and the interference between wireless LANs limits their number in a building. Conventional modems use existing phone lines and do offer a relatively inexpensive alternative for in-building communi-cations. However, phone line modems can not be used easily in LAN environments and new modem installation depends on phone line availability. Power line modems use existing in-building power line distribution networks as communi-cation channels. The modems can be used either in point-to-point communications or in LAN environment. Physical location of terminals can be changed easily, creating a network more flexible than other LANs. There is no extra cost for LAN installation except the cost of a power line modem.With the application of digital VLSI and other digital technology, power line modem cost can be kept competitive. Power line channels can be a cost effective alternative for in-building communications, if reliability can be assured. 1.2 Background and Objectives The use of power line networks for communications is not new. Power line communica-tions, mainly for lighting control and meter reading, started in 1940's [22]. These applications operate at a low bit rate (< 1000 bits/sec). Recently, higher carrier frequency and different digital modulation schemes such as spread spectrum [28, 29, 31], minimum shift keying (MSK) [11] and binary phase shift keying (BPSK) [8] have been developed to increase the transmission bit rate and to combat low SNR. To combat further the hostile communication environment of power line channels, forward error correction (FEC) codes [4, 5, 9] and new multiple access schemes [6, 7, 23] have been developed. Using these schemes, bit rate of 19.2 Kbits/sec in industrial buildings Chapter 1 Introduction 3 has been reported [8]. However, high signal attenuation and high noise limit the modem through-put and transmission range. Therefore, developing means to combat or avoid the hostile power line communications environment is an objective of this thesis. BPSK modulation is relatively simple and cost effective to implement compared to most other modulation schemes [8]. Recently, a new, all-digital prototype BPSK modulation and demodulation VLSI chip was designed and manufactured [16]. Ancillary objectives of this thesis involve the design, implementation and testing of a new high bit rate modem based on the prototype chip. 1.3 Thesis Outline The remainder of this thesis is comprised of six additional chapters. Chapter 2 describes power line networks and the characteristics of conventional in-building power line communica-tion channels, which use the hot and neutral lines for communications. Channel impairments such as noise, signal attenuation and fading are discussed. To avoid this hostile communication environment, a new channel, which uses the neutral and ground lines, is proposed and compared via analysis to the Hot-Neutral channel. Chapter 3 describes measurements and comparisons of noise, signal attenuation and fading in Hot-Neutral and Neutral-Ground channels. From these comparisons, Neutral-Ground channel is suggested for use in power line communications wherever possible. Chapter 4 describes power line modem hardware design and implementation. Chapter 5 describes modem firmware design and implementation. Chapter 6 describes the results of numerous performance tests based on the measurements within an industrial building. Chapter 7 contains a summary of the thesis and provides suggestions for further research. Chapter 2 Transmission Media: Power Line Power lines have long been considered as a hostile communication channel due to highly unpredictable levels of impedance, signal attenuation and noise [2]. In this chapter, characteristics of Hot-Neutral channel will be discussed first. To avoid the hostile characteristics of Hot-Neutral, an alternative Neutral-Ground channel will be proposed and compared to the Hot-Neutral channel. In order to understand the attenuation, noise level and impedance in power lines, it is important, first of all, to understand the way electrical power is distributed. 2.1 Electrical Power Networks and Wiring Plans Electrical power is distributed from power generation plants to consumers over large and complex transmission networks and distribution systems. After the secondary side of a distribu-tion transformer, electrical power is further distributed in a residential area or industrial building via in-building wiring networks. In such networks, grounding is essential for safety, and also can provide a communication channel. Grounding plans, therefore, will be discussed in detail below. 2.1.1 Electrical power supply networks The purpose of any electrical power supply system is to meet customer's demands for energy. Electrical power supply systems consist of networks for transmission and distribution of electrical energy at different voltage levels. Transmission networks transfer large amounts of energy from main generation areas to major load centers. In transmission systems, electricity can be in the form of either DC or three phase AC [13]. Transmission systems usually operate at very high voltage, such as 300, 400, 500 or 765 kV. The high voltage electricity is then transformed at transmission substations to medium voltage levels of 1 - 36 kV to be carried further to customers 4 Chapter 2 Transmission Media: Power Line 5 though distribution networks. In distribution systems, electricity is usually in the form of three phase AC. At each distribution transformer site, medium voltage electricity is transformed to low voltage electricity, usually below 1 kV and in North America, 120 V per phase. Output of a distri-bution transformer serves a group of customers, such as one block of buildings in residential area or one commercial/industrial building via in-building wiring networks. Electricity is usually split single phase AC for residential sites and three phase AC for commercial/industrial sites (see Figure 2.1 and Figure 2.2). 2.1.2 In-building wiring plans Shown in Figure 2.1 is the wiring plan for a residential area. The secondary side of the distribution transformer includes two 120 V Hot (180° out of phase) 60 Hz AC lines and a common Neutral conductor. These Hot and Neutral lines are connected to a service panel in each house. Electrical power is then distributed throughout the building on general purpose branch circuits or dedicated branch circuits. Each 120 V circuit consists of Hot, Neutral and Ground wires (copper or aluminum). Small loads are connected to the branch circuits through standard wall socket (S in Figure 2.1) or directly as switched loads L, T, and F. Electrical power is supplied to large appliances (R in Figure 2.1), such as a refrigerator and washing machine, on dedicated 120 V branch circuits. Appliances with large heating elements, such as water heaters, usually require a 240V branch circuits. These appliances are connected to both of the 120 V lines, 180° out of phase to each other, and the Neutral. The heating element is connected directly across the two 120 V lines while Chapter 2 Transmission Media: Power Line the motor is connected to a single 120 V line and the Neutral, to comprise a 3 wire plus ground distribution cable. 6 A ground wire is included as well, Distribution Networl 2300V Power L i n e To Residence B J2oVl (18, 0°) r»-Service Panel Circuit Breaks PvVVi J Water Heater (240V) 1 I-Tll F^] L o a d s ( i 20V) Sffi Wal l Socket Residence A Figure 2.1 Residential power delivery scheme (modified from [9]). Commercial and industrial buildings are normally supplied with three phase electrical power (see Figure 2.2). Three phase medium level voltage is transformed to three phase low voltage, at 120 V per phase. The secondary side of the transformer, consisting of three 120 V lines (x, y, z, each with 120° phase difference) and a common Neutral line (N), is connected to the circuit panels in building. Depends on loads, each floor or each room has its own circuit panel. Chapter 2 Transmission Media: Power Line 7 3-Phase J_J$H Power L ine " J - * ^ - . \ Distribution Transformer Branch Circuits i Motor (3 phases) E G Lab A Wall Socket Figure 2.2 Commercial/Industrial three-phase power delivery scheme (modified from [9]). Depending on the power supply requirements of appliances, the three phase electricity can be used in form of single phase or three phase. Single phase power, consisting of one 120 V line (Hot) and Neutral, supplies most small load appliances, equipment and sockets (L, T, F and S in Figure 2.2) and forms the standard branch circuit. Three phase power, consisting of all the three Hot lines and the Neutral, supplies power for 3-phase motors. 2.1.3 Ground Grounding provides safety. There are two types of grounds. One is system ground. The Chapter 2 Transmission Media: Power Line 8 other is equipment and conductor-enclosure ground, or sometimes simply called equipment ground or bonding [14,15, 32]. System ground is provided by connecting one wire of the electrical power circuit to ground to meet the requirement that the voltage of any other conductor in the power lines to ground shall not exceed 150V [15]. The system ground is established at transformer site (SG in Figure 2;1 and Figure 2.2) and/or at service panels (G in Figure 2.1), by connecting the Neutral line to a ground rod. The ground rod is driven at least 8 feet into the earth. This ensures that the voltage between the Neutral line and ground throughout the building or residential district is close to zero [14]. Equipment and conductor-enclosure ground (equipment ground) connects non-current-carrying metal parts of the wiring system or equipment to ground. The equipment ground is established close to service site (G in Figure 2.1 and EGs Figure 2.2). A ground rod is also driven into the earth to provide grounding. The ground rod is connected to a ground wire, which in turn is connected to metal parts of equipment cases (as loads L, F and socket S in Figure 2.1 and Figure 2.2). A single ground rod can provide both the system and equipment grounding as in a residen-tial house (G in Figure 2.1), or separate rods can be used to provide the two groundings (SG and EGs in Figure 2.2). In equipment grounding for one building, more than one ground rod can be used; each provides grounding for a specific area or equipment (EGs in Figure 2.2). If separate ground rods are used for the two groundings, the ground for Neutral is not connected directly to the ground for equipment. However, these two grounds are connected indirectly through the earth. The resistance between any two rods is actually the resistance of earth between the two rods. It Chapter! Transmission Media: Power Line 9 has been shown that if the rods are driven into earth with sufficient depth (8 feet), the resistance between any two rods is about 20 ohms [14]. 2 . 2 Characteristics of Hot-Neutral Channel Most power line communication systems use one 120V Hot line and the Neutral as data transmission media [1-12]. A message is transmitted onto one Hot line and the Neutral line at the transmitter and received from one Hot line and the Neutral line at the receiver. The signal at the reception point, however, is attenuated and corrupted with high noise. Attenuation, noise and fading in the Hot-Neutral channel are discussed in this section. 2 .2 .1 Attenuation Low voltage power line networks in a residential block or commercial building are designed to carry 60 Hz electrical power. The signal used by our power line modem has a 115.2 KHz carrier. At this high frequency, the received signal may be severely attenuated. The attenua-tion is related to the power line distance between receiver and transmitter, the power line phases used and the electrical loads on the power line. It has been shown that this attenuation may exceed 70 dB [9]. In the Electrical Engineering department building, the University of British Columbia, when a transmitter and a receiver were located on different floors, signal attenuation was always in the 50 to 70 dB range [9]. 2 . 2 . 2 Noise Background noise and impulse noise exist on the Hot-Neutral channel. Impulse noise can cause large bit error rates in power line communications [2]. At the receiver, in order to have a good signal to noise ratio, a band pass filter should be Chapter 2 Transmission Media: Power Line 10 used. With a carrier frequency of 115 KHz and a signal half-bandwidth of 40 KHz, the cut off frequencies of band pass filter are designed to be 65 KHz and 165 KHz. With about 100 KHz bandwidth, the noise power which passes through the filter is quite large. 2.2.3 Signal fading Severe signal fading may exist on the Hot-Neutral channel [10]. One possible cause of fading is the existence on the power line of rectifier circuits, which switch at 60 or 120 Hz. When a rectifier turns on, it places a large capacitance directly across power circuit, thereby changing the impedance at the 60 or 120 Hz rate [8]. On Hot-Neutral channels, the message signal is applied to and received from any of three Hot line phases, and the Neutral line. The Hot line used for transmitting may not be the same as the one used for receiving. When a transmitter and a receiver are on same Hot line (same phase), the transmission is referred as same phase transmission; otherwise, as cross phase transmission. Fading occurs on both same phase transmission and cross phase transmission; fading on a cross phase channel can be severe. 2.3 Neutral-Ground as a Communication Channel As mentioned earlier, the Neutral line is connected to the earth only at the system ground rod. Ground lines in power distribution cables, which provide equipment grounds, are connected to one or several ground rods. Using Neutral-Ground as a communication channel is to transmit and receive communication signals via the Neutral line and the ground wire in the power distribu-tion cable. As mentioned earlier, the ground rods used for the system and equipment groundings can be the same or different. An example of equipment ground and system ground using different Chapter 2 Transmission Media: Power Line 11 ground rods will be analyzed. The case of the two groundings using the same ground rod can be considered as a special case of the example. 2.3.1 Circuit loop in Neutral-Ground channel Neutral line conductor Rm A A A System Ground El Ground hnA J. Equipment * Ground 1 Ground line conductor] E 2 jround 2 111 Earth Figure 2.3 A n example of Neutral-Ground channel An example of using Neutral-Ground as a communication channel is shown in Figure 2.3. Three sockets are used for communications, each with Hot (H), Neutral (N) and Ground (G) lines connected. The signal is transmitted on to the Neutral (N) and the Ground (G) of wall socket S2 and received at wall sockets SI and S3. Rgx is the resistance on the Ground conductors. Rnx is the resistance on the Neutral conductors. In this system, there are three ground rods, one for system ground and two for equipment grounds. The Neutral is grounded at the transformer site (El). Sockets S2 and S3 are grounded together at Equipment Ground rod 2 (E3). Socket S1 is grounded at Equipment Ground rod 1 (E2). The resistance between any two ground rods, i.e. the resistance of earth (Re), is about 20 ohms. Since there is no load between Neutral and Ground lines, the Chapter 2 Transmission Media: Power Line 12 impedance in channel is solely resistive. The transmission from S2 to S3 is a case where the ground lines for the two sockets used for Tx/Rx are connected to the same ground rod while the transmission from S2 to SI is a case where ground lines are connected to different rods. R n ; N(Sl) R"2 N(S2) Rn3 N(S3) r—AAA—j V A — ; — W v — A • A 4 Vl G(Si) V 2 Rg2 G(S2) Re EI f - A / V V Re •Wv Re -AAV V 3 • al G(S3) E3 Figure 2.4 Analysis of Neutral-Ground channel The simplified circuit loop for the example is shown in Figure 2.4. V2 is applied on to N(S2) and G(S2). VI and V3 are the received voltages across N and G at sockets SI and S3. It is not difficult to obtain the following equations: and, VI = Rnl+^Re \xV2 V3 = Rnl + Rn2 + -Re+Rg3 + Rg2 (Rnl +Rn2 + ^ Re + Rg3^xV2 Rnl +Rn2 + -Re+Rg3+Rg2 The above equations show that when V2 is applied across N(S2) and G(S2), the signals at other locations, VI and V3, are directly proportional to V2. Re, which is about 20 Ohms, is much Chapter 2 Transmission Media: Power Line 13 larger than the sum of Rruc and Rgx, which is below 10 Ohms. Therefore, signal attenuation should not be very large since Re is present in both the numerator and the denominator in these equations. The real situation maybe much more complicated than the example above. However, the example suggests that using Neutral-Ground as a communication channel is theoretically feasible. A circuit loop exists in the network and signals transmitted at one location can be received at another location. 2.3.2 Attenuation analysis for Hot-Neutral and Neutral-Ground To demonstrate that signal attenuation in Neutral-Ground is less than that in Hot-Neutral for the same distance, a simple analysis will be carried out. The analysis will focus on the effect of power line loads on the signal attenuation for a Hot-Neutral channel. It is assumed initially that both transmitter and receiver are on the same phase; cross phase transmission will be discussed subsequently. H 0 , - A & Neutral A A A Hn V W — 'Vn R t Nn Figure 2.5 Circuit loop of in phase Hot-Neutral channel A block diagram of simplified loads and conductor resistance in an infinitely long Hot-Neutral channel is shown in Figure 2.5. The power line loads (L) are assumed equal and evenly Chapter 2 Transmission Media: Power Line 14 distributed along the channel, as is the conductor resistance R. Since the channel is infinitely long, the impedance (Z) to the right across HI and Nl is the same as that across H2 and N2. Vin is the transmitting signal voltage at transmitter site and Vn is the received signal voltage at receiver site. It is easy to see that: V1 = — — — x Vi n \2R + Z\ V l H And, Vn'lm7zJxVi" where n is the number of loads between the transmitter and the receiver. Since the distance 1 between the transmitter (Vin) and the receiver (Vn) is linearly related to the number of loads n according to the assumptions. That is: / = C xn where C is a constant. Therefore, the attenua-tion is: Attenuation - V" - < ™ ^ - f Vin \\2R+Z\) \\2R+Z\. \Z\ Attenuation(dB) = 20xlogw(^j = 2 0 (^) x / o ^io(j2/ |+ z . The signal attenuation on the Hot-Neutral channel is related exponentially to the distance 1 between the transmitter and the receiver. The attenuation in dB is linearly proportional to the distance 1. On the other hand, when using Neutral-Ground as a channel, there is no electrical load on the channel. Attenuation is linearly proportional to the distance 1 or attenuation in dB is related to the logarithm of distance 1. The difference is substantial in large commercial or industrial Chapter 2 Transmission Media: Power Line 15 buildings where many loads are connected on power lines. 2.3.3 Cross phase communication The second advantage of using Neutral-Ground as a communication channel is its elimination of across phase transmission effects. This can be easily understood when the follow question is answered: how is the signal transmitted from one phase to another in Hot-Neutral. The exact mechanism for cross phase transmission is not clear. It seems impossible to answer the question simply from the wiring plans (see Figure 2.1 and Figure 2.2). One possibility is coupling among lines. Three phase lines are twisted together between transformer and service sites. Furthermore, coupling becomes stronger at higher frequency range. Signal coupling between these lines could be the major factor for signal transmission across phases. Another possible cross link is provided by loads connecting two Hot lines, such as water heater in Figure 2.1. A third possibility is capacitance coupling across distribution transformer windings [32]. Usually, signal loss across phase is large. Using Neutral-Ground as a communication channel can eliminate some cross phase effects. Signal transmission, then, may be more reliable and easier to predict. 2.4 Summary Hot-Neutral has been used by most power line modems as the only power line communi-cation channel. This is a potentially hostile communication channel with possible high attenua-tion, high noise level and severe signal fading. These parameters are constantly changing due to changes in electrical loads and changes in the characteristics of loads on line. Using the Neutral-Ground as a power line communication channel appears to overcome the hostile environment. Chapter 2 Transmission Media: Power Line 16 Analysis suggests that this new channel should have less attenuation and should also avoid the difficulties of transmitting across phase. Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels Noise, attenuation and fading were measured from both Hot-Neutral and Neutral-Ground channels. Quantitative and visual display comparisons show that Neutral-Ground has better overall potential for power line communications. 3.1 N o i s e The measurement setup is shown in Figure 3.1. The input of the 1:1 transformer is coupled to the power line through a pair of luF capacitors. These two capacitors act as high pass filters with the 3 dB cut off frequency of 25 KHz. Two test points are shown in Figure 3.1, one right at the secondary side of the transformer (test point 1) and the other after the band pass filter (test point 2). The band pass filter, consisting of two 2nd order Butterworth band pass filters in cascade, filters noise outside its bandwidth. The selection of cut off frequencies, 65 KHz and 165 KHz, is to meet the requirement of the carrier frequency and the signal bandwidth. The schematics for the band pass filter is given in section 4.3.3 (Figure 4.11). luF lul Power line coupling circui^  Band pass filter 65KHz-165KHz Test point 2 • '— Figure 3.1 Block diagram of test circuit. The test circuit in Figure 3.1 was connected to measure noise from both Hot-Neutral and Neutral-Ground channels. A TekTronix 2232 digital oscilloscope was used to display noise and to 17 Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 18 estimate impulse noise duration. A Fluke 45 Dual Display Multimeter was used for the measure-ments of root mean square (RMS) noise level. Noise in the Hot-Neutral channel consists of background and impulse noise components (see Figure 3.2). Impulse noise peaks have been reported to be 10 - 20 dB greater than background noise with duration varying from 0.02 ms to 0.1 ms [9]. According to Figure 3.2, background noise is about 150 mV peak-to-peak while impulse noise is about 1.4 V peak-to-peak. Before band pass filtering, noise impulses tend to occur in bursts. According to Figure 3.2, the duration of an impulse burst is about 0.4 ms. The RMS noise is about 100 mV. The 150 mV peak-to-peak background noise, however, only amounts to about 50 mV RMS. This indicates that the contribution of impulse noise to the total noise is very large. TEKTRONIX 2232 Figure 3.2 Hot-Neutral noise at test point 1 Noise on the Neutral-Ground is much higher than that in the Hot-Neutral (see Figure 3.3). Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 19 Neutral-Ground impulse noise is not as evident as that in Hot-Neutral channel. In other words, Neutral-Ground noise looks more white than Hot-Neutral noise. Neutral-Ground background noise is about 0.6 V peak-to-peak, which is about four times as large as Hot-Neutral background noise. The overall RMS noise level for Neutral-Ground is about 200 mV, twice as large as that for Hot-Neutral. T E K T R O N I X 2 2 3 2 Figure 3.3 Neutral-Ground noise at test point 1 Hot-Neutral noise decreases significantly after band pass filtering at test point 2 (see Figure 3.1). There are no impulse noise clusters. Noise is about 6-8 mV RMS and up to 100 mV peak-to-peak impulse (see Figure 3.4). Neutral-Ground noise after the band pass filtering is about twice that for Hot-Neutral noise, and is about 30 - 50 mV peak-to-peak and 11-13 mV RMS. There are few observed noise impulses after band pass filtering. Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 20 T E K T R O N I X 2232 Figure 3.4 Hot-Neutral noise at test point 2 T E K T R O N I X 2232 A U - M 0 . 0 foU T R I G 2 7m 05 A T = 0 . 0 0 m s 2 0 m f c S A M P L E Time (1 ms/unit) Figure 3.5 Neutral-Ground noise at test point 2 The above results show that noise levels both before and after band pass filtering for Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 21 Neutral-Ground are about twice those for Hot-Neutral. This implies that the background noise level is lower for Hot-Neutral than that for Neutral-Ground, but does not necessarily imply that Hot-Neutral is cleaner than Neutral-Ground. Due to its impulse noise components, Hot-Neutral noise is not as white as is Neutral-Ground noise. The non-white characteristics of Hot-Neutral noise can be further illustrated by spectral analysis, which follows. 3.2 Signal and Noise Spectra Spectral analysis was performed using a TekTronix 497P Programmable Spectrum Analyzer at test point 1 in Figure 3.1. The frequency band from 58 KHz to 308 KHz is displayed in Figure 3.6 - 3.9, inclusive. LEVEL REF -10DBM MKR -85.2DBM TEK 497P CEN MKR FREQUENCY 183KHZ 116KHZ SPAN/OIV 25KHZ J I I I I L DBM - 1 0 -20 -30 -40 -50 -60 -70 -BO -90 75 100 125 150 175 200 225 250 275 300 Frequency (K Hz) Figure 3.6 Hot-Neutral noise spectrum Overall, the Hot-Neutral noise spectrum consists of many peaks. These are distributed evenly, suggesting the inclusion of harmonics. In the 65 to 165 KHz band, the peak around 80-90 Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 22 KHz is above -45 dBm. The noise spectrum strongly supports the conclusion in section 3.1 that Hot-Neutral noise is not white. LEVEL REF -10DBM MKR -61.6DBM CEN MKR FREQUENCY 1B3KHZ 116KHZ SPAN/DIV 25KHZ TEK 497P DBM -10 -20 -30 -40 -50 -60 -70 -80 -00 _L ± 75 100 125 150 175 200 Frequency (K Hz) _L J _ 225 250 275 300 Figure 3.7 Neutral-Ground noise spectrum The Neutral-Ground noise spectrum, on the other hand, has no large peaks. Even though the overall noise level is higher, the spectral energy is more evenly distributed over the frequency range (see Figure 3.7). Neutral-Ground noise is closer to white noise than is Hot-Neutral noise. In the frequency range of interest, the highest level in the spectrum, which is about -40 dBm, is around 5 dBm more than that in Hot-Neutral. In order to see the relationship of signal to noise, a transmitter applied a 115.2 KHz sinusoidal signal to each of the channels. The spectrum of signal plus noise at the receiver was observed. A signal peak appears in the spectrum analyzer display of the Hot-Neutral channel (marked 'x' in Figure 3.8). Compared to the noise peak at its left, this signal peak is not very high Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels (about-40 dBm). LEVEL REF -10DBM MKR -41.2DBM CEN MKR FREQUENCY 183KHZ 116KHZ TEK 497P J L SPAN/DIV 25KHZ QBH -JO -20 J L -30 -40 -50 -60 -70 -BO -90 75 100 125 150 175 200 225 250 275 300. Frequency (K Hz) Figure 3.8 Hot-Neutral spectrum of signal plus noise LEVEL REF -10DBM MKR -10.0DBM FREQUENCY CEN 183KHZ KKR 116KHZ TEK 497P SPAN/0IV 25KHZ DBM -10 -20 _L _L _L ± -30 -40 -50 -60 -70 -BO -90 J _ 75 100 125 150 175 200 225 250 275 300 Frequency (K Hz) Figure 3.9 Neutral-Ground spectrum of signal plus noise Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 24 Without relocating the transmitter and the receiver, the spectrum of signal plus noise on the Neutral-Ground channel was also analyzed (see Figure 3.9). The signal power level (about -10 dBm) is well above the noise level. Since the same transmitting voltage was used for both channels, this result implied a smaller signal attenuation in Neutral-Ground than that in Hot-Neutral. 3 . 3 A t t e n u a t i o n According to our analysis in last chapter, the signal attenuation should be less in Neutral-Ground since there is neither power line loads nor across phase transmission to exacerbate signal loss. A 115 K H z sinusoidal signal was transmitted on to Neutral-Ground in a lab (room 458) on the fourth floor of the U B C Electrical Engineering building. The receiver was moved around the building to measure the received signal for Neutral-Ground transmission. A TekTronix 2232 digital oscilloscope was used to estimate the received signal at test point 2 in Figure 3.1. The transmitter voltage was set at 8 Volts peak-to-peak. Table 3.1 Signal attenuations in E E building, Neutral-Ground channel; transmitter was on forth floor, room 458 Received signal location Received signal peak-to-peak (V) Signal attenuation (dB) The same lab as the Tx (rm 458) 4 - 6 d B Another lab on the forth floor (rm 418) 0.4 -26 dB a lab on the third floor (rm 306) 0.8 -20 dB a lab on the first floor (rm 114) 0.3 -29 dB Within the building used for testing, the signal attenuation was less than 30 dB for Neutral-Ground channels. It is interesting to compare the signal attenuations of the same transmit-Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 25 ting and receiving locations using the two different channels. This was done in a lab (rm 458) on the forth floor. The transmitter was connected to a 120V bench outlet in the lab while the receiver was connected to different lab bench outlets to measure attenuations for both channels. Results are shown in Figure 3.10. Each point on the graph represents one receiving location in the lab for the two channels. Since the maximum transmitter voltage output is 8 volts peak to peak, the attenuation on Hot-Neutral channel across floors was too large to have a reasonable estimation of received signal. T 1 1 1 1 JT X a I I i I I I '. -34 -33.5 -33 -32.5 -32 -31.5 • -31 Attenuation (dB) for Hot-Neutral channel Figure 3.10 Signal attenuations for Hot-Neutral and Neutral-Ground channels for the same transmitting and receiving locations. The Neutral-Ground attenuation at all locations is about 25 dB lower than those for Hot-Neutral (see Figure 3.10). With less than 30 dB attenuation, data communication possibilities in the building via Neutral-Grand power line channels using simple signal technique appears u -a (3 S3 O l-i 0 1 U S3 <D PQ 3-c o • rH •*-» aj S3 u -6.5 h -7h -7.5h -8h -8.5 h Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 26 feasible. 3.4 Fading and Impedance Signals received on Hot-Neutral channels may suffer severe fading (see Figure 3.11, sampled at test point 2 in Figure 3.1). Fading, as mentioned earlier, is caused by change of impedance on Hot-Neutral channels, because of working rectifiers. Signal level differences between fading and non fading periods can be as high as 10 dB [9]. Signals received on Neutral-Ground, on the other hand, show no sign of fading (see Figure 3.12). This implies that rectifier operation does not affect Neutral-Ground channels. Figure 3.11 Signal in Hot-Neutral. Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 27 T E K T R O N I X 2 2 3 2 c 3 > W CD 3 "5. E < Figure 3.12 Signal in Neutral-Ground The impedance of the Hot-Neutral channel is less than 10 Ohms [9] and it is not pure resistance. As a result, a coupling circuit for the transmitter is needed to achieve good signal power transfer. The impedance changes frequently due to changes in power line loads. Implemen-tation of a perfect circuit for line coupling is almost impossible. The Neutral-Ground impedance is primarily resistive. The channel resistance is more than 20 Ohms, which is more than twice that of the Hot-Neutral channel. This implies that for the same voltage output, less than half the power is needed for Neutral-Ground as for Hot-Neutral communications. 3.5 Summary Use of Neutral-Ground channels appears to have substantial advantages over use of Hot-Neutral channels. Attenuation drops from more than 50 dB in Hot-Neutral to less than 30 dB in Chapter 3 Comparisons of Hot-Neutral and Neutral-Ground Channels 28 Neutral-Ground. Across-phase transmission is no longer a problem and no 120 Hz fading is observed for Neutral-Ground transmissions. Measurements and comparisons confirm these advantages. It is suggested that Neutral-Ground should be used as the channel for Power Line Modem transmission whenever possible. The summary of performance comparisons appears in Table 3.2. Table 3.2 Summary of comparisons between Not-Neutral and Neutral-Ground channels Neutral-Ground (N-G) Hot-Neutral (H-N) Attenuation Low, linear increase with distance High, exponential increase with distance Impedance About 20 Ohms, primarily resistive; no need for out-put matching About 10 Ohms, not resistive and inductive; needs output matching of modem amplifier to power line Output power needed Low High Noise High, twice that of H-N channel (RMS) High (about 0.1 Volt RMS) Noise after band pass High, twice that of H-N channel (RMS) High (about 7-8 mV RMS) Characteristics of noise Primarily background noise Background and impulse noise Spectrum of noise Relatively flat Many spectral peaks Presence of short circuits Possible very unlikely Across-phase transmission No across-phase problem Channel quality depends on phase Signal fading No Yes :, Transmission of signal Conduction Conduction and electromagnetic coupling Channel stability Stable varies with electrical loads C h a p t e r 4 H a r d w a r e D e s i g n a n d I m p l e m e n t a t i o n The heart of the power line modem used in our work is a digital VLSI chip controlled by a microcontroller. The chip was designed by Butternowsky [16], to perform discrete Binary Phase Shift Keying (BPSK) modulation and demodulation. The microcontroller supervises and controls the BPSK chip and data flow on modem. 4.1 Overall Design In the design of modem hardware, digital circuits were implemented to process signals whenever possible. Priority in design was given to modularity, simplicity, low cost and reliability. 4.1.1 Overall modem design considerations Host Host Power Line Modem Power Line Modem Power Line Modem Figure 4.1 B lock of diagram of power line modem data transmission system Power line modems can be used for either point to point communication or in a local area network (LAN) environment; a three node LAN is shown in Figure 4.1. Via a modem, each host computer can transmit and receive data. A computer can communicate in full duplex with its 29 Chapter 4 Hardware Design and Implementation 30 power line modem. With address information, any two power line modems can achieve half duplex communication between them through power line. Power Line Host Computer I Power Supply I +12V, -12V, I I +5V&GND I Power Line Modem Unit Figure 4.2 Block diagram of Power Line Modem interfaces Figure 4.2 shows the block diagram of a power line modem and its interfaces. The power line modem unit communicates, in full duplex, with the host computer through the RSi-232C interface (serial port) at one end and is connected to power line via a power line coupling circuit at the other end. The modem consists of a transmitter, receiver and controller, and is powered by an external power supply unit (Power-One HTAA-16W-A) with 12V, -12 V and 5 V DC outputs. The transmitter modulates digital data on to an analog carrier signal and sends it to the power line channel. The received analog signal from power line is demodulated to yield digital data. The controller supervises and controls all aspects of modem operation. It also receives and Chapter 4 Hardware Design and Implementation 31 sends digital data to the transmitter, the receiver and the host computer. A relay is positioned by the controller to switch modem state from receiving, which is the default, to transmission. 4.1.2 Transmitter o O I I I Bit streai Carrier Generation T I Bij_Clk I i odulated Bit Clock Generation B^ t Rate Control ata Low Pass Analog Filter Signal (170 KHz) Modulator Power "1 Amplifier Relay Control Signal To Power Rel Line Coupling Circuit Figure 4.3 Transmitter block diagram When there is a transmission request from the host computer, the controller delivers the data bit stream to the modulator, according to the bit clock signal (Bit Clk) from the bit clock generation circuit (see Figure 4.3). The data is then XORed with the digital carrier clock to generate the BPSK modulated digital signal. To this point, all the signals are in digital form, either 1 or 0. The carrier generation, bit clock generation and the binary XOR form the modulator of the BPSK VLSI chip (the dashed box in Figure 4.3). Low pass filtering removes the high frequency harmonics from the digitally modulated signal. The analog signal from the filter output is amplified and sent to the power line coupling circuit through the relay, which is positioned to connect the transmitter to power line accordingly. Chapter 4 Hardware Design and Implementation 32 4.1.3 Receiver The receiver block diagram appears in Figure 4.4. The signal from the power line is fed through the coupling circuit to the Butterworth band pass filters, where noise outside of the signal bandwidth is removed. The filtered signal is then amplified and hard limited to create a digital signal. Thus, any part of the analog signal above 0.7 V generates binary one (+5V) while the remaining signal generates zero (0.7V). The result is a one bit digital signal, which is then demodulated by the BPSK chip (the dashed box in Figure 4.4). The demodulator performs recovery of the carrier, bit clock and data. The demodulator output is a bit stream timed by the recovered bit clock. The demodulated digital data is received by the controller and sent to host computer if its address matches that of the decoded data packet. e o U Hard Limiter Amplifiers Signal plus residual noise Butterworth Band Pass Filters (60-170 K H z ) Signal plus noise Line Coupling Circuit Received Signal in One Bit Discrete Form Bit Stream Received i Data Recovery Bit C lock Recovery Carrier Recovery Bit Clock Recovered < 1 Bit Rate Control Demodulator Figure 4.4 Receiver block diagram. 4.1.4 Control of the modem An embedded microcontroller, with its instructions stored in EPROM, is the heart of the Chapter 4 Hardware Design and Implementation 33 modem control unit. It receives data from and sends data to host computer through a RS-232C interface (see Figure 4.5). It controls LED indicators and the relay by sending commands to them. The unit also controls a single chip performing discrete BPSK modulation and demodulation. To efficiently utilize its pins, the microcontroller sets the BPSK chip parameters through a serial_input parallel_output register. EPROM RS - 232C Embedded Microcontroller Digital BPSK VLSI Chip 8 bits Figure 4.5 Block diagram of power line modem control unit. 4.2 BPSK Digital VLSI Chip The BPSK digital VLSI chip, named BCPS2 by the manufacturer, performs discrete BPSK modulation and demodulation [16]. In this section, pin assignments and control parameters will be described. Details of chip design appear elsewhere [16]. 4.2.1 Chip overview The functions of the chip include BPSK modulation, BPSK demodulation, differential Chapter 4 Hardware Design and Implementation 34 encoding, differential decoding and on-chip self testing. The first two functions have been introduced in the last section. The block diagram of the self test module is shown in Figure 4.6. A random bit stream is generated and modulated; noise is then added and demodulation follows. This demodulated bit stream is compared to the original bit stream and the comparison result is used as the self test result. Self test result Bit stream Figure 4.6 Block diagram of self-test module. Binary Input data bit stream T Delay one bit ^Output bit stream to modulator Differential Encoding Binary Input bit stream from demodulator Delay one bit Output bit stream Differential decoding Figure 4.7 Differential coding block diagram The BPSK chip can perform differential encoding on the bit stream before modulation and differential decoding on the demodulated bit stream from demodulator. The equation for differen-tial encoding is bk = ak + bk_1, where ak is the input and bk is the output. The equation for differential decoding is bk = ak + ak_1, where ak is the input and bk is the output. The block diagrams for differential encoding and decoding appear in Figure 4.7. Chapter 4 Hardware Design and Implementation 35 4.2.2 Pin assignments The VLSI chip is packaged in a 68 pin grid array package. Only 31 pins are actually used for inputs, outputs or power supplies. Among the 31 pins, 7 are for common use (common), 4 pins for the modulator (mod), 10 pins for the demodulator (demod), 2 pins for the self test (self-test) and the remaining ones for power supply. Not all of the 31 pins have to be connected, as some of output pins are for test only (tst). The chip is powered by +5 V DC. Pin layouts of the chip are shown in Appendix A. Table 4.1 Pin assignment of the B P S K chip Pin(s ) Name(s) Direction Use Description 11, 27,59 VddRingO, 1, Vdd_CoreO Power +5V 12, 35,36 GndRingO, 1, GndCoreO Ground Ground 13 fc_128 Input mod/ demod Clock: 128 times max carrier frequency 14 be-128 Input mod/ demod Clock: 128 times maximum bit rate 15 Pass Output (tst) self-test Selftest result output: high = pass; low = error detected 16 Test Input self-test Selftest control input: high = start self test; low = no test 17 Tx_Data Input mod Bit stream to be digitally modulated 20 Fc_Tx Output (tst) mod Modulator carrier signal output 21 Bc_Tx Output mod Modulator bit clock output 22 Tx_Mod_Data Output mod Modulated digital signal 23 Rx Input demod Received signal input to demodulator 24 Fc_Rx Output (tst) demod Carrier recovered in demodulator Chapter 4 Hardware Design and Implementation 36 Table 4.1 Pin assignment of the B P S K chip Pin(s ) Name(s) Direction Use Description 25 S.Diff Input mod/ demod Differential coding control: high = dif-ferential coding; low = no 26 Reset Input mod/ demod reset the chip 37 Sig_Detect Output demod signal carrier detection: high = carrier present; low = no carrier 38 Bc_Rx Output demod received data bit clock 39, 40, 41,42 Bw_0, Bw_l, Bw_2, Bw_3 Output (tst) demod 4 bits of bandwidth information to cal-culate steps for early-late phase lock 60 Rx_Bits Output demod demodulated data (bit) 61 Demo_Rx Output (tst) demod demodulated signal 62, 63,64 S_Bc_2, 1, 0 Input mod/ demod 3 bits for bit rate control 65,66 S_Fc_l, 0 Input mod/ demod 2 bits for carrier frequency control 4 . 2 . 3 C l o c k s a n d p a r a m e t e r s There are two digital clock inputs for the chip, one for the carrier and the other for the bit clock. The structure of the chip is such that the frequency of carrier clock input (pin 13) has to be 128 times the highest carrier frequency; and the frequency of the bit clock input (pin 14) has to be 128 times the highest bit rate. For example, 14.2556 MHz as carrier clock input and 4.9152 MHz as bit clock input can generate a carrier of 115.2 KHz and a maximum bit rate of 38.4 Kbits/sec. The carrier frequency, 115.2 KHz as in the example, can be further divided on the chip to generate lower carrier frequencies if necessary. The control parameters are two bits, S_Fc_l and Chapter 4 Hardware Design and Implementation 37 S_Fc_0 (pins 65 and 66). Table 4.2 lists the carrier frequencies generated if a 14.2556 MHz clock is used for the carrier clock input (pin 13). However, this is rarely done due to the fact that the low pass and band pass filter circuits have to be changed if the carrier frequency changes. Table 4.2 Carrier frequency control (14.2556 M H z clock) S_Fc_l S_Fc_0 Divided by Resulting frequency (KHz) 0 0 128 115.2 0 1 (128*2) 57.6 1 0 (128*3) 38.4 1 1 (128*4) 28.8 The bit rate, 38.4 Kbits/sec, also can be divided down to lower rates on the chip. This bit rate is controlled by three bit parameters, S_Bc_2, S_Bc_l and S_Bc_0 (pins 62, 63 and 64). The following bit rates will be generated if a 4.9152 MHz clock is connected to the bit clock input pin (Bc_128), pin 14. Table 4.3 Bit rate control (4.9152 M H z clock) S_Bc_2 S_Bc_l S_Bc_0 Divided by Resulting bit rate (bits/sec) 0 0 0 128 38,400 0 0 1 (128*2) 19,200 0 1 0 (128*4) 9,600 0 1 1 (128*8) 4,800 1 0 0 (128*16) 2,400 1 0 1 (128*32) 1,200 1 1 0 (128*64) 600 1 1 1 (128*128) 300 Chapter 4 Hardware Design and Implementation 38 4.3 Hardware Implementation 4.3.1 Microcontroller pins The Intel 80C31 microcontroller has 40 pins, including four 8-bit ports. Each pin in these ports can be used either as an input or an output. Among the total of 32 pins for the ports, 16 pins were connected to the EPROM, 8 to the BPSK chip, 3 to RS-232C interface, and one to the relay. The remaining 4 pins were not connected. Pin descriptions are listed in Table 4.4. Table 4.4 Pin description for the 80C31 controller Descriptions Pins 39-32 (AD0-AD7) Lower order byte of the address bus and the data bus. Pins 39-32 are known as port 0 of the 80C31 Pins 21-28 (A8-A15) higher order byte of the address bus, port 2 of the 80C31 Pin 30 (ALE) address line enable signal for the address latch. When high, the address latch will output the lower byte of address to the EPROM Pin 29 (PSEN) program store enable. The EPROM will output data onto the data bus when this signal is low. Pin 1 (TXDATA) sends the current data bit to the modulator of the BPSK chip Pin 15 (TXDATACLK) receives the data clock from the modulator of the BPSK chip Pin 12 (RXBITS) receives the demodulated data bit from the BPSK chip Pin 13 (RXDATACLK) receives the data clock from the demodulator of the BPSK chip Pin 17 (DATACAR-DET) connect to the data carrier detect pin of the BPSK, carrier in received signal sets it high Pin 2 (PARACLK) parameter clock signal to the register controls BPSK chip parameters Pin 8 (PARAM) parameter signal to the register controls BPSK chip parameters Pin 3 (PASS) pass signal from BPSK chip when selftest is on Pin 10 (RxD) receives data in 8 bits serial from RS-232C Pin 11 (TxD) send data in 8 bits serial to RS-232C Pin 6 (CTS(DTE)) clear to send, high allows host computer to send data, low prohibits Pin 4 (RELAYCTL) relay control, low connects transmission circuit to power line Chapter 4 Hardware Design and Implementation 39 4.3.2 Digital circuits GNDD ADO 39 AD1 38 AD2 37 AD3 36 AD4 35 AD5 34 AD6 33 AD7 32 POO/ADO P01/AD1 P02/AD2 P03/AD3 P04/AD4 P05/AD5 P06/AD6 P07/AD7 Microcontroller 2 7 1 2 8 A Figure 4.8 Schematic for 27128A EPROM connection The digital circuits can be divided into three parts, the EPROM connection, the BPSK chip connection and the RS-232C interface connection, all connecting to the Intel 80C31 microcontrol-ler. The 80C31 has 128 bytes of on chip RAM but no on chip PROM. The 27128A, a 4 kbytes ultraviolet light erasable programmable ROM, is used as the EPROM to store the instructions for 80C31. The same 80C31 is shown in all the three schematic diagrams in this subsection. Not all the pins of the 80C31 are shown in each schematic diagram; only those related to the parts on the same schematic diagram are shown. The complete digital schematic diagram can be found in [40]. The schematic diagram for the EPROM connection is shown in Figure 4.8. Since pin 32 -Chapter 4 Hardware Design and Implementation 40 39 of 80C31 are used for both address AO - A7 and data (DO - D7), these 8 pins connect directly to the DO -D7 pins of 27128A and indirectly to the AO - A7 pins of 27128A through an 8-bit address latch 74HC373. The remaining addresses of 80C31 and 27128A are directly connected. +5MD _x 14.2556 GrtJDDl +5VD -X 4.9152Kf GNDD LED 74HC04 R3 AAA —Wv p V V V V V V YELLOW 50 GNDD ' TXMODATA 3 74HC08 74HC04 CTS<DTE) 6 80C31 PIO PI1 P12 P13 P14 PI5 P16 P17 P31/TXD P32/ IN TO P3/ INTl P34/T0 pasnri P36/ WR c a i m . +5V i l l L C R L K QQQQQQQQ ABCDEFGH FBTSRSSSSS CCEEEEEEEE 11STSTTTTT 22TDEBBBFF SS ITCCCCC PAS  I 2 10 10 TXDATA TX_MOD_DATA RX FCTX BCTX BPSK V V V G G G CCCNNN C 0 0 D D D 0 12 0 12 S B B R I C C X G T R B D X X I E T T S BW0 BW1 BW2 BW3 DEMORX f5VD GNDD Figure 4.9 Schematics for B P S K chip connection Most of the BPSK chip pins are connected directly or indirectly to the microcontroller (Figure 4.9). The parameters of the BPSK chip are controlled by an 8-bit parallel-out serial shift register, 74HC164. The two inputs of the 74HC164, namely clock (PARACLK) and serial input (PARAM), are connected to the microcontroller. Two crystal oscillator modules are used as the Chapter 4 Hardware Design and Implementation 41 clocks. A 14.2556 MHz module is used for both the clock of the 80C31 and the carrier clock input (pin 13) of the BPSK chip. A 4.9152 MHz module is used for the bit clock input (pin 14) of the BPSK chip. The switching of the modem from the receiving to transmitting state is achieved by two hardware actions. One is the opening of an AND gate in the 74HC08; the other is the connec-tion of the relay to the transmitter. The input to the demodulator of the BPSK chip is via the RX pin for received signal, while the output of modulator is the TX_MOD_DATA pin. As mentioned before, some of the BPSK output pins are for testing only and are not connected to anything. CTS(DTE) 6 80C31 P10 P30/RXD P1  • P31/TXD P12 P32/ INTO P13 P33/ INT1 P14 P34/T0 P15 P35/T1 P16 P36/ WR P17 P37/ RD R4 V \ A A -L E D ^ 74HC04 GNDD GNDD RXD +5V GND OUT +5VD 14C89 CTS(DTE) TXD RXD{0) CTS1 CTS(O) CTS2 +12V GND -12V GNDD 14C88 > Figure 4.10 RS-232C interface The RS-232C interface to the host computer is implemented using line driver 14C88 and line receiver 14C89 (see Figure 4.10). These two chips transform the TTL digital signal to, and back from, a +12V smoothed signal compatible with RS_232C. Only three lines, Tx_data, Rx_data and clear to send (CTS), in the RS-232C interface, are used and connected to the 80C31 through the 14C88 and 14C89 respectively. Pin 16 of 80C31, which is connected to a LED, Chapter 4 Hardware Design and Implementation 42 inverts its output every second when the 80C31 works properly. 4 . 3 . 3 A n a l o g c i r c u i t s o f r e c e i v e r A cascade of two second order Butterworth band pass filters were implemented to filter noise. One is shown in Figure 4.11. The capacitors, C2 and C4, are set to 1 nf for convenience. Given the required 56 KHz bandwidth and 115.2 KHz center frequency, resisters R6, R8 and R12 can be obtained from the following equations: 2 Bandwidth = 27t/?gC2 CenterFrequency = R _ R6R12 a Rt + R 2KC2JRJS 12 -12V Figure 4.11 Second order Butterworth band pass filter The LF347 low noise amplifier is used to realize a two-stage amplifier for the received signal (see Figure 4.12). A diode, which forms the first part of the hard limiter, works as a half wave rectifier to cut off all negative voltages. The signal is then compared to 0.7V using a voltage Chapter 4 Hardware Design and Implementation comparator LM339. The high output of the LM 339 is clamped to +5V (see Figure 4.13). 43 Figure 4.12 Receive amplifier Figure 4 . 1 3 Hard limiter circuit 4 . 3 . 4 A n a l o g c i r c u i t s o f t r a n s m i t t e r The output from the modulator of the BPSK chip (TXMODDATA) is first passively low pass filtered (see Figure 4.14). The cutoff frequency for the low pass filter is 170 KHz. The signal is then amplified and fed to a tri pot. The power amplification is achieved using LM 384, an audio Chapter 4 Hardware Design and Implementation 44 amplifier (see Figure 4.14). The relay is closed by the relay control signal (RELAYCTL) from the microcontroller. A 7406 high current driver operates the relay. Figure 4.14 Transmitter analog circuits C h a p t e r 5 F i r m w a r e D e s i g n a n d I m p l e m e n t a t i o n The use of a microcontroller in the modem provides for flexible modem parameter settings, physical layer control and data layer control. All of these have been programmed in the microcontroller in assembly language instructions, called firmware. 5.1 Overall Design The current firmware (plmc-v3.03) was modified from previous versions [8]. Emphasis was given to keep the modularity of the firmware, which is listed in [40]. 5.1.1 Open Systems Interconnection Application Presentation Session Transport Network A / \ Data Link Control i = Virtual Application Presentation Session Transport Network Physical Interface v ! ^ ^ ^ ^ bit pipe Data Link Control Upper Layers 1/ / RS-232-C interface Packets Data Link Control Physical Interface Frames Virtual Synchronous unreliable bit pipe "— __Phy_sical Link_ Upper Layers v. \ RS-232-C interface Packets! Data Link Control Frames I Modem U 1 Moden^ 1 / - J Communication Link Figure 5.1 Seven-layer OSI network architecture Layered architecture is a form of hierachical modularity used in data network design. 45 Chapter 5 Firmware Design and Implementation 46 Open Systems Interconnection (OSI) was developed as an international standard for layered architecture of data networks by the International Standards Organization (ISO) [21]. The OSI has seven layers; each can be independently developed (see Figure 5.1). Power line modem firmware design focuses on the physical layer, the lowest of the seven layers, and part of data link control layer functions. Firmware functions which were implemented include packet control, virtual synchronous bit pipe, RS-232C interface to higher layers, modem parameter setting, and detection of channel availability (see the inset of Figure 5.1). 5.1.2 Dataflow 1 O _ l-l i f § o 2 o U .S Sent down from host byte by byte (character) I RS-232C interface 1 Sent up to host byte by byte (character) a V H o bit by bit Received from chip bit by bit • BPSK Support chip Circuits c si U O Figure 5.2 B lock diagram of data flow Data flow in the modem is supervised and controlled by the controller (see Figure 5.2). For transmitting, data is sent down from host computer in bytes via the RS-232C interface and stored temporarily in RAM on the microcontroller. The firmware adds a packet header to the data and then sends each frame bit by bit to the BPSK chip. The modulated signal is sent to power line channel. For receiving, if incoming data from the BPSK chip matches with the destination packet header, the received frame, after packet header striped off, will be sent up to host computer in Chapter 5 Firmware Design and Implementation 47 bytes through the RS-232C interface. 5.1.3 Overall design of firmware The microcontroller in the modem uses RAM as buffer storage and EPROM for firmware storage. The RAM, located in the microcontroller, consists of 128 bytes and it is used to store variables and temporary data. Instructions in EPROM are fetched and executed by the microcon-troller. Figure 5.3 Block diagram of firmware modules The firmware consists of four major modules, the initialization module, the command module, the transmit module and the receive module (see Figure 5.3). The initialization module initializes the microcontroller, the RS-232C interface and the BPSK chip. The firmware automati-cally enters the receive module after initialization. The receive module receives the bit stream from the demodulator and continuously compares that bit stream to the packet header. If there is a match, the subsequent data is sent up to the host computer. Chapter 5 Firmware Design and Implementation 48 Whenever the microcontroller receives data from host through the RS-232C interface, the firmware will exit the receive module and enter either the command module or the transmit module. If the first two characters of the data from host are "*I", the firmware enters the command module; otherwise, the transmit module. In transmit mode, packets from the RS-232C interface will have a packet header added before being sent out to the modulator. In the command mode, the controller receives commands from host computer to set modem parameters. 5.2 Transmit Module 5.2.1 Functions of the transmit module bytes from data link layer carrier sensing result • to data link layer Figure 5.4 Transmit module physical layer functions The transmit module performs all the physical layer functions as well as some of the data link layer functions. The two main physical layer functions in transmit module are byte to bit serialization and carrier sensing (see Figure 5.4). Carrier sensing is achieved by detecting the carrier detection pin (SIGDET pin) on the BPSK chip. A positive carrier sensing is sent to the data link layer. In data link layer, the carrier sensing result is used to set the carrier flag (see Figure 5.5). This information can be sent up to higher layers where carrier sensing multiple access may be implemented. bit stream to Byte to bit B P S K chip serialization S I G D E T pin Carrier from B P S K chip * | S e n S ^ Chapter 5 Firmware Design and Implementation 49 The second data link layer function is to receive data from host. Data in bytes from host computer is temporarily stored in the transmit first_in_first_out buffer. The size of the buffer is relatively small, 40 bytes in this version, compared to the size of a packet (100 - 250 bytes). However, the data bit rate between host and modem is usually higher than the transmitting bit rate of the modem. Therefore, a handshaking mechanism has to be established to inform the host when the buffer is full. This is achieved by a hard-wired handshaking protocol. The Clear To Send (CTS) line is used for this purpose. This hard wired handshaking protocol is much more reliable than other software handshaking protocols [8]. carrier sensing result Carrier flag [ bytes to physical layer Attach preamble for each packet earner sensing request • 1 earner sensing result Host computer Transmit ^ bytes buffer (higher layers) 7 data flow control (CTS line) Figure 5.5 Transmit module data link layer functions 5.2.2 Preamble 1st byt e S Y N C word address field one or more bytes SynL SynP | SynL SynHJ SynL SynF SynL RxA|TxA Data Preamble Figure 5.6 Packet format Nine bytes of preamble are used per data packet. The first 7 synchronization bytes Chapter 5 Firmware Design and Implementation 50 comprise 3^ synchronization words. Each synchronization word (SYNC) has two bytes, a most significant byte (SynH) and a least significant byte (SynL). The address field contains two bytes: RxA and TxA for the address of receiver and transmitter respectively. The selection of the synchronization preamble length and its binary representation are based on the performance analysis on the power line channel, the probability of missed detection and the probability of false alarm [8]. 5.2.3 Transmit module flow chart As mentioned earlier, when data is sent down from host and the first two characters are not the firmware exits the default receive module and it enters the transmit module (see Figure 5.3). The transmit module tests the carrier flag (see Figure 5.7). If it is set, the channel is occupied by another power line modem and no transmission is allowed. The channel availability informa-tion can be sent up to host. If the channel is not occupied, the RELAYCTL pin is reset to zero. Resetting RELAY CTL connects the transmit circuits to the power line coupling circuit and the modem is ready for transmission (see Figure 4.14). The preamble is first sent out bit by bit, while data from host will be buffered at the same time. If the buffer is full, the Clear To Send (CTS) pin is reset to zero to prohibit any further transmission of data from host. The CTS pin will be set to 1 as soon as the buffer has space for more data. When the transmit module finishes transmitting the preamble, it starts to transmit the data stored in the transmit buffer. At the same time, the host continues to send down bytes to the buffer. If there is no data left in the transmit buffer, the transmit module sets the RELAYCTL pin to 1 and the firmware returns to the receive module. Chapter 5 Firmware Design and Implementation 51 C Reset RELAYCTL pin (^ Buffer data (RS-232C) & send out preamble by bit^ ) ^ Take a byte from buffer Send one bit out j V (Buffer byte if RS-232C has one' V reset CTS pin if buffer is full / Set RELAYCTL pin & go to receive module Figure 5.7 Transmit module flow chart 5.3 Receive Module 5.3.1 Receive module functions The receive module is the default module of the firmware. Exiting from any of the other three modules, the firmware returns to the receive module. All of the receive module functions are Chapter 5 Firmware Design and Implementation 52 data link layer functions (see Figure 5.8). The receive module constantly searches for the appear-ance of the SYNC word in the bit streams from the BPSK demodulator. Locking on to the preamble of the received frame achieves byte synchronization. If the receive address of the packet matches the modem address, the packet with preamble stripped off is sent up to the host. The reception of this packet ends when the carrier signal is no longer detected in channel. bit stream SYNC search and byte synchronization byte Address verification Strip preamble bytes Send bytes up to host 1 1 i Carrier detect from physical layer Figure 5.8 Receive module data link layer functions 5.3.2 Flow chart of receive module Shown in Figure 5.9, the receive module was designed as a real-time finite state automata containing four states, SynL_Search, SyncJVerify, Sync/Address and Lock. RXBITS is an input pin of the microcontroller connecting the data (in bits) output from the BPSK demodulator. SR is a 16 bit shift register. SRL is the least significant byte of SR while SRH is the most significant byte. SYNC is the synchronization word (16 bits) in the packet preamble. SynL is the least signif-icant byte of SYNC (see Figure 5.6). "Address" in the Sync/Address state is the address of receiver. In the state of SynL_Search, the receive module continuously (bit by bit) searches for the appearance of the 8 bit SynL in the bit steam. When SynL is detected, the receive module switches to the Sync_Verify state. In this state, the next 16 bits from RXBITS are collected and Chapter 5 Firmware Design and Implementation . 5 3 compared to the SYNC word. This state is to verify the byte synchronization achieved in last state. ( shift one bit from RXBITS pin into SR (16-bifJ)« SynLjSearch ( shift next 16 bits from RXBITS into SR) No SyncVerify [—•(^ shift 16 bits from RXBITS into SR, invert if necessary) Sync/Address [-•(^  shift 8 bits from RXBITS, invert if necessary) Lock f>end byte\^_X£i \to host J Figure 5.9 Receive module flow chart As we know, BPSK demodulation has 180 degree phase ambiguity in the recovered carrier. As a result, the demodulated data may be inverted. The detection of possible inversion is completed at this state as well. Ideally, the data inversion will result in a total error of 16 bits, Chapter 5 Firmware Design and Implementation 54 when SR is compared to the SYNC word. The presence of this total error could be used to set the inversion flag ON. The next state is the Sync/Address state. In this state, if the 16 bits in SR are SYNC, the receive module stays in this state. If not, the SRH will be compared to the address of receiver. If the addresses match, the receive module enters the Lock state and it is ready for the data portion of the packet. In the Lock state, 8 bits of data are collected, and inverted if necessary. Each byte received will be sent up to the upper layers in host computer. The Lock state, a self loop state, ends if the carrier signal is lost. 5 .4 I n i t i a l i z a t i o n a n d C o m m a n d M o d u l e s The firmware initialization module sets the modem parameters to default values. These parameters, listed in Table 5.1, could be changed using the command module. The commands in the left column are the keys sent out from host computer to change the modem parameters. Some of the commands need subsequent input afterward while others do not. Table 5.1 Commands used in command module Command (Key) Descriptions Default value S Sync word = SynH + SynL CCAA (Hex) X address of receiver (this modem as the sender) 9D (Hex) D address of this modem 9D (Hex) R toggle the relay control pin 1 (Binary) P BPSK chip parameters, 8-bit output of the 74HC164 (Figure 4.9), explained in detail as P.7 - P.O 00 (Hex) P.7 TEST: 1 = set test on 0 (Binary) P.6 SETDIFF: 1 = set differential coding on 0 (Binary) P.5 RESET: 1 = reset the inside status of BPSK chip 0 (Binary) Chapter 5 Firmware Design and Implementation Table 5.1 Commands used in command module Command (Key) Descriptions Default value P.4-P.2 3 bits controlling bit rate: SETBC2 SETBCl SETBCO (S Be 2S Be l & S Be 0 in Table 4.3) 000 (Binary) P.1-P.0 2 bits controlling carrier frequency: SETFC1 SETFCO (S_Fc_l & S_Fc_0 in Table 4.2) 00 (Binary) B baud rate of RS-232C at modem end, 38400(FF), 19200 (FE), 9600 (FC), 4800 (F8), 2400 (F0), 1200 (E0) FF Q print user alterable modem parameters T modem self test result (applicable if TEST is set to 1) ? print help menu V print version z reset default settings E exit command module C h a p t e r 6 T e s t R e s u l t s Two modem prototypes were first built on wrap wiring boards and tested. Then two printed circuit boards were designed, built and tested. Most of the results presented here are from the tests of the two modems in printed circuit board. The modems were tested in actual operating environment, the Electrical Engineering building at University of British Columbia. From these tests, performance parameters in two channels, Hot-Neutral and Neutral-Ground, were measured and compared. 6.1 Receiver Waveforms Before the communication test results are presented, some signal waveforms at receiver are displayed and discussed. The test points were closely monitored throughout the BER tests to ensure proper hardware performance. Waveforms at the transmitter are not shown since they are much simpler and noise free. 6.1.1 Analogue to digital conversion The analogue communication signal from the power line channel is filtered and transformed to a binary digital signal before being demodulated. The selected waveform samples illustrate the transformation from the noise-contaminated analogue signal to a digital signal. All waveform samples shown were from Hot-Neutral channel and were displayed on a TekTronix 2232 digital oscilloscope. Most of the 60 Hz noise received from the power line is filtered by the line coupling circuit (see Figure 4.2). The signal is then fed to the Butterworth bandpass filters (see Figure 4.4). The 56 Chapter 6 Test Results 57 waveform samples before and after the bandpass filters are shown in Figure 6.1. Noise before the Butterworth bandpass filters is about 100 mV RMS in Hot-Neutral. The received signal level is usually below 50 mV RMS. Therefore, the received signal in Hot-Neutral is buried in noise (upper trace in Figure 6.1). After bandpass filtering, the noise level decreases to about 6-7 mV RMS and the communication signal can be found easily (lower trace in Figure 6.1). CD T3 Q. E < A U 1 = 1 A U 2 T E K T R O N I X 2 2 3 2 8 . 8 2^ 3 2 U T R I G 1 = B . 8 3 U S A M P L E 5 . 8 s a u 7kH. Time (5u.s/unit) Figure 6.1 Signal waveforms (Hot-Neutral) before (upper trace) and after bandpass filters (lower trace) The bandpass filtered signal is amplified and fed into a hard limiter (see Figure 4.4). The hard limiter transforms this analogue signal to binary digital signal. Samples of signal waveforms after the bandpass filters and after the hard limiter are shown in Figure 6.2. The upper trace is the signal waveform after the bandpass filter. Since the signal is a BPSK modulated signal, there is a 180 degree phase change in the analogue signal whenever there is a state change. The sample waveform happens to include a 180 degree phase change (labelled as C in Figure 6.2). The lower trace is the digital signal waveform after the hard limiter. The 180 degree phase change in the Chapter 6 Test Results upper trance causes a 180 degree phase change in the digital signal of lower trace. 58 CD T3 Q. E < T E K T R O N I X 2 2 3 2 58mV 5 U S A M P L E Time (5u.s/unit) Figure 6.2 Signal waveforms after bandpass filters (upper trace) and after hard limiter (lower trace) 6.1.2 Waveforms on BPSK chip The binary digital signal after the hard limiter is sent to the BPSK chip for demodulation. Waveform samples from pins of the BPSK chip were displayed using a TekTronix 3001GPX logic analyzer to illustrate the process of discrete BPSK demodulation (Figure 6.3). From top to bottom, the waveforms listed are Rx_bits (recovered data bits), Bc_Rx (recovered bit clock), Rx (received digital signal), Demo_Rx (demodulated signal), and Fc_Rx (recovered carrier signal). The description of these pins are given in section 4.2.2. The time span between the two cursors (dashed lines) is one bit cycle, 51.950 \is (19.2 Kbits/sec) in this case. The signals are all in the form of one bit discrete, with high being 5V and low being 0V. The carrier (Fc_Rx) is the first to be recovered from the input (Rx). The recovered carrier is XORed with the received digital signal (Rx) to generate the demodulated signal (Demo_Rx). Chapter 6 Test Results 59 The demodulated signal (Demo_Rx) is integrated digitally in each bit cycle and compared to a threshold. The received data bit (Rx_bits) is the result of that comparison. The current bit of Rx_bit stream is obtained from the comparison of the threshold to the integration of Demo_Rx during last bit cycle (Bc_Rx). As an example, the bit of zero in Rx_bits between the two cursors is obtained due to the fact that the demodulated signal during the bit clock before the left cursor is mostly zero. bpskchip 13 Feb 1996 18:42 Figure 6.3 Digital waveforms on BPSK chip 6.2 Theoretical BER Analysis in White Noise In order to test the performance of the modems, the theoretical performance should be analyzed first as a reference. Furthermore, simulation was conducted to obtain the theoretical performance of the power line modem receiver. Chapter 6 Test Results 60 6.2.1 BER of an optimum BPSK demodulator in white noise With white noise, the BER of an optimum BPSK demodulator was given by [20]: BER = Q -y where the complementary error function Q[x] = (-^ Lilf^ - 2 'dy . The average bit energy, ^ , \*J2K)J X and noise density, JV0, can be estimated from following equations: £,b = average bit energy = (received signal power) / (bit rate) = V2sig/(bit rate) , N0 = noise density = V2hoise I (Equivalent noise bandwidth) where Vsig and Vnoise are the RMS voltages of received signal and noise. 6.2.2 BER of BPSK with a hard limiter In order to simplify our modem design, the received analogue signal is hard limited before demodulation; this allows the design of the BPSK demodulator to be one bit digital. This hard limiter, a non-linear component, inevitably keeps the discrete BPSK demodulation away.from linear and optimal demodulation. The theoretical BER performance of this hard limiting receiver, therefore, should be investigated. The penalty caused by hard limiter on single sinusoid signal has been addressed by Beaulieu and Leung [37], and is between 0.912 to 2.87 dB depending on the bit detection scheme used. Even though one of the bit detection schemes analyzed by Beaulieu and Leung is very close to the bit detection scheme used in the BPSK chip, they are not exactly the same. Besides, multi-cycles of sinusoid waveforms are used for signaling one data bit in the power line modem Chapter 6 Test Results 61 implementation. The theoretical BER for the power line modem, therefore, will be analyzed by simulation. The possible factor which may affect the BER versus relationship is the bit rate. It The simulation provides the relationship of BER vs. jj~ under different bit rate conditions. The BER calculation algorithm simulates the power line modem receiver as closely as possible (see Figure 6.4). White noise is generated and filtered by a bandpass filter which has the same bandwidth as the one used in the receiver. A message signal is generated and added with the bandpass filtered white noise. The analogue signal is then fed to a hard limiter. The resulting digital signal is demodulated by a discrete demodulator used in the receiver of the BPSK chip with the assumption of perfect carrier synchronization. The results and the theoretical BER of an optimal receiver are plotted in Figure 6.5. The SNR/bit in graph is the same as jj~ . BER U Signal Generation Hard Limiter S = Sin (wt) sign() -> +1 or -1 White Noise bandpass Generation Filter Hard Limiter sign() -> +1 o ul Sum and compare to Transform: threshold for each bit cycle -1 ->0 Figure 6.4 Block diagram of receiver simulation Chapter 6 Test Results 62 The penalty in terms of 77" is less than 3 dB. Even this 3 dB penalty is contributed not i V o only by the hard limiter but other possible factors as well. One such factor is the fixed bandwidth of bandpass filters, which is not reduced in proportion to the bit rate. 10" 10" 10" cy o £ 1 0 4 10" 10 - 2 * Analytical result 115.2 Kbits/sec x 38.4 Kbits/sec • - 9.6 Kbits/sec 2.4 Kbits/sec 0 2 4 SNR/bit (dB/bit) 10 Figure 6.5 BER vs. SNR of BPSK with and without a hard limiter Due to the hardware simplicity, the bandwidth of the bandpass filters is fixed to about 100 Chapter 6 Test Results 63 KHz to allow the signal at the highest bit rate to pass through. The bandwidth does not change according to the bit rate actually used. As an example, the spectrum of a signal at a lower bit rate plus noise after the bandpass filters is shown in Figure 6.6. The bandwidth of signal in this case is much narrower than that of noise. The noise outside the bandwidth of signal could be filtered to achieve a better BER but was not implemented in. the modem hardware due to its complexity. This factor also contributes to the 3 dB penalty in Figure 6.5. o D C O i Signal Bandwidth Noise bandwidth (100 KHz) Figure 6.6 Bandwidths of signal and noise Since the penalty is relatively low compare to the scale of signal attenuation in power line channel, the theoretical BER of optimal demodulation in white noise will be used as the reference for the modem BER tests. In the theoretical analysis and the simulation, perfect carrier synchroni-zation at the demodulator was assumed. In actual applications, carrier synchronization becomes extremely difficult at low carrier to noise ratio (CNR). BER at low CNR will be high due to the loss of carrier. Therefore, test results are expected not to follow the theoretical result at low CNR. 6 .3 B E R P e r f o r m a n c e o f t h e M o d e m Bit Error Rate (BER) and Block Error Rate (BLKER) performances of the modem in both the Hot-Neutral channel and Neutral-Ground channel were measured in the Electrical Engineer-ing building at UBC. This set of tests measured the BER of modem in relation to SNR/bit and bit rate. Chapter 6 Test Results 64 6.3.1 BER and BLKER measurement procedure BER and BLKER were measured using two Hewlett Packard 1645A Data Error Analyz-ers. One analyzer generates random bit sequences and feeds these to a transmitter. At the receiver end, the demodulated data bits were compared to those transmitted and bit errors and block errors were recorded (see Figure 6.7). H P 1645A Bits Modem (Tx) Bitcloclr Power L ine Network Bits M o d e m (Rx) H P 1645A Bit clock Figure 6.7 B lock diagram for B E R and B L K E R tests connection BER for a Hot-Neutral channel was measured when both the transmitter and the receiver were in a communications lab on the forth floor of the UBC Electrical Engineering Building. A link with relatively low fading was selected and the signal collected during the fading period was used to calculate SNR. This procedure ensures that the results from Hot-Neutral channel will have a fair comparison with the results from Neutral-Ground where fading rarely occurs. BER of the Neutral-Ground channel was measured when the transmitter was in the communications lab on the forth floor and the receiver was in another lab on the first floor. With the transmitter and receiver in the same room, the signal attenuation in Neutral-Ground channel was too low (about 6 dB) to produce a wide range of test results (the channel quality was very high). After the transmitter and the receiver were set in place, the test procedures were as follows: 1. Set transmitting voltage to a known level, and record the received signal level. 2. Set the bit rate (from 38.4 Kbits/sec to 300 bits/sec), transmit 10° bits of data (10J Chapter 6 Test Results 65 blocks, 10 bits per block), measure BER and BLKER, repeat until either BER is below 10"6 or bit rate is 300 bits/sec. 3. Set differential coding in the transmitter and differential decoding in the receiver, and repeat procedure 2. 4. Reduce the transmitting voltage and repeat procedures 1 to 3 until the received signal level is so low that even at 300 bits/sec, a BER of more than 10% results. 6.3.2 Bit error rate BER results for 38.4, 19.2 and 9.6 Kbits/sec are plotted separately in Figures 6.8 to 6.10. Each figure shows BERs of the Neutral-Ground channels without (o) and with differential coding (*), as well as BERs for the Hot-Neutral channels without (x) and with differential coding (+), and the theoretical BER for the optimum demodulation. -2 0 2 4 6 8 10 12 14 16 SNR/bit Figure 6.8 Measured Bit Error Rate at 38.4 Kbits/sec Chapter 6 Test Results 66 10-1 io - t 10 10 10 10 Theoretical analysis N&G channel N&G with diff_code H&N channel H&N with diff code _1 L-4 6 8 SNR/bit 10 12 14 16 Figure 6.9 Measured Bit Error Rate at 19.2 Kbits/sec io- h-1 0 > 10 10 10 10" -I r--2 0 -o—i— i r-0 * X + Theoretical analysis N&G channel N&G with diff_code H&N channel H&N with diff code 4 6 8 SNR/bit — « — e > <* 10 12 14 16 Figure 6.10 Measured Bit Error Rate at 9.6 Kbits/sec Chapter 6 Test Results 67 The theoretical optimum receiver BER is from equation: BER = Q o For bit rates of 38.4 and 19.2 Kbits/sec, most of the BER results indicate that the modem's BER performance is reasonably close to the theoretical BER. Though similar for the most part, the BERs at different conditions do provide some interesting comparison results. First, the BER for the same SNR/bit is better for the Neutral-Ground channel than for the Hot-Neutral channel. This becomes more obvious as SNR/bit gets higher; the data points for the Hot-Neutral channel moves further away from the theoretical BER when SNR/bit gets higher. As discussed in chapter 3, impulse noise in Hot-Neutral channels is higher and occurs more often than in Neutral-Ground channels. At lower SNR, the effect of background noise on BER is dominant. Therefore, impulse noise does not affect the BER much. As SNR increases, the effect of background noise on BER decreases exponentially. The relative effect of impulse noise on BER, therefore, increases. The result is a higher BER in Hot-Neutral channel than that in Neutral-Ground channel. Second, the BER is higher in a transmission with differential coding than in one without differential coding. According to data communication theory, differential coding increases BER by approximately 2 dB in Gaussian noise [20]. BER from power line modem transmission with and without differential coding follows the theoretical analysis. Carrier to noise ratio (CNR) is an important parameter for characterizing a signal contam-inated with noise, and can be calculated as follows: CNR = 201og lo frr -^r- | , where Vsig is \V noise) the RMS voltage of received signal and Vnoise is the RMS noise after the Butterworth bandpass Chapter 6 Test Results 68 filters. In the tests, the receiver lost carrier synchronization at low CNR. That is, when carrier to noise ratio was below a certain level, BER was higher than twenty percent independent of the bit rate. The CNR value at which the receiver loses carrier synchronization can be considered as the CNR threshold needed for the power line modem operation. The CNR threshold for Neutral-Ground and Hot-Neutral channels was about -4 dB and -1 dB, respectively. 6 . 3 . 3 Block Error R a t e Block error rates (BLKERs) for 38.4 Kbits/sec, 19.2 Kbits/sec and 9.6 Kbits/sec are plotted separately in Figure 6.11, Figure 6.12 and Figure 6.13. Each figure shows BLKERs for the Neutral-Ground channel without (o) and with differential coding (*), and for Hot-Neutral channel without (x) and with differential coding (+). The block length used in test was 1000 bits. 1000 blocks were used for each data point. 16—T • — i — f i t — * T — j j j ; op 1 1 1 1 : B o N & G channel x * N & G with diff_code + x H & N channel + H & N with diff_code + '"-2 0 2 4 6 8 10 12 14 16 SNR/bit Figure 6.11 Block Error Rate at 38.4 Kbits/sec PQ 10"2 Chapter 6 Test Results 69 10 10 Pi PQ 10 i • 1 1 1 1 1 r-X + o N&G channel „, N&G with diff_code x H&N channel + H&N with diff code o -2 0 2 4 6 8 10 12 14 SNR/bit 16 Figure 6.12 B lock Error Rate at 19.2 Kbits/sec 10 10" 04 PQ 10-b 10 -i 1 —i 1 1 1 r o N&G channel * N&G with diff_code x H&N channel + H&N with diff_code i i i x o _J t_ 6 8 10 12 14 16 SNR/bit Figure 6.13 Block Error Rate at 9.6 Kbits/sec As discussed in the last subsection, BER of a transmission with differential coding was Chapter 6 Test Results 70 higher than that without differential coding. When Block Error Rates were compared, however, the B L K E R of a transmission with differential coding was found near that of a transmission without differential coding. As we know, differential coding has memory. That is, the data bit being decoded is not only related to the currently received bit but also the previous bits. As a result, if there is an error caused by noise, there is a memory of it and later bits may be also in error. Testing showed that, on average, the bit error rate doubled with differential coding. Power line impulse noise causes errors, no matter what coding scheme is used. Using differential coding, two errors result from any noise impulse. One single or two adjacent errors gives identical B L K E R values. Impulse noise causes more bit errors with differential coding but the same number of block errors. 6 .4 Comparisons of BER in Two Channels For the Hot-Neutral channel, B E R versus SNR/bit is worse than the Neutral-Ground channel; and more importantly, signal attenuation and signal fading are much higher. The follow-ing results illustrate the differences by comparing BER and B L K E R in the two channels at various receiving locations. 6.4.1 Test sites Figure 6.14 shows the test sites utilized in the Electrical Engineering building, at UBC; the building is a four floor building with 70,000 square feet of offices, labs and classrooms. The transmitting site was fixed at site A , located inside the communications lab on the forth floor. Receiving sites were scattered throughout the building. Sites A, B and C were located on different Chapter 6 Test Results 71 lab benches in the communications lab (see the inset of Figure 6.14). These alphabetized sites will replace room numbers through out the following subsections. For example, A(x) represents location A in the communication lab on power line phase x and G represents the location in a lab on the first floor. Figure 6.14 In-building test sites 6.4.2 BER and BLKER at different receiving sites In Hot-Neutral transmission, channel quality is related not only to the locations but also the relative phases of the transmitter and receiver. The power line phases of the transmitter and receiver were carefully noted for Hot-Neutral channels. Phase is not an issue for Neutral-Ground channels. The transmitter was at A on phase x. In Figures 6.15 - 6.16, receiving locations and phases are recorded. Chapter 6 Test Results 72 Most of the Hot-Neutral BER tests were done in the communications lab where transmis-sions were always successful. However, Hot-Neutral BER test was successful only very few selected sites when the receiver was placed outside the lab. Those successful cases depended on numerous conditions including the transmitting site and phase, receiving site and phase, and channel condition during test. These special cases were unstable and they are very difficult to be documented. Therefore, they will not be presented here. In Neutral-Ground channel tests, the channel was observed to be very good when the transmitter and the receiver were in the same room. BERs were all below 10E-6 for all sites at the highest bit rate and the lowest output power available. Transmission between floors was mainly for Neutral-Ground channels. BER and BLKER were measured when both the transmitter (at A(x)) and the receiver were in the communications lab (see Figure 6.15 and 6.16). The transmission voltage was fixed at 67 dBmV; 106 bits of data in 1000 blocks (1000 bits/block) were transmitted for each data point. 250 200 «? 150 + UJ X I 100 50 200 0 0 0 0 2 0 0 0 09 I 22 23 69 2 0 0 46 11 BER(38.4K) 63 BER(19.2K) E2 BER(9.6K) 83 BEH(4.8K) 1 0 0 0 0 A(x,y,z) B(x) B(z) C(x) Receiver Locations C(y) N&G(A,B.C) Figure 6.15 BER with receivers in the same room as transmitter (N&G represents the transmission in Neutral-Ground channel) Chapter 6 Test Results 73 250 200 + 3 150 + cc UJ 5 100 o 50 190 0 0 0 0 2 0 0 0 95 S§22 • BLKER(38.4K) S BLKER(19.2K) 0 BLKER(9.6K) 13 BLKER(4.8K) 47 40 23 2 0 0 H 6 1 o o o o A(x,y,z) B(x) B(z) C(x) Receiver Locations C(y) N&G(A,B,C) Figure 6.16 BLKER with receivers in the same room as transmitter For Hot-Neutral, BER depends on the location and phase of the receiver. In Neutral-Ground, however, phase is not an issue in transmission as noted earlier, and all BERs are below 10"6. BER and BLKER were also measured when the transmitter (at A(x)) and the receivers were in different rooms (Figures 6.17 and 6.18). All of the results were obtained from Neutral-Ground channel. 250 200 + «P 150 UJ I 100 50 + 180 o o o o H BER(38.4K) ES BER(19.2K) 0 BER(9.6K) E3 BER(4.8K) ' 13 5 213 0 0 0 0 3 0 0 0 B&C(Same Rm) D(4th FL) E(3rd FL) Receiver Locations F(3rd FL) 1 0 G(1st FL) Figure 6.17 BER with receiver at different building locations, Neutral-Ground channels only Chapter 6 Test Results 74 100 80 2 60 -f of UJ 5 40 + m 20 + -9-3- 90 H BLKEH(38.4K) S3 BLKER(19.2K) 0 BLKER(9.6K) S3 BLKER(4.8K) B&C(Same Rm) D(4th FL) E(3rd FL) F(3rd FL) Receiver Locations G(1sl FL) Figure 6.18 BLKER with receiver at building different locations, Neutral-Ground channels only For each data point, 106 bits of data in 1000 blocks (1000 bits per block) were transmitted. The transmitting voltage was 54 dBmV. BER is not related to the power line phase of receiver but related to the location of receiver only. Transmissions were successful at all the sites selected for testing of the Neutral-Ground channels. 6.4.3 BER versus transmitting power BER versus the transmitter voltage for Hot-Neutral channel is shown in Figure 6.19. BERs were measured when the transmitter was at site A on power line phase x and the receiver was also at site A but on phase y. Transmitter voltage is shown in dBmV from the equation fVTRMS\ VTx{dBmV) = 201ogl0f ^ J , where VTxRMS is the RMS voltage in mV of the transmitting signal delivered to the power line. For each data point, 106 bits of data were transmit-ted. From the graph, the transmitter voltage at which the receiver loses carrier synchronization can be easily found. This transmitter voltage threshold is also applied to transmission with bit rate of 2.4 Kbits/sec and lower. For this Hot-Neutral link, the transmitter voltage threshold for carrier Chapter 6 Test Results 75 synchronization is about 40 dBmV. Transmitter voltage threshold is a very useful performance parameter but it varies for each link. The carrier to noise ratio threshold, which is discussed in section 6.3.2, is a more general parameter. For transmission with bit rate 2.4 Kbits/sec or lower, when the transmitter voltage is higher than the transmitter voltage threshold, the BERs are below 10"6. - • 3 8 . 4 K H Z - • - 1 9 . 2 K H Z - A 9 . 6 K H Z -X - 4 . 8 K H Z O.0OOO1 0 . 0 0 0 0 0 1 Transmiter Voltage (dBmV) Figure 6.19 BER for Hot-Neutral channel from site A(x) to site A(y) BER versus the transmitter voltage for Neutral-Ground channel is shown in Figure 6.20. BERs were measured when the transmitter was at A on the forth floor and receiver was at G on the first floor. For each data point, 106 bits of data were transmitted. The transmitter threshold for this link was about 50 dBmV. For transmission with bit rate 2.4 Kbits/sec or lower, when the transmit-ter voltage is higher than the transmitter voltage threshold, the BERs are below 10"6. Chapter 6 Test Results 76 1.00E+00 1.00E-01 1.00E-02 S 1.00E-03 1.00E-04 1.00E-05 1.00E-06 Transmiter Voltage (dBmV) Figure 6.20 BER for Neutral-Ground channel from site A to site G —•— -38.4KHZ - - • - 19.2KHZ — A — -9.6KHZ - -X - 4.8KHZ 6.5 Software Testing Tests were conducted to confirm the firmware's ability to set modem parameters and to detect carrier sensing. Two modems were also used to transfer large files between two host computers over a power line channel. 6.5.1 Carrier sensing A test function was programmed into the firmware (in Assembly language) to test carrier sensing. The carrier sensing test function includes two aspects, one for transmitting and the other for receiving. The transmitting part automatically generates a packet of random data after a delay and begins the transmission process (see Figure 6.21). With carrier sensing, the firmware first listens to the channel and then sends the packet only if the channel is free. The receiving part continuously listens to the channel and compares the received packet to the one generated. Bit errors for each packet, accumulated bit errors for a test, number of packets received and number Chapter 6 Test Results 77 of error free packet counts are updated after each complete packet is received. These statistics are sent to the host computer for display. Carrier Sensing Send packet Delay 1 sec. Channel is not free Figure 6.21 Block diagram of transmitting part of carrier sensing test function The carrier sensing function can be tested by having two modems transmitting to and receiving from each other. By adjusting the packet length and the bit rate, the time needed for transmitting a packet was adjusted to more than half a second but less than one second during the test. Only one modem can therefore transmit one packet per second if carrier sensing works properly. The two modems alternated transmissions in turns. The tests were conducted on both Neutral-Ground and Hot-Neutral channels in the communications lab. The transmission power was adjusted such that the BER on each channel is below 1CT6. A total of 100 pairs of packets for each channel were counted and none failed to detect carrier in the channel. 6.5.2 File transfer File transfer was achieved using the Kermit protocol software in host computers. Large . files, ranging from 18 Kbytes to 103 Kbytes in size, were used for testing. Each file was divided by Kermit software into packets (packet size changeable) which were sent onto the power line one by one. Acknowledgment was sent by the receiver upon receipt of each packet. If the receiver Chapter 6 Test Results 78 detected a packet error, it requested the transmitter to retransmit a retransmission. The RS-232C interface carriers 8 bits of data plus one start bit and one end bit. The actually information bit rate between the host and modem is 0.8 times the baud rate. If the baud rate of the RS-232C is set to 38.4 Kbits/sec (default), the actual information bit transfer rate between the host and the modem is 30.72 Kbits/sec. To successfully communicate between two modems, the modem bit rate has to be less than 30.72 Kbits/sec. Accordingly, the 4.9152 MHz clock module for modem bit clock input was replaced by a 3.58 MHz clock module. This results in a maximum bit transfer rate of 28 Kbits/sec between two modems. The two printed circuit board modems successfully established file transfer communica-tions between them using both the Neutral-Ground and Hot-Neutral channels in the communica-tions lab on the 4th floor. The Kermit package has its own statistic analysis for each successful transmission. Throughput, number of packets transmitted, number of bits per packet and number of retransmissions are updated and displayed. Due to the lack of information on the error recovery scheme and other communication protocols used in the Kermit software package1, the BER on the channels could not be compared to the throughput displayed in the Kermit software package. Therefore, the BER for each channel was not measured. When the channel was good and 28 Kbits/sec was used as modem bit rate, the file transmission throughput could be as high as 25 Kbits/sec. If there were retransmissions due to errors, the throughput decreased accordingly. Tests showed that the modems also worked with bit rates as low as 875 bits/sec. It was observed that retransmissions might occur due to collisions between the packet of transmitter and the acknowledgment of receiver. Kermit, a communication protocol for duplex communications between conventional modems, is not the perfect protocol for half duplex data communication on power line. It was used in this thesis for the purpose of modem parameter control and illustration for the potential of power line modem in file transfer applications. Chapter 6 Test Results 79 6.6 S u m m a r y Tests show that the power line modems work effectively on both Hot-Neutral and Neutral-Ground channels. The BER was reasonably close to the theoretical value. Compared to Hot-Neutral channels, Neutral-Ground channels enable the power line communications over a wider distance with limited transmitting power. Neutral-Ground transmissions were not affected by either the relative power line phases of the transmitter and the receiver or the loads on power lines. Tests show that the modems function effectively in detecting the received carrier signal. With the appropriate protocol, the modems can successfully transfer large files from one computer to another one via electric power line circuits. Chapter 7 Conclusion 7.1 Summary The thesis work consisted of two phases, namely, the development of a new power line modem and the testing of the modem on power line channels. In the first phase, low cost, small size and performance reliability were the goals for hardware development, while modularity and robustness were the goals for firmware development. The challenge of the second phase was to overcome the hostile characteristics of power line communication channels, especially those in large buildings. The heart of the modem hardware is a locally developed prototype digital BPSK modula-tion and demodulation VLSI chip. To decrease the cost and size of the modem, digital circuits are implemented wherever possible and a simple hard limiter is used to transform the received analog signal to a binary digital signal. Implementation based on hard limiting enables the design of the BPSK modulator and demodulator to be one bit digital. The prototype VLSI chip performs BPSK modulation, BPSK demodulation, differential encoding, differential decoding and self testing functions. The firmware development provides the needed modularity and also offers robust modem parameter control and data link control. The carrier sensing function is implemented successfully. The Hot-Neutral channel is normally used as the power line communication channel by most researchers. This can be a hostile communication channel with high noise, high signal attenuation, ever-changing impedance and signal fading. These characteristics limit the transmis-sion range of the power line modem and its data communication rate. The Neutral-Ground 80 Chapter 7 Conclusion 81 channel is proposed and tested, as an alternative. Neutral-Ground channels exhibit lower attenua-tion in large buildings, less impulse noise, higher input resistance, less signal fading, and more stable links. The Neutral-Ground channel is recommended for use in power line communications wherever possible. The power line modem was tested in both Hot-Neutral and Neutral-Ground channels. The measured modem BER is relatively close to that for Gaussian noise channels. Using Neutral-Ground channels enables the power line modem to communicate over longer ranges and with less transmitter power than when Hot-Neutral channels are used. Communications over Neutral-Ground channel are not affected either by the relative power line phases of the transmitter and receiver or by power line loads. Using an appropriate communications protocol, the modems successfully transferred large files from one computer to another via the electric power line. 7.2 Future Work One possible direction of future work is to test higher bit rates with a higher carrier frequency over Neutral-Ground channels. If the power line modem can communicate at 128 Kbits/sec, such a modem may be able to support Integrated Services Digital Network (ISDN) services, which have a large potential market. In order to work at bit rates of 128 Kbits/sec or higher, substantial changes in the modem would be required. A pilot experiment has shown that the cut off frequency of the Neutral-Ground channel is somewhere between 250 and 350 KHz. With a carrier frequency of 240 KHz, for example, bit rates up to 80 Kbits/sec can be implemented using the same BPSK VLSI chip with a faster microcontroller and new analogue Rx/Tx circuits. To reach 128 Kbits/sec needed for ISDN, the modulation scheme may have to be changed from BPSK to QPSK. Chapter 7 Conclusion 82 At a bit rate of 64 Kbits/sec or higher, the RS-232C serial port between the modem and host computer may not be fast enough. Therefore, the modem should be implemented as a computer card to enable a higher rate of data exchange between the modem and host computer. With a powerful CPU and fast bus speed, all of the data link layer functions in firmware may be implementable in the host computer. Modem design using a DSP chip is another possible future work direction. Use of a DSP chip has advantages. Modulation and demodulation would be achieved using software, thereby facilitating changes and adjustments. By using an A/D converter, the input samples to the DSP chip could be multiple bits instead of one bit for the digital BPSK modem chip; this increased accuracy of the samples may enable carrier and bit synchronization to be implemented using the DSP chip, as well as bit decisions. The main disadvantage of using the DSP approach is the cost of a powerful DSP chip. For example, with a 256 KHz modem carrier frequency and a bit rate of 128 Kbits/sec, the highest frequency in the signal spectrum is about 400 KHz. To sample the received signal requires at least 800 K samples / sec. In order to combat noise, approximately 1 M samples /sec would be required. Filtering, synchronization, estimation and output decisions would require a fast, powerful and costly DSP chip. The final cost of the modem, therefore, may be excessive. However, the costs of DSP and A/D hardware are decreasing. The DSP approach may become a cost effective choice in the future, especially at lower data rates where slower processing speeds may result in reduced DSP chip costs. Glossary Neutral-Ground The communication channel using the Neutral line and the Ground line. Hot-Neutral The communication channel using the Hot line and the Neutral line. Host Host computer in relation to power line modem. BPSK chip The home designed BPSK modulation and demodulation VLSI chip CTS Clear To Send, a control line in RS-232C interface Block ER Block Error Rate, 1000 bits per block in tests 83 Bibliography [1] Peter K. Van Der Gracht and Robert W. Donaldson, "Communication Using Pseudonoise Modulation on Electric Power Distribution Circuits," IEEE Transactions on Communica-tions, Vol. 33, No. 9, pp 964-973, Aug. 1985. [2] Morgan Hing-Lap Chan and Robert W. Donaldson, "Attenuation of Communication Sig-nals on Residential and Commercial Intrabuilding Power-Distribution Circuits," IEEE Trans, on Electromagnetic Compatibility, Vol. 28, No. 4, pp. 220-229, Nov. 1986. [3] Morgan Hing-Lap Chan and Robert W. Donaldson, "Amplitude, Width, and Interarrival Distributions for Noise Impulses on Intrabuilding Power Line Communication Networks," IEEE Trans, on Electromagnetic Compatibility, Vol. 31, No. 3, pp 320—323, Aug. 1989. [4] Morgan H.L. Chan, David Friedman and Robert W. Donaldson, "Performance Enhance-ment Using Forward Error Correction on Power Line Communication Channels," IEEE Trans, on Power Delivery, Vol. 9, No. 2, pp 645-653, Apr. 1994. . [5] David Friedman, Morgan H.L. Chan and Robert W. Donaldson, "Error Control on In-Building Power Line Communication Channels," in Communications, Computers and Signal Processing Conference, 1993, Vol. 1, pp 178-185. [6] John O. Onunga and Robert W. Donaldson, "Personal Computer Communication on Intra-building Power Line LAN's Using CSMA with Priority Acknowledgment," IEEE Journal on Selected Areas in Communications, Vol. 7, No. 2, pp 180-191. Feb. 1989. [7] John O. Onunga and Robert W. Donaldson, "Performance Analysis of CSMA with Prior-ity Acknowledgment (CSMA/PA) on Noisy Data Networks with Finite User Population," IEEE Transactions on Communications, Vol. 39, No. 7, pp 1088-1096, July 1991. [8] Barry Butternowsky, "Design, Implementation and Testing of A Flexible, Intelligent Modem Architecture for Power Line Communication," Department of Electrical Engi-neering M.A.Sc. thesis, University of British Columbia, Canada, Jan. 1992. 84 Bibliography 85 [9] Morgan Hing-Lap Chan, "Channel Characterization and Forward Error Correction Coding for Data Communication on Intrabuilding Electric Power Lines," Department of Electrical Engineering Ph. D. Thesis, University of British Columbia, Canada, April, 1989. [10] Frank Kwok King Chiu, "Intrabuilding Polyphase Power Line Networks," Department of Electrical Engineering M.A.Sc. Thesis, University of British Columbia, Canada, Dec. 1985. [11] Kam O. Lee, "An All-Digital VLSI Minimum Shift Keying Modem," Department of Elec-trical Engineering M.A.Sc. Thesis, University of British Columbia, Canada, June, 1992. [12] David Friedman, "Design and VLSI Implementation of a Convolutional Encoder and Majority Logic Decoder for Forward Error Correction in Intrabuilding Power Line Com-munication," Department of Electrical Engineering M.A.Sc. Thesis, University of British Columbia, Canada, Sep. 1992. [13] E. Lakervi and E. J. Holmes, Electricity Distribution Network Design, Perter Peregrinus Ltd., New York, 1989. [14] Terrel Croft and Wilford Summers, American Electrician's Handbook, 11th Ed. McGraw-Hill Book Company, New York, 1987. [15] "Canadian Electrical Code, Part 1: Safety Standard for Electrical Installations," 7th Ed. C22.1-94, 1994. [16] Barry Butternowsky, "All Digital BPSK Chip," Department of Electrical Engineering Unpublished Report, University of British Columbia, Canada, Oct. 1993. [17] William Cheung, "Design and Test of A Bit Error Rate Tester for Power Line Modems," Department of Electrical Engineering Unpublished Report, University of British Colum-bia, Canada, July, 1991. [18] "8-Bit Embedded Controllers Handbook," Intel Corporation, 1989, Literature Sales, P.O. Box 7641, Mt. Prospect, IL, 60056-7641. Bibliography 86 [19] Frank Da Cruz, Kermit, a File Transfer Protocol, Digital Press, Bedford, Mass., 1987. [20] John G. Proakis, Digital Communications, 3rd Ed. McGraw Hill Inc., New York, 1995. [21] Dimitri Bertasekas and Robert Gallager, Data Networks, 2nd Ed. Prentice Hall, Engle-wood Cliff, New Jersey, 1992. [22] R. Broadbridge, "Power Line Modems and Network" Telecommunications, pp. 294-296, 1989. [23] Son T. Vuong and Audivox H.T. Ma "A Low-Cost and Portable Local Area Network for Interconnecting PC's Using Electric Power Lines" IEEE Journal on Selected Areas in Communications, Vol. 7, No. 2, pp. 192-201, Feb. 1989. [24] W.R. De Wilde and D. Van Wassenhove, "Upwards to a Reliable Bi-Directional Commu-nication Link on the LV Power Supplies for Utility Services: Field Tests in Belgium," in 6th Metering Apparatus and Tariffs for Electr. Supply, Manchester, UK, pp. 168-172, 1990. [25] Masaoki Tanaka, "High Frequency Noise Power Spectrum, impedance and Transmission Loss of Power Line in Japan on Intrabuilding Power Line Communications," IEEE Trans-actions on Consumer Electronics, pp. 321-326, May, 1988 [26] C. Nunn, P.M. Moore and P.N. Williams, "Remote Meter Reading and Control Using High-Performance PLC over the Low Voltage and Medium Voltage Distribution Net-works," 7th Metering Apparatus and Tariffs for Electr. Supply, Manchester, UK, pp. 304-308,1992. [27] K.C. Abraham and S. Roy, "A Novel High-Speed PLC Communication Modem " IEEE Trans, on Power Delivery, Vol. 7, No. 4, pp. 1760-1768, Oct. 1992. [28] Moon Kyon Song, Sug Chin Sakong and Kyun Hyon Tchah, "Realization of Power Line Modem Using a Direct Sequence Spread Spectrum Technique," IEEE Trans, on Consumer Electronics, Vol. 39, No. 3, pp. 646-652, Aug. 1993. Bibliography 87 [29] Kaoru Endo, Naomichi Takahashi and Soichi Tsumura, "A High Performance Power Line Spread-Spectrum Modem LSI For Home Bus System," in International Consumer Elec-tronics Conference, Washington, D.C., 1989, pp. 100-101. [30] Peter J. Kwasniok, Man D. Bui, A. James Kozlowski and Stanislaw S. Stuchly, "Tech-nique for Measurement of Powerline Impedances in the Frequency Range from 500 kHz to 500 MHz," IEEE Trans, on Electromagnetic Compatibility, Vol. 35, No. 1, pp. 87 - 90, Feb. 1993. [31] Klaus M. Dostert, "Frequency-Hopping Spread-Spectrum Modulation for Digital Com-munications over Electrical Power Lines," IEEE Journal on Selected Areas in Communi-cations, Vol. 8, No. 4, pp. 700-710, May 1990. [32] D.A. Douglass, "Potential transformer accuracy at 60 Hz voltages above and below rating and at frequencies above 60 Hz," IEEE Trans. Pwr. App. Syst., Vol. PAS-100, pp. 1370-1375, Mar. 1981. [33] M. Tanaka, "High Frequency Noise Spectrum, Impedance and Transmission Loss of Power Line in Japan on Intrabuilding Power Line Communications," IEEE Trans, on Con-sumer Electronics, Vol. CE-34, pp. 321-326, Nov. 1986. [34] A.A. Smith, "Power Line Noise Survey," IEEE Trans, on Electromagnetic Compatibility, Vol. EMC-16, pp. 31-32, Feb. 1972. [35] R. M. Vines, H. J. Trussell, L. J. Gale and J. B. O'Neal, "Noise on Residential Power Dis-tribution Circuits," IEEE Trans, on Electromagnetic Compatibility, Vol. EMC-26, pp. 161-167, Nov. 1984. [36] J. B. O'Neal, "The Residential Power Circuit as a Communication Medium," IEEE Trans, on Consumer Electronics, Vol. CE-32, No. 8, pp. 567-577, Aug. 1986. [37] N.C. Beaulieu and C. Leung, "Optimal Detection of Hard-Limited Data Signals in Differ-ent Noise Environments," IEEE Trans, on Communications, Vol. COM-34, No. 6, June Bibliography 88 1986. [38] N. C. Beaulieu, "Penalties of Sample-and-Sum and Weighted Partial Decision Detectors in Gaussian Noise," IEEE Trans, on Communications, Vol. COM-35, No. 8, Aug. 1987. [39] N. C. Beaulieu, "On the Performance of Three Suboptimum Detection Schemes for Binary Signaling," IEEE Trans, on Communications, Vol. COM-33, No. 3, Mar. 1985. [40] T. Zhong, "Hardware Schematic and Firmware Listing," Restricted publication, Electrical Engineering Department, University of British Columbia, Canada, May, 1996. A p p e n d i x A . B P S K C h i p P i n L a y o u t 0 0 @ 8 ©Hu^u* ® O Q Q 0 @ I 0 3 @ © '61** '60« Bottom View © ® @® ® ® ® ® ® © & © © © ® (51) f5Q f4&) f4S) f44^ ) #2; ,'40; •20; 122; [24 16 ^8 '30 i 3) 33) Pins not used Input pins **** ^ • j Output pins o 23 Power supply Pin number © © © # © 0 0 © © © © © © • © © © © © © ',21. '20. 23 i 29 31 |33 34 '22. (66) (67) © © OS (63) Top View (28) (30) •60. '61. 58 56) (57 32) W ® ® © © © g | .'3>, .'4'(f, .'Al, M) 6S) (48^  (54) (55) ® ® © 

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