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Performance evaluation of rate-based congestion control schemes for ABR service over broadband satellite… Zhang, Bin 1997

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Performance Evaluation of Rate-Based Congestion Control Schemes for ABR Service over Broadband Satellite Networks Interworking with ATM/B-ISDNs By Bin Zhang M . E n g . P r e c i s i o n Instrument E n g . , Tianjin University, Tianjin, C h i n a , 1990. B . E n g . Precision Instrument E n g . , Tianjin University, Tianjin, C h i n a , 1987.  A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENT FOR THE DEGREE OF MASTER OF APPLIED SCIENCE in  THE FACULTY OF GRADUATE STUDIES Department o f  ELECTRICAL ENGINEERING W e accept this thesis a s conforming to the required s t a n d a r d  THE UNIVERSITY OF BRITISH COLUMBIA A u g u s t 1997 © Bin Z h a n g , 1997  in presenting this thesis in partial fulfilment  of the requirements for an advanced  degree at the University of British Columbia, I agree that the Library shall make it freely available for reference and study. I further agree that permission for extensive copying of this thesjs for scholarly purposes may be granted by the head of .my department  or  by  his or  her  representatives.  It  is understood that  copying or  publication of this thesis for financial gain shall not be allowed without my written permission.  Department of  £f^4h^  The University of British Columbia Vancouver, Canada Date  DE-6 (2/88)  ^ ^ ^ , J ^ f  Abstract Asynchronous Transfer Mode (ATM) is an emerging networking technique which supports quality of service (QoS) guarantees for different traffic types. The Available Bit Rate (ABR) service is proposed to provide the efficient use of limited network resources for data traffic. For A B R service, A T M Forum has suggested the rate-based congestion control schemes: Explicit Forward Congestion Indication (EFCI, a binary feedback scheme) scheme, Explicit Rate (ER) scheme, and Enhanced Proportional Rate Control Algorithm (EPRCA). In addition, the segmented closed-loop scheme was also recommended to reduce the size of the control loop. In this thesis, the effects of satellite link (long delay) on the EFCI and E R schemes are analyzed by using calculation results. Based on the analytical results, the simulations of endto-end congestion control schemes are performed. For the EFCI scheme, both the calculation and simulation results show that the long delay will worsen the network performance in terms of buffer occupancy, link utilization and cell loss ratio (CLR). Our study also finds that the buffer threshold, buffer size in A T M switch, as well as the rate increase and decrease factors, will affect the buffer occupancy, link utilization and cell loss ratio in the various ways. Procedures are suggested to minimize the buffer requirement and maximize the link utilization with the required C L R and maximum link delay. Moreover, a delay-based method (DBCI scheme) is proposed to dynamically adjust the traffic rate in order to minimize the buffer requirement. For the E R scheme, since-the product of data rate and link delay in each A B R connection plays a key role on the buffer occupancy of the A T M switch, the delaybased adaptation method (DBER scheme) to reallocate the left-over bandwidth is proposed. Simulation results show that the suggested approaches can improve the buffer occupancy ii  efficiently when congestion happens. The generic and delay-based EPRCA schemes are investigated with different parameters in different links. Simulation results are compared and the delay-based EPRCA scheme is found to be a more efficient scheme. Furthermore, the segmented (double-loop) congestion control schemes are evaluated by simulations methods and analyzed with different combinations of EFCI and ER schemes. The results are compared with those of end-to-end (single-loop) schemes.  From the comparisons, the segmented  congestion control scheme is considered to be a better scheme in the long delay environment because it can respond to congestion more quickly and be able to distribute the queued cells (e.g. the long queue length occurred in the single loop scheme) into more ATM switches involved in the congestion.  iii  Table of Contents Abstract  ii  List of Figures  ix  List of Tables  xi  Acknowledgment Chapter 1  : . . . xiv Introduction .  1  1.1  Motivations  1  1.2  Objectives  4  1.3  C o n g e s t i o n Control in A T M Networks  6  1.3.1  A T M Architecture and S e r v i c e s  6  1.3.2  R a t e - B a s e d C o n g e s t i o n Control S c h e m e s for A B R S e r v i c e s  12  1.3.2.1  Binary F e e d b a c k S c h e m e s  13  1.3.2.2  Explicit F e e d b a c k S c h e m e s .  15  1.3.2.3  Combined Scheme  17  1.3.2.4  S e g m e n t e d C o n g e s t i o n Control S c h e m e  20  Outline of the T h e s i s  21  1.4 Chapter 2  . . .  Performance Evaluation of Binary F e e d b a c k S c h e m e . . . . . 2 3  2.1  Introduction  2.2  Estimation of Buffer Requirement of Binary F e e d b a c k S c h e m e  2.2.1  23  with Single Q u e u e M o d e l  24  Algorithm a n d A n a l y s i s  24  iv  2.2.2  Numerical Results  27  Configurations of Simulation M o d e l s  30  2.3.1  Network Modeling  30  2.3.2  G e n e r a l Simulation P a r a m e t e r s  32  2.3.3  Additional Simulation P a r a m e t e r s for D B C I S c h e m e  33  Simulations with Binary F e e d b a c k S c h e m e  34  2.3  ,  2.4  . . . . . . . . . . .  2.4.1  Algorithms u s e d in A B R S o u r c e s  2.4.2  Simulation Results  2.4.3  P r o c e d u r e s for Selection of S y s t e m P a r a m e t e r s  2.4.4  C o m p a r i s o n of Simulation a n d Analytical Results  42  D e l a y - B a s e d C o n g e s t i o n Indication (DBCI) S c h e m e  43  2.5.1  P r o b l e m s of CI S c h e m e with L o n g Link Delay  43  2.5.2  S u g g e s t e d Solution — D e l a y - B a s e d C o n g e s t i o n Indication  2.5  34 . . . . . . . . .  .  35 40  (DBCI) S c h e m e  43  2.5.3  Simulation Results  45 .  2.5.4  C o m p a r i s o n between D B C I and CI  50  Chapter 3  Performance Evaluation of E R S c h e m e  . 52  3.1  Introduction  52  3.2  Algorithms of E R S c h e m e  52  3.2.1  3.2.2  R e s o u r c e Reallocation Algorithms S u g g e s t e d by A T M Forum  52  G e n e r i c A B R S o u r c e B e h a v i o r s in E R S c h e m e  55  V  3.3  Estimation of Buffer S i z e in A T M Network with M a x - M i n Algorithm .  55  3.3.1  Effects of Product of S o u r c e Rate and Link Delay . . . . . . .  55  3.3.2  P r o b l e m s with G e n e r i c E R S c h e m e in B S N s Interworking with B-ISDNs  3.3.3  57  S u g g e s t e d Solution — T h e D e l a y - B a s e d Explicit Rate ( D B E R ) Algorithm  . . .  58  3.4  Configurations of the Simulation M o d e l  59  3.5  Simulation Results  60  3.5.1  Effect of the Product of D a t a Rate a n d Link Delay  60  3.5.2  Improvement by D B E R Algorithm  62  3.5.3  Performance C o m p a r i s o n  Chapter 4  .  70  Performance Evaluation of E P R C A S c h e m e . . . . . . . . . . .  71  4.1  Introduction . . .  71  4.2  M e c h a n i s m s of E P R C A  . . . . . . . .  71  4.2.1  E P R C A Scheme  71  4.2.2  Delay-Based E P R C A ( D B - E P R C A ) Scheme  72  Simulation Results  73  4.3.1  E P R C A with the S a m e P a r a m e t e r s for All A B R S o u r c e s . . .  73  4.3.2  E P R C A with the Different P a r a m e t e r s for A B R S o u r c e s  75  4.3.3  E P R C A and CI for Different A B R S o u r c e s  76  4.3.4  E P R C A a n d E R (or D B E R ) for Different A B R S o u r c e s . . . .  78  4.3  vi  ...  4.4  C o m p a r i s o n of CI, E R and E P R C A S c h e m e s  79  4.4.1  C o m p a r i s o n of G e n e r i c S c h e m e s  79  4.4.2  C o m p a r i s o n of D e l a y - B a s e d S c h e m e s  80  Discussion  81  4.5 Chapter 5  P e r f o r m a n c e Evaluation of S e g m e n t e d C o n g e s t i o n Control Schemes  82  5.1  Introduction  82  5.2  Configuration of Simulation M o d e l s  . 82  5.2.1  Network M o d e l  82  5.2.2  Simulation P a r a m e t e r s  84  5.3  Effects of L o n g Delay on D o u b l e - L o o p S c h e m e s  . . . . . . .  84  5.3.1  P e r f o r m a n c e of CI/CI S c h e m e  85  5.3.2  Performance of E R / C I S c h e m e  86  5.3.3  P e r f o r m a n c e of C I / E R S c h e m e  87  5.3.4  P e r f o r m a n c e of E R / E R S c h e m e  88  5.3.5  C o m p a r i s o n of Double L o o p S c h e m e s  89  5.4  C o m p a r i s o n of E n d - t o - E n d a n d S e g m e n t e d C o n g e s t i o n Control S c h e m e s  .90  5.4.1  CI and CI/CI S c h e m e s  5.4.2  E R and E R / E R S c h e m e s  91  Discussions  91  5.5  vii  . 90  Chapter 6  Conclusions  92  6.1  Summary  92  6.2  Future W o r k . . .  93  Bibliography  95  Appendix A  Acronyms  98  Appendix B  Calculation of C o n f i d e n c e Interval  102  Appendix C  Simulation M o d e l s in O P N E T . .  103  Appendix D  N o t e s on the Simulation M o d e l s U s i n g O P N E T .  107  viii  List of Figures Figure 1.1  Configuration of B S N s Interworking with B - I S D N s  2  Figure 1.2  A T M Protocol Structure  6  Figure 1.3  A T M C e l l header Format: UNI (left), NNI (right)  7  Figure 1.4  A T M Network Illustrations  9  Figure 1.5  M o d e l of B S N Interworking with an A T M / B - I S D N  12  Figure 1.6  Segmented Closed-Loop Model  21  Figure 2.1  Single Q u e u e M o d e l  24  Figure 2.2  Q u e u e Length with Various P a r a m e t e r s  27  Figure 2.3  Effects of Delay on Buffer O c c u p a n c y  29  Figure 2.4  Configuration of Simulation M o d e l for CI S c h e m e  31  Figure 2.5  Configuration of Simulation M o d e l for D B C I S c h e m e with Multiple A B R S o u r c e s  . .  31  Figure 2.6  Illustration of Delay Effects of CI S c h e m e  35  Figure 2.7  Effects of Delay o n Buffer O c c u p a n c y  36  Figure 2.8  Effects of Delay on Link Utilization  36  Figure 2.9  Effects of Buffer T h r e s h o l d on Buffer O c c u p a n c y . . . . . . . .  37  Figure 2.10  Effects of Buffer T h r e s h o l d on Link Utilization  38  Figure 2.11  Effects of AIR and R D F on Buffer O c c u p a n c y a n d Link Utilization  Figure 2.12  Effects of AIR and R D F on Buffer O c c u p a n c y a n Link Utilization  Figure 2.13  39  . . .  39  C o m p a r i s o n of Calculation a n d Simulation R e s u l t s ix  42  Figure 2.14  Buffer O c c u p a n c y with D B C I S c h e m e  .47  Figure 2.15  Link Utilization with D B C I S c h e m e  48  Figure 2.16  F a i r n e s s with D B C I S c h e m e  49  Figure 3.1  Simulation R e s u l t s with E R S c h e m e  61  Figure 3.2  Simulation R e s u l t s with D B E R S c h e m e : 7 = 0.3  Figure 3.3  Illustration of the Effects of 7 a n d A R  64  Figure 3.4  Effects of 7 on Buffer O c c u p a n c y  65  Figure 3.5  Effects of 7 on Link Utilization  65  Figure 3.6  Effects of 7 on F a i r n e s s  67  Figure 3.7  Effects of A R on Buffer T h r e s h o l d  69  Figure 3.8  Effects of A R on Link Utilization  69  Figure 3.9  Effects of A R o n F a i r n e s s  70  Figure 5.1  Configuration of A T M Network over Satellite  83  Figure 5.2  Effects of Delay on Buffer O c c u p a n c y at the G a t e w a y in  .62  Double L o o p M o d e l Figure 5.3  86  Effects of Delay on Buffer O c c u p a n c y at Switch 1 in Double Loop Model .  87  Figure 5.4  Effects of Delay on the Link Utilization in Double L o o p M o d e l  88  Figure 5.5  Effects of Delay o n the F a i r n e s s in Double L o o p M o d e l  89  Figured  '  ...  Configurations of Simulation Network M o d e l s .  103  Figure C . 2  Source/Destination a n d Switch N o d e  104  Figure C . 3  F S M of A T M Switch a n d A A L 5 P r o c e s s e s  105  Figure C . 4  F S M of A A L 5 P r o c e s s e s  106  X  List of Tables Table 1.1  A A L Service Classes  7  Table 1.2  T h e Functionality of A T M C e l l H e a d e r  8  Table 1.3  A T M Traffic P a r a m e t e r s  10  Table 1.4  A T M Layer Service Categories  10  Table 1.5  R M C e l l Fields  16  Table 1.6  P a r a m e t e r s in R a t e - B a s e d C o n g e s t i o n Control S c h e m e . . .  18  Table 2.1  P a r a m e t e r s U s e d in the Simulation  32  Table 2.2  Other P a r a m e t e r s U s e d in the Simulation  32  Table 2.3  C B R / V B R Traffic Rate  33  Table 2.4  P a r a m e t e r s for CI S c h e m e with 2 A B R S o u r c e s : Buffer T h r e s h o l d = 50 cells  Table 2.5  33  P a r a m e t e r s u s e d in Multiple A B R S o u r c e s M o d e l : T h r e s h o l d = 1000 cells  Table 2.6  34  Effects of Delay, Buffer T h r e s h o l d , A I R and R D F on Link Utilization and Buffer O c c u p a n c y  Table 2.7  40  Numerical R e s u l t s of S y s t e m Design P r o c e d u r e s : Delay (Source 1) = 0.25 s e c o n d  41  Table 2.8  Selection of a and p  45  Table 2.9  Simulation R e s u l t s of D B C I S c h e m e with 2 A B R S o u r c e s (AIR /RDF 0  0  = 2 0 0 / 6 4 ; D e l a y : 0.25 s (source 1), 0 s (source  2); T h r e s h o l d = 50 cells) xi  46  Table 2.10  Simulation R e s u l t s of D B C I S c h e m e with Multiple A B R Sources  50  Table 3.1  Effects of Product of Delay and Bandwidth with E R S c h e m e  57  Table 3.2  Rate C h a n g e s : delay 1 »  57  Table 3.3  Selection of 7 in D B E R S c h e m e : A R = 100 c e l l s / s e c . . . . .  Table 3.4  T h e Effect of the D a t a Rate and Delay on the Buffer Occupancy  Table 3.5  delay 2  59  . .  60  Simulation R e s u l t s for D B E R M e t h o d : A R = 100 c e l l s / s e c ; Delay with s o u r c e 1 = 0 s e c , 0.1 s e c , 0.25 s e c  66  Table 3.6  Effect of A R (7 = 0.1, Delay with S o u r c e 1 = 0.25 s e c o n d )  . 68  Table 4.1  T h e Conditions of Rate C h a n g e in E P R C A  Table 4.2  P a r a m e t e r s with S a m e E P R C A S c h e m e at S o u r c e s 1 & 2 . . 74  Table 4.3  Simulation R e s u l t s with S a m e E P R C A S c h e m e at S o u r c e s 1  72  & 2  74  Table 4.4  P a r a m e t e r s with Different E P R C A S c h e m e s at S o u r c e s 1 & 2  75  Table 4.5  Simulation R e s u l t s with Different E P R C A S c h e m e s at Sources 1 & 2  76  Table 4.6  P a r a m e t e r s with E P R C A & CI S c h e m e s at S o u r c e s 1 & 2 . . 77  Table 4.7  Simulation R e s u l t s with E P R C A & CI S c h e m e s at S o u r c e s 1 & 2  Table 4.8  77  P a r a m e t e r s with E P R C A & E R ( D B E R ) S c h e m e s at S o u r c e s 1 & 2  78  xii  Table 4.9  Simulation R e s u l t s with E P R C A & E R ( D B E R ) S c h e m e s at Sources 1 & 2  . . . .  79  Table 4.10  C o m p a r i s o n of E F C I , E R , and E P R C A S c h e m e  80  Table 4.11  C o m p a r i s o n of D B C I , D B E R , a n d D B - E P R C A S c h e m e . . . .  81  Table 5.1  C o m b i n a t i o n s of E F C I a n d E R S c h e m e s in D o u b l e - L o o p Model  83  Table 5.2  P a r a m e t e r s U s e d in the 2 - H o p Simulation M o d e l  84  Table 5.3  C o m p a r i s o n of D o u b l e - L o o p S c h e m e s  85  Table 5.4  Preliminary C o m p a r i s o n s of single-loop CI with double-loop CI/CI  90  Table 5.5  Preliminary C o m p a r i s o n of 1 - h o p E R with 2 - h o p E R / E R  Table B.1  9 9 % C o n f i d e n c e Interval of Simulation R e s u l t s  xiii  . . 91 102  Acknowledgment I would like to express my sincere gratitude to my research supervisor, Dr. Victor C. M . Leung, for his constant guidance and direction throughout the selection of my project, the course of research and the completion of this thesis.  I am also grateful to MIL3  corporation for the easy access to state-of-the-art simulation tool, OPNET, through the university consortium program, and the consistent help from its technical support group. Moreover, my acknowledgment goes to the Canadian Institute for Telecommunications Research and Motorola's Wireless Data Group for their support in the form of research assistantship provided by Dr. Leung. Finally, I would like to thank my wife, Xiaomei Ding, and my,family for their continuous encouragement and devoted support during my stay at UBC.  xiv  Chapter 1  Introduction  Chapter 1 Introduction 1.1 Motivations Asynchronous Transfer Mode (ATM) is a high speed packet-switched communication network protocol employing constant length packets called cells (53 bytes), intended for integrating various types of traffic with different Quality of Service (QoS) requirements into the future broadband integrated services digital networks (B-ISDNs). The A T M Forum has proposed the Constant Bit Rate (CBR) service intended for voice, video transmission and circuit emulation; Variable Bit Rate (VBR) service designed for compressed voice/video, frame relay and X.25 traffic; Available Bit Rate (ABR) service defined for data traffic, which requires no firm guarantee of bandwidth and can be sent at any rate which is satisfied by the network; and Unspecified Bit Rate (UBR), considered for applications such as file transfers which run in the background in workstations with minimal service requirements [1] [2]. Among them, A B R is the most commonly used service category for data traffic since it allows the A T M network to maximize the link utilization by reallocating the link rate not used by C B R and V B R applications to the A B R data sources. Since A B R traffic is designed to make full use of the bandwidth left-over by C B R and V B R traffic, the ability of its rate adjustment in case of network congestion and starvation will definitely affect the performance of an A T M network. The A T M Forum has chosen the rate-based congestion control scheme for A B R traffic, i.e., the active A B R traffic sources will contend for the available bandwidth according to the request of the individual connection, and the sources will adapt their rates by the congestion feedback information contained in the Resource Management (RM) cells [3]. The closed-loop congestion control schemes 1  Chapter 1  Introduction  [4] [5] mainly include the binary feedback schemes — the Explicit Forward Congestion Indication (EFCI) scheme and Proportional Rate Control Algorithm (PRCA) scheme; the Explicit Rate (ER) scheme; and the combination of P R C A and E R — Enhanced Proportional Rate Control Algorithm (EPRCA). In order to reduce the round trip delay of the single-loop end-to-end congestion control method, the segmented hop-by-hop congestion control scheme is proposed for situations where a long delay is involved in the networks [6] [7]. In [8] and [9], the behaviors of the segmented congestion control scheme in wide-area A T M networks are described and analyzed. The buffer requirements in A T M switch are discussed in [10]. The typical congestion control schemes will be introduced in the latter part of this chapter.  22,000 miles = 125 ms  Src  r  *  ATM Switch  ATM Switch B-ISDNs  Figure 1.1 Configuration of BSNs Interworking with B-ISDNs  Satellite systems are deployed to provide broadcast point-to-multipoint and point-to-point network connections for extending communications services to remote users and mobile users (see Figure 1.1) [11]. For geosynchronous satellites, the end-to-end link delay introduced by one satellite link is around 250 ms [12] [13]. Since future broadband satellite networks (BSNs) need to be interconnected with terrestrial ATM/B-ISDNs in order to facilitate service access  Chapter 1  Introduction  and end-to-end communications, rate-based congestion control schemes will be applied in such long delay networks for the data applications. In such a scenario, the delay experienced by the R M cells could be very large; thus, the sources usually cannot sense the congestion status of the network in time. This may worsen the congestion situation and lead to a fast increase in cell loss ratio (CLR) due to overflowed buffers.  In order to respond to the  network's congestion quickly, the R M cells should be tagged with higher priority than the data cells [14]. On the other hand, in BSNs interworking with ATM/B-ISDNs, the link delay should be taken into account in order to improve the performance of the rate-based congestion control schemes. Some theoretical analysis and calculation results regarding the effects of the round trip time (RTT) and the rate control parameters on the buffer requirement in A T M switches by using the closed-loop rate-based control schemes have been presented in [15] and [10]. These results show that the required buffer size increases with the feedback delay, the number of connections, and the rate of the source while a 0 - 10 ms RTT is present. In BSNs, the satellite links have much longer propagation delays — the RTT is around 500 ms [13]. Therefore, the effects of long delay on the performance of rate-based congestion control in BSNs interworking with ATM/B-ISDNs, such as buffer requirements, link utilization, and fairness, are the main issues to be investigated in this thesis. Since few results could be found in the literature, and in most cases analyses are not tractable, single loop end-toend and double loop segmentation control schemes are investigated in this thesis mainly by simulation method based on network models implemented using the OPNET simulation tool and C language.  3  Chapter 1  Introduction  1.2 Objectives With the motivations described above, in this thesis, an in-depth study of the effects of the long delay on the performance of the end-to-end rate-based congestion control schemes in BSNs interworking with ATM/B-ISDNs is provided by analytical and simulation approaches. For end-to-end rate-based control mechanisms such as EFCI, E R and E P R C A , the throughput, cell loss ratio, buffer threshold, buffer occupancy at the A T M switches and gateway, and the rate control parameters of A B R sources are of much interest. Procedures to optimize the buffer requirement, link utilization and throughput based on the required C L R and the delay are proposed for the EFCI scheme. Also, the effects of the product of the data rate and delay :  on the buffer occupancy are examined for the ER scheme. Moreover, the improvements using round trip delay information (called delay-based scheme) included in R M cells for each A B R source for EFCI, ER and E P R C A mechanisms are proposed and evaluated to deal with the long delay problem in BSNs interworking with ATM/B-ISDNs [16] [17]. Besides the single loop end-to-end congestion control methods, a more efficient and complicated double loop segmented congestion control scheme is considered for networks with long delays such as BSNs interworking with B-ISDNs [4] [6] . In this thesis, the different combinations of EFCI and E R in double loop congestion control are studied with the satellite link constituting one loop and the terrestrial network constituting the other loop. The performance of the different double loop schemes are evaluated and compared, and the optimal combination of EFCI and E R schemes in different situations is suggested. Moreover, the comparisons of single loop and double loop control schemes are provided. With the problems and possible research approaches mentioned above, the detailed objectives of this thesis are described as follows. 4  Chapter 1  Introduction  1. Study the effects of delays on A T M rate-based congestion control schemes including EFCI, E R and E P R C A , applied in BSNs interworking with ATM/B-ISDNs, in terms of buffer requirement, throughput, link utilization and fairness using both the theoretical analysis and simulation method. 2.  Suggest procedures to minimize the buffer requirements and maximize the link  utilization according to the required C L R and possible link delay for single-loop end-to-end EFCI schemes based on the results of analyses and simulations. 3. Propose delay-based algorithms to dynamically modify the A B R source parameters for EFCI, E R and E P R C A schemes based on the round trip delay of each A B R source involved in the congestion, so as to improve the buffer occupancy at the congested A T M switch, without significantly affecting the throughput, link utilization and fairness. 4. Investigate the behaviors of the double-loop rate-based congestion control schemes in BSNs interworking with ATM/B-ISDNs; and suggest an optimal double-loop congestion control scheme. Compare the performances of the single-loop and double-loop schemes. In the thesis, C B R and V B R data sources are used to generate constant and bursty background traffic [18]. In our C B R / V B R model, only low to high rate changes are considered since we focus on the delay effects on the rate-based congestion control schemes. Moreover, A B R sources with different link delays are included in our studies. Since BSNs interworking with B-ISDNs involve very large delays, in our model, end-to-end link delays up to 250 ms [13] [14] are considered. To simplify the complexity of our simulation model, 3 - 5 A T M switches and 3 - 5 source-destination pairs are implemented.  5  Chapter 1  Introduction  1.3 Congestion Control in ATM Networks 1.3.1 ATM Architecture and Services A T M networks operate in connection-oriented mode which requires a connection (via virtual path (VP) and virtual connection (VC)) to be set up in advance to satisfy the specified service requirement and traffic parameters before a two-end system can communicate: The A T M protocol reference model consists of three layers located at the bottom of the open system interconnect (OSI) protocol architecture: the A T M adaptation layer (AAL), the A T M layer, and the physical layer, as shown in Figure 1.2. A T M End System  A T M End System  A T M Adaptation L a y e r (AAL)  A T M Adaptation Layer (AAL)  A T M Layer Physical Layer  A T M Layer Physical Layer  A T M Layer Physical Layer  • i  I  •  !  't  Physical Medium Figure 1.2 A T M Protocol Structure  The A A L is designed to connect the upper layer protocols with the lower A T M layer by segmenting the packets from a higher layer into cells, and reassembling the cells from the A T M layer into the packets which the higher layer can process. This procedure is called Segmentation and Reassembly (SAR). There are four types of A A L s defined to support different types of QoS. Table 1.1 shows the service classes and their associated A A L s . A A L 1 is used to support C B R services, and A A L 2 supports real-time V B R services. The AAL3/4 and A A L 5 . support packet based information transfer. Because of the high complexity of  6  Chapter 1  Introduction  AAL3/4 protocols, the A A L 5 protocol is often used to support connection-oriented  and  connectionless data services [1] [19]. Table 1.1 A A L Service Classes  Class D  Class A  Class B  Bit Rate  Constant  Variable  Connection Mode  Connection-Oriented  Applications  Voice Video, Circuit Emulation  Compressed Voice or Video  Frame Relay, X.25 Traffic  SMDS, L A N Traffic  A A L Type  AAL1  AAL2  AAL3/4 and AAL5  AAL3/4 and AAL5  ?  Class C  Connectionless  The main functions of the A T M layer are cell-based fast packet switching and statistical multiplexing of multiple traffic types. The A T M layer is responsible for sending cells from the A A L to the physical layer, and from the physical layer to the A A L . It also .provides the buffers for the incoming cells, performs traffic management functions such as cell loss priority marking, congestion indication, and generic flow control access. Moreover, it monitors the transmission rate to ensure conformance to traffic policing. The functionality of the A T M Bits  8  -+—•  S O  1  1  GFC  VPI  1  2  VPI  VCI  2  VCI  4 c  05  VCI  PTI  Bits  8  CLP  tj  A 4  1  VPI VCI  VPI VCI VCI  PTI  HEC  HEC  Payload  Payload  53  CLP  53 Figure 1.3 A T M Cell header Format: UNI (left), NNI (right)  layer is defined by the fields in the A T M header. There are two formats for A T M cell headers. One is used at the user-to-network interface (UNI), and the other one is applied  7  Chapter 1  Introduction  at the network-to-node interface (NNI), as shown in Figure 1.3. The function of each field in the A T M cell header is summarized in Table 1.2 [1] [20]. The A T M network interfaces are described in Figure 1.4. Table 1.2 The Functionality of A T M Cell Header  Field  Full Name  Length  Function  (bits) GFC VPI VCI  Generic Flow  4 (in U N I  Control the amount of traffic entering the  Control  only)  network at UNI.  Virtual Path  8 (UNI) 12 Associate each cell with a particular circuit.  Identifier  (NNI)  Virtual Channel  16  Associate each cell with a particular channel.  3  Distinguish between cells caning user data  Identifier PTT  Payload Type Indicator  CLP  Cell Loss Priority  and cells containing control information. 1  Provide the network with a selective discard capability.  HEC  Header Error Check  8,  Reduce errors in the header that cause a misrouting of the cell for one user into another user's data stream.  Generally, in A T M networks, in order to avoid congestion, Call Admission Control (CAC) is used to determine if a new connection is accepted by the network during call setup. C A C ensures that the injected traffic does not exceed the link capacity. While initializing a connection on an A T M network, a variety of traffic parameters (as shown in Table 1.3) could be specified according to the input traffic characteristics arid the desired QoS [6]. The traffic management specification T M 4.0 developed by the A T M Forum specifies five categories of service: CBR, real-time V B R (rr-VBR), non-real time V B R (nrtVBR), A B R , and U B R [1]. The QoS parameters for these service categories are summarized 8  Chapter 1  Introduction  in Table 1.4. To provide a guaranteed QoS, a traffic contract is established during connection setup, which contains a connection traffic descriptor and a conformance definition. Generally, the required QoS is defined by specifying one of the 5 categories mentioned above. Among the five service categories, the A B R service has been specifically designed for efficient handling of data traffic. Although the A B R class does not require the cell transfer delay and explicit C L R (such as that included in the explicit traffic contract as used in V B R service) to be guaranteed, it is desirable for switches to minimize the delay and loss as much as possible.  Regional Carrier  L o n g Distance Carrier  Public UNI Digital Service Unit *  Public Switch  Public UNI Private Switch  Private NNI  Private Switch  Private UNI  Computer  Router  Private UNI  Computer  Figure 1.4 A T M Network Illustrations 9  Computer  Chapter 1  Introduction  Table 1.3 ATM Traffic Parameters  Parameters  Descriptions  PCR  Peak cell rate  SCR  Sustained cell rate  CLR  Cell loss rate  CTD  Cell transfer delay  CDV  Cell delay variation.  CDVT  Cell delay variation tolerance  BT  Burst tolerance  MBS  Maximum Burst size  MCR  Minimum cell rate Table 1.4 ATM Layer Service Categories [1]  Attributes  A T M Layer Service Category CBR  rt-VBR  nrt-VBR  UBR  ABR  specified2  specified3  Traffic Parameters: PCR and CDVT (4,5)  specified  SCR, M B S , CDVT (4,5)  N/A  MCR4  N/A  PCR  N/A  Specified  SCR  N/A  specified  QoS Parameters: peak-to-peak C D V  specified  specified  unspecified  unspecified  unspecified  max C T D  specified  specified  unspecified  unspecified  unspecified  CLR4  specified  unspecified  see note 1  unspecified  unspecified  specified  Other Attributes: Feedback  Notes: 1. CLR is low (could be zero if the sources' response for feedback congestion status are quick enough) for sources that adjust cell flow in response to control information. Whether a quantitative value for CLR is specified is network specific. 10  Chapter 1  Introduction  Table 1.4 (Continued) ATM Layer Service Categories 2. May not be subject to CAC and UPC procedures. 3. Represents the maximum rate at which the ABR source may ever send. The actual rate is subject to the control information. 4. These parameters are either explicitly or implicitly specified for PVCs or SVCs. 5. CDVT is not signaled. Different values of CDVT may be specified for SCR and PCR. In general, CDVT need not have a unique value for a connection. Different values may be applied at each interface along the path of a connection. The traffic contract includes the specifications for the PCR, C D V , and the confirmation definition.  Usage Parameter Control (UPC) is performed on virtual channel connections  (VCCs) at V C switches and on virtual path connections (VPCs) at V P switches. U P C monitors the PCR of the cell flow to ensure that a user never exceeds the traffic contract for a connection. Moreover, U P C also monitors the V P I and V C I of A T M cells passing through a switch [21]. When the input rate at the A T M switch is larger than the available link capacity (output rate), congestion happens [1]. For V B R service, the U P C function may implement the Generic Cell Rate Algorithm (GCRA), which is used to perform the confirmation check on the cell arrival times. One way of implementing the G C R A is as a continuous-state Leaky Bucket Algorithm [1]. A l l arriving cells are put into a bucket, which leaks at a specified rate. If the bucket overflows, the newly arrived cells will become non-conforming and may or may not be admitted into the network. The admitted non-confirming cells will be marked in the cell loss priority (CLP) bit and will be the first to be dropped in case of overloading. Thus, the C L P bit provides the network with a selective discard capability. For A B R service, most congestion control schemes handle the congestion problem by reducing the input rates to match the available link rate. In the next section, the typical rate-based congestion control methods will be described in details.  11  Chapter 1  Introduction  1.3.2 Rate-Based Congestion Control Schemes for ABR Services The rate-based congestion control algorithm was proposed by the A T M Forum as a way to support A B R service [1]. The main goal of rate-based congestion control is to define a flexible traffic management scheme to make full use of the excess bandwidth left over by the C B R and V B R traffic. The available bandwidth is shared among the active A B R connections. Figure 1.5 shows the main elements of a B S N interworking with an A T M / B ISDN via a gateway, implementing a closed-loop control scheme that dynamically adjusts the traffic flow between various A B R source-destination pairs. Due to the fluctuating nature of V B R traffic, the A B R traffic rate is dynamically adjusted throughout the whole connection period. The performance of the network depends on how well the sources can adapt their R M Cells  Figure 1.5 Model of BSN Interworking with an ATM/B-ISDN  rates with the available bandwidth. Because of the existence of inevitable delays (propagation, processing, and queueing delays) along the path, the bandwidth mismatch will definitely result in overloading or underloading of the congested switch. This will increase the queue size at the related A T M switch buffer or reduce the link efficiency respectively. Thus, the required 12  .  '  Chapter 1  Introduction  amount of buffering should be proportional to the product of the bandwidth mismatch and round trip feedback delay [10] [22]. Since large queues may be possible, the network cannot guarantee the bounds on end-to-end delays and cell delay variations for A B R service. The rate-based congestion control mechanisms are determined by the well defined characteristics of the Source End System (SES), Destination End System (DES), and A T M switch. SES sends out data cells and Resource Management (RM) cells to the DES. The switches within the network monitor the congestion status through the queue length, queue growth rate or the input and output rates and then mark the header of data cells or R M cells. The DES returns the R M cells to the SES with the required feedback information after receiving the data cells or R M cells. By the congestion indication included in the feedback cells, the SES adapts its traffic rate accordingly to match the available bandwidth in the network. In A T M networks, there are two typical close-loop congestion control mechanisms: end-to-end congestion control method and segmented congestion control method. As suggested by the A T M Forum, the end-to-end congestion control mechanism has three implementations — binary feedback scheme, explicit rate scheme and combined scheme.  1.3.2.1 Binary Feedback Schemes For binary feedback schemes, the A T M switches perform two important functions [1]: a) detect incipient congestion; and b) provide binary feedback to the source. Here are some examples. 1. EFCI Scheme In this scheme, network congestion is detected by setting the binary indicator CI included in the CI field of the data cell header. The initial value of CI is 0. Once congestion occurs 13  Chapter 1  Introduction  along the connection, CI is changed to 1 by the congested A T M switch. When the destination receives a data cell with 1 in the CI field, it will send out a R M cell to inform the corresponding source to reduce its traffic rate. If there are no R M cells received within a period of time, the source will increase its rate with a fixed amount. Otherwise, the source will decrease its rate multiplicatively [4]. More details are provided in Chapter 2. Due to the nature of the negative feedback, the sources will continue to increase their rates and worsen congestion when the R M cells are lost. Another drawback is that long connections have greater chances of congestion for they pass through more switches, resulting in unfairness of rate allocation, and the connection will be driven down or "beaten down" to their minimum cell rates permanently [23]. The beat down problem.is caused by the different path delays of virtual connections traversing a series of nodes. Ideally, the virtual connections should acquire their fair share bandwidth in the long term. But, in fact, the virtual connections with long delays are more likely to get a congestion indication in their R M cells than those with shorter path delay. Therefore, the virtual connections with longer path delay have fewer chance to increase their rate and will be easily driven down to their minimum cell rates permanently. Moreover, it is said that fairness among different connections could be achieved only when the system parameters are identical [20]. 2.  P R C A Scheme  In the proportional rate control algorithm (PRCA) [5], the feedback is changed from negative to positive, i.e., R M cells are sent backward to the source only in the absence of congestion, and sources keep decreasing their rate exponentially until a R M cell arrives. Another change is that the source generates a data cell with.C/ = 0 every Nrm-1 data cells with CI = 1. The destination only generates and sends a R M cell to the source for each 14 •  Chapter 1  Introduction  received cell with CI = 0. In PRCA, the additional R M cell traffic becomes simple and scalable for it can be calculated as a fixed portion of the total traffic. Although P R C A introduces some good points as mentioned above, it still has some serious problems. First, like the EFCI scheme, a longer connection path is more likely to suffer congestion than a shorter path. Then, the source with the longer path will be more likely to reduce its rate than the other sources. Second, lower-rate sources have fewer opportunities for rate increase. These w i l l result in unfairness [4]. 3. Generic EPRCA Scheme Since this binary feedback scheme is an option of the enhanced proportional rate control algorithm (EPRCA), it will be introduced in the combined scheme. Due to its simplicity and efficiency, the generic E P R C A binary feedback scheme is used in our simulations.  1.3.2.2 Explicit Feedback Schemes For explicit feedback schemes, the A T M switches perform three important functions [1]: a) Compute the fair share of the bandwidth for a V C that can be supported; b) Determine the load; and c) Determine the actual explicit rate and send this information to the source. Here are some examples. 1. ER Scheme The explicit rate (ER) feedback scheme [24] [25] was developed as an extension to the DEC-bit scheme [26]. Since the A T M network is connection-oriented, the nodes could provide more information in addition to the binary feedback than in the DEC-bit scheme. In the E R scheme, the source generates a forward R M cell every Nrm-1 data cells, with an appropriate E R field which could be modified by the resource reallocation algorithm in the 15  Chapter 1  Introduction  congested A T M switch. The description of each field in the R M cell is provided in Table 1.5. The R M cells will be returned back to the source when the destination receives them. The source will adjust its cell rate with the feedback explicit rate indicated in the E R field of the R M cells. Related resource reallocation algorithms will be discussed in Chapter 3. Table 1.5 R M Cell Fields  DIR  Direction of the R M cell (forward or return).  CI  Congestion indicator (0=no congestion, l=congestion).  BS  Block Start bit ( 1 for start of new block after idle, else 0).  CCR  Current Cell Rate in effect when forward R M cell is generated.  MCR  Minimum Cell Rate, put in by source.  ER  Explicit Rate, initially set to PCR, and possibly modified downward by intermediate nodes along the path.  The E R scheme has several advantages over to the binary feedback scheme. First, it eliminates the typical rate oscillations caused by the gradual rate increment and decrement. Second, its performance is not degraded by the R M cell loss. Third, it is more robust in reaching fairness in terms of differences of the initial data rates, and in terms of the feedback delays in different A B R sources [6].  2. E R I C A Scheme The Explicit Rate Indication for Congestion Avoidance (ERICA) algorithm was proposed to deal with the fair share and efficient allocation of the available bandwidth to all contending sources. Similar to the E R algorithm, it needs to monitor the current available bandwidth and. the demand for the bandwidth at the queueing point. It uses the load factor and fair share to indicate the congestion status for sources. The detailed algorithms, switch pseudo-code and performance are described in [27] [28] [29]. Since this project is focused on the long 16  Chapter 1  Introduction  delay effects on A B R congestion control, in this thesis, we just use E R scheme as a sample of explicit feedback schemes in dealing with long delay. 1.3.2.3 Combined Scheme  — E P R C A Scheme  By combining the P R C A and E R congestion control schemes together, a more efficient and flexible congestion control method, called the enhanced proportional rate control algorithm (EPRCA) was obtained [1] [4]. In the E P R C A scheme [30], all data cells are generated with CI = 0, which will be changed to CI = I when the data cells go through a congested node. In addition to this implicit CI bits, an R M cell is inserted into the traffic stream every Nrm-1 data cells. In each R M cell, the end-to-end congestion information shown in Table 1.5 is placed in its payload. Each R M cell is generated by the source with CI = 0. The CI bit might be modified at the destination when the previous data cell is marked with CI = 1. Another option is that the congested node will change the CI bits when R M cells pass by. Moreover, the congested node will reallocate the available bandwidth to the active A B R sources according to the corresponding algorithms. The reassigned rate is used to modify the ER field in the R M cell. When the source receives the R M cell, it will adjust its rate by using the feedback information. Normally, generic E P R C A scheme just uses the DIR and CI fields of the R M  1  cells. The main difference between the generic E P R C A scheme and P R C A scheme, is that there are no forward R M cells in P R C A scheme. In addition to the generic E P R C A scheme, the optional E P R C A scheme makes use of a more complex R M cell format with DIR, CI, ER, CCR, and M C R included. Since E P R C A is a more flexible rate-based traffic management scheme, the operation of E P R C A is described in detail as follows [31] [32]. 17  Chapter 1  1.  Introduction  Call Setup  When an A B R data call arrives, the source creates a connection with a call setup request. The A B R parameters are identified during this call setup. A set of parameters currently considered are described in Table 1.6. Some values are requested by the source and possibly modified by the network (e.g., PCR or MCR), while others are direcdy chosen by the network (such as AIR, Nrm, or RDF). Table 1.6 Parameters in Rate-Based Congestion Control Scheme Name  Field  Units  Full name  Comments  length PCR  16 bits  Cells/s  Peak cell rate  Will be placed by network  MCR  16 bits  Cells/s  Minimum cell rate  Will be guaranteed  ICR  16 bits  Cells/s  Initial cell rate  Start up rate after source being idle  AIR  16 bits  Cells/s  Additive increase to rate  Rate increase permitted  Nrm  8 bits  Cells  Number of cells/RM  Nrm=2~N Data cells between R M cells  RDF  8 bits  None  Rate decrease factor  RDF=2"RD Used when EFCI bit set or RMs delayed  2.  Cell Transmission  When the source gets permission, it starts to transmit the cells. The data rate allowed for an A B R source is given by the Allowed Cell Rate (ACR). The A C R is initially set to the Initial Cell Rate (ICR) and is always bounded between the Minimum Cell Rate (MCR) and the Peak Cell Rate (PCR). Transmission is initiated by sending an A T M Resource Management (RM) cell followed by data cells. The A B R source will continue to send an R M cell after every Nrm -1 data cells are transmitted. The source rate is regulated by the return of these 18  Chapter 1  Introduction  R M cells, which contain the information listed in the Table 1.5 [6]. 3. Rate Allocation and Regulations The rate at which the source may transmit cells (the A C R ) is placed in the C C R fields of the R M cell, and the rate at which it wishes to transmit cells (usually the PCR) in the ER field. When the R M cell travels forward through the network, it provides the switches with information to be used in determining the allocation of bandwidth among various A B R connections. Switches may also decide at this time to reduce the value of the explicit rate indication field ER, or set the Congestion Indication bit CI - 1. When congestion occurs, switches that only support the binary feedback mechanism will ignore the content of the R M cell. When the R M cell arrives at the destination, the destination will change the direction bit in the R M cell and return the R M cell to the source. If the destination is congested and cannot support the rate in the ER field, the destination should then reduce E R to whatever rate it can support. If the destination had observed a set CI bit in the last data cell received when returning a R M cell, it will set the R M cell's CI bit to indicate congestion. As the R M cell travels backward through the network, each switch may examine the cell and determine if it can support the indicated ER, for this V C . If E R is too high, the switch should reduce it to the rate that it can support. No switch should increase the ER, since prior switch congestion information then would be lost. The switches should try to modify the ER for only those VCs for which it is a bottleneck, since this promotes a fair allocation of bandwidth. Also, switches should modify the CI and E R contents of the R M cells traveling on either their forward or backward journeys, but not on both. When the R M cell arrives back to the source, the source should reset its rate, A C R , 19  Chapter 1  Introduction  based on the information carried back by the R M cell. If the congestion indication bit is not set (CI = 0), then A C R is allowed to increase up to the E R value returned, but never exceeding PCR. If the congestion indication bit is set (CI = 1), then an automatic decrease in the A C R is allowed to occur; the A C R is further decreased to the returned ER, although never below the M C R . It should be pointed out that the response time = max {feedback delay, inter-RM cell time}. In order to control connections more fairly and flexibly, the node (switch) could keep track of the mean A C R (MACR) by using a running exponential weighted average and calculated as M A C R = ( 1 - G O M A C R + a A C R , where a is generally chosen to be 1/16. The fair share A C R of each link could be calculated as a fraction 7/8 of the M A C R [1]. As the switch receives R M cells, it will continually updates the M A C R with the new A C R values. The source with A C R greater than M A C R will be required to slow down by feedback information [4]. Another approach of fair share calculation, called the O S U (Ohio State University) scheme, is introduced in [33].  1.3.2.4 Segmented Congestion Control Scheme When the round trip delay becomes very large, the end-to-end control method is considered inefficient for congestion control. This problem is solved by breaking the network into smaller segments and letting the switches act as virtual sources and virtual destinations as shown in Figure 1.6 [8]. The A T M switch in the network works as a destination to send back the R M cells for loop 1, and as a source to generate the R M cells in loop 2. The idea of virtual source/destination reduces the loop delay and enables the different segments to apply the proper congestion control schemes [7]. 20  Chapter 1  Introduction  A T M Switch Loop 1  Source  Virtual Source  Virtual Dest.  Loop 2  Destination  Figure 1.6 Segmented Closed-Loop Model  We have mentioned that, for end-to-end congestion control, two main closed-loop control methods have been proposed by the A T M Forum for A B R traffic: binary and explicit feedback schemes. Based on these two mechanisms, we implemented four rate-based double-loop congestion control schemes with various combinations of Generic E P R C A and E R schemes.  1.4 Outline of the Thesis Chapter 2 presents the theoretical analysis of buffer requirement in the A T M switch. Based on the analytical results, simulations are performed and discussed for the binary feedback scheme (generic E P R C A scheme). Procedures to optimize the network performance are suggested.  In order to reduce the buffer requirement, a delay-based generic E P R C A  algorithm is proposed to adjust the A B R source rate with dynamic source rate increase and decrease factors. Chapter 3 describes the effects of the product of delay and bandwidth on E R scheme in BSNs interworking with B-ISDNs. A delay-based source rate adjustment algorithm for E R scheme is provided to reduce the buffer occupancy. Chapter 4 evaluates the performance of E P R C A scheme by combining the binary (generic E P R C A scheme) and explicit feedback schemes. A rate adjusting algorithm based on the round trip delay, CI bit and E R (fair share) is suggested to deal with the problems caused by long delay. 21  Chapter 1  Introduction  Chapter 5 provides the double-loop rate-based congestion control models, parameter sets, and simulation results. The performances of various double-loop schemes are compared and the optimal double-loop scheme is recommended. At the same time, the comparisons of single-loop and double-loop congestion control schemes are performed. Chapter 6 concludes the research work and discusses the remaining problems, and directions for future work.  22  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Chapter 2 Performance Evaluation of Binary Feedback Scheme 2.1 Introduction In this chapter, we will study the performance of the generic E P R C A scheme (since it is a binary Congestion Indication feedback scheme, hereafter we call it the CI scheme) in BSNs interworking with B-ISDN by simulations. As seen in the last chapter, the binary feedback scheme is a simple approach to control traffic, which uses the CI bit in the data cells or R M cells to indicate the congestion state. Since the congestion information is implicit, the A B R sources cannot adjust their rates accurately. Furthermore, the inevitable feedback delay in BSNs interworking with B-ISDNs will cause a mismatch of the current data rate and available link rate. In BSNs, the up-down delay (from earth station to satellite and from satellite to earth station) is as high as 250 ms [12] [13], which is much higher than the terrestrial propagation delay. In this scenario, the rate-based congestion control scheme will become not efficient in terms of buffer requirement and link utilization [10] [34]. In order to evaluate the performance of the CI scheme, both theoretical analysis and simulation are conducted to investigate the effects of various control parameters on the buffer occupancy, throughput, link utilization, cell loss rate, and fairness. To reduce the buffer requirement in case of congestion, a modified R M cell format is proposed to dynamically modify the rate increase factor (AIR) and rate reduction factor (RDF) according to the round trip delay o f each link. Here, we call the new binary feedback scheme the Delay-Based Congestion Indication (DBCI) scheme. Finally, the performance of CI and DBCI is compared and discussed. 2 3  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  2.2 Estimation of Buffer Requirement of Binary Feedback Scheme with Single Queue Model 2.2.1 Algorithm and Analysis In this part, we will use the single queue model to analyze the effects of various delays, buffer thresholds, and rate adjustment factors AIR/RDF on the buffer occupancy. The model is shown in Figure 2.1. In this model, two persistent (greedy) A B R sources send data through an A T M switch to the destination. Since the traffic goes across a bottleneck link, the A B R sources will contend for the limited link rate (LR) by adjusting their rates according to the CI bit in the feedback R M cells.  SES 1 DES SES2  t_1  t_Q  t_2  Figure 2.1 Single. Queue Model  The A T M Forum has defined the behaviors of the Source End System (SES), Destination End System (DES) and Switch for the rate-based congestion control mechanisms [31], which are described in Chapter 1. The congestion status is detected by monitoring the current queue length against the buffer threshold of the switch. Normally, the CI bits of R M cells are initially set to 0. When R M cells pass through a congested A T M switch, the CI bits are modified to 1 and kept unchanged until the R M cells are sent back to SES. 24  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  In our model as shown in Figure 2.1 (where the Link Rate is LR), the SES will modify its A C R according to the CI bit in the backward R M cells as follows: When CI = 0 : ACR  = min(PCR,ACR  + Nrm-AIR)  (1)  ACR — ACR/RDF)  (2)  where A I R is the rate increase factor. When CI = 1 : ACR  — max(MCR,  where R D F is the rate decrease factor. The instant A C R is expressed by the following differential equations. C A S E 1: Network is in the normal state When the A T M switch buffer is not empty, the A C R will be increased by NrmxAIR each time an R M cell is received. Assume each source has the same rate, thus the arrival rate of R M cells is LR/(2Nrm). Thus, the increasing rate of A C R is given by dACRjt) dt  _ LR AIR 2  (3)  The solution is obtained as: ACR(M)  = min^PCR,  ACR(t) + ^  • AIR • A t j  (4)  where t is the time when the backward R M cell is detected at the corresponding state, and At is the elapsed time until the next R M cell is received. When the A T M switch buffer is empty, the arrival rate of R M cells at time t depends upon the ACR of the SES r =t_l + t_Q + t_2 time units before, i.e., ACR(t - r ). Therefore, 25  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  the differential function can be expressed by dACR(t) dt  = ACR(t-r)  • AIR  (5)  The solution is : ACR(At)  = min{pCR,ACR{t)  where '8 is the root of 8 = AIRxe~P  T  • e^ *}  '  A  (6)  [10].  C A S E 2: Network is in the congestion state When congestion occurs, the ACR is reduced at the arrival rate of feedback R M cells in a multiplicative manner. The decreasing rate is given by dACRjt)  _  —^—  --ACR(t)  LR •  2  ^  R  D  (7)  p  The equation is solved by ACR(At)  = max^MCR,  ACR(t) •  e  - ^  L r  R m  R D F  A  ' j  (8)  In order to calculate the queue length, we just consider the congestion status and buffer occupancy each time an R M cell is returned to its source. According to the relations between ACR and R M cell interarrival time A r derived above, we can calculate the total number of newly generated cells before the total ACR is reduced to be equal or less than LR. Thus, given the link delay, current buffer occupancy, and input and output rates, the peak queue length in the A T M switch can be obtained. With the procedures introduced above, the theoretical queue length can be calculated with different set of parameters. In our example, the maximum queue length of A T M switch buffer with various delay, Qth (buffer threshold), AIR and RDF are estimated while PCR 26  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  is set to be 2000 cells/s (0.848 Mbps) and LR is 2830 cells/s (1.2 Mbps). The results are shown in Figure 2.2.  M a x i m u m  Q u e u e  L e n g t h  v  s  D e l a y  3 5 0  0 . 0 5  0 . 1  0  .  1  5  D e l a y  0  .  2  0 . 2 5  0  .  3  0 . 3 5  ( s e c )  Figure 2.2 Queue Length with Various Parameters  2.2.2 Numerical Results 1. Effects of Delay Obviously, the queue length increases when a longer delay is experienced by some connections, as shown in Figure 2.2. In order to explain it more clearly, consider the situation in Figure 2.3 with respect to the model in Figure 2.1. Assuming the delays with source 1 and source 2 are 0 and 7 ms respectively, and both sources could reach their P C R before tj. When the queue length reaches the buffer threshold at time ti (entering the congestion 27  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  state), source 1 will start to reduce its rate immediately. Meanwhile, source 2 will keep its rate at PCR for 7 ms longer until ti and the slowed down cell stream from source 2 will need another 7 ms to get to the congested buffer. The buffer will reach its maximum queue length between tj and rj. It is noted that within the period of tj - rj, if the sum of the cell rates of source 1 and 2 is larger than output link rate, the buffer occupancy will keep increasing until the recovery of congestion. 2. Effects of A I R and R D F Figure 2.2 also shows that if AIR is increased, the source cell rate will be increased more quickly, i.e. the buffer will become congested more easily for the larger ACR. Thus, a larger buffer will be required to avoid cell loss. Similarly, the RDF also plays an important role in deciding the buffer size as indicated in Figure 2.3. When congestion happens, the more slowly the source data rate is decreased, the higher the queue length will be, e.g., the buffer occupancy with R D F = 16 is much smaller than that with R D F =128. As discussed above, the throughput for different connections is affected by the values of AIR and RDF. Keeping the traffic load as high as possible while alleviating the congestion status in the A T M switch will avoid the starvation of the link rate and improve the link utilization and throughput of the network.  28  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  12000  5  10  15  20  25  30  35  40  Time (msec)  Figure 2.3 Effects of Delay on Buffer Occupancy  29  45  50  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  2.3 Configurations of Simulation Models The analytical results above describe the effects of delay, AIR/RDF and buffer threshold using a single queue model. In order to investigate those problems in a more practical environment, simulations have been performed with the following model and parameters.  2.3.1 Network Modeling 1. Model with 3 Source-Destination Pairs The simulation model shown in Figure 2.4 is built up using the OPNET simulator based on the analytical model discussed above. Sources 1 and 2 are assumed to be the greedy A B R sources generating the packets (average length is 6000 bits) with Poisson arrival process at the allowed cell rate (ACR), which is modified by the feedback binary bit included in R M cells. In practice, the A B R and C B R / V B R traffic directed to an A T M switch node should be composed of a large number of individual A B R and C B R / V B R connections. Here, in the simulation model of BSNs interworking with B-ISDNs, for simplicity, the A B R sources are divided into two groups by their round trip delays, one with large delay (over satellite links) as source 1, and the other one with small delay (over terrestrial links only) as source 2. A l l C B R / V B R traffic is represented by the integrated source 3 , which traffic rate varies from 2.0 Mbps to 8.0 Mbps or from 8.0 Mbps to 2.0 Mbps every 2 seconds, resulting in congestion or increase in the available link rate for A B R sources, respectively. Also, there are 3 A T M switches included in the model; one represents the gateway, the others are A T M switches in the B-ISDN. Congestion is caused by contention between A B R traffic sources for the limited available link rate left over by the C B R and V B R traffic. The generic E P R C A congestion control mechanism is implemented using the OPNET A T M network models. 30  Chapter 2  Performance Evaluation of Binary Feedback Scheme  Wireless link  G W : Gateway  Wired link  S W : A T M Switch  Single loop  ( S r ^ ^ - - ^ G W .  Src2)  Figure 2.4  .  (Src3)  Configuration of Simulation Model for CI Scheme  2. Model with 5 Source-Destination Pairs  —•  Wireless link  GW: Gateway  Wired link  SW: ATM Switch  Single loop  Figure 2.5  Configuration of Simulation Model for DBCI Scheme with Multiple A B R Sources 31  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  In order to verify the efficiency of the DBCI scheme, a 5 source-destination model described in Figure 2.5 is used in simulation. Compared to the 3 source-destination model, 2 more A B R sources (sources 4 & 5) are added in the network; thus more complicated parameters set could be applied in the simulations.  2.3.2 General Simulation Parameters According to the suggestions by the A T M Forum and our experience in simulation, the simulation parameters used for CI and DBCI schemes are described as follows. 1. Parameters of ABR Traffic Sources and A T M Switches The network and A B R traffic related parameters are provided in Table 2.1 and 2.2. Table 2.1. Parameters Used in the Simulation A B R Source Rate (Mbps)  B-ISDN Link Rate (Mbps)  PCR (cells/sec)  MCR (cells/sec)  ICR (cells/sec)  Nrm (cells)  Simulation Duration (sec)  6  15.552  18,000  0  15,000  32  40  Table 2.2 Other Parameters Used in the Simulation  Satellite Link Delay (sec)  Other Link Delay (set)  Buffer Threshold (cells)  Buffer Size (cells)  AIR (Cells/sec)  RDF  0.05 - 0.25  0  50 - 1000 ,  2000 - o o  50 - 1600  8 - 128  2. Parameters of CBR/VBR Traffic Sources In this project, we are more interested in the behaviors of A B R sources and A T M switches when congestion is caused by the insertion of C B R or fluctuating V B R traffic. Hence, the C B R and V B R traffic is modeled by changing its rate from low to high at the time to (here to = 8 seconds) when the system has reached' the stable state. Here, it is assumed that 32  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  the C B R / V B R traffic could hold at a steady state for a period of time (a bursty traffic for. VBR) in order to observe the effects of the dynamic aspect of C B R / V B R . The parameters are described in Table 2.3. Table 2.3 CBR/VBR Traffic Rate ?(sec.)  <8  >8  Source Rate (Mbits/Sec.)  2.0  8.0  2.3.3 Additional Simulation Parameters for DBCI Scheme In order to investigate the performance of DBCI scheme, more simulation parameters are introduced in Tables 2.4 and 2.5 for the models in Figure 2.4 and Figure 2.5 respectively. In Table 2.4, the A I R and RDF are fixed for source 1, and AIR is chosen from 200 - 1600 and RDF ranges from 8 - 6 4 for source 2. In Table 2.5, the A I R and R D F are fixed for source 1, and AIR is chosen from 200 - 400 while RDF ranges from 8 - 6 4 for source 2, 4 and 5. In addition, various delays are used for A B R sources 2, 4, and 5 in Table 2.5 to show the relations between the AIR/RDF and delays when congestion occurs. Table 2.4 Parameters for CI Scheme with 2 ABR Sources: Buffer Threshold = 50 cells  ABR Source  AIR/RDF where: RDF is chozen as 8, 16, 32, or 64 at source 2.  Link Delay (second)  Case 1  Case 2  Case 3  Case 4  1  200/64  200/64  200/64  200/64  0.25  2  200/RDF  400/RDF  800/RDF  1600/RDF  0  33  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Table 2.5 Parameters used in Multiple A B R Sources Model: Threshold = 1000 cells  Case  ABR Source  Rate (Mbps/sec)  AIR  RDF  Link Delay (second)  1  1  6  200  64  0.25  2  2  200  64  0  4  2  200  64  0.04  5  2  200  64  0.08  1  6  200  64  0.25  2 .  2  400  8  0  4  2 .  300  32  0.04  5  2  200  64  0.08  1  6  200  64  0.25  2  2  200  64  0  4  2  200  64  0.1  5  2.  200  64  0.2  1  6  200  64  0.25  2  2  400  8  0  4  2  300  32  0.1  5  2  200  64  0.2  2  3  4  2.4 Simulations with Binary Feedback Scheme 2.4.1 Algorithms used in ABR Sources The binary feedback rate-based congestion control scheme applied here is the generic E P R C A scheme, which has been described in Chapter 1. The congestion bit is indicated in the CI field of R M cells. The A B R sources send out a R M cell with CI = 0 every Nrm-1 data cells. A n A T M switch enroute will modify the CI bit of R M cells based on the congestion situation by monitoring the buffer occupancy. When R M cells arrive at the destination, they will be returned to the source. As introduced in chapter 1, the A B R source will adjust its,source cell rate according to the value of CI by 34  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  using Equations 1 and 2. Therefore, the dynamic buffer occupancy at switch 1 will result in oscillations of the source rate, as illustrated in Figure 2.6, where, A C R of sources 1 and 2 are given in Figure 2.6 — (1) and (2), and the delay effects are described by A C R of source 1. Due to congestion, the throughput of source 2 (Figure 2.6 — (3)) is reduced, and the queue length (buffer occupancy) at switch 1 described in Figure 2.6 — (4) starts to vary periodically because of the delay and the mismatch of input and output rates.  (3)  (i) ,ACR_srcl  Throughput_src2  (xlOOOO)  10  11  12  14 13 12 11 10 9 8 7 6 5 4 3  13  -  -  i  i  T  -  (xlOOO)  -  T  r -  — i h +- — •+_-+___1 1__1__J.__.L_. 10  11  12  13  time (sec)  time (sec) (2) ACR_src2  Q_length_SWl  (xlOOOO)  10  11 time  12  (xlOOO)  10  13-  11  12  13  time (sec)  (sec),  Figure 2.6 Illustration of Delay Effects of CI Scheme  2.4.2 Simulation Results 1) Effects of Delay on Buffer Occupancy, Link Utilization By using the model in Figure 2.4, the simulation results shown in Figure 2.7 suggest that the maximum buffer occupancy at switch 1 increases quickly with delay when delay from 35  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  source 1 is shorter than 0.1 second. When delay increases beyond 0.1 second, the increase of buffer occupancy is slowed down due to rate reduction at source 2. Maximum Buffer Occupancy vs. Delay 16001  1  B u f f e r  1400  400  1  T h r e s h o l d  A I R / R D F  0.05  =  =  1  5  0  1  1—-  c e l l s  2 0 0 / 6 4  0.1  0.2  0.15  0.25  0.3  Link Delay with Source 1 (sec) Figure 2.7 Effects of Delay on Buffer Occupancy Link Utilization vs. Delay 1 0 . 9 8  B u f f e r  T h r e s h o l d  A I R / R D F  =  =  5  0 c e l l s  2 0 0 / 6 4  0.96  C NO 5  0.94' 0.92 0.90  0 . 8 6  0.84 0.05  ' 0.1  0.15  0.2  0.25  Link Delay with Source 1 (sec) Figure 2.8 Effects of Delay on Link Utilization  36  0.3  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Figure 2.8 shows that mismatch of the input and output rates as a result of the long delay with source 1 leads to reduction of the link utilization measured at. the link between switch 1 and switch 2, which also reflects the throughput decrement. 2) Effects of Buffer Threshold on Buffer Occupancy, Link Utilization Besides the delay, the buffer threshold is another important factor that will affect the buffer occupancy and link utilization. In Figure 2.9 and Figure 2.10, the buffer occupancy and link utilization, respectively, increase with the buffer threshold, which is consistent with the previous analysis. Regarding link utilization, when buffer threshold is increased, the cells stored in the buffer during a period of congestion will keep the link busy when congestion is eased. If the number of cells in the buffer is too small due to a low buffer threshold, before the arrival of more data from the recovered data sources, the output link might become starved, resulting in the decreased link utilization. Maximum Buffer Occupancy vs. Buffer Threshold 2200 "o": Delay with Source 1 = 0.25 s '2000  "x": Delay with Source 1 = 0.10 s AIR/RDF = 200/64  1800  ro  1000H  800  200  400  600  800  1000  Buffer Threshold (cells) Figure 2.9 Effects of Buffer Threshold on Buffer Occupancy  37  1200  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Link Utilization vs. Buffer Threshold  0.96  "x": Delay with Source 1 = 0.25 s "o": Delay with Source 1 = 0.10 s  0.94  AIR/RDF = 200/64  0.92  0.88  0.86  0.84  200  Figure 2.10  400 600 800 Buffer Threshold (cells)  1000  1200  Effects of Buffer Threshold on Link Utilization  3) Effects of AIR/RDF on Buffer Occupancy, Link Utilization Here, the buffer occupancy is examined with various AIR and R D F at all A B R sources. The effects of AIR and R D F on buffer occupancy and link utilization are described in Figure 2.11 and Figure 2.12, respectively. As explained in the last section, buffer occupancy and link utilization increase with AIR and RDF. But, when A I R is larger than some value, (e.g. AIR = 200 here), the buffer occupancy stabilizes at a maximum value. The reason is that the larger AIR enables the source to reach its PCR very quickly before congestion happens. Furthermore, a smaller RDF reduces the source rate more quickly and makes the congestion period shorter, leading to decrease in buffer occupancy. As a reduced R D F causes less cells to remain in the buffer, the link utilization is also decreased.  38  Chapter 2  Performance  Evaluation of Binary Feedback  Maximum Buffer Occupancy vs. AIR  2500  RDF = 128 RDF = 64 "x" RDF = 32 "+" RDF = 16 "0"  Delay with source 1 = 0.25 s  11*11.  2000  Q. _J  o o O  Scheme  Buffer Threshold = 50 cells  1500 • -*  CD  *  "_J  CO 1000  3 500  X - -X- -  _l  0  100  -  I  I  200  I  300  l _  400  500  600  700  800  900 1000  AIR Figure 2.11 Effects of ATR and R D F on Buffer Occupancy and Link Utilization -  1 0.98  "o" RDF = 128 11*11. RDF = 64 "x" RDF = 32 "+" RDF = 16  0.96 0.94 c o  ro  Link Utilization vs. AIR  Delay with source 1 = 0.25 s Buffer Threshold = 50 cells  0.92  N  0.90  c  0.88 0.86 0.84 0.82 0.80  100  200  300  400  500 AIR  600  700  800  900 .1000  Figure 2.12 Effects of ATR and R D F on Buffer Occupancy an Link Utilization  39  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  2.4.3 Procedures for Selection of System Parameters Based on the results provided above, the effects of delay, buffer threshold, AIR and R D F on link utilization and buffer occupancy are summarized in Table 2.6, where "+" and "—" represent increasing and decreasing trends of the related parameters, respectively. Table 2.6 Effects of Delay, Buffer Threshold, AIR and RDF on Link Utilization and Buffer Occupancy Delay +  Buffer Threshold +  AIR + -  RDF +  Buffer Occupancy  +  +' -  +  -  Link Utilization  -  +  +  -  Given the required CLR and maximum delay, the procedures to minimize the buffer requirement, maximize the link utilization and throughput are suggested as follows. (Here, the input data rate is the sum of the peak cell rates of all the A B R sources and the output link rate is the minimum rate reserved or left, for A B R traffic.) • Select the buffer threshold and AIR/RDF with the delay and the desired link utilization according to the simulation results (e.g. Figure 2.10); • Determine the buffer occupancy by using the chosen buffer threshold and AIR/RDF according to the simulation results (e.g. Figure 2.11); • Based on the buffer occupancy and buffer threshold, the buffer size can be chosen with the simulation results according to the given CLR by trial and error; • Since the AIR and RDF affect both the buffer occupancy and link utilization, the above steps should be repeated with different sets of threshold, AIR, and RDF until the required results are obtained. Here, we just provide a possible way to choose proper parameters based on the knowledge of the network performance. In practice, the optimal parameters 40  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  are balanced between buffer size and link utilization based on different requirements. For example, according to the effects of AIR/RDF on the buffer occupancy and link utilization shown in Figure 2.11 and Figure 2.12, the compromised buffer occupancy and link utilization can be reached by choosing the appropriate AIR and RDF. Table 2.7 Numerical Results of System Design Procedures: Delay (Source 1) = 0.25 second.  Case  AIR/RDF  Utilization  Buffer Threshold (cells)  Buffer Occupancy (cells)  CLR  Buffer Size That Satisfies the C L R (cells)  1  200/128  0.93  50  1424  10"  1510  2  200/64  0.92  50  1270  10"  1015  3  400/32  0.90  50  672  10"  650  5  5  5  Numerical results obtained using the above procedures are provided in Table 2.7 using three sets of AIR and RDF. In this example, in order to shorten the simulation process, the required CLR is selected as 10~ and the required minimum link utilization is 92%. Since s  the throughput is related to the link utilization, only the link utilization and buffer occupancy are given. The simulation results show that the buffer requirement in case 2 is the best of the 3 cases. It can be explained by the fact that, compared to case 2, the ACR in case 1 decreases more slowly, which leads to an increase in buffer occupancy. Contrary to case 1, in case 3, the ACR decreases more quickly, which results in decreased buffer occupancy and link utilization. Of cause, there might be better parameter sets than the ones used in this example, but our results serve the purpose of illustrating the performance trade-offs with the proposed procedures.  41  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  2.4.4 Comparison of Simulation and Analytical Results The model used here is a single queue model with the same delay on each link and the parameters are the same as those used in the theoretical analysis. The results of calculation and simulation indicated in Figure 2.13 are close when the link delay is small. When delay is increased beyond 0.16 second, the simulation results become larger than the analytical results. The reason is that the actual queueing delay is larger than the ideal delay assumed in the calculation. Therefore, when the propagation delay is increased, the queueing length is increased. Maximum Queue Length vs. Delay 9000 "o": Calculation Results  8000 g  "x": Simulation Results AIR/RDF = 200/64  7000  Buffer Threshold = 100 cells  §  6000  CD  §  5000  o  e  4000  X  3000 2000 1000  0  0.05  0.1  0.15 0.2 0.25 Delay for All Sources (sec)  0.3  Figure 2.13 Comparison of Calculation and Simulation Results  42  0.35  Chapter 2  Performance Evaluation of Binary Feedback  Scheme  2.5 Delay-Based Congestion indication (DBCI) Scheme 2.5.1 Problems of CI Scheme with Long Link Delay In the last section, we considered a generic EPRCA scheme that does not take the round trip delay into account when ABR sources adjust their traffic rates. As shown in Figure 2.3, in BSNs interworking with B-ISDNs, the buffer occupancy is highly affected by the AIR and RDF. Since the delay from source 1 is as large as 250 ms, its response to congestion will be very slow, and the buffer occupancy could be very large when congestion occurs. As mentioned earlier (see Figure 2.3), if the ABR source with the shorter delay link adjusts its source rate quickly, the overloading traffic to the buffer will be reduced quickly as well. The buffer occupancy will then be improved, i.e., appropriately choosing AIR and RDF may contribute to the reduction of the buffer requirement. This is confirmed by observations from Figure 2.11 and Figure 2.12, which show that quick response (small RDF and large AIR) by the ABR source with short delay reduces the buffer occupancy when congestion happens and improves the link utilization when there is more available bandwidth. Based on the above, a scheme with dynamic selection of AIR and RDF is proposed to improve the performance of the CI scheme in BSNs interworking with B-ISDNs. In this proposed scheme, since the round trip delay of each VC is probed by the associated ABR source and enroute switches, and the cell rate at the ABR source is adjusted by taking into account this delay, we name it as the Delay-Based Congestion Indication (DBCI) scheme.  2.5.2 Suggested Solution — Delay-Based Congestion Indication (DBCI) Scheme The main difference between CI and DBCI is that a Time Stamp (TS)fieldand Maximum Round Trip Time (MRTT) field are provided in the RM cell in addition to the current fields 43  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  described in Table 1.5. Here, the MRTT represents the maximum RTT among the VCs which have common parts in their connections or switches along the path in A T M networks. Normally, MRTT should be refreshed and updated regularly as the maximum RTT recorded by the switch within a fixed time, which may avoid the ramping up problem and reduce the probability of the malfunction in the delay-based scheme. A B R source puts the current time and the most recent RTT (initial RTT is set to 0) in the TS and the M R T T fields of the outgoing R M cells respectively. When R M cells cross an A T M switch, the A T M switch will compare the value in the MRTT field of all incoming R M cells with the current M R T T recorded at the switch, and update the M R T T value in both R M cell and the switch with the larger one. When the R M cell is returned to its source, the A B R source will also compare its round trip time calculated from the current time and the TS with the M R T T value, and update the M R T T field of the next R M cell with the larger value. Normally, the round trip time is determined by the propagation delay, processing delay, and queueing delay. When a R M cell arrives at the A B R source, the source will adjust its allowed cell rate by comparing the current RTT with the value of MRTT. The algorithms used by the A B R sources are the same as that applied in the binary feedback scheme except for the dynamic A I R and R D F mechanism. The most current AIR and R D F are decided as follows.  where a and  AIR = a-AIRo  (9)  RDF = p • RDFo  (10)  P are selected according to the conditions described in Table 2.8, and  AIRQ  and  RDFo are the original rate increase and decrease factors. Here, we just propose a possible way to facilitate the rate-based control scheme in BSNs interworking with B-ISDNs. In Table 2.8, we divided the A B R sources into two parts, one with short delay while there are 44  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  no existing long delay links involved or with long delay in networks, and.another one is of short delay while there are long delay involved in the congestion. In practice, the algorithm should be determined based on the RTT distributions of the networks, thus the range of RTT can be divided into more segments to apply different parameters. Table 2.8 Selection of a and 0 \'  Conditions  a  MRTT - RTT < 0.1 sec and RTT < 0.1 sec or RTT > 0.1 sec  1  1  MRTT - RTT > 0.1 sec and RTT < 0.1 sec  4-8  1/16 - 1/4  Effectively, this algorithm increases the A I R and reduces the RDF of short delay sources so that they adjust their A C R more quickly.  2.5.3 Simulation Results In this section, all the simulations were performed by using different a and /3 according to the above algorithm. Following discussions provide the details of their effects on the network performance. 1. Model with 2 ABR Sources (Figure 2.4) The results of the DBCI scheme are given in Table 2.9 where the case with AIR/RDF = 200/64 is with the generic binary feedback, scheme (CI scheme) in order to compare with the results of the simulation model with the DBCI scheme. Moreover, the transient state is defined as the status at the time when the background traffic rate (CBR/VBR) changes. The steady state is the status when there is no background rate change, in which case, the cell rate of A B R sources will vary at the steady period and magnitude as shown in Figure 2.6.  45  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Table 2.9 Simulation Results of DBCI Scheme with 2 A B R Sources (AIR /RDFo = 200/64; Delay: 0.25 s (source 1), 0 s (source 2); Threshold = 50 cells) 0  AIR/RDF at Source 2  Maximum Buffer Occupancy at Switch 1 (cells)  RDF  AIR  Transient State  Steady State (Maximum)  64  200  1270  1290  0.875  8807  8103  99.82  400  1273  1313 .  0.880  8782  8520  99.97  800  1267  1274  0.882  8775  8568  99.99  1600  1275  1352  0.886  8750  8625  99.99  200  727  758  0.875  10161  7075  97.91  400  721  779  0.890  9981  8243  99.10  800  707  835  0.903  9919  8266  99.18  1600  730  770  0.907  10001  8344  99.19  200  467  535  0.879  11208  6706  94.06  400  455  507  0.905  11088  7106  95.43  800  455  509  0.911  10935  7485  96.61  1600  455  559  0.914  10833  7712  97.25  200  295  316  0.876  12500  5578  87.21  400  292  314  0.892  12004  6108  90.42  800  295  349  0.904  11786  6377  91.85  1600  295  326  0.913  11705  6821  93.50  32  16  8  Link Utilization  Throughput  Fairness (%)  Source 1 Source 2  a) Buffer Occupancy  For the same reason indicated above, the buffer occupancy is mainly affected by the RDF. Since the smaller R D F used at source 2 will reduce its cell rate more quickly, thus 46  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  the buffer occupancy will be decreased accordingly as shown in Figure 2.14. Due to the same reason explained in the last section, the maximum buffer occupancy is not changed much relative to AIR.  Maximum Buffer Occupancy vs. AIR 2500  RDF = 64 "x": RDF = 32 RDF = 16 "o" RDF = 8  RDF at Source 2: 8.2000 >^ o c: ra  AIR0 = 200 RDFo = 64  C L  O1500 CD  3= ZJ  m E  XCO1000  -X  500  0  x- •  x  *  *•-  Q  ©-•  200  400  •  -  -o  600  800  1000  1200  1400  1600  1800  2000  AIR Figure 2.14  Buffer Occupancy with DBCI Scheme  b) Link Utilization Figure 2.15 shows the link utilization under different a and j3. Comparing to the results of CI scheme provided in Figure 2.11 and Figure 2.12, it is interesting to note that the small RDF accompanied by the large AIR in short delay link improves the link utilization, e.g. the link utilization with R D F = 16. The reason is that a small R D F at source 2 will shorten the congestion period since the AIR/RDF in source 1 are constants (unlike those shown in 47  Chapter 2  Performance Evaluation of Binary Feedback  Scheme  Figure 2.11 and Figure 2.12). Then, the number of the tagged R M cells'for source 1 and the oscillation period will be reduced, which will more likely keep the link from starvation. Furthermore, it should be pointed out that if R D F is too small, such as R D F = 8, in our example and AIR is not big enough, such as AIR = 400, the link utilization could be smaller than the results with AIR/RDF = 400/32 for the lack of traffic injected caused by the low cell rate.  Link Utilization vs. AIR 0.94 RDF = 64  0.93  RDF at Source 2:  "x": RDF = 32  AIRo = 200 RDFo = 64  RDF = 16  0.92  e  "o": RDF = 8  -  0.91  0  1  0.90 0.89 0.88 0.87 0.86  0  200  400  600  800  1000  1200  1400  AIR (cells/s)  Figure 2.15  Link Utilization with  c) Fairness 48  DBCI Scheme  1600 1800  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  Fairness is measured by the fairness factor suggested in [35] as follows: 2  2  Fair Index -  (ii)  where y/'s are the normalized allocations: y,- = Received allocation (actual allocation) / Optimal allocation (ideal fair share), n is the number of A B R sources. When y{s are equal to each other, the fairness index reaches its maximum value of 1.  Fairness vs AIR/RDF  R D F at S o u r c e 2 :  H  1-  "+" RDF = 64 "x": RDF = 32 11*11. RDF = 16 " 0 " RDF = 8  AIRo = 200 RDFo = 64  x  w w  CD £  ! X  .4Kr  'CO  0.95 -O  0.90  0.85  200  400  600  800  1000  1200  1400  1600  1800  AIR Figure 2.16 Fairness with DBCI Scheme  It is obvious that the fast rate reduction caused by the smaller RDF at source 2 decreases the corresponding throughput, hence reducing fairness as shown in Figure 2.16. Although choosing a larger AIR could compensate for the drop in cell rate caused by the smaller RDF, the actual rate will fluctuate between the P C R and M C R . Therefore, the fairness in this case  49  Chapter 2  Performance  Evaluation of Binary Feedback  Scheme  can not be improved significantly, especially when the A I R is large enough, which is also illustrated in Figure 2.16. 2. Model with 4 ABR Sources (Figure 2.5) Table 2.10  Simulation Results of DBCI Scheme with Multiple A B R Sources  Buffer Occupancy at Gateway (cells)  Link Utilization  Throughput (cells/sec) Source 1  Source 2  Source 3  Source 4  1  4000  0.831  8052  4035  4004  4018  89.23  2  2580  0.834  8626  3610  3622  4311  85.36  3  4840  0.824  7495  4809  4250  3746  92.46  4  3300  0.801  8421  3000  3050  3509  79.60  Case  1  2  Fairness (%)•  In order to observe the effects of DBCI scheme on multiple A B R sources with different link delays, source 2 in the above model is divided into 3 separate A B R sources as shown in Figure 2.5. The related parameters are provided in the Table 2.5. Simulation results show that proper AIR/RDF for different A B R sources with various delay (DBCI scheme) in cases 2 and 4 could improve the buffer occupancy in this more complicated network model. By doing' so, the trade-off is that fairness is worsened. In our example, case 2 and case 4 have better buffer occupancy, link utilization and worse fairness than those of case 1 and case 3, respectively.  2.5.4 Comparison between DBCI and CI DBCI scheme is proposed to improve the performance of the BSNs interworking with the A T M networks based on the observations that a small R D F will reduce the A C R quickly 1  Same A I R / R D F at all A B R sources.  2  Same A I R / R D F at all A B R sources.  50  Chapter 2  Performance Evaluation of Binary Feedback  Scheme  for the short delay sources when congestion happens, thus the buffer occupancy will be decreased. Similarly, a large AIR will increase the A C R quickly and could increase the link utilization. The simulation results show that the DBCI scheme increases the link utilization and reduces the maximum buffer occupancy, especially in networks with long link delay. The drawback of DBCI scheme is that the throughput could be reduced for the short delay links and thus degrades the fairness.  51  Chapter 3  Performance  Evaluation of ER Scheme  Chapter 3 Performance Evaluation of ER Scheme 3.1 Introduction The explicit rate scheme provides accurate fair share allocations to A B R sources by the network. When the delay in the network is small, the ER scheme works in a very efficient way to make full use of the link capacity. But when the E R scheme is applied in BSNs interworking with B-ISDNs, due to the large satellite link delay, the remote A B R sources cannot adjust their source rates to the fair share immediately. Consequently, this will more likely lead to buffer overloading and increased CLR. In this chapter, we will start with an evaluation of the E R resource reallocation scheme to identify the effects of long delay on the buffer occupancy, link utilization, throughput, and fairness through analysis and simulations. Then, we will focus on evaluating the performance improvement by applying the proposed delay-based E R (DBER) scheme in BSNs interworking with B-ISDNs.  3.2 Algorithms of ER Scheme 3.2.1 Resource Reallocation Algorithms Suggested by ATM Forum For the explicit rate feedback scheme, A T M Forum T M 4.0 [1] has suggested 5 resource reallocation criteria to deal with the fairness in the sharing of available link rate.  The  definitions of the parameters used in those algorithms and the related criteria are defined as follows. A: Total available bandwidth for all A B R connections on a given link. U: Sum of bandwidth of connections bottlenecked elsewhere (including those limited by PCR). 52  Chapter 3 Performance Evaluation of ER Scheme  B: A—U, bandwidth to be shared by connections bottlenecked on this link. A : Total number of active connections. 7  N': Number of active connections bottlenecked elsewhere. n: N—N', number of active connections bottlenecked on this link. M: Sum of MCRs of active connections within h. B(i): Fair allocation for connection i, MCR(i): MCR of connection i. 1. Max-Min The term max-min is given by the idea of maximizing the network utilization by allocating to the virtual connections with the minimum allocation of bandwidth. A n intuitive way to express max-min fair criteria is to maximize the allocation of each virtual connection i subject to the constraint that an incremental increase in i's allocation does not cause a decrease in some other virtual connection's allocation that is already as small as f s or smaller [36]. For simplicity, in our study, this criteria only applies to the case where all connections are unweighted or equally weighted and with zero-MCR. The available bandwidth. B is equally shared among n connections.  B(i) = B/n  (12)  The detailed algorithms can be found in [17] [32]. Due to its simplicity in implementation, in this thesis the max-min fairness criterion is applied in the E R scheme.  2. MCR Plus Equal Share 53  Chapter 3  Performance  Evaluation of ER Scheme  The bandwidth allocation for a connection is its M C R plus equal share of the bandwidth B in excess of the total MCRs allocated to all connections: B(i) = MCR(i) + (B-M)/n  (13)  The criteria converges to Max-Min criteria as all MCRs approach zero. To achieve this criteria, the switch may need to use ACR—MCR to compute the fair share.  3. Maximum of MCR or Max-Min Share The bandwidth allocation for a connection is its MCR or Max-Min share, which ever is larger: B(i) = max(MCR(i),  Max - Min share)  (14)  This criteria also converges to Max-Min criteria as all MCRs approach zero. The bandwidth allocation according to this criteria may need long iteration time to converge to the equilibrium point.  4. Allocation Proportional to MCR The bandwidth allocation for a connection is weighted proportional to its MCR: B(i) = B • (MCR(i)/M)  (15)  This criteria does not apply if there are connections with zero MCR.  5. Weight Allocation The bandwidth allocation for connection / is proportional to its pre-determined weight, w(i):  • B(i) = B-(w(i)/Y, ™(JJ) 54  (16)  Chapter 3 Performance Evaluation of ER Scheme  The Max-Min criteria is a special case with all connections having equal weight. The defined weight may be independent or dependent of MCR (e.g. option 4 is with weight proportional to MCR).  3.2.2 Generic ABR Source Behaviors in ER Scheme As introduced in chapter 2, the.generic source algorithm for E R scheme is that A B R source will change its rate to E R after each R M cell arrives.  .  When A C R < ER: ACR  = min(PCR,  ER)  (17)  ACR  = max(MCR,  ER)  (18)  When A C R > ER:  3.3 Estimation of Buffer Size in ATM Network with Max-Min Algorithm 3.3.1 Effects of Product of Source Rate and Link Delay For E R scheme, when the delays in the links are very small, the queue length in the A T M switch should be very small because the sources can adjust their data rate according to the feedback information (explicit rate) immediately. When a satellite Jink is added to the A T M network, the link delay will be very large (e.g. 0.25 second), thus when congestion appears in some links, the A B R sources with the long delay cannot follow the changed link rate. This will result in dramatic increases in queue lengths. Although there are several resource reallocation algorithms as mentioned above, they are intended to deal with.the fairness problem caused by resource reallocation. In our scenario 55  Chapter 3 Performance Evaluation of ER Scheme  where a long delay exists in the A T M network, we are more concerned about how long the queue will be when congestion happens in the network. Thus, based on the max-min fairness algorithm, the maximum queue length is estimated by the following calculations. In BSNs interworking with B-ISDNs, there might be some A B R virtual links with large link delay D, as well as bandwidth BW. When congestion occurs in an A T M switch through which links with large products of bandwidth and delay pass, the E R scheme could not efficiently reduce the congestion status within the 2D time. Suppose there are n identical (source rate) active A B R links connected to the A T M switch, which has link rate LR. The delay for each link is D i = 1, 2  n, and Dj > Di > ... > D >  u  n  0. The current data rate for each link is R. If nxR > LR, then congestion occurs. Assume the allocation algorithm used is the max-min criteria, the fair share for each virtual connection is LRIn. The maximum queue length in that congested A T M switch can be estimated by considering the amount of overloading input and the corresponding delays as follows. n—1  Qmax = 2 • D  n  • (n • R - LR) + 2 • ] T  /  j (A' - A+i)  •  R-i  +  (n - *) •  LR  (19)  i=l  When the E R scheme is applied in the single queue model shown in Figure 2.1, based on the theoretical analysis above,.the effects of the product of delay and bandwidth are shown by the numerical results in Table 3.1. When the output link rate is less than the total A B R traffic rate, the A T M switch will reallocate the allowed cell rate for each source. Source 2 will reduce its rate first due to its shorter delay. Before the congested switch receives the cells with the appropriately reduced source rates, it will keep increasing its queue length. It is observed that the higher the rate of the source with the long delay, the larger the queueing length of the congested buffer, as indicated by the examples in Table 3.1. 56  Chapter 3 Performance Evaluation of ER Scheme  Table 3.1 Effects of Product of Delay and Bandwidth with ER Scheme  •  Delay (sec) / Data Rate (Mbps)  Link Rate  Maximum Queue Size  Minimum Data Rate: 0 Mbps  (Mbps)  (cells)  Source 1  Source 2  0.1/6  0.025 / 6  7.552  1312  0.25 / 6  0.025 / 6  7.552  2885  0.1 / 10  0.025 / 2  7.552  2099  0.25 / 10  0.025 / 2  7.552  5246  3.3.2 Problems with Generic ER Scheme in BSNs Interworking with B-ISDNs  For simplicity, consider the model shown in Figure 2.1, where there is a single A T M switch with two input A B R sources, source 1 and source 2. At the A T M switch, there are 4 possible ways to affect its traffic loading due to changes in network conditions. Assume their link delays are delay 1 and delay 2 for source 1 and source 2, respectively, where delay 1 » delay 2. When the max-min algorithm is applied in the network, their allowed cell rate (ACR), A C R 1 and A C R 2 will be adjusted by the feedback E R information in the R M cells. The changes of the input data rates could be the various combinations of rate.increase and decrease at the two sources shown in Table 3.2. Table 3.2 Rate Changes: delay 1 »  delay 2  Case  ACR 1  ACR 2  1  increase  increase  2  decrease  increase  3  increase  decrease  4  decrease  decrease 57  Chapter 3  Performance Evaluation of ER Scheme  For cases 1 and 3, the rate changes will not result in unexpected congestion at the switch, so we just consider the cases 2 and 4. In case 2, the immediate increment of cell rate at source 2 and the delayed decrement of cell rate at source 1 could cause congestion at the switch. Therefore, it is necessary to control the rate increment at source 2. A delay adjustment method presented in [17] was proposed to deal with this problem. In this method, the cell rate of the source with a short delay is increased by considering the delay difference among the A B R sources. But, it can not solve the problem generated by case 4. In case 4, the immediate decrement of A C R 2, and delayed decrement of A C R 1, could still be a problem that worsen congestion at the congested switch. Here we will mainly deal with the problem in case 4 as well as the problem in case 2. When receiving the returned R M cells, the A B R sources will adjust their traffic rates immediately to fit the current A C R with the fair share, B(i), allocated by the E R algorithm. In BSNs interworking with B-ISDNs, the delay could cause an overloading problem when congestion occurs because the A B R sources with long delays can not reduce their rates in a timely manner. Therefore, if the sources with short delays could reduce their rates below the fair shares, the overloading situation could be alleviated. Thus, a delay related E R scheme is proposed in the following section.  3.3.3 Suggested Solution — The Delay-Based Explicit Rate (DBER) Algorithm Based on the idea introduced above, there can be several ways to accommodate sources with long delay by undershooting the new cell rate when short delay sources reduce their rates. Here, we propose a simple approach to improve the network performance. Similar to the DBCI scheme, in DBER, each A B R source will check the M R T T in R M cells and 58  Chapter 3  Performance Evaluation of ER Scheme  calculate the RTT to determine how to modify its cell rate with the new fair share B(i). If A C R is larger than its fair share B(i), thus requiring a rate reduction, a factor 7 < 1 will be used to multiply B(i) to yield the most current traffic rate. Otherwise, the A C R will be increased by a fixed amount, AR, for each returned R M cell. Similar to the algorithm in DBCI, the selection of 7 is based on the probed round trip delay RTT and the M R T T in the R M cells, and is suggested in Table 3.3. Table  3.3 Selection of 7 in DBER Scheme: AR = 100 cellslsec.  Conditions  7  MRTT - RTT < 0.1 sec and RTT < 0.1 sec or RTT > 0.1 sec  1  MRTT - RTT > 0.1 sec and RTT < 0.1 sec  0.1 - 0.5  For each received R M cell at A B R source, the source will adjust its A C R as follows. When ACR > B(i): ACR  = max{MCR,i  • B(i))  . .  (20)  where 7 is a factor to adjust the fair share. When ACR + AR < B(i): ACR  = min(PCR, ACR + AR)  (21)  where AR is a fixed rate increment and chosen as 100 cells/s in our simulation.  3.4 Configurations of the Simulation Model Similar to the simulation model in last chapter as shown in Figure 2.4, sources 1 and 2 request A B R service, while source 3 is the C B R / V B R traffic source. 59  Chapter 3 Performance Evaluation of ER Scheme  In order to examine the scalability and simplify the simulation procedures, we provide two sets of parameters. One with the practical satellite down link rate (60 Mbps) and OC-3 rate (155.52 Mbps) [37]. The other one is scaled down by a factor of 10 and is the same as those in chapter 2. In the first case, when simulation starts, the source rate of source 1, 2, and 3 are 60 Mbps, 60 Mbps, and 10 Mbps respectively. There is no congestion at A T M switch 1. A t t = 8 seconds, source 3 (CBR/VBR traffic) will increase its rate to 80 Mbps. Then congestion will happen at switch 1. The related parameters are provided in Table 3.4. Table 3.4. The Effect of the Data Rate and Delay on the Buffer Occupancy Case  Delay (sec) / Data Rate (Mbps) Minimum Data Rate for sources 1 and 2: 0 Mbps  Link Rate (Mbps)  Maximum Queue Size at Switch 1 (cells)  Source 1  Source 2  Source 3  1  0.1 / 60  0.025 / 60  0/80  155.52  13528  2  0.25 / 60  0.025 / 60  0/80  155.52  33479  3  0.1 / 100  0.025 / 20  0/80  155.52  22511  4  0.25 / 100  0.025 / 20  0/80  155.52  54317  5  0.1 / 6  0.025 / 6  0/8  15.552  1399  6  0.25 / 6  0.025 / 6  0/8  15.552  7  0.1 / 10  0.025 / 2  0/8  15.552  2173  8  0.25 / 10  0.025 / 2  0/8  15.552  5374  '  3165  3.5 Simulation Results 3.5.1 Effect of the Product of Data Rate and Link Delay Although there are several resource reallocation algorithms proposed by the A T M Forum, the delays in BSNs will have major effects on their performance when interworking with ATM/B-ISDNs. Either delay or the product of the data rate and the link delay will affect the  60  Chapter 3 Performance Evaluation of ER Scheme  buffer occupancy, link efficiency, C L R and fairness. Simulation results showing the effects of the different products of delay and data rate in each A B R connection on the maximum queue size, are presented in Table 3.4. Here, the link rate is reallocated by the Max-Min algorithm. Similar to Figure 2.6, simulation results in Figure 3.1 shows the effects of delay on buffer occupancy at switch 1. The resulting buffer occupancy in case 4 is much higher than those of cases 1, 2 and 3 because of the larger product of delay and source rate. The simulation results for down scaled source and link rates in cases 5 — 8 have similar trends.  in  ACR_srcl  (3)  (xlOOOO)  2  Throughput_src2 (xlOOOO) 2'. 5  1.75 1.5  --I  1  2  1-  1.25  1  1.5  1  1  1  .  1  1 -  1  0.75 0.5 0.25 0  -4  0.5  I  6  _1  6.5  I i  I I  7  I  :  7.5  I L_  I  1  I  8.5  9  9.5  0 10  6  6.5  7  7.5  8.5  time (sec)  9 time  9.5  10  (sec)  (4)  (2) ACR_src2  (xlOOOO)  Q_length_SWl  2.5  1 I  1  I  I  1  1 1  I 1  2  1 1  J  1.5  _1  4  .4  4  i  1 1  3  i i  2.5  4  2  1  1 --  1 J  0.5 0  (xlOOO)  3.5  6  6.5  4  _1  7  - _ _J 1 1 _1 1 1 l  .  J  7 .5  _ _ 4 1 1 4 1 ' 1 l  8  a  1  _L  a l  8 .5  1.5  4  0/5  1  .9  9.5  0  10  6  6.5  7  7.5  8.5.  9 time  time (sec)  9.5  10  (sec)  Figure 3.1 Simulation Results with E R Scheme  It is worth noting that the. results of buffer occupancy under the down—scaled by 10 times parameter sets are also reduced approximated by a factor of 10 (see Table 3.4), i.e., the scalability of the data rate and link rate versus the buffer occupancy is good in our simulation. 61  Chapter 3 Performance Evaluation of ER Scheme  The results in Table 3.4 also indicate that the simulation results (see Table 3.4: cases 5 — 8) are a bit larger than the calculation results (see Table 3.1). The reason is that the queueing delay is not taken into account in the calculations.  3.5.2 Improvement by DBER Algorithm In the simulation model, source 2 is assumed to have zero link delay, and source 1 is of 250 ms link delay. When D B E R scheme is applied in the simulation, the cell rate at source 2 will be adjusted below its fair share in the case of congestion as shown in Figure 3.2. Compared with the results shown in Figure 3.1, with the D B E R scheme, the buffer (3)  in ACR_srcl  Throughput_src2  (xlOOO)  20  (xlOOO)  18 17  17.5  16 15  15  14 13  12.5  12 10  11 10  7.5  6  6.5  7  7.5  ).5  9 time  9.5  9  10  6  6.5  7  7.5  3.5  9  time  (sec)  9.5  10  (sec)  (4)  (2) ACR_src2  Q_length_SWl  (xlOOOO)  (xlOOO)  2.5 2 1.5 1 0.5 0  .5  7  7.5  .5  9  time  9.5  6  10  6.5  7  7.5  5  9  time  (sec)  9.5  10  (sec)  Figure 3.2 Simulation Results with DBER Scheme: 7 = 0.3  occupancy at switch 1 is decreased significantly (see Figure 3.2 — (4)) by undershooting the A C R of source 2 (see Figure 3.2 — (2)) when congestion happens at switch 1. As introduced 62  Chapter 3 Performance Evaluation of ER Scheme  in section 3.3.3, there are two factors, 7 and AR, affecting the performance of DBER. Their effects on network performance are analyzed as follows. 1. Effects of 7 In order to investigate the effects of 7 on network performance, a set of simulations were performed with various 7 values. The results are presented in Table 3.5. Here, transient state is used to describe ,the status at the time when congestion just happens and the steady state is used to indicate the state when the network has recovered from the congestion. It is noticed that smaller 7 will lead to smaller buffer occupancy in the transient state due to the less data injection in the beginning of congestion. For the same reason, when 7 is too small such as 7 = 0.1, the buffer occupancy at switch 1 in the transient state will be less than that in the steady state. As illustrated in Figure 3.3, when 7 is appropriately chosen, e.g. 7 = 0.3, the buffer occupancy could be dropped significantly (see Figure 3.4) with a slight decrement on the link utilization (see Figure 3.5) and fairness (see Figure 3.6). When the E R scheme is applied in the BSNs interworking with B-ISDNs, the trade-off among the buffer size, the desired link utilization, and the throughput can be adjusted according to the requirements of the networks.  63  Chapter 3 Performance Evaluation of ER Scheme  — • AR = 1000 ("_'') AR = 100 ("--") AR = 25 ("..")  5  10  15  20  25  30  35  40  Time (msec)  Figure 3.3 Illustration of the Effects of 7. and AR  64  Chapter 3 Performance Evaluation of ER Scheme  Simulation results also suggest that delay has important effects on the buffer occupancy and link utilization (see Figures 3.4 and 3.5). Maximum Buffer Occupancy vs. y 5000 4500  0.0 second  Delay with Source 1:  "x": 0.1 second  4000 —  3500  9-  3000  ~  25001-  CD *= ZJ  m  E  •I  "o": 0.25 second  2000 1500  ——  a 1000 500 • jK  0.2  00  0.4  ,  *  *  0.8  0.6  Figure 3.4 Effects of 7 on Buffer Occupancy Link Utilization vs y  0.97  1  0.95  1  —1  "*": 0.0 second "x": 0.1 second "0": 0.25 second  •  -  1§ 0.94  •^i  1  Delay with Source 1:  0.96  „  1  ^ — -x  0.93  —*  n  -*  -x-  x  -X  „0 0''  0.92  0.91  1  1  0.2  0.4  1  0.6  1  0.8  •Y Figure 3.5 Effects of 7 on Link Utilization 65  Chapter 3  Performance Evaluation of ER Scheme  Table 3.5 Simulation Results for DBER Method: AR= 100 cells/sec; Delay with source 1 = 0 sec, 0.1 sec, 0.25 sec.  Buffer Occupancy  Link  Throughput  Fairness  at Src 1  at Switch 1 (cell)  Utilization  (cells/sec)  (%)'  (sec)  Transient  Steady  State  State  1  3137  185  0.9  3122  0.7  Delay  0.25  0.1  .0  7  Source 1.  Source 2  0.9321  9319  9875  99.92  185  0.9319  9319  9870  99.92  2905  184  0.9316  9318  9859  99.92  0.5  2632  185  0.9306  9318  9823  99.93  0.3  1225  184  0.9284  9318  9742  99.95  0.1  112  184  0.9225  9318  9629  99.99  1  1214  153  0.9394  9654  9802  99.99  0.9  1163  153  0.9392  9653  9797  99.99  0.7  989  152  0.9389  9652  9788  99.99  0.5  591  153  0.9380  9653  9754  99.99  0.3  276  153  0.9359  9652  9674  99.99  0.1  131  153  0.9300  9653  9459  99.99  1  85  120  0.9433  9819  9756  100  0.9  80  120  0.9432  9819  9754  100  0.7  60  120  0.9431  9819  9751  100  0.5  20  120  0.9428  9819  9738  100  0.3  10  120  0.9420  9819  9710  100  0.1  3  120  0.9399  9819  9630  100  66  Chapter 3 Performance Evaluation of ER Scheme  Fairness vs. y  "*": 0.0 second  Delay with Source 1:  S"  *  "x": 0.1 second "o": 0.25 second  K-  • -  -*  - X --  • -o  o-  0.9995  0.9990  o  0.9985  0.9980 0  0.2  0.4  0.6  0.8  Figure 3.6 Effects of 7 on Fairness  2. Effects of AR 1) Selection of AR In order to optimize the performance of DBER, the selection of AR is important as shown in Figure 3.3. Larger AR could result in higher buffer occupancy and smaller AR may reduce the link utilization. The estimation of AR is carried out as follows. The average interval of R M cells: At = 2xNrm I [ERx (1 + 7)/; The average number of R M cells generated within MRTT: N = MRTT/At; The A C R of source 2 after MRTT, such that after waiting for the long delay, the cell rate for the source with short delay is allowed to increase to its fair share: -yxER + ARxN = ER; 67  Chapter 3 Performance Evaluation of ER Scheme  Then, the estimated Ai? can be obtained by: 2-(l- )-JVrm ~ ( l + ) . MRTT 7  A  R  ( 2 2 )  7  In our study, the estimated Ai? is 105 cells/sec. So, in the above simulations, Ai? is chosen as 100 cells/sec. 2) Simulation Results From the results shown in Table 3.6, Figure 3.7, Figure 3.8, and Figure 3.9, we can see that larger Ai? will result i n higher buffer threshold and link utilization. Moreover, too small and too large Ai? will make the fairness worse. Thus, properly choosing Ai? could optimize the ER performance by considering the trade-off among the buffer occupancy, link utilization and fairness in BSNs interworking with B-ISDN. Table 3.6 Effect of AT? (7 = 0.1, Delay with Source 1 = 0.25 second)  AR  Buffer Occupancy  Link .  Throughput (cells/sec)  at Switch 1 (cell)  Utilization  Fairness (%)  Source 1  Source 2  0.8943  9319  8484  99.78  183  0.9132  9318  9179  99.98  112  184  0.9225  9318  9629  99.99  200  896  184  0.9273  9319  9667  99.97  250  1167  185.  0.9281  9319  9729 .  99.95  500  1774  185  0.9298  9319  9779  99.94  1000  2576  184  0.9309  9319  9833  99.93  Transient  Steady  State  State  25  3  185  50  2  100  68  Chapter 3 Performance Evaluation of ER Scheme  Buffer Occupancy vs. A R 3000  400  600  1000  1200  AR  Figure 3.7 Effects of AR on Buffer Threshold  Link Utilization vs 0.96  c o 2  0.921-  z> •* c 0.91 h  1200  AR Figure 3.8 Effects of AR on Link Utilization  69  Chapter 3 Performance Evaluation of ER Scheme  Fairness v s . A R  1200  Figure 3.9 Effects of AR on Fairness  3.5.3 Performance Comparison In this chapter, the analytical and simulation results are provided to evaluate the performance of the generic E R and D B E R schemes applied in BSNs interworking with B-ISDNs. Simulation results show that the factors 7 and AR of D B E R play the key roles on network performance. From the results shown in Table 3.5, it is obvious that the D B E R scheme can improve the buffer occupancy significantly over the E R scheme, while the throughput, link utilization are not affected much.  70  Chapter 4  Performance Evaluation of EPRCA Scheme  Chapter 4 Performance Evaluation of EPRCA Scheme 4.1 Introduction In chapter 2 and 3, the binary feedback scheme and explicit rate feedback scheme applied in the BSNs interworking with B-ISDNs have been examined extensively. In these models, only one feedback control scheme is applied in the network, i.e., either the CI bit or E R carried in a R M cell is observed by an A B R source. In chapter 2, we have introduced a more flexible mechanism using the combined information of CI bit and E R value to control the source rate, which is called E P R C A [4]. It can be used to improve the fairness and eliminate the beat-down problem in the CI scheme. In this chapter, we will discuss some important characteristics of the E P R C A scheme in BSNs interworking with B-ISDNs. Furthermore, similar to D B C I and DBER, by considering the round trip delay and M R T T in R M cells, a Delay-Based E P R C A (DB-EPRCA) is proposed to improve the performance of E P R C A and evaluated by simulations.  4.2 Mechanisms of EPRCA 4.2.1 EPRCA Scheme As described in chapter 2, in the E P R C A scheme, both the E R and CI fields are included in the R M cells. The A B R sources could make use of the E R and CI to adjust their data rates by using Equations (23) and (24) under the conditions described in Table 4.1 . Here, in order to ensure the fairness for different A B R sources when congestion happens, the factor A (0 < A < 1) is used to limit the minimum cell rate for each A B R source, rj (n > 1) is added to control the current cell rate in order to increase the A B R source rate more quickly. In 71  Chapter 4 Performance Evaluation of EPRCA Scheme  E P R C A described in [35] [38] , the minimum ACR is equal to MCR, and rj is chosen as 1 and the conditions for rate change is same as those in EFCI scheme. With the E P R C A scheme, the A B R sources can be ensured to reach their fair shares and make use of the link rate more efficiently. According to the conditions described in Table 4.1, the source rate is increased by:  ACR  = min(PCR, n • ER, ACR + AIR - Nrm)  (23)  and decreased by: ACR  = max(MCR,  A • ER, ACR - ACR/RDF)  (24)  Table 4.1 The Conditions of Rate Change in E P R C A  Rate Change  Conditions  increase  A C R < A x E R and CI = 0  increase  A C R < A x E R and CI = 1  increase  A x E R < A C R < ??xER and CI = 0  decrease  A x E R < A C R < 7 7 x E R and CI = 1  decrease  A C R > 77XER and CI = 0  decrease  A C R > ?7XER and CI = 1  4.2.2 Delay-Based EPRCA (DB-EPRCA) Scheme Similar to the DBCI and D B E R schemes, in the D B - E P R C A scheme, besides the E R and CI, the link delay will be taken into account in adjusting A B R source rate. Since the A B R sources with long link delay may suffer from the beat-down effect and unfairness in BSNs interworking with B-ISDNs, it is reasonable to apply the E P R C A scheme in those A B R sources. Also, in order to quickly respond to the congestion state within the network, the A B R source with short delay will be required to drop their rate to a proper level to ease the 7 2  Chapter 4 Performance Evaluation of EPRCA Scheme  overloading caused by the traffic with long delay. In DB-EPRCA, there are three possible ways to make use of the link delay information and the MRTT for short delay sources: 1.  Similar to the DBCI, the A B R sources with short delay could choose different  AIR/RDF, and \/r) factors in E P R C A scheme based on the link delay. 2. The A B R sources with short delay could choose CI or DBCI schemes based on the link delay. 3. The A B R sources with short delay could choose ER or D B E R schemes by considering the link delay. In the following, we will evaluate the performance of the suggested D B - E P R C A schemes.  4.3 Simulation Results Similar to the simulation model in chapters 2 and 3 shown in Figure 2.4, sources 1 and 2 request A B R service, and source 3 demands C B R or V B R service. For E P R C A scheme, source 1 and source 2 are assigned the same algorithm to adjust their rates. For D B - E P R C A scheme, the E P R C A scheme is implemented in source 1 (with long delay satellite link), and one of the E P R C A , CI, and E R schemes could be chosen by source 2. To keep the consistence of the results, the general parameters used in simulations are the same as those in chapter 3 shown in Table 2.1, Table 2.2, and Table 2.3. The additional parameters are given in the following tables.  4.3.1 EPRCA with the Same Parameters for All ABR Sources In this simulation, in order to investigate the effects of different A, rj, AIR and RDF on the performance of E P R C A scheme in BSNs interworking with B-ISDNs, all A B R sources are assigned the same parameters no matter what the path delay exists in each virtual connection. 73  Chapter 4  Performance Evaluation of EPRCA Scheme  1. Parameters In this scheme, sources 1 and 2 take the same set of E P R C A parameters given in Table 4.2. Table 4.2 Parameters with Same E P R C A Scheme at Sources 1 & 2  Case  A  V  AIR  RDF  Buffer Threshold (cells)  1  0.8  1.2  200  64  50  2  1  1.5  200  64  50  3  0.8  1.2  200  32  50  4  1  1.5  200  32  50  2.  Results  When E P R C A is applied in A B R sources 1 and 2 with the same parameters, A and r\ will affect the buffer occupancy significantiy since A and r\ will restrict the lowest and highest allowed cell rates, respectively, for each A B R source (see Table 4.3). It is noted that the Table 4.3 Simulation Results with Same EPRCA Scheme at Sources 1 & 2 Case  Buffer Occupancy  Link  Throughput  Fairness  at Switch 1 (cells)  Utilization  (cells/sec)  (%)  Transient  Steady  Source 1  Source 2  State  State  (Satellite Link)  1  2676  60  0.937  9523  10119  99.91  2  4329  272  0.964  10701  11072  99.97  3  2450  60  0.938  9545  10210  99.89  4  3611  250  0.959  10500  11145  99.91  lower cell rates (cases 1 & 3) not only, reduce the buffer occupancy, but also reduce the throughput as well as the link utilization. Similar to the conclusions in Chapter 2, the results 74  Chapter 4 Performance Evaluation of EPRCA Scheme  also suggest that a smaller R D F will result in lower buffer occupancy. As of the effects of the delay, the simulation results show that the throughput of source 2 with shorter delay is higher than that of source 1.  4.3.2 EPRCA with the Different Parameters for ABR Sources In order to investigate the effects of different A, 77, AIR and RDF on different virtual links with E P R C A scheme, here, the parameters of the A B R sources are assigned to be different according to their link delay. 1. Parameters In this simulation, sources 1 and 2 will use different E P R C A parameter as indicated in Table 4.4. Table 4.4 Parameters with Different E P R C A Schemes at Sources 1 & 2  Case  Source 1 (delay = 0.25 sec.)  Threshold (cells)  Source 2 (delay — 0 sec.)  AIR  RDF  A  V  AIR  RDF  A  V  1  200  64  0.8  1.2  200  64  1.0  1.5  50  2  200  64  0.8  1.2  200  32  1.0  1.5  50  3  200  64  1.0  1.5  200  64  0.8  1.2  50  4  200  64  1.0  1.5  200  32  0.8  1.2  50  2.  Results  When E P R C A scheme is applied in both sources 1 and 2, similar to the results in Table 4.3, the A and. r? at sources 1 and 2 will affect the performance. In general, larger A and 77 will result in the higher throughput (e.g. compare the throughputs of source 1 and 2 in Table 4.5) and buffer occupancy (e.g. compare the buffer occupancies in Table 4.3 and Table 4.5). A smaller RDF will reduce the buffer occupancy. Since the link delay with source 1 is larger 75  Chapter 4  Performance Evaluation of EPRCA Scheme  than that with source 2, based on the results in Table 4.3 and Table 4.5, we can set the smaller RDF, and smaller A and rj at source 2 and the slightly larger A and J] at source 1 (case 4) in order to reduce the buffer occupancy at the transient and steady states and increase the link utilization and fairness. Moreover, due to the long delay with source 1, the buffer occupancy at the transient state is much higher than that at the steady state. Table 4.5 Simulation Results with Different EPRCA Schemes at Sources 1 & 2  Case  Buffer Occupancy at Switch 1 (cells)  Link Utilization  Fairness (%)  Throughput (cells/sec) Source 1  Source 2  0.941  9300  11612  98.79  120  0.941  9300  11504  98.98  3512  167  0.940  10798  10100  99.89  3220  140  0.940  10798  9982  99.85  Transient State  Steady State  1  3495  151  2  3220  3 4  43.3 EPRCA and CI for Different ABR Sources  In this simulation, the EFCI scheme is applied in the shorter path delay connection (source 2) instead of E P R C A scheme due to the quick response of source 2. The effects of different A, rj at source 1, and R D F at source 2 on the buffer occupancy, link utilization and fairness are described.  1. Simulation Parameters  Table 4.6 shows the parameters for the simulations with E P R C A and CI schemes applied in source 1 and source 2 respectively. 76  Chapter 4 Performance Evaluation of EPRCA Scheme  Table 4.6 Parameters with E P R C A & CI Schemes at Sources 1 & 2  Case  Source 2  Source 1  Threshold  AIR  RDF  A  V'  AIR  RDF  (cells)  1  200  64  0.8  1-2  200  64  50  2  200  64  0.8  1.2  200  32  50  3  200  64  1  1.5  200  64  50  4  200  64  1  1.5  200  32  50  2. Results When the CI scheme is used in source 2 (with shorter link delay), the R D F will affect the buffer occupancy as well as the link utilization (see cases 2 & 4 in Table 4.7) for smaller RDF reduces the A C R quickly. The A and 77 in source 1 will affect the link utilization and fairness in the same way as the E P R C A scheme does (see Table 4.3). Compared to the results in Table 4.5, since there are no enforced minimum and maximum ACRs by A and 77 (e.g. A/77 = 0.8/1.2 or 1/1.5) for source 2, the buffer occupancy at transient state is reduced (see Table 4.7). Furthermore, because there is no accurate rate allocation in EFCI scheme, at steady state the buffer occupancy is increased significantly. Table 4.7 Simulation Results with E P R C A & CI Schemes at Sources 1 & 2  Case .  Buffer Occupancy at Switch 1 (cells)  Link Utilization  Throughput (cells/ sec)  Fairness (%)•  Source 1  Source 2  0.940  9114  10828  99.27  207  0.936  9533  10214  99.88  2312  350  0.942  10375  10027  99.84  1380  263  0.938  10521  9350  99.65  Transient State  Steady State  1  2205  251  2  1409  3 4  77  Chapter 4 Performance Evaluation of EPRCA Scheme  4.3.4 EPRCA and ER (or DBER) for Different ABR Sources In this simulation, the ER/DBER schemes are applied in the shorter path delay connection (source 2) in the sense that A and n don't benefit the short delay links much. The effects of A, rj and 7 on the buffer occupancy, link utilization and fairness are discussed. 1. Parameters The parameters in Table 4.8 are used for the simulations with E P R C A and E R (or DBER) schemes applied in source 1 and source 2 respectively. Table 4.8 Parameters with EPRCA & ER (DBER) Schemes at Sources 1 & 2 Case  Source 2  Source 1  Threshold (cells)  AIR  RDF  A  V  7 (DBER)  1  200  64  0.8  1.2  1  50  2  200  64  1  1.5  1  50  3  200  64  0.8  1.2 .  0.1  50  4  200  64  1  1.5  0.1  50  2. Results From the results shown in Table 4.9, we know that A and 77 will play a key role on the steady state buffer occupancy because the average allowed cell rate at source 1 is controlled by those two factors. In cases 1 and 3, since A and 77 are smaller than those in cases 2 and 4, therefore the utilization, buffer occupancy, and throughput with source 1 are smaller than those in cases 2 and 4 respectively.  78  Chapter 4  Performance Evaluation of EPRCA Scheme  Table 4.9 Simulation Results with E P R C A & ER (DBER) Schemes at Sources 1 & 2  Case  Buffer Occupancy at Switch 1 (cell) Transient State  Steady State  •1  3634  471  2  3896  3 4  Link Utilization  Throughput (cells/sec)  Fairness (%)  Source 1  Source 2  0.951  10100  10121  100  605  0.954  10278  10120  99.99  403  450  0.944  10608  9385  99.63  521  547  0.953  10715  9594  99.70  Moreover, applying the D B E R scheme in source 2 will further reduce the buffer occupancy at the transient state with a slight reduction of utilization and throughput in source 2. The results of cases 3 & 4 indicate that D B E R applied in source 2 will improve the buffer occupancy at transient state substantially due to the small 7. The reason of higher buffer occupancy at steady state compared to that at transient state is the rate mismatch caused by the long delay with source 1. Considering the utilization, buffer occupancy and throughput, compared to the previous results shown in Table 4.3, Table 4.5 and Table 4.7, the D B E R / E P R C A scheme gives the best performance.  4.4 Comparison of CI, ER and EPRCA Schemes 4.4.1 Comparison of Generic Schemes When the generic EFCI, E R and E P R C A schemes are applied in our model, with buffer occupancy, link utilization, throughput, and fairness shown in Table 4.10, E P R C A scheme performs best. As Table 4.10 shows, E P R C A gives the best link utilization and lowest buffer 79  .  Chapter 4 Performance Evaluation of EPRCA Scheme  occupancy due to the flexible and accurate A C R range. E R provides the best fairness due to its accurate rate adjustment and highest buffer occupancy at the transient state due to the A C R mismatch. EFCI generates the least buffer occupancy at transient state and highest buffer occupancy at steady state due to its rate control mechanism. Table 4.10  Scheme  Comparison of EFCI, ER, and E P R C A Scheme  Buffer Occupancy at Switch 1 (cells) Transient State  Steady State  EFCI  1270  1290  ER  3137  EPRCA  2676  Link Utilization  Throughput (cells/sec)  Fairness (%)  Source 1  Source 2  0.875  8807  8103  99.82  185  0.932  9875  9319  99.92  60  0.937  9523  10119.  99.91  4.4.2 Comparison of Delay-Based Schemes Here, we compare the results of applying the proposed DBCI, D B E R and D B - E P R C A schemes in our simulation model, where the results for D B - E P R C A are chosen from the DBER/EPRCA scheme shown in Table 4.9 for its best performance. Due to the quick rate decrease in DBER, the buffer occupancy in the transient state is lower than that in the steady state. Under the same traffic and link delay conditions, the results from chapter 2, chapter 3 and this chapter are shown in Table 4.11. D B E R has the least buffer occupancy and highest fairness for its specific rate reduction and accurate feedback rate. D B - E P R C A gives the best link utilization contributed by the enforced A C R range. Although DBCI could lower the buffer occupancy, the link utilization and fairness are degraded much. Considering the buffer occupancy and fairness, D B E R is the best scheme for single-loop model. But, if the 80  Chapter 4  Performance Evaluation of EPRCA Scheme  link rate is of much fluctuations within BSNs interworking with B-ISDNs, due to the both flexible and accurate rate control mechanism, the D B - E P R C A could be selected to improve the link utilization without worsening the buffer occupancy and fairness much. As a whole, the D B - E P R C A (DBER/EPRCA) scheme has the best performance. Table 4.11  Scheme  Comparison of DBCI, DBER, and DB-EPRCA Scheme  Buffer Occupancy (cells)  Link Utilization  Fairnes (%)  Throughput (cells/sec) Source 1  Source 2  0.913  11705  6821  93.50  184  0.928  9629  9318  99.99  547  0.953  10715  9594  99.70  Transient State  Steady State  DBCI  295  326  DBER  112  DB-EPRCA  521  4.5 Discussion Simulation results show that the AIR/RDF, A and r? as well as the schemes selected for the A B R sources with various delay, will have significantly effects on the network performance in buffer occupancy, link utilization, throughputs, and fairness. Small R D F could improve the buffer occupancy, A and rj can be used to limit the A B R source rate in order to improve the fairness and link utilization, and DBCI or D B E R schemes can be implemented for A B R sources with short delay. Therefore, properly choosing those parameters and schemes will definitely improve the network performance. With the above results, we can conclude that the D B - E P R C A schemes have better performance over the generic schemes. The trade-off among the buffer occupancy, link utilization, throughput and fairness needs to be considered when selecting the parameters in the various situations and preferences.  81  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes 5.1 Introduction In chapters 2, 3, 4, we discussed a variety of the single-loop rate-based congestion control schemes used in BSNs interworking with B-ISDNs. Since the link delay in BSNs interworking with B-ISDNs is usually very long, the A B R sources cannot respond to the congestion status within the networks quickly.  When the length of the control loop is  increased, the segmentation of the congestion control loop can be implemented with the conception of a virtual source and destination [7]. This will close a control loop and initiate a new control loop by functionally behaving as a destination and as a new source. In this chapter, we will change the single-loop model into double-loop model and discuss the effects of double-loop rate-based schemes on the buffer occupancy, link utilization, throughput, and fairness in BSNs interworking with B-ISDNs. As mentioned in chapter 2, in this segmented scheme, we will study 4 combinations of CI and E R schemes in double-loop model.  5.2 Configuration of Simulation Models 5.2.1 Network Model In this part, the performance of double-loop congestion control schemes is investigated and compared by using the model shown in Figure 5.1. In the simulation model, two control loops are implemented to segment the long delay link with A B R source 1. Among them, loop 1 is placed across the satellite link, and the gateway acts as the intermediate switching element. Loop 2 starts from the gateway and stops at the destination. Other sources are connected to A T M switch 1 and implemented with same scheme as that in loop, 2. A l l 82  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  destinations are connected to A T M switch 2. Sources 1, 2, and 4 require A B R service while source 3 require C B R or V B R service. ' Here, we just considered the two basic schemes — EFCI and ER, thus, obviously there are 4 combinations of CI and E R schemes in double4oop congestion control schemes: CI/CI, ER/CI, CI/ER, ER/ER, as shown in Table 5.1.  Double-Loop Scheme  Figure 5.1 Configuration of ATM Network over Satellite Table 5.1. Combinations of EFCI and ER Schemes in Double-Loop Model  Double Loop Scheme  Scheme in loop 1  Scheme in loop 2  CI/CI  EFCI  EFCI  ER/CI  ER  EFCI  CI/ER  EFCI  ER  ER/ER  ER  ER  83  Chapter 5  Performance  Evaluation of Segmented Congestion Control Schemes  5.2.2 Simulation Parameters Since the simulation results are just used for comparison and analysis purpose, the data rate, link rate and other parameters are the same as those used in previous chapters (such as the parameters in Chapter 2 and Chapter 3). The related parameters are indicated in Table 5.2. Table 5.2. Parameters Used in the 2-Hop Simulation Model PCR (cells/sec) 18,000  ICR (cells/sec) 15,000  AIR  Buffer Threshold in Gateway (cells)  Buffer Size (cells)  200  50  infinite  Satellite Link Delay (sec)  MCR (cells/sec)  Nrm  RDF  Buffer Threshold in A T M Switch (cells)  Simulation Duriation (sec)  0 - 0.25  0  32  64  50  40  Link Rate (bits/sec) 15,552,000  5.3 Effects of Long Delay on Double-Loop Schemes Since the buffer occupancy at the A T M switch is dependent on the end-to-end delay, maximum input link rate, minimum output link rate and buffer threshold (for EFCI scheme), in single-loop scheme, the congested switch is the place where its buffer occupancy will be increased quickly due to the feedback delay of R M cells. Unlike single-loop model, in double-loop scheme, when congestion occurs at A T M switch 1, the gateway may suffer from the buffer overloading because the output rate of the gateway (i.e. the allowed virtual source rate) will be reduced. Simulation results in Table 5.3 illustrate the effects of the double-loop schemes when they are applied in BSNs interworking with B-ISDNs, based on the model shown in Figure 5.1.  84  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  Table 5.3. Comparison of Double-Loop Schemes  Double Loop Scheme  CI/CI  ER/CI  CI/ER  ER/ER  Link Utilization  Fairness (%)  11552  0.980  99.91  11197  12575  0.975  99.67  860  11071  12795  0.971  99.48  793  605  9953  13464  0.961  97.04  10  821  852  11879  11884  0.975  100.00  95  250  825  871  11261  11881  0.970  99.93  0.1  502  574  847 •  869  10689  11879  0.964  99.72  0.25  705  496  893 •  860  10023  11882  0.958  99.28  0  2010  281  8  5  11864  12278  0.977  99.97  0.05  2835  822  11  7  11027  12277  0.970  99.71  0.1  3642  1508  39  28  10187  12280  0.966  99.14  0.25  5298  3245  55  31  9012  12276  0.959  97.70  0  3  5  9  7  12311  12443  0.987  100.00  0.05  679  9  25  11  12210  12389  0.985  99.99  0.1  1233  13  59  14  12147  12340  0.982  99.99  0.25  2589  15  76  15  11980  12256  0.976  99.99  Delay with Src 1 (sec)  Buffer Occupancy in Gateway (cells)  Buffer Occupancy in Switch 1 (cells)  Throughput (cells/sec)  Transiei tSteady State State  Transiei tSteady State State  Src 1  Src 2  0  399  568  801  856  12279  0.05  1192  1304  802  811  0.1  1694  1634  839  0.25  3073  3121  0  6  0.05  5.3.1 Performance of CI/CI Scheme In this scheme, when congestion happens first in the A T M switch, the decreased link rate results in congestion in the gateway. Large delays in satellite links will cause substantial 85  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  cell accumulations at the gateway buffer, as indicated in Figure 5.2. In loop 2, the buffer occupancy of switch 1 is not direcdy affected by the delay in loop 1 (see Figure 5.3). Also, it is noticed that the queue lengths in both transient and steady states are almost the same due to the dynamic nature of the CI scheme. Thus, the double-loop scheme could redistribute the queuing cells to the gateway and reduce the buffer requirement of A T M switches within the A T M backbone. The results in Table 5.3 show that long delay will reduce the link utilization and fairness.  Buffer Occupancy (GW) vs. Delay 8000 Double Loop Scheme: 7000 o 6000  "o": ER/ER  "solid": Transient State  "x": ER/CI  "dash":.Steady State  -  "*": CI/ER "+": CI/CI  3 5000 CO  CD  0.1  0.15 Delay (sec)  0.2  0.25  0.3  Figure 5.2 Effects of Delay on Buffer Occupancy at the Gateway in Double Loop Model  5.3.2 Performance of ER/CI Scheme As to the ER/CI scheme, the allowed cell rate of the A B R sources in loop 1 always follows the allowed link rate of the virtual source in loop 2. From the simulation results 86  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  in Table 5.3 and Figure 5.2, it is observed that the buffer occupancy (in the transient and steady states) in the gateway increases slowly with the delay of loop 1 (i.e. satellite link). The reason is that no steady source state can be achieved even though the E R scheme is applied in loop 1. The buffer occupancy in the gateway depends heavily on the mismatch of the input and the output rates caused by the link delay. In loop 2, the buffer occupancy at switch 1 shown in Figure 5.3 is of similar characteristics as that of the CI/CI scheme. The differences of buffer occupancy at switch 1 reflect the fluctuate nature of the CI scheme.  Buffer Occupancy (SW1) vs. Delay 1400  Double Loop Scheme: 1200  " o " :  E R / E R  " s o l i d " :  " x " :  E R / C I  " d a s h " :  S t e a d y  S t a t e S t a t e  C I / E R  CD  o  T r a n s i e n t  " + " :  C I / C I  -1000 - -X  oo  800f  CO  re o.  600  =3 O  o O  CD  3=  400  =J  CO  200  0.1  0.15  0.2  0.3  Delay (sec) Figure 5.3 Effects of Delay on Buffer Occupancy at Switch 1 in Double Loop Model  5.3.3 Performance of CI/ER Scheme Similar to the single-loop CI congestion control scheme, the CI/ER scheme causes congestion in the gateway (in loop 1) when a reduced output link rate is reallocated by 87  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  the A T M switch in the network. The simulation results are given in Table 5.3. In loop 1, due to the abrupt reduction of output link rate at the gateway and slow rate adjustment in the CI scheme, the transient state buffer occupancy could become very high as shown in Figure 5.2. During the steady state, the gateway buffer occupancy is kept almost the same as that in the CI/CI scheme. However, in loop 2, since only a short queuing delay exists in the E R scheme, which gives a much quicker rate adjustment than the CI scheme, the resulting buffer occupancy is very small compared to CI scheme (see Figure 5.3).  Link Utilization vs. Delay  "o": ER/ER "x": ER/CI "*": CI/ER "+": CI/CI  Double Loop Scheme:  •g  1r  0.94 -  0 921  0  1 0.05  1  0.1  1  1  1  0.15  0.2  0.25  .  —  0.3  Delay (sec)  Figure 5.4 Effects of Delay on the Link Utilization in Double Loop Model  5.3.4 Performance of ER/ER Scheme From Table 5.3 and Figures 5.2 and 5.3, we notice that when the E R scheme is used in the both loops, the congestion caused by the insertion of C B R / V B R traffic at A T M switch 1 88  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  increases the transient buffer occupancy at the gateway dramatically due to the rate mismatch between its input and output links. Due to the accurate rate allocation in the E R scheme, the buffer occupancy at steady state is very low in both the gateway and switch 1. The results indicate that placing the long delay link in loop 1 will restrict the overloaded cells from source 1 within the gateway.  Fairness vs. Delay "o" ER/ER "x": ER/CI mm. CI/ER "+" CI/CI  Double Loop Scheme:  w w  c "CO X-  0.98  0.96  0.05  0.1  0.15  0.2  0.25  0.3  Delay with Source 1 (sec) Figure 5.5 Effects of Delay on the Fairness in Double Loop Model  5.3.5 Comparison of Double Loop Schemes L  1  In the CI scheme is used in loop 1 , long delay causes a degradation of throughput for source 1, and hence reduced link utilization and fairness. Although application of the CI scheme in loop 2 could compensate for the reduced link utilization, it will inevitably increase the buffer occupancy at both the gateway and switch 1. Considering the buffer occupancy 89  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  at gateway and switch 1, link utilization, and fairness of the four double loop schemes in BSNs interworking with B-ISDNs, we can see that in both loop 1 and loop 2, the E R scheme has the best performance as shown in Figures 5.2, 5.3, 5.4, and 5.5. Therefore, the ER/ER scheme is the best scheme to be used in the double loop configuration.  5.4 Comparison of End-to-End and Segmented Congestion Control Schemes 5.4.1 CI and CI/CI Schemes Since there is only one iong delay A B R source included in loop 1, the double loop DBCI will be the same as double loop CI. Thus, only the simulation results of CI scheme and CI/CI scheme are compared and discussed for their many common characteristics. In the single-loop scheme, the buffer occupancy is a concern only in the congested switch. The queue length is related to the end-to-end delay. When delay is increased, the throughput with long delay and link utilization between switches 1 and 2 decrease quickly. Table 5.4 Preliminary Comparisons of single-loop CI with double-loop CI/CI  Scheme  Satellite Delay (sec)  Delay, between SWl & SW2 (sec)  Buffer Occupancy at Gateway (cells)  Buffer Occupancy at Switch 1 (cells)  Link Utilization between SW 1 & 2  Fairness (%)  1-loop  0.25  0  1  1290  0.875  99.82  2-loop  0.25  0  3121  793  0.961  97.04  1-loop  0.15  0.1  1  1304  0.874  99.82  2-loop  0.15  0.1  2050  1327  0.938  98.48  Unlike the end-to-end CI scheme, the double-loop CI/CI scheme decreases buffer occupancy at A T M switch 1 while increasing buffer occupancy at the gateway. Due to the short delay with loop 2 and source 2, the link utilization is increased significantly. The drawback 90  Chapter 5 Performance Evaluation of Segmented Congestion Control Schemes  is the reduction of fairness caused by the throughput reduction of source 1 resulting from the rate oscillations at source 1.  5.4.2 ER and ER/ER Schemes From the results in Table 5.5, the buffer occupancy at an A T M switch is affected by the delay in the corresponding control loops and the input and output rates. Compared to the single-loop scheme, the double-loop ER/ER scheme will move the queuing cells from switch 1 to the gateway due to the mismatch of the source rate caused by the link delay. Table 5.5 Preliminary Comparison of 1-hop E R with 2-hop ER/ER  Scheme  Satellite Delay (sec)  Delay between SWl & SW2 (sec)  Buffer Occupancy at Gateway (cells)  Buffer Occupancy at Switch 1 (cells)  Link Utilization  Fairness (%)  1-loop (ER)  0.25  0  1  3137  0.932  99.92  2-loop (ER/ER)  0.25  0  2589  76  0.976  99.99  5.5 Discussions The performance of the segmented congestion control scheme is investigated by simulation method. Simulation results show that the double-loop scheme can spread the overloaded data caused by the congestion into the gateway and A T M switches along the path. The buffer occupancy for different switches depends on the link delay in each loop. In BSNs interworking with B-ISDNs, the multi-loop scheme results in intensive cell accumulation at the gateway buffer when congestion occurs within the A T M backbone. It will thus reduce the buffer requirement for the A T M switches within the A T M backbone.  91  Chapter 6 Conclusions  Chapter 6 Conclusions 6.1 Summary In  this thesis, the performance of rate-based congestion control in BSNs interworking  with B-ISDNs is presented. It is obvious that long delays in satellite links will result in large buffer requirements. In end-to-end EFCI control, the delay, buffer threshold, buffer requirement, requested CLR in the ATM  and link utilization affects each other when congestion happens  switch. Therefore, procedures to trade-off network performance relative to long  link delays are necessary. In this project, an approach is proposed to minimize the buffer requirement and delay while maximizing the link utilization and the throughput. In end-to-end ER  scheme, we show that the product of data rate and the delay in each ABR  connection is  a key factor affecting the buffer occupancy when congestion happens. In end-to-end E P R C A scheme, the A and rj as well as AIR and RDF  could be used to adjust the buffer occupancy,  link utilization, and fairness according to the requirement. In  order to improve the performance of the rate-based congestion control scheme in  BSNs interworking with B-ISDNs, delay-based methods are proposed to dynamically adjust the allowed cell rate for the ABR  sources with different link delays. The algorithms of the  delay-based EFCI, E R and E P R C A are suggested and investigated with various models and parameters. In DBCI scheme, the AIR Since the small RDF  and RDF  will reduce the ACR  are adjusted by a and 3 based on the round trip delay. quickly for the short delay sources when congestion  happens, thus the buffer occupancy will be decreased. Also, the large AIR 92  will increase the  Chapter 6 Conclusions  A C R quickly and could increase the link utilization. The results show that the D B C I scheme works well with multiple A B R sources, especially in networks with long link delay. In D B E R scheme, both the analytical and simulation results show that the factors 7 and AR of D B E R play key roles on network performance. Results show that the D B E R scheme with proper 7 and AR improves the buffer occupancy significantly, while not affecting the throughput, link utilization much. In D B - E P R C A scheme, simulation results show that the AIR, R D F , A, 77 as well as the schemes selected for the A B R sources with various delay, will have significant effects on the network performance in buffer occupancy, link utilization, throughput, and fairness. Small R D F could improve the buffer occupancy, A and 77 can be used to limit the source rate in order to improve the fairness and link utilization, and DBCI or D B E R schemes can be implemented for A B R sources with short delay. Therefore, properly choosing those parameters and schemes will definitely improve the network performance. Simulation results show that the D B - E P R C A (DBER/EPRCA) scheme has the best performance in single-loop model. In double-loop scheme, the satellite link is separated from the A T M backbone and implemented in loop 1. It is observed that the segmented congestion control between BSNs and B-ISDNs evens out buffer requirements between switches and gateway compared to the results of single-loop schemes.  6.2 Future Work Although we have conducted extensive investigations on the end-to-end and double-loop schemes with different mechanisms, there is still a lot work to be done when the computing 93  Chapter 6 Conclusions  facilities and simulation tool are improved. 1. More realistic models with more sources, and higher rates should be studied by applying the generic and delay-based rate control schemes. 2. A more complicated V B R traffic model should be used in the simulation to see its effect on the various V B R / C B R traffic. 3. Newly developed schemes, such as ERICA scheme [27] [28], should be implemented and investigated in BSNs interworking with B-ISDNs. 4. The simulation could be done by choosing various sets of parameter and more loops in order to unveil more detailed effects of the segmented scheme on BSNs interworking with B-ISDNs.  94  Chapter 6 Conclusions  Bibliography [I] "Traffic management specification," in The ATM Forum Technical Committee, February 1996. [2] M . A . Miller, Analyzing Broadband Networks: Frame Relay, SMDS and ATM, ch. 8. M T Books, 2nd ed., 1994. [3] S. Shenker, C. Lefelhocz, B . Lyles and L . Zhang, "Congestion control for besteffort service: Why we need a new paradigm," IEEE Network Mag., pp. 10 - 19, January/Februry 1996. [4] T. M . Chen, S. S. L i u and V . K . Samalam, "The available bit rate service for data in A T M networks," IEEE Communications Magazine, pp. 56 - 71, May 1996. [5] R. Jain, "Simulation results: The E P R C A + scheme," in ATM Forum/94-0988, October 1994. [6] F. Bonomi and K . W. Fendick, "The rate-based flow control framework for the available bit rate A T M service," IEEE Network Mag., pp. 25 - 39, March/April 1995. [7] R. Jain, "Virtual source/virtual destination (VS/VD): Design considerations," in ATM Forum/96-1759, December 1996. [8] C. M . Ozveren, R. Simcoe and G. Varghese, "Reliable and efficient hop-by-hop flow control," IEEE J. Sel. Areas in Commun., vol. 13, pp. 642 - 650, May 1995. [9] F. Bonomi, "Flow control for the A T M available bit rate service," in Decision and Control, 1995 34th Annual Conference, pp. 365 - 367, 1995. [10] M . Ritter, "Network buffer requirements of the rate-based control mechanism for A B R services," in IEEE, Infocom'96, pp. 1190 - 1197, 1996. [II] A . Grami, K . Gordon and A . Shoamanesh, "The role of satellite in the information superhighway," in IEEE, 1CC95, pp. 1577 - 1585, 1995. [12] R. Jain, "Parameter values for satellite links," in ATM Forum/95-972, August 1995. [13] R. Jain, "New source rules and satellite links," in ATM Forum/95-1344, October 1995. 95  Chapter 6 Conclusions  [14] S. Ramseier and T. Kaltenschee, " A T M over satellite: Analysis of A T M QoS parameters," in IEEE, ICC'95, pp. 1562 - 1566, 1995. [15] N . Yin, "Analysis of a rate-based traffic management mechanism for A B R service," in IEEE, Globcom'95, pp. 1076 - 1082, 1995. [16] R. Jain, " B E C N : Why we need a time stamp or sequence number in the R M cell," in ATM Forum/94-0987, October 1994. [17] D. H . K . Tsang and W. K . F. Wong, " A new rate-based switch algorithm for A B R traffic to achieve Max-Min fairness with analytical approximation and delay adjustment," in IEEE, Infocom'96, pp. 1174 - 1181, 1996. [18] D. P. Heyman and T. V . Lakshamn, "Source models for V B R broadcast-video traffic," IEEE Trans, on Networking, vol. 4, pp. 40 - 48, February 1996. [19] L . G. Cuthbert and J. Sapanel, ATM The Broadband Telecommunications Solution, ch. 8. The Institute of Electrical Engineers, 1st ed., 1993. [20] K . Y . Siu and R. Jain, " A brief overview of A T M : Protocol layers, L A N emulation, and traffic management," in Technical Report of OSU, 1996. [21] B . L . Mark and G. Ramamurthy, "Real-time estimation of U P C parameters for arbitrary traffic sources in A T M networks," in IEEE, Infocom'96, pp. 384 - 392, 1996. [22] K . Y . Siu and H - Y Tseng, "Adaptive proportional rate control for A B R service in A T M networks," in Computers and Communications, 1995 Int'l. Phoenix Conference, pp. 529 - 535, 1995. [23] R. Krishnan, "Rate based control schemes for A B R traffic - design principles and performance comparison," in IEEE, Globalcom'96, pp. 1231 - 1235, 1996. [24] R. Jain, "Congestion control with explicit rate indication," in ATM Forum/94-0692, July 1994. [25] N . Ghani and J. W. Mark, "Dynamic rate-based control algorithm for A B R service in A T M networks," in IEEE, Globalcom'96, pp. 1074 - 1079, 1996. [26] A . Charny, "Congestion control with explicit rate indication," in IEEE, ICC'95, pp. 1954 - 1963, 1995. [27] R. Jain, "ERICA switch algorithm: A complete description," in ATM Forum/96-1172, August 1996. 96  Chapter 6 Conclusions  [28] R. Jain, " A B R switch algorithm testing: A case study with ERICA," in ATM Forum/961267, October 1996. [29] R. Jain, "Simulation results for ERICA switch algorithm with V B R + A B R traffic," in ATM Forum/95-0467, April 1995. [30] R. Jain, "Transient performance of E P R C A and E P R C A ++," in ATM Forum/94-1173, November 1994. [31] S. Famay, R Jain, S. Kalyanaraman and R. Goyal, "Source behavior for A T M A B R traffic management: A n explanation," in Technical Report ofOSU, 1996. [32] A . Varma, L . Kalampoukas and K . K . Ramakrishman, "Dynamics of an explicit rate allocation algorithm for available bit-rate (ABR) service in A T M networks," in Technical Report of UCSC, 1995. [33] R. Jain, "The O S U scheme for congestion avoidance using explicit rate indication," in ATM Forum/94-0883, September 1994. [34] I. Iliadis, " A new feedback congestion control policy for long propagation delays," IEEE Journal on Selected Areas in Communications, vol. 13, pp. 1284 - 1295, September 1995. [35] R. Jain, "Congestion control and traffic management in A T M networks: Recent advances and a survey," in Technical Report of OSU, 1996. [36] D. Bertsekas and R. Gallager, Data Networks, ch. 3. Englewood Cliffs, NJ: PrenticeHall, 1987. [37] W. Starlings, ISDN and Broadband ISDN with Frame Relay and ATM, ch. 5. Englewood Cliffs, NJ: Pretice-Hall, 3rd ed., 1995. [38] L . Fratta, G. Bianchi and L . Musumeci, "Congestion control algorithms for the A B R service in A T M networks," in IEEE, Globalcom'96, pp. 1080 - 1084, 1996.  97  Appendix A Acronyms A A L — A T M Adaptation Layer A B R — Available Bit Rate A C R — Allowed Cell Rate AIR — Additive Increase to Rate A T M — Asynchronous Transfer Mode B-ICI — Broadband Inter-Carrier Interface B-ISDN — Broadband Integrated Services Digital Networks B R M — Backward R M BS — Block Start Bit B S N — Broadband Satellite Network B T — Burst Tolerance C A C — Call Admission Control C B R — Constant Bit Rate CCR — Current Cell Rate C D V — Cell Delay Variation C D V T — Cell Delay Variation Tolerance CI — Congestion Indication C L P — Cell Loss Priority C L R — Cell Loss Ratio CTD — Cell Transfer Delay 98  DBCI — Delay-Based Congestion Indication Scheme D B E R — Delay-Based Explicit Rate Scheme D B - E P R C A — Delay-Based Enhanced Proportional Rate Control Algorithm DES — Destination End System D X I — Digital Transmission Interface EFCI — Explicit Forward Congestion Indication E P R C A — Enhanced Proportional Rate Control Algorithm ERICA  Explicit Rate Indication for Congestion Avoidance  ER — Explicit Rate F S M — Finite State Machine F R M — Forward R M GCI — Generic Congestion Indication G C R A — Generic Cell Rate Algorithm GFC — Generalized Flow Control H E C — Header Error Check ITU — International Telecommunication Union L R — Link Rate M A C R — Modified A C R M C R — Minimum Cell Rate M B S — Maximum Burst Size MRTT — Maximum Round Trip Time NNI — Network-to-Node Interface 99  Nrm — Maximum number of cells between RM-cell generation nrr-VBR — Non-Real-Time V B R OSI — Open System Infrastructure PCR — Peak Cell Rate P R C A — Proportional Rate Control Algorithm PTI — Payload Type Indicator P V C — Permanent Virtual Connection QoS — Quality of Service RDF — Rate Decrements Factor R M — Resource Management RTT — Round Trip Time rr-VBR — Real-Time V B R SAR — Segmentation and Reassembly SCR — Sustained Cell Rate SES — Source End System S V C — Switched Virtual Connection TS — Time Stamp U B R — Unspecified Bit Rate U N I — User-to-Network Interface UPC — Usage Parameter Control V B R — Variable Bit Rate V C — Virtual Circuit 100  V C I — Virtual Channel Identifier VPI — Virtual Path Identifier  101  A p p e n d i x B C a l c u l a t i o n of C o n f i d e n c e Interval In order to ensure the accuracy of the simulation results, each simulation is repeated 10 times by using different seed parameters, i.e., ten runs for a single simulation. Since all the simulations are performed by the same software package, the simulation accuracy is similar to each other. Therefore, only one set of calculations is provided to indicate the accuracy of the simulation results. For the buffer occupancy, the 99% confidence level of the results can be obtained by : •5 • —=  x — t  a/2  v  <  X <  _ X +  t  n  • a  /2  S —=.  V  (25)  n  where: (26)  n and  T(*-*)  :  (27)  n - 1  With 10 independent runs, the degree of freedom is 9, for 99% confidence level, we can get t /2 = 3.250 from the table of ^-distribution. Therefore, the 99% confidence levels of the a  sample results of the buffer occupancy in chapters 3 and 4 are given in Table B . l . Table B . l 99% Confidence Interval of Simulation Results  Simulation  Mean Buffer  Standard  99% Confidence Interval  Scheme  Occupancy (cells)  Deviations  (cells)  CI  1270  26.27  [1244, 1297]  DBCI  727  23.35  [703, 751]  ER  3137  128.44  [3005, 3269]  DBER  1214  37.95  [1175, 1253]  102  Appendix C Simulation Models in O P N E T ®  : A B R Node : VBR Node : A T M Switch  [A] X  Source 2  Source_l  Gateway  ATM _SW_1  ATM SW 2  Source 3  Network Model with 3 Source/Destination Pairs  Source_4  Network Model with 5 Source/Destination Pairs Figure C . l Configurations of Simulation Network Models 103  A B R / V B R Source Node  •  : Process  E§  : Transmitter  H  : Receiver  A B R / V B R Destination Node  pr_3  P_4  A T M Switch Node  Figure C.2 Source/Destination and Switch Node 104  pt_3  (! NOTIFY_COMPLETE)  (EVENT_STORED)  A T M Switch P r o c e s s  i (NEIGHBOR_NOTIFY)  '  I  I I (default)  A A L 5 - Dispatch P r o c e s s  Figure C.3 F S M of A T M Switch and 105  AAL5 Processes  A A L 5 - S A A L Process  A A L 5 - A A L 5 Process Figure C.4 F S M of  106  AAL5 Processes  Appendix D Notes on the Simuiation Models Using OPNET 1. When using rate-based scheme, the traffic generated by A A L module should be controlled by checking the segmentation time and simulation time in order to avoid the excessive pre-scheduled data spaced by the cell rate prior to the current cell rate. 2. In order to create the congestion, we need to inject more traffic than the link could accommodate. But, in generic A T M traffic control schemes such as C A C and UPC, traffic from new sources with too high data rate or current links with abrupt large rate increases will be prevented from entering the system by C A C and UPC. Thus, it is necessary to modify the labeled PCR in the source generator and turn off the UPC function in the transportation module of the A T M switch. 3. It should be noted that the A A L 5 is a hierarchically structured process, such that when the name of the one process is changed, the name of its upper process must be changed too. Otherwise, the compilation will fail. 4. When multiple A A L 5 models are required in a simulation, there may be a multiple definition problem. To solve it, we need to rename every functions under the new A A L 5 model. Then, we can add new features into the new models, e.g. the DBER, DBCI, or DB-EPRCA schemes. 5. Change buffer threshold in the cell-enqueue function of the A T M switch module. 6. Insert R M cells in the cpcs_pdu_send function of the A A L 5 module (under saal and disp modules). 107  7. Reallocate the link rate for ER scheme in the cell_arrive F S M of the A T M switch module (process) in the A T M switch node. 8. For double-loop model, a virtual source and destination pair is created in the cell_arrive F S M of the A T M switch module (process) in the A T M switch node. The incoming forward R M cell stream is split into two equal parts, one is sent back to the source and the other is forwarded to the destination as the R M cells of the second loop.  108  

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                            <div id="ubcOpenCollectionsWidgetDisplay">
                            <script id="ubcOpenCollectionsWidget"
                            src="{[{embed.src}]}"
                            data-item="{[{embed.item}]}"
                            data-collection="{[{embed.collection}]}"
                            data-metadata="{[{embed.showMetadata}]}"
                            data-width="{[{embed.width}]}"
                            async >
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