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An approach to improving battery life time in a PV application using high energy density double layer… Majaess, David 2006

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A N A P P R O A C H TO IMPROVING B A T T E R Y LIFE TIME IN A PV APPLICATION USING HIGH E N E R G Y DENSITY D O U B L E L A Y E R CAPACITORS  by DAVID MAJAESS B. Eng., Dalhousie University, Halifax, NS, 2003  A THESIS SUBMITTED IN P A R T I A L F U L F I L L M E N T OF THE REQUIREMENTS FOR THE D E G R E E OF M A S T E R IN APPLIED SCIENCE  in  THE F A C U L T Y OF G R A D U A T E STUDIES (Electrical and Computer Engineering)  THE UNIVERSITY OF BRITISH C O L U M B I A April 2006  © David Majaess, 2006  Abstract An application to monitor Steller sea lions using a sub dermal sensor requires a power supply to provide energy for wildlife monitoring base stations. The base stations are positioned near the habitats of the North Pacific Steller sea lions in isolated coastal areas of North British Columbia and South Alaska. The locations expose the base station to high winds, storms, ice, snow, debris, impacts from ocean waves, salt corrosion, and wide temperature swings. Furthermore, due to the remote distance, there is limited infrastructure; connection to the electrical grid is impossible and installation/maintenance is costly. The project requires a ruggedized, autonomous power supply requiring minimum maintenance and a long operating life. Therefore, the thesis proposes a unique power supply design incorporating high energy density double layer capacitors (ultracapacitors) that extends serviceability and improves immunity to cold climates. Finally, the researchers working on the Steller sea lion project have a limited economic budget and require a low cost system that is simple to transport and easy to install. The purpose of this research is to extend the battery's service life and improve the base station's immunity to cold climates. In this thesis, two methods are used to accomplish the objective. The first undertaking is to extensively research, design and implement high efficient components to minimize battery demand. As a result, the input source, its electronics and the load are well matched for the application. The next task is to incorporate a battery/capacitor bank to store energy. B y integrating ultracapacitor technology to create a hybrid energy storage system, the battery cycling is minimized.  11  Table of Contents Abstract Table of Contents List of Tables List of Figure Introduction 1.1 Research Objectives 1.2 Structure of the Thesis Chapter 2 Application Design 2.1 The Base Station System 2.2 Power Supply Requirements and Restrictions 2.3 Location and Climate 2.4 Component Sizing 2.5 Idea Generation 2.5.1 Ultracapacitor Storage 2.5.2 The Power Supply 2.6 Base Station's Energy Budget 2.7 System Energy Portfolio 2.7.1 Transceiver 2.7.2 Power and Data Management 2.7.3 Satellite Phone 2.7.4 Climate Control 2.7.5 Efficiency Factor 2.7.6 Energy Consumption 2.8 Renewable Technology Chapter 3 Photovoltaic Systems 3.1 Solar Cell 3.1.1 Cell Modeling 3.2 Solar Insolation 3.3 Performance Characteristic 3.4 Wattage 3.5 Temperature 3.6 Tilt Angles 3.7 Solar Declination Adjustment 3.7.1 Base Station Tilt Angle 3.7.2 Solar Panel Sizing and Selection Chapter 4 Energy Storage Systems 4.1 Types of storage systems 4.2 Battery Technology 4.2.1 The Battery Cell 4.2.2 Capacity 4.2.3 Battery Energy Losses 4.3 Battery Types 4.3.1 Primary Batteries  » i" vii viii 1 2 2 4 4 5 5 7 7 8 8 10 12 12 12 13 13 14 15 15 17 17 17 18 18 18 18 20 20 23 25 26 26 27 27 28 29 30 30 iii  4.3.2 Secondary Batteries 4.3.2.1 Lead-Acid 4.3.2.2 Vented Nickel Cadmium 4.3.2.3 Sealed Nickel Cadmiums 4.3.2.4 Nickel-Metal Hydride 4.3.2.5 Lithium-Ion 4.3.2.6 Lithium-Polymer 4.3.3 Summary of Battery Technology 4.4 Battery Selection 4.5 Lead-Acid Battery Technology 4.5.1 Plate Limited Versus Electrolyte Limited 4.5.2 Flooded and Valve Regulated Lead Acid Batteries 4.5.3 Battery Life 4.5.4 Grid corrosion 4.5.5 Sulfation 4.5.6 Charging Lead-Acid Batteries 4.6 Lead-Acid Applications 4.6.1 Starting/Lighting/Ignition Battery 4.6.2 Deep-Cycle Battery 4.6.3 Float Service Battery 4.7 The Trojan T-105 and The Prevailer PV30H Battery 4.7.1 Cost 4.7.2 Discharge Rate 4.7.3 Temperature Performance 4.7.4 Battery Sizing 4.8 UltraCapacitor Technology 4.8.1 Long Life 4.8.2 Discharge/Charge Capability 4.8.3 Modeling Ultracapacitor's ESR and EPR 4.8.4 Temperature Performance 4.8.5 Environment 4.8.6 Disadvantage of Ultracapacitors 4.8.7 Voltage Balance 4.8.8 Ultracapacitor Selection 4.8.9 Energy Capacity 4.9 Energy Bank Topology Chapter 5 Power Converters 5.1 Linear Regulators 5.2 Switchmode Power Converters 5.2.1 The Buck Converter 5.2.2 The Buck Topology 5.2.3 I R M S Calculations 5.2.3.1 Inductor RMS Current 5.2.3.2 High Side Switch (Switch 1) rms Current 5.2.3.3 Low Side Switch (switch 2) rms Current 5.2.4 Capacitor Bank dc/dc Converter  30 31 31 32 32 32 32 33 35 35 36 36 37 37 38 38 39 39 39 40 40 40 41 41 42 42 43 43 44 45 45 45 46 47 48 49 50 50 50 51 51 54 54 54 55 55 iv  5.2.5 Maximum Switching Frequency 5.3 Switch-Mode Power Inductors 5.3.1 Powder Cores 5.3.2 Ferrite Cores 5.3.3 Inductor Losses 5.3.3.1 Winding Losses 5.3.3.2 Core Loss 5.4 Inductor Design 5.4.1 Inductor Selection 5.4.2 Inductor Construction Chapter 6 Semiconductor Switches 6.1 Bipolar Junction Transistors 6.2 Metal-Oxide Semiconducting Field Effect Transistors 6.3 Insulated Gate Bipolar Transistors 6.4 Switch Selection 6.5 The Characteristics of the Power MOSFET 6.5.1 The MOSFET Operating Regions 6.5.2 Parasitic Capacitances and Inductance 6.6 Power Losses 6.6.1 Conduction Losses 6.6.2 MOSFET Switching Losses 6.6.2.1 The Gate Charge Loss 6.6.2.2 Crossover Loss 6.6.2.3 Power Dissipation due to cross conduction 6.6.2.4 Total MOSFET Loss 6.7 High Side Losses (Switch 1) 6.8 Low Side Losses (Switch 2) 6.9 MOSFET Selection Chapter 7 Circuit Implementation and Evaluation 7.1 Maximum Power Point Tracker 7.1.1 Implementation of the Hill Climbing MPPT 7.1.1.1 TheP-V andP-D Curve 7.1.1.2 Step Size 7.1.2 MPPT Logic 7.1.3 Input Capacitance 7.1.3.1 Input Capacitor's RMS Current 7.1.3.2 Input Capacitance Value 7.1.4 Settling Time 7.1.5 MPPT Discontinuity 7.1.6 MPPT Result 7.2 Implementation of the Capacitor Bank dc/dc Converter 7.2.1 Start Mode 7.2.2 Capacitor Converter's Efficiency 7.3 System Implementation Chapter 8 Conclusion Chapter 9 Future Work  57 58 58 58 59 59 60 61 63 65 66 68 68 69 70 70 70 72 73 73 74 74 76 80 81 81 81 81 83 86 86 87 89 90 92 93 94 95 96 96 97 103 104 104 108 Ill v  Bibliography Appendix A Base Stations locations Appendix B Schematic Appendix C Software Code Appendix D Local Manufacturer Contact Information  113 117 118 120 143  vi  List of Tables Table 1 Climate data at Annette, Alaska Table 2 The base station's energy consumption portfolio Table 3 The day of month to day of year conversion table Table 4 Solar panel size Table 5 The BP350's properties Table 6 Lead acid battery Table 7 Vented NiCad battery Table 8 Sealed NiCad battery Table 9 N i M H battery Table 10 Lithium ion battery Table 11 Lithium polymer battery Table 12 Full charge battery voltage at different temperatures Table 13 Freezing point of DOD Table 14 Battery sizing chart Table 15 Magnetic's inductor properties Table 16 Magnetic's inductor core dimensions Table 17 Top 15 cores with the lowest losses Table 18 Operating parameters at the P V ' s maximum power point Table 19 MOSFET selection Table 20 Nominal operating conditions Table 21 Component pricing Table 22 Base station locations  6 15 22 25 25 33 33 34 34 34 34 38 41 42 63 64 64 82 82 86 107 117  vii  List of Figures Figure 2-1 A generalized diagram of the Steller sea lion base station Figure 2-2 The geographic location of interest Figure 2-3 The base station's power supply Figure 3-1 The photovoltaic's circuit model Figure 3-2 The photovoltaic's performance characteristics Figure 3-3 The earth's solar orbit Figure 3-4 Earth's orientation at the Solstice Figure 3-5 The earth's declination angle Figure 3-6 The tilt angle at different days of the year Figure 4-1 The energy storage system Figure 4-2 Inside view of a battery cell Figure 4-3 The polarization and electrical resistance losses in batteries Figure 4-4 The V R L A battery's cycle life Figure 4-5 The temperature versus capacity performance Figure 4-7 The ultracapacitor classical equivalent circuit model Figure 4-8 Passive circuitry for voltage balancing Figure 4-9 Active circuitry for voltage balancing Figure 4-10 The percentage of energy versus capacitor voltage Figure 4-11 The energy bank topology Figure 5-1 Buck converter topology and switching action Figure 5-2 The inductor's voltage and current signal Figure 5-3 The capacitor bank's charging characteristics Figure 5-4 The skin effect Figure 5-5 The inductance (a) physical model and (b) electrical equivalent circuit Figure 5-6 The inductor's saturation curve Figure 6-1 Switching device selection at different frequencies and voltages Figure 6-2 MOSFET and IGBT conduction loss Figure 6-3 The MOSFET's operating regions Figure 6-4 The MOSFET's parasitic elements Figure 6-5 The M O S F E T ' S normalized R n Figure 6-6 The gate's charge plot Figure 6-7 The gate's current path Figure 6-8 MOSFET turn on behavior Figure 7-1 Microcontroller state diagram Figure 7-2 MPPT functional diagram and control loop Figure 7-3 Photovoltaic P-D curve Figure 7-4 MPPT logic flow Figure 7-5 MPPT illustration Figure 7-6 The input capacitor's current plot Figure 7-7 The BP350's performance using the MPPT Figure 7-8 UltraCapacitor converter's functional diagram Figure 7-9 Capacitor current limiting topology and control loop Figure 7-10 The converter's current sense and drive signal at 1 A D S o  4 6 9 18 19 21 21 23 24 26 28 29 37 41 44 46 47 48 49 52 53 56 60 62 65 67 69 71 72 74 75 78 79 85 87 89 90 92 93 97 98 99 100 viii  Figure 7-11 The capacitor's converter operating in buck mode Figure 7-12 The capacitor's converter operating in boost mode Figure 7-13 The discontinuous mode signal to prevent reverse current Figure 7-14 The power supply's digital controller, MPPT tracker and capacitor converter Figure 7-15 The power supply with its energy storage banks Figure 7-16 U B C ' s two BP350W photovoltaic panels  101 102 103 106 106 107  IX  Introduction Researchers at the University of British Columbia in Vancouver, Canada are examining the possibility of using sub-dermal radio frequency identification tags for monitoring Steller sea lions. Dispersal and mortality rates of Steller sea lion pups are unknown and the implantable telemetry tag under development will be used to help determine these rates. A base station located nearby will monitor the tags and identify the distinct radio signals from nearby animals. Monitoring takes place in remote, marine regions located off the British Columbia's North West and Alaska's South coast. The stations will be located in isolated, harsh climate areas where they are required to survive high winds, ice, snow, salt water, abrasion, U V light, and wide temperature swings. Regardless of these environmental conditions, the power supply is expected to provide a reliable energy source for the Steller sea lion application. The monitoring locations are remote, making a connection to the electrical grid unfeasible. Thus, power is extracted from renewable energy sources such as wind or solar.  Unfortunately, renewable  energy sources are an intermittent source of power and do not always coincide with the load. Either the energy generated cannot be consumed or when necessary, the source cannot deliver enough energy. A n energy storage solution significantly improves power availability because it regulates the energy flow. Batteries are the standard method used to store energy.  However,  batteries require maintenance and below freezing temperatures, their performance and capacity degrade dramatically. The base stations are located in remote, Arctic areas where battery performance and long service life become questionable. Therefore, this thesis proposes a unique power supply design utilizing double layer capacitors to improve performance. These capacitors, also known as ultracaps (or ultracapacitors), are a new technology that can be used in conjunction with or even replace batteries to store electrical energy. Ultracapacitors have three significant advantages: they can operate in very low temperatures, their full energy capacity can be utilized, and their recharging cycle life significantly exceeds battery technology. Power supplies implemented using this technology offers reliability in cold weather and less maintenance. The objective of this thesis is to design a power supply that will operate reliably using a storage system that incorporates ultracapacitors.  1  Introduction  2  1.1 Research Objectives The purpose of this research is to improve the limitations of battery energy storage systems by integrating capacitor technology to create a battery/capacitor hybrid system with reliable low temperature performance and extended operating life. The hybrid storage system will be used to develop a low power supply that can extract energy from renewable resources in an Arctic environment. The thesis will examine the reality of implementing such a project because economics and practicality plays a significant role in design. The sea lion group requires an affordable supply that is convenient to transport and simple to install. The following objectives have been identified: •  identify the base station's power budget  •  research the wind velocity and solar insolation at the locations of interest  •  develop a power point tracker to operate a solar panel at its optimum efficiency  •  study the power characteristics and efficiency of electrical devices  •  optimize semiconductor selection for best performance  •  investigate the performance of battery technology  •  hybridize ultracapacitor and battery technology  •  implement a power management scheme  1.2 Structure of the Thesis This section describes the structure of the thesis. The chapters are summarized as follows: •  Chapter 2 details the application. The base station's function, requirements, power budget and design restrictions are identified. Finally, an implementation solution is introduced.  •  Chapter 3 discusses photovoltaic systems. Their performance characteristics, operation, sizing, cost and selection are described.  •  Chapter 4 describes energy storage devices and their significance for this project. Specifically, the hybridization of battery and ultracapacitor technologies is studied in depth.  •  Chapter 5 explains dc/dc converters and their applications within the base station. The synchronous buck converter's theory is briefly summarized. In this chapter, the filter inductor is discussed in great detail. A theoretical model is developed to help optimize the efficiency during the core's design.  Introduction •  3  Chapter 6 is an extension on dc/dc converters. However, this chapter focuses on the semiconductor switch. For best performance, different semiconductor technologies are explored.  In particular, the switching behavior of MOSFETs is studied and equations  modeling the losses are derived. •  Chapter 7 discusses the circuit implementation. The base station's digital controller is constructed. The solar panel's maximum power point tracker is presented and its logic is explained. Based on experimental results, the tracker's performance and efficiency are analyzed. Finally, the ultracapacitor's charging system is described.  •  Chapter 8 concludes the thesis. The implementation and final performance is summarized.  •  Chapter 9 suggests the future work.  Chapter 2 Application Design This chapter discusses the base stations requirements, identifies the restrictions, estimates the power budget and researches the wind velocity and solar insolation at the locations of interest. 2.1 The Base Station System The base station retrieves data from monitoring tags implemented in Steller sea lions. The data is stored in the base station and is periodically uploaded to a remote server via a satellite network. Figure 2-1 illustrates the base station. As shown, the power supply provides energy for several systems: •  a radio transceiver to communicate and retrieve information from the sea lion tags  •  a data processor to gather the information  •  a satellite modem to upload data  •  a climate controller to regulate the operating temperature within the base station  •  a power management system to monitor and maintain the energy supply Seal Lion Tag  Data Radio Link  Satellite link  S e a Lion B a s e  Station  Satellite  Remote Server  Transceiever Data Flow Received Data  • • • • »  JoData  Uplink  I  Processor Renewable Resources  Output Energy Flow  Power Supply Input Energy  Climate Controller  Power Supply Controller  Power Management  Figure 2-1 A generalized diagram of the Steller sea lion base station 4  Chapter 2 Application Design  5  2.2 Power Supply Requirements and Restrictions The base station requires a heavy duty, robust, off the grid power plant designed for Arctic and marine conditions. The power supply design for this application must be extremely durable because it will operate in an environment with subzero climate, high winds, rain, salt air and humidity. It will also have to survive impacts from ocean waves. The system must operate with a temperature range between -30 °C to 45 °C and must survive a range between -45 °C to 65 °C. The base station will be placed in isolated areas with no infrastructure and limited access. To minimize the costly installation/service overhead, the power supply will be low maintenance, simple to transport and easy to install. A n operating time of five years between servicing is desired. The sea lion group has a limited budget and the final design is a compromise between cost, efficiency and reliability. To lessen the disturbance on wildlife, the base station must merge into the natural surroundings as much as possible. Any generated noise or movement must be kept to a minimum. Even the station's color will be chosen for camouflage. For wildlife and human safety, sharp objects protruding from the station, large radiation and high voltage are not permitted. The input power is supplied from renewable sources such as wind and/or solar energy. A backup energy storage system utilizing ultracaps and batteries will be designed to provide power when the renewable resources are unavailable. 2.3 Location and Climate The base stations are commissioned at different locations throughout the coast of south Alaska and British Columbia. Figure 2-2 is a map indicating the area of interest. The Latitude and Longitude coordinates for each site are included in Appendix A . Daily solar radiation data is recorded at Annette's meteorological station (located in Alaska). This information is available from the United States Department of Energy's Office of Energy Efficiency and Renewable Energy. Environment Canada records temperature and precipitation statistics at several stations along British Columbia's coast but lacks information on solar radiation. Thus, the data used to predicate the amount of energy available from renewable resources was gathered at Annette, Alaska (Table 1, Climate data at Annette, Alaska [1].) The following map indicates the region of interest [2].  Chapter 2 Application Design  6  Yukon > Territory  N  Gulf Of Alaska  Annette, Alaska Station Number Latitude Longitude Elevation Mean Pressure  25308 55.03°N 131.57° W 34 m 1009 millibars Figure 2-2 The geographic location of interest  Table 1 Climate data at Annette, Alaska Solar Radiation (kWh/m2/day) Uncertainty ±9 % Tilt D  0  Lat- 15  Lat  Lat + 15  Jan  Feb  Mar  Apr  May  Jun  Jul  Aug  Sep  Oct  Nov  Minimum  0.40  0.90  1.60  2.70  4.00  4.10  3.50  3.20  2.20  1.30  Maximum  0.90  1.60  3.00  4.40  5.40  6.40  5.90  4.80  3.30  1.80  Average  0.65  1.25  2.30  3.55  4.70  5.25  4.70  4.00  2.75  Minimum  0.70  1.00  1.90  2.90  4.00  3.90  3.40  3.30  2.50  Maximum  2.30  3.70  4.60  5.40  5.80  6.40  6.10  5.50  4.50  Average  1.50  2.35  3.25  4.15  4.90  5.15  4.75  4.40  3.50  Minimum  0.70  1.00  1.80  2.80  3.70  3.50  3.10  3.10  2.40  Maximum  2.70  4.10  4.80  5.30  5.40  5.90  5.70  5.20  Average  1.70  2.55  3.30  4.05  4.55  4.70  4.40  Dec  Year  0.60  0.30  2.40  1.10  0.60  2.80  1.55  0.85  0.45  2.60  1.50  0.80  0.40  2.70  2.90  2.60  1.50  3.40  2.20  1.70  0.95  3.05  1.50  0.80  0.40  2.60  4.50  3.00  3.00  1.70  3.30  4.15  3.45  2.25  1.90  1.05  2.95  Minimum  0.70  1.00  1.70  2.50  3.20  3.10  2.70  2.80  2.30  1.40  0.80  0.40  2.40  Maximum  2.80  4.30  4.70  4.80  4.70  5.10  4.90  4.70  4.30  3.00  3.10  1.90  3.10  Average  1.75  2.65  3.20  3.65  3.95  4.10  3.80  3.75  3.30  2.20  1.95  1.15  2.75  Chapter 2 Application Design  7  (Table 1 continued) Temperature (°C)  .  Jan  Feb  Mar  Apr  May  Jun  Average  1.3  Jul  2.8  Aug  4.1  Sep  6.3  Oct  9.4  Nov  12.4  Daily M i n  -1.3  2.8 9.7  5.7 13.2  8.8 16  18.1  -17.2  -6.1  1.5 6.6  4.4  16.7  0.6  27.8  2.8 31.7  -0.3 4.4  16.1  -0.6 31.1  18.3 4.4  8.3 5.5 11  Record Hi  -16.7 17.2  12.3 8.9 15.7  2.1  3.8 -17.2  1.1 7.1  14.8 11.3  4.1  Daily Max Record Lo  0.1 5.5  14.6 11.1  10.8 -19.4  32.2  27.8  -19.4 19.4  -17.2  31.7  -7.8 21.7  16.7  32.2  Average  4.9  5.0  4.4  4.4  3.4  3.7  Dec 7.7 4.6  Wind Speed (m/s) 3.8  3.7  3.4  |  4-8  [  5.0  |  4.8  |  4.2  2.4 Component Sizing To supply the base station's energy budget, proper selection of the renewable source and storage component is critical. Sizing too small, prevents continuous operation and drains the storage elements causing component exhaustion, wear out and failure. Over sizing is also restrictive because as components enlarge, cost increases and transportation/installation becomes a burden. Factors to consider for selecting the renewable source and energy storage are as follows: The insolation patterns, temperature and wind speeds in the geographical area of installation Load requirements The number of days that energy must be supplied from the energy storage Temperature effects on capacity and performance Aging effect Component efficiency Cost Weight and physical size 2.5 Idea Generation The idea is to design an autonomous system that supplies the power needs for a radio base station from a renewable source. A maintenance free, energy storage, subsystem will supply power when the input source is unavailable. To insure that the energy reserve is not completely depleted, the power consumption is monitored. If the stored energy becomes low and the renewable source remains unavailable, then the base station enters a "sleepmode" state. In this state, the radio communication with the Stellar sea lion is placed temporally offline until the  Chapter 2 Application Design  8  energy is replenished. This offline condition is a worst case scenario that prevents the system from completely exhausting its energy reserves. To minimize the likelihood of entering the sleepmode state, the sizing of the source and its energy storage system is critical. 2.5.1 Ultracapacitor Storage An ultracapacitor storage system will be incorporated in the design. Using a capacitor as an energy supply has many advantages over rechargeable batteries. A capacitor charge/discharge life is large, greater than 500,000 cycles [3]. A battery's cycle life is typically 200 times less. Capacitors have no disposable parts. They can withstand large currents and may be discharged to any level without damage. Accurate charge and time monitoring are unnecessary.  Capacitors  can operate at a wider temperature range than batteries making them attractive for this base station application. Unfortunately, ultracapacitors have a breakdown voltage, approximately 2.5 V. This is effectively their over charge limit. This application utilizes a series connection to obtain a larger voltage range. However, stacked capacitors involve additional voltage equalization circuitry [4]. Finally, a capacitor's energy density is not as large as batteries. Section 4.8 discusses ultracapacitors in more detail. 2.5.2 The Power Supply The power supply provides a reliable source of energy for the base station by monitoring and regulating the energy from renewable resources. The operation of the power supply is categorized into several subsystems. They are as follows: input regulator and maximum power point  tracker, power  management, power supply dc/dc converters,  energy reserve  monitoring/charging, sleepmode controller and power circuitry. Figure 2-3 demonstrates how the subsystems collaborate with each other. The solid arrows indicate the energy flow direction throughout the power supply. The dashed arrows are an illustration of the communication signals between each subsystem. The systems are numbered and their functions are explained below the figure.  Chapter 2 Application Design  9  INPUT ENERGY f  Solar  1  1  I' I  / l \ Wind  I Energy 1 Flow  Input Regulator/ Max P o w e r Point Tracker  Power Supply DC/DC Converters  Power Management  m  •  J  m  Power Circuitry  m  Determine the energy needs for the station  Surplus energy Charge Reserves  | Stored • Energy Amount I Signal  (12 V, 5 V)  Sleep Mode (On/Off Signal)  Energy Reserve Monitoring/ Charging  E  Energy Reserve Battery  7 ^ utiracap  Output Energy for Base Station  Sleep Mode Controller  m  Temp Signal  Temperature Control  DO  Excess Energy Bleed? Shut Input?  Energy Flow For Subsystem  Figure 2-3 The base station's power supply 1. Input Regulator and Maximum Power Point Tracker The input power regulator and maximum power point tracker determine whether wind and/or sun energy is available. If so, the energy is then fed to the power management system. For optimum efficiency, the power point tracker operates the input source at its peak operating point.  2. Power Management The power management is a digital based system responsible for controlling the energy flow. The power management directs the renewable energy to the base station and reroutes surplus energy to storage. If no input energy is available, then the base station's energy is retrieved from storage.  3. Power Supply dc/dc Converters The dc/dc converters are responsible for the voltage/current conversions. The power supply will provide the base station with two voltage outputs: 12 V and 5 V . The 12 V output provides the power for the transceiver and satellite communication. The 5 V is the logic voltage used for the base station's controlling circuitry.  Chapter 2 Application Design  10  4. Energy Reserve Monitoring/Charging The energy reserve monitoring/charging regulates the charging and discharging process insuring that the energy reserves are not overcharged or depleted beyond their lower threshold. This system communicates the amount of stored energy with the power management system. 5. Sleepmode Controller The sleepmode controller prevents complete exhaustion of the energy reserves. The base station is placed offline and the power supply enters a minimum function mode allowing the power management system to operate in an ultra-low power consumption state while it waits for the renewable energy to return. The system's average sleepmode power consumption is a few mW, allowing the sleepmode state to operate for months. 6. Temperature Control The temperature controller monitors and regulates the operating temperature of the power supply. The power supply is designed to operate between -30 °C to 45 °C. However, i f the base station's internal temperature exceeds its normal operating range, the temperature controller signals the system to enter the sleepmode state.  7. Power Circuitry The power circuitry supplies the power for the base station's subsystems. The critical subsystems such as the power management, energy reserve monitoring, and temperature controller have a constant power supply regardless i f the base station is online or in sleepmode. The next section calculates the amount of energy the power supply and its load (the base station) requires. 2.6 Base Station's Energy Budget The amount of energy required determines the capacity of the energy storage banks and the size of the input power source. The power supply provides energy for the following system within the base station: a radio transceiver, data storage, and satellite link. Energy is also required for the power supply's circuitry and temperature monitoring. For this application, the banks are sized by averaging the power (over a weekly window) for each system. The weekly  Chapter 2 Application Design  11  average is utilized because not all the systems operate continuously. For instance, the satellite phone transmits 10 minutes a week and remains offline for the remainder. B y determining each system's average power and predicting its operating time, the energy consumption can be calculated. It is convenient to discuss the energy consumed per day because batteries are rated by their Amp-hour capacity and the insolation data is provided as a daily average. The base station's energy budget is the summation of the energy consumption for all its systems. The storage banks are sized by determining the difference between the energy budget and the amount of energy the renewable sources can provide. To offset the unpredictability in renewable energy resources, estimations are based on a worst case scenario. The energy storage banks must provide sufficient energy for at least ten days of continuous operation. For clarity, the terms run power (P ), R  weekly averaged power (Pw), averaged daily energy (E ), peak power (P ) and watt-hours (Wh) D  P  are defined as follows: Run Power Run-power is the instantaneous amount of power necessary for a device to operate, such as a 60W light bulb. Weekly Averaged Power Weekly average is defined as the run power averaged over a one week window. Weekly average is calculated using the following equation . ,. . run power x operating hours per week Weekly averaged power = total hours per week Watt-hour TT  (W).  (1)  A common unit of electrical work, representing the energy delivered at a rate of one watt for one hour of time. It is the average power (W) multiplied by the run time (h). One watt-hour (Wh) corresponds to 3.6 kJ since a Joule (J) is defined as J = Watt x second. Averaged Daily Energy For this project, it is convenient to discuss the average energy consumed in one day. It is simply Averaged daily energy = the average power x 24 hours (Wh).  Chapter 2 Application Design  12  Peak Power The maximum power a device will require. The storage banks can deliver a peak power up to 100 W. This enables the system to handle transients caused by charging caps or turning on cold filaments used for heating. However, the base station is optimized for high efficiency and is intended for low power use. In this application, the peak power is not as important as minimizing the average power consumption. 2.7 System Energy Portfolio The energy portfolio for each system is described as follows. 2.7.1 Transceiver The transceiver communicates with the radio tags at 915 M H z . To keep the base station's power consumption low, the sea lion group is implementing their communication protocols to achieve a rated power of 1.6 W. The transceiver monitors a colony of sea lions and operates continuously. The transceiver is designed to have a peak power no larger than 4 W. 2.7.2 Power and Data Management The power and data management is a digital system that controls the energy flow and processes information retrieved from the tags. The data is stored within the R A M of a microcontroller until it is uploaded, once a week, to a remote server through a satellite connection.  To reduce power consumption, this system utilizes a low current controller,  operating at a reduced clock frequency. A microcontroller's power consumption increases at a higher operating frequency and with a larger voltage supply. Consumption also varies over temperature and this relationship is nonlinear. A Microchip's 18Fxx series microcontroller, with no peripherals, operating at its maximum limits of 5.5 V , 20 M H z , at 85 °C will consume 44 mW. At half the clock speed the power drops by 40 % [5]. The power management microcontroller operates at 4 M H z and manages the energy flow using comparators, operational amplifiers, transistor drivers, and analog/digital converters. These components are all low power, integrated circuits. The power management system measured a rated power of 130 mW (section 7.3.) During sleepmode, the power management disables most of its peripherals and operates at approximately 20 mW. However, the sleepmode duration or its  Chapter 2 Application Design  13  frequency is hard to predict. Thus, a worst case assumption is that the power management will operate continuously at 130 mW. 2.7.3 Satellite Phone The collected data is transmitted via satellite phone. Several satellite communication products are available and the GSP-1620 data modem on the Globalstar satellite network is considered. The duplex modem requires a run power of 5.4 W and has a data rate of 1.2 kBps [6] (assuming 1 Byte = 8 bits.) A simplex system is required. However, the available simplex products are slow, having a data speed approximately 148 Bytes in 6 to 8 minutes [7]. The wildlife monitoring system detects an animal's presence. A radio tag is mounted onto a Stellar sea lion and a maximum of 100 animals are tagged per site. Every 15 minutes, the base station attempts to communicate with the tags. A presence is recorded i f the animal is within radio range. When detection occurs, the station records a binary one [8]. Therefore, reporting a week's worth of data per animal takes 672 presence bits. The system is designed so that each animal has a unique 24 bit ID code. Thus, a total of 8700 Bytes of information per week is required. Using the GSP-1600 phone, the weekly data can be sent in 7.25 s. However, before transmission, the modem requires approximately 5 to 10 min to power up, track the satellite network and establish a system connection. Therefore, the total operating time is estimated at 10 min per week resulting in a weekly averaged power consumption of 5.3 mW. This amount of power is insignificant for the storage bank. Nonetheless, when stored energy becomes critically low, the satellite link remains offline. 2.7.4 Climate Control The base station's operating temperature depends on its components. For instance, batteries do not perform well in subzero conditions. Likewise, electronics do not function correctly at high temperatures. Therefore, the climate controller monitors the internal temperature within the base station. The power required for climate control is difficult to determine analytically because the transfer of thermal energy between the base station's enclosure and the outside environment is complex. The mechanism of convection, conduction and radiation are dependant on many variables. However, based on design, an approximation is devised. To house the components, the base station's enclosure has the following physical dimensions yielding a volume of 0.29 m [9]: 3  Chapter 2 Application Design •  14  width: 600 mm height: 800 mm  •  depth: 600 mm The base station is a low power system and does not generate more than 2 W of heat. The  enclosure is constructed from sheet steel with a depth of 2 mm. With a temperature conductance of 16 W / m K , the steel povides an easy path for heat to transfer between the enclosure's internal compartment and the outside environment [10]. To reduce the power required for climate control, the base station's components are designed to accommodate an operating range that attempts to exceed the environment. Thus, based on the climate data from Table 1, the base station's operating range is between -30 °C and 45 °C. However, in the summer, the collaboration of direct sun and warmer weather may require air ventilation. A solar vent is suggested because it has a built in solar cell and dc fan that activates only when the sun shines. This device has its own power source and is not included in the power budget. When activated, the vent circulates the air at 0.9 m /min. It is available from a local distributor called SPS Energy 3  Solution. Refer to Appendix D for the distributor's contact information. The base station's internal temperature is monitored using the AD7414 digital temperature probe. If the external climate becomes too severe and the enclosure's internal temperature exceeds the operating range, the temperature probe signals the system to enter the sleepmode state. 2.7.5 Efficiency Factor The base station's circuitry is designed for efficiency. Switching components operate at low frequencies and are optimized to reduce loss. The dc/dc converter utilizes a synchronous topology to minimize the diode voltage drop. However, the power budget requires a scaling factor to account for the I R loss throughout copper wires, switching losses, component 2  equivalent series resistance, battery efficiency and the effectiveness in converting renewable energy into electrical energy. For instance, the photovoltaic used in the base station (discussed in chapter 3) is tested on the roof of U B C s electrical engineering department (Figure 7-16 on page 107). In the figure, two photovoltaics are shown and each is loaded at their maximum power point. At noon, during bright, clear, sunny days, the largest output power from either panel was observed at 43 W. This is a 14 % discrepancy from their rated 50 W. The difference is from environmental characteristics explained in section 3.3. Therefore, a 1 5 % factor is added to  Chapter 2 Application Design  15  account for the additional inefficiencies. The correction is a conservative factor chosen as additional protection to prevent excessive battery discharge. 2.7.6 Energy Consumption The following table summarizes the required power and duration for each system. The total energy budget is determined to have an average daily energy consumption of approximately 48 Wh/day. The power system is rated at 12 V . The system will be designed to safely handle a peak power of 100 W. The average daily amp hours is calculated as: 48 Wh/day + 12 V = 4 Ah.  Table 2 The base station's energy consumption portfolio  System  Run Power (W)  Operating Time (h/day)  Operating Time (Days/Week)  Weekly Averaged Power (W)  Averaged Daily Energy Consumption (Wh/day)  Transceiver*  1.6  24  7  1.6  38.4  Power Management and Data Storage  0.13  24  7  0.13  3.12  Satellite Phone  5.4  0.167  1  0.005  0.12  1.735 2  41.64 47.9 =48  SubtotalTotal (15 % add-on):  * Transceiver: The transmitter and receiver are one integrated unit and their combined power consumption is 1.6 W.  2.8 Renewable Technology Wind and solar technologies are considered as the power sources. Deciding upon wind turbines and/or solar panels are site and application specific. The determination depends on practicality, available resources and the required energy production. Compared to other components of the base station, a wind turbine is the largest moving mechanical system. It is directly exposed to high winds, ice, snow, salt water, abrasion, U V light, and large temperature swings.  In these conditions, the turbine will be stressed, resulting in a high chance of  breakdown. In general, heavier wind turbines have proven to be more rugged and dependable  Chapter 2 Application Design  16  than light weight machines. Heavier, robust machines typically survive longer [11]. However, large machines make transportation and installation more difficult. Furthermore, larger turbines require higher towers to clear rotor diameter and avoid turbulence. A smaller, micro turbine is cheaper, easier to transport, but less likely to survive the winter.  While there is minimal  evidence that turbines frighten animals, there is a concern that the spinning motion and created noise pollution may scare the Steller sea lions. Wind energy is a good source of renewable energy. However, due to location and requirements of the base stations, turbines are not a practical solution for this project. Solar power technology is reliable because it has no moving parts. Wind turbines have a three year warranty whereas solar panels are guaranteed for 25 years. Solar panels will be used for the source because they are straightforward to install, reliable, do not require maintenance and can be conveniently disconnected from the load when they supply excessive energy.  Chapter 3 Photovoltaic Systems The conversion of the sun's insolation to electrical current is a practical way to generate power for electrical devices operating away from the power grid. Harnessing energy from the sun is becoming more possible as photovoltaic technology matures. 3.1 Solar Cell Solar panels, also called photovoltaic (PV) panels or solar modules, are flat arrangements of series connected silicon solar cells. Silicon is the most common material used in solar cells. There are three types of silicon solar cells. In order of decreasing efficiency and manufacturing cost, they are the single crystal cell (mono-crystalline), the semi-crystalline cell (multicrystalline), and the amorphous (non-crystalline) cell. Lower efficiency means that larger surface area is required to produce the same power. For a given power rating, semi-crystalline panels are 20 % to 30 % larger than single crystal types. Amorphous cell panels are about twice the size of the other types [12]. Solar panel packaging and mounting vary to suit a wide variety of conditions. Solar panels are used at locations from homes to space applications. The panels can be wired as series or parallel arrays to produce higher voltages and currents. 3.1.1 Cell Modeling A solar cell is modeled as a constant current source in series with a diode as shown in Figure 3-1. A solar panel is a stack of solar cells connected in series and the equivalent circuit is a single large current source driving a string of diodes. The current flowing from the output terminal  IOUT  is equal to the light-generated current  II  minus the diode-current  ID  and the shunt-  leakage current I S H - In practical cells, I S H is small and can be omitted [13]. The series resistance Rs represents the resistance to the current flow and depends on the panel's doped p-n junction depth, the impurities and the contact resistance. ThePV's efficiency is sensitive to variation in Rs. A n increase in Rscan significantly decrease the P V ' s output. With no external load, all the current from the source is through the series diodes. The output voltage of the panel is the sum of  17  Chapter 3 Photovoltaic Systems  18  the voltages across the diodes. This is the solar panel open circuit voltage V c - Typically, a solar 0  panel consisting of 36 series connected cells will have an open circuit of about 18V. Rs AAA  + o  OUT  V =n0.7V o c  Figure 3-1 The photovoltaic's circuit model 3.2 Solar Insolation Solar insolation describes how much sunrays an object is receiving. P V manufacturers rate their products at a reference point called air mass 1.5 (AMI.5). A M I . 5 is classified as the air found on a typical day with average humidity and pollution. The typical solar insolation on a bright day with A M I . 5 is about 1 kW/m [14]. 2  3.3 Performance Characteristic The performance characteristic of a P V panel is described by the voltage versus current voltage (V-I) curve shown in the plot Figure 3-2 (a). Figure 3-2 (b) is the power curves and is simply the product of the voltage and the current outputs. As the amount of insolation decreases, the V-I curve shifts down. 3.4 Wattage Silicon solar cells have simple power characteristics. Each module has a specific point on its power curve which yields the greatest power. This maximum power point occurs at the knee point of the I-V curve. At open voltage and short circuit a panel produces zero power. 3.5 Temperature As shown in Figure 3-2 (a) and (c) when the temperature of the module increases, two things happen: the voltage output of each cell decreases and the current of the cell increases with  Chapter 3 Photovoltaic Systems  19  increasing temperature. However, the net effect is a shift in the power knee, resulting in more power at lower temperatures, typically, a 0.45 % decrease of power for each increase in degree centigrade. Solar radiation is never consistent. Many factors affect the amount solar radiation a body receives. Variables such as weather, altitude, and reflection make realistic standardization of insolation impossible. Manufacturers test their models with reproducible laboratory standards that are not at the mercy of solar insolation and weather. Testing is performed at temperatures between 25 °C and 28 °C. However, on a very sunny day, even at an air temperature of 25 °C, modules have been measured to have a temperature of 40 °C. To compensate for the power shift at different operating temperatures, P V manufacturers usually publish the power temperature coefficient on their product's datasheet. The plots in Figure 3-2 are taken from [13], [15].  (a)  Curve's knee Max power region @ constant temperature  (b)  1000W/m2  Voltage  Voltage  :.High Temperature — Low Temperature  (c)  lOOOW/m  2  b d Temperature 60 20° °C 40° 0° 80° c  P  5  10  5  20  25  Voltage  Figure 3-2 The photovoltaic's performance characteristics  Chapter 3 Photovoltaic Systems  20  3.6 Tilt Angles A solar panel's output power depends on the amount of sunlight available and on how much of this light the solar panel collects. Sunlight is the essential ingredient. If the panel is fixed, as the direction of the sun with respect to the panel changes throughout the day, the effective area or aperture of the panel will change [16]. At dawn, very little sunlight reaches the active surface of the panel and the aperture of the panel is near zero. As the sun goes higher in the sky, the panel intercepts more sunlight until maximum aperture is reached when the sun is at right angle to the plane of the panel's active surface. The aperture then decreases as the sun falls in the sky. When the angle is low with respect to the panel, the aperture is small and losses due to reflection from the surface of the panel are large. The largest possible aperture collects the most light and keeping the module perpendicular to the incoming sunlight means that the module intercepts the maximum amount of sunlight. As the sun moves throughout the day, more energy is collected i f the P V module is installed on a tracker and follows the sun like a sunflower. However, due to additionally cost and mechanical complexity, trackers are not considered for the sea lion project. Future developments may implement a sun tracking system as an improvement in design. While a tracker provides from 25 % to 35 % more power by changing the P V ' s East to West angle (Solar Azimuth), adjusting the sun's north to south angle (Solar Declination) will compensate for the changes as the height of the sun changes during the year [17], [18]. 3.7 Solar Declination Adjustment Solar Declination is an angular measurement of how many degrees North (positive) or South (negative) of the equator that the sun is when viewed from the centre of the earth. As shown in Figure 3-3, the earth rotates on its axis which is inclined 23.45° with respect to the plane of its orbit around the sun. The rotational angle remains constant, so throughout the year, as the earth orbits the sun, the declination varies ±23.45°. On June 21, the summer solstice, the earth's northern hemisphere is titled closer to the sun because the declination is at its maximum of+23.45°.  Chapter 3 Photovoltaic Systems  21  Axis normal to the plane of the Earth's Orbit Earth's Axis\  Autumnal Equinox  (September 21) Earth's rotational axis pointed neither toward nor away from the sun  Winter S o l s t i c e M ^ (December22)  I \  Southern Hemisphere tilted closer to the Sun  Summer Solstice  Vernal Equinox \  (March 21) Earth's rotational axis pointed neither toward nor away from the sun  (June 21) Northern Hemisphere tilted closer to the sun  Figure 3-3 The earth's solar orbit Figure 3-4 illustrates the earth's orientation during the solstice. Half a year later, on December 22, the declination is at its minimum of-23.45°. This is called the winter solstice and the southern hemisphere points closer to the sun. At the autumnal (September 21) and the vernal (March 21) equinoxes, the declination is at 0° and the earth's rotational axis is pointed neither toward nor away from the sun. During the equinoxes, at noon, the sun appears directly overhead at the earth's equator.  garth's Orbiy  On December 22: • North Hemisphere furthest from the sun • Equator above parallel axis • Declination: -23.45°  On June 21: • North Hemisphere furthest from the sun • Equator above parallel axis • Declination: +23.45°  Figure 3-4 Earth's orientation at the Solstice  Chapter 3 Photovoltaic Systems  22  In Figure 3-5, the angular orientation of the earth is modeled and the resulting geometric equation is derived Tilt angle = Latitude angle + 23.45cos(a).  (2)  The scale factor a is in degrees and converts days of the year to an angular quantity. a  =  (360 365  ) '  (3)  Where n = the n day of the year (refer to Table 3.) Equation 2 gives the solar panel's tilt angle th  to obtain maximum aperture on a specific day of the year. Table 3 converts the i day of the t h  month into the n day of the year. th  Table 3 The day of month to day of year conversion table Month January February March April May June July August September October December  i day of the month n= = 31+i n= = 59+/ n= = 90+i n = 120+/ n = 151+/ n = 181+/ n =2 1 2 + / n =2 4 3 + / n = 273+/ n =3 0 4 + / n = 334+/ m  The tilt angle is a function of the solar panel's physical latitudinal position. During the earth's orbit, when the planet is at the equinox, the declination angle is the latitude angle. However, on June 21, the equator is offset by 23.45° and this difference must be subtracted from the latitude angle. The opposite takes place on December 22, where 23.45° is added to the latitude angle. Since the earth orbits the sun in a circular path, the declination angle throughout the year is a periodic function. December 22 (day 356) corresponds to 0° and June 21 is 180°. For the derivation of (2), the following assumptions are made: • The earth's orbit is circular • The panel is perpendicular to the sun at noon • The earth's tilt angle of 23.45° remains fixed • Leap years are ignored  Chapter 3 Photovoltaic Systems  23  A x i s N o r m a l to the  Figure 3-5 The earth's declination angle Figure 3-6 shows a graphical representation of (2) for different latitudinal positions at various days of the year [17]. There are fifteen curves, each for 5° degrees of latitude. To determine the correct tilt angle, on the right side of the chart, find the curve that nearly corresponds to the solar panel's latitude. Follow that curve until it intersects the current date on the x-axis (month/day). The corresponding angle read on the y-axis is the angle between the ground and panel's face. This angle will result in the PV module being perpendicular to the sun's rays at noon on that date. 3.7.1 Base Station Tilt Angle Due to the base stations remote locations, the tilt angle for the sea lion base station cannot be frequently adjusted and the optimum tilt angle is determined as follows. December has the least amount of solar radiation during the year. From Table 1, the sun hours in December are four times less than June. The storage capacity and solar panel are sized to compensate for this condition. Even though the year's average energy will be compromised; the summer days are long enough to offset the winter's angle. For December, the calculated tilt angle using (2) is 78°. This predicted angle agrees with the insolation data recorded at Annette. In December, the values in Table 1 have longer solar hours at a tilt angle of "Lat + 15." Therefore, based on the  Chapter 3 Photovoltaic Systems  24  theoretical predictions and matched climate data, the panel tilt angle is adjusted compensated for December.  12/21  1/20  2/20  3/22  4/22  5/22  6/22  7/22  8/22  9/21  10/22  Day of the Year  Figure 3-6 The tilt angle at different days of the year  11/21  12/22  Chapter 3 Photovoltaic Systems  25  3.7.2 Solar Panel Sizing and Selection Based on the power budget and the climate data, the following table determines that 50W solar panel is capable of supplying the base station's energy requirements [19], [20]. Table 4 Solar panel size 1. Average daily energy consumption  48 Wh/day  2. Average daily sun hours (worst case insolation from Annette, Alaska, compensated for December)  3. Divide line 1 divide by line 2.  1.15  h  42 W  This is the required solar panel size (P AX) M  In the industry, solar panels with the following output power are commonly available: 10W, 20W, 50W, 60W and 65W. Due to material overhead, the pricing of panels is not linearly related to its output power. For example, a 50W panel cost less than purchasing two 20W panels. BP Solar offers a SOW (model: BP350) that satisfies the requirements for the base station. It is available from a local distributor called SPS Energy Solutions. Refer to Appendix D for their contact information. SPS quoted $331.00 (CDN) for each unit. The following table is the characteristics of the BP350. Table 5 The BP350's properties Characteristics*  Units  Maximum power (PMAX)  50  Voltage at P  (V p)  17.5 V  (Imp)  2.9  Current at P  M A X  M A X  M  W A  Warranted minimum PMAX  45 W  Short-circuit current ( I )  3.17 A  Open-circuit voltage (Voc)  21.8  sc  Temperature coefficient of I  s c  V  (0.065±0.015)%/ °C  Temperature coefficient of Voc  -(80±10)  Temperature coefficient of power  -(0.5±0.05) % / °C  Dimensions Length  839  mm  Width  537  mm  Depth  50  Weight  6  N O C T (Air 20 °C; Sun 0.8 kW/m2; wind 1 m/s)  mm  kg  mV/°C  Chapter 4 Energy Storage Systems The photovoltaic is an intermittent source of power and does not always coincide with the load. Either the energy generated by the P V array cannot always be consumed or when required the array itself cannot deliver enough energy. A n energy storage solution significantly improves power availability by regulating the energy flow. The functions of the storage system are [21]: 1. To store electrical energy when it is produced by the P V array and to supply energy to electrical load when needed 2. To supply power to the load at a stable voltage, by suppressing or smoothing out transient voltages that may occur in P V systems 3. To supply surge or high peak operating current  Figure 4-1 The energy storage system 4.1 Types of storage systems The battery stores energy in the electrochemical form and is the most widely used device for energy storage application. Other systems of energy storage are: •  flywheel  •  compressed air  •  superconducting coil  •  ultracapacitors  26  Chapter 4 Energy Storage Systems  27  Each technology has characteristics that are suited for particular applications. For the base station, an ultracapacitor/battery hybrid storage bank offers a simple and reliable system. Batteries have high energy densities and ultracapacitors offer long cycle life and wide operating temperatures.  Additionally, unlike, mechanical storage  systems, such as, flywheels or  compressed air, the battery/capacitor bank is simpler to interface with P V panels and the electrical load. The following sections discuss the advantages and limitation of batteries and ultracapacitors in detail. To determine the best selection for the sea lion project a thorough investigation into battery technology is conducted. 4.2 Battery Technology Batteries have high energy density that is critical for supplying power when solar energy is unavailable for long periods of time. There is no ideal battery that gives the optimum performance under all operating conditions. However, many advances have been made in battery technology resulting in the development of different chemistry and designs, each having favorable characteristics under specific applications.  Operating temperature,  discharge  requirements, cycle life, capacity and voltage retention are all factors in selecting the correct battery. 4.2.1 The Battery Cell A battery's energy is stored in the electrochemical form. When a chemical reaction occurs the energy is released in the electrical and thermal form. Unfortunately, the thermal form is an unusable energy, a waste that reduces the conversion efficiency.  The basic unit of the  battery is the electrochemical cell. The internal construction of a basic battery cell is shown in Figure 4-2 [21]. The cell has three parts, a negative electrode, a positive electrode, and an electrolyte. The electrode plates are connected to an electrical load via external terminals mounted on the battery's casing. The cell stores electrochemical energy at low electrical potentials. The cell's voltage depends on the battery chemistry, for example, lead-acid cells have a nominal cell voltage at 2.1 V , while lithium-ion cells are at 3.7 V . This is known as the open circuit voltage.  Chapter 4 Energy Storage Systems  28  Figure 4-2 Inside view of a battery cell  The amount of free energy stored by the cell depends on the amount of the chemical reactants in the cell. Cells can release energy because the active materials have a higher free energy than the reaction products. A circuit is formed when an external load is connected across the positive and negative electrodes of a charged cell. With the circuit established, a chemical reaction occurs between the electrolyte and each electrode producing free electrons at the negative electrodes. The stored chemical energy is released because the positive electrodes accept the electrons through the load. Internally, the circuit is completed by the ionic current carriers of the electrolyte. Current stops when the reaction at either electrodes runs out of active material or the electrolyte can no longer supplies ions. During charging, the directions of the reactions are reversed. 4.2.2 Capacity The ability of a cell to hold energy is called its capacity (C). Capacity is measured in Ampere-hours (Ah), and is determined through a constant current discharge of a fully charged cell. As the cell discharges, the time is measured from the start of discharge until the potential across the loaded cell has reached a specific cutoff voltage, meaning it can deliver C amperes for one hour or C/n amperes for n hours. The battery is made of numerous electrochemical cells connected in a series-parallel combination to obtain a desired operating voltage and/or current. The higher the battery's voltage, the larger the number of cells required in series. The battery's rating is stated in terms of the average voltage during discharge and the Amp-hour (Ah) capacity it can deliver before the voltage drops below the specified limit. Discharging a battery too low can cause damage. Thus, a safe level cutoff voltage is chosen. For instance, a discharge limit of  Chapter 4 Energy Storage Systems  29  1.75 V/cell is chosen as a safe limit for lead-acids. The product of the battery's voltage and the Ah is the energy rating in Watts-hour (Wh) that the battery can deliver to a load from the fullycharged condition. The battery charge and discharge rates are described in terms of its capacity. For example, charging a lOOAh battery at C/10 rate means charging at 10 A. Discharging that battery at C/2 rate means draining at 50 A . At this rate, the battery will be discharged in 2 hours. 4.2.3 Battery Energy Losses There are two causes of losses in a battery: the electrode polarization effects and electrical resistance in the cell current's path. Polarization losses occur because reactants from the electrolyte must be transported to the surface of the electrode before they can react with the electrode's active materials. The internal resistance of the cell produces a voltage proportional to current, an IR loss. The internal resistance of the battery and electrode polarization both oppose current flow and the combination of this opposition is called the internal impedance or equivalent series resistance (ESR) of the cell. Energy that is lost through the internal impedance is dissipated as heat. When a cell is discharging, the polarization and I R losses decrease the 2  battery's open circuit voltage. When charging a cell, the charging source must supply a voltage greater than the open circuit voltage of the cell to overcome the polarization and IR losses. The losses are gradually dependant on the current. As shown in Figure 4-3, the losses are reduced when the discharge current decreases [16]. At lower discharge rates, a cell capacity increases because it delivers more of its stored chemical energy to the load and less to heat.  _  Open circuit voltage IRDrop  > 'o  Operating voltage  Polarization Loss  >  Discharge Current (A) Figure 4-3 The polarization and electrical resistance losses in batteries  Chapter 4 Energy Storage Systems  30  4.3 Battery Types There are two basic types of batteries: •  The primary battery, which converts the chemical energy into the electrical energy. The electrochemical reaction in the primary battery is nonreversible, it can not be recharged. A discharged primary battery is discarded.  •  The secondary battery, also known as the rechargeable battery. The electrochemical reaction in the secondary battery is reversible. After a discharge, it can be recharged by adding a direct current from an external source. This type of battery converts the chemical energy into electrical energy in the discharge mode and vice versa in the charge mode. 4.3.1 Primary Batteries Primary batteries were investigated as a backup energy supply for the base station. These  batteries offer very good charge retention, excellent long term shelf life and constant capacity over a wide temperature range. Primary batteries are excellent for long storage, onetime use applications such as emergency standby. Since primary batteries cannot be recharged. They will eventually need to be replaced. For this system, primary batteries are not as effective as rechargeable batteries and offer no significant advantage. 4.3.2 Secondary Batteries Secondary batteries can be recharged repetitively making them attractive for the sea lion project. Secondary batteries are available in many different technologies. Six of the most common types of rechargeable electrochemistry were examined. They are as follows [22]: •  lead-acid  •  vented industrial nickel-cadmium (NiCad)  •  sealed nickel cadmium  •  nickel-metal hydride (NiMH)  •  lithium-ion (Li-ion)  •  lithium-polymer (Li-poly)  An overview of their characteristics is summarized as follows:  Chapter 4 Energy Storage Systems  31  4.3.2.1 Lead-Acid This the most common type of rechargeable battery used because of its maturity and high performance over cost ratio. Although it has the least energy density by weight and volume, lead-acid batteries are most common due to their wide availability, low cost and known performance characteristics. When a lead-acid battery discharges, water and lead sulfate are formed, the water dilutes the sulfuric acid electrolyte, and the specific gravity of the electrolyte decreases with the decreasing state of charge. The recharging reverses the reaction in the lead and lead dioxide is formed at the negative and positive plates, respectively, restoring the battery into its originally charged state. The lead-acid battery comes in various versions. The shallow cycle version is used in automobiles where a short burst of energy is drawn from the battery to start the engine. On the other hand, the deep-cycle version is suitable for repeated charge/discharge cycles. Most energy storage applications require deep-cycle batteries [23]. 4.3.2.2 Vented Nickel Cadmium The vented NiCad cell has positive electrodes made of cadmium and the negative electrodes of nickel hydroxide. They have several advantages over lead-acid batteries that make them attractive for use in stand-alone P V systems. Their benefits include longer life, deeper cycle life, less leakage current, survivability from excessive discharges and excellent low temperature capacity. Nickel-cadmium can operate at -40 °C and lose only approximately 20 % of their capacity, while lead acid can lose up to 80 % of its capacity. However, at -40 °C, the NiCad is limited to a discharge rate of 0.2 C. This type of battery is used in heavy duty industrial applications such as mining vehicles, railway signaling, emergency power and diesel engine starting. The nominal voltage for a NiCad cell is 1.2 V , and 2.1 V for a lead-acid cell [24]. The voltage of a NiCad cell remains relatively stable until the cell is almost completely discharged, where the voltage drops off dramatically. Currently, vented NiCads can be five to ten times more expensive than lead-acid. Due to the raw material cost, they will never be as low as lead-acid. Moreover, cadmium has recently come under strict environmental regulation pushing their cost even higher and limiting the availability for large capacity NiCad batteries.  Chapter 4 Energy Storage Systems  32  4.3.2.3 Sealed Nickel Cadmiums Sealed NiCad batteries incorporate a chemistry to prevent a buildup of pressure in the cell caused by gassing during overcharge. As a result, cells can be sealed and require.no physical maintenance. However, this type of chemistry suffers a memory effect in which a battery that is repeatedly discharged to only a percentage of its rated capacity will eventually memorize this cycle pattern and limit further discharge, resulting in a loss of capacity. Regular discharge cycles are required to prevent the memory effect. Finally, sealed NiCad technology has poor long term voltage retention. A large self discharging rate loses approximately 20 % of capacity per month. The leakage current increases at higher temperatures. 4.3.2.4 Nickel-Metal Hydride The N i M H is an extension of sealed NiCad technology, and offers an improvement in energy density over that in NiCad. The major construction difference is that the anode is made of a metal hydride. This eliminates the environmental concerns of cadmium. Another performance improvement is that it has negligible memory effect. The N i M H , however, is less capable of delivering high peak power, has higher self-discharge rate at approximately 30 % of the capacity per month. N i M H is susceptible to damage due to overcharging. N i M H do not perform well in cold temperatures and have limited performance at -20 °C. 4.3.2.5 Lithium-Ion Lithium-ion technology offers three times the energy density over lead-acid. Moreover, the lithium-ion has higher cell voltage of 3.5 V . This requires fewer cells in series for a given battery voltage. On the negative side, the lithium electrode reacts with liquid electrolyte, creating a sort of oxidized film. Every time the cell cycles, the lithium is stripped away, a free metal surface is exposed to the electrolyte and a new film is formed. To compensate, the cell uses thick electrodes,  adding into the  cost.  Lithium  technology is expensive.  The  lithium-ion  electrochemistry is also sensitive to damage from overcharging. Therefore, it requires more elaborate charging circuitry with adequate protection. 4.3.2.6 Lithium-Polymer This is a lithium battery with solid polymer electrolytes. It is constructed with a film of metallic lithium bonded to a thin layer of solid polymer electrolyte. The solid polymer enhances  Chapter 4 Energy Storage Systems  33  the cell's specific energy by acting as both the electrolyte and the separator. Moreover, the metal in solid electrolyte reacts less than it does with liquid electrolyte. However, its low temperature performance is inferior to lithium-ions. 4.3.3 Summary of Battery Technology The following tables summarize the advantage and disadvantage of the six most common ten rechargeable batteries.  Table 6 Lead acid battery Advantage  Disadvantage  • • •  •  • • • • • • • »  High current output No memory effect Can be tailored for particular use (deep cycle, high discharge) Low cost Widely available Low self discharge Easy charging requirements Easy state of charge indication Good temperature performance Available in maintenance free designs High charge efficiency  • • • • • • • • •  Dangerous materials used (lead, sulfuric acid) Heavy Low energy density Reduced capacity as temperature drops Cannot be stored in discharged state Deep discharging reduces life Hydrogen emissions in some designs Requires maintenance Low cycle life Maintenance in some designs  Table 7 Vented NiCad battery Advantage High current output Flat discharge profile, nearly constant at 1.2 V until almost flat Excellent long-term charge retention High capacity Longest cycle life Rugged, reliable, copes very well with abuse such as heavy loads Long life even at low depth of charge Can be stored in any state of charge Excellent low temperature capacity and performance  Disadvantage Environmental concern with the use of Cadmium Maintenance of electrolyte Five times the cost of lead acid Requires a more complicated charging system  Chapter 4 Energy Storage Systems  34  Table 8 Sealed NiCad battery Advantage  Disadvantage  No maintenance Long cycle life Good temperature performance Long life even at low depth of charge Can be stored in any state of charge  Environmental concern with the use of Cadmium Memory effect Requires batteries conditioning to prevent memory effect High leakage current High initial cost Less cycle life then vented NiCad  Table 9 N i M H battery Advantage • • • • •  Table 10 Lithium ion battery Advantage • • • . •  Disadvantage  Higher energy capacity than NiCad No maintenance Cadmium-free Long cycle life Can be stored in any state of charge  Medium cycle life High energy density High cell voltage Light No memory effect  • • • •  Lower power density than NiCad Poor charge retention, extremely large leakage current High initial cost Unable to operate at low temperatures  Disadvantage • • •  Moderate self-discharge rate Expensive Complicated charging system  Table 11 Lithium polymer battery Advantage  Disadvantage  • . •  • • •  High energy density Light Longer cycle life than Lithium Ion  Poor low temperature performance Moderate self-discharge rate Expensive  Chapter 4 Energy Storage Systems  35  4.4 Battery Selection In terms of battery performance, NiCad technology is the best choice for the sea lion project. The technology offers deep cycle life, very low current leakage, survivability from excessive discharges and excellent capacity retention at low temperatures. However, the amount of Cadmium required in large batteries and the environmental concerns makes vented NiCads expensive and difficult to acquire. Federal Battery, a local battery supplier quoted $2000 (Cdn) for a 12 V, 102 A h vented NiCad battery manufactured by Saft. Refer to Appendix D for Federal Battery's contact information. Unfortunately, cost is the main reason why NiCads are not used in this system. While far from perfect, lead-acid batteries offer good performance over a wide temperature range when compared to other types and are used in the sea lion project. Lead acid technology is the most common type of rechargeable battery because of its maturity and high performance over cost ratio. 4.5 Lead-Acid Battery Technology There are many types of lead-acid batteries and most lead-acid batteries used in small P V power systems are similar in appearance to automotive batteries. These box-shaped batteries are constructed using prismatic cells. In the prismatic cell, the electrodes are shaped into large flat plates. Prismatic cell design is used when large, high capacity batteries are required. Cells designed for high current discharges have many thin plates to maximize the amount of plate area. Cells with fewer, thicker plates are stronger and have greater storage capacity. Most metal conductors react with acid. Pure lead resists corrosion but is too soft and weak to be used as a grid for most applications. Lead alloys are used to strengthen the plate structure. Antimony is a common grid alloy metal used. However, it has the unfortunate characteristic of migrating from the positive plate grid to the negative plate's active material. Antimony deposit on the negative plate causes a faster self-discharging rate and increases the water loss during charging. New grid formulations use calcium as the lead alloy. Tin is sometimes used with calcium. Calcium strengthens and stiffens the grid. Tin increases corrosion resistance and strength. Batteries with lead calcium grids are better in small solar power storage systems than other types because less water is lost from the electrolyte during charging and selfdischarge rates are lower.  Chapter 4 Energy Storage Systems  36  4.5.1 Plate Limited Versus Electrolyte Limited One of the primary characteristics of a lead-acid battery design is the balance between the amount of active material in the plates and the number and concentration of the electrolyte ions. The discharge reaction of a battery stops when either of the plates run out of active material (plate-limited) or when the electrolyte runs out of ions (electrolyte-limited). This affects how the battery behaves in different applications. For example, a plate-limited battery is easier to recharge after a very deep discharge because the higher concentration of acid in the electrolyte makes it a better electrical conductor than an electrolyte limited battery which has lost most of its sulfate ions from the electrolyte. A discharged plate-limited battery is less likely to freeze in cold weather than an electrolyte-limited battery because the higher acidity of the plate-limited battery electrolyte lowers its freezing temperature. On the other hand, an electrolyte-limited battery has reduced plate stress. This is an advantage when batteries are frequently cycled. 4.5.2 Flooded and Valve Regulated Lead Acid Batteries Prismatic batteries are classified whether or not the electrolyte is sealed inside the battery or is accessible for servicing through vents in each cell. Vented lead-acid batteries have free flowing electrolyte and are called wet or flooded cells. Some lead-acid batteries have immobile electrolytes and are called valve regulated lead-acid (VRLA) batteries. There are two ways to immobilize the electrolyte. Gel-cell electrolytes are set with a gelling agent and absorbed glass mat (AGM) batteries use micro-glass fiber matting to hold their electrolytes like a sponge. Gel cells are plate limited and A G M are electrolyte limited. A G M batteries offer lower impedance to electrolyte ion flow than gel cells. A G M offers better high current rate performance and are used with high current loads. However, for deep-cycle applications, gel cell batteries offer the greatest number of charge/discharge cycles before failure. A G M cells have half the cycle life of gel cells. A gel cell has no liquid electrolyte and can operate at lower temperatures than A G M or wet acid batteries. A battery charging at a fast rate, or connected to a charging source at too high a voltage, can release gases due to overcharge. In wet lead-acid batteries these gases are lost and require periodic maintenance to restore the lost water. When charging a lead acid battery beyond its 100 % state of charge, the charging current will electrolyze the water in the electrolyte and generate oxygen and hydrogen gas to be vented. Hydrogen is a concern since a 4 % mixture of  Chapter 4 Energy Storage Systems  37  hydrogen in air is explosive. V R L A batteries recycle these gases. V R L A incorporates an oxygen recombination cycle which occurs at the negative plate and minimizes the generation of hydrogen gas. Generally, gel and A G M batteries have about 20 % less capacity, cost about two times more, and have a shorter cycle life than comparable flooded lead acid batteries. However, V R L A batteries do not need watering, are safer (no acid spill), can be placed in a variety of positions, have a slower self-discharge characteristic, and have lower ESR than flooded batteries [25]. 4.5.3 Battery Life The lifespan of a battery will vary considerably with its construction design and how it is cycled, charged, and maintained. The theoretical cycle life of V R L A technology is presented in Figure 4-4, [26]. At a 25 % depth of discharge (DOD), a battery has a life of 2250 cycles. Even i f the battery is cycled 15 times a month, it may not last 12.5 years. As explained in the following sections, a battery will age from grid corrosion and sulfation.  1500  2000  2500  3000  3500  4000  4500  5000  5500  6000  T h e o r e t i c a l Life C y c l e s  Figure 4-4 The V R L A battery's cycle life 4.5.4 Grid corrosion Over time, the acidic electrolyte gradually eats the positive plate. Thicker plates are directly related to longer life, so with other things being equal, a battery with thicker plates will last longer. Batteries are typically manufactured with a design life of 5, 7, 12, 20 and 25 years.  38  Chapter 4 Energy Storage Systems 4.5.5 Sulfation  Lead sulfate is formed due to the chemical reaction between the lead plates and the sulfuric acid during normal discharge. During recharging, the lead sulfate is dissolved back into the electrolyte, but a small fraction adheres to the battery plates and hardens into the lead sulfate. The sulfate can not be dissolved back and the result is a gradual loss of electrolyte and plate material. 4.5.6 Charging Lead-Acid Batteries To obtain optimum life from batteries, proper recharging is important. In the charging process, dc power is used to reform the active chemicals of the battery to their high energy charge state. A lead-acid battery can generally be charged at any rate that does not produce excessive gassing, overcharging or high temperatures. However, the battery's IR losses are less at lower charge currents. As the battery becomes charged, its voltage increases. If charging goes beyond the battery's capacity, gassing occurs. Charging is influenced by the ambient temperature, battery voltage and depth of charge. The following table is the full charge voltage at different temperatures for the 6 cell lead acid battery [22]. To prevent gassing, the charge current should be reduced to reasonable values as the battery reaches full charge. Some ac ripple with the direct charging current is tolerable because a battery has a large capacitance. However, a large ripple will cause damage due to excessive heating. Table 12 Full charge battery voltage at different temperatures Electrolyte Temperature (°C) 50 40 30 25 20 10 0 -10 -20  6 Cell Full charge Voltage (V) 13.8 13.98 14.19 14.34 14.49 14.82 15.24 15.9 17.82  Correction Factor (V) -0.54 -0.36 -0.15 0 0.15 0.48 0.9 1.56 3.48  Charging voltage is very critical in V R L A batteries because they are recombinant batteries. The recombination of oxygen and hydrogen replaces the moisture in the battery.  Chapter 4 Energy Storage Systems  39  Therefore the battery is maintenance free and never needs watering. The sealing vent is important to the battery's performance. The cell must maintain a positive internal pressure, otherwise the recombination of the gasses will not take place and the cell will dry out. The valve must safely release any excess pressure that is produced during excessive overcharging. As the battery overcharges, the battery capacity decreases because less gas is left inside the battery to recombine [27]. 4.6 Lead-Acid Applications Lead-acid batteries are designed for three different applications. They are starting/ lighting/ignition (SLI), deep-cycle service and float service. 4.6.1 Starting/Lighting/Ignition Battery The SLI battery is optimized to produce high short duration currents required to start an internal combustion engine. It has many thin, highly porous plates so that large areas of active material can react simultaneously and produce high peak currents for very short time periods. The grids and internal conductors are large to minimize internal resistance and IR loss. The disadvantages for producing large currents is reduced storage capacity, poor deep discharge performance and lose of capacity after a few deep discharges. This type of battery is typically electrolyte limited. Automotive starting is the largest application for SLI batteries. The battery is usually discharged less than 1 % of its rated capacity to start a combustible engine and then constantly trickled by the alternator. 4.6.2 Deep-Cycle Battery The deep-cycle battery is intended as the primary power source and is designed to provide long discharge profiles at moderate currents. A large deep-cycle battery is also known as the traction battery because of its application in electric vehicles such as forklifts and golf carts. Deep-cycle requires large storage capacity and deep discharging recovery. Most deep-cycle batteries are plate limited. The batteries are designed with fewer, thicker, and denser plates than in SLI batteries so that as much active material as possible is packed into each cell. The grids are designed for strength and this often means using antimony alloys. Deep-cycle service causes stress on the positive plate's active material, so separators often include glass fiber mats to prevent plate shedding.  Chapter 4 Energy Storage Systems  40  4.6.3 Float Service Battery The float service battery, also known as the stationary battery, operates as an emergency backup supply. For the majority of the time, the battery remains idle until the primary source fails. Long life, high charge retention and minimum maintenance are the characteristics most desired for float service. The battery's plates are made of lead or lead calcium so that selfdischarge and electrolyte dry-out are minimized. Stationary batteries have large volumes of low specific gravity electrolyte to reduce corrosion and increase the time before electrolyte water replacement is required. A stationary battery is typically electrolyte limited. 4.7 The Trojan T-105 and The Prevailer PV30H Battery The sea lion application requires batteries with a deep cycle profile and minimum maintenance. A high current demand is not necessary, so SLI batteries are not needed. Stationary batteries offer great charge retention and minimal maintenance. However, their low specific gravity makes them vulnerable to freezing. Vented wet deep-cycle traction batteries, such as the Trojan T-105 are almost as inexpensive as car batteries and are much more robust. They are widely available and often used in P V systems. The T-105 is a deep discharge, 6 V battery with a 225 A h capacity. 4.7.1 Cost From Federal Battery, the T-105 is quoted at $82.30 (Cdn.) This battery is preferred for the sea lion project because of its popularity, known performance characteristics and low purchasing cost. However, maintenance is required because water is lost as the battery cycles. As well, gassing inside the base station's sealed enclosure creates an explosion risk. Therefore, the Prevailer Dryfit PV30H is chosen. It is a 12 V gel type battery with a capacity of 95 Ah. The battery is priced at $90 (Cdn) from Federal Battery. Prevailer is manufactured by Sonnenschein (a division of Exide.) The cost for this gel type battery is low. A market surplus and its construction using cheaper materials makes the PV30H priced matched with the Trojan. The PV30H is a marine grade, deep cycle battery suitable for solar panel applications. It has a five year design life. A higher quality gel battery such as the Sonnenschein A400 is designed for 12 years but costs 2.5 times more ($225 Cdn each) for a 100 A h capacity.  Chapter 4 Energy Storage Systems  41  4.7.2 Discharge Rate Batteries will self discharge over time. Gel batteries have the lowest discharging rate for all lead acid batteries. At room temperature, the PV30H will lose approximately 2 % per month. This rate increases with temperature and age. 4.7.3 Temperature Performance Climate data from Annette, A K , reveals a worst case temperature of -19 °C (refer to section 2.3.) Table 13 shows the electrolyte freezing point at different DOD. Table 13 Freezing point of DOD Depth of Discharge (%)  Freezing Temperature (°C)  0 8 15 26.5 38 60  ^60 -57.4 -52.2 -39.5 -26.7 -15.0  _  At a 25 % D O D , the PV30H can survive down to -40 °C without damage. As a battery's temperature gets colder, its capacity decreases. The capacity versus temperature is shown in Figure 4-5. At -30 °C, the battery will lose approximately 70 % of its capacity [28].  -50  -40  -29  -18  -7  4  16  Temperature (°C) Figure 4-5 The temperature versus capacity performance  26  Chapter 4 Energy Storage Systems  42  4.7.4 Battery Sizing The capacity of a battery system is determined by two factors: •  How much energy is needed?  •  How long must the battery supply this energy? Renewable energy systems should store between 7 and 14 days of reserved energy to  compensate for bad weather and 10 days is chosen. The following table [19] indicates that three PV30H batteries will provide the necessary capacity for 10 days, at a 25 % discharge limit, compensated to the lowest operating point of -30 °C. The total cost for the batteries is $270 (Cdn.) Table 14 Battery sizing chart 1. Average Watt-hours/day  48 Wh/d  2. Average daily Amp hours (12 V battery)  4 Ah/day  3. Number of days of required storage capacity  10 days  4. The amount of Amp hours storage needed  40 A h  5. The discharge limit for the batteries  25 % limit  6. Divide line 3 by line 4  160  7. Loss of capacity from winter temperature @ -30 °C This enables the battery capacity to endure cold temperatures.  8. Multiply line 5 by line 6. This is the total battery capacity needed.  9. Divide line 8 by battery capacity: 95Ah  70 % loss 272 A h 2.86 -> 3 batteries  4.8 UltraCapacitor Technology Ultracapacitors are essentially, high cycle life, high energy capacitors that stores energy electrostatically by polarizing an electrolytic solution. Though it is an electrochemical device (also known as an electrochemical double-layer capacitor) there are no chemical reactions involved in its energy storing mechanism. This mechanism is highly reversible, allowing the ultracapacitor to be charged and discharged hundreds of thousands of times [29]. hi applications requiring long term service, it has been shown that ultracapacitors are a practical solution [30].  Chapter 4 Energy Storage Systems  43  4.8.1 Long Life In terms of energy density, ultracapacitors are positioned between battery and electrolytic capacitor technology meaning an ultracapacitor stores more energy than a conventional capacitor of similar size and a battery will store more energy than the same size ultracapacitor. The energy in batteries is stored in chemical compounds and is converted directly into electric energy by means of an electrochemical oxidation-reduction reaction. This chemical reaction on the electrodes has a major influence on the aging of batteries. The charge/discharge cycles affects the life of batteries. In capacitors, the electric energy is stored directly as a positive or negative charge on the plates without any reaction on the electrode surfaces. With capacitors, there is no chemical contamination or oxidation on the electrodes. Capacitors rely on an electrostatic effect, which is purely physical and highly reversible. Ultracapacitors have a charge/discharge life rated over 500,000 cycles. Their operation life far exceeds the lives of batteries. As long as capacitors are within their operational voltage limits, there is no risk of overcharging and no need for accurate charge and time monitoring. 4.8.2 Discharge/Charge Capability An ultracapacitor can be charged to any voltage within its voltage rating. There is no minimum voltage requirement. A battery's life is closely related to its depth of discharge. Figure 4-6 demonstrates the charging profile of a battery and ultracapacitor [3]. To maintain life, a battery should not be discharged to less than 25 % of its capacity. Capacitors are not theoretically limited to a minimum discharge and can deliver all their energy without degradation. However, for applications that require a fixed power, it is not practical to discharge the voltage below 50 % due to the increasingly high currents required. For this project, the purpose is to utilize the maximum energy stored in the capacitor bank. The discharge is governed by the system's capability to handle the lowest voltage point. Section 4.8.9 discusses in more detail the energy capacity of the capacitor bank. A capacitor has the capability to charge in seconds, whereas, a battery often requires hours. Ultracapacitors will accept as much charge as possible and a limiting circuitry is necessary to protect the charging system from high inrush current.  Chapter 4 Energy Storage Systems  44  Charging Battery  Ultracap • — •  Figure 4-6 The capacitor and battery charging characteristics  Time  4.8.3 Modeling Ultracapacitor's ESR and EPR The capacitor's application dictates the type of capacitor model used for analysis. If the capacitor is in a system, where it is cycled slowly over seconds/minutes, than the classical equivalent circuit of Figure 4-7 can be employed [31].  The classical equivalent circuit is  comprised of three components, the capacitance (C), the E S R and the equivalent parallel resistance (EPR). There is an energy loss associated with the charge/discharge cycle, which is a function of the ESR and charge acceptance. A battery has larger ESR and suffers from polarization losses. It is less efficient at storing charge than a capacitor (refer to section 4.2.3.) The EPR models the current leakage effect and will impact long term energy storage performance. The EPR is typically very large, resulting in a small leakage and is often neglected for discharges on the order of a few seconds.  Figure 4-7 The ultracapacitor classical equivalent circuit model  Chapter 4 Energy Storage Systems  45_  4.8.4 Temperature Performance One of the major problems with batteries is a loss of performance in cold environments. Low temperatures reduce energy capacity, slows cycling rate and may cause damage i f the electrolyte freezes. Some batteries are designed for very low temperature operation. Nonetheless, battery performance significantly degrades as temperature decreases. Since capacitors do not dependant on chemical reactions, they operate reliably down to —40 °C. A capacitor's ESR increases as temperature decreases. Based on 20 °C, on average, the ESR doubles at -40 °C [32]. However, as mentioned, a capacitor's ESR is small when compared to a battery with similar capacity. 4.8.5 Environment Ultracapacitors require fewer resources and materials to manufacture than batteries. Capacitors contain no acid, hazardous substances or heavy metals such as cobalt, lead or cadmium. In large ultracapacitor cells, aluminum accounts for 25 % to 30 % of the total weight which is easily recyclable. In comparison with batteries, ultracapacitors are considered more environmentally friendly. 4.8.6 Disadvantage of Ultracapacitors For a given size, batteries hold more energy than a capacitor. The primary disadvantage of ultracapacitors is their relatively low energy density limiting their use to applications in which relatively small quantities of energy are required before the capacitors require charging. A n ultracapacitor cell has a maximum voltage of approximately 2.5 V . Many applications require cells connected in series to achieve a higher voltage. Series require balancing circuitry to prevent individual cells from exceeding their voltage ratings (next section). As well, ultracapacitor technology is fairly new and presently has a large purchasing cost. However, capacitors contain inexpensive materials and require fewer resources to manufacture than batteries. As the technology advances, the cost steadily declines, dropping more than half every two years. In 2001, a Maxwell PC2500, 2700 F capacitor cost $600 (Cdn) per cell. Today (2005), each cell cost $60 (Cdn.)  Chapter 4 Energy Storage Systems  46  4.8.7 Voltage Balance Voltage distribution across series stacked capacitors is ideally a function of capacitance. If each component is identical, the voltage divides evenly. For example, 15 V across six capacitors should charge each cell to 2.5 V. However, variations in capacitance, from manufacturing and over the life of the product, will result in a voltage imbalance. Some cells charge less than 2.5 V , while others exceed the over-voltage limit [33], [34]. After the stack has been held at a constant voltage for a period of time, the voltage distribution then becomes a function of leakage current. The cells with higher leakage discharge faster resulting in a lower voltage. The total voltage across the stack is constant and must be redistributed across each component causing some cells to over charge. Cell balancing is an effective method for managing series stacked capacitors. There are two techniques for cell balancing passive and active. Figure 4-8 is a diagram of passive cell balancing. Passive balancing compensates for variations in leakage current and capacitance by placing a bypass resistor in parallel with each cell. A l l the parallel resistors are the same value and are typically sized at 10 times the average leakage current of the cell. The cells with higher voltages will discharge through the parallel resistance at a higher rate than the cells with lower voltages. This will distribute the stack voltage evenly across the entire series of capacitors. Passive balancing is most appropriate in low duty-cycle applications that can tolerate higher leakage. The benefits to this balancing method are simplicity and low cost. The drawbacks are a slow stabilizing response and a higher power loss due to 10 times the additional leakage current.  Figure 4-8 Passive circuitry for voltage balancing  Chapter 4 Energy Storage Systems  47  Active balancing circuitry is required in high duty-cycle applications or when low losses are necessary. Active circuitry has higher cost than passive balancing. However, it is used in the sea lion project because it offers lower power losses. Figure 4-9 shows a simplified diagram of an active balancing circuit using comparators.  Figure 4-9 Active circuitry for voltage balancing The voltage across each capacitor is compared and charge is balanced to equalize the cells. Maxwell offers an integration kit that supplies the mounting brackets, fasteners and balancing circuitry for connecting capacitors in series. The active circuitry is capable of providing up to 300 m A of current to balance adjacent cells. When the cells are balanced, the circuit draws less than 50 uA. 4.8.8 Ultracapacitor Selection The capacitor energy storage bank is a module consisting of six Maxwell PC2500 Booststrap double layer capacitors. The capacitors are packaged in a durable, lightweight, hermetically-sealed aluminum encasement. Each capacitor has accessible terminals and is able to cycle hundreds of thousands without a reduction in performance. Their operating temperature is between -40 °C and 65 °C. They have a capacity of 2700 F and a maximum voltage of 2.5 V . To interface with the 12 V battery, the capacitors are stacked in a series configuration. Therefore, the stack's maximum voltage limit is 15 V and the equivalent capacitance is 450 F.  Chapter 4 Energy Storage Systems  48  4.8.9 Energy Capacity Energy stored in a capacitor is a function of its voltage and capacitance such that „  CV  2  (4)  2  The capacitor bank can be charged to any voltage within its voltage rating  (V AX) M  of  15V.  At  VMAX, the bank's capacity is 14 Wh or 50.6 kJ. At any other voltage level, the stored energy is expressed as a ratio of the current energy level divided by the total capacity CV  2  y  % Capacity = ^  CURRENT  E  \ CV  '-'MAX  ^  c  c  m  r  =  x 100 =  MAX  YsHMEHL V  x  1 0.  (5)  0  ' MAX  2  The voltage versus capacity is plotted in Figure 4-10. Due to the voltage squared term, the graph shows an interesting relationship between the voltage and the energy. At 15V, the capacitor is fully charged, a decrease of 5 V releases more than 50 % of the energy. Below 5 V , 90 % of the energy has been released. For the sea lion project, the capacitor storage system can operate between 4.5 V to 14.5 V . The total energy is 11.9 W h (42.8 kJ.) If the base station operates at an average of 2 W, then the capacitor bank can provide 5.9 hours of operation. The leakage current is a time dependence of the self-dissipation of the capacitor. The PC2500  has a typical leakage current of  6  mA for a  72  h test at  25 ° C .  Similar to batteries, the  discharge rate is temperature dependant and declines as the temperature decreases [35]. 100  / /  5  80 /  /  /  y.  ,/  o  . /  /  / '  a:  LU  0  5  10 Capacitor Voltage (V)  Figure 4-10 The percentage of energy versus capacitor voltage  15  Chapter 4 Energy Storage Systems  49  4.9 Energy Bank Topology To take advantage of the capacitor's wide voltage range, it is decoupled from the system by a dc/dc converter as shown in the figure below.  Figure 4-11 The energy bank topology  The capacitor stores surplus energy from the solar panel. The converter is a power regulator and is designed to prevent the capacitor from drawing excessive battery current. The converter is bidirectional. As the capacitor discharges, its voltage decreases, however, since it is decoupled, the battery's voltage is maintained [36]. The following chapter discusses power converters.  Chapter 5 Power Converters Power converters transform power into a useful form. Depending on the application, converters are designed to maximize or regulate the energy flow. For instance, a M M P T is a type of converter used to exploit as much as energy from a solar panel by loading it at its power point. Another converter regulates the energy flow between the ultracapacitor and battery bank. Only dc/dc converters are used in the sea lion project. There are two basic methodologies for accomplishing dc/dc power conversion: linear regulation and switchmode conversion. 5.1 Linear Regulators Linear regulators are step down voltage converters. They reduce a higher input voltage down to a lower output voltage by linearly controlling the conductivity of a series pass power device (BJTs, MOSFETs) in response to changes on the output load [37]. This technique offers low output noise and excellent regulation characteristics. However, linear regulators operate the power device in the linear (ohmic) region with the load current flowing through it and the input/output voltage difference across it. The power loss is given by  Significant heat is generated from dissipated energy, especially i f the input/output voltage difference is large. Due to this power inefficiency, the linear regulator is not used in the sea lion project. 5.2 Switchmode Power Converters Switching power converters offer higher efficiencies because they operate power switching devices in the full-on/full-off states. Furthermore, switchmode converters are not limited to down conversions. They offer the options to: buck, boost and/or invert the output. Unfortunately, switchmode converters radiate more electrical noise (EMI) and have poorer regulation characteristics than linear regulators. However, with proper design techniques, the drawbacks of switchmode can be reduced to acceptable limits. There are many different switchmode power topologies. The most commonly used types are: •  Buck: used to reduce a dc voltage to a lower dc voltage 50  Chapter 5 Power Converters  51  •  Boost: provides an output voltage that is higher than the input  •  Cuk: an inverted output voltage that is less than or greater than the input  •  Non-inverting Buck/Boost: an output voltage that is less than or greater than the input  •  Flyback: an isolated output voltage that is less than or greater than the input, it also offers multiple outputs 5.2.1 The Buck Converter The buck converter used in this thesis is a non-isolated down converter used to reduce a  dc voltage down to a lower dc voltage of the same polarity. Buck converters are frequently used in battery powered applications such as laptops, battery regulators and cell phones [38]. The topology contains a low number of components offering simplicity and reduced cost. The drawback of this buck converter is a direct dc path from input to output in the event of a shorted element. Isolated converters offer safety and protection but require a transformer. Isolation is not mandatory and due to the application's low voltage range, the buck converter is selected. 5.2.2 The Buck Topology The Buck topology is the most basic switchmode topology and is illustrated in Figure 5-1(a) and (b). It uses switching to reduce the output voltage. The switching action produces a rectangular waveform at Vs as is shown in Figure 5-1 (c). The average output voltage is the area underneath the on-time divide by the period (Ts). The on-time's duty cycle is represented by D. The inductor and capacitor are used to form a low pass filter. These elements are large enough to significantly remove nearly all the ac components. To analyze the steady state, the inductor voltsecond and capacitor charge balance methods are used. The analysis is described in detail based on references [38], [39].  Chapter 5 Power Converters  52  a)  b)  Switch Position 1 (Swl)  c)  v  Switch Position 2 (Sw2)  s  Sw2  Swl  0 DT  S  T  +-1 s  Figure 5-1 Buck converter topology and switching action As a rule of thumb, the low pass filter's natural frequency should be at least one decade less than the switching the frequency. For the sea lion project, the power converter output is connected to the storage bank. The storage bank has an extremely large capacitance value and its natural frequency is small. At steady state, the output voltage V is shown in Figure 5-2 (a) and L  its current I is Figure 5-2 (b). When the switch is in position 1, the inductor's voltage is the L  difference between the input and output voltage. The current ramps up until the switch engages into position 2. The inductor's voltage instantaneously changes to  -V ut 0  and the current falls.  At steady state, the inductor's volt-second will balance and the rise and fall times are repetitive. The ripple is represented by AI , and is symmetrical about the average current I . L  dc  Chapter 5 Power Converters  V  i  a)  53  L  V ,I vN -- V, V OUT  •> t -v,O U T  b) Ii 1MAX  V  IN  -V  1  V,OUT  OUT  AIt  I J-dc  AI L AM IN  DT  S  Figure 5-2 The inductor's voltage and current signal Switch Position 1 D=  Switch Position 2  OnTime Ts  V =L L  dt  (?)  D'=l-D  (9)  -V  (11)  L =  di = 2AI  (change in I )  dt = DT  (length o f interval) (13)  L  L  S  V -V L  V  m  L=  -V  (constant voltage)  -VOUT  IN  °  v  UT  (14)  C  - L V,OUT  2AI,  ^ DT,  (15)  DT,  (16)  2  y  OUT  (8) -1  V,OUT  2AI,  2M  L  DT,  DT,  (10) (12)  Chapter 5 Power Converters  54  The equation to determine the inductor's value is derived from the figure above. Equation 16 calculates the inductor's size such that a desired current ripple A I l is a small fraction of the dc component. 5.2.3 IRMS Calculations Due to the switching action, the current flowing through the converter contains a dc and an ac component. The I  R M  calculation for the inductor, switch 1 and switch 2 unfolds as follows:  s  5.2.3.1 Inductor RMS Current In Figure 5-2 (b), the inductor's current I is equal to the average current Id plus the slope of the L  C  ripple. The slope (di/dt) is dependant on L, thus, I and ILRMS are L  \ -M dc  +  I, + A I " c  1  rTS  ' Lrms  ,0<t<DT  (SW\)  ,DT <t<D  (SW2)  s  2AI__ (l-D)T  s  (17)  s  s  I\dt  (18)  1 fO T  ^ t  dc  l  JO  AI +  1  DZ s J  •r [ ,  .  dt+ £ I.+AIDT \ s  ]  j  dc  s  t  2AI s — (t-DT ) (l-D)T 5  dt  s  Al'  5.2.3.2 High Side Switch (Switch 1) rms Current Switch 1 connects the inductor to the source. The current flowing through switch 1 is equal to (17) for 0 < t < D T and 0 elsewhere. Its IRMS value is S  SW\rms  l  Dx  11 +  AI 2\  (19)  Chapter 5 Power Converters  55  5.2.3.3 Low Side Switch (switch 2) rms Current Switch 2 places the inductor parallel to the output capacitor. The current flowing through switch 2 is equal to (17) for D T < t < T and 0 elsewhere. Its R M S value is S  s  (20)  5.2.4 Capacitor Bank dc/dc Converter The capacitor bank is able to draw large amounts of battery current and cannot have an instantaneous voltage applied across its terminals. Therefore, the bank's energy flow is regulated through the dc/dc converter. The converter is designed to utilize its filter inductor as a current buffer and can control the current using a hysteresis limiting technique. Where the hysteresis bandwidth HBAND equals twice the ripple current HBAND - 2AIL-  (21)  The inductor's current I and its voltage V are plotted in Figure 5-3 (a) and (b). To observe the L  L  converter's operation, A I is exaggerated for clarity. In this design, the ripple is much smaller, L  approximately 3.5 % of the operating current. When switch 1 turns on, IL begins to ramp. The ramping slope depends on the inductor's value and the larger the value, the slower the rise. When the current reaches the upper limit, switch 1 is turned off. Switch 2 turns on to maintain the current's path. The capacitor will accumulate the charge causing its voltage to increase and the current to drop. When the current reaches its lower limit, the process repeats: switch 1 turns on and switch 2 turns off. The capacitor's voltage (VOUT) is monitored. When the maximum voltage limit (14.5 V ) is reached, charging is completed and the converter turns off. VOUT is plotted in Figure 5-3 (c). To discharge the capacitor, the switching action is reversed. Switch 2 becomes switch 1 and vice versa. The converter becomes a boost converter, since the capacitor voltage (now VIM) will be equal or less than the battery's voltage (VOUT )• The hysteresis control remains the same, except the current direction is also reversed. The capacitor is discharged to 4.5 V , releasing about 90 % of its capacity. The capacitor provides 11.9 W (42.8 kJ) of energy has a cycle life greater than 500,000 times. Section 4.8 discusses the ultracapacitor in more depth.  Chapter 5 Power Converters  Figure 5-3 The capacitor bank's charging characteristics  56  Chapter 5 Power Converters  57  5.2.5 Maximum Switching Frequency Since the converter is hysteresis controlled, the switching frequency is a variable. Minimum switching occurs at the start or end of charging because it takes time for the inductor to store or release its energy. However, when the converter is operating within the hysteresis band of 2 A l , then the system is in its "steady state." At this state, during each cycle, the converter's input energy is transferred to its output. The volt-second area in position 1 equals position 2 (Figure 5-3 (b).) Thus, the maximum frequency occurs when the voltages of the capacitor and battery banks are equal. Using the volt-seconds method,  fMAX  can be calculated as  follows. Within the hysteresis band, the volt-seconds are equal {V -V )DT =V xD'T . IN  OUT  s  our  (22)  s  For the switch to be at the maximum, the time components must be at a minimum. This occurs when on/off times are equal D = D'  (23)  D + D'=l  (24)  and since  we have D =  l  (25)  2 Thus, (22) becomes V  ' IN  -V  =V  ' OUT  (26)  ' OUT  VouT =  -f-  V  (27)  The max frequency is 1  T =T  f J MAX  MAX  '  (28)  Substitute (25), (27), and (28) into (16) and solving for f x yields MA  (29)  f  JMAX  4  L  M  -  Chapter 5 Power Converters  58  5.3 Switch-Mode Power Inductors The primary function of the inductor in a switching regulator is to pass direct current and filter out components at the switching frequency and its harmonics. The value determined for Alt is somewhat arbitrary and it can be adjusted to obtain a practical value for the inductor. The size of the inductor is also dependant on the converter's switching frequency. At higher frequencies, the filter inductor does not have to store as much energy because it's being replenished more often. A smaller inductor means a reduced cost. However, the inductor's core losses (eddy currents, hysteresis) and the switching losses in semiconducting devices increase with operating frequency. For this application, the frequency can be selected and 50kHz is chosen for fiviAx. Rearranging (29), the inductor's size is chosen, such that the current ripple is a small fraction of the full load inductor current dc component IAVG v  L = ~4{F M ) MAX  IN  L  < °) 3  Two different types of core materials are commonly used for inductors used in switching regulators: powder cores and ferrite cores. Material selection depends on cost, volume, size/space limitations, and winding capabilities. Each material type has its advantages as described below: 5.3.1 Powder Cores Powder cores have a distributed air gap structure eliminating the fringing flux that occurs in a discrete gap design. This material gives a soft saturation, allowing them to be used at high dc levels without saturating. They can store considerable energy, which leads to reduced size and weight and are therefore used in inductor applications [40]. However, at high frequencies, powder cores have more loss than ferrite. Powder materials have a low resistivity leading to larger eddy currents. As well, compared to ferrite materials, powder cores have smaller permeability and require more copper turns which results in increased winding resistance, to achieve the required inductance. 5.3.2 Ferrite Cores Ferrite cores offer the advantages of lower cost, larger permeability and less loss. In this application, at low frequencies, the inductors are dominated by the copper losses and the ferrite  Chapter 5 Power Converters  59  core's higher permeability reduces the number of copper turns. Powder ferrite cores have a low saturation density. Thus, to avoid saturation, a discrete air gap is added. A n air gap also minimizes temperature effects. As the ambient temperature fluctuates, the permeability of ferrite cores also changes. The air gap has a constant permeability and it helps stabilize the inductor's value. The larger the gap, the less the temperature effect, however, at a penalty of additional copper turns [41], [42]. 5.3.3 Inductor Losses In a typical switching dc/dc converter, i f the inductor is not properly designed, significant energy can be lost in the filter. The dissipated power arises from two sources: the losses associated with the inductor core and those associated with the inductor's winding. In this project, the inductor is dc biased. If the ripple current is kept small, the inductor has small core losses and the dc copper losses dominate. 5.3.3.1 Winding Losses Power loss in the windings is due to the winding's dc and ac resistance described by ^WINDING_LOSS  ~ ^dc^dc  rms)  +  ac'  (31)  R  From (18) the rms value of the ac current is rms =  S  (32)  and the dc resistance equals _ R  Length  d c - P —  •  (33)  Where: • Length = length of wire • Aw - Cross area of the wire • p is the resistivity of the winding material For copper p is p = \. 724x10- [l + 0 . 0 0 4 2 ( r ° C - 2 0 ° C ) ] . 8  %  (  3  4  )  With increasing frequency, more current is present in the outer layers of the wire, due to the skin effect (5). The skin effect is where alternating current tends to avoid travel through the center of a solid conductor, limiting itself to conduction near the surface. This effectively limits the available cross-sectional conductor area to carry alternating electron flow, increasing the  60  Chapter 5 Power Converters  equivalent ac resistance of that conductor above what it would normally be for dc. The phenomenon is caused by a changing i(t) within the conductor. Induced eddy currents flow in a manner that tends to oppose the ac flux. The eddy current reduces the net current density in the center of the conductor and increases the net current density near the surface. The resultant is an ac and dc resistance as shown in Figure 5-4. Cross sectional area of conductor available for conducting dc current: "dc resistance" Cross sectional area of the same conductor at low frequency: "ac resistance"  Cross sectional area of the same conductor at high frequency Figure 5-4 The skin effect  Skin depth 5 is the distance / shown in Figure 5-4. It is described by S=  (35)  Where for copper, u, = u, = permeability = 47ie-7 H/m. The equivalent ac resistance is 0  "= 8x{d-S)  R  P  () 36  To decrease the copper losses, four threads of 18 gauge magnetic wire were braided together to form a 12 gauge "Litz" wire. 5.3.3.2 Core Loss Within the core, energy is lost due to the changing magnetic field during each switching cycle. Energy is required to change the walls of the magnetic domains and the loss results in heat. This is called hysteresis loss and varies as a function of AB. Since this application drives the core with dc, the loss occupies the first quadrant of a B - H loop. The second type of core loss  Chapter 5 Power Converters  61  is due to eddy currents. Magnetic core materials are iron alloys making them electrical conductors. As a result, changing magnetic fields causes electrical eddy currents to flow within the core material. These eddy currents cause I R loss in the core's material. Manufactures of 2  inductor cores typically include curves, at various frequencies, for core loss versus flux density. Such curves are plotted based on sinusoidal excitation bipolar flux swings. When estimating the core loss for dc-dc converters that operate with unipolar flux swings and rectangular applied voltages, the core losses can be approximate using the converter's fundamental switching frequency and one-half the ripple's peak-to-peak flux density [43]. 5.4 Inductor Design The converter is designed to operate with a maximum operating frequency of 50 kHz. The ripple current is chosen at approximately Al|_ « 0.1 mA. At f M A X Vin=  =  50 kHz, AI = 0.1 A , and L  12 V , the inductor is calculated using (30) as L =  = 0.6 mH.  (37)  4x50xl0 x0.1 3  The inductor is designed to operate at a maximum of 5 A . T D K Corporation and Magnetics Incorporation manufacture ferrite cores specifically designed for switch mode power inductors. TDK's PC40 and Magnetics' R and F type ferrite materials are all suitable products. Magnetics' products are easier to acquire and cores using the F material are analyzed. The F material has a higher permeability than its R material counterpart. From Magnetic's datasheet [42], the F material can operate with a magnetic flux density (B) equal to 0.3 T without saturating. The material's permeability (pr) is nominally: 3000 @ 23 °C. The permeability changes with temperature: 1300 @ -30 °C to 4000 @ 100 °C. A n air gap is added to the core to stabilize the permeability and to permit a maximum current of 6 A without saturation. To optimize the inductor's design, a magnetic circuit analysis is performed on all the different core shapes available from Magnetics. The geometric dimensions for each core are inserted into a spreadsheet. The core/winding losses, air gap, inductance variation are calculated for all geometries. From the results, an optimized core can be selected. The equations used for the analysis are derived below. The derivations assume that the magnetic fields are uniform and contained within the core. Proximity and fringing are neglected. Figure 5-5 illustrates the inductor's physical model and its electrical equivalent circuit.  Chapter 5 Power Converters  62  Effective length of the magnetic path /  0 © © 0  X X X X  © 0 0 ®  s  F, <  X X X X  Rs =  uuA„  o s e  <F=9{[ \  - J  + s <  (a)  > R„ =•  (b)  Figure 5-5 The inductance (a) physical model and (b) electrical equivalent circuit  The inductance L is N  N  2  L=  2  =  Mo  R +R  (38)  s  • + -  Ms A  A S  Where the number of turns N can be found by rearranging (38) such that L  N=  (39)  Mo  To avoid saturation we from the equality MAX  B  =  B  g  =  B  (40)  S -  Where the subscripts g and s denote the air gap and ferrite core respectively. Subscript x represents both g and s Bx=/xH N*I  (41)  =H l +Hl  MAX  s s  (42)  g  Substitution of (41) into (42) » =uH X XX  >NxI MAX  r  BMAX  f  i  \  (43)  + L  Mo o \Ms  J  likewise using (39) for N in (43) L  I.  M {M A 0  5  K A  xl gJ  MAX  BMAX  (44)  Mo \M  S  Chapter 5 Power Converters  63  rearrange (44) and solve for l yields g  MAX  J L  =  LA u u - 2B e  0  s  MAX  AAl e  g s  +  LA u u )  ^(I  e  MAX  0  s  + (2I  B  MAX  )  MAX  Lu uJ (A 0  s  g  - A) e  2B jA A u M  where:  e  g  (45)  s  A = effective magnetic area l = air gap length A = air gap area u = permeability=4nl0' (H/m) u — ferrite permeability  B = magnetic flux density (T) BMAX — maximum flux density H = magnetic field (A/m) IMAX maximum current  e  g  g  7  =  0  s  5.4.1 Inductor Selection The dimensions for Magnetic's inductor cores are shown in Table 16. Using the equations above, the inductor's properties (Table 15) are inserted into a spreadsheet and the losses for all Magnetic's products are determined at the P V ' s maximum power point. Table 17 shows the resulting top 15 cores with the lowest losses.  Table 15 Magnetic's inductor properties Temp (°C)  20  Resistivity (Q/cm)  Inductance (mH)  0.6  1.72x10"°  Frequency (kHz)  50  Skin depth (cm)  2.96xl0"  Max current (A)  5  Wire gauge  12  BMAX  Wire diameter (cm)  0.213  IDC(A)  3.7  (as max  4000  Ripple Current (Al)  0.1  us min  1300  A B (Telsa)  5.6x10"  uo  1.26xl0"  Saturation  6  2  6  (Telsa)  0.28  3  A  64  Chapter 5 Power Converters Table 16 Magnetic's inductor core dimensions Core Shape  Magnetic Path (cm)  Core Area (cm )  Volume (mm )  Center Width (mm)  Center Length (mm)  Center Area (cm )  49928EC  E-E  27.4  7.38  202  27.5  27.5  7.56  2  49925UC  U-U  30.84  6.45  199  25.4  25.4  6.45  3  49938EC  E-E  14.8  5.4  79.8  37.5  14  5.25  4  45530EC  E-E  12.3  4.17  51.4  24.61  15.62  3.84  5  47228EC  E-E  13.7  3.68  50.3  19  19  3.61  6  45528EC  E-E  12.3  3.5  43.1  20.6  16.8  3.46  7  45724EC  E-E  10.7  3.49  36.7  18.8  18.8  3.53  8  46409EC  E-E  7.74  5.16  40  50.8  10.16  5.16  9  4641OEC  E-E  8.02  5.16  41.4  50.8  10.16  5.16  10  48020EC  E-E  18.5  3.89  72.1  19.8  19.8  3.08  11  44924EC  E-E  10.4  2.57  26.7  15.62  15.62  2.44  12  46016EC  E-E  11  2.48  27.2  15.62  15.62  2.44  13  44721 E C  E-E  8.9  2.39  21.3  15.67  15.67  2.46  14  44022EC  E-E  9.84  2.37  23.3  20  11.9  2.38  15  45021 E C  E-E  9.29  2.25  20.9  14.6  14.6  2.13  Core No.  Part N o .  1  2  3  2  Table 17 Top 15 cores with the lowest losses total wire length (cm)  dc Wire (mQ)  ac Wire (mQ)  IRdc Loss (mW)  IR a c Loss (mW)  Core Loss (mW)  0.66  165.00  7.98  16.70  86.94  0.06  1.09  88.08  17  0.63  172.72  8.36  17.48  91.00  0.06  1.07  92.13  0.39  21  0.64  216.30  10.47  21.89  113.97  0.07  0.43  114.47  4  0.57  28  0.61  225.29  10.90  22.80  118.70  0.08  0.28  119.05  5  0.61  30  0.62  228.00  11.03  23.08  120.13  0.08  0.27  120.48  6  0.64  31  0.60  231.88  11.22  23.47  122.17  0.08  0.23  122.48  7  0.63  31  0.63  233.12  11.28  23.60  122.83  0.08  0.20  123.10  8  0.43  21  0.61  256.03  12.39  25.92  134.90  0.09  0.22  135.20  9  0.43  21  0.61  256.03  12.39  25.92  134.90  0.09  0.22  135.21  10  0.68  35  0.63  277.20  13.41  28.06  146.05  0.09  0.39  146.53  11  0.94  44  0.61  274.91  13.30  27.83  144.85  0.09  0.14  145.08  12  0.94  44  0.60  274.91  13.30  27.83  144.85  0.09  0.15  145.09  13  0.94  44  0.61  275.79  13.34  27.92  145.31  0.09  0.11  145.52  14  0.97  46  0.63  293.48  14.20  29.71  154.63  0.10  0.13  154.85  15  1.09  51  0.62  297.84  14.41  30.15  156.93  0.10  0.11  157.14  Core No.  Air G a p (mm)  N  mH  1  0.20  15  2  0.24  3  PTOT  (mW)  Chapter 5 Power Converters  65_  5.4.2 Inductor Construction As predicted from theory, by choosing a low switching frequency, the dc resistance calculated in Table 17 contributed more than 96 % of the losses. The Cores 1 and 2 are efficient because their magnetic paths are large and their wire lengths are short. However, the cores cost $30 (US) per core, thus, making them too expensive. Core 7 is chosen because 3-6 were not available from the distributor. Core 7 cost $4 (US) per core. At the time of purchase, the distributor required a minimum order of 300 bobbins. Unfortunately, only two bobbins were needed for prototyping and to save cost, the bobbins were fabricated from high density polyethylene (HPDE.) The HPDE material was obtained from shampoo bottles. For core 7, the air gap is calculated to be 0.63 mm. Paper was used as the air gap spacer. The inductor is inserted into a buck converter as shown in Figure 7-14. At a switching frequency of 50 kHz and a current of 3.73 A , the inductor's losses are measured at 142.3 mW. A saturation test is also performed and the resulting plot is shown in Figure 5-6. The plot is current versus time. The plot illustrates the inductor's di/dt slope. Saturation does not depend on time. However, in the plot, the saturation point is observed when the slope dramatically changes at approximately 6 A . This matches the saturation limit specified in Table 15. The spikes at the beginning are due to contact bounce from the experimental results.  Figure 5-6 The inductor's saturation curve  Chapter 6 Semiconductor Switches As power conversion relies more on switched mode applications, semiconductor manufacturers are continuously improving technology to create products that approach the ideal switch. The ideal switch would have: •  zero resistance or forward voltage drop in the on-state  •  infinite resistance in the off-state  •  switch with infinite speed  •  would not require any input power to make it switch  Unfortunately, solid-state switching technology is not perfect. The designer needs to have an understanding of available technology to choose components that best suit their application. Good engineering is about finding the best compromise. To select a suitable device for the sea lion power project, the following sections give a comparison of power switches. The challenge is obtaining a device with a high enough breakdown voltage, fast switching speed while maintaining negligible switching losses and minimum on-resistance. The tradeoff is between breakdown voltage and on-resistance.  The breakdown voltage of a  semiconductor switch is a function of the doping level across its reverse-biased p-n junction. Obtaining a high breakdown voltage requires low doping concentration and hence, a high resistive region. This is particular with majority carrier switching devices, such as, the MOSFET and Schottky diode. Their on-resistance is directly dependant on their rated voltage. However, for minority carrier devices, the minority carriers are injected into the lightly doped, high resistance region by the forward biased p-n junction. The resultant is a high concentration of carriers which reduces the on-resistance of the device. Therefore, minority carrier devices exhibit lower on-resistance than comparable majority-carrier devices. The p-n diode, the bipolar junction transistor family (BJT, IGBT) and the thyristor family (SCR, GTO, M C T ) are all minority carrier devices [44]. In minority-carrier devices, the benefit of reduced on-resistance comes with the disadvantage of decreased switching speeds. The conducting state of a semiconductor switch is controlled by the presence or absence of charge quantities applied to the device's control terminal. The turn on and turn off switching times are the times required to insert or remove this 66  Chapter 6 Semiconductor Switches  67  charge. The total amount of controlling charge in minority carrier devices is much greater than the charge required to control an equivalent majority carrier device. Although the mechanism for inserting and removing the controlling charge of switching devices can differ, minority carrier devices exhibit switching times that are significantly longer than those of majority carrier devices. Therefore, as shown in Figure 6-1, majority carrier devices find application at lower voltage levels and higher switching frequencies, while the reverse is true of minority carrier devices. Voltage  SCRs, BJTs** 5000V  IGBT  IGBT  IGBT  MOSFET** IGBTS  MOSFETS  MOSFETS  MOSFETS  MOSFETS  1000V  300V  25kHz  100kHz  •Frequency  ** The choice of switch depends on the application requirements  Figure 6-1 Switching device selection at different frequencies and voltages A great variety of solid state devices is available on the market. Some of the more commonly used devices are as follows: •  bipolar junction transistor (BJT)  •  metal-oxide semiconducting field effect transistor (MOSFET)  •  insulated gate bipolar transistor (IGBT)  •  silicon controlled rectifier (SCR), also known as thyristor  •  gate turn off thyristor (GTO)  For specific applications, the choice depends on the system's power, voltage, current and frequency requirements. Each technology has its own advantages in its own applications. BJTs  Chapter 6 Semiconductor Switches  68  and SCR's have high voltage ratings. SCRs have the highest and are used for very high power applications (>1000 V). SCRs are slow and their drive circuitry can be complicated. 6.1 Bipolar Junction Transistors A BJT is a current controlled device where the device is turned on and off by controlling the current (I ) into its control terminal. A BJT's drive circuitry can also be complex because the B  base current must be continuously supplied in a quantity sufficient to maintain saturation. This current is proportional to the on-current flowing through the switch. Since the on-current can vary according to load conditions, the drive current must be sensitive to variable load conditions. Base currents of one-tenth of the collector current are typical to keep B JTs in saturation. When a BJT is conducting current, a forward voltage drop is developed across the device terminals (collector to emitter) which give rise to conduction losses. BJTs have other performance and control limitations. Since BJTs are minority carrier device, they have relatively slow switching characteristics, limiting their maximum operating switching frequencies to the lower end of the kHz range. As well, BJTs are negative temperature coefficient devices. The switch is liable to thermal runaway: as the current increases, the temperature rises, boosting the gain of the transistor. The gain increases current and temperature and this positive feedback destroys the device. 6.2 Metal-Oxide Semiconducting Field Effect Transistors In general, the control driver for a MOSFET is easier to design. A MOSFET has high input impedance making its turn-on gate current negligible when compared to a BJT. The device is turned on/off by controlling the voltage across the gate-source junction (V s)- This greatly G  simplifies the drive circuitry. MOSFETs remain fully on by simply keeping the gate voltage above a certain threshold. MOSFETs have fast switching characteristics, allowing operation into the M H z range. They also have a positive temperature coefficient allowing them to be paralleled to further increase their current handling capability and decrease their on-resistance (Roson)For low voltage applications, power MOSFETs offer extremely low on-resistance. When a MOSFET is fully turned on, it exhibits a resistor like behavior and develops a forward voltage drop (IR drop) across its terminals (drain to source.) Similar to BJTs, this gives rise to conduction losses within the device. If the current is small, MOSFETs are more efficient because their IR drop is less than the turn-on voltage of an equivalent BJTs, IGBTs or SCRs. However, as  69  Chapter 6 Semiconductor Switches  the current increases, the IR drop rises and eventually, it exceeds the turn-on voltage of other switches. This is illustrated in Figure 6-2. The voltage drop of a M O S F E T and IGBT switch is plotted as the current through the devices increase. To equally compare switches, both switches were matched for identical ratings. A value of 600 V , 20 A is chosen because IGBTs are not manufactured with smaller voltage ratings. At lower values, where MOSFETs offer superior efficiency, the MOSFET has smaller conduction losses than the IGBT. Compared to other switches, MOFSETs are constrained to relatively low breakdown voltages. The voltage limit of metal oxide junction is bounded to 1000-1200 V . This confines the use of power MOSFETs in high voltage applications. Vds  0I1  & Vce  o n  @ 25°C vs. Drain/Collector Current  (Components rated @ 600V, 22A)  10  IRFP22N60K MOSFET IRG4RC20F IGBT  UJ  >  8  a! D  O s-  Q  V A w> 4  > o  l  10  Current (A) (log scale) Figure 6-2 MOSFET and IGBT conduction loss 6.3 Insulated Gate Bipolar Transistors An IGBT is a hybrid device, derived from MOSFET and BJT technologies. It was designed as a spin-off from MOSFETs to extend high speed performance into high voltage and high power applications while keeping the low forward voltage drop. Similar to MOSFETs, IGBTs are voltage controlled devices and have high input impedances. The operation of the IGBT is very similar to that of the power MOSFET. However, the resistance of an IGBT's n-doped region is much smaller than a MOSFET. Therefore, an IGBT's current ratings jumps five to ten times for a chip with the same area compared to a power MOSFET. IGBTs are faster  Chapter 6 Semiconductor Switches  70  than BJTs but are still relatively slower and have higher switching losses than MOSFET. This is partially due to a tail current effect they exhibit when the device turns off. 6.4 Switch Selection BJT and IGBTs (bipolar switches) do not have ability to block reverse voltages and should be used in such a way that they are only required to block forward voltages. Bipolar switches are a single quadrant switch. They are only able to conduct positive voltages and positive currents. MOSFETs have the advantage of two quadrates. They are able to conduct negative current. For this application, MOSFETs offer less switching and conduction losses than other switches. The following sections explain the characteristics and selection of MOSFETs used in the sea lion project. 6.5 The Characteristics of the Power MOSFET To determine which MOSFET is optimal for the sea lion application, an understanding of MOSFETs is required. The following section gives an insightful description on how power MOSFETs operate and provides the equations required minimizing losses. A detailed explanation of the semiconducting physics is beyond the scope of this thesis. MOSFETs are fabricated in the form of arrays. This means that a single power M O S F E T device is a parallel combination of thousands of individual cells, each cell being a M O S F E T in itself. If there is no input on the gate terminal, the junction between the n region and p island between the drain and source is reverse biased. There is no significant source-drain current flow and the drain sits at the positive supply voltage. The only current flowing from the source to drain is the reverse leakage current, which is negligibly small. If a positive voltage, higher than the threshold value, typically 3 V is applied to the gate, the electric field creates an inversion layer linking the source and drain region. This provides a current path. As VQS continues to increase, the inversion area intensifies and reduces the resistance between the source and drain. To allow for manufacturing variations, the threshold window is usually defined between 2.1 V to 4.0 V for standard type MOSFETs and 1.0 V to 2.0 V for logic level types. 6.5.1 The MOSFET Operating Regions The MOSFET is off (cutoff region) when VQS is less than the threshold voltage VGS(TH)When the MOSFET is driven above the gate's threshold voltage, it is in the ohmic region if  Chapter 6 Semiconductor Switches  71  V -V CS  >V >0.  CS(TH)  (46)  DS  In the ohmic region, the MOSFET behaves like a resistor and the current through the device is directly proportion to the applied V . D S  IDS <* V  (47)  DS  As VDS increases, the current also increases. However, when VDS exceeds the condition in (46), the MOSFET enters the saturation region. Once the saturation region is reached, further increase in V s will only cause a larger voltage drop across the device and raise the power dissipation D  without an increase in current. The drain current is now independent of V s and depends only on D  VGS- The drain current can be approximated by I DS  =  K^GS  ~ ^GS(TH) )  (48)  where K is a constant that depends on the device's geometry. In switch-mode power applications, V s is usually greater than VGS- TO insure full turn-on and minimize the voltage D  drop, the gate voltage is over driven: VGS »  VGS(TH)  and (48) simplifies to  I =KxV2 . DS  s  Based on (46)-(49), the following figure illustrates the MOSFET's operating regions.  * Ohmic Region,  Figure 6-3 The MOSFET's operating regions.  (49)  Chapter 6 Semiconductor Switches  72  6.5.2 Parasitic Capacitances and Inductance MOSFETs have faster switching characteristics than bipolar devices because they are majority carriers. They have no excess minority carriers that must be moved into or out of the device as it turns on or off. As a result, the switching characteristics of the power MOSEFET are governed by its capacitance. The MOSFET's gate impedance is very large because the electrode layer is insulated from the n-p layer by a silicon dioxide layer (glass). While this significantly minimizes the gate's current (IGATE)> the capacitance between the drain and source layers increases. To turn the device on/off these capacitances have to be charged and discharged. The charge rate depends on the current sinking/sourcing performance of the drive circuit. The circuit model of Figure 6-4 illustrates the parasitic capacitances and inductance of the power MOSFET. Most MOSFET's datasheets do not refer to the C D , C s, and C s, but to G  G  D  the input gate's capacitance dss, the MOSFET's output capacitance Coss and the feedback capacitance CRSS [45].  Stray Inductance  Drive Circuitry Drive Circuit Resistance  Cgd I Stray - Jnductence^ L  i—Vv\  Drive  5  Cds  Ciss"= Cos + C Coss = C s + C  G  D  CRSS  =  D D G  CGD  Cgs [ Stray i Inductance  Figure 6-4 The MOSFET's parasitic elements The parasitic capacitance depends on the device's physical dimensions, generally, the larger the MOSFET, the larger its capacitance. There is a tradeoff between lower on-resistance versus capacitance. Larger MOSFETs have larger cross sectional area, resulting in lower RosonAt the same time, the switching performance degrades due to the capacitances. The challenge is to find the optimal point for best efficiency [46]. The p-n depletion layer contributes to the MOSFET's capacitance. Since the depletion layer varies with the voltage, the capacitance is not  Chapter 6 Semiconductor Switches  73  constant. The capacitors' values are a function of the voltage. For Qss, the most significant change in capacitance occurs in CGD because VDG has the largest voltage change. To insure full turn on, a MOSFET must be charged beyond the threshold voltage VGS(TH)The gate driver must provide a high enough current to charge the equivalent gate capacitance CEI within the time required by the system design. Care should be exercised not to exceed the maximum voltage rating of VGS- Even i f the applied gate voltage is kept below the maximum rated gate voltage, the stray inductance shown in Figure 6-4, coupled with the gate capacitance, may generate ringing voltages that could destroy the oxide layer. Increasing the output impedance of the gate driver, dampens the ringing, however, it slows the charging rate. 6.6 Power Losses The power loss in any MOSFET is the combination of the switching losses (Psw) and the MOSFET's conduction losses (PCOND)P  T0T  =P  sw  +P  (50)  C0ND  6.6.1 Conduction Losses Calculating conduction losses is straightforward: I R losses in the MOSFET multiplied 2  by the MOSFET's on-time, at the correct operating temperature Pcom=lL*RDs(l  + *Tj)xD.  (51)  The on resistance is temperature dependant and R.DS(on)(\ + AT}) accounts for the change in Roson at the MOSFET's junction temperature (Tj). Typically manufacturers normalize Roson at 25 °C. This value is unrealistic because the power losses significantly escalate the MOSFET's temperature. To account for the resistance change, manufacturers include a datasheet of Roson versus Tj (Figure 6-5) [43]. A junction temperature of about 105 °C is usually a good starting point for commercial applications. At this temperature, the on resistance is typically 1.35 times larger than at 25 °C [48].  74  Chapter 6 Semiconductor Switches  Figure 6-5 The MOSFET'S normalized R  D S  on  6.6.2 MOSFET Switching Losses As the MOSFET turns on/off, it undergoes two losses: the crossover losses caused by the crossover of V s and IDS and the gate losses caused by charging/discharging the device's D  capacitance. 6.6.2.1 The Gate Charge Loss The energy required to charge a MOSFET's input capacitance is lost during each switching cycle. When calculating the gate loss, the most common error is using the input gate's capacitance value (Ciss) from the MOSFET's datasheet [49]. Qss is a variable capacitance and depends on the applied gate voltage. Refer to Section 6.5.2. The gate's voltage is overdriven and Ciss is higher than the value obtained from the datasheet. The amount of total gate charge (QTOT) necessary for MOSFET turn-on is QTOT = QGS + QGD +QOD-  Where  • • •  (52)  Qcs is the gate-to-source capacitor charge QGD is the gate-to-drain capacitor charge QOD is the "overdrive charge" to insure full turn on  Shown in Figure 6-6, QTOT is determined from the gate-charge plot typical supplied on MOSFETs' datasheets [50].  75  Chapter 6 Semiconductor Switches 20  l = 75A  > W)  03  D  s= 16  4  4  V  -  VD S= 28V -  -4—*  > 8 l-l  12  o  00  •a o  >  //  r  /  0  20  40  60  QTOT Total  80  100  Gate Charge (nC)  Figure 6-6 The gate's charge plot Once QTOT is known, the power loss due to charging and discharging the gate capacitance is as follows. The drive current is the total charge divided by the charging time I DRIVE  QTOT  (53)  TOT  The drive current is related to the MOSFET's input capacitance QTOT _ ^ISS^GS  T  (54)  T  Cancel common terms (55)  QTOT ~ ^issues _  The power loss can be found using the capacitor energy equation C V 'Charge  J  P Ch arg e  Ch arg e ~ ECharge  Ch arg e  (56)  ^ISS' GS  X  ^ISS^GS ftSW  fsw  (57)  (58)  Chapter 6 Semiconductor Switches  76 p  _ QroT^Gsfsw  charge ~  (59)  2  The charging loss occurs twice per switching cycle through charging and discharging ^Charge  =  QrOT^GsfsW  (60)  6.6.2.2 Crossover Loss To determine the crossover loss, the switching behavior of the high side (SW1) power MOSFET is simulated in Pspice. As shown in Figure 6-7 (a), a constant current source is applied at the MOSFET's gate (IGATE) and a load current is placed at the drain (IDS)- The driver's output impedance is R - Figure 6-7 illustrates the path of IGATE as it flows through the parasitic G  capacitances. The switching characteristics of V  D S  and IDS are plotted in Figure 6-8 (a). VGS is  plotted in Figure 6-8 (c). When the driver is initiated, IGATE flows in the directions shown in Figure 6-7 (a). Qss begins to charge and VGS increases linearly. Ideally, no current flows until V s reaches the threshold voltage. However, there is a small leakage current between the source G  and drain. As VGS exceeds the threshold boundary, I s climbs rapidly, Figure 6-8 (b). At this D  point, the parasitic inductance will cause VGS to deviate from its original slope (section 6.5.2.) Inductance in series with the source develops an induced voltage as the current increases. This voltage counteracts the applied gate voltage and slows down the voltage rise. Similarly, V s will D  start to fall because of stray inductance in series with the drain. To avoid cross conduction, before SW1 is turned on, SW2 is turned off and SW2's intrinsic diode briefly supports the current. As I s reaches the current flowing in the inductor D  (IDC-AIL),  the diode is no longer providing a current path and goes into reverse recovery. The  recovery charge creates a hump. This is evident at the end of timeframe T , in Figure 6-8 (a). 2  After reverse recovery, the diode can now support the voltage and VDS falls rapidly. During this time, the MOSFET is in the active region because V s is greater than VGS. According to (49), IDS D  is proportional to VGS and a constant IDS clamps VGS. In Figure 6-7 (c), the entire gate current now flows through CQD , causing both V D and V s to fall. As V G  D  D S  falls, the MOSFET is between  the on/off state and the device cross conducts. The product of VDS and I s is the crossover loss D  shown in Figure 6-8 (b). The area underneath this curve is the total energy lost. This loss occurs twice per switching cycle: turn-on and turn-off. The gate's voltage (VGS) is dependant on the accumulated charge (Qx) stored in Qss- Therefore, the curve of VGS is identical to the charge  Chapter 6 Semiconductor Switches  77  plot in Figure 6-6. Even though V s is fixed, IGATE is still rising. The voltage across IGATE G  (VGATE) is ^GATE  VGS  =  +  I GATE  X  G •  (61)  R  Since all of IGATE flows through CGD, the rate that CGD charges is j  T  V  -V  _ • GATE ' GS GATE „ G  C GATE -~  x  GD  (6z)  L\V  CD  "  •  (63)  At Setting (62) equal to (63) yields W  G D  A;  oc •  1  (64)  R,  Equation 64 states that the change of VDG is dependant on the driver's output impedance. Decreasing the impedance will improve the charge rate and minimize the cross conductions. As V D charges, the input capacitance increases and the slope of V s is reduced. V s continues to G  D  D  fall and the MOSFET traverses from the saturation region to the ohmic region (T4). Once V  D S  enters the ohmic region, VGS becomes undamped and continues its rise to the maximum gate voltage ( V ) . V s completes its drop to VDS(ON). The MOSFET's final on-state voltage is equal G G  D  to YDS ON) DS ON=I  (  XR  () 65  Chapter 6 Semiconductor Switches  Figure 6-7 The gate's current path  78  79  Chapter 6 Semiconductor Switches  VDS  and IDS  Leakage Current ND  Gate Charge b)  •  Crossover Power Loss  | p  Gate Charge c)  G ate  •  Voltage  VGG  - - - --y-  , _^  ?  V'T H  . /  T Tl  QGD  <^  n^^  ^  VOL)  Gate Charge T2  T3  T4  Figure 6-8 MOSFET turn on behavior  T5  ^  ^  •  M A X  Chapter 6 Semiconductor Switches  80  6.6.2.3 Power Dissipation due to cross conduction The following equations are derived from Figure 6-8 (a). The cross conduction can be determined from geometry of V  D D  and I c D  CROSS ~  2  r  V  J ' sw  /  0 0  The time duration T2 or T3 are a ratio of the charge and the gate current. Subscript x represent either T2 or T3 such that T =j^.  (67)  x  '•GATE  Substitute of (67) into (66) _  P  CROSS ~  V  D D  X  I  (Qi+Qi)  D D  ~j  r  f  J sw  (68)  ^•l GATE  The values of Q2 and Q3 are unavailable from the gate charge plot. However, after time interval T 4 , VDS « VDS(ON)-  Thus, an approximation is QCROSS  QGS  =  QGD-  Conduction occurs twice per period and (68) becomes p _ VDP CROSS ~  r  X  IDP JQcROSS ) f j J SW  /  7  r  .  N  'GATE  Equation (70) indicates that the best way to reduce the crossover loss is to increase IDRIVE and supply the largest amount of gate charge possible in the shortest time. When Switch 1 turns on, the high side M O S F E T begins to conduct current from 0 A to (I c-AI ). Thus, I D for switch 1 is D  I  D D  =I  d c  -M . L  L  D  (71)  Likewise IDD for switch 2 is 100=1*+^.  (72)  Chapter 6 Semiconductor Switches  81  6.6.2.4 Total MOSFET Loss Finally, the MOSFET's total power loss is the sum of the switching and conduction losses ^TOTAL  V  D P  TOTAL  X  I DP j.  X  ~  ^CROSS  ^CHARGE  ~*~ ^COND  (73)  QcROSS ,{-) y fsw+RDsoXlrJ*D(\ ^^LTOT'GS  LATX  +  (74)  * DRIVE  6.7 High Side Losses (Switch 1) When switch 1 conducts, PTOTAL becomes CROSS  TOTAL  +  QTOT  ^GS  fsw + R „  ) x D(\ + ATj). 2  DSo  (75)  PRIVE  6.8 Low Side Losses (Switch 2) The low side switching losses are less than the high side because the voltage across SW2 is equal to the smaller diode drop across it ( V ) F  V  F  x{l  d  c  +I, )xQ L  CROSS  TOTAL  +  QTOT  ^GS  fsw  +  R-DSon (/siV2rms  ) (l + ATjX\-D). 2  (76)  6.9 MOSFET Selection To suit a range of applications, MOSFETs are available with numerous ratings. To match the optimal device for the sea lion project, the entire product line of International Rectifier's TO220, 55 V MOSFETs are analyzed. For each device, the following parameters are entered into a spreadsheet:  QTOT, QCROSS, V F  and  RDSOIV Using  the high side and low side equations, the losses  are calculated at the P V ' s maximum operating point. Table 18 provides the testing parameters. The results for the top 13 most efficient MOSFETs are shown in Table 19. The IRFZ46Z MOSFET is determined to have the best efficiency for SW1 and SW2. Even though it has a relatively higher Roson, its low input capacitance makes it suitable for this application.  Chapter 6 Semiconductor Switches  82  Table 18 Operating parameters at the P V ' s maximum power point Parameter  Units 0.1 A 4.2 A 2.9 A  AIL IDC  Ipv Swl l Sw2 l V Duty: Frequency V Gate drive current AT (temp coefficient)  3.49 A 2.34 A  r m s  r m s  R M S  RRNS  17.3 V 0.69 50 kHz 14.5 V 0.5 A 0.35  P V  G S  Table 19 MOSFET selection Product  RON  (mfl)  Max V Current (nC) (nC) (V) (A)  QTOT  Q4  F  Swi PcROSS (mW)  S PcROSS (mW) W 2  PcHARGE  (mW)  Swi PcOND (mW)  S\v2  Swi  S\v2  PcOND (mW)  PTOT  PTOT  (mW)  (mW)  IRFZ46Z  13.6  37  17  51  1.3  120.67  9.51  26.83  154.44  31.17  301.93  67.51  IRFZ44Z  13.9  37  17  51  1.2  120.67  8.78  26.83  157.84  31.86  305.33  67.46  IRFZ48Z  11  62  22  61  1.3  156.16  12.31  44.95  124.91  25.21  326.02  82.47  IRLZ44Z  13.5  85  18  51  1.3  127.76  10.07  61.63  153.30  30.94  342.69  102.64 128.25  IRL3705Z  8  130  28  75  1.3  198.74  15.66  94.25  90.85  18.34  383.84  IRFZ44N  17.5  55  24  49  1.3  170.35  13.43  39.88  198.72  40.11  408.95  93.41  IRFZ46N  16.5  65  25  53  1.3  177.45  13.98  47.13  187.37  37.82  411.94  98.93  IRFZ48N  14  70  30  64  1.3  212.94  16.78  50.75  158.98  32.09  422.67  99.62  IRF1010Z  7.5  80  40  75  1.3  283.92  22.38  58.00  85.17  17.19  427.09  97.57  IRLZ44N  22  81  20  47  1.3  141.96  11.19  58.73  249.82  50.43  450.51  120.34 112.84  IRF1010N  11  90  40  85  1.3  283.92  22.38  65.25  124.91  25.21  474.08  IRF3205Z  6.5  100  50  75  1.3  354.90  27.97  72.50  73.81  14.90  501.21  115.37  IRFZ34N  40  30  5  29  1.6  35.49  3.44  21.75  454.23  91.68  511.47  116.88  Chapter 7 Circuit Implementation and Evaluation The base station is digitally controlled using the low cost, Microchip's 18F2510 microcontroller (PIC18F.) The controller has a nominal clock speed of 20 MHz. However, to minimize power consumption, it operates at a reduced 4 M H z . The PIC18F's power consumption increases at a higher operating frequency and at a larger voltage supply. Consumption also varies over temperature, but this relationship is nonlinear. The microcontroller will only consume 44mW, with no peripherals, operating at its maximum limits of: 5.5 V , 20 MHz, at 85 °C. At half the clock speed, the power drops by 40 %. The power supply's schematic is shown in Appendix B . Voltage measurements are sensed using the PIC18F's analog to digital (A/D) converter. Ten input channels are multiplexed into one A / D . To maintain accuracy, the A / D uses a dedicated voltage reference (4.096 V) supplied by the LT1461 precision regulator. When necessary, a resistive network scales down the voltage measurement between 0 V to 5 V . To minimize power loss, the resistive values are large. A n ultra low power, CMOS buffer is placed in series to provide a low impedance for the A/D converter. Currents are converted to a voltage signal using a 10 mQ, film strip, 0.5 W, 1 % resistor. The MAX472 is a bi-directional amplifier used to magnify VSENSE- The amplifier has a gain of 100 with an approximate 2 % error at 2.9 A . The amplifier is unique because it can sense bi-directional current with one power supply, yet avoid the penalty of lost resolution. The amplifier has two outputs, a voltage proportional to the current's magnitude and a sign pin. The base station's internal climate is monitored using the AD7414 digital temperature probe. The system is designed to have an operating temperature range that exceeds the outside climate. However, i f the base station's internal temperature surpasses its normal operating range, the system enters sleepmode. The temperature probe communicates with the microcontroller via the I C protocol and offers a one shot temperature measurement with 15 LIW power consumption during idle state. With the exception of the battery and capacitor storage bank, all the circuit's components used in the base station are capable of operating from -40 °C up to 125 °C with low drift.  83  Chapter 7 Circuit Implementation and Evaluation  84  The primary function of the microcontroller is to monitor and control the energy flow from the solar panel to the load. The system is capable of supplying on average 48 Wh per day. If necessary, the battery bank can provide very high power peaks. To minimize battery usage, power is supplied to the load using the following hierarchy: 1. PV panel 2. The capacitor bank 3. The battery bank This hierarchy is implemented into the microcontroller as shown in Figure 7-1. A controller is designed to operate the solar panel at its maximum power point. When the solar panel is unable to provide sufficient energy, the capacitor bank can supply 11.9Wh (42.8 kJ) of energy via a boost converter. Based on the power budget (section 2.6), this is 5.9 hours of continuous operation. When the PV's open voltage is larger than the battery's voltage, a maximum power point tracker attempts to operate the P V at its power knee. The microcontroller monitors the base station's power consumption and directs surplus energy into the storage bank. The battery's voltage and temperature are also monitored. As described in section 4.5.6, the microcontroller is capable of determining the battery's full charge voltage using a lookup table. When the battery reached its capacity, the excess energy is then redirected into the capacitor bank. The P V is shifted away from its power point after the capacitor bank is charged. The microcontroller regulates the P V to only supply the consumption energy. The maximum power point controller is discussed in the following sections.  85  Chapter 7 Circuit Implementation and Evaluation  Start up  Check Input Power (P)  Sleep Micropic  Check Load Demand (L)  Provide Load Power No  Yes  1  Provide Load Power  Check Cap SOC r  Measure Battery SOC No Check Battery SOC  Yes  Discharge Battery  No available | power Sleep PIC18F  I Figure 7-1 Microcontroller state diagram  Provide Load Power  Chapter 7 Circuit Implementation and Evaluation  86  7.1 Maximum Power Point Tracker A maximum power point tracking (MPPT) improves the solar panel's output power by operating the panel at its knee point on the V-I curve (section 3.4.) The optimum power point is achieved because the converter attempts to match the load's impedance at the solar panel's power point. There are many different techniques to establish the power point and the base station utilizes a digital controlled, hill climbing method. 7.1.1 Implementation of the Hill Climbing MPPT The tracker is a synchronous, buck type, dc/dc converter that is digitally controlled using the PIC18F. The MPPT's functional diagram and control loop is shown in Figure 7-2. The search routine is implemented by changing the duty cycle at a fixed step interval. At each step change, the controller compares the P V ' s output power before and after the iteration. From Figure 3-2, the power point for a P V can be estimated at approximately 78 % of its open voltage. This is not the exact location but a good starting point (VSTART) for the tracker to begin its search. The duty cycle of the P W M applied to the dc/dc converter is set to 0 % and the PV's open voltage (VOPEN) is measured. The duty is then calculated by measuring the battery voltage V ATT- The following B  equation is used to determine the starting point "START  Q  7  \J.  S  x  •  V  I O A V  o  p  E  VI)  N  The MPPT is designed to operate in the continuous mode. The following table describes the nominal operating conditions for the MPPT. Table 20 Nominal operating conditions Symbol  Definition  Value  Ipp v  maximum power point current  2.9 A  maximum power point voltage  17.3 V  VOPEN  open voltage  21.8 V  WMAX  maximum power yield  50 W  VBATT  nominal battery voltage  12 V  D  duty @ maximum power point  69.3 %  P P  87  Chapter 7 Circuit Implementation and Evaluation PV PANEL MPPT  ^rC„  V,IN  V  0  'BATT PIC18F  i  i P W M ! Duty i Generator f  7  0  !  Controller (dP/dV=0?)  - V ,REF  Solar Panel  Controller Duty VsTART ^ D —  A  w  G  W  IBATT  ^.  i  Figure 7-2 MPPT functional diagram and control loop  7.1.1.1 The P-VandP-D  Curve  The maximum power point (MPP) is located on the power-voltage (P-V) curve in Figure 3-2 when (78)  dP_ = 0. dV The microcontroller searches for the power point by changing the duty cycle of a P W M generator that drives the MPPT. The P V s output power is P(V ) = V I . PV  PV  PV  (79)  Where: Vpy — PVs output voltage PPV = PVs output power Since the duty cycle is a ratio between  VBATT  and Vpy BATT  D  (80)  V PV  By rearrange the duty cycle equation y  _  v  'BATT  D  (81)  88  Chapter 7 Circuit Implementation and Evaluation and substitute (81) into (79), the P(D) is a function of P(D) =  ^ ^ .  V  ( 8 2 )  To determine i f only one maximum peak exist on the power-duty (P-D) curve, the P-V curve can be modeled using a simple parabolic approximation having the function P(V )^-l[V ~A ] +A .  (83)  2  PV  PV  x  2  Where A i and A are constants. Equation 83 has one maximum point at 2  dP,PV dV  PV  0^-2[V " L  PV P  V  -4]*0 "  V «j-.  (84) (85)  py  The P-D is modeled by substituting (81) into (83) p(D)*-[^-Ar A . +  (86)  2  Equation 86 has one maximum point at dPpy dD  w  Q  (8V)  pv  - 2 [ ^ - 4 ] * 0  D*-^ZZL.  (88)  (89)  A For battery charging applications, the MPPT's output voltage can be assumed constant. Thus, only one solution satisfies (88) D^—-  A The P-D curve has one maximum peak. It is shown in Figure 7-3 [51].  (90)  89  Chapter 7 Circuit Implementation and Evaluation  Maximum Power Point AD  0%  Duty Cycle  100%  Figure 7-3 Photovoltaic P-D curve 7.1.1.2 Step Size The MPPT is discrete because the controller has a step size with a finite resolution. This is a limitation since the power point may exist between the incremental steps and (78) will not be satisfied. However, (78) can approach zero i f the step size (AD) is small enough. When AD « 1 then dP(D) _ P(D)-P(D-AD) d(D) ~ AD  )  Q  (91)  Since VBATT is assumed constant then the P(D) function can be written in terms of the battery's voltage and current P(D) = I (D)xV . BA7T  (92)  BA7T  Thus, by substituting (92) into (91), the battery's charging current can be used to directly control the duty cycle «  VBATT P )  ~ I BATT CD  -  AD)]  -»  0.  (  9  3  )  The microcontroller's P W M operates at 50 kHz and has a resolution of 62.5 mV. This enables AD = 1.25 %. Since the size is small, the controller can locate the power point within a reasonable proximity. The MPP is found when the following condition is valid I (D-AD) BATT  <I (D)<I (D BArT  BA1T  + AD).  (94)  90  Chapter 7 Circuit Implementation and Evaluation 7.1.2 MPPT Logic Figure 7-4 shows the logic flow for the MPPT algorithm. As mention in the previous  sections, the hill climbing start position begins at 78 % of VOPEN- The controller then seeks out the knee's true position by increasing the duty at fixed increments of 1.25 %. Start  Duty = 0 Sense VOPEN, VBATT Calculate Duty @ 78% VQPEN  YES  Set Duty Reverse = 0 Incr = 0  Sense I ATT B  NO  Duty = (Duty + AD)  AD = -AD  NO Sense  Incr++  4  YES tL<r  I TT BA  > T A n v K NO, IBATT ^ 1BATT(1>AJJ) ! j>———• m  5 min delay Return to Start Figure 7-4 MPPT logic flow  Found++  YES  Chapter 7 Circuit Implementation and Evaluation  91  At each increment, the controller compares the change in power by measuring the battery's current before and after the step change. If the current increases, then the controller continues to track in the forward direction. If the current decreases as the duty increases, then the MPP is in the opposite direction. The controller will reverse direction by decrementing the duty cycle (AD = -AD.) Regardless of the tracking direction, the controller is searching along the P-D curve in Figure 7-3. Eventually, it will reach the power point. However, based on (94), the controller can not determine the maximum point unless it compares the change in current with the next step. If the controller is truly at the MPP, then the new current measurement is less. Equation 94 becomes valid and the controller knows it found the peak. Equation 94 assumes that the solar insolation remains constant throughout the tracking process. During each tracking interval, three situations can cause (94) to become valid: 1. The tracker found the MPP 2. A false reading caused by noise 3. The solar insolation has changed To ensure the M P P is found, when (94) becomes true, the controller is programmed to reverse direction and continue the iterations. If the tracker is truly at the MPP, then based on the logic, at this location, it will oscillate ±AD. The MPPT is designed to oscillate several times to insure that it is at the maximum (Reverse = Found.) If noise caused a false reading or if the MPP has changed, then the controller will not oscillate and it will reorient itself and continue to track the maximum power. To minimize noise errors, the battery's current is measured by averaging 16 samples. To approximate (78), the step size is minimized. However, during tracking, when the MPP shifts, the small step size increases the time to find the power point. Therefore, there is a finite number of iteration. If the statement: (Incr = M A X ? ) becomes TRUE, then the system resets itself to establish a new starting point closer to the peak. Figure 7-5 is a simplified demonstration of the MPPT searching in the forward direction. To observe the MPPT operation, the searching point and step size are exaggerated for clarity. The step size is represented by the asterisk (*). In reality, the step size is much smaller and the starting point closer to the knee. The solid black dot represents the power point. It is not necessarily located the middle of the step size.  92  Chapter 7 Circuit Implementation and Evaluation  Solar P a n e l ' s Current V e r s u s Voltage c cu  Reverse=Found?  I  O  V o l t a g e (V)  Figure 7-5 MPPT illustration Step 1:  VOPEN and VBATT  are measured. The searching point is determined as 7 8 % of VOPEN and the duty is set.  Step 2:  IBATT  Step 3 :  IBATT is  Step 4:  IBATT is  is measured. The duty cycle is incremented by AD = 1.25 % .  measured and compared to step 2 . IBATT > [IBATT - AD] = TRUE. Increment duty. measured and compared to step 3 . AD] = F A L S E . Decrement duty.  IBATT > [IBATT -  Step 5:  IBATT is  measured and compared to step 4. IBATT > [IBATT - AD] = True. [Reverse=Found] = True? Yes stop. No, increment duty and goto step 4.  7.1.3 Input Capacitance The MPPT's draws input current in rectangular pulses. The chopping waveform causes the PV panel to shifts on its 1-V curve. To stabilize the system, a capacitor in parallel with the supply minimizes the voltage ripple and reduces peak current drawn from the input. The following sections determine the capacitor's R M S current and the minimum value to reduce the input voltage ripple to 0.5 % of V . P P  93  Chapter 7 Circuit Implementation and Evaluation 7.1.3.1 Input Capacitor's RMS Current  Calculating the input capacitor's rms current (Icrms) is necessary to prevent failure from internal heating within the device. The following figure is a plot of the capacitor's current during one period.  Ir i  Ipp  T  DT :  T  S  AT  s  Ih+Al IL-AI  Figure 7-6 The input capacitor's current plot The capacitor's current is defined as follows \ -\ +L\l PP  L  for 0 < t <DT  S  1 - - *  V  sJ  DT  for D T < t < T S  (95) s  \}PP  Using (18), the capacitor's R M S current is calculated as f  I Crms  1  L  P  Al — 2  22  l p +D\ l -2l l + PP L  (96)  V  Substitution of I, = — into (96) gives D 1-7J Crms  •pp  D  AIxD +•  (97)  Placing the variables from Table 18 and Table 20 into (97) yields I  = 2 9'  1-0.69 0.69  0.1x0.69  = 1.95,4  .  94  Chapter 7 Circuit Implementation and Evaluation 7.1.3.2 Input Capacitance Value The input capacitor's minimum value is found from the following equation C  ^  W  IN  A  = I.  (98)  T  Rearranging (98) yields IxAT C = — •  (99)  w  From Figure 7-6, AT is the duty cycle's off time A T ~ ~ ~ P1 {  A  l  D  )  T  sw  '  (100)  When the high M O S F E T is off, the capacitor's current is a constant source supplied from the solar panel ! = The voltage ripple is 0.5 % of Vp  (101)  P  A F = 2x 0.005 xV .  (102)  PP  Substitution of (80), (100) and (102) into (99) yields lOOx\ m  YBATT\  PP  v F  V  ' PP SW  v  1 0 3  )  ' PP  1  Placing the variables from Table 18 and Table 20 into (103) gives a capacitor value of r  Cm-  ^ 100x2.9 17.3x50*  n  (!  12 17.3  ) = 103 juF.  (]r)A\  l i U 4 j  The minimum amount of capacitance to maintain a 0.5 % voltage ripple is 103 uF. However, a 103 uF capacitor is only rated up to 500 m A  rms  . Thus, to provide sufficient power  dissipation and to be conservative, two 470 uF aluminum electrolytic L X Z capacitors are placed in parallel with the P V panel. The L X Z series are extremely low impedance capacitors designed for switch mode power converters. Each component is rated at 63 V and can handle 2090 m A current (@100 kHz) [52]. The total input capacitance is 940 uF.  r m s  95  Chapter 7 Circuit Implementation and Evaluation 7.1.4 Settling Time  Both the MPPT's input capacitance and the output inductance reduces the system's response time. For each duty cycle change, the MPPT must wait for the system to settle. At the maximum power point, the system's impedance matches the P V s output impedance R =^PP  = 6Q  I  (105)  PP  The input capacitors' time constant is calculated as T = RxC = 940xlO~ x6  = 5.64 ms.  6  c  (106)  The inductor's time constant is '  9 4 0 x l 0 T l  =  L  /  R  =  i  6 =  .  (107)  51fls  6 The capacitor has a larger effect on the setting time (t ). The settling time is calculated using s  the following equation 5r(V ~V ) A  .  C2  0° )  '  V  A  8  Where Vci is the initial capacitor voltage and V 2 is the final capacitor voltage. The step size C  can be written as AD= ~ . {Vci  (109)  Vc2)  Therefore, during tracking when AD = 1.25 %, the minimum tracking setting time is t > 5r x AD s  t > 5x1800/^x0.0125 = \\2.5/JS.  ( 1 1 0 )  s  At each iteration, the MPPT must wait at least 112.5 ps for the system to settle. At the starting point, the P V s open voltage is: 21.8 V . 5T(VC.  ''  a  ~VC ) 7  k  5xl800xl0" x(21.8-0.78x21.8) 6  t> 21.8 The settling time for the starting point is 2 ms.  <  , = 2ms.  n  i  )  Chapter 7 Circuit Implementation and Evaluation  96  7.1.5 MPPT Discontinuity In case of low insolation, the converter may enter the discontinuous conduction mode. The MPPT still attempts to find the power point. However, the system is designed for continuous operation and the optimal power point may become difficult to achieve.  To improve the  converter's efficiency, a synchronous converter is used in the MPPT. If the converter becomes discontinuous, the reversal current drawn from the battery can destroy the low side MOSFET. Thus, the MPPT circuitry has the ability to sense when the inductor's current reaches zero. The MAX472 current sensor has a sign pin that indicates the current's direction. When current in the inductor is zero, the pin latches low, triggering an interrupt within the 18FPIC. The low side MOSFET is then disabled. During the next cycle, the microcontroller will reset the interrupt so that the low side MOSFET can turn on when the high side turns off. The MPPT converter uses the inductor discussed in section 5.4. In case the duty cycle approaches 100 %, the MOSFET driver has a built in internal charge pump for dc operation and can provide a continuous high side state. This is also convenient for comparing the power difference between enabling the MPPT and connecting the P V directly to the battery bank. 7.1.6 MPPT Result In this P V application, the direct duty cycle controller simplified the tracking system. Since V ATT B  is constant, this type of hill climbing method can be applied. The system  automatically accounts for the effects of temperature and irradiation variations because the power is tracked while the P V panel operates. The hill climbing technique does have several disadvantages: slow tracking, finite step size, oscillation around the M P P and sensitivity to noise. However, the algorithm used to control the converter is designed to minimize these limitations. The following figure compares the difference between operating the BP350 P V panel at its power point, versus, connecting it directly to a deep cycle, 12 V G E L type battery. It is observed that the MPPT increased the output power by an average of 20.1 %. It is worth mentioning that this improvement is not a constant. It is dependant on the P V ' s output power and the battery's voltage. These variables are not fixed and can shift dramatically due to a change in load, battery voltage, temperature and/or insolation. The converter's circuitry is designed for efficiency. Switching components operate at a low frequency and are optimized to reduce loss. The converter's efficiency is measured at  Chapter 7 Circuit Implementation and Evaluation  97  96.3 % in synchronous mode and 93.4 % when the low side MOSFET is disabled. This achievement is the result of properly selected MOSFETs, a well designed inductor and the implementation of low power, microcontroller based circuitry.  - MPPT 0)  — Direct Connection  o  »-—. CD CO  :00 AM 11:30 AM 12:00 PM 12:30 PM 1:00 PM  1:30 PM  2:00 PM  Time (hrs)  Figure 7-7 The BP350's performance using the MPPT  7.2 Implementation of the Capacitor Bank dc/dc Converter The converter's theory is explained in chapter 5. As mentioned the capacitor's energy bank stores up to 11.9 Wh (42.8 kJ) of energy and operates between 4.5 V and 14.5 V. The functional diagram of the converter's controller is shown in Figure 7-8. The functions are structured as follows: Voltage limiter:  Maintains the capacitor voltage between 4.5 V and 14.5 V  Current limiter:  Provides the current's hysteresis band that regulates the current from 400 mA to 5 A  Current sense:  Outputs a voltage as a function of the capacitor's current  MOSFET driver:  Synchronous MOSFET gate driver  Direction controller:  Controls the capacitor's energy flow as an input or an output  98  Chapter 7 Circuit Implementation and Evaluation High MPPT  PV P a n e l  (jP  Side  VBATT{t)  I_  1  Low  ~7x X ? t  Voltage Limiter  0  600u  r*h  :  Side  A T )  Vcap  450F  MOSFET ^ Driver  i4)  Vmi  Direction Controller  Vcap(v)  —j Fo r w a r d = 0 Backward=l  Vmax(!)  -r  '  i  ABS (I)  +  Current Sense I m a x /"+\  Hysteresis Current Limiter Figure 7-8 UltraCapacitor converter's functional diagram  To minimize components, the hysteresis current limiter and directional controller is integrated within the PIC18F. The microcontroller has an onboard comparator with a programmable inversion output. When the comparator output is in the noninvert mode, the dc/dc converter becomes a synchronous B U C K and the capacitor charges. When the inverter is enabled, the converter is in the synchronous boost mode and the capacitor discharges. The current is regulated by comparing the inductor's current to a reference value. A 100 mA ripple tolerance is added using positive feedback. voltage is calculated as follows  This is shown in Figure 7-9 (a). The reference  99  Chapter 7 Circuit Implementation and Evaluation  I REF Where I  (112)  I PV •I  = P V s Current  PV  ILOAD  Current from the battery to the load  =  The current through the inductor is controlled by means of a fixed hysteresis control loop shown in Figure 7-9 (b). The hysteresis width is the current ripple. The microcontroller calculates I F and generates a voltage representing I F using the AD5301 digital to analog RE  RE  (D/A) converter. The MAX472 current sensor provides a voltage signal directly proportional to the capacitor's current (ICAP)- The comparator compares the signal to IREF and generates a variable frequency. Using (29), the maximum frequency is calculated to be 50 kHz. a)  Invert 1 Nonlnvert 0  AD5301 D2A 'PV" 'LOAD ^  IN  OUT  MOSFET Driver  V(Current Sense)  b)  ILOAD  Fixed Hysteresis: 200mV  Figure 7-9 Capacitor current limiting topology and control loop The microcontroller's comparator has a response time of 600 ns and an offset voltage of 10 mV. The disadvantage of the hysteresis controller is that the current ripple is a function of the entire system's response time and not only the comparator. If the switching frequency is increased, the controller may become too slow. As well, the controller is sensitive to noise. Switching spikes or transients can cause premature triggering. Careful track layout is required to minimize the effect. Finally, the hysteresis band makes it incapable to operate at currents less than 200 mA.  100  Chapter 7 Circuit Implementation and Evaluation  Figure 7-10 is a measurement of the converter regulating a charging current at 1 A. Using the MAX472 sensor, the current's magnitude is displayed on channel 1. As mentioned, the waveform is a 1:1 voltage representation of the sensed current flowing through the converter's inductor. The current ripple is approximately 200 mA k_ kand has an averaged dc value of 1.04 P  P  A. The comparator's output is displayed on channel 2. This signal is the input source for the MOSFET driver. The comparator compares the current's waveform (CHI) to V R E F - 1 V . The reference voltage is programmable and enables the current to vary from 200 mA up to 5 A . When the comparator's output is high (5 V ) , Swi turns on and the current increases. At 1.16 A , the current reaches the upper hysteresis limit and the comparator goes low. Swi is disabled and Sw2 turns on. As the capacitor bank stores the charge, the current ramps down. The capacitor bank can charge up to 14.5 V . However, this upper limit depends on the battery's state of charge. Due to the MOSFET's body diodes, the capacitor bank can not exceed the battery's voltage. The spikes on (Chi) are switching noise coupled into the oscilloscope's probe. In the figure, the 1 A charging current is chosen because the current's ripple and dc average are clearly shown in one caption.  Current Sense from Max472 (Chi) 1= V  MOSFET Drive Signal (Ch2)  /MrTOWW' ' !""!'' T "! " ,  ,  ,  ,  M  • • GND  GND  C h i 200 mV  Ch2 5 V  M 10 (aS  Figure 7-10 The converter's current sense and drive signal at 1 A  101  Chapter 7 Circuit Implementation and Evaluation  In Figure 7-11, the converter is operating at the photovoltaic's maximum power current of 2.9 A (Chi). To capture a change in the capacitor's voltage (Ch2), a large time scale is required (500 ms/div). This resulted in under sampling and Channel l's measurement is not a true representation of the ripple frequency. However, the averaged current is accurate at 2.9 A .  VcAP (Ch2)  Current Signal (Chi) — 1=V GND  GND  Chi 1 A  Ch2 2 V  M 500 ms  Figure 7-11 The capacitor's converter operating in buck mode.  To discharge the capacitor, the comparator's invert bit is enabled and the waveforms shown in Figure 7-10 are reversed. The MOSFETs also exchange switching positions; Sw2 becomes the high side MOSFET. When the comparator's output is low, Swi is activated and the capacitor discharges its stored energy into the inductor. The inductor's current increases to the upper threshold of the hysteresis band causing the comparator's output to change state and engage Sw2- To maintain the current flow, the inductor is forced to boost its voltage and the energy is transferred into the battery. The inductor's current then ramps down to the lower limit and the cycle repeats. The system will discharge the capacitor to 4.5 V . Figure 7-12 is a caption showing the capacitor's decreasing voltage and its constant averaged current.  Chapter 7 Circuit Implementation and Evaluation  102  In theory, as long as the current is greater than the hysteresis band, the synchronous converter does not enter the discontinuous mode. However, at 200 mA, the converter will enter discontinuous mode causing a reversal in current. To avoid this problem, the current direction is monitored. This is captured on channel 3 of Figure 7-13. The measurements shown are in buck mode. When the current goes to zero (Ch2), the MAX472's sign pin changes state (Ch3.) The low side MOSFET is immediately disabled by engaging the high side switch (Chi.) There are two plots in Figure 7-13 because the oscilloscope used for measurements cannot save three waveforms per caption. To clearly indicate the zero crossing, the current is shown in both plots as Ch2. To avoid both MOSFETs conducting simultaneously, whenever there is a transition, the LT1158 driver follows a logical sequence to turn off one switch and turn on the other. When turn-off is initiated, VQS is monitored until it decreases below the turn-off threshold. Afterwards, the other MOSFET is turned on.  Chapter 7 Circuit Implementation and Evaluation  103  Figure 7-13 The discontinuous mode signal to prevent reverse current  7.2.1 Start Mode The MAX472 is chosen because it is a bidirectional sensor with a full scale output (0 V - 5 V) in both directions. The benefit is a good resolution, where the sensor's output is directly proportional to the hysteresis. B y connecting the M A X 4 7 2 to the ultracapacitor, the current in the inductor is sensed regardless which MOSFET conducts. However, the MAX472's  Chapter 7 Circuit Implementation and Evaluation  104  sensing pins must be 1.5 V higher than its output. Therefore, it can not measure the capacitor's charging current i f V <(l.5 + I ). CAP  CAP  (113)  The capacitor bank operates between 4.5 V to 14.5 V and at this range, the current sensor functions. Unfortunately, due to the leakage current, the situation arises when the capacitor bank must charge from a 0 V state. Below 4.5 V , the sensor's operation is problematic. Especially if the bank is fully discharged, then the sensor is rendered useless. A low duty cycle, open loop soft start was considered to charge the capacitor bank up to its operating voltage. With such a large capacitance value connected to the dc/dc converter, the output is effectively a short circuit. The current is limited only by the duty cycle and the converter's non ideal resistance. This resistance is small, estimated at 200 mQ. It is also temperature dependant. Therefore, a current sensor is also mounted onto the battery side. This sensor is only used during the start charge mode because its location cannot monitor the low side MOSFET. Synchronous mode is disabled when the capacitor's voltage is below 4.5 V . The MAX472's output pin is a high impedance current source that can be connected to other MAX472's output pins for current summing. When the converter is in the start mode, the current sensor connected to the capacitor is offline. When the convert operates normally, the battery's sensor is disabled and synchronous mode is enabled. 7.2.2 Capacitor Converter's Efficiency The efficiency of the capacitor converter is slightly less than that of the MPPT. The capacitor's converter is bi-directional and hysteresis controlled. It has extra circuitry and two sense resistors to regulate the current. These components contribute to the higher loss. However, the V I N of the capacitor converter is less then the MPPT which minimizes the additional loses. Using the operating conditions from Table 20, the capacitor converter's efficiency is measured at 95.4 % in synchronous mode and 92.1 % during soft start. 7.3 System Implementation As mentioned, the base station systems are controlled using the 18F2510 microcontroller. The controller's code is programmed in C language and complied using the CCS 18F complier. The code is included in Appendix C. Using the MAX232 IC, the microprocessor is interfaced to  Chapter 7 Circuit Implementation and Evaluation  105  a PC via the serial port. The microcontroller is fully automated. However, it is also configured so a user can manually control various systems. For instance, the M P P T can be enabled or disabled. Using the keyboard as an input device, the capacitor bank can be charged or discharged with any desired current between from 400 mA up to 5 A. The base station's input power (the P V supply) is also adjustable by entering a fixed duty cycle. As well, the PC enables the microcontroller to display real time measurements onto a monitor. This information can be saved to create plots such as Figure 7-7. In addition, the microcontroller is programmed to notify problems, such as a communication error with the temperature probe. Finally, the system can be connected to the satellite transmitter via the serial port. The base station's internal temperature, battery/capacitor state of charge and the amount of power generation or consumption can be remotely monitored or controlled via the duplex link. For prototyping, the power supply's digital controller, M P P T and dc/dc converters are constructed as shown in Figure 7-14. The microcontroller and its digital components are located on the breadboard. This digital controlling system operates on 5 V logic obtained with the MC4063 switch mode power supply (refer to schematic in appendix B.) During operation, the digital circuitry consumes  130 mW (the 5 V supply output current was measured at  Idc = 25.6 mA.) To minimize noise, the MPPT and converter's converter power circuitry (MOSFETs, drivers, low pass filters) are soldered onto a prototype board. The dc inductors described in chapter 5, are shown on the left of the photo. Next to the inductors is the serial port. The monitoring system and the energy banks are shown in Figure 7-15. A gel type battery with a lower capacity then specified in Table 14 was sufficient to test the power supplies ability to charge and discharge the battery bank. Similarly, a smaller capacitor bank (right side of photo) is also used for testing. The 450 F capacitance is too large for prototyping. To investigate the capacitor's dc/dc response at different states of charge, a 3 F capacitor bank provided quicker charge/discharge cycles. The smaller bank also permits the capture of the capacitor's voltage changing as shown in Figure 7-11 and Figure 7-12. The photovoltaic used for testing is shown in Figure 7-16. There are two 50 W BP350 photovoltaics in the photo. Only one is needed to provide the base station's power budget. The BP350 specifications are included in Table 5 of chapter 3. The PVs are located on top of the Macleod Electrical Engineering building at the University of British Columbia.  Figure 7-14 The power supply's digital controller, MPPT tracker and capacitor converter  Figure 7-15 The power supply with its energy storage banks  107  Chapter 7 Circuit Implementation and Evaluation  Figure 7-16 U B C ' s two BP350W photovoltaic panels In the final design, the total weight of the power supply is approximately 95 kg. The three PV30H lead acid batteries are the bulk weight (90 kg). The capacity bank weighs 4.5 kg. The storage banks can supply sufficient power for wild life monitor system for 10 continuous days. Component pricing is shown in Table 21. The total cost of the power supply is $1043 (Cdn). This amount does not include the base station's housing, transceiver or satellite phone. Table 21 Component pricing Component PV30H Battery Capacitor Bank BP350 P V Panel Microcontroller Inductor Additional Electronics (resistors, caps, semiconductors)  Price (Each, $ Cdn) 90 60 331 12 10 50  3 6 1 1 2  Total Cost ($ Cdn) 270 360 331 12 20  N/A  50  Quantity  Total:  $1043  Chapter 8 Conclusion The power supply is designed to be an autonomous system that provides the energy needs for a radio based, wildlife monitoring station. The purpose of this research is to extend the battery's service life and improve the base station's immunity to cold climates. In this thesis, two methods were used to accomplish the objective. The first undertaking was to extensively research, design and implement high efficient components to minimize battery demand. As a result, the PV, its electronics and the load are well matched for the application. The next task was to incorporate a battery/capacitor bank to store energy. B y integrating ultracapacitor technology to create a hybrid energy storage system, the battery cycling is minimized. The ultracapacitors can cycle hundreds of thousands times without of reduction in performance. Therefore, the capacitor bank is the primary energy storage system. When the renewable source can not supply sufficient energy to the electrical load the capacitor will discharge as the primary storage system. The battery bank is required i f the capacitor bank becomes depleted. When the energy in both storage banks becomes low, the base station enters a sleep mode until the renewable energy returns. The capacity of the energy storage banks depends on three factors: the base station's energy consumption, the duration that the banks must supply this energy and the amount of available solar energy. The power supply operates continuous throughout the year. It is designed to function even during the shortest daylight hours in December. From the project's description in chapter 2, the base station's power is 2 W averaged over a weekly window. Insolation data obtained for the coast of south Alaska and British Columbia determined that a 50 W PV (the BP350) provides sufficient energy for the base station. To compensate for intermittency in solar power, the storage bank are sized to deliver sufficient energy for 10 days, at a 25 % discharge limit, compensated to the lowest operating point o f - 3 0 °C. The power supply's output voltages are 12 V (V ATT) and 5 V . The 5 V supply is a constant voltage (±1 %) with a 750mA output B  current capacity. The 12 V is the unregulated battery's output voltage and can vary from approximately 10.5 V up to 16 V . This range depends on the battery's depth of charge and its temperature. If required, the bank is capable of delivering 100W of peak power. Based on  108  Chapter 8 Conclusion  109  climate data from Table 1, the base station is capable to operate between the temperatures o f 30 °C to 45 °C. Beyond this range, it enters the sleep mode state. Chapter three discusses photovoltaic systems. In this chapter, the equations to determine the tilt angle for maximizing the P V ' s aperture are derived. Equation 2 calculates the angle at a specific day of the year as a function of the P V ' s latitude. The angle is set in December to compensate the P V ' s output power for the month's short daylight hours. To further enhance the PV's output, an MPPT interfaces the solar panel to the battery bank. As described in section 7.1.1, when using a hill climbing tracking technique, measurements observed an improvement of 20 %. In chapter four, a detailed investigation into battery technology determined that a lead acid, gel type battery is the most practical solution for this application. The Dryfit PV30H 12 V battery is recommended. It is a deep cycle, marine grade battery priced at $90 (Cdn) from Federal battery (Appendix D.) It has a capacity of 95 A h and a five year design life. A higher quality gel battery, such as the Sonnenschein A400 is suitable for 12 years. It has the same equivalent capacity, but costs 2.5 times more. The base station requires three PV30H batteries for its storage bank. As mentioned, the bank provides sufficient energy for 10 days, at a 25 % discharge limit. As shown in Figure 4-4, this threshold extends battery life by minimizing damage from a deep discharge. The battery is capable of surviving a temperature from -45 °C to 65 °C. High efficient inductors are explored in Chapter 5. A theoretical model is developed to help optimize the core's efficiency. Using a spreadsheet, the model is applied to different core geometries. The resultant is a low loss inductor with a fixed 600 uH over the base station's operating temperature range. When connected to a buck converter, at 3.7 A , with a 50 kHz switching frequency, the measured losses are 142.32 mW. As shown in Figure 5-6, the inductor can handle up to 6A before saturating. In chapter 6, an investigation of MOSFET technology is conducted. The losses of the MOSFET in a buck converter topology are analyzed in great detail. The switching behavior is studied and equations modeling the high side and low side losses are derived. Similar to the previous chapter, the equations are inserted into a spreadsheet and the entire product line of International Rectifier's TO-220, 55V MOSFETs are analyzed. Using (75) and (76), the losses  Chapter 8 Conclusion  110  are calculated at the solar panel's maximum operating point. The IRFZ46Z MOSFET is determined to have the best efficiency for the high and low side switch. Using the components shown in the schematic (Appendix B) a system is designed to hybridize the ultracapacitor bank and battery bank. The PIC18F2510 microprocessor controls the MPPT and monitors the energy flow. The ultracapacitor bank is decoupled from the battery bank by a dc/dc converter. This allows the capacitor bank to have a variable voltage range of 4.5 V up to 14.5 V. The capacitor's converter is hysteresis current limited. The converter avoids discontinuous mode by monitoring the current direction using the M A X 4 7 2 current sensor. Once the current attempts to fall below the zero crossing, the high side M O S F E T turns on preventing a reverse current flow. The capacitor's converter efficiency is measured at 95.4 % for synchronous and 92.1 % in soft start. However, the converter uses additional components to regulate the current, thus, its power loss is slightly more than the MPPT. The MPPT's efficiency is 96.3 % in synchronous mode and 93.4% when the low side MOSFET is disabled. Nonetheless, both converters are very efficiency due to properly selected MOSFETs, a well designed inductor and the implementation of low power, microcontroller based circuitry. In this project, it is possible to construct the energy storage entirely from ultracapacitors. However, ultracapacitor technology is expensive and for a given physical size, batteries hold more energy. The major drawbacks of capacitors are their relatively low energy density and high purchasing price. As a result, the storage capacity is largely limited by its economical cost. To maintain an inexpensive base station, the capacitor energy storage bank can only contain a module of six Maxwell PC2500 capacitors. This capacitor module provides an energy supply of 11.9 Wh (42.8 kJ.) Since the base station operates at 2 W, the capacitor bank can provide 5.9 hours of operation. Presently (2006), the capacitor bank costs $360 (Cdn.) However, capacitors contain inexpensive materials and require less resource to manufacture than batteries. As the ultracapacitor technology progresses, the cost is steadily declining, dropping more than half every two years. In 2001, a Maxwell PC2500, 2700 F (2.5 V) capacitor cost $600 (Cdn) per cell. Today each cell cost $60 (Cdn.) While researching this project, Maxwell introduced an improved product and outdated their PC2500. The new MC2600 capacitor is physical smaller, offers less leakage current, a higher threshold voltage, and double the guaranteed cycling life (one million cycles.) Therefore, as ultracapacitor technology advances, the economical limitation is decreased and the dependency for batteries in this type of application is also reduced.  Chapter 9 Future Work  111  Chapter 9 Future Work At the present time, the power supply is a working prototype. It operates successfully at ideal conditions where the system's efficiency is compared to theoretical values. However, testing the power supply at its temperature extremes has not been performed. Although the design has accounted for temperature effects, long term usage and aging, the system has not operated under these conditions. Furthermore, the watchdog timer in the microprocessor is disabled for prototyping. After testing, it is recommended to enable this function as a safety feature. The reverse shoot through current that occurs in discontinuous mode of the synchronous converters is controlled via software interrupt. To improve reliability, protection should be hardware dedicated. The fuses connected to the positive terminals of the storage banks do provide short circuit protection, however, additional active short circuit protection is considered for future work. Implementing this system using the 18F2510 microcontroller was an alternative design approach. Although this microcontroller can perform most of the tasks, external components such as digital to analog converters, comparators, op amps and voltage regulators were required for additional functions. Migrating into DSP technology is an improvement since these functions are integrated in one package design. To conserve energy, idle components should enter a sleep mode. For instance, the temperature probe is programmed as a one shot measurement. It then goes into a low power, inactive state. Most of the integrated circuits selected for this project have a logic shutdown pin. An algorithm from the microcontroller can be designed to engage this feature. Components without this function can be upgraded by having logic M O S F E T switches connected between their power pin and the dc bus. The equations that predict the MOSFET losses are only derived for the buck topology. Even though the capacitor's converter is low loss, the equations do not account for operation in boost mode. Modeling the MOSFETs for this condition could reveal a method to improve efficiency. A n enhanced topology for the capacitor's converter is also suggested. The converter's hysteresis controller is prone to noise and the hysteresis voltage thresholds make it ineffective at currents less than 400mA. The switching speed is also limited by the controller's response time. If the switching frequency is increased, the controller becomes too slow. For future work, a  Chapter 9 Future Work  112  charge pump system is considered as an alternative topology. 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Maksimovic, Fundamentals of Power Electronics, Second Ed, Norwell, Massachusetts: Kluwer Academic Publishers, 2001  [39]  N . Mohan, T. Undeland and W. Robbins, Power Electronics Converters, Applications and Design, Toronto: John Wiley & Sons Inc., 1995  [40]  L. Dixon "Magnetics Design for Switching Power Supplies" Texas Instruments, Course Material, 2001 March 15, Dallas Texas  Bibliography  116  [41]  G. Slemon and A. Straughen, Electrical Machines, Toronto: Addison Wesley Publishing Company, 1982  [42]  Magnetics Inc, "Ferrite Core Design Manual 2004," Materials, pp 3.1 3.11 (2004), [2005] Available at: http://www.mag-inc.com/ferrites/ferrites.asp  [43]  T. Eichson, "Estimating Inductor Losses Easily in Power Supply Designs," Power Electronics Technology, April, pp 14-24, 2005  [44]  J. Takesuye and S. Deuty, "Introduction to Insulated Gate Bipolar Transistors" Motorola Semiconductor Application Note A N 1541, Motorola  [45]  Philips Semiconductors, "Introduction to Power Electronics," Philips Semiconductors Applications ,Hazel Grove, 1994  [46]  D. Tulbure, "Introduction to Power Mosfets" Micronote Series 901, Microsemi Santa Ana  [47]  International Rectifier, "LRF3707z Datasheet," Hexfet Power MOSFET, International Rectifier, E l Segundo, California: (2003), [2005] Available at: http://www.irf.com/product-info/datasheets/data/irG707z.pdf  [48]  Maxim, Dallas Semiconductors "Power Supply Engineer's Guide to Calculate Dissipation for MOSFETs in High-Power Supplies" Electronic Design, Penton Media, October 2002.  [49]  Microchip Technology Incorporated. "Driving Power MOSFETs in High-Current, Switch Mode Regulators," AN786. (2002), [2005], Available at: wwl.microchip.com/downloads/en/AppNotes/00786a.pdf  [50]  International Rectifier, "IRF3305 Datasheet," Hexfet Power MOSFET, International Rectifier, E l Segundo, California: [2005] Available at: http://www.irf.com/product-info/datasheets/data/irfl010z.pdf  [51]  W. Xiao and W. Dunford, " A Modified Adaptive Hill Climbing M P P T Method for Photovoltaic Power Systems." Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual Volume 3, 20-25 June 2004, pp.1957 - 1963 Vol.3  [52]  United Chem-Con, " L X Z Datasheet," Miniature Aluminum Electrolyte Capacitor, Illinois: [2005] Available at: http://www.chemi-con.com/files/LXZ0703.pdf  Appendix A Base Stations locations Table 22 Base station locations Location Longitude Carmanah Point -124.78157 Mara Rock -125.48500 Long Beach -125.72028 Raphael Point -126.23527 Barrier Islands -127.53250 O'Leary Islands -127.65472 Solander Island -127.94472 Cape Scott -128.42195 Maggot Island -128.78778 Beresford Island -128.77167 Sartine Island -128.90500 Triangle Island -129.08444 Ashby Point -127.92333 Virgin Rocks -128.20667 Pearl Rocks -128.00305 Gosling Rocks -128.46638 Mclnnes Island -128.72362 Steele Rock -129.37361 Ashdown Island -129.21889 North Danger Rocks -130.34723 Bonilla Island -130.62138 Reef Island -131.48500 Cape St. James -130.99194 South Tasu Head -132.08055 Moresby Islands -132.36528 Cone Head -132.72417 Joseph Rocks -133.13333 Langara Island -133.02444 Anthony Island -131.24445 Warrior Rocks -130.85333  Latitude 48.61624 48.88139 49.04250 49.31389 50.02056 50.10389 50.11972 50.78611 50.80305 50.79778 50.82195 50.87444 50.94806 51.28917 51.37194 51.87056 52.27083 52.47306 53.05972 53.25945 53.47694 52.87500 51.91861 52.70472 52.97667 53.38250 53.82306 54.26750 52.10556 54.07444  R1  560k 1%  53  a X!  00  W DB9  TO  PC  UART  3 P  rille  Size Dale:  Digital Controlling Circuitry  Document Number Sunday. January 22, 2006  }ev $heet  ol  2  Appendix B Schematic  119  >  C4  O  OJ  «q i q  0>  >>  F 3 o •fcj  o CM  £  co  0)  "O CU  o  H  E Q N  r-KCQLU +  m  ' + Di  gS8™  g  « + Q;  h- o;  CO UJ + U ) Q L L U ^ U 1 > Q  go°<"« g  [fl>fflUJLL±0[Il  mi—  v, Jan  U  o  Numb  H  wer  =q  1  •  Appendix C Software Code //18F2510 M I C R O C O N T R O L L E R #include<18F2510.h> llllllllllllllllllllllllllllllllllllllllllllllllllll FUSES llllllllllllllimiHIIIIIIIIIIIIIHIIIIIIIIIIIHIIIIII #FUSES NOWDT //No Watch Dog Timer //Crystal osc <= 4mhz #FUSES X T //Fail-safe clock monitor disabled #FUSES N O F C M E N #FUSES N O B R O W N O U T //No brownout reset //Brownout reset at 2.0V #FUSES BORV20 //Power Up Timer #FUSES PUT //Stack full/underflow will not cause reset #FUSES N O S T V R E N //No Debug mode for ICD #FUSES N O D E B U G //Low Voltage Programming on B3(PIC16) or B5(PIC18) #FUSES L V P //Program memory not write protected #FUSES NOWRT //Internal External Switch Over mode disabled #FUSES NOIESO //Memory not protected from table reads #FUSES N O E B T R #FUSES N O E B T R B //Boot block not protected from table reads //Master Clear pin #FUSES M C L R #FUSES NOPROTECT //Code not protected from reading //No Boot Block code protection #FUSES NOCPB //Boot block not write protected #FUSES N O W R T B //configuration not registers write protected #FUSES N O W R T C //Fail-safe clock monitor disabled #FUSES N O F C M E N /*PORTB pins are configured as analog input channels on RESET*/ #FUSES P B A D E N /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////  ///////////////////////////////////////////////////COmiGURATlOW/////////////////////////////////////////////// 11 AID #device ADC=10  //Analog to Digital lObit Resolution  //clock 4MHz #use delay(clock=4000000) //RS232 9.6kbs, No Parity, 8 bits #use rs232(baud=9600,parity=N,xmit=PrN_C6,rcv=PIN_C7,bits=8) //I2C #use i2c(MASTER, SDA=PIN_C4, SCL=PIN_C3) //USE FAST PORTA and PORTB (manual define) #use fast_io(B) #use fast_io(a)  120  121  Appendix C Software Code //FILES TO I N C L U D E #include <input.c> #include <stdlib.h> //DEBUGGING: /* Two options: - MPPTRECOPvD for testing and Debugging - N O R M A L for normal operation*/ #defme N O R M A L / / M E M O R Y ADDRESS M A P S / / C O M P A R A T O R C O N T R O L REGISTER INVERSION BIT //(controls the Capacitor Power Flow) #bit CM1CON0 = 0xFB4.5 //inversion bit for comparator 2 #byte C M C O N = 0xFB4 //comparator registry //PORTB B Y T E #byte PORTB =0xF81  iiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiniiiiiiiiiiiiiiiiimmm //ADC C H A N N E L S : #define B A T T _ C H A N N E L 11 #defme P V V O L T C H A N N E L 9 #define P V _ C U R R E N T _ C H A N N E L 1 #defme C A P V O L T C H A N N E L 8 #defmeVREF C A L I B C H A N N E L 3  //Battery's Voltage A D C channel //PVs voltage A D C channel //PVs current A D C Channel //CAP's A D C channel //VREF C A L I B R A T I O N C H A N N E L  //ON | OFF #defme OFF 0 #defineON 1 //CAPACITOR C H A R G E R #define CAP_SENSE PIN_C0 //Capacitor sense side enable pin #define B A T T _ S E N S E PLN_C5 //Battery sense side enable pin #define C A P D R I V E R P L N B 7 //Capacitor Driver enable #defme C H A R G E 1 //Capacitor charge direction (synch, discount) #define D I S C H A R G E 0 //Capacitor discharge direction #defme C O M P _ O N AO_A3_A1_A2_OUT_ON_A4_A5 //comparator enable pins #defme COMP_OFF N C _ N C _ N C _ N C //comparator disable #defme COMP2 PIN_A5 //comparator 2 OUTPUT PIN //INTERRUPT PINS #defme CAP_IPIN 5 //EPIN is #5 on PORTB, disables synchronous mode. #define C A P _ V P I N 6 //VPIN is #6 on PORTB, monitors cap voltage #defme C A P V O L T A G E O F F S E T 1.5 //Cap voltage must be 1.5 above current  Appendix C Software Code  122  //Delay Time #define S T A R T _ P O I N T _ D E L A Y 250 //250ms for charging/discharging input capacitor #define M P P T J D E L A Y 200 //200us for system to stabilize after a duty step change #define D E L A Y _ T I M E 1600 //Delay when displaying information onto the monitor //MPPT CONTROL DEFINITIONS #defme M P P T _ H U M P 0.78 //MPPT approximate: 78% of open voltage #defme I N T E R V A L _ V A L U E 1 //MPPT Scanning interval /*Stabilizes oscillation when MPPT is between the tracking interval*/ #define MPPT_FOUND 6 //power point oscillation amount #define LIMIT 80 // how many times to search when tracking MPPT  / / T E M P E R A T U R E C O N T R O L DEFINITIONS #defme T H E R M O 0b 10010000 //Thermo Address #define A V G _ M A X 8 //the M A X amount of measuring times to average the temp value //DUTY CONTROL //PWM 100% full on DUTY=(Value/80)* 100 Resolution is 1.25% #defme F U L L _ O N 80 /^Conversion Duty factor to change from D=100% to the up P W M , refer to notebook*/ #define Duty_Factor 80 / / C O M P A R A T O R INVERSIONS #defme C2INV 1 //Comparator 2 Inversion #define C2NON 0 //Comparator 2 Noninversion #define C1LNV 0x8 //Comparator 1 Inversion #define C1NON 0 //Comparator 1 Noninversion //DIGITAL to A N A L O G /* I2C D A C sensor (AD5301) Address: ObOOOllOOO*/ #DEFINE I D A C 1 ObOOO 11000 /* I2C D A C sensor (AD5301) Address: ObOOOllOOO*/ #DEFINE V D A C 2 ObOOO 11010 #defme RESOLUTION 256 / / D A C RESOLUTION (8bits) #DEFINE M A X _ O N 4 //fully turns on the D A C to highest voltage / / T E M P E R A T U R E PROBE /*I2C temperature sensor (MCP9802A0) Address: (0bl0010000)*/ #DEFINE T E M P P R O B E 0b 10010000 //ADC CONVERSION FACTORS #define P V _ F A C T O R 6 //resistor ladder: (160+800)/160 #defme B A T T _ F A C T O R 5 //resistor ladder:(160+640)/160 #defme C A P _ F A C T O R 4 //resistor ladder: (160+480)/160  Factor =6 Factor =5 Factor =4  123  Appendix C Software Code #define C U R R E N T F A C T O R 1 //Current sensor factor /*ADC FACTOR, (1023/4.096)=249.7558 (refer to L O G BOOK)*/ #define A D C _ F A C T O R 249.7558 #define R E F V O L T A G E 4.096 //REF VOLTAGE=4.096V #defme A 2 D M A X V A L U E 1023 //A2D maximum value lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll^ iiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiniiniimj^cTiomiiin void intialize_pic(); //initializes the pic void i2c_DAC_init(unsigned int dac); //initialize I2C D A C void i2c_temp_init(); //initialize the temperature sensor void clear_scr(); //clears the screen void calibrate_vref(); //calibrates A2D's Vref void read_temp(); //gets the system's temperature //gets the max voltage based on the system's temperature void get_bat_max_volt(); void hill_climb(); //hill climbing algorithms void read_battery_voltage(); //get the battery's terminal voltage void read_cap_voltage(); //get the cap terminal voltage void read_pv_voltage(); //get the P V voltage void read_pv_current(); //get the P V current //takes a A D C measurement and averages it 16 times unsigned long read_averaging(); void set_batt_duty(); //manual sets the P V duty cycle void DAC_Output(unsigned int dac, float value); //write to the I2C D A C void cap_menu(); //prints the cap charging menu options void print_menu(); //prints command menu to monitor /*sets the duty cycle, provides a delay for system to stabilize and gets the resulting power*/ float getjpvpower(unsigned long duty, unsigned int delay); void timerl_isr(); void cap_control(); /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////  signed int temperature; unsigned long pv_duty; unsigned long cap_duty; signed int interval; float max_volt; float batt_volt; float pv_current; float cap_current; float capjvolt; float pvjvolt;  //System Temperature //PV duty //CAP D U T Y //interval step size value //maximum battery voltage from temperature look up table //Battery voltage //PV current //cap current //ultracap voltage //PV panel's voltage  Appendix C Software Code unsigned intl6 timer_count; int vref_calib_offset; unsigned int control_state; int cap_direction;  124 //timer for MPPT //Vref offset value... how much off is V R E F from 4.906V //portb state //charging direction for capacitor  //PWM2 //Software P W M driven: Values for D2A conversion static B O O L E A N pinState; //checks the state //lookup table: battery voltage unsigned int batvolt_table[]={162, 161, 160, 156, 154, 151, 149, 147, 145, 143, 141, 139, 138, 137, 136, 135, 134, 133}; //lookup table: temperature signed int temp_table[] = {-40, -35, -30, -25, -20, -15, -10, -5, 0, 5, 10, 15, 20, 25, 30, 35, 40, 45}; char command; //keyboard input command IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIH IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIM  main() {  unsigned long value; char string[5];  //variable for keyboard commands  /^current temp variable, in case abort, don't want capacitor charge current to get value*/ float temp; delay_ms(100);  //delay startup for 100ms so peripherals can start up.  #ifdef N O R M A L clear_scr(); //clear screen #endif //print Microprocessor's name printf("\n\rWelcome to Majesus Bot, Microprocessor 18F2510\n\r"); #ifdef N O R M A L printfC'IN TESTING & PROTOTYPE M O D E W ) ; #endif initialize_pic(); //initialize pic print_menu(); //print menu to monitor //INTERRUPTS EXT_LNT_EDGE(0, H_TO_L); disable_interrupts(int_timerO); enable_interrupts(int_rda); enable_interrupts(int_rb); enable_interrupts(int_EXT);  //trigger high to low //enable timerO interrupt //enable keyboard input //enable portb interrupts //enable battery current interrupt  Appendix C Software Code control_state=portb; enable_interrupts(int_comp); clear_interrupt(int_ext); enableinterrupts(global); cap_direction=l; command=OFF;  125 //read portb before enabling interrupts //prevent battery current interrupt from false setting  //FOR M P P T R E C O R D TESTING #ifdef M P P T _ R E C O R D //display measurements to monitor printf("IN M P P T R E C O R D I N G MODE\n\r"); command=0; //set command to zero //infinite loop while(TRUE) { //wait for timer clock to interrupt while(! command); //call hill_climb(); hill_climb(); printf("%f ",batt_volt); printf("%f ",pv_volt); printf("%f ",pv_current); printf("%lu ",pv_duty); //simulate no MPPT, P V connected directly to battery set_pwml_duty(FULL_ON); set_pwm2_duty(FULL_ON); delay_ms(START_POINT_DELAY); delay_ms(START_POINT_DELAY); read_battery_voltage(); read_pv_voltage(); readjpv_current(); printf("%f ",batt_volt); printf("%f ",pv_volt); printf("%f ",pv_current); //shutdown and repeat in 5minutes set_pwm 1 _duty(OFF); //stop driver's enable //stop driver's enable set_pwm2_duty(OFF); //set command pack to zero, and wait for timer command=0; } #endif while(TRUE) { command=getc(); switch(command) {  case'd': {  //get command from keyboard //check command //set duty automatically  126  Appendix C Software Code printf("Type duty cycle then press enter: \n\r"); gets(string); //get string value temp=atof(string); //convert to integer printf("DUTY Entered: %2.2fA.\n\r", temp); pv_duty=(unsigned long)(temp*DUTY_FACTOR); //cast to pv_duty se t_bat t_duty(); //set duty cycle break; } case 'c':  //charge cap  {  do { printf("CAP C H A R G E M O D E . Type current value (between 0.4 and 3.5A) then press enter: \n\r"); gets(string); temp=atof(string); printf("Current Entered: %2.2fA. Press '1' to accept, else press any key to reset.\n\n\r", temp); command=getc(); }  while ((command != '1') | (temp > 3.5) | (temp < .4)); cap_cuiTent=temp; printf("Cap current is now %2.2fA.\n\r", cap_current); printf("Direction? 1 = C H A R G E , 0 = D I S C H A R G E \n\r" ); gets(string); //get string? cap_direction=atoi(string); //convert to integer printf("Direction is: %u\n\r", cap_direction); cap_control(); break; }  { DAC_Output(I_DAC 1, OFF); break; } case 'h':  //output_low(CAP_DRIVER);  //call hill climbing routine  {  printf("STEP SIZE value? (AS INTEGER)"); //integer value? gets(string); //get string? interval=atoi(string); //convert to integer printf("STEP SIZE is: %u\n\r", interval); hill_climb(); //call function break;  Appendix C Software Code  127  } } } }  lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll ////////////////////////////////////////INTERRUPT SERVICE ROUTINES/////////////////////////////////// lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll/lllllllllllllllllllllllllllllllllllllllllllllllllllllll I* This ISR is called every 65.536ms (4*65536/4Mhz). At every 5minutes, the power point is found*/ #int_timerO void clock_isr() {  timer_count++; //increment timer every 65.546ms #ifdefNORMAL printf('TN TIMER_COUNT %lu", timer_count); #endif if(timer_count==2000) //2000=5min, time has expired { #ifdef N O R M A L printf("IN I S R 2 W ) ; #endif command='h'; //call hil lclimbing routine out of ISR timer_count=0; //reset timer_count } / / B A T T E R Y R E V E R S A L C U R R E N T SERVICE ROUTINE //disables synchronous mode #INT_EXT void Battery_reverse() { //set enable PIN to follow input PIN (synchronous disabled) set_p wm 1 _duty(p v_duty); #ifdef N O R M A L printf("\n\rln B A T T R E V E R S E interrupt!\t B A T T E R Y S Y N C H R O N O U S DRIVE DISABLEDW); #endif control_state=portb; clear_interrupt(int_ext); disable_interrupts(int_ext); }  //read in portb //clear external interrupt flag //disable external interrupt  128  Appendix C Software Code //CAP C O M P A R A T O R ISR #INT_COMP void comparator_int() { int c; //define integer c for clearing C M C O N c = C M C O N ; //clear the "change condition" by reading (or writing) the C M C O N register. printf("In comparator InterruptVn\r\n"); output_toggle(CAP_DRIVER); //toggle Cap output driver }  //PORTB ISR #INT_RB void int_PORTB() {  control_state=portb; //read in portb printf("lN PORTB interrupt \r\n"); printf("control_state:%x \n\r", control_state); //CAP C U R R E N T R E V E R S A L if(bit_test(control_state, CAP_IPrN) != cap_direction) //if not true, then direction reversed. { output_HIGH(CAP_DRIVER); //Enable Capacitor Driver else if(!bitJest(control_state, CAP_VPIN)) { printf("In C A P _ V ! W ) ; } clear_interrupt(int_rb);  //clear interrupt flag  / / K E Y B O A R D INTERRUPT #int_rda void serial_isr() {  float temp; //current temp variable, in case abort, don't want pv_current to have value. char string[5]; command=getc(); printf("In K E Y B O A R D I S R W ) ; switch(command) { case'd': { printf("Type duty cycle then press enter: \n\r");  Appendix C Software Code  129  gets(string); temp=ato f(string); printf("DUTY Entered: % 2 . 2 f A . W , temp); pv_duty=(unsigned long)(temp*DUTY_F ACTOR); //cast to pv_duty break; }  case '8': { do { printf("CAP C H A R G E M O D E . Type current value (between 0.4 and 3.5A) then enter: \n\r"); printf("TO '0' to shutoff Cap charge\n\r"); gets(string); temp=atof(string); if (command ='0') { output_low(CAP_DRIVER); break;  press  }  printf("Current Entered: %2.2fA. Press '1' to accept, else press any key to reset.\n\n\r", temp); command=getc(); } while ((command != '1') | (temp > 3.5) | (temp < .4)); pv_current=temp; //give pv_current temp variable cap_control(); //call cap control break; }  case 'h':  //used for debugging MPPT  { printf("STEP SIZE value? (AS INTEGER)"); gets(string); interval=atoi(string); printf("STEP SIZE is: %u\n\r", interval); break; }  } }  Appendix C Software Code  130  ////////////////////^ //////////////////////////^^ //////////////////////////^^ //This function initializes interrupts, P W M , ports, comparators, D2A and Temp probe void intialize_pic() { port_b_pullups(FALSE); //disable por_b_pullups. Controlled by outputs //define portb as inputs Interrupt Pins: B7,B6, BO set_tris_b(0b01111111); /* (pg 101 in MICROPIC manual) A2D Pins: B4-B1 B5 cap volt charge. B6 Battery reversal B7 output cap driver */ output_low(CAP_DRIVER); //shutdown cap driver set_tris_a(0b 10001100); //define PORTA output and input pins (pg98 in MICROPIC MANUAL) //enable port b pullups output_c(0); //define all outport_C as 0 output_HIGH(BATT_sense); //disable Battery side C A P current sensor output_HIGH(CAP_sense); //disable capacitor side C A P current sensor  //Initialize CAP charger hysteresis comparator setup_comparator(COMP_ON); //SETUP C O M P A R A T O R AS OFF until needed2 //Setup A D C //setup_adc_ports( AN0_TO_AN3); //configure AN0 to AN3 as Analog inputs and OR'ed it with V S S _ V R E F : (0-VrefH) //using the operator '|' setup_adc_ports(AN0_TO_ANl 1 | VSS_VREF); setup_adc(ADC_CLOCK_DIV_8); //AdC clock, refer to table 19-1 on datasheet //SETUP TIMERS Used to measure MPP every 5 minutes (will increment every luS) setup_timer_0(RTCC_INTERNAL|RTCC_DIV_l); //disable timerl and timer3 interrupts. Not needed setup_timer_l(Tl D I S A B L E D ) ; setup Jimer_3(T3_DISABLED); /^Hardware P W M (PWM1) TIMER for switching clock of MPPT)*/ Setup_timer_2(T2_DIV_BY_l, 19, 1); //(TMR2 Prescale Value, PR2, # of resets an interrupt):  before  Appendix C Software Code  131  //DISABLE Serial Port Interface (SPI) setupspi(FALSE); #ifdef N O R M A L //setup i2c for temperature probe i2c_temp_init(); #endif //PWM2 //setup PWM2 for MPPT, hill climbing (CCP1): setup_ccp2(CCP_PWM); / / C C P _ P W M means Set CCP to P W M mode: //(PWM frequency=50kHz refer to page 138 for values of TMR2 and PR2) //PWM1 //setup PWM2 for cap soft start charging: setup_ccpl(CCP_PWM); / / C C P _ P W M means Set CCP to P W M mode: //(PWM frequency same as PWM2. 50kHz cause it uses the same timer2) //Initialize I2C DACs i2c_DAC_init(I_DACl); //output cap's current reference i2c_DAC_init(V_DAC2); //output cap's voltage reference //calibrate A2D's V R E F offset. calibrate_vref(); //set PWMs to OFF pv_duty=OFF; set_p wm 1 _duty(OFF); set_pwm2_duty(OFF); get_b at_max_vo lt(); read_battery_voltage(); read_pv_voltage(); read_c ap_vo ltage(); pv_current=0; timer_count=0; DAC_Output(I_DACl, OFF); printf("\n\rW);  //get the battery's max charging temperature //read battery's terminal voltage //read P V s terminal voltage //read cap's terminal voltage //set pv_current variable to zero //set timer to zero //DAC Current is set to zero  //INTERRUPTS EXT_INT_EDGE(0, H_TO_L);//trigger high to low for battery interrupt #ifdef M P P T R E C O R D / / M P P T R E C O R D , records the MPPT every 5 minutes enable_interrupts(int_timerO); //enable timerO interrupt #endif  Appendix C Software Code  132  #ifdef N O R M A L //normal mode disable_interrupts(int_timerO);//disable interrupt, #endif // enable_interrupts(int_rda); //enable keyboard input enable_interrupts(int_rb); //enable portb interrupts enable_interrupts(int__EXT); //enable battery current interrupt control_state=portb; //read portb before enabling interrupts disable_interrupts(int_comp); clear_interrupt(int_ext); //prevent battery current interrupt from false setting enable_interrupts(global); return; } //This function prints the commands to the monitor void prin t_menu() {  printf("TYPE'd' to setup battery duty cycle\n\r"); printf("TYPE 'h' to enable HillclimbVnV'); printf("TYPE 'c' to enable charge capacitor\n\r"); printf("TYPE 'o' to shut down capacitor charger\n\r"); }  //This function controls the capacitor charging dc/dc converter void cap_control() {  float cap_v; //cap_v=pv_current+CAP_CHARGE_OFFSET; if (cap_direction==CHARGE) { read_cap_voltage(); CM1CONO=C2NON; cap_v=cap_current+CAP_VOLTAGE_OFFSET; if (cap_volt < cap_v) { printf("CAP V O L T A G E TOO L O W . SOFT START E N A B L E D . C H A R G I N G V O L T A G E TO: %2.2f\n\r", cap_v); cap_v=cap_v/CAP_F ACTOR; printf("WRITLNG TO V _ D A C 2 voltage:%2.2f\n\r", cap_v); //SET V D A C comparator to cap_v threshold and wait till cap V hit reference to drive interrupt DAC_Output(V_DAC2, capv); DAC_Output(I_DACl, capcurrent); output_high(BATT_sense); //disable Battery side current sensor output_low(CAP_sense); //enable capacitor side current sensor  Appendix C Software Code } Else { DAC_Output(I_DACl, cap_current); outputlow(BATTsense); //enable Battery side current sensor outputHIGH(CAPsense); //disable capacitor side current sensor }  } else i f (cap_direction==DISCHARGE) { CM1CONO=C2INV; if (cap_volt < cap_v)  { printf("CAP V O L T A G E TOO LOW. Can't discharge: %2.2f\n\r", cap_v) outputJ o w(CAPJDRTVER); //disable Capacitor Driver return; }  printf("CAP discharging\n\r", cap_v); output_low(BATT_sense); output_HIGH(CAP_sense);  //disable Battery side current sensor //enable capacitor side current sensor  } printf("Enabling CAP J D R I V E R W ) ; output HIGH(CAP_DRiVER); //Enable Capacitor Driver }  //This function gets the battery's Voltage charge limit at a specific temperature void get_bat_max_volt() { int counter=0; //check to see i f temperature exceeds the max temp if (temperature >= 45) { Printf("Upper temperature limit!\n\r"); max_volt=133; }  else { //while loop, repeats until becomes false, while (temp table[counter] < temperature) {  Appendix C Software Code //DEBUG //prints temperature and temp_table look up table /*printf("Temp:table %d temperature %d Counter %d\n\r", temp_table[counter], temperature, counter);*/ counter++; }  //convert to Maxvolt (cast batvolt_table) max_volt=((float)batvolt_table[counter]/l 0+0.01); //the 0.01 is to compensate for rounding error }  #ifdef N O R M A L printf("Max charging voltage %2.1f\n\r",max_volt); #endif return; }  /*This function sets the duty cycle, provides a delay for the system to stabilizes and then calculates the power*/ float get_pvpower(unsigned long duty, unsigned int delay) {  set_p wm2_duty(duty); set_pwml_duty(FULL_ON); //reset E N A B L E O N delay_us(delay); //delay for input capacitor to stabilize read__battery_voltage(); read_pv_voltage(); read_p v_current(); #ifdef N O R M A L PRINTF("SETTING D U T Y TO:%lu\nV, duty); #endif return (pv_current* batt_volt); } //changes batt duty manual, for debugging purposes void set_batt_duty() { PRINTF("LN B A T T D U T Y change function..AnV); set_pwml_duty(OFF); //stop driver's enable clear_interrupt(INT_EXT); //clear E X T E R N A L interrupt enable_interrupts(LNT_EXT); //renable E X T E R N A L interrupt set_pwm2_duty(pv_duty); //give MOSFET driver it's starting point duty cycle printf("LNPUT D U T Y (BD) is %lu", pv_duty); if(pv_duty<30)  134  Appendix C Software Code  135  set_pwml_duty(pv_duty); //will be in discontinuous else set_pwml_duty(FULL_ON); //activate MOSFET Driver delay_ms(200); read_battery_voltage(); read_pv_voltage(); read_pv_current(); printf("POWER IS: %f2.2\mr", pv_current* batt_volt); }  //This function finds the PV's Maximum Power Point void hil l_climb() {  float power, power_old; //safety value, minimizes the amount of M M P T search int search=0; //safety value, if MPPT found, prevents oscillation int found=0; //shut off pv_duty and measure PV's open voltage set_pwml_duty(OFF); //stop driver's enable set_pwm2_duty(OFF); //stop driver's enable delay_ms(START_POINT_DELAY); clear_interrupt(INT_EXT); //clear E X T E R N A L interrupt enable_interrupts(INT_EXT); //renable E X T E R N A L interrupt //determine batt voltage read_battery_voltage(); //delay 400ms for Panel to stabilize read_pv_voltage(); if ((batt_volt+l) >= pv_volt) { printf("PV P A N E L V O L T A G E TO LOW, N O POWER A V A I L A B L E W ) ; return; } //MMPT around 78% (MPPT_HUMP) of open voltage. Determine D U T Y pv_duty=(unsigned long int)(batt_volt*DUTY_FACTOR)/(pv_volt*MPPT_HUMP); set_pwm2_duty(pv_duty); //give MOSFET driver it's starting point duty cycle //enable D R I V E R set_p wm 1 _duty(FULL_ON); delay_ms(START_POINT_DELAY);  //wait for system to stabilize  136  Appendix C Software Code  power=get_pvpower(pv_duty, 0); #ifdef N O R M A L printf("POWER A T H U M P is %f\n\r\nV, power); #endif while(search<LIMIT)  //safety limit, prevent an infinite search loop  { //if interval is positive, VLN is decreasing. pv_duty+=interval; //save current power as old power_old=power; //get power new value power=get_pvpower(pv_duty, M P P T _ D E L A Y ) ; #ifdefNORMAL printf("POWER A T search interval (%d) is %f\n\r\n\r", search, power); delay_ms(DELAY_TIME); #endif if (power<power_old) { found++; //increment Found interval=(-l interval); //search the other direction #ifdef N O R M A L printf("Going wrong way... (IN the IF state) F O U N D Number: (%d). Power is % f \n\r\n\r", found, power); delay_ms(DEL A Y _ T I M E ) ; #endif //if FOUND==MMPT_FOUND, then System is one after the M M P T (this code prevents constant oscillation) if (found==MPPT_FOUND) {  pv_duty+=interval; //reset pv_duty to old value; get_pvpower(pv_duty, M P P T _ D E L A Y ) ; //set power back to older value since it is greater. #ifdef N O R M A L printf("FOUND=MPPT_FOUND... power is %f\n\r\n\r", power); #endif return; } }  Appendix C Software Code search++;  137 //increment search  } }  / / A V E R A G I N G FUNCTION. Take 16 measurements and A V E R A G E S them, unsigned long ADC_averaging() { int count=0; //initialize count as zero unsigned long measurement=0; //initialize measurement as zero while(count < 16) { measurement += read_adc(); //read from A D C channel and add it to measurement count++; //increment historycount } measurement = measurement » 4;  //divide by 16  //DEBUG //PRINTS the M E A S U R E M E N T V A L U E //printf("Measurement is: %ld\n\r ", measurement); return measurement; } /*Due to noise, determines how much incorrect the A2D measures V R E F . Calibrates the A2D by this offset*/ void calibrate_vref() { float temp; set_adc_channel(VREF_CALIB_CHANNEL); //select A D C mux to VREFCALIBCHANNEL #ifdef N O R M A L printf("Calibrating A2D VREF..At"); #endif temp=ADC_averaging(); //measure V R E F vref_calib_offset=(unsigned int)(A2D_MAX_VALUE-temp); //cast the measurement #ifdef N O R M A L printf("VREF M E A S U R E D AS: %2.2f\nV, temp); printf("VREF Calibrated at an offset of: %d\nV", vref_calib_offset); #endif }  Appendix C Software Code  138  //Reads the Battery's Voltage void read_battery_voltage() {  set_adc_channel(BATT_CHANNEL); //select A D C mux to B A T T channel bat t_volt=((float)ADC_averaging() + vref_calib_offset); //get battery voltage, cast it and add offset //ADC conversion and multiply the B A T T F ACTOR... refer to lab book //add + 0.001 for floating rounding. //printf("Battery Voltage before conversion: %2.2f\n\r", batt_volt); batt_volt=(batt_volt/ADC_FACTOR)*BATT_FACTOR+0.001; #ifdef N O R M A L printf("\t\t\t\tBattery Voltage: %2.2f\nV", batt_volt); #endif } //Reads the P V s Voltage void read_pv_voltage() { set_adc_channel(PV_VOLT_CHANNEL); //select A D C mux to P V channel pv_volt=((fioat)ADC_averaging() + vref_calib_offset); //get pv_voltage, cast it and add offset //ADC conversion and multiply the P V F A C T O R . . . refer to lab book //add +0.001 for floating rounding. pv_volt=(pv_volt/ADC_FACTOR)*PV_FACTOR+0.001; #ifdef N O R M A L printf("\t\t\t\tPV Voltage: %2.2f\n\r", pv_volt); #endif } //Reads the Capacitor's Voltage void read_cap_voltage() { set_adc_chamrel(CAP_VOLT_CHANNEL); //select A D C mux to C A P channel /*get Capacitor voltage, cast it and add offset*/ cap_volt=((float)ADC_averaging() + vref_calib_offset); //ADC conversion and multiply the C A P F ACTOR... refer to lab book //add +0.001 for floating rounding. cap_volt=(cap_volt/ADC_FACTOR)*CAP_FACTOR+0.001; #ifdef N O R M A L  Appendix C Software Code  139  printf("\t\t\t\tCap_voltage: %2.2f\n\r", cap_volt); #endif } //Reads the P V s Current void read_pv_current() {  set_adc_channel(PV_CURRENT_CHANNEL); //get pv_current, cast it and add offset pv_current=((float)ADC_averaging() + vref_calib_offset); //ADC conversion and multiply the CURRENTJF ACTOR... refer to lab book //add +0.001 for floating rounding. pv_current=(pv_current/AI)C_FACTOR)*ClJRRENT_FACTOR+0.001; #ifdef N O R M A L printf("\t\t\t\tPV_current: %2.2f\n\r", pv_current); #endif }  //Clears the screen void clear_scr() { printf("\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\r"); } //Initialize I2C 8b'it D A C (AD5301), and set its output to 0V. void i2c_DAC_init(unsigned int dac) {  i2c_start(); // i2c D A C sensor Address (ObOOO 11000),: write to AD5301 if(i2c_write(dac)==l) {  #ifdef N O R M A L printf("D2A sensor error  check D A C : %ux. CONFIGURATION A B O R T E D , \n\r\n",  dac); #endif i2c_stop(); return;  } #ifdef N O R M A L printf("Configuring I2C D A C : %ux... Setting to 0V o u t p u t W , dac);  Appendix C Software Code  140  #endif / * D A C INPUT 16bit SHIFT REGISTER F O R M A T : [x x PD1 PDO D7 D6 D5 D4 D3 D2 DI DO x x x x] (x are don't cares)*/ i2c_write(0b00000000); // Set power mode to: Normal Operation and write 0V to D A C i2c_write(0b00000000); //change configuration to no one-shot, no shutdown and 9bit resolution i2c_stop(); #ifdef N O R M A L printf("I2C D A C : %ux configured.\n\n\r", dac); #endif delay_ms(l);  //delay 1ms for D A C to setup.  }  //Write to I2C 8bit (AD5301). void DAC_Output(unsigned int dac, float value) {  unsigned int out_high, out_low; out_high=(unsignedint)((value*RESOLUTION)/REF_VOLTAGE); //D=2 8*x/Vref A  //DAC INPUT 16bit SHIFT REGISTER F O R M A T : [x x PD1 PDO D7 D6 D5 D4 D3 D2 DI DO x x x x] (x are don't cares) out_low=out_high; out_high=out_high»4; //right shift upper data four times /*include the first nibble (set power on) Last nibble is the M S B N I B B L E data.*/ out_high=out_high & ObOOOOl 111; /*left shift lower data four times. LSB Nibble of this byte is don't cares.*/ out_low=out_low « 4; i2c_start(); // i2c D A C sensor AddressOOOl 1000,: write to AD5301 if(i2c_write(dac)==l) { #ifdef N O R M A L printf("D2A sensor error #endif  Can't write to D A C . Check chip number: %ux.\n\r",dac);  i2c_stop(); return; }  i2c_write(out_high); // OUTPUT high data  Appendix C Software Code i2c_write(out_low); i2c_stop();  //output low  #ifdef N O R M A L printf("Voltage written to DAC# %ux as: % 2 . 2 f d a c , value); #endif } //Setup the temperature probe void i2c_temp_init() { i2c_start(); // i2c temperature sensor Address (Ob 10010000), configure: write to MCP9802A0 if(i2c_write(TEMP_PROBE)==l) { #ifdef N O R M A L printf("Temp sensor error... Temp Probe not found.\n\r"); #endif i2c_stop(); return; } #ifdef N O R M A L printf("Temp sensor configuring...\n\r"); #endif i2c_write(0b01); // Point to control registry i2c_write(0b00000000); //change configuration to no one-shot, no shutdown and 9bit resolution i2c_stop(); //change temp pointer to Temp register i2c_start(); i2c_write(0bl0010000); i2c_write(0b00); // Point to Temperature register i2c_stop(); #ifdef N O R M A L printf("Temp sensor configured\n\n\r"); #endif delay_ms(500); read_temp();  //delay 0.5 seconds for temperature probe to setup. //read temperature  141  Appendix C Software Code  142  } //READ the T E M P E R A T U R E from the probe void read_temp() {  //INITALIZE V A R I A B L E S int 16 avg_temp=0; //final temperature value (avg 8 times) int history_count=0; //tracks amount of times averaged #ifdef N O R M A L printf("Taking temp measurement #endif  \n\r ");  while (history_count<AVG_MAX)  I i2c_start(); // i2c temperature sensor Address, read from MCP9802A0 if(i2c_write(TEMP_PROBE)==l) { #ifdef N O R M A L printf("TEMP SENSOR ERROR... Temp Probe Can't read measurement.W); #endif i2c_stop(); return; } avg_temp=(i2c_read() + avg_temp); //DEBUG //Print avg_temp //printf("avg_temp: %ld Celsius\n\n\r", avg_temp); i2c_read(); //remove 9th bit i2c_stop(); history_count++; delay_ms(40); //convert to temperature: avg_temp/(8) and convert to signed integer (8bit) temperature=(int)(avg_temp»3); } #ifdef N O R M A L printf("SYSTEM T E M P E R A T U R E IS: %d Celsius\n\r", temperature); #endif }  

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                            <div id="ubcOpenCollectionsWidgetDisplay">
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