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UBC Theses and Dissertations

High efficiency single-phase power factor correctors : resonant circuit and flexible topology Valipour, Hamed 2021

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High Efficiency Single-Phase Power Factor Correctors:Resonant Circuit and Flexible TopologybyHamed ValipourB.Sc., Sharif University of Technology, Iran, 2012M.Sc., Sharif University of Technology, Iran, 2014A THESIS SUBMITTED IN PARTIAL FULFILLMENTOF THE REQUIREMENTS FOR THE DEGREE OFDoctor of PhilosophyinTHE FACULTY OF GRADUATE AND POSTDOCTORAL STUDIES(Electrical and Computer Engineering)THE UNIVERSITY OF BRITISH COLUMBIA(Vancouver)January 2021© Hamed Valipour, 2021The following individuals certify that they have read, and recommend to the Faculty of Gradu-ate and Postdoctoral Studies for acceptance, the dissertation entitled:High Efficiency Single-Phase Power Factor Correctors: Resonant Circuit and FlexibleTopologysubmitted by Hamed Valipour in partial fulfillment of the requirements for the degree of Doc-tor of Philosophy in Electrical and Computer Engineering.Examining Comittee:Dr. Martin Ordonez, Professor, Electrical and Computer Engineering, UBCSupervisorDr. William Dunford, Professor, Electrical and Computer Engineering, UBCSupervisory Committee MemberDr. Navid Shafiei, Power Supply Design Engineer, Alpha Technologies Ltd.Supervisory Committee MemberDr. Shahriar Mirabbasi, Professor, Electrical and Computer Engineering, UBCUniversity ExaminerDr. Mauricio Ponga, Assistant Professor, Mechanical Engineering, UBCUniversity ExamineriiAbstractRectifiers with Alternating Current (AC) input and Direct Current (DC) output are required in manyapplications to regulate the output and provide a Power Factor Correction (PFC) capability. Thereare different applications for PFC rectifiers: wide-range and narrow-range. The purpose of thiswork is to propose two approaches to improve efficiency while keeping the performance high inboth wide and narrow range rectifiers. Wide-range applications require PFC converters to sup-port extended ranges of variations in the input voltage. A PFC converter capable of coping witha wide input voltage range, 90VRMS−530VRMS, would significantly decrease costs and streamlinedevelopment. In this work, a reconfigurable PFC converter is proposed which provides a high andflat efficiency curve throughout the entire operating voltage range. The proposed reconfigurableconverter has a flexible bridgeless structure with simple control, low current ripples, low common-mode noise, and startup inrush current handling capabilities. Narrow-range applications are alsostudied in this work which do not require a wide range of variations in their input. An advancedLLCC resonant structure is proposed in this work which improves the efficiency in narrow-rangeapplications. The operation of this proposed concept is first developed in a switching-time scale andtested in a DC/DC environment, then a modified version is used with an AC input and bridgeless con-figuration. This converter can provide soft switching for all of the semiconductors without addingextra elements, by just using the passive components in the design as resonant tank. Therefore,the efficiency can be improved which potentially results in lower sizes for the passive elements.This converter can also provide a continuous input current despite using small inductances. Thisenables an inherent PFC capability with a single loop control architecture in the AC/DC version.This structure has a simple and symmetrical structure with easy control. The proposed convertersin this work are theoretically and experimentally analyzed. Their performance is also comparediiiwith conventional structures. The proposed converters show efficiency improvements as well asbetter performance in this comparison.ivLay SummaryThe purpose of this research is to increase the efficiency of electronic power converters in differentapplications. A reconfigurable structure is proposed in this work that supports a wide range ofvariations in its operation with high efficiency and good performance. This converter can reducethe costs in the industry significantly because of its adaptability in different ranges of operation. Inthe other part of this work, an advanced resonant concept is developed that can be used in narrowrange applications. This structure can provide an improved condition for the semiconductors in thecircuit by reducing a specific types of power loss related to them. This also enables the designerto reduce the size of the passive components in the circuit. Both of the proposed structures areinvestigated theoretically and experimentally. Their operations are compared with conventionalconverters in the industry, showing great improvements in efficiency and performance.vPrefaceThis work is based on the research performed at the Department of Electrical and Computer Engi-neering of the University of British Columbia by Hamed Valipour, under the supervision of Prof.Martin Ordonez. Chapter 1 contains modified portions of text from all below-listed publications.Portions of Chapter 2 is published in IEEE Transactions on Power Electronics. Some other portionsare published in IEEE Applied Power Electronics Conference & Exposition (APEC) [1, 2]:• H. Valipour, M. Mahdavi, M. Ordonez, P. Ksiazek and R. Khandekar, ”Extended RangeBridgeless PFC Converter with High Voltage DC Bus and Small Inductor,” in IEEE Transac-tions on Power Electronics, doi: 10.1109/TPEL.2020.2997667.• H. Valipour, M. Mahdavi and M. Ordonez, ”A Wide Input Voltage Range PFC Converterwith High-Efficiency,” 2019 IEEE Applied Power Electronics Conference and Exposition(APEC), Anaheim, CA, USA, 2019, pp. 774-779.Portions of Chapters 3, and 4 have been published in IEEE Transactions on Power Electronics,and IEEE Energy Conversion Congress and Exposition (ECCE) [3–5]:• H. Valipour, M. Mahdavi and M. Ordonez, ”Resonant Bridgeless AC/DC Rectifier With HighSwitching Frequency and Inherent PFC Capability,” in IEEE Transactions on Power Elec-tronics, vol. 35, no. 1, pp. 232-246, Jan. 2020.• H. Valipour, M. Ordonez and M. Mahdavi, ”High-Efficiency Interleaved LC Resonant BoostTopology: Analysis and Design,” in IEEE Transactions on Power Electronics, vol. 34, no.11, pp. 10759-10775, Nov. 2019.vi• H. Valipour and M. Ordonez, ”High efficiency LC resonant boost topology: Analysis anddesign,” 2017 IEEE Energy Conversion Congress and Exposition (ECCE), Cincinnati, OH,2017, pp. 3427-3432.As the first author of the above-mentioned publications, the author of this thesis developed thetheoretical concepts and wrote the manuscripts, developed simulation and experimental platforms,and received advice and technical support from Prof. Martin Ordonez and his research team, inparticular from Dr. Mohammad Mahdavi, and Dr. Ion Isbasescu. Also, the author received advicefor the practical side of the design from the engineering team of Alpha Technologies Ltd., Burnaby,BC, Canada (Mr. Peter Ksiazek and Dr. Rahul Khandekar).viiTable of ContentsAbstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iiiLay Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viiiList of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiiList of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiiiGlossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxiiAcknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxiv1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.3 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3.1 Wide Range PFC Conversion System . . . . . . . . . . . . . . . . . . . . . 81.3.2 Narrow Range PFC Conversion System . . . . . . . . . . . . . . . . . . . 121.4 Contributions of the Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141.4.1 Reconfigurable PFC converter for a wide range application . . . . . . . . . 141.4.2 High-efficiency LLCC resonant concept for narrow range applications . . . 15viii1.4.3 High efficiency LLCC resonant PFC converter for narrow range applications 161.5 Dissertation Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Reconfigurable Bridgeless AC/DC Converter for Wide Input Voltage Range Appli-cations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182.1 Wide Input Voltage Range Application and Conventional Methods . . . . . . . . . 192.2 Principles of Operation for the Basic Flexible PFC Converter for Wide Input Volt-age Range Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.2.1 Mode I: Doubler mode at low input voltages (VinPeak < 12Vout) . . . . . . . . 272.2.2 Mode II: Bridgeless boost mode at high input voltages (VinPeak > 12Vout) . . 302.2.3 Improving the basic flexible PFC wide-range converter . . . . . . . . . . . 302.3 Principles of Operation for the Proposed Advanced Reconfigurable PFC Converterfor Wide Input Voltage Range Operations . . . . . . . . . . . . . . . . . . . . . . 322.3.1 First Modulation Method: Low Frequency Middle Switch . . . . . . . . . . 362.3.2 Second Modulation Method: High Frequency Middle Switch . . . . . . . . 412.4 Proposed Advanced Converter Modulation and Control Methods Implementation . 462.5 Designing the Proposed Advanced Reconfigurable PFC Converter . . . . . . . . . . 492.6 Experimental Results of the Proposed Advanced Reconfigurable PFC Converter . . 542.6.1 Experimental performance of the proposed advanced converter . . . . . . . 542.6.2 Experimental comparison of the proposed advanced converter with totempole PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 633 Resonant Boost Structure for Narrow Input Voltage Range Applications: Develop-ing the Concept in DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 643.1 Principles of Operation for the Proposed LCC Resonant Boost Converter . . . . . . 663.2 Principles of Operation for the Proposed Advanced LLCC Resonant Boost Concept 713.3 Proposed Advanced LLCC Resonant Boost Concept Analysis in Switching Cycles . 773.3.1 Input and Output Current Analysis . . . . . . . . . . . . . . . . . . . . . . 77ix3.3.2 Converter Gain Analysis and the Normalization Process . . . . . . . . . . . 793.3.3 Components Maximum Rating Analysis . . . . . . . . . . . . . . . . . . . 823.4 Control Strategies in the Variable Frequency and the Burst Mode Operations . . . . 873.5 Design Procedure for the Proposed DC/DC Advanced LLCC Resonant Structure . . 933.5.1 Selecting the Components . . . . . . . . . . . . . . . . . . . . . . . . . . 933.5.2 Soft Switching Region Analysis . . . . . . . . . . . . . . . . . . . . . . . 963.6 Experimental Results for the Proposed DC/DC Advanced LLCC Resonant Structure 993.6.1 Operation of the Proposed Advanced LLCC Resonant Boost Concept in aDC/DC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1003.6.2 Comparison with the Conventional Interleaved Boost Converter . . . . . . 1043.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1084 Resonant Boost Structure for Narrow Input Voltage Range Applications: AC/DCPFC Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1104.1 Principles of Operation for the Proposed Advanced LLCC Resonant Boost Conceptin Line Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1124.2 Proposed Advanced LLCC Resonant Boost Concept Mathematical Analysis in LineCycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1194.2.1 AC/DC Converter Analysis Review in a Switching Cycle . . . . . . . . . . 1194.2.2 AC/DC Converter Analysis in a Line Cycle . . . . . . . . . . . . . . . . . . 1214.3 Design Considerations for the Proposed Advanced Resonant Boost PFC Structure . 1264.4 Single Loop Control and Modulation Algorithm . . . . . . . . . . . . . . . . . . . 1284.5 Experimental Results for the Proposed Advanced Resonant Boost PFC Structure . . 1304.5.1 Operation of the Proposed AC/DC Converter in the Experimental Setup . . . 1314.5.2 AC/DC LLCC Resonant Converter Operation Comparison with Conven-tional Interleaved Boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1354.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1395 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141x5.1 Conclusions and Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1415.1.1 Reconfigurable PFC Converter for a Wide Input Voltage Range . . . . . . . 1425.1.2 Advanced LLCC Resonant Boost Concept . . . . . . . . . . . . . . . . . . 1425.1.3 Advanced Bridgeless LLCC Resonant Boost PFC Rectifier . . . . . . . . . 1435.1.4 Specific Academic Contributions . . . . . . . . . . . . . . . . . . . . . . . 1445.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147Appendices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162A Inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163B Common Mode Noise and Electromagnetic Interference (EMI) . . . . . . . . . . . . 165xiList of TablesTable 2.1 Experimental specifications of the wide range application. . . . . . . . . . . . . 50Table 2.2 Components used for the experimental prototype of the proposed advanced re-configurable AC/DC topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Table 3.1 Components used for the experimental prototype of the proposed DC/DC ad-vanced LLCC resonant boost prototype. . . . . . . . . . . . . . . . . . . . . . . 96Table 4.1 Components used for the experimental prototype of the proposed AC/DC LLCCresonant boost topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128xiiList of FiguresFigure 1.1 Block diagram illustration of a typical AC/DC PFC conversion system for DCloads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Figure 1.2 Inductor’s current waveform in a totem pole boost PFC converter including thelow frequency and high switching frequency elements . . . . . . . . . . . . . . 4Figure 1.3 Waveforms of voltage, current, and instantaneous power dissipation of a MetalOxide Semiconductor Field Effect Transistor (MOSFET) in switching moments. 5Figure 1.4 Block diagram illustration of the proposed idea to support the wide input volt-age range application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 1.5 Block diagram illustration of the proposed idea to support the narrow input volt-age range application. a) The advanced LLCC resonant boost DC/DC converter,b) the advanced bridgeless LLCC resonant boost DC/DC converter. . . . . . . . 16Figure 2.1 Common North American voltage systems: a) single phase 240Vac line-to-lineor 120Vac line-to-neutral or split-phase, b) three phase Y connection includingground with 480Vac or 208Vac line-to-line, and 277Vac or 120Vac line-to-neutral,c) three phase ungrounded Delta with 240Vac or 480Vac line-to-line, d) threephase corner grounded Delta with 240Vac or 480Vac line-to-line, and e) threephase high leg Delta with 240Vac line-to-line or 120Vac line-to-ground. . . . . . 20Figure 2.2 Conventional PFC converters based on boost structure: a) full diode bridgeboost AC/DC converter, b) bridgeless totem pole boost PFC structure, c) semi-bridgeless boost PFC configuration. . . . . . . . . . . . . . . . . . . . . . . . . 22xiiiFigure 2.3 Switching frequency inductive current ripples in a conventional boost converterversus a voltage doubler boost converter. . . . . . . . . . . . . . . . . . . . . . 24Figure 2.4 a) The proposed basic flexible wide-input voltage range PFC converter. b) Whencontact K in the relay is closed (K is open), the proposed rectifier is in thedoubler mode, working with low input voltages (VinPeak < 12Vout). c) Whencontact K in the relay is open (K is closed), the proposed PFC converter isworking in the bridgeless Boost mode with high input voltages (VinPeak > 12Vout). 25Figure 2.5 Line-frequency scale Waveforms of the proposed basic flexible wide-input volt-age range PFC converter in the a) low voltage mode and b) high voltage mode. . 26Figure 2.6 The basic flexible PFC converter in mode I: Voltage doubler boost mode in theproposed converter when the input voltage is much lower than the bus voltage(VinPeak < Vout2 ) at a) positive half-line cycles, and b) negative half-line cycles. . 28Figure 2.7 Mode I: Bridgeless Boost mode in the proposed converter when the input volt-age is higher than half of the bus voltage (VinPeak > 12Vout) at a) positive half-linecycles, and b) negative half-line cycles. . . . . . . . . . . . . . . . . . . . . . 31Figure 2.8 The proposed advanced reconfigurable PFC converter working with an extendedinput voltage range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Figure 2.9 a) Proposed advanced reconfigurable PFC converter with an extended inputvoltage range. Different possible configurations for the proposed advanced re-configurable PFC converter: b) 1st method: the low frequency middle switchconfiguration with two 600V general purpose switches and two 600V fast re-covery diodes, c) 2nd method: the high frequency middle switch configurationwith two 600V Silicon Carbide (SIC) switches. . . . . . . . . . . . . . . . . . 34Figure 2.10 Different states of operations for the proposed advanced reconfigurable AC/DCPFC converter for a wide range application. . . . . . . . . . . . . . . . . . . . 36xivFigure 2.11 The first modulation method in the proposed advanced reconfigurable PFC con-verter: Low frequency middle switch, which acts like a voltage doubler at lowinput voltage levels (Vinpeak < Vout2 ) and at high input voltage levels (Vinpeak >Vout2 ) it switches between the voltage doubler and the totem pole in the middleof the half line cycles with the help from the middle bidirectional switches (S3and S4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Figure 2.12 Different intervals of operation in the first modulation method of the proposedadvanced reconfigurable PFC converter: Low frequency middle switch, whichacts like a voltage doubler at low input voltage levels (Vinpeak < Vout2 ) and at highinput voltage levels (Vinpeak > Vout2 ) it switches between the voltage doubler andthe totem pole in the middle of the half line cycles with the help from the middlebidirectional switches (S3 and S4) . . . . . . . . . . . . . . . . . . . . . . . . 38Figure 2.13 The second modulation method in the proposed advanced reconfigurable PFCconverter: High frequency middle switch, which acts like a voltage doublerat low input voltage levels (Vinpeak < Vout2 ) and at high input voltage levels(Vinpeak > Vout2 ) it puts the minimum voltage across the inductor to limit the cur-rent ripples in the inductor with the help from the middle bidirectional switches(S5 and S6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 2.14 Different intervals of operation in the second modulation method of the pro-posed advanced reconfigurable PFC converter: High frequency middle switch,which acts like a voltage doubler at low input voltage levels (Vinpeak < Vout2 ) andat high input voltage levels (Vinpeak > Vout2 ) it puts the minimum voltage acrossthe inductor to limit the current ripples in the inductor with the help from themiddle bidirectional switches (S5 and S6). . . . . . . . . . . . . . . . . . . . . 43Figure 2.15 The control loop of the proposed advanced wide-range PFC converter. . . . . . 46Figure 2.16 The modulation method used for the first modulation method: Low FrequencyMiddle Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47xvFigure 2.17 The modulation method used for the second modulation method: High Fre-quency Middle Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48Figure 2.18 Inductor’s current ripples in the analyzed design cases of totem pole and theproposed advanced modulations 1 and 2 at a) low input voltage cases (Vinpeak <Vout2 ), and b) high input voltage range (Vinpeak >Vout2 ). . . . . . . . . . . . . . . 51Figure 2.19 The pictures of the proposed advanced converter with a) two MOSFETs anddiodes in the middle network to work with the low freq. mid. switch modu-lation; b) Two SIC switches in the middle network to work with the high freq.mid. switch modulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Figure 2.20 Experimental captures of the proposed advanced converter in the 1st modula-tion method: Low frequency middle switch at a) 208VRMS (Vinpeak < Vout2 ), andb) 480VRMS (Vinpeak > Vout2 ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Figure 2.21 Experimental captures of the proposed advanced converter in the 2nd modula-tion method: High frequency middle switch at a) 208VRMS (Vinpeak < Vout2 ), andb) 480VRMS (Vinpeak > Vout2 ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Figure 2.22 Experimental captures of the totem pole PFC converter with the same input andoutput characteristics. The operational waveforms in a) 208VRMS (Vinpeak <Vout2 ), and b) 480VRMS (Vinpeak >Vout2 ). . . . . . . . . . . . . . . . . . . . . . . 57Figure 2.23 Comparison of the efficiency of the proposed advanced converters with the tra-ditional totem pole PFC boost converter with the same electrical characteristicsand the same components at a) vin = 480VRMS and different output power lev-els, b) vin = 208VRMS and different output power levels, and c) Pout = 2kW anddifferent input voltage levels (vin = 187−530VRMS) with de-rated power levelsin vin = 90−187VRMS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58xviFigure 2.24 Comparison of the proposed advanced converters with the traditional totempole PFC boost converter with the same electrical characteristics and the samecomponents. Power factor comparison at a) vin = 480VRMS and different outputpower levels, b) vin = 208VRMS and different output power levels, and c) Pout =2kW and different input voltage levels (vin = 187− 530VRMS) with de-ratedpower levels in vin = 90−187VRMS. . . . . . . . . . . . . . . . . . . . . . . . 59Figure 2.25 Comparison of the proposed converters with the traditional totem pole PFCboost converter with the same electrical characteristics and the same compo-nents. Total Harmonic Distortion (THD) comparison at a) vin = 480VRMS anddifferent output power levels, b) vin = 208VRMS and different output power lev-els, and c) Pout = 2kW and different input voltage levels (vin = 187−530VRMS)with de-rated power levels in vin = 90−187VRMS. . . . . . . . . . . . . . . . . 60Figure 3.1 The power stage of the basic LCC resonant boost converter under study. . . . . 67Figure 3.2 Equivalent circuit model in each operational mode of the proposed basic reso-nant LCC boost converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68Figure 3.3 Theoretical key waveforms of the proposed basic LCC resonant boost converter. 69Figure 3.4 The power stage of the proposed advanced LLCC resonant boost converter un-der study. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72Figure 3.5 Equivalent circuit model in each operational mode of the proposed advancedLLCC resonant boost converter. . . . . . . . . . . . . . . . . . . . . . . . . . 73Figure 3.6 Theoretical Key waveforms of the proposed advanced LLCC resonant boostconverter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74Figure 3.7 Voltage gain of the proposed advanced LLCC resonant converter (m = voutvin )versus the normalized switching frequency (Fn =fSw.fres). Burst mode can be usedin light loads to keep the maximum switching frequency limited. . . . . . . . . 81xviiFigure 3.8 The normalized voltage and current stress of the components in the proposedadvanced LLCC resonant converter versus the normalized switching frequencyin different quality factor levels: a) vCmaxn (= iLmaxn), maximum normalizedvoltage of the resonant caps or the maximum normalized value of the resonantinductor current. b) iLRMSn, the normalized Root Mean Squared (RMS) value ofthe resonant inductor current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 84Figure 3.9 The normalized voltage and current stress of the components in the proposedadvanced LLCC resonant converter versus the normalized switching frequencyin different quality factor levels. a) iSRMSn, the normalized RMS value of theswitch current. b) iDave.n, normalized value of the diode’s average current. . . . 85Figure 3.10 a) The prototype schematic of the proposed advanced LLCC resonant circuitwith the added clamp diode (D3) in order to clamp the voltage of the diodes D1and D2, b) inductors’ currents without the clamp diode (D3), and c) with theadded low current clamp diode. . . . . . . . . . . . . . . . . . . . . . . . . . . 88Figure 3.11 Variable frequency control method which is used in higher power levels forcontrolling the output voltage in the proposed converter . . . . . . . . . . . . . 89Figure 3.12 Burst mode operation, used in lower power levels for the proposed advancedLLCC resonant boost converter. a) Operational waveforms, and b) control cir-cuit of the converter during the burst mode operation . . . . . . . . . . . . . . 90Figure 3.13 The algorithm by which the proposed advanced LLCC resonant converter de-termines which controller to use for regulating the output voltage . . . . . . . . 92Figure 3.14 Maximum possible value of Cds in order to guarantee Zero Voltage Switching(ZVS) at turn-on. In addition, the minimum value of Cds required at turn-offto provide ZVS for the switch. Both waveforms are given versus the outputpower and the nominal input-output conditions. The parasitic capacitor (Co(tr))for the selected switch (TK20A60W) is approximated to be 260pF . The addedsnubber capacitors across the switches are Csnubber = 500pF . . . . . . . . . . . 99Figure 3.15 The picture of the proposed DC/DC advanced LLCC resonant structure. . . . . 100xviiiFigure 3.16 a) Gate signal (GateS1), drain source voltage (vS1), and the switch current(iS1) at 400W , indicating that ZVS at turn-on and turn-off is provided for theswitches. b) Diode’s current (iD1) and voltage (vD1) at 400W , which shows thatthe diode is turned off with Zero Current Switching (ZCS), and the clamp diodeis working as expected. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102Figure 3.17 a) Gate signal (GateS1), drain source voltage (vS1), and the switch current(iS1) at 160W , indicating that ZVS at turn-on and turn-off is provided for theswitches. b) Diode’s current (iD1) and voltage (vD1) at 160W , which showsthat the diode is turned off with Zero Current Switching or ZCS, and the clampdiode is working as expected. . . . . . . . . . . . . . . . . . . . . . . . . . . . 103Figure 3.18 Inductors’ currents (iLr1 and iLr2) and the input current (iin) at the nominal load-ing conditions, which shows that the input current is continuous even with thediscontinuous inductors’ currents . . . . . . . . . . . . . . . . . . . . . . . . . 104Figure 3.19 The resonance characteristic between the inductors Lr1 and Lr2, and also theinput capacitors’ voltages (vCr1 and vCr2) at the nominal loading conditions. . . 104Figure 3.20 Inductor’s current iLr1, input current (iin), and the output voltage vout underburst mode operation at 10% of the full load. . . . . . . . . . . . . . . . . . . 105Figure 3.21 Input current at the nominal loading conditions in a) the proposed LLCC Res-onant boost converter, and b) the conventional interleaved boost converter. Thesame components have been used in both of the converters. . . . . . . . . . . . 106Figure 3.22 Efficiency comparison between a) the LLCC resonant boost in the variable fre-quency and the burst mode operation, and the traditional interleaved boost con-verter with the same components from full load to 10% of the maximum loadwith vin = 200V to vout = 400V . The conventional interleaved boost converter’sefficiency is also measured in the burst mode under light loading conditions. b)The efficiency comparison in different input voltages from 150V to 250V tovout = 400V at full load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107xixFigure 4.1 Proposed resonant bridgeless AC/DC PFC boost converter with inherent sinu-soidal and continuous input current without any current loops. . . . . . . . . . 111Figure 4.2 The current and voltage waveforms of the proposed advanced resonant PFC cir-cuit in a line-frequency cycle with simple variable switching frequency modu-lation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112Figure 4.3 The equivalent circuit of the proposed AC/DC resonant converter in a) the posi-tive half line cycles, and b) negative half line cycles. . . . . . . . . . . . . . . . 113Figure 4.4 The proposed resonant boost PFC converter structure in the positive half-linecycle during each switching cycle interval. . . . . . . . . . . . . . . . . . . . . 116Figure 4.5 Operating modes of the proposed advanced resonant PFC converter during theswitching cycle intervals. The circuit works with simple variable switchingfrequency modulation and complementary gate signals with 50% duty cycle.These waveforms are for the converter at positive half-line cycles. The opera-tion of the converter is the same in the negative half-line cycles because of thesymmetry in the topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117Figure 4.6 a) The voltage gain versus the normalized switching frequency in different val-ues of the quality factor. b) Normalized maximum value of the input capaci-tors’ voltages and maximum value of inductors’ currents in different values ofthe normalized switching frequency and the quality factor. . . . . . . . . . . . 124Figure 4.7 The modulation and control block diagram of the proposed AC/DC LLCC reso-nant boost converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129Figure 4.8 The picture of the designed prototype based on the proposed advanced AC/DCresonant structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131Figure 4.9 a) Input voltage and current of the proposed AC/DC resonant converter with anear-unity measured power factor, b) vCr1, iLr1, iD1, and iD3, in line-cycle scaleat full load and the nominal input-output conditions. . . . . . . . . . . . . . . . 132xxFigure 4.10 a) Resonant elements’ voltages and currents alternating with the resonant fre-quency, b) switching waveforms of the switch S2 indicating ZVS turn-on, andc) switching waveforms of the diode D1 with ZCS turn-off, all in a switchingfrequency cycle captured at peak of the input voltage at full load and nominalconditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133Figure 4.11 The efficiency of the proposed converter compared with the conventional in-terleaved boost PFC converter with the same components in a) different outputpower levels, and b) at the nominal load in different input voltage levels. . . . . 136Figure 4.12 a) Input voltage and current, and output voltage of the proposed converter atfull load. b) Input voltage and current, and output voltage of the conventionalinterleaved boost converter with the same components at full load. The samecomponents are used for both of the converters. No current loops have beenused in neither one of the converters. No filter elements have been used forthese waveforms. The measured power factor for the proposed converter isnear unity, and for the traditional interleaved boost converter is 0.74 withoutextra filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137Figure 4.13 a) Power factor, and b) THD of the proposed advanced LLCC resonant boostPFC converter compared to the conventional interleaved boost converter ver-sus output power levels. The same components have been used in both of theconverters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138Figure A.1 The required circuit to handle inrush current at the startup in the boost converterto avoid over-voltage in C1 and over current through semiconductors. . . . . . . 163xxiGlossaryAC Alternating CurrentCCM Continuous Conduction ModeDC Direct CurrentDCM Discontinuous Conduction ModeEIA Energy Information AdministrationEMI Electromagnetic InterferenceEV Electric VehicleFET Field Effect TransistorGAN Gallium NitrideKCL Kirchhoff’s Current LawMOSFET Metal Oxide Semiconductor Field Effect TransistorPCB Printed Circuit BoardPF Power FactorPFC Power Factor CorrectionPI Proportional IntegratorPV PhotovoltaicsPWM Pulsed Width ModulationRMS Root Mean SquaredxxiiSEPIC Single Ended Primary Inductor ConverterSIC Silicon CarbideSKU Stock Keeping UnitsTHD Total Harmonic DistortionVCO Voltage-Controlled OscillatorZCS Zero Current SwitchingZVS Zero Voltage SwitchingZVZC Zero Voltage Zero CurrentxxiiiAcknowledgmentsFirst and foremost, I would like to express my sincere gratitude to my advisor, Prof. Martin Or-donez, for his continuous support of my Ph.D. study and research, and for his patience, motivation,enthusiasm, and immense knowledge. He tought me a great deal of technical knowledge and in-valuable soft skills. I could not have imagined having a better advisor and mentor for my Ph.D.study.Special thanks go to my committee members, Prof. William Dunford and Dr. Navid Shafiei, fortheir feedback on my research progress.I am grateful to the University of British Columbia (UBC), the Natural Sciences and EngineeringResearch Council (NSERC), and Alpha Technologies Ltd. for supporting my research project. Thedevelopment of the ”High Efficiency PFC Converters” would not be possible without the construc-tive assistance of Mr. Peter Ksiazek and Dr. Rahul Khandekar from Alpha Technologies Ltd..Many thanks to my colleagues, especially Dr. Mohammad Mahdavi, Dr. Ion Isbasescu, and Dr. Ig-nacio Galiano Zurbriggen for all the informative discussions and technical support they have sharedwith me.I feel the need to express my deepest gratitude to my parents Farahnaz and Davoud, and to mysister Hanieh.Last but not least, I would like to thank you, the reader, for showing interest in this work.xxivChapter 1Introduction11.1 MotivationGlobal energy demand is growing every day. The Energy Information Administration (EIA) projectsa 28% increase in the world energy use by 2040 [6]. Market expansion is expected in the renewableenergy sector, telecommunication, automotive, and data processing as new technologies are plan-ning to be used [7–9]. Much of these energy usages are inherently Direct Current (DC) (electricvehicle battery pack, telecom, and information technology) or need to go through DC to work prop-erly (variable speed drives). Yet the existing electric grid still supplies Alternating Current (AC),requiring a power converter to make the AC to DC transformation.Power converters are electrical circuits used to convert one form of voltage or current to an-other with larger or smaller magnitudes. Rectifiers are types of converters used to convert AC toDC. Rectifiers connected to the electrical grid are required to have Power Factor Correction (PFC)capabilities [10]. In other words, these converters should be able to draw a sinusoidal input currentfrom the grid as well as performing other regulatory requirements in their outputs.The block diagram of a typical AC/DC PFC conversion system has been shown in Fig. 1.1.Based on this figure, the load is supplied by an AC/DC PFC converter followed by an isolatedDC/DC converter. The first stage provides a regulated DC bus voltage and also draws a sinusoidalinput current, in-phase with the input voltage. The DC/DC converter provides isolation and regulates1Portions of this chapter have been modified from [1–5]1the total output depending on the load requirements. The focus of this research is mostly on thePFC rectifier in different applications.AC/DC PFCConverterIsolated DC/DCConvertervacCDCRLDC link bus voltageAC input voltageFigure 1.1: Block diagram illustration of a typical AC/DC PFC conversion system for DC loads.All electricity transformation implies some losses. Power converters with higher efficiencyor reduced losses are fundamental to the continued profitable growth of the mentioned electricalpower industries [11–13]. Therefore, any gains in efficiency are crucial.1.2 ObjectivesThe objective of this research is to find ways to increase the efficiency of power converters particu-larly AC/DC rectifiers. In order to improve efficiency or reduce losses in power converters, varioustypes of power dissipation should be studied. There are different types of losses in power convert-ers. Conduction, switching and magnetic core losses are the most important ones [14]. Conductionloss happens in almost all of the circuit elements including magnetic components’ windings, semi-conductor elements, and also capacitors. Switching losses, on the other hand, happens only insemiconductor elements such as Metal Oxide Semiconductor Field Effect Transistor (MOSFET)sand diodes. Magnetic core losses happen in inductors and transformers.The purpose of this research is to limit the switching and conduction losses in the presentedapplications. This should be done while keeping other parameters in a power converter untouchedor improved. One of the key specifications in power converters is the size of the circuit. Any lossreduction method presented in this work has also addressed the size reduction of the components.Most of the volume of the power converters is dedicated to passive elements such as inductors andcapacitors, and cooling parts like heatsinks. In this work, many methods are proposed to increasethe efficiency of the power converters which are also potentially capable of decreasing the size of2the mentioned components in power converters.Commercial PFC converters are designed to work over wide ranges of operating conditions(from 230VAC in Europe, Asia, and South America to 120VAC in North America). Utility powerlines are even more diverse in North America. The utility power grids typically are 208VAC, 230VAC,240VAC, 277VAC, or 480VAC in different geographic locations depending on the power system con-figuration. For example, in some areas, there are only line-to-line delta connections available forthe use of grid-connected converters without access to neutral. In some other areas, star connec-tions are also available even sometimes with split-phase connections. This puts a lot of stress in thedesign of converters to accommodate all these operating modes and yet be highly efficient.This work investigates new methods with high efficiencies for AC/DC power conversion. Theseapproaches can be applied in different applications with different input voltage ranges. There aremany considerations in various applications for a converter. But mostly, the presented work willfocus on limiting the conduction and switching losses. A combination of methods is used in eachof the applications but the approach is a little bit different in a wide input voltage range applicationcompared to a narrow range one. The focus in a wide range application is to limit the conductionlosses especially in low input conditions or high gains. In a narrow range application, differentmethods are combined to limit different types of losses without sacrificing performance. In each ofthe applications, the proposed methods are compared with the conventional techniques in terms ofperformance and effectiveness.1.3 Literature ReviewPower converters are responsible for delivering and managing power to and from a wide range ofdevices, namely renewable energy sources, electric vehicles, telecommunication devices, and more[11–13]. Even a 1% increase in the efficiency of these converters can represent energy savings inthe Mega Watt-hour (MWh) region [7, 8]. Therefore, further research has to be conducted intoincreasing the efficiency of the power converters to assure they are as efficient as possible.As stated, there are different types of losses in power converters: conduction losses, switchinglosses, and magnetic core losses. Most of the losses in a typical PFC converter come from the3inductors and the semiconductors [15]. Conduction losses in an inductor or a MOSFET depend onthe squared of total Root Mean Squared (RMS) value of the current. Current in a power converterusually has different frequency elements including DC or low frequency, as well as high-frequencyswitching components. For instance, in a totem pole PFC converter, the inductor current comprisesa low-frequency sinusoidal component and a high-frequency signal on top of that which both con-tribute to the conduction losses [16]. The inductor’s current waveform in this circuit is shown inFig. 1.2.AC high frequency componentiLFigure 1.2: Inductor’s current waveform in a totem pole boost PFC converter including thelow frequency and high switching frequency elementsAn inductor’s conduction losses is generally shown in (1.1). In this equation, RAC low f req. andRAC high f req. are the resistance of the inductor in DC, low frequency (line frequency), and highswitching frequency, respectively. IAC low f req. RMS and IAC high f req. RMS are the RMS value of thecomponents of the current in those frequencies. All of these different current components contributeto the conduction losses and decreasing each one of them can lead to a reduction in the total lossesand an increase in efficiency.PL, Conduction = RAC low f req.I2AC low f req. RMS +RAC high f req.I2AC high f req. RMS (1.1)Switching losses have more complicated characteristics. Switching loss depends on the switch-ing frequency of the converter as well as the voltage and current of the semiconductor elements.4In addition, the switching time is playing an important role too. If the semiconductor element isturned on or off faster, switching losses are lower. The voltage and current waveforms of an idealMOSFET has been given in Fig. 1.3 [14].iSpSt1 t3t2 t4vSMOSFETwaveforms~~~Figure 1.3: Waveforms of voltage, current, and instantaneous power dissipation of a MOSFETin switching moments.Switching losses of a MOSFET with the waveforms shown in Fig. 1.3 is calculated in (1.2).Pturn o f f is the turn-on losses that depend on the intersection of the voltage and current waveformsat turn-off. Pturn o f f depends on the rising time of the voltage (t1), falling time of the current (t2),voltage of the MOSFET when the switch is off (vS), and the current before the start of the turn-offcycle (iS). The same scenario happens when calculating the turn-on switching losses as seen in Fig.1.3. Both of the turn-on and turn-off switching losses depend on the switching frequency ( fSw) aswell.PMOSFET, Switching = Pturn o f f +Pturn on =12(t1 + t2)vSiS fSw +12(t3 + t4)vSiS fSw (1.2)In a well-designed converter, it is hard to consider one of these different types of losses to bedominant. But in general, conduction losses are contributing more to the total losses in an appli-cation with a wide range of operations. For instance, if a converter is responsible for regulating a5constant output voltage with wide input voltage variations, the value of the current changes dramati-cally in different operating points. In a constant power, if the input voltage changes from minimumto maximum, the input current changes from maximum to minimum, respectively. Conductionlosses of most of the components depend on their RMS current squared based on (1.1) compared tothe switching losses having a first-order relationship with current as in (1.2). Therefore, the con-duction losses increase with a higher rate in low input operations compared to the switching losses.As such, in a very wide range application, it is important to limit the conduction losses in the lowside of the input range.In order to increase the efficiency of a converter in an application, one or more of these lossesshould be restricted. There are different methods in the literature for limiting each of these cate-gories of losses. These different approaches are described as follows:1. Reconfigurable structure: The circuits that utilize this method change their configurationin different operating points to maintain a high performance and efficiency throughout theirentire operating range [17–20]. This approach is particularly useful in wide-range convertersbecause of the drastic changes in the operating points. This approach can be effective inreducing both the switching and conduction losses in different structures.2. Bridgeless approach: Traditionally, there is a diode bridge rectifier stage before the PFCconverters [21–27]. The input rectifier of the traditional PFC converter can be removed inorder to decrease the conduction losses. This results in a bridgeless PFC converter [28]. Withthis method, the number of semiconductor elements is reduced in the current flowing path.This method mostly targets the limitation of the conduction losses.3. Soft switching: Soft switching methods are used to reduce the switching losses. Thereare many methods of providing soft-switching conditions for the semiconductors which canbe divided into two main categories: fixed frequency [29–35] and variable frequency [36–39]. Since these converters can limit the switching losses, the switching frequency based on(1.2) can be increased which reduces the size of the passive elements. Therefore, using softswitching techniques results in higher efficiency values as well as smaller passive elements’6sizes [14]. But it should be noted that increasing the switching frequency might increaseother types of losses such as magnetic core losses if a suitable core for higher frequencies isnot used.4. Interleaving/Paralleling: Interleaving is a method of distributing power between two ormore similar stages working in parallel with a phase shift. The interleaving approach hasseveral merits like the ease of implementation, the use of more but smaller components, orbetter heat distribution. Interleaved structures provide lower input and output current rippleswhich cause the conduction losses to be reduced. Interleaving also helps the designer toreduce the switching frequency in each of the phases which results in having lower switch-ing losses. Moreover, interleaved structures provide lower input current and output voltageripples, which helps to reduce the size of the input and output filters [40–43].5. Single-stage structure: In grid-connected power converters, there are usually two or moreconverters working back to back. One of these converters is responsible for keeping thepower factor close to one which is called the PFC stage, and the other stage is responsible forproviding isolation and/or regulating the output. Having two stages increases the processingpower steps which decreases the total efficiency. Therefore, by decreasing the number ofstages with combining them together, overall efficiency can be improved [44, 45].As seen above, there are different techniques that can be incorporated to increase the efficiencyof power converters. Each of the mentioned methods can be applied in different applications, butthere are some approaches that make more sense in particular cases. In addition, a combinationof the presented methods can be utilized together which in many applications is beneficial towardhaving a better performance and efficiency in the system.As stated, there are two applications that are considered in this work: wide range PFC appli-cation, and narrow range PFC converter. In the following subsections, these two applications arefurther studied with the related literature. A combination of the introduced power loss reductiontechniques has been used in each of the following parts.71.3.1 Wide Range PFC Conversion SystemThe utility power lines typically are 208VRMS, 230VRMS, 240VRMS, 277VRMS, or 480VRMS in differentgeographic locations. This diversity in voltage levels is mainly because of the variation in the utilityconnections in the point of load. For example, if there is a transformer with a Y connection at theoutput where the system is going to be installed, there are multiple ways to connect the powersupply as opposed to having a delta connection at the end. In other words, if the power line has a Yconnection structure with earth, the converter can be connected to a line-to-line voltage of 208VRMS.On the other hand, if there is a delta connection at the secondary of the transformer at the end of theline, the designers can expect voltage levels of up to 480VRMS line to line which the rectifier shouldsupport. In other delta connections, voltage levels of 240VRMS can be expected as well which alsoenables the designers to have access to 120VRMS in a split-phase connection in low power levels,usually less than 5kW .As mentioned, there are multiple RMS voltage levels that rectifiers should support dependingon the network that they have access to. For instance in telecom applications, there are multipleproducts for different power grid configurations in the market even from a single manufacturer [46–48]. Maintaining all of these products results in multiple Stock Keeping Units (SKU) of productsfor different applications which increases the costs in the industry significantly.Having a single product that can support the whole input voltage range decreases development,manufacturing, inventory, and maintenance costs in the industry [49]. The required input voltagerange to support all of the line voltages is 208VRMS− 10% to 480VRMS + 10% which requires aconverter to work with an extended input range of 187VRMS to 530VRMS. Also in some telecomapplications, the PFC converters are required to work from 90VRMS to 187VRMS with a de-ratedpower range. Therefore, the required range of operation is 90VRMS to 530VRMS if a single converteris used.A conventional converter in this wide range cannot provide a flat and high-efficiency curve indifferent operating points. Therefore, there should be some approaches to keep the performancehigh in all of the range. As stated, one of the important features of a converter is the size of themagnetics. This characteristic is especially important in a wide range of operations because the8magnetics are exposed to an extended range of voltages which increases the current stress resultingin higher losses. Having a wide gain AC/DC PFC conversion system being able to cope with a widerange of variations in the input voltage and loads is studied in the following paragraphs. Theseconverters are presented from the papers and patents in the literature.The first option for supporting the wide gain operation is to have a variable DC link voltagein the system. There is usually an isolated DC/DC converter working as the second stage after theAC/DC converter in a PFC conversion system. This DC/DC converter is responsible for providingthe isolation and the output regulation. This solution requires a normal gain in the AC/DC stage andthus it can support the wide range operation using a wide gain DC/DC converter as the second stage.This means the DC link voltage changes in different line voltage RMS values. A variable DC linkapproach has been used in the PFC converter proposed in [20]. In this converter, the DC link voltagechanges based on the input voltage value which helps to keep the efficiency high and inductorripples low in different conditions. This converter, however, transfers the wide gain regulation tothe DC/DC stage and requires further control implementation which the mentioned paper has notaddressed. Resonant LLC converters are mostly used in the conversion systems as the second stageafter the PFC converter. Resonant converters have excessive conduction losses and other sorts ofproblems when working with a wide range of variation [50–53]. There are a number of ideas in theliterature to enhance the operation of the LLC resonant converters to enable them to work with awide gain while keeping their performance as high as possible [54–61].In the second option, a wide gain AC/DC PFC converter is used to support the wide gain op-eration with a constant DC link voltage. Incorporating this option requires the AC/DC converterto operate with a 530VRMS input feed which causes a PFC boost converter to deliver an 800VDClink. This high voltage bus decreases the efficiency in the boost converter in lower line voltages.This is mainly because of higher voltages across the inductor resulting in higher current ripplesthat mainly increase the conduction losses. Therefore, the PFC converter cannot maintain high effi-ciency throughout a wide input range. As a result, some approaches should be used to minimize theadded conduction losses in low voltages. There are limited solutions in the literature to maintainhigh efficiency in a very wide input voltage range while simultaneously providing a unity power9factor at the input [49, 62, 63]. A wide input voltage range PFC converter based on a flying ca-pacitor converter is proposed in [62] with 200VRMS and 415VRMS as input voltages. This convertertopology exerts low voltage stress on the semiconductors and requires only a small inductor. How-ever, the measured efficiency is low, the number of the components is high, the control algorithm iscomplicated with balancing issues for the output capacitors, and there is no mechanism for startupinrush current 2 protection. This form of inrush current flows through the circuit at the startup,when the input voltage rises from zero. This phenomenon results in a current spike in the compo-nents and also an unwanted resonance in the passive circuit elements that increases the voltage inthe circuit, sometimes even to more than twice the nominal values. This inrush current should belimited to protect the elements at the startup. A high voltage power converter with a configurableinput is proposed in [49] to support a wide range of input voltages from 180VRMS to 528VRMS.This converter changes its configuration in different input voltages using additional switches at theinput. The voltage stress of the semiconductors in this converter is low, and the inductor size issmall. However, the number of the components is high and requires two isolated DC/DC converterafter the PFC stage. This converter also suffers from inrush current issues at startup and commonmode interferences. An adaptive PFC converter is proposed in [63] with 80VRMS− 520VRMS inputvoltage range which changes its structure in different input voltages with a range switch. This con-verter has a simple and effective structure as well as a small inductor in its design. Nonetheless,this structure does not regulate the output voltage in the whole input voltage range which transfersthe regulation burden to the DC/DC stage. Also, this structure does not provide a common modeconnection between the input and output ports in some of its operational modes. In addition tothe above characteristics, the converters in [49, 62, 63] all have additional losses because of thefull-bridge diode rectifier as their input stage.There are also other types of converters in the literature which exhibit some useful featuresin a wide input voltage range application, but have not been experimentally tested in the requiredrange (90VRMS− 530VRMS) [17–20, 64–76]. Converters based on Single Ended Primary InductorConverter (SEPIC), CUK, and buck-boost structures can be used for the wide-input range appli-cation [64–67]. These types of converters can have a lower bus voltage compared to the boost2Inrush current is defined in Appendix A10typed converters. On the other hand, the voltage and current stress on the semiconductor switchingelements are higher resulting in increased conduction losses; therefore, these types of structuresare not suitable for higher power applications. Back-to-back buck and boost converters are othercandidates that utilize a lower bus voltage as proposed in [68, 69]. These converters can have agood performance in wide input conditions, but they have a two-stage structure in the PFC stagealone which needs more components and introduces more conduction losses.Flexible PFC converters can be employed as in [70–76]. The voltage stress of the semiconduc-tors in these converters is low and the inductor size is small; however, the number of the componentsis higher than the other options. These converters also suffer from inrush current issues at startup,complex control algorithms, and common mode interferences. These restrictions limit the usageof these kinds of structures in the wide input range PFC applications. Other types of configurableboost converters can also be employed in wide range PFC applications proposed in [17–19]. Thecircuit presented in [17] changes its structure in different input voltage levels to provide high ef-ficiencies throughout the entire operating range. Nonetheless, this converter cannot improve theinductor current ripple in high input voltages which is the same performance as the conventionalboost converter.Based on the required specification in the input voltage and the efficiency requirements, thereis a need for an extended input voltage range PFC converter. This converter should have a high effi-ciency throughout the wide input range and features low input current ripple which translates intolow conduction losses and low Total Harmonic Distortion (THD). Reduced ripple in the inductorcurrent enables the designer to use a smaller inductor in the design compared to a traditional boostconverter. In addition, this converter should have an inrush current handling capabilities as well asgood Electromagnetic Interference (EMI) 3 behaviour to be able to be adopted in the industry veryfast. The latter might require a line-frequency connection between the input and output ports whichreduces the common-mode noise.3EMI and common mode noise are defined in appendix B111.3.2 Narrow Range PFC Conversion SystemAs stated in the previous subsection, having a single converter that is able to support a wide rangeof gain variations decreases the costs in telecom applications. On the other hand, wide-rangeconverters are not always needed in other applications. Commercial electronics such as notebookadapters, LCD TVs, flat screens, and OLED lighting panels are some of those [77–81]. Theseapplications require a narrower range of variations in the input voltage.In this subsection, high-efficiency narrow range PFC converters are reviewed in the literature.One or more of the efficiency enhancement approaches discussed above are used in each of thesystems that are mentioned in this subsection [82–94]. Since the range of operation is not as wide asthe previous application, a bigger combination of the aforementioned methods can be used. Havinga tighter operational range enables the designers to enhance the performance of the converters evenmore. One of the most important techniques that can be utilized is soft switching.As stated, one of the components of power loss in a converter is switching loss. Switchinglosses happen in the semiconductors of the circuits. Switching losses are shown for a MOSFETin Fig. 1.3 and calculated in (1.2). As seen in (1.2), switching losses are proportional to theswitching frequency of the converter. Therefore, if the switching frequency is increased, powerlosses in semiconductors go up as well. This restricts the designers from increasing the switchingfrequencies in hard switching converters. On the other hand, if there are some mechanisms inconverters to reduce or eliminate the switching losses, the switching frequency can be increasedgreatly by using the right components.Increasing the switching frequency enables the designers to use smaller magnetics and capaci-tors [14]. Therefore, soft-switching converters with no or limited switching losses can have poten-tially higher switching frequencies and smaller passive components. On the other hand, providingsoft-switching for the semiconductors in the circuit could significantly reduce the conducted andradiated EMI in a power converter [95]. This leads to having smaller EMI filters in the structurewhich also reduces the total volume of the converter.There are two types of soft switching techniques presented in the literature: providing soft-switching for the Pulsed Width Modulation (PWM) converters with the constant switching fre-12quency, and resonant-based approaches with variable switching frequency. Solutions based onconstant switching frequencies usually need bigger sizes of inductors at the input [96]. While vari-able switching frequency converters usually have smaller inductors used as resonant components,not as passive filter elements [97–102]. So potentially, the variable switching frequency convertershave lower volume and weight. In [97, 98], isolated resonant converters are studied. They suf-fer from lower efficiencies than their non-isolated counterparts because of the transformer losses.Therefore, it is better to use a non-isolated converter as a front-end PFC converter. Since a DC/DCconverter as the second stage is needed to provide the voltage regulation for the load, this sec-ondary converter can provide the required isolation at the same time. In [99, 100, 103], a resonantbridgeless PFC converter is proposed based on a resonant SEPIC converter. These converters havebridgeless structures, easy control with inherent PFC and soft-switching capability. However, someof the SEPIC structure’s problems still exist like the higher stress of the components, the bulky ca-pacitor in the SEPIC structure, and also limited soft-switching capability. In [101, 104], the sameidea is presented in which soft-switching condition is provided by using an extra switch. So, thenumber of active elements is increased as well as the gate circuit required for the added semicon-ductors. A bridgeless resonant buck PFC converter is introduced in [102]. This converter providessoft-switching conditions for the semiconductor elements and has inherent PFC capability. There-fore, the current loop can be removed in the controller, making the controller circuit very simple.A similar concept has been proposed in [105] for a Buck converter with inherent PFC capability.However, in zero-crossing points of the input voltage, when the output voltage is higher than theinput, the input current is zero for a high fraction of the period. Therefore, it needs large filterelements in order to compensate for the lower power factor when the output voltage is high. Thisconverter also draws a discontinuous current at the input, increasing THD and reducing the powerfactor.In order to solve the mentioned problems in the reviewed literature and increase efficiency, sev-eral methods need to be combined. This requires a simple converter that combines the bridgeless,interleaving, and soft-switching approaches all in a single converter. The resonant concept shouldbe also used to provide soft-switching for the semiconductors to minimize the cost by not adding13auxiliary components to the structure. Moreover, the control circuit should be simplified to de-crease the cost and control complexities. So a bridgeless resonant boost rectifier with inherent highPower Factor (PF) capability is proposed in this work to provide all of the benefits.1.4 Contributions of the WorkIn order to improve efficiency in wide-range and narrow-range applications, different variety ofapproaches are mixed together. The mentioned applications are served with novel ideas each com-prising different methods to improve efficiency and performance. The main contributions of thiswork are the following:1.4.1 Reconfigurable PFC converter for a wide range applicationThe first step of this work involves developing a new reconfigurable structure for a wide-range PFCapplication. As mentioned in Section 1.3, a reconfigurable structure changes its configuration indifferent operating points to accommodate a wide range of operations. This idea is illustrated asblock diagrams in Fig. 1.4. An AC/DC PFC conversion system that has an ability to have a highvoltage DC link with high efficiency throughout the entire wide input voltage range from 90VRMSto 530VRMS is proposed as part of this work.Proposed Wide gainAC/DC ConverterConventional IsolatedDC/DC ConvertervacCDCRLConstant DC link Voltagewideinput voltagerangeFigure 1.4: Block diagram illustration of the proposed idea to support the wide input voltagerange application.This system has a constant 800VDC as the DC link voltage which makes it easy for an isolatedDC/DC converter to work as the second stage after the PFC. This PFC converter has a reconfigurablestructure that adapts to the input voltage RMS value in different operating points. Therefore, theefficiency is kept high even in low line voltages. This converter requires a small inductor withlimited current ripples. In addition, this converter has inrush current handling capability and a linefrequency connection between the input and output ports. The operation of this converter is given14in Chapter 2 of the presented research.1.4.2 High-efficiency LLCC resonant concept for narrow rangeapplicationsA resonant concept is developed for narrow input voltage range applications in Chapter 3. Sincethe performance of a PFC converter is changing at different points in a line cycle because of thevariations in the input voltage instantaneous value from zero to its peak, it is necessary to take acloser look into each of the operating points with different input voltage DC values. Therefore, theresonant concept developed in this work for narrow range applications is first analyzed with a DCinput voltage in a DC/DC application. Then, the developed resonant concept is modified to work inan AC/DC application which is discussed in the next subsection.AC/DC PFC converters are mostly based on a DC/DC structure [106–111]. For example, con-ventional boost PFC converter consists of a full-wave diode bridge followed by a DC/DC boostconverter [112]. Even bridgeless or semi-bridgeless boost PFC converters are based on a DC/DCboost converter [111]. Therefore, if the purpose is to theoretically analyze a PFC converter, it is bet-ter to start with the DC/DC version of that converter. Hence, the proposed resonant PFC for narrowrange applications is studied in the DC/DC form first.Since the proposed soft-switching PFC converter for narrow range applications has a new struc-ture with a high-performance resonant tank, it can be used in multiple different applications. There-fore, this structure can be adopted in a DC/DC converter as well to work as a distributed Photo-voltaics (PV) connection converter [113–115]. The advanced LLCC resonant boost approach isfully discussed in Chapter 3 of the work. The experimental analysis of the proposed method isanalyzed in a DC/DC converter in Chapter 3 to fully investigate other applications in which theproposed method can be useful. The block diagram of the proposed LLCC resonant boost DC/DCconverter is shown in Fig. 1.5(a).15Proposed bridgelessLLCC Resonant Boost AC/DC ConvertervacCDCRLnarrowinput voltagerangeProposed LLCC Resonant Boost DC/DC ConvertervdcCDCRLnarrowinput voltagerange(a)(b)Figure 1.5: Block diagram illustration of the proposed idea to support the narrow input volt-age range application. a) The advanced LLCC resonant boost DC/DC converter, b) theadvanced bridgeless LLCC resonant boost DC/DC converter.1.4.3 High efficiency LLCC resonant PFC converter for narrow rangeapplicationsIn the final stage of this work, a new resonant structure for a narrow range PFC application is de-veloped. This converter is the bridgeless AC/DC version of the LLCC resonant boost convertermentioned in the previous subsection. This converter provides soft switching for all of the semi-conductors by utilizing the passive elements in its structure without having to add additional com-ponents. In addition, this converter has a simple and bridgeless structure which requires a simplesingle-loop control. This converter has an inherent high power factor in the input without the needfor a dual-loop control structure. The block diagram of the proposed bridgeless AC/DC LLCCresonant boost structure is illustrated in Fig. 1.5(b).Since this proposed method incorporates the resonant behaviour of the passive elements of thecircuit, theoretical analysis of the structure is of great importance. Therefore, the switching cycleperformance of this structure is first discussed in Chapter 3. In this chapter, the performance ofthe proposed LLCC resonant structure will be analyzed in a DC/DC structure to make it easier for16the reader to follow. The performance of this structure in the narrow range AC/DC PFC applicationwill then be given in Chapter 4. In Chapter 4, the analytical behaviour of the proposed method isanalyzed thoroughly in the context of an AC/DC system.1.5 Dissertation OutlineIn Chapter 2, the wide input voltage application is elaborated along with the required PFC converterto support this range. Then a PFC system is suggested to provide high efficiency and performancethroughout the wide range. This solution contains having a PFC converter to be able to provide aconstant regulated DC bus voltage in a wide range of variations in the input line voltages. ThisPFC converter is then discussed thoroughly in different operating points with different values ofinput voltages. The performance of this converter is then verified with an experimental analysisand compared to a conventional circuit in the industry.In Chapter 3, a new resonant structure for narrow-range applications is proposed with the de-tailed operation, and also simulation and experimental results. This structure is first explained ineach switching cycle with the related operational intervals. This is enough to discuss the operationof this resonant structure in a DC/DC example.In Chapter 4, an AC/DC version of the proposed resonant converter is developed for narrow-range applications. The AC/DC converter is then analyzed in different line cycles. The AC/DCresonant PFC converter then is tested in the required conditions and the experimental results arereported. The performance is also compared with a conventional circuit as a benchmark.Chapter 5 contains the relevant conclusions, contributions, and planned areas of future work.The work contributes significantly to the field of efficient PFC AC/DC systems in different applica-tions including narrow range and wide range. The contributions are highlighted in seven relevantpublications in IEEE Transactions journals and international IEEE conference papers.17Chapter 2Reconfigurable Bridgeless AC/DC Converterfor Wide Input Voltage Range Applications1One of the applications that attracted lots of attention in the industry is a PFC conversion systemwith a wide AC input voltage range. It is especially of importance in telecommunication applica-tions with a required AC input voltages of 90VRMS to 530VRMS. Since the AC voltage variation iswide, traditional PFC converters cannot have high efficiency in the whole range. Therefore, newsolutions should be proposed to improve the efficiency and performance in this wide range. One ofthe options to cope with a very wide range of operation is to have a PFC converter that can supportthis AC input variations with a constant output or DC bus voltage.In this chapter, two structures are proposed to tackle the operations of applications with a widerange: a basic flexible PFC converter, and an advanced reconfigurable PFC structure. Both of thesestructures are theoretically analyzed with related benefits and drawbacks. The advanced structureis based on the basic configuration with improved performance. Then, the advanced structure istaken to the next step by being mathematically analyzed.This advanced PFC circuit can support the wide input voltage range from 90VRMS to 530VRMSwith great performance. The proposed converter maintains high efficiency throughout the wideinput range and features low input current ripple which translates into low conduction losses andlow THD. Reduced ripple in the inductor current enables the designer to use a smaller inductor in the1Portions of this chapter have been published in [1, 2]18design compared to the proposed basic converter and also the traditional boost converter. Besides,the proposed advanced converter has a path for inrush current2 at startup and during line surges andoffers line-frequency connections between the input and output ports which reduces the common-mode noise. The last two features are beneficiary for an industrial PFC solution. Moreover, thepresented converter has a simple and bridgeless structure in hardware and requires simple controlstrategies. Based on the given equations in this chapter, an example of the advanced PFC circuit isdesigned for a 2kW prototype and also compared to the conventional circuits as the benchmark.In Section 2.1, more information is given about the wide input voltage range application. Thissection also talks about the conventional solutions in the industry and the advantages and disadvan-tages of these methods while facing a wide range of variations in the input. Section 2.2 discussesthe operation of the proposed basic flexible converter based on the voltage doubler boost structure.This is a basic structure with many advantages and some disadvantages for the wide input voltagerange application. In Section 2.3, an advanced structure is then proposed that solves most of thedisadvantages of the aforementioned basic flexible PFC converter. In this section, the operationof the advanced extended range reconfigurable converter is described along with the related equa-tions. Design considerations for the advanced reconfigurable idea have been presented in Section2.4. Experimental results for this converter are shown in Section 2.6 for a 2kW prototype. Aspart of the validation, the current ripple of the proposed advanced converter, the efficiency, and thepower factor is compared with the traditional totem pole boost PFC converter’s as a benchmark indifferent input voltages and output power levels.2.1 Wide Input Voltage Range Application and ConventionalMethodsUtility voltage levels have many variations in the Root Mean Squared (RMS) value in different geo-graphical locations just in North America. This is mainly because of the different grid connectionsat the point of the load. In some areas, because of the available Y connections in the secondary ofthe grid transformer, the consumer has access to the line-to-lone voltages as well as line-to-neutralvoltages. This enables the designer to have the freedom of choosing which voltage to use. How-2Inrush current is defined in Appendix A19(e) Three phase high leg Delta240/120Vac high leg Delta(a) Single phase120/240Vac(b) Three phase Y208Y/120Vac or 480Y/277Vac(c) Three phase ungrounded Delta240Vac or 480Vac Delta120VacB to N208VacA to B208VacB to C208VacA to C120VacA to N120VacC to NA BCN120VacL1 to N240VacL1 to L2120VacL1 to NL1L2N240VacA to B 240VacB to C240VacA to CABC(d) Three phase corner ground Delta240Vac or 480Vac Delta240VacA to B 240VacB to C240VacA to CABC240VacA to B 240VacB to C240VacA to C120V C to N120V A to NABCNFigure 2.1: Common North American voltage systems: a) single phase 240Vac line-to-lineor 120Vac line-to-neutral or split-phase, b) three phase Y connection including groundwith 480Vac or 208Vac line-to-line, and 277Vac or 120Vac line-to-neutral, c) three phaseungrounded Delta with 240Vac or 480Vac line-to-line, d) three phase corner groundedDelta with 240Vac or 480Vac line-to-line, and e) three phase high leg Delta with 240Vacline-to-line or 120Vac line-to-ground.ever, if the three-phase connections of the output wires in the grid transformer are delta, line-to-linevoltage is the only voltages that can be accessed. In some other conditions, the neutral is also avail-able in a delta or Y connection which gives more options to connect to. Different grid connectionsin North America are illustrated in Fig. 2.1.20As seen in Fig. 2.1, there are different options in utility grid voltages. As shown in Fig. 2.1(a),sometimes the consumer has only access to a single phase connection with a split phase options. Inthis case, the Alternating Current (AC)/Direct Current (DC) converter can be connected to 120Vacor 240Vac. If the connection available at the point of load is as illustrated in Fig. 2.1(b), thePower Factor Correction (PFC) converter can be connected to 120Vac or 208Vac, and in some otherlocations 277Vac or 480Vac depending on the grid. If the available connections in the grid are delta,Fig. 2.1(c), Fig. 2.1(d), and Fig. 2.1(e) are the cases that the consumer might face. As seen in thesefigures, 120Vac, 240Vac, and 480Vac are the RMS voltage levels that are available to use dependingon the grid connections and the presence of neutral.Telecommunication AC/DC PFC converters are designed in two different ranges: low input volt-age range which is typically from 187VRMS to 277VRMS, and high voltage levels in the range of480VRMS± 10% [46–48]. In addition, the low-end range also supports the range of 90VRMS to187VRMS with de-rated power levels. The industry undergoes a high cost to maintain all theseproducts in different steps of manufacturing and installation.If there is a single-phase converter that can support all of the aforementioned voltage levels, thecosts of having many different products in the industry are reduced significantly especially in thetelecommunication sector. The required range for this single circuit is from 187VRMS to 530VRMSwith de-rated power from 90VRMS to 187VRMS. This enables the manufacturer to only invest indeveloping a single platform that can be installed in many different locations with small changes.Three single-phase circuits with these descriptions can be also installed in a three-phase platformin higher power levels. In order to develop a suitable wide range PFC converter, it is necessary totake a look at the existing solutions in the industry and examine the option of using those in suchan extended input voltage range.Boost based converters are typically used as the PFC stage in telecom applications. Thesecircuits are based on the boost converter. popular boost-based PFC converters in the industry areshown in Fig. 2.2. Fig. 2.2(a) is the simplest boost PFC converter. This circuit consists of a full-wave diode bridge (D1−D4) followed by a boost converter. This structure is quite old with manydisadvantages such as higher number of components, and high conduction losses because of the21S2S1LCoRLD1vacD2L1L2S1S2CoRLD3D4D1D2vacS1LCoRLD1vacD2 D5D3D4(a) Conventional full diode bridge boost PFC converter(b) Conventional bridgeless totem pole boost PFC(c) Conventional semi-bridgeless boost PFCFigure 2.2: Conventional PFC converters based on boost structure: a) full diode bridge boostAC/DC converter, b) bridgeless totem pole boost PFC structure, c) semi-bridgeless boostPFC configuration.diode bridge. Circuits shown in Fig. 2.2(b) and Fig. 2.2(c) are more prevalent in the industrynowadays. Fig. 2.2(b) presents the bridgeless totem pole boost structure. This converter has alsobeen used with two Metal Oxide Semiconductor Field Effect Transistor (MOSFET)s instead of therectifying diodes D1 and D2. Fig. 2.2(c) shows the semi-bridgeless boost converter which is alsoused in many PFC converters in the market.These boost based converters all need to have an output voltage level higher than the peak of theinput AC voltage. Therefore, if they are used in a wide input voltage range of 90VRMS to 530VRMS,22the output voltage should be higher than the peak of the maximum input voltage peak which is530VRMS×√2 = 750Vpeak. This is of course if the designer tries to have a regulated constant DCbus voltage throughout the range. If the DC bus voltage of 800VDC is selected, the converter shouldregulate this voltage in all of the conditions. So, if the input voltage is in the low-end range (90VRMSto 2770VRMS) the converter experiences huge conduction losses because of the higher current RMSvalues and huge current ripples.The duty ratio and the ripple of the boost inductor’s current are shown in (2.1) and (2.2), respec-tively. In these equations, |vin| is the absolute value of the input voltage, vo is the output voltage, Lis the inductance, and fsw is the switching frequency.:Dboost = 1− |vin|vo (2.1)∆iLboost =|vin|(1− |vin|vo )L fsw(2.2)Inductor current ripples contribute greatly to power losses in the converter. Current ripples in theinductor of the boost based PFC converters in Fig. 2.2 has a second-order polynomial relationshipwith the ratio of the input to output voltage, vinvo . Ripples versus this ratio are shown in Fig. 2.3for a conventional boost converter. This switching frequency ripple produces conduction losses inthe inductor as well as additional core losses. This is because core losses mostly depend on themaximum flux density of the core which has a relatively linear relationship with the current peak.Inductor current peak is the summation of the biased current and the high-frequency component ontop of that. Therefore, if the ripple goes high, the peak increases resulting in higher flux density andthus higher core losses. In addition, with higher current ripples in the inductor, additional lossesoccur in other components of the circuit such as switches, diodes, and even capacitors. One of theways to increase the efficiency is to decrease the amount of the inductor current ripples in the boostconverter.230 0.25 0.5 0.75 10Conventional boost converterDoubler boost converterFigure 2.3: Switching frequency inductive current ripples in a conventional boost converterversus a voltage doubler boost converter.2.2 Principles of Operation for the Basic Flexible PFCConverter for Wide Input Voltage Range OperationsOne of the ways to decrease the switching ripples in the inductor is to use topologies other thanthe boost converter. Voltage doubler boost converter is one of these topologies that can introduceless ripples in the inductor which improves the losses significantly. This converter puts less voltagestress across the inductor in each of the sub-intervals in a switching cycle. Having less voltageacross the inductor results in having lower ripples. For example, in a boost converter when theswitch is off, the output voltage would be across the inductor. On the other hand, in a voltagedoubler boost converter, when the switch is off, the voltage across the inductor is half of the outputvoltage. This way, the voltage doubler boost structure can decrease the high-frequency ripplesresulting in having less conduction losses in the inductor and also other parts of the circuit.A new converter is proposed in this work that works based on the voltage doubler boost con-verter as mentioned. This converter is shown in Fig. 2.4(a). This converter has two modes ofoperation. One mode, which is suitable for low input voltages with VinPeak < Vout2 , is called the dou-bler mode. That’s because the converter in this condition reconfigures itself to the circuit shownin Fig. 2.4(b) which is a voltage doubler boost converter. This transition occurs with the help of a24(a) Doubler reconfigurable wide range PFC converter(c) Bridgeless boost or totem pole boost modeS2S1D1LvACD2RLCO1CO2+-(b) Voltage doubler modeS2S1D1LvACD2RLD3D4CO1CO2+-KKKS2S1D1LvACD2RLD3D4CO1CO2Figure 2.4: a) The proposed basic flexible wide-input voltage range PFC converter. b) Whencontact K in the relay is closed (K is open), the proposed rectifier is in the doublermode, working with low input voltages (VinPeak < 12Vout). c) When contact K in therelay is open (K is closed), the proposed PFC converter is working in the bridgelessBoost mode with high input voltages (VinPeak > 12Vout).three contacted relay which is shown with K and K in Fig. 2.4(a). Since the voltage doubler boostconverter only functions when the peak of the input voltage is less than half of the output voltage,the converter should switch to another mode at high input voltages when VinPeak > Vout2 .At high input voltages or once VinPeak > Vout2 , the proposed converter in Fig. 2.4(a) switchesinto the bridgeless boost or the totem pole boost mode shown in Fig. 2.4(c). This happens whenthe contact K gets open and contacts K get closed. Therefore, the difference between the proposedbasic converter and the boost converter is in low input voltage modes.The voltage of the output caps, as well as the input voltage and current, are shown in Fig. 2.5(a)25(b) Bridgeless boost mode operational waveforms2TlineTline0Vout0.5Vout0voutvCo1 , vCo2∆vout<< Vout∆vcap<< Vout(a) Voltage doubler mode operational waveform2TlineTline02TlineTline0Vout0.5Vout0viniinvoutvCo2vCo1∆vout<< VoutCO2 is chargingCO1 is charging∆vcap<< VoutFigure 2.5: Line-frequency scale Waveforms of the proposed basic flexible wide-input volt-age range PFC converter in the a) low voltage mode and b) high voltage mode.26and Fig. 2.5(b) for the voltage doubler mode and the bridgeless boost mode, respectively. As seenin these figures, the DC values of the capacitors’ voltages remain constant in both of the modesif the capacitors are equal. But the AC components of their voltages is higher in doubler modecompared to the boost mode. This is mainly because each output cap is responsible for providingthe output current during an interval of the line cycle. The series combination of the output caps isresponsible for providing the output current when the input power is less than the average [2].Although the voltage ripple across each of the output caps in doubler mode is higher thanthe ones in the boost mode, the total output voltage ripple is the same in both cases with similarconditions. In other words, using the doubler mode does not increase the total output voltage ripplesand does not force the designer to use bigger capacitance. The only downside of the doubler modeis higher RMS current in each of the caps.In order to better understand the behaviour of the proposed basic flexible PFC converter, differ-ent operating modes should be more investigated in each of the switching cycles. The behaviour ofthe converter is varied in each of the modes resulting in different voltage levels across the inductor.These modes are investigated in details in the following subsections:2.2.1 Mode I: Doubler mode at low input voltages (VinPeak < 12Vout)When the input voltage of the basic flexible converter is significantly lower than the output voltage(vinPeak < 12Vout), the efficiency of the boost converter is reduced considerably. This is mostlybecause of the higher conduction losses in the circuit. In this case, the relay contact K can beclosed and K be open. As a result, the converter acts like a bridgeless voltage doubler boost. Thecircuit schematic is shown in Fig. 2.4(b). As illustrated in Fig. 2.6(a), in the positive half-linecycles, S2 is the switch for the Boost, and D4 is the related diode. Besides, D2 is the line frequencydiode which is always on in the positive half-line cycles. As seen in Fig. 2.6(a), in the positivehalf-line cycles, the proposed converter only charges one of the output capacitors CO2, while CO1discharges. Theoretical waveforms of the converter in this mode are shown in Fig. 2.5(a).In the negative half-line cycles, S1 is the switch and D3 is the diode of the Boost converter. Theschematic of the converter in the negative half-line cycles is shown in Fig. 2.6(b) for both of theON and OFF states. Diode D1 is the line frequency diode which is kept on in the negative half-line27(a) Doubler mode (low Vin) in positive half-line cycle(b) Doubler mode (low Vin) in negatative half-line cycle+-S2S1D1LvACD2RLD3D4CO1CO2+-S2S1D1LvACD2RLD3D4CO1CO2+-S2S1D1LvACD2RLD3D4CO1CO2ON State OFF State-+S2S1D1LvACD2RLD3D4CO1CO2-+S2S1D1LvACD2RLD3D4CO1CO2-+S2S1D1LvACD2RLD3D4CO1CO2ON State OFF StateFigure 2.6: The basic flexible PFC converter in mode I: Voltage doubler boost mode in theproposed converter when the input voltage is much lower than the bus voltage (VinPeak <Vout2 ) at a) positive half-line cycles, and b) negative half-line cycles.28cycles. Additionally, as seen in Fig. 2.4(c), in the negative half-line cycles, only CO1 is chargingand CO2 is discharging. Based on the volt-second balance equation in the inductor, the duty cycleof the converter, and the current ripples in the inductor can be calculated. Equations for the dutyratio and the current ripples of the inductor in the voltage doubler mode are shown in (2.3) and(2.4):Ddoubler = 1−2 |vin|vo (2.3)∆iLdoubler =|vin|(1−2 |vin|vo )L fsw(2.4)As seen in (2.3) and (2.4), the inductor current ripple is reduced in the doubler-mode comparedto the boost mode in (2.1) and (2.2) with the same input and output voltages. In other words, theinductor current ripples in the doubler Boost converter is less than the bridgeless Boost converterwith the same input and output voltages. Therefore, when the converter is working in lower linevoltages, it is beneficial to switch to doubler mode to have lower ripples and thus less conductionlosses.The inductor current ripples are illustrated for a doubler converter in Fig. 2.3 along with thegenerated ripples in the boost structure. Ripples in this figure are sketched versus the ratio of theinput to the output voltage. As seen in Fig. 2.3, the maximum current ripples in a doubler converteris half of the maximum ripple in a boost one. This certifies that using the doubler mode candecrease the switching frequency conduction and core losses compared to the boost configurationin the same conditions.There are some additional conduction losses in the basic flexible PFC system in the doublermode because of the diodes D3 and D4. D3 and D4 are 600V diodes with maximum voltage ofvout2 = 400V . This is with the assumption of having an 800VDC in the output. Since D3 and D4 are600V diodes, their forward voltages are less than the diodes with 1200V maximum voltages, andthus the added conduction losses are minimal.292.2.2 Mode II: Bridgeless boost mode at high input voltages (VinPeak > 12Vout)When the input voltage is higher than half of the bus voltage (VinPeak > 12Vout), the converter worksin mode I as a bridgeless boost PFC. This configuration is shown in Fig. 2.4(c). At this mode, S1 andS2 are the switches for the bridgeless boost converter, and D1 and D2 are the slow line-frequencydiodes. In the positive half-line cycles, S2 is the switch and S1 acts like a diode (Fig. 2.7(a)), andvice versa in the negative half-line cycles shown in Fig. 2.7(b). Also, as seen in Fig. 2.5(b), both ofthe output capacitors CO1 and CO2 are being charged and discharged synchronously by the circuit.On the other hand, in the doubler mode, each of these capacitors are charged in different half-linecycles. The duty cycle and the inductor current ripples are shown in (2.1) and (2.2) for boost modeoperation.As seen in (2.2), the inductor current ripple while working in the Continuous ConductionMode (CCM) is a function of the input and output voltages, the inductance, and the switchingfrequency. If the ratio of the input to output voltage is decreased, like in lower input voltages, theripple in the inductor’s current increases. As a result, the conduction losses in the inductor and thesemiconductor elements would be higher which restricts the efficiency in the lower line values. Thewaveform of the current ripples of the inductor in this mode is shown in Fig. 2.3 along with thedoubler mode curve. As seen in this figure, the boost mode would generate higher ripple contentcompared to the doubler mode in the same input/output conditions.2.2.3 Improving the basic flexible PFC wide-range converterThe proposed basic flexible wide-range PFC converter can effectively decrease the current ripplesin the inductor in low input voltages. However, this converter switches into boost mode at highinput voltages with VinPeak > 12Vout . This means that this converter is not able to reduce conductionlosses at high input voltages compared to the boost converter. This feature can be seen in Fig.2.3. As seen in this figure, the voltage doubler mode can only operate at low input voltages withVinPeak < 12Vout .The other drawback of the proposed basic flexible converter is the absence of the common-modeconnection between the input and the output ports. As seen in Fig. 2.4(b) and (c), the input/output30(a) Bridgeless boost mode (high Vin) in positive half-line cycle(b) Bridgeless boost mode (high Vin) in negatative half-line cycle+-S2S1D1LvACD2RLCO1CO2S2S1D1LvACD2RLCO1CO2+-+-S2S1D1LvACD2RLCO1CO2ON State OFF State-+S2S1D1LvACD2RLCO1CO2-+S2S1D1LvACD2RLCO1CO2S2S1D1LvACD2RLCO1CO2+ -ON State OFF StateFigure 2.7: Mode I: Bridgeless Boost mode in the proposed converter when the input voltageis higher than half of the bus voltage (VinPeak > 12Vout) at a) positive half-line cycles, andb) negative half-line cycles.31common-mode connection is not happening at high input voltages in the boost mode. Althoughthis connection exists in the doubler mode shown in Fig. 2.4(b), no low frequency connection isseen in the boost mode shown in Fig. 2.4(c).Another way that the existing flexible basic converter can be improved is by removing the threecontacted relay in its structure. As seen in Fig. 2.4(a), the basic flexible PFC converter changesits modes with the help from a relay. This relay is costly and has less reliability compared tosemiconductors in the circuit. Therefore, a better solution would remove this component from thecircuit in the next version.Another important characteristic that industrial circuits should have is the ability to handleinrush currents, especially at startup. For example, in a boost converter as shown in Fig. 2.2(a) ifthe output capacitor is discharged completely when the switch turns on, there will be a resonantbetween the inductor and the output capacitor [116]. This resonance causes the output capacitor’svoltage to exceed twice the input voltage at that instant. This might results in the voltage across theoutput capacitors to exceed their maximum value and damage them permanently. Therefore, thereshould be some extra components to stop the output voltage to go higher than a safe threshold.Adding a diode in the conventional boost converter from the input to output helps relieve the stressin this converter. This diode will only work at the startup or when the input voltage has an inrushvalue more than the output voltage. In normal conditions, this diode will not affect the operations.The advanced version of the wide-range PFC converter should have this ability to handle inrushcurrents automatically at any given time.The mentioned characteristics can be added to the proposed basic structure with some modifi-cations. The next version which is called the advanced configurable PFC circuit is fully described inthe next section. Section 2.3 discusses the configuration of this structure along with its operation.2.3 Principles of Operation for the Proposed AdvancedReconfigurable PFC Converter for Wide Input VoltageRange OperationsThe rest of this chapter is dedicated to the proposed advanced reconfigurable wide-range PFC con-verter. This converter solves all of the drawbacks mentioned in subsection 2.2.3 about the basic32530VRMS430VRMSvin = 90VRMS 270VRMSLow Voltage PFC Range90VRMS-270VRMS High Voltage PFC Range≈480VRMS ±10%Extended AC Voltage Range90VRMS  to 530VRMSS2S1LC1C2RLD1vacD2K90VRMS-530VRMS High efficiencyORLow inductor current ripplesiLSmall indutorExtended vin rangeHigh voltage DC bus (800VDC)Figure 2.8: The proposed advanced reconfigurable PFC converter working with an extendedinput voltage range.flexible structure. The extended input voltage range PFC converter with advanced reconfigurablefeatures supports a wide input voltage range (90VRMS− 530VRMS). The proposed advanced con-verter needs a small inductor for its operation in the wide range because of the reduction in theinductor’s current ripples in all of the input voltage range compared to the basic converter in theprevious section and the conventional boost structure. Therefore, the proposed advanced convertercan provide a high-efficiency curve in the whole wide input voltage range. The advanced converterhas a reconfigurable structure in different input voltages with a bridgeless configuration that couldgenerate a high voltage DC bus in the output with 800VDC. The extended advanced input voltagerange PFC converter has a line frequency connection between the input and output voltage ports inall of the operating modes resulting in low common mode noise issues. In addition, the proposedadvanced converter has the ability to handle inrush currents to protect the critical components andalso to prevent overvoltages. In this section, the operation of the proposed advanced converter is33D4*D3*S2S1LC1C2RLD1vacD2K90VRMS-530VRMSVout = 800VDCProposed Advanced Reconfigurable PFC Converter* D3 and D4 are inrush current diodes(a) Proposed advanced reconfigurable PFC converter with an extended input voltage rangeS2S1D1LvacD2C1C2RL+-S4S3D5D6D3D4S1 & S2: 1200V SiC switchesD1 to D4: 1200V general purpose diodesS3 & S4: 600V general purpose switchesD5 & D6: 600V fast recovery diodes(b) Low Frequency Middle Switch optionS2S1D1LvacD2C1C2RL+-S6S5D3D4S1 & S2: 1200V SiC switchesD1 to D4: 1200V general purpose diodesS5 & S6: 600V SiC/GaN switches(c) High Frequency Middle Switch optionFigure 2.9: a) Proposed advanced reconfigurable PFC converter with an extended input volt-age range. Different possible configurations for the proposed advanced reconfigurablePFC converter: b) 1st method: the low frequency middle switch configuration with two600V general purpose switches and two 600V fast recovery diodes, c) 2nd method:the high frequency middle switch configuration with two 600V Silicon Carbide (SIC)switches.studied in different operating modes.The structure of the proposed advanced reconfigurable converter can be seen in Fig. 2.8. Asseen in Fig. 2.8, diodes D1 and D2 are the slow diodes for rectifying the input voltage in negativeand positive half-line cycles, respectively. L is the inductor of the structure. S1 and S2 are thesemiconductor switches. Output capacitors C1 and C2 are placed to filter out the line frequencyripple and the high frequency switching ripples.The proposed advanced structure has been shown in Fig. 2.9(a) with more details. Diodes D334and D4 in Fig. 2.9(a) are also line frequency diodes to limit the impact of the surge current fromthe source. In other words, these two components are not working in the steady-state operation ofthe converter and thus operate only when there is an inrush current flowing from the source. Withthe help of these two elements along with D1 and D2, the converter elements are not exposed tothe high-stress caused by inrush and surge currents. For example, during startup, the inrush currentflows through D1−D4 to charge the output capacitors which prevents the sensitive high-frequencyswitches from being exposed to this current pulse and does not allow the output capacitors toresonate with the input inductor which prevents the output voltage from exceeding the input voltagepeak value at the startup [116].Two different modulations are tested in the proposed advanced converter in Fig. 2.9(a). Therequirements for the semiconductors are different for each of these modulation methods. Therefore,there are two options for the switch network K shown in Fig. 2.9(b) and Fig. 2.9(c). In the firstoption shown in Fig. 2.9(b), two parallel unidirectional paths each comprising one diode and oneswitch (S3 with D5, S4 with D6) replaced K. In the second option demonstrated in Fig. 2.9(c), twoback-to-back switches (S5 and S6) are used to support the bidirectional flow of the current.Different states of operation for the proposed reconfigurable are shown in Fig. 2.10. As men-tioned, there are two different modulations are proposed for the advanced reconfigurable converter.These different modulations can be implemented in the same set of hardware but are optimizedwith some slight differences in the topology as shown in Fig. 2.9. But the general states of opera-tion are similar for both of the implementations. The configuration of the inductor in charging anddischarging modes is similar in both of the modulations as will be discussed later in the chapter.The proposed modulations are described in the next two subsections with related states of op-eration and equations. In order to make the analysis straightforward, the equivalent series resistorsof the capacitors and the inductor are neglected. In addition, for simplifying the analysis, semicon-ductors are assumed to be ideal. It is also assumed that C1 = C2, therefore the steady-state voltageacross each of these capacitors is equal to half of the output voltage.35LvacC1C2RL+ -(c) State 3(a) State 1LvacC1C2RL+- +-LvacC1C2RL(b) State 2LvacC1C2RL+ -(d) State 4LvacC1C2RL+-(e) State 5LvacC1C2RL+ -(f) State 6Figure 2.10: Different states of operations for the proposed advanced reconfigurable AC/DCPFC converter for a wide range application.2.3.1 First Modulation Method: Low Frequency Middle SwitchThe first modulation method is shown in Fig. 2.11. The circuit for this approach is illustratedin Fig. 2.11(a). The proposed advanced converter has two different modes of operation with thismethod. The presented structure works like a bridgeless voltage-doubler boost converter at low linevoltages (Vinpeak < Vout2 ). In this modulation method, the bidirectional middle switch, comprisingS3, S4, D5, and D6, is switched on and off in the middle of the half-line cycles at high voltage levels(Vinpeak > Vout2 ). With this approach, the input current ripples are reduced in high voltage modecompared to a traditional totem pole PFC converter. Therefore, the conduction losses decrease bothin the inductor and the semiconductors. In this configuration, slow MOSFETs with low RdsOn and36S2S1D1LvacD2C1C2RL+-S4S3D5D6D3D4(a) Circuit schematic at the first method of operation:Low Frequency Middle Switchvhigh inS4S2S1S4 S3 S3vout2i   inIntervalIIIIntervalIInterval IIIInterval IVIntervalIIIntervalIVvout2vinpeak >(c) Circuit waveforms Vinpeak > Vout/2vlow inS2S1S4 S3vout2vout2i   inInterval III Interval IVvinpeak <(b) Circuit waveforms Vinpeak < Vout/2Figure 2.11: The first modulation method in the proposed advanced reconfigurable PFC con-verter: Low frequency middle switch, which acts like a voltage doubler at low inputvoltage levels (Vinpeak < Vout2 ) and at high input voltage levels (Vinpeak >Vout2 ) it switchesbetween the voltage doubler and the totem pole in the middle of the half line cycleswith the help from the middle bidirectional switches (S3 and S4)37S2S1D1LvacD2C1C2RL+ -S4S3D5D6(d) Active elements in interval IV(ON state 3, OFF state 4)D3D4S2S1D1LvacD2C1C2RL+-S4S3D5D6(c) Active elements in interval III(ON state 1, OFF state 2)D3D4S2S1D1LvacD2C1C2RL+ -S4S3D5D6(b) Active elements in interval II(ON state 3, OFF state 6)D3D4S2S1D1LvacD2C1C2RL+-S4S3D5D6(a) Active elements in interval I(ON state 1, OFF state 5)D3D4Figure 2.12: Different intervals of operation in the first modulation method of the proposedadvanced reconfigurable PFC converter: Low frequency middle switch, which acts likea voltage doubler at low input voltage levels (Vinpeak < Vout2 ) and at high input voltagelevels (Vinpeak > Vout2 ) it switches between the voltage doubler and the totem pole in themiddle of the half line cycles with the help from the middle bidirectional switches (S3and S4)high reverse-recovery in the body diodes can be used for S3 and S4 as these switches are onlyswitching with the line frequency cycles. On the other hand, diodes D5 and D6 should have a lowreverse recovery as they are switching at the switching frequency levels. There are two differentmodes of operation, one at low line voltages shown in Fig. 2.11(b), and the other one at highline voltages, shown in Fig. 2.11(c). These modes are further explained in the remaining partof this subsection. The proposed advanced converter working with this method has four differentoperational intervals shown in Fig. 2.12.First modulation method in low input voltages with Vinpeak < Vout2 :When the input voltage peak value is less than half of the output voltage (Vinpeak < Vout2 ), the con-verter switches into low voltage mode operation. Circuit waveforms for this mode are shown inFig. 2.11(b). In this mode, the proposed advanced converter acts like a bridgeless voltage-doublerboost converter. Therefore, the proposed advanced converter has similar behaviour to the proposed38basic converter in Section 2.2 in low input voltages.As seen in Fig. 2.11(b), when the input voltage is positive, the converter works with activecircuit III shown in Fig. 2.12(c). In this interval, diode D2 is conducting, S2 is the switch ofthe boost converter, and since S4 is kept on, D6 is the diode of the boost. In this situation, aboost converter is formed in which the output voltage is the voltage across the output capacitorC2. Therefore the proposed converter is converting the input voltage into half of the output voltagewhich reduces the conversion ratio and the ripples, resulting in higher efficiency. The converter inthis interval works in states 1 and 5 shown in Fig. 2.10(a) and (e), respectively. The ON state (whenthe switch is on) is shown in state 1 and the OFF state (when the switch is off or the diode is on) isshown with state 5.On the other hand, when the input voltage is negative, the proposed converter works in intervalIV shown in Fig. 2.12(d). In interval IV, diode D1 is conducting, S1 is the switch of the boost, andbecause S3 is on, D5 is the diode of the boost converter. In this mode, switch S4 is on when theinput voltage is positive and S3 is on when the input voltage is negative. In this mode, the proposedadvanced converter acts like a bridgeless voltage-doubler boost converter in which the input voltageand output voltage of the boost structure are the line voltage and the voltage across C2, respectively.The equivalent circuit schematic of the converter at this mode is shown in Fig. 2.12(c) with circuitsIII and IV.At each of the half-line cycles, one of the output capacitors is charged by the circuit whichcauses the proposed advanced converter to have a lower output voltage, decreasing the conversionratio. The proposed advanced converter has lower ripples in decreased conversion ratios which re-sults in efficiency improvements compared to totem pole boost PFC. The duty cycle of the converterand the inductor’s ripple in this mode are shown in (2.5) and (2.6), respectively.DDoubler = 1−2 |vin|vo (2.5)∆iDoubler =|vin|(1−2 |vin|vo )L fsw(2.6)39These equations are the same as the ones for the proposed basic converter in (2.3) and (2.4).As stated, the performance of the proposed advanced converter in low input voltages is similar tothe proposed basic converter. The main difference between these two structures is the performancein higher input voltages. The proposed basic converter cannot reduce the ripples or improve theperformance in high input voltages compared to the totem pole boost. But it can be seen below thatthe proposed advanced converter can be also useful in higher input voltages.First modulation method in high input voltages with Vinpeak > Vout2 :When the input voltage peak value is higher than half of the output voltage, the proposed converterworks in the high input voltage operation mode. In this mode, the bidirectional switch network isswitching in the middle of the half-line cycles. Switching waveforms of the converter at this modeare shown in Fig. 2.11(c). As seen in Fig. 2.11(c), switch S4 is turned on when the input voltage’sinstantaneous value is lower than half of the output voltage. At this condition, the circuit works ininterval III with the active circuit shown in Fig. 2.12(c). In this condition, S4 is kept on, and thusS2 and D6 are the switch and the diode of the boost converter working with the line voltage as theinput and half of the output voltage as the output voltage of the boost converter. The circuit in thisinterval has the ON state 1 in Fig. 2.10(a) and the OFF state 2 shown in Fig. 2.10(b).Once the line voltage value reaches to half of the output voltage, switch S4 is turned off by thecontroller which causes the converter to work as a totem pole structure in interval I with switch S2as the switch and switch S1 as the diode. Once again when the input voltage’s instantaneous valuegoes below vo2 , switch S4 is turned on again to take the converter into interval III. The same scenariohappens at negative line voltage values when the middle switch S3 changes the configuration of theproposed converter in low line values from totem pole (interval II in Fig. 2.12(b)) to voltage doubler(interval IV in Fig. 2.12(d)). Since the proposed converter works in both doubler and totem polemodes in a line cycle in this condition, the duty cycle and the current ripples can be calculatedaccording to (2.7):40|vin(t)|<Vo2DDoubler====⇒ ∆iL = ∆iDoubler =|vin|(1−2 |vin|vo )L fsw|vin(t)|>Vo2Dboost===⇒ ∆iL = ∆iboost =|vin|(1− |vin|vo )L fsw(2.7)Comparing the inductor’s ripple in low voltage and high input voltage conditions shown in(2.6) and (2.7) proves that the input current ripple is reduced in the proposed advanced convertercompared to the totem pole boost and voltage doubler. This results in the reduction of the high-frequency power losses in the inductor. The losses in the semiconductors also decrease whichimproves the efficiency of the converter. In the next subsection, the second operational mode forthe proposed advanced structure is presented to further decrease the current ripples in the converter,especially at high input voltages.2.3.2 Second Modulation Method: High Frequency Middle SwitchThis modulation method for the proposed advanced converter is shown in Fig. 2.13. In this case,the middle switch (K) consists of two back-to-back MOSFETs as shown in Fig. 2.9(c). This circuitis also depicted in Fig. 2.13(a). The selected switches in this case (S5 and S6 in Fig. 2.13(a))can be different from the switches in the previous modulation (S3 and S4 in Fig. 2.11(a)). S5 andS6 in Fig. 2.13(a) should work in the switching frequency speed which needs a better body diodewith lower reverse recovery losses. On the other hand, S3 and S4 in Fig. 2.11(a) can have lowertransition speed since they are switching with the line frequency cycles. Low voltage operation ofthe proposed advanced converter with the high frequency middle switch is shown in Fig. 2.13(b) aswell as the high voltage operation illustrated in Fig. 2.13(c). The proposed advanced converter inthis method has four different intervals as shown in Fig. 2.14 with circuits XI, XII, XIII, and XIV.Different states of operation for each of these intervals have been shown in Fig. 2.10.Second modulation method in low input voltages with Vinpeak < Vout2 :When the input voltage peak value is less than half of the output voltage, the converter shown inFig. 2.13(a) works in the low input voltage mode. Theoretical waveforms of the converter in thismode are shown in Fig. 2.13(b). As seen in Fig. 2.13(b), the converter has only two operational41S2S1D1LvacD2C1C2RL+-S6S5D3D4(a) Circuit schematic at the second method of operation:High Frequency Middle Switchvhigh invout2i   inIntervalXIIntervalXIIIntervalXIIIIntervalXIIIIntervalXIVS2S5S6S1vout2vinpeak >(c) Circuit waveforms Vinpeak > Vout/2IntervalXIvlow inS2S5S6vout2vout2i   inS1vinpeak <Interval XI Interval XIII(b) Circuit waveforms Vinpeak < Vout/2Figure 2.13: The second modulation method in the proposed advanced reconfigurable PFCconverter: High frequency middle switch, which acts like a voltage doubler at lowinput voltage levels (Vinpeak < Vout2 ) and at high input voltage levels (Vinpeak >Vout2 ) itputs the minimum voltage across the inductor to limit the current ripples in the inductorwith the help from the middle bidirectional switches (S5 and S6).42S2S1D1LvacD2C1C2RL+ -(c) Active elements in interval XIII(ON state 3, OFF state 4)D3D4S6S5(a) Active elements in interval XI(ON state 1, OFF state 2)S2S1D1LvacD2C1C2RL+-D3D4S6S5S1S2D1LvacD2C1C2RL+-(b) Active elements in interval XII(ON state 2, OFF state 5)D3D4S6S5S2S1D1LvacD2C1C2RL+ -(d) Active elements in interval XIV(ON state 4, OFF state 6)D3D4S6S5Figure 2.14: Different intervals of operation in the second modulation method of the proposedadvanced reconfigurable PFC converter: High frequency middle switch, which acts likea voltage doubler at low input voltage levels (Vinpeak < Vout2 ) and at high input voltagelevels (Vinpeak > Vout2 ) it puts the minimum voltage across the inductor to limit thecurrent ripples in the inductor with the help from the middle bidirectional switches (S5and S6).intervals in this mode named interval XI and interval XIII, shown in Fig. 2.14(a) and Fig. 2.14(c),respectively. When the input voltage is positive, the converter works in interval XI and once theinput voltage is negative it works in interval XIII. Interval XI has the ON state 1 and OFF state 2shown in Fig. 2.10(a) and (b). Also, interval XIII has the ON state 3 and OFF state 4 shown in Fig.2.10(c) and (d). As stated, in interval XI the converter acts like a voltage doubler charging C2 withS2 as the switch, S6 as the diode, S1 off, and S5 on. Similarly, once the input voltage is negative,the converter works in interval XIII. In this interval, S2 is remained off, S6 is on, S1 is the switch ofthe boost, and S5 is the diode of the structure. With this method, the converter can have low ripplesin the input current and thus the efficiency can be improved. The duty cycle of the converter in thismode is shown in (2.8) as well as the input current ripples in (2.9).|vin|< vo2 ⇒ DlowVin high f = DDoubler = 1−2|vin|vo(2.8)43|vin|< vo2D=DDoubler======⇒ ∆iL = ∆iDoubler =|vin|(1−2 |vin|vo )L fsw(2.9)(2.8) and (2.9) are the same equations as the proposed advanced converter in the first modu-lation mode or low-frequency mid switch operation. They are also similar to the operation of thedoubler converter. As stated, the low input voltage operation of the proposed advanced converteris similar to the proposed basic structure. However, during high input voltages, the proposed ad-vanced converter shows great improvements compared to the doubler converter and the totem poleboost configuration.Second modulation method in high input voltages with Vinpeak > Vout2 :When the input voltage peak value is higher than half of the output voltage, the converter withthis method works in the high voltage mode. The theoretical waveforms of the converter in thismode are shown in Fig. 2.13(c). When the absolute instantaneous value of the input voltage is lessthan half of the output voltage, the converter works in interval XI at positive input voltages and ininterval XIII at negative input voltages. The equivalent circuit for the proposed advanced converterin the second modulation is shown in Fig. 2.14. Interval XI (Fig. 2.14(a)) is similar to interval III(Fig. 2.12(c)) in the first method. Both of these intervals have the same states of operation shownin Fig. 2.10. In interval XI, switch S5 is on and switch S6 acts like the diode of the boost structure.S2 is the switch of the boost converter in this mode and S1 is remained off. Similarly, in intervalXIII, S1 is the switch of the boost and S6 acts like the diode. S2 is remained off and S6 is on inthis interval. Interval XIII is similar to interval IV in the previous modulation method. They bothhave the same states of operation shown in Fig. 2.10. The proposed converter works in the doublermode in intervals XI and XIII which are similar to the operation of the converter in intervals III andIV in the previous method.When the input voltage’s absolute value gets higher than half of the output voltage, the proposedadvanced converter in the second modulation method enters into intervals XII and XIV dependingon the polarity of the input voltage waveform. In interval XII, S2 is off, S6 is on, S5 is the switch ofthe boost structure, and S1 is the diode of the structure. In this interval, the converter works in states442 and 5 shown in Fig. 2.10(b) and (d). Similarly, in interval XIV, S1 is off, S5 is on, S6 is the switchof the converter, and S2 is the diode of the boost structure. In this interval, the converter works instates 4 and 6 shown in Fig. 2.10(b) and (d). With these states of operation in this converter, thevoltage across the inductor is always limited to half of the output voltage in all cases which reducesthe input current ripples significantly.The duty cycle of the converter in this mode is varied in different values of the input voltage.When the input voltage absolute value is lower than half of the output voltage, the duty cycle issimilar to (2.5) which is given in (2.8). The input current ripple is also given in (2.8). When theabsolute instantaneous value of the input voltage is higher than half of the output voltage, whenthe switch of the boost is on, the voltage across the inductor is equal to |vin|− vout2 . Also when theswitch is off, the voltage across the inductor is vout−|vin|. The duty cycle can be calculated as donein (2.10).|vin|> vo2 ⇒ DhighVin high f = 2(1− |vin|vo)(2.10)Also the inductor current ripples can be calculated in (2.11):|vin|> vo2D @(2.10)======⇒ ∆iL =2|vin|(1− |vin|vo )(1−vo2|vin|)L fsw(2.11)As stated in the first part of this section, it is assumed that the output capacitors, C1 and C2,have equal capacitance and hence the operation of the converter is balanced and symmetrical. Inpractical cases, there might be some differences between the capacitance of C1 and C2 which causestheir voltages to be unbalanced. This does not affect the operation of the converter significantly andonly causes this split cap structure to reach to a self-balancing state with slightly different voltagelevels [117, 118]. There are also many techniques proposed in the literature to relieve the possibleunbalanced performance of the structures with split caps [119–127].The operation of the proposed advanced converter was described in this section along with dif-ferent operating modes with related figures. The control and modulation algorithm of the proposedadvanced converter is studied in the next section of the chapter.45Cv(s)VoutVrefevei dutyvoltagecompensatorOutput voltage control loopInput current control loopCi(s)currentcompensatorabsolutetakerabsolutetakerlimitterlimitterPulse WidthModulatorKiiniref|iin||Sin(Өl)|absvin|vin|absGS1GS2GS3 or GS5GS4 or GS6Figure 2.15: The control loop of the proposed advanced wide-range PFC converter.2.4 Proposed Advanced Converter Modulation and ControlMethods ImplementationThe extended input voltage range PFC converter with advanced configuration introduced in thischapter provides high efficiencies in a wide input voltage range from 90VRMS up to 530VRMS. It hasa high output voltage (800VDC) suitable for high power operation. The required inductor is smallwith low ripples. The presented advanced structure has inrush current handling capabilities as wellas the line frequency common mode connection between the input and output ports. The controland modulation of the proposed converter are described in this section of the chapter.The control loop of the converter is shown in Fig. 2.15. The control loop is the same for bothof the methods presented in Section 2.3. The only difference between the presented methods is thePulsed Width Modulation (PWM) module which is shown in Fig. 2.15 with the PWM block. Asseen in Fig. 2.15, there are two control loops in the circuit: one for the input current, and the otherone to regulate the output voltage. Input current is forced to follow a sinusoidal waveform similarto the input voltage. The reference of the input current, shown with ire f in Fig. 2.15, is formedby multiplication of the sinusoidal waveform synchronous to the input voltage (|sin(θl)|), and thevout compensator output. This way, the shape of the input current follows a sinusoidal waveformsampled from the input voltage causing the converter to have a high power factor at the input.Also, the amplitude of this sinusoidal waveform is controlled by the output voltage compensator46Gate1Gate2Mux01Mux01vin1: if  vin>00: if  vin<01: if  vin>00: if  vin<00GS2GS1Gate1Gate2Mux01GS4Gate3dutyGate1sawtooth1dutyGate2sawtooth2dutyGate3y=0.5Mux01GS3Gate3Figure 2.16: The modulation method used for the first modulation method: Low FrequencyMiddle Switch.at different loading levels, ensuring that the converter will have a constant output voltage value atdifferent conditions. The output of the controller module for the input current is called duty in Fig.2.15 which represents the required duty cycle of the converter. This parameter then is received bythe modulation module which depends on different methods being used as mentioned in Section2.3.As stated, different modulation schemes are used in the presented methods in the previous47dutysawtooth2dutysawtooth1Gate1Gate1Gate2Gate2Mux01Mux01vin1: if  vin>00: if  vin<00GS2GS1Gate1Gate2GS6GS5Figure 2.17: The modulation method used for the second modulation method: High Fre-quency Middle Switch.section. The first modulation scheme for the low-frequency middle switch method is shown in Fig.2.16. As seen in this method, three comparators take the parameter duty as the input. There aretwo different sawtooth waveforms to be used in this method as seen in Fig. 2.16. Sawtooth1 andsawtooth2 are themselves formed by comparing the duty with the DC value of 0.5. As seen, afterthe comparison made between duty and the sawtooth waveforms, the gating parameters Gate1,Gate2, and Gate3 are formed. These parameters are then used to generate the gate signals neededfor the switches. This process includes some multiplexers shown in Fig. 2.16. Another parameterused in this modulation method comes from the sign of the input voltage. As stated, in the firstmodulation method, the converter automatically changes its behaviour in different input voltages.The second modulation method introduced in Section 2.3 is shown in Fig. 2.17. The secondmodulation method, or the high-frequency middle switch method, requires a different approach forswitching the MOSFETs in the design. There are two sawtooth waveforms in this method as seenin Fig. 2.17. Sawtooth1 has a frequency equal to the switching frequency with a minimum equal48to 0.5 and a maximum equal to 1. Also, sawtooth2 is a sawtooth waveform with the switching fre-quency with an amplitude between 0 and 0.5. The parameter duty is compared with these sawtoothwaveforms, forming Gate1 and Gate2. As seen in Fig. 2.17, once the input voltage is positive,Gate1 is connected to the gate signals of the switches S2 and S6, and when the input voltage isnegative Gate2 is connected to gates of S2 and S6 which are working in the complementary mode.The opposite scenario is happening for the gate signals of S1 and S5 which are also working in thecomplementary mode.The control method and different modulation schemes for the proposed advanced extendedinput voltage range PFC converter were discussed in this section of the chapter. In the next section,a design method is developed for designing the presented converter based on predefined conditions.2.5 Designing the Proposed Advanced Reconfigurable PFCConverterThe presented advanced converter in this chapter has high efficiency in the wide input voltagerange from 90VRMS up to 530VRMS. The output voltage of the proposed advanced converter isregulated at 800VDC in the whole extended input voltage range. The proposed configuration needsa small inductor and produces low current ripples in the inductor. Besides, the proposed converterhas inrush current handling capability and line frequency common mode connection between theoutput and input ports. In this section, the design process of the proposed advanced converter isdiscussed.The inductor’s current ripple has been calculated in previous sections in (2.6), (2.7), (2.9), and(2.11). The proposed advanced converter has different characteristics in each of the modulationmethods. The inductor’s current ripple ratio for different converters is depicted in Fig. 2.18(a) inthe presented modulations at low input voltages, VinPeak < Vout2 . Also the current ripple is shown inFig. 2.18(b) at high input voltages, VinPeak > Vout2 .The proposed advanced converter in the first modulation method is illustrated in Fig. 2.11. Theconverter in this mode switches between two modes in the middle of the line cycles at high inputvoltages, when VinPeak > Vout2 . The converter in this modulation method has two modes of operationdepending on the input voltage value. The first mode happens when the input voltage instantaneous49Table 2.1: Experimental specifications of the wide range application.Electrical characteristic RangeInput voltage range (vinRMS) 90−530VRMSFull power AC input range 187−530VRMSOutput voltage (vout) 800VDCMaximum output power (POmax) 2kWSwitching frequency ( fsw) 60kHzInductor current ripple ( ∆iLILpeak ) 20% @ low line/full load120Hz ripple of vout (∆vout) 40 Vp−pHold-up time (thold−up) 10ms @ VOmin = 650Vvalue is less than half of the output voltage. The inductor’s current ripple in the first modulation isshown in Fig. 2.18(a) at low line voltages and in Fig. 2.18(b) at high line values.The second modulation method for the proposed advanced converter is given in Fig. 2.13 withthe modulation scheme shown in Fig. 2.17. This modulation method represents the lowest ripplesin the inductor’s current as seen in Fig. 2.18. The inductor’s current ripple is shown in low inputvoltage values in Fig. 2.18(a), and high input voltages in Fig. 2.18(b). As seen in Fig. 2.18(a),the inductor’s ripple is the same in both of the modulation methods and also the basic doublerconverter. This is because the proposed advanced and the basic structures are all working in thedoubler mode in low input voltages. Totem pole PFC converter’s inductor ripple is also shown inFig. 2.18 in comparison with the presented modulation methods. The lowest ripple in the inductor,as stated, is happening in the second modulation in both cases of the input voltage values. Thehighest one is the totem pole converter’s. The first modulation scheme has a moderate ripple valuebetween the second method and the totem pole PFC technique.Based on the calculations, the inductance should be higher than 525µH in order to have a cur-rent ripple below 20% at full load and the lowest line voltage (vinRMS = 287VRMS). For comparison,if a totem pole structure is used at low voltages, the minimum value of the inductance to support themaximum 20% ripple should have been 940µH. Therefore, the inductance value can be decreasedby nearly 45% with the same value of the current ripple. The maximum current in the inductoris equal to the peak value of the input current plus half of the high-frequency ripple at the peak.50π0 2π(b) Inductor’s current ripples at high voltages Vinpeak > Vout/2ΔiL in totem pole ΔiL in modulation 1 ΔiL in modulation 2π0 2π(a) Inductor’s current ripples at low voltages Vinpeak < Vout/2ΔiL in totem poleΔiL in modulation 1ΔiL in modulation 2Figure 2.18: Inductor’s current ripples in the analyzed design cases of totem pole and theproposed advanced modulations 1 and 2 at a) low input voltage cases (Vinpeak < Vout2 ),and b) high input voltage range (Vinpeak > Vout2 ).51Table 2.2: Components used for the experimental prototype of the proposed advanced recon-figurable AC/DC topology.Component(s) Part numberL 540µH/12.4ApeakC1, C2 3×220µF/500VS1, S2 LSIC1MO120E0080D1−D4 VS60EPS12M3D5, D6 RHRG7560S3, S4 IXFX64N60P3S5, S6 UJ3C065080K3STherefore, the maximum current of the inductor is 16.3A which happens at the minimum line volt-age under full loading conditions. Two Micrometals Alloy Powder Cores have been selected forthe required inductance. The part number of the cores is MS-226060-2. Those two cores are placedon top of each other which results in higher AL (nHN2 ). The number of turns is 52 with 6 Litz wires ofAWG20 or wires with a 0.8mm diameter. Based on this selection, the initial value of the inductancein zero ampere turn (at zero crossings) is 745µH and the value of the inductance at the peak valueof the input current is equal to 540µH. SIC switches have been selected for the main switches ofthe converter (S1, S2). SIC switches are a better match for this converter because these switcheshave better switching characteristics in higher voltages (Vbus = 800V ). The reverse recovery of thebody diodes in these switches is lower than silicon types.There are two factors that need to be considered when selecting the output capacitors for thedesign: satisfying the hold-up time requirements and also having small low frequency output volt-age ripples. Both of these requirements are mentioned in Table 2.1. (2.12) is used for calculatingthe minimum capacitance required for the hold-up time:Co >2 POmax thold−upv2out− v2out min= 183.9µF (2.12)Also based on [17], the required capacitance in order to handle the low frequency output voltageripple requirements, mentioned in Table 2.1, is given in (2.13). (2.13) is considered during the low52(a)(b)Figure 2.19: The pictures of the proposed advanced converter with a) two MOSFETs anddiodes in the middle network to work with the low freq. mid. switch modulation;b) Two SIC switches in the middle network to work with the high freq. mid. switchmodulation.input voltage mode because the ripples are higher. In addition, (2.13) is valid for both of the doublermode and totem pole mode. This has been discussed in Section 2.2 and also illustrated in Fig. 2.5.Therefore, the output capacitance required for both of the proposed converter and the totem poleboost PFC is the same.Co >2IOmaxωline∆vout= 331.7µF (2.13)Based on (2.12) and (2.13), the output capacitance should be higher than the maximum. There-fore, three 220µF electrolytic capacitors are selected for each of the output caps of C1 and C2 inthe design. Full list of selected components can be found in Table 2.2. This table includes the partnumbers of the components for both of the methods in the advanced proposed structure. As shownin Fig. 2.9(b) and (c), the middle switches used in the first method (S3 and S4) can be Silicon-based MOSFET semiconductors. However, in the second method (high-frequency middle switch)the middle switch network should have Field Effect Transistor (FET) semiconductors with low re-verse recoveries in their body diodes. Therefore, S5 and S6 should be selected from SIC or GalliumNitride (GAN) semiconductors. In the presented prototype, SIC switches have been selected for S5and S6 with the part numbers shown in Table 2.2.53The pictures of the designed prototypes are shown in Fig. 2.19. The first proposed modulationshown in Fig. 2.9(b) with the low frequency middle switch configuration is shown in Fig. 2.19(a).In addition, second proposed method with the high frequency middle switch configuration shownin Fig. 2.9(c) is given in Fig. 2.19(b).2.6 Experimental Results of the Proposed AdvancedReconfigurable PFC ConverterThe proposed advanced PFC converter supports an extended input voltage range from 90VRMS to530VRMS. The proposed advanced converter provides a high-efficiency curve in the whole inputvoltage range with a regulated high output voltage (800VDC). The studied converter has a smallinductor with reduced current ripples. The proposed converter provides a line frequency commonmode connection between the input and output ports in all of the operating modes. Also, theproposed advanced converter can handle inrush currents coming from the grid side in order toprotect the switches and the inductor.The performance of the proposed advanced converter is analyzed in an experimental setup inthis section of the chapter. The advanced structure is experimentally tested when working in bothof the proposed modulation methods: low-frequency mid switch as well as high-frequency midswitch. The proposed advanced structure has been experimentally tested using the componentslisted in Table 2.2. These elements are designed and selected in Section 2.5 of this chapter. Thereare two subsections in this section of the chapter. The first one discusses the performance of theproposed advanced methods in an experimental prototype. The second subsection compares theperformance of the proposed advanced modulation methods together and also with a traditionaltotem pole PFC structure.2.6.1 Experimental performance of the proposed advanced converterThe performance of the proposed advanced converter working with the 1st modulation method(low frequency middle switch) is shown in Fig. 2.20. The waveforms of the proposed converterin this mode is shown at vin = 208VRMS (nominal low input voltage level with Vinpeak < Vout2 ) inFig. 2.20(a) and at vin = 480VRMS (nominal high input voltage level with Vinpeak > Vout2 ) in Fig.54viniLvC1vO(b) Low Freq. Middle Switch PFC Converter 480VRMS , 2kWviniLvC1vO(a) Low Freq. Middle Switch PFC Converter 208VRMS , 2kWFigure 2.20: Experimental captures of the proposed advanced converter in the 1st modulationmethod: Low frequency middle switch at a) 208VRMS (Vinpeak < Vout2 ), and b) 480VRMS(Vinpeak > Vout2 ).2.20(b). These captures are showing the full load performance of the converter at this mode. Inthese figures input voltage (vin), inductor current (iL), output voltage (vO), and one of the outputcapacitor’s voltages (vC1) are shown. The efficiency of the converter at full load (2kW ) is measured97.7% at vin = 480VRMS, and 96.9% at vin = 208VRMS.The performance of the proposed advanced converter working with the 2nd modulation method(high frequency middle switch) is shown in Fig. 2.21. The operation of the proposed advancedconverter in this mode is shown at vin = 208VRMS (nominal low input voltage level with Vinpeak <Vout2 ) in Fig. 2.21(a) and at vin = 480VRMS (nominal high input voltage level with Vinpeak >Vout2 )in Fig. 2.21(b). The efficiency of the proposed advanced converter in this mode is 98.2% atvin = 480VRMS, and 96.8% at vin = 208VRMS.55viniLvC1vO(b) High Freq. Middle Switch PFC Converter 480VRMS , 2kWviniLvC1vO(a) High Freq. Middle Switch PFC Converter 208VRMS , 2kWFigure 2.21: Experimental captures of the proposed advanced converter in the 2nd modulationmethod: High frequency middle switch at a) 208VRMS (Vinpeak < Vout2 ), and b) 480VRMS(Vinpeak > Vout2 ).As seen in Fig. 2.20(b) and Fig. 2.21(b), the ripple in the 2nd modulation method in highvoltages is lower than the 1st modulation technique. This is based on the analytical discussionprovided in Section 2.3. As stated in the previous sections of this chapter, the voltage across theinductor in the 2nd modulation method is limited to half of the output voltage in all conditions. Thishelps the proposed converter in this mode to have a smaller ripple in the inductor which results inhigher efficiency (lower conduction losses) and higher power factor. On the other hand, the voltageacross the inductor in the 1st modulation method is limited to half of the output voltage in lowinput voltages but it is the output voltage once the input voltage RMS value is high. The switchinglosses are also limited in the first method because of the high-frequency switching of the diodes(D5 and D6) compared to the high frequency switching in the MOSFET switches (S5 and S6) in the56viniLvC1vO(a) Totem Pole PFC Converter 208VRMS , 2kWviniLvC1vO(b) Totem Pole PFC Converter 480VRMS , 2kWFigure 2.22: Experimental captures of the totem pole PFC converter with the same input andoutput characteristics. The operational waveforms in a) 208VRMS (Vinpeak < Vout2 ), andb) 480VRMS (Vinpeak > Vout2 ).second method. That’s why the efficiency of the advanced converter at low input voltages is higherin the first proposed modulation method. The inductor current ripples shown in Fig. 2.20(a) andFig. 2.21(a) have the same values as calculated in Section 2.3. In addition, the maximum inductorcurrent value is the same expected value as shown in Section 2.3 with 16A in low input voltages inFig. 2.20(a) and Fig. 2.21(a).2.6.2 Experimental comparison of the proposed advanced converter withtotem pole PFCIn order to compare the performance of the proposed advanced algorithm with an existing PFCsystem, totem pole PFC converter is considered. The totem pole PFC converter should be workingwith the same input and output voltage and power characteristics for this comparison. Also, the5790.0%92.0%94.0%96.0%98.0%100.0%90 200 310 420 53090.0%92.0%94.0%96.0%98.0%400 800 1200 1600 200090.0%92.0%94.0%96.0%98.0%100.0%400 800 1200 1600 2000Efficiency (%) Efficiency (%) Efficiency (%) Output Power (W)(a)Output Power (W)(b)Input Voltage (Vrms)(c)Totem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCFigure 2.23: Comparison of the efficiency of the proposed advanced converters with thetraditional totem pole PFC boost converter with the same electrical characteristicsand the same components at a) vin = 480VRMS and different output power levels, b)vin = 208VRMS and different output power levels, and c) Pout = 2kW and different inputvoltage levels (vin = 187−530VRMS) with de-rated power levels in vin = 90−187VRMS.580.9800.9850.9900.9951.00090 200 310 420 5300.9800.9850.9900.9951.000400 800 1200 1600 20000.9000.9200.9400.9600.9801.000400 800 1200 1600 2000Power Factor Power Factor Power Factor Output Power (W)(a)Output Power (W)(b)Input Voltage (Vrms)(c)Totem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCFigure 2.24: Comparison of the proposed advanced converters with the traditional totem polePFC boost converter with the same electrical characteristics and the same components.Power factor comparison at a) vin = 480VRMS and different output power levels, b)vin = 208VRMS and different output power levels, and c) Pout = 2kW and different inputvoltage levels (vin = 187−530VRMS) with de-rated power levels in vin = 90−187VRMS.590.00%1.00%2.00%3.00%4.00%5.00%6.00%90 200 310 420 5300.00%1.00%2.00%3.00%4.00%5.00%6.00%400 800 1200 1600 20000.00%2.00%4.00%6.00%8.00%10.00%12.00%14.00%400 800 1200 1600 2000THD (%)THD (%)THD (%)Output Power (W)(a)Output Power (W)(b)Input Voltage (Vrms)(c)Totem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCTotem pole boost PFCHigh freq. middle switch PFCLow freq. middle switch PFCFigure 2.25: Comparison of the proposed converters with the traditional totem pole PFC boostconverter with the same electrical characteristics and the same components. TotalHarmonic Distortion (THD) comparison at a) vin = 480VRMS and different output powerlevels, b) vin = 208VRMS and different output power levels, and c) Pout = 2kW anddifferent input voltage levels (vin = 187−530VRMS) with de-rated power levels in vin =90−187VRMS.60same set of components (L, C1, C2, S1, S2, and D1−D4) are used in the totem pole PFC to makeit easy to compare with the proposed advanced reconfigurable converter. The output voltage of thetotem pole converter is the same as the proposed converter (800VDC) with the same input voltagerange (90− 530VRMS). The experimental waveforms of the totem pole PFC converter is shown inFig. 2.22. The experimental captures of the totem pole PFC converter in low voltage at 208VRMS areshown in Fig. 2.22(a) and in high input voltage at 480VRMS in Fig. 2.22(b). As seen in Fig, 2.22,the ripple in both of the input voltages’ cases are higher than the ones seen in Fig. 2.20 and Fig.2.21. Therefore, the ripple in the proposed advanced solutions are smaller than the conventionaltotem pole PFC’s. This can be also seen in Fig. 2.18. The reason behind these advantages in theproposed converter is lower levels of the voltage across the inductor in switching cycles.As shown in Fig. 2.11 and Fig. 2.13, the proposed modulation methods work like a voltagedoubler boost PFC in low input voltages while Vinpeak < Vout2 . As a result, the voltage across theinductor in these modes is always limited to half of the output voltage at low line levels. Therefore,the ripple in the inductor will be less than the totem pole boost. Since the switching frequencyis the same in all of the converters, less voltage across the inductor results in lower ripples in theinductor’s current causing the conduction and core losses to be reduced. The efficiency of thetotem pole PFC at full load with the same conditions as the proposed advanced converter is 97.2%at 480VRMS and 96.2% at 208VRMS which is lower than the efficiency of the proposed advancedconverters in modulation methods 1 and 2.The efficiency of the proposed converters in modulation methods 1 and 2 are compared with thetotem pole PFC converter’s in Fig. 2.23. The efficiency of the proposed advanced configuration iscompared with the totem pole PFC in the nominal high input voltage (vin = 480VRMS) in Fig. 2.23(a)as well as the nominal low input voltage (vin = 208VRMS) in Fig. 2.23(b) both versus output powerlevels. In addition, the efficiency of the advanced extended input voltage range PFC is presentedalong with the totem pole PFC at full load in different input voltage RMS values in Fig. 2.23(c).The converters in this figure are working with nominal power (2kW ) in 187− 530VRMS, and alsode-rated power in 90−187VRMS.As seen in Fig. 2.23, the efficiency of the proposed techniques in the extended input voltage61range PFC is always higher than that of the totem pole PFC converter’s. This is the result of hav-ing lower ripples in the inductor of the circuit. Although there are more elements in the proposedadvanced converter which cause more losses in the circuit, the reduction of the dissipation in otherparts of the circuit is higher than the effect of these extra losses. Therefore, the efficiency of theproposed advanced techniques is higher than the totem pole PFC converter. In high input volt-ages shown in Fig. 2.23(a), The efficiency of the high-frequency middle switch is higher than thelow-frequency middle switch technique. But in low voltages, modulation 1 shows slightly higherefficiencies.The power factor and THD of the proposed converters in modulation 1 and 2 are comparedwith the totem pole PFC converter’s in Fig. 2.24. The power factor of the proposed configurationis compared with the totem pole PFC in the nominal high input voltage (vin = 480VRMS) in Fig.2.24(a) as well as the nominal low input voltage (vin = 208VRMS) in Fig. 2.24(b) in different outputpower levels. In addition, the power factor of the proposed advanced PFC is presented along withthe totem pole PFC at full load in different input voltage RMS values in Fig. 2.24(c). An LC filterhas been added to the input of the proposed advanced converter and the totem pole boost PFC toeliminate the high-frequency ripples in the input currents. A 2µF capacitor and a 50µH inductorhas been used for this purpose.The THD comparison between the proposed advanced converter and the conventional totem poleboost PFC are also done in different input voltage and power levels in Fig. 2.25. THD is compared at480VRMS and 208VRMS in different output power levels in Fig. 2.25(a) and Fig. 2.25(b), respectively.In addition, THD is compared in different input voltage levels when operating at full output powerin Fig. 2.25(c). As seen in Fig. 2.24 and Fig. 2.25, the power factor (THD) of the proposedadvanced reconfigurable PFC converter is always higher (lower) than that of the totem pole PFCconverter’s in different input voltages and output power levels. In addition, the power factor (THD)of the modulation technique 2 is higher (lower) than that of the 1st modulation method at high inputvoltages. This is mainly because of the lower current ripples in the inductor in the 1st modulationmethod compared to other techniques.622.7 SummaryUtility line voltage range (90VRMS to 530VRMS) restricts the attainable efficiency of a single PFCconverter. In this chapter, two AC/DC PFC converters that can support an extended input voltagerange with constant DC bus voltage are proposed. The proposed basic structure shows improve-ments compared to conventional structures but still lacks some important features. Therefore, anadvanced converter is proposed to solve the drawbacks of the basic converter and also improve theperformance and efficiency to a new level in all of the operating points.The proposed reconfigurable advanced converter exhibits a high efficiency throughout the entireoperating input voltage range. Two modulation methods are presented for the proposed advancedPFC converter. In the first modulation method (low-frequency middle switch) the converter canlimit the inductor current ripple in low and high input voltages resulting in lower ripples comparedto the totem pole PFC converter with the same inductance value. The second modulation method(high-frequency middle switch) also demonstrates good performance when subjected to high inputvoltages when compared to the conventional totem pole approach and the first modulation method.The proposed advanced structures transform into a voltage doubler PFC converter at low linevoltages (VinPeak < vout2 ) and demonstrate different structures in higher line voltages (VinPeak >vout2 ).With these methods, the proposed advanced converter can maintain high operating efficiency evenwith an 800VDC bus voltage throughout the entire input voltage range. Theoretical analysis, as wellas the experimental results, have been presented for a 2kW power level prototype. The efficiency,power factor, and THD of the proposed advanced PFC converter are compared with the totem polePFC converter in different input voltages and output power levels. At full load, the efficiency of theproposed converter reaches as high as 98.2% at 480VRMS compared to 97.2% in the totem pole PFCwith the same components. Also, the efficiency of the proposed converter is 96.9% at 208VRMScompared to 96.2% in the totem pole PFC structure. These improvements in the efficiency and alsothe power factor are the results of the reduction in the inductor current ripples due to the proposedmodulation methods. This enables the proposed advanced converter to have a smaller inductorwhen compared to the totem pole boost PFC.63Chapter 3Resonant Boost Structure for Narrow InputVoltage Range Applications: Developing theConcept in DC1In the previous chapter, a reconfigurable converter was proposed to handle applications with wideinput voltage gain variations with high efficiency and good performance. Not all of the applica-tions have to deal with a wide range of variations in their input. In some other applications suchas commercial electronics and renewable energies, the required gain variations are not huge. Inthese applications, the converter should only support a specific range of input voltage. Some otherapproaches are normally used in these applications.Resonant converters are one of the good examples for a narrow range of variations in the gain.These converters can reduce or eliminate the switching losses in semiconductor elements. There-fore, the switching frequency can increase which results in smaller passive elements like magneticsand DC link capacitors in the circuit. On the other hand, resonant structures are hard to be optimizedfor a wide range of variations in the operating points.In this chapter proposed converters for narrow input voltage range applications are developed.The focus of this research is mostly AC/DC PFC converters. But in order to fully investigate theperformance of a novel PFC topology, the operation of this converter should be examined in each1Portions of this chapter have been published in [3–5]64of the DC operating points. Therefore, in this chapter, a new structure is introduced and analyzedin DC input voltage environment to make the road for analyzing this converter in the AC inputenvironment in the next chapter. Since the proposed converter is new, it is first tested in a DCexperimental setup in this chapter. In the next chapter, all of the analysis for the DC/DC converterare used in an AC/DC PFC environment.AC/DC PFC converters are usually based on DC/DC converters [106–112]. For instance, conven-tional boost PFC converter, shown in Fig. 2.2(a), is comprised of a full-wave diode bridge and aDC/DC boost structure. Bridgeless structures are also using some versions of the DC/DC convertersas seen in Fig. 2.2(b) and (c). Therefore, in order to understand the behaviour of the AC/DC PFCconverters it is necessary to start with the DC/DC structure.Analyzing the DC/DC structures requires the study of the behaviour of the converter in a switch-ing cycle. In each of the switching cycles, the operation of the DC/DC converter can be studied bydifferent intervals and sub-intervals that happen because of the natural behaviour of the elementsor the changes that are originated in the controller. The next step after the switching cycle analysisin a AC/DC converter is to apply that analysis in line cycles and study the performance in differentinput voltage values in an AC system.If a new DC/DC structure is developed, it can lead to a novel AC/DC circuit as well. The simplestway to obtain the new AC/DC converter is to add a conventional diode bridge to the novel DC/DCconverter. There might also be some innovative solutions to make a bridgeless AC/DC converter outof the DC/DC structure which enhances the operation in the new AC/DC converter. So, a new DC/DCstructure plus a bridgeless solution results in a AC/DC PFC converter with higher performance.In this chapter, a new DC/DC converter is proposed with high efficiency and good performance.This converter can be implemented in different applications. Since this converter is developedas a DC/DC structure in this chapter, it can be used directly in Photovoltaics (PV) applicationsas a distributed connection converter [113–115]. As stated, this converter can be used in otherapplications like AC/DC PFC with some modifications. The AC/DC application of this structure isdiscussed in the next chapter (Chapter 4).As stated in Chapter 1 of this work, one of the most important approaches in increasing effi-65ciency, is soft switching. Soft switching can not only decrease or eliminate the switching lossesresulting in higher efficiency but also it enables the designers to increase the switching frequency.Increasing the switching frequency also allows the designers to use smaller passive elements likeinductors with smaller cores and capacitors [14]. Soft switching also results in less ElectromagneticInterference (EMI) noise because of the soft transitions in the switching waveforms [95].As stated in Chapter 1, there are multiple methods for providing soft switching in power con-verters: using extra components in PWM based converters, or having resonant behaviour in thecomponents of the structure. Using the resonance phenomenon does not need additional elementsin the circuit and can provide soft switching for the semiconductors with minimal costs. Therefore,this method is selected and used to develop a new soft-switching DC/DC converter.In this chapter, two DC/DC structures are studied. The first structure is a basic resonant convertercomprising one inductor and two capacitors in its resonant tank. This converter is called the basicresonant LCC converter hereafter. After reviewing the operation of this converter in Section 3.1,the advantages and disadvantages are discussed at the end of this section. Then, an advanced LLCCresonant structure is proposed in Section 3.2 that improves the drawbacks in the basic LCC resonantconverter.In Section 3.2, the advanced resonant LLCC converter is analyzed completely with the equiva-lent circuit in each interval followed by the related equations. In Section 3.3, required equations fordesigning the advanced resonant circuit are derived. Control strategies required for the advancedLLCC resonant converter is discussed in Section 3.4. A prototype for the required input and outputcharacteristics is designed in Section 3.5. In Section 3.6, the advanced LLCC resonant converter’sexperimental results are provided for a DC/DC application with the input voltage ranging from 150Vto 250V converting to 400V output and a peak output power of 400W .3.1 Principles of Operation for the Proposed LCC ResonantBoost ConverterThe operation of the basic LCC resonant structure is discussed in full detail in this section of thechapter. The configuration of this converter is shown in Fig. 3.1. This converter is called LCCbecause there are two capacitors (Cr1 and Cr2) and one inductor (Lr1) in its resonant tank. The66S2S1Lr1Cr1Cr2D1D2VinCORLFigure 3.1: The power stage of the basic LCC resonant boost converter under study.resonance between these passive components is the engine that drives the operation of this circuit.This structure can provide soft switching for all the semiconductors. This converter has twoswitches (S1 and S2) that each of them acts as the switch when charging the inductor in one direc-tion, and also performs like a diode when discharging the inductor in the other direction. In otherwords, each of the switches has two jobs in the circuit. This characteristic enables the switches inthe configuration to be turned on with Zero Voltage Switching (ZVS) and the diodes to be turnedoff with Zero Current Switching (ZCS).The equivalent circuit model of the basic resonant structure in each of the intervals within aswitching cycle is shown in Fig. 3.2. The waveforms of the voltages and the currents of theconverter in each of these intervals are also shown in Fig. 3.3. Different modes of operation for thebasic LCC resonant converter are shown and discussed below:Mode I [t1 < t < t2]: At t1, S1 is turned on with ZVS. At the start of this interval, iLr1 is zero,which causes iCr1 and iCr2 to be zero as well. Also, since before this moment iLr1 was positive (andiC2 > 0, and iC1 < 0), vCr1 was increasing to its peak and vCr2 was decreasing to its minimum. (3.1)can be considered during this interval:vCr1 + vCr2 =ViniCr=CrdvCrdt−−−−−−→ iCr1 =−iCr2 iCr1=iCr2+iLr1−−−−−−−−→ iCr1 = iLr2 , iCr2 =−iLr2(3.1)Based on (3.1), Cr1 and Cr2 can be considered in parallel. The resonance between Lr1, and Cr1and Cr2 starts at t1 with initial conditions of iLr1 = 0, and VCr1 =VCrmax. The inductor and capacitor67S2S1Lr1Cr1Cr2D1D2VinCORLiLr1iS1S1Lr1Cr1Cr2D1D2VinCORLS2iLr1iS1S2S1Lr1Cr1Cr2D1VinCORLD2iLr1S2S1Lr1Cr1Cr2D1D2VinCORLiLr1t0t1~(a) t1 t2~(b)t3t4~(d)t2 t3~(c)Figure 3.2: Equivalent circuit model in each operational mode of the proposed basic resonantLCC boost converter.equations for this interval are given in (3.2) and (3.3):vCr1 =VCr maxcos(ωres(t− t1)), (3.2)vCr2 =Vin−VCr maxcos(ωres(t− t1)) (3.3)VCr max is the maximum voltage of the input resonant capacitors Cr1 and Cr2, and ωres is theresonance frequency of Lr1 and the parallel combination of Cr1 and Cr2, or 1√2Cr1Lr1 . Using (3.1) in(3.2) and (3.3) yields:iLr1 =−√2Cr1Lr1VCr maxsin(ωres(t− t1)) (3.4)68iLr1iiniCr2iCr1iOripplet0 t1t2t3t4t5vCr1vCr2GateS1GateS2vDS-S2vDS-S1iS1iS2Figure 3.3: Theoretical key waveforms of the proposed basic LCC resonant boost converter.69Mode II [t2 < t < t3]: At t2, S1 is turned off. Since the turn-off current is high, if there is a largecapacitance across the drain-source of the switch, it takes a while for this capacitor to be charged byiLr1. Therefore, while S1 is being turned off, its drain-to-source voltage remains near zero, meaningthat the turn-off loss would be negligible. During this interval, iLr1 can be considered constantand helps to charge CDSS1 and discharge CDSS2. Hence, the constraint for having ZVS in turn-on isdescribed in (3.5):CDS < dead time×√2Cr1Lr1VCr maxsin(ωres(t2− t1))2Vout(3.5)At t3, CDS S1 is fully charged up to Vout and CDSS2 is completely discharged to zero; therefore,DS2 starts conducting and S2 can be turned on during the conduction of DS2 with zero voltageswitching. There is another condition that should be investigated. 2CDS should be large enoughto ensure that VDS S1 does not change dramatically during S1 turn off. This ensures that S1 is alsobeing turned off with ZVS. This constraint is given in (3.6).CDS >√2Cr1Lr1VCr maxsin(ωres(t2− t1))× tturn o f f2∆VCDS min(3.6)Mode III [t3 < t < t4 and t4 < t < t5]: During these intervals, inductor current is flowing throughS2 and D1 to the load. At t4, S2 is going to be turned on, but the circuit configuration for theresonance is similar in both intervals t3 < t < t4 and t4 < t < t5. During these moments, the inductorcurrent is reaching to the load.The operation of the basic LCC resonant structure has been discussed in this section. As seen inFig. 3.3, the input current of the circuit is not continuous. This is one of the biggest drawbacks ofthis structure. In order to solve this problem, Lr1 can be divided into two inductors in series with thediodes of the circuit. This way, the input current in each of the time intervals is the current flowingthrough one of the inductors and its characteristics would be continuous. This idea is structured asthe advanced LLCC resonant converter and is discussed in the remaining part of this chapter.703.2 Principles of Operation for the Proposed Advanced LLCCResonant Boost ConceptThe power stage of the proposed advanced LLCC resonant converter is illustrated in Fig. 3.4,depicting some of its characteristics. This circuit consists of two switches (S1 and S2). Each FETis working as a switch when charging one of the inductors and diode for the other inductor whiledischarging it. Two series diodes (D1 and D2) are also used to prevent reverse power flowing to theinput. The behaviour of the switches in working with the inductors has made the operation of theproposed converter similar to an interleaved structure.Because of the phase shift between the operation of the two inductors, like the other interleavedstructures, the studied converter has a very low ripple in the input and output currents even withthe low inductances with discontinuous currents in the circuit. The proposed advanced convertercan provide soft-switching for all of the semiconductors even under light loading conditions. It canprovide ZVS for the MOSFETs at turn-on and turn-off, and ZCS for the diodes.In order to simplify the preliminary analysis, it is assumed that many of the circuit’s elementsare ideal. However, the capacitor across the drain-source of the switches is considered to modelthe intrinsic drain-source capacitance of the MOSFETs. Besides, the capacitors and inductors areassumed to be ideal without parasitics. The circuit operates at a steady-state and the output capaci-tors are large enough to be considered an ideal DC voltage source. Based on these considerations,the equivalent circuit model in a switching cycle has eight modes which are shown in Fig. 3.5. Thetheoretical key waveforms are given in Fig. 3.6. As the operation of the converter is symmetrical,only the first four modes are explained in this section.In order to make the analysis of the proposed advanced LLCC resonant converter simple andeasy to understand, it is assumed that the values of the input capacitors and inductors are equal.Since Lr1 and Lr2 are the resonant inductors, and Cr1 and Cr2 are the resonant capacitors, they areshown as Cr and Lr hereafter in the equations. In other words, it is assumed that Cr1 = Cr2 = Cr,and Lr1 = Lr2 = Lr. Before the start of the first mode, it is assumed that the drain-source capacitorsof the switch are discharged. Also, the parasitic capacitor of the switch S2 is charged up to vout .The anti-parallel diode of S1 is conducting in this condition.71S2S1Lr1Cr1Cr2D1D2VinCORLLr2charge Lr1discharge Lr2charge Lr2discharge Lr1Figure 3.4: The power stage of the proposed advanced LLCC resonant boost converter understudy.Mode I [t0 < t < t1] shown in Fig. 3.5(a): Since the body diode of S1 is conducting during thisinterval, switch S1 can be turned on under Zero Voltage Zero Current (ZVZC). Thus, this mode isstarted when the body diode of the switch begins to conduct. At the end of this mode (at t1), thecurrent of S1 reaches zero. At this moment, the currents of the input capacitors reach zero, andsince iCr1 was positive before that, the voltage of Cr1 is at its maximum value and vice versa forvCr2.Mode II [t1 < t < t2] shown in Fig. 3.5(b): Inductor Lr1 is still charging with the current comingfrom the source flowing through D1 and the switch S1. At the same time, Lr2 is discharging to theload through the diode D2 and again the switch S1. However, after t1, the current of Lr1 is morethan Lr2 which makes the combination of the currents, a positive value flowing through the switchS1. During this interval, iLr1 is increasing and iLr2 is decreasing. At t2, iLr2 reaches zero whichturns off D2 and stops the converter from feeding the output load.As can be seen in Fig. 3.6, iLr1 and iLr2 can be estimated linearly between t0 and t2. Duringthese intervals, the voltage of the input capacitors (vCr1, and vCr2 ) can be considered constant.Using these assumptions, the calculations can be made simpler starting from (3.7).vCr1(t)≈ vCr1(t1) = vCmax −→ vCr2(t)≈ vin− vCmax (3.7)Since the voltages across the inductors Lr1 and Lr2 are considered constant and equal to vCmaxand vin−vCmax−vout respectively, inductors’ currents can be calculated in (3.8) and (3.9) based onthe inductors’ behaviour:72S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr2iLr1iLr2(a) t0 ~ t1Lr1Cr1Cr2Lr2iLr2iLr2iLr1S2S1D1D2VinCORL(b) t1 ~ t2S2S1D1D2VinCORLLr1Cr1Cr2Lr2iLr1(c) t2 ~ t3Lr1Cr1Cr2Lr2iLr1S2S1D1D2VinCORLiLr112iLr112iLr112(d) t3 ~ t4Lr1Cr1Cr2Lr2iLr2iLr1iLr1S2S1D1D2VinCORL(e) t4 ~ t5S2S1D1D2VinCORLLr1Cr1Cr2Lr2iLr2iLr1iLr1(f) t5 ~ t6Lr1Cr1Cr2Lr2S2S1D1D2VinCORLiLr2 (g) t6 ~ t7S2S1D1D2VinCORLiLr212iLr212iLr212Lr1Cr1Cr2Lr2iLr2 (h) t7 ~ t8Figure 3.5: Equivalent circuit model in each operational mode of the proposed advancedLLCC resonant boost converter.73iLr1iLr2GateS1GateS2iS1iS2vDS-S2vDS-S1iiniCr2iCr1vCr1vCr2t0 t1 t2 t3 t4 t7 t8t5 t6Continuous Input CurrentFigure 3.6: Theoretical Key waveforms of the proposed advanced LLCC resonant boost con-verter.74iLr1 (t) =vCmaxLr1(t− t0) (3.8)iLr2 (t) = iLmax−vout− vin + vCmaxLr2(t− t0) (3.9)Mode III [t2 < t < t3] shown in Fig. 3.5(c): This mode is started by the diode D2 being turnedoff. During this interval, Lr1 continues getting charged through S1 and D1, and iLr2 remains zero. Atthe same time, iCr1 is negative which makes the voltage of Cr1 decrease and vice versa for Cr2. Thisinterval ends when S1 is turned off by the controller. In this interval, a resonance occurs betweenLr1 and the parallel combination of the input capacitors Cr1 and Cr2. Hence, vCr1 and iLr1 resonatewith each other, resulting in their sinusoidal behaviour. The relationship between vCr1 and iLr1 canbe expressed based on the resonance behaviour given in (3.10):vCr1(t) = vCmax cos(ωres(t− t2))−→ iLr1 = 2iCr1 = vCmaxZr sin(ωres(t− t2)) (3.10)In (3.10), variables ωres and Zr are introduced. ωres is the resonant angular frequency, and Zr isthe characteristic impedance of the resonant tank; both are given in (3.11):ωres =1√2LrCr, Zr =√Lr2Cr(3.11)Additionally, (3.10) can be expressed in terms of a relationship between iLmax and vCmax, whichis given in (3.12):iLr1(t2) = iLmax =vCmaxZr(3.12)Mode IV [t3 < t < t4] shown in Fig. 3.5(d): At the beginning of this mode, S1 is turned off. Inthis interval, both switches S1 and S2 are OFF, and the current in Lr2 is zero. The current of theinductor Lr1 can be approximated linearly as was done in mode I and II above. As stated, the circuitis symmetrical and the same scenario happens to iLr1 in t4− t6 as happened to iLr2 in t0− t2. Sincethe difference in t3 and t4 is negligible, t4 can be approximated with t3. Therefore, the equation for75iLr1, can be given in (3.13) from t3 to t6. This equation will prove useful in the next subsection forcalculating the RMS and average value of the inductor.iLr1 ≈ vout− vin + vCmaxLr1 (t− t6) (3.13)In addition, iLr1 is at its maximum. This peak in iLr1 cannot reach zero instantaneously. There-fore, iLr1 is flowing through the capacitors across the switches. The active circuit schematic in thismode is shown in Fig. 3.5(d). As seen in the figure, half of the inductor’s current is flowing throughthe combination of the switch S1 parasitic and snubber capacitors, to charge them. The other half ofthe inductor’s current is flowing through the output and the drain-source capacitance of the switchS2 to discharge this capacitor. In other words, it is charging the drain-source capacitance of S1 anddischarging the capacitance across S2.Given the high switching frequency, the drain-source capacitors are not charging instanta-neously. In other words, the voltages across them do not change rapidly. Therefore, they cankeep the voltage of the switch near zero during turn-off moments. This results in having ZVS evenat turn-off. However, discharging big capacitors across the drain-source of the MOSFETs is diffi-cult at turn-on which needs a high current flowing through that. Nevertheless, since the currentdischarging the capacitance is the maximum current of the inductors, ZVS at turn-on even at lightload can be achieved, and likewise ZVS at turn-off. At the end of this interval, the drain-sourcecapacitance of the switch S2 is fully discharged, and from this moment, the inductor current iLr1will flow through the anti-parallel diode of the switch S2. During this interval, S2 can be turned onwith ZVS.It can be seen from Fig. 3.6 that the next four intervals (Fig. 3.5(e)-(h)) are similar to the firstfour ones depicted in Fig. 3.5(a)-(d). Therefore, because of the symmetrical configuration of thecircuit, these intervals follow the same pattern. Also, since the operation of the proposed converteris symmetrical, (3.14) can be considered:t3− t2 = TSw.2 − (t2− t0) (3.14)763.3 Proposed Advanced LLCC Resonant Boost ConceptAnalysis in Switching CyclesThe proposed advanced LLCC resonant boost is mathematically analyzed in this section of thechapter. The first subsection describes the equations related to the input and output currents ofthe converter. The second subsection describes the gain of the converter in the DC/DC environ-ment. Finally, the third subsection is about the maximum ratings of the components in the DC/DCapplication.3.3.1 Input and Output Current AnalysisThe input and output current waveforms are important characteristics of the proposed converter.Input current in the proposed circuit is continuous with low ripples even with the inductors withdiscontinuous currents in the structure. In addition, the input and output currents have double thefrequency of the switching frequency, which helps the input and output capacitors to mitigate theripple even more. This section provides the basic equations to calculate the input and output currentlevels. The analysis can be started from the input capacitors’ voltages. The summation of the inputcapacitors’ voltages is equal to the input voltage. Therefore, based on the description given in theprevious section, (3.15) can be given:vCr1 + vCr2 = viniC=CdvCdt ,Cr1=Cr2=Cr−−−−−−−−−−−−→ iCr1 =−iCr2 (3.15)Based on the Kirchhoff’s Current Law (KCL) in the positive terminal of the input capacitor Cr1and the negative pin of the capacitor Cr2, (3.16) can be considered:iin = iCr1 + iLr1, iin = iCr2 + iLr2 (3.16)Based on (3.16), the input capacitors’ currents can be calculated as in (3.17):iCr1 =iLr2− iLr12, iCr2 =iLr1− iLr22(3.17)By replacing (3.17) into (3.16), input current can be calculated as in (3.18). From this equation,77it can be seen that the input current is equal to the average of the two inductors’ currents:iin =iLr1 + iLr22(3.18)As seen in Fig. 3.6, the duration of the interval between t3 to t4 is shorter than the otherintervals. This is because the switching times are smaller compared to other time intervals. So, itcan be assumed that the voltages and currents including iLr2 remain unchanged during this interval.Considering (3.9) and (3.13), iLr2 at t0 or the maximum of the inductor’s current can be calculatedin (3.19):iLmax ≈ vout− vin + vCrmaxLr (t2− t0) (3.19)In addition, iLr1 at t2 can be calculated as in (3.20):iLr1 (t2) =vCmaxLr(t2− t0) (3.20)At this point, input and output currents can be calculated. Output current is calculated in (3.21)based on the average value of the waveform shown in Fig. 3.6.< iO >(t0 to t2)=12 iLmax× (t2− t0)TSw.2(3.21)Using (3.19), (3.21) can be simplified as given in (3.22):IO =vout− vin + vCmaxLr(t2− t0)2TSw.(3.22)As seen in Fig. 3.6, input current has a continuous form. The maximum and minimum valuesof the input current is given in (3.23) and (3.24) respectively.iin max = iin(t0)(3.18),(3.19)−−−−−−−→ iin max = vout− vin + vCmax2Lr (t2− t0) (3.23)iin min = iin(t2)(3.18),(3.20)−−−−−−−→ iin min = vCmax2Lr (t2− t0)(3.24)78At this point, output and input currents are given in (3.21) and (3.23), respectively. As stated,the input current is continuous with low ripples even with the inductors with discontinuous currentsused in the circuit. This is one of the most important characteristics of the proposed circuit.3.3.2 Converter Gain Analysis and the Normalization ProcessThe gain of the proposed advanced LLCC resonant boost topology is calculated in this subsection.What follows is a detailed gain versus frequency characteristic. Based on (3.23), the average andthe ripple of the input current can be calculated in (3.25) and (3.26) respectively:Iin =vout− vin +2vCmax4Lr(t2− t0) (3.25)∆iin ripple =vout− vin2Lr(t2− t0) (3.26)Based on (3.12) and (3.19), a relationship between iLmax and vCmax can be derived, and it isrepresented in (3.27):(t2− t0) = 2LrCr vCmax ωresvout− vin + vCmax (3.27)Replacing (3.27) in (3.22) and (3.25) results in the equations (3.28) and (3.29). In these equa-tions, the variable (t2− t0) is removed.IO =vout− vin + vCmaxLrTSw.( 2LrCr vCmax ωresvout− vin + vCmax)2(3.28)Iin =vout− vin +2vCmax4Lr( 2LrCr vCmax ωresvout− vin + vCmax)(3.29)Equations (3.28) and (3.29) can be simplified by normalizing the variables. In order to normal-ize the parameters in the circuit, some reference values should be defined. Input voltage is consid-ered to be the reference value of the voltage as in (3.30). Also, resonant characteristic impedanceand the resonant frequency mentioned in (3.11) are considered as the references for the impedance79and the frequency in the circuit. They are mentioned in (3.31) and (3.32), respectively. In addition,in order to normalize currents in the proposed converter, reference of the current can be defined in(3.33).vre f = vin (3.30)Zre f = Zr =√Lr2Cr(3.31)fre f = fres =12pi√2LrCr(3.32)ire f =vre fZre f=vinZr(3.33)Using the definitions in (3.30)-(3.33), the variables in the proposed circuit can be normalized.There are some other definitions made in (3.34)-(3.37) to make the equations simpler.Fn =fSw.fre f=fSw.fres(3.34)Q =ZrRout=√Lr2CrRout(3.35)m =voutvre f=voutvin(3.36)vCmaxn =vCmaxvre f=vCmaxvin(3.37)Simplified form of the equations (3.28) and (3.29) can be expressed in (3.38) and (3.39) using(3.34)-(3.37):801 1.5 2 2.5 3 3.5 4 4.512345Q=0.4Q=0.1Q=0.05Q=0.03Q=0.01Figure 3.7: Voltage gain of the proposed advanced LLCC resonant converter (m = voutvin ) versusthe normalized switching frequency (Fn =fSw.fres). Burst mode can be used in light loadsto keep the maximum switching frequency limited.m =Fn2piQv2Cmaxnm+ vCmaxn−1 (3.38)m2 =η4Q× vCmaxn× m−1+2vCmaxnm−1+ vCmaxn (3.39)Solving (3.38) and (3.39) yields (3.40). The voltage ratio (m = voutvin ) is the root of the 3rd orderequation shown in (3.40). This equation can be solved and the waveform of m versus Fn can bedrawn as shown in Fig. 3.7. As seen in (3.40), a third order equation should be solved to find theroots. A third order equation can potentially have three solutions, but in this case, only one of themis feasible. In other words, only one of the roots is a real number without the imaginary component,which has a value more than one. Thus, there is only one acceptable value solving (3.40).8F2n Q×m3−12FnQηpi×m2 +(4Qη2pi2−Fnη2pi)×m+Fnη2pi = 0 (3.40)Gain curves of the proposed converter for different values of the quality factor are depicted ver-sus the variation in the switching frequency in Fig. 3.7. This shows that the analyzed converter can81have a high amount of gain or can have a high variation in the gain versus the switching frequencyvariation. As seen in Fig. 3.7, the converter needs to work in higher switching frequencies underlight loading conditions which increases the switching frequency. Having a very high switchingfrequency may not be optimized by the extra losses in the components, therefore, the convertercan be switched into the burst mode. Burst mode can be used in light loads to keep the maximumfrequency limited. This operational mode has been fully discussed in Section 3.4 of this chapter.3.3.3 Components Maximum Rating AnalysisIn this subsection, the components’ voltage and current ratings are analyzed. As stated, in theproposed advanced LLCC resonant converter, the switching losses are negligible compared to theconduction losses in the circuit, and soft switching is provided for all semiconductors in the cir-cuit. Both of the input inductors (Lr1 and Lr2) and input capacitors (Cr1 and Cr2) participate in theresonance. The maximum current of the inductors (iLmax) and maximum voltage of the capacitors(vCmax) are important in selecting these components. The relationship between these two param-eters is given in (3.12). As stated, in order to make the analysis and design simple to understand,variables are normalized. The normalization equations are presented in (3.30)-(3.33). Ire f is de-fined as the ratio of the voltage reference (vre f = vin) and the reference of the impedance (Zre f = Zr).Therefore, based on (3.12), it is understood that the normalized value of the maximum current ofthe inductor would be equal to the maximum voltage of the capacitor. This is mathematically shownin (3.41). 3.12) and (3.33) has been used to prove the equation in (3.41).iLmaxn =iLmaxire f=vCmaxZrvinZre f=vCmaxvin= vCmaxn (3.41)As shown in (3.41), the maximum value of the resonant inductor’s current is equal to the max-imum voltage of the resonant capacitors. The value of vCmaxn or iLmaxn can be calculated usingthe equations presented in (3.38) and (3.39). The equation for vCmaxn or iLmaxn with respect to thevoltage gain (m) and the normalized frequency (Fn) is given in (3.42). The normalized value of theresonant capacitor voltage (vCmaxn) or the resonant inductor’s maximum current (iLmaxn) is shownin Fig. 3.8(a). This value is shown versus the normalized switching frequency in different load82levels or the quality factors (Q).vCmaxn = iLmaxn =η pi (m−1)2 (Fn m−η pi) (3.42)The RMS value of the inductors’ currents is one of the important parameters that a designershould consider. This value is the same for both of the inductors Lr1 and Lr2 because of the sym-metrical structure in the proposed circuit. Therefore, it is analyzed for Lr1, which is the same inLr2. Based on Fig. 3.6, (3.43) can be considered.iLrRMS =√1TSw.(∫ t2t0i2Lr1dt +∫ t3t2i2Lr1dt +∫ t6t3i2Lr1dt)(3.43)The linear approximation made in (3.8) for the inductor’s current can be considered from t0 tot2. Also, (3.10) can be considered from t2 to t3. Additionally, linear approximation presented in(3.19) can be used from t3 to t6. After simplifying the equation using the above assumptions, (3.44)can be presented. Since the circuit is symmetrical, (t6− t3) = (t2− t0) is used in order to reach(3.44) from (3.43):iLrRMS =√√√√ 1TSw.(13(t2− t0)3((vCmaxLr)2 +(vout − vin + vCmaxLr)2)+v2Cmax2Z2r((t3− t2)− sin(2ωres(t3− t2))2ωres))(3.44)Using (3.14) and (3.27), the equation mentioned in (3.44) can be simplified. Also, using thenormalization equations mentioned in (3.30)-(3.37), equation (3.45) can be presented as the nor-malized RMS value of the inductors’ currents. This value is also drawn versus the normalizedswitching frequency in different values of the quality factors in Fig. 3.8(b).iLrRMSn = iLmaxn√√√√√ Fn4pi(2iLmaxn(i2Lmaxn +d2n)3 d3n+piFn− iLmaxndn−sin(2pi( 1Fn −iLmaxnpidn ))2)(3.45)In which dn is defined in (3.46):831 1.5 2 2.5 3 3.5 4 4.5012345Q=0.4Q=0.1Q=0.05Q=0.03Q=0.01(a)1 1.5 2 2.5 3 3.5 4 4.5012345Q=0.4Q=0.1Q=0.05Q=0.03Q=0.01(b)Figure 3.8: The normalized voltage and current stress of the components in the proposed ad-vanced LLCC resonant converter versus the normalized switching frequency in differentquality factor levels: a) vCmaxn (= iLmaxn), maximum normalized voltage of the resonantcaps or the maximum normalized value of the resonant inductor current. b) iLRMSn, thenormalized RMS value of the resonant inductor current.841 1.5 2 2.5 3 3.5 4 4.5012345Q=0.4Q=0.1Q=0.05Q=0.03Q=0.01(a)1 1.5 2 2.5 3 3.5 4 4.5012345Q=0.4Q=0.1Q=0.05Q=0.03Q=0.01(b)Figure 3.9: The normalized voltage and current stress of the components in the proposedadvanced LLCC resonant converter versus the normalized switching frequency in dif-ferent quality factor levels. a) iSRMSn, the normalized RMS value of the switch current.b) iDave.n, normalized value of the diode’s average current.85dn = m+ iLmaxn−1 (3.46)The other important parameter in the proposed converter is the RMS current of the switch. Thisvariable has been given in (3.47):iSRMS =√1TSw.(∫ t2t0(iLr1− iLr2)2dt +∫ t3t2i2Lr1dt (3.47)Inductors’ currents are mentioned in (3.8), (3.9), and (3.10), in different time intervals. Also,(3.11), (3.14), (3.27), and (3.30)-(3.37) can be used to make the equation given in (3.47) simplerand normalized. The normalized version of the equation for the RMS value of the switches’ currentsis given in (3.48). As stated, dn is defined in (3.46). The normalized value of the switch RMS currentis sketched in Fig. 3.9(a) versus the switching frequency in different quality factors.iSRMSn = iLmaxn√√√√ Fn4pi(2iLmaxn((iLmaxndn )3+1)3 (m+2iLmaxn−1) +piFn− iLmaxndn −sin(2pi( 1Fn−iLmaxnpidn ))2)(3.48)In order to select diodes D1 and D2, the average current should be calculated in the proposedconverter. Since the diodes are in series with the inductors, inductors’ currents can be used tocalculate the average current of the diodes. Therefore, (3.49) can be considered:iD1ave. =1TSw.(∫ t2t0iLr1dt +∫ t3t2iLr1dt +∫ t6t3iLr1dt)(3.49)The equation mentioned in (3.8) can be used for the inductor’s current from t0 to t2. In addition,(3.10) is used for iLr in t2− t3, as well as (3.13) for t3− t6. Additionally, (3.11), (3.14), (3.27),and (3.30)-(3.37) can be used to make the equation given in (3.49) simpler and normalized. Thenormalized version of the diode average current is then simplified into (3.50). Diodes’ averagecurrents are given in Fig. 3.9(b) versus different normalized switching frequencies and qualityfactors.86iD1ave.n = iLmaxn Fn4pi(( iLmaxndn)2− ( iLmaxndn )+2(1− cos(pi( 1Fn − iLmaxnpidn ))))(3.50)The voltage stress of each of the switches is equal to the output voltage. However, a clampdiode can be added to limit the voltage stress of the diodes. The discontinuity in the inductors’currents causes a resonance between the inductors’ currents and the parallel capacitance of theseries diodes when the inductors’ currents reach zero (from t2 to t3 resonance between Lr2 and D2,and between t6 to t7 for the resonance between Lr1 and D1). In order to ensure that the converterhas high efficiency, and the voltage stress of the diodes does not exceed the output voltage, a smallsignal clamp diode can be added to the circuit to mitigate any possible oscillations, as shown inFig. 3.10.As seen in Fig. 3.10(a), diode D3 has been added to the schematic to prevent overvoltage ondiodes D1 and D2 when the inductors’ currents are zero. D3 clamps vD1 and vD2 to the outputvoltage using a very simple configuration. It uses the fact that at least one of the diodes D1 or D2is on. In other words, when D1 is off, D2 is on, and vice versa. Using this phenomenon, when D1is off, as soon as vD1 reaches vout , D3 closes the current path from the ground with help from D2and limits the voltage across D1. D3 should tolerate the output voltage of the converter but does notneed to have a huge conducting current capability. Therefore, D3 needs to be high voltage but lowcurrent.Inductors’ currents iLr1 and iLr2 as well as the voltage across diodes D1 and D2 are shown inFig. 3.10(b) and (c), before and after adding clamp diode D3 to the circuit, respectively. It canbe seen that vD1 and vD2 are limited to the output voltage in Fig. 3.10(c) with help from D3. Inaddition, iD3 has been shown in Fig. 3.10(c) in the same scale as the inductors’ currents to showthe small amount of the current compared to the resonant inductors’.3.4 Control Strategies in the Variable Frequency and theBurst Mode OperationsThe proposed advanced LLCC resonant converter provides soft-switching for all of the semicon-ductors in the circuit even under light loading conditions. In other words, ZVS is provided for the87S2S1Lr1Cr1Cr2D1D2VinCORLLr2D3Addedlow-currentdiode(a)iLr1iLr2vD1vD2t0t1t2t3t4t7t8t5t6(b)iLr1iD3iLr2vD1vD2t0t1t2t3t4t7t8t5t6(c)Figure 3.10: a) The prototype schematic of the proposed advanced LLCC resonant circuitwith the added clamp diode (D3) in order to clamp the voltage of the diodes D1 andD2, b) inductors’ currents without the clamp diode (D3), and c) with the added lowcurrent clamp diode. 88S2S1Lr1Cr1Cr2D1D2VinCORLLr2voutevCv(s) vreffswVariable Frequency Control LoopVCOFigure 3.11: Variable frequency control method which is used in higher power levels for con-trolling the output voltage in the proposed converterMOSFETs at turn-on and turn-off, as well as ZCS for the diodes at turn-off. There are two controlmethods presented in this chapter for different load levels. When the load is high, the variable fre-quency method is used with two complementary PWM signals with 50% duty cycle for the switches.This method is very simple and straightforward, which is shown in Fig. 3.11. As seen in Fig. 3.11,the output voltage is subtracted from the reference value to obtain the error signal which is shownby eV in the figure. This error signal feeds the controller which is shown by Cv(s) in the figure.The compensator can be a conventional controller like Proportional Integrator (PI) which is usedfor this circuit. As seen in Fig. 3.11, the output of the controller connects to the Voltage-ControlledOscillator (VCO) in order to generate the complementary gate signals for the switches.As seen in Fig. 3.7, as the load decreases, the switching frequency should be higher to compen-sate for the load change to provide the same gain in the voltage. Although the switching losses arenegligible in the circuit, very high switching frequencies may not work in the experimental setupmostly due to the parasitics in the components. Therefore, there should be a maximum switch-ing frequency in which the converter does not pass to guarantee the operation of the circuit. Thismaximum frequency is different for every setup and the designer should take many factors intoaccount in the design stage. Thus, when the load decreases which forces the converter to work witha switching frequency higher than the predefined maximum frequency, the converter enters into the89Genvout∆vBurst∆vBurstVrefDBurstfBurst~GateS1GateS2(a)GenvreffswMaxBurst Mode Control LoopGatesONGatesONGatesOFF VCOS2S1Lr1Cr1Cr2D1D2VinCORLLr2vout(b)Figure 3.12: Burst mode operation, used in lower power levels for the proposed advancedLLCC resonant boost converter. a) Operational waveforms, and b) control circuit ofthe converter during the burst mode operationburst mode operation which is shown in Fig. 3.12.As seen in Fig. 3.12(a), a variable named gate enable or Gen is defined to declare when the gatesignals in the converter should be both on or off. This variable takes the output voltage and thereference value as inputs. In other words, when the output voltage passes the maximum specifiedvalue (Vre f +∆vburst), the gate signals are turned off by the controller and remain off until the out-90put voltage gets below the specified minimum value (Vre f −∆vburst). After reaching the minimum,both of the gate signals are turned on again to prevent the output voltage from decreasing more thanthe minimum. With this method, the output voltage is guaranteed to have a specific ripple withinthe required range. Gate signals for both of the switches, as well as the gate enable (Gen) variablehas been shown in synchronous with vout in Fig. 3.12(a). The control circuit has been shown inFig. 3.12(b) in the burst mode operation showing the way Gen is acquired with a Schmitt-triggercomparator with pre-defined thresholds of ∆vburst around the reference voltage (Vre f ). After deter-mining Gen, this signal should be ANDed with the complementary gate signals generated with theconstant switching frequency ( fswMax) and 50% duty cycle as shown in Fig. 3.12(b). Afterwards,the output signal of the AND gate generates the gate signals of the switches, successfully turningthem on and off at specific times related to the output voltage.As stated, two different control methods are implemented in different load levels in the con-verter shown in Fig. 3.11 for the heavy loads, and in Fig. 3.12 during light loads. Now, theremaining part would be defining an algorithm by which the converter determines to work witheither of these two controllers which are shown in Fig. 3.13. As seen in Fig. 3.13, the converterstarts with the variable frequency method or with the flag Variable-Frequency-Control-Loop on,shown in Fig. 3.11. This method changes the switching frequency to regulate the output voltageat different load levels. As stated, when the load gets so light, the switching frequency may reachthe maximum specified value, therefore, in the variable frequency stage shown in Fig. 3.13, thecontroller always checks to see if the switching frequency is close to the maximum or not. If this isthe case, the controller enters into the burst mode control which enables the controller circuit shownin Fig. 3.12. As seen in Fig. 3.13, when the converter is in the burst mode operation or when theflag Burst-Mode-Control-Loop is on, the converter always checks the value of the vout to see if theoutput voltage is within the burst mode operational region defined with Vre f and ∆vburst . In otherwords, if the output voltage is between Vre f −∆vburst and Vre f +∆vburst as stated in Fig. 3.12(a),burst mode works fine, however, if the output voltage gets lower than the specified minimum orVre f −∆vburst , it means that the Burst mode operation cannot bring the output voltage up to thedesired region. Therefore, it means that the burst mode converter even with turning on the gates91Variable Frequency Control LoopONBurst ModeControl LoopONf    swfswMax≥NoYesStartNoYesvoutV     -ref< 2×∆vBurstFigure 3.13: The algorithm by which the proposed advanced LLCC resonant converter deter-mines which controller to use for regulating the output voltageall the time or making Gen = 1, cannot force vout close to the desired value. Thus, the converter isexperiencing a higher load which needs a lower switching frequency to regulate the output voltage.In other words, as shown in Fig. 3.13, when vout is lower than Vre f −2×∆vburst , it means that theconverter should switch to the variable frequency mode. With this method of control shown in Fig.3.13, there is no need to measure the output current to determine if the load is high enough for theconverter to enter the variable frequency mode or low enough to work in the burst mode operation.This can save the current measurement circuit in the experimental setup.As seen in Fig. 3.12, in the Bust mode operation, the duty cycle of the converter when workingis shown by Dburst as well as the frequency of the on and off in the burst operation which is shownby fburst . The equation for the gain of the converter in the burst mode is presented in (3.51) inwhich m|@ fSw max is the gain of the converter when working in the maximum allowable switchingfrequency. As stated, when the converter is working in the burst mode, the switching frequency isconstant and is equal to the maximum.92(voutvin) = Gainvar f req×Dburst = m|@ fSw max×Dburst (3.51)3.5 Design Procedure for the Proposed DC/DC AdvancedLLCC Resonant StructureAs discussed, the proposed advanced LLCC resonant converter provides some unique featuresincluding ZVS for the MOSFETs at turn-on and turn-off, ZCS for the diodes, and continuous inputcurrent with low ripples. In order to better understand the design procedure, this section is explainedby a design example. The required components are chosen in the first subsection. The stress of thecomponent is also mentioned based on the equations given in the analysis section. In the secondsubsection, the soft-switching area is further analyzed in the designed circuit. There are equationsand graphs describing the soft-switching area for the proposed converter.3.5.1 Selecting the ComponentsIn the designed prototype, the input voltage ranges from 150V to 250V , and the output voltage is400V , while the maximum output power is 400W . The converter is designed such that it has asminimum conduction losses as possible while keeping the gain variation as high as possible withthe small variations in the switching frequency. Since the switching losses in the semiconductorsare nearly zero, the switching frequency can be increased. Based on the waveforms illustratedin Fig. 3.7, if the quality factor is high, the difference between the maximum and the minimumswitching frequency gets lower, which is desirable. However, in that case, the AC voltage acrossthe resonant capacitors gets higher as well, which requires special capacitors to be used. Also,since the time during which the current of the inductor is being charged without transferring to theoutput is increasing, the conduction losses increase. Therefore, it is not recommended to choose ahigh quality-factor or Q. On the other hand, if Q is too small, the gain waveform flattens increasingthe frequency deviation with the same deviation in the gain. Hence, a moderate value for Q shouldbe selected to avoid these problems. For this purpose, Qmax = 0.1 is selected for the design. SinceQmax = 0.1 is selected, the resonant frequency is chosen such that the minimum frequency of the93converter would be 200kHz. The minimum frequency of the converter once vin = 200V , happensat the nominal loading conditions. Regarding this, the resonant frequency is selected to be 92kHz.As seen in Fig. 3.7, when Qmax = 0.1 is selected, the minimum and the maximum frequency canbe determined. As stated, the gain changes from mMin = voutvinMax = 1.6 to mMax =voutvinMin= 2.67. Atthe nominal load, Qmax = 0.1, and so based on Fig. 3.7 the switching frequency changes from1.75×92kHz = 161kHz to 2.75×92kHz = 253kHz. Also, as stated in section 3.4, the maximumfrequency of the converter is restricted to 300kHz, which happens under light loading conditions.Therefore, the minimum frequency of the converter is 161kHz, and the maximum frequency isdetermined to be 300kHz, at which point the Burst mode operation kicks in. Since the maximumquality factor and the resonant frequency are determined, the resonant capacitors and inductors canbe calculated using (3.52) and (3.53):Cr1 =Cr2 =14piRloadQmax fres= 21.6nF ≈ 22nF (3.52)Lr1 = Lr2 =Rload2pi fresQmax = 69.1µH ≈ 70µH (3.53)The characteristic impedance of the resonant tank can then be calculated as (3.54). This equa-tion is based on the one given in (3.31):Zr designed =√Lr12Cr2= 40Ω (3.54)The stress of the components can be calculated based on the equations and graphs providedin Section 3.3. As given in Fig. 3.8(a), the maximum voltage of the resonant capacitors and themaximum current of the resonant inductors can be defined. Since the normalized frequency of theconverter is changing from 1.75 to 2.75 at the nominal load, iLrmaxn or vCmaxn is changing from1.78 to 0.73. This means that the maximum voltage of the resonant capacitors is changing from267V to 182V . Also, the normalized maximum current of the inductors is equal to the normalizedmaximum voltage of the capacitor, as mentioned in (3.41). The reference value of the current in thenormalization process can be calculated using (3.54) and (3.33). Therefore, the maximum value94of the inductor’s current changes from 6.6A to 4.5A at the nominal output power. The value ofthe resonant inductor should be 70µH, and the maximum value of the inductor’s current is 6.6A.Therefore, the core RM12/I from Ferroxcube is selected with the material 3C95. The number ofturns is selected to be 17 with AWG 12 Litz wire. Litz wire is chosen in order to have low resistancein higher frequencies. Based on the selected core and the material, and the number of the winding,the maximum value of the magnetic flux density or Bm would be 180mT . The flux density of thecore at the nominal loading condition is 140mT .Output capacitor can be calculated based on (3.55). In (3.55), Iout represents the output currentand is considered to be constant. DO f f is the time that the output capacitor supplies the load whichis approximately equal to the difference between t3 and t2 or the ratio of (t3− t2) to the half of theswitching period. In other words, because of the interleaved behaviour of the circuit, the frequencyof the current supplying the output capacitor is twice as much as the switching frequency, whichexplains the coefficient 2 in the denumerator of the equation (3.55).Cout =IoutDO f f2∆Vout fSw.(3.55)In the worst case, the maximum ripple happens under full loading conditions with the maximumoutput current. DO f f is selected to be 0.5 in the worst case. In order to have less than 2% ripplein this condition, ∆Vout is selected to be 6V which is 1.5% of the output nominal voltage (400V ).Based on these values, the output capacitor is calculated to be 20µF . The maximum ripple in Burstmode operation is also chosen to be less than 2% of the nominal load. To guarantee this value,the maximum ripple is selected to be 1.5%, which is equal to 6V . Therefore, as indicated in theprevious section, ∆vBurst is considered to be 3V . During the burst mode operation, (3.56) can beused to determine the frequency of the burst mode indicated in Fig. 3.12. Although this frequencyis changing based on the load, and it also is selected based on the control algorithms discussedin the previous chapter, the calculated value is close to 1kHz in different loading conditions. Forexample, at 200V to 400V conversion rate, and 10% of the load, based on (3.51), DBurst is calculatedto be 0.25. Therefore, based on (3.56), fBurst is calculated to be 625Hz which is very close to theexperimental result shown in Section 3.6.95Table 3.1: Components used for the experimental prototype of the proposed DC/DC advancedLLCC resonant boost prototype.Parameter Value DescriptionLr1, Lr2 70 µH RM12−3C95Cr1, Cr2 22 nF B32642B0223JCout 2×10 µF MKP1848C61050JK2S1, S2 TK20A60W −D1, D2 RURP1560 −fBurst =(1−DBurst)Iout2Cout∆vBurst(3.56)Other circuit elements are listed as shown in Table 3.1.3.5.2 Soft Switching Region AnalysisThe maximum value of the inductors’ currents helps to discharge the parallel capacitors of theswitches. This value is higher than the input current, which makes the ZVS possible even under lightloading conditions. Since a higher current is used to provide ZVS at turn-on instances, a MOSFETwith bigger parasitic capacitance, or snubber capacitors can be used. This higher capacitance acrossthe drain-source provides soft-switching even at turn-off instances. It also reduces the dvdt acrossthe switches. In this subsection, the soft-switching characteristics of the proposed converter areanalyzed. As mentioned, the proposed converter can provide soft-switching for all semiconductorsin the circuit. It can provide ZVS for the MOSFETs and ZCS for the diodes. As stated, the proposedconverter can provide ZVS for the switches at turn-on as well as turn-off.As seen in Fig. 3.5, the gate of switch S1 is turned off by the controller at t3, which is the end ofoperational mode III. At this moment, the current of inductor Lr1 cannot reach zero instantaneously.Therefore, when the switch is turning off, iLr1 flows through the parasitic capacitor of switches S1and S2. The active schematic of the circuit during these moments is shown in Fig. 3.6(d). As shownin Fig. 3.6(d), half of the inductor’s current is charging the drain-source capacitor of switch S1. Theduration of this interval is negligible compared to the rest of the period or other modes. Therefore,96it can be assumed that the current of the inductor remains constant in this mode. This means thathalf of the inductors’ maximum currents (12 iLmax) are charging each of the parasitic capacitors.Hence, at the turn-off instances, (3.57) can be assumed based on the characteristic equation of thedrain-source capacitor or id =Cdsdvdsdt .Cds(o f f )Min =0.5 iLmax t f all−timevout(3.57)In (3.57), t f all−time is the fall time of the current in the switch during turn-off. These values canbe extracted from the datasheet of a specific switch. In (3.57), vout is the change in the capacitor’svoltage during turn-off, which replaced the ∆v in the characteristic equation of the capacitor (id =Cds∆vds∆t ). The minimum value of the drain-source capacitance (Cds(o f f )) can be calculated based on(3.57). Therefore, if the parasitic capacitor across the switch is higher than this value in a specificloading condition (iLmax), switching losses can be minimized at turn-off. In addition, as stated, halfof the resonant inductor’s current is charging the capacitor. Moreover, if the parasitic capacitanceof the switch is not big enough to be higher than the minimum capacitance required in (3.57), aparallel capacitor across the switch can be added in the circuit. The only problem that the excessivecapacitance across the switch can make is at turn-on. In other words, if the capacitance across theswitch is very high, it needs more current to discharge it before turning on the switch. However,this is not a big issue in the proposed converter because of the high current (iLmax) that is used todischarge this capacitor.As stated in the operation section of the chapter, switch S2 can be turned on under ZVS in modeV from t4 to t5. This is possible because the current of switch S2 is flowing through the anti-paralleldiode of the switch and the parasitic capacitor is already discharged. As shown in Fig. 3.5(d), halfof the inductor’s maximum current is helping discharge the drain-source capacitance of the switch.The drain-source capacitance of the switch at turn-on is shown with Cds(on). An equation similar tothat in (3.57) can be used at turn-on. This equation has been given in (3.58).Cds(on)Max =0.5 iLrmax tdead−timevout(3.58)97As seen in (3.58), the maximum value of the capacitance that can be safely discharged beforeturning on the switch is calculated. This is the maximum capacitance because the maximum timerequired for the capacitor is the dead-time. In other words, if the capacitance of the switch isdischarged before the end of the dead-time, the mentioned switch can be turned on under ZVS.Also, ∆vds in the characteristic equation of the capacitor is substituted with vout in (3.58), becauseat turn-on the voltage of the capacitor should be discharged from vout to zero for the switch to beable to have ZVS. Besides, the capacitance across the switch in (3.58) is the maximum capacitancethat the circuit can fully discharge before turning on the switch by the controller.The maximum possible drain-source capacitance for the switch for which the converter canprovide soft-switching at turn-on is shown in Fig. 3.14. Also, the minimum required drain-sourcecapacitance that the switch needs in order to have soft-switching at turn-off is also depicted inFig. 3.14. These figures have been drawn versus the output power variations in different loadingconditions at the nominal voltage values. As seen in Fig. 3.14, the output parasitic capacitanceof the selected switch has been shown. This value should be the time-related output capacitanceof the switch or Co(tr). However, this quantity is not reported in the datasheet of the selectedswitch, TK20A60W. Therefore, this value has been reported from the datasheet of another MOSFET(IPP60R190C6) with similar ratings and switching behaviour. This value has been shown as thetime-related output capacitance or Co(tr) and is equal to 266pF . As seen in Fig. 3.14, with theparasitic capacitance of the switch, ZVS can be achieved in a wide range of the load at turn-on.However, this parasitic capacitance is not big enough to provide the minimum required capacitancefor soft-switching at turn-off with a good margin. Therefore, a parallel capacitor can be addedacross the drain-source pins of the switches in the circuit. This value can bring the capacitance linein Fig. 3.14 to a higher point. Hence, soft-switching can be achieved at turn-off as well as turn-on. As seen in Fig. 3.14, with the 500pF capacitance across the switches, soft-switching can beachieved at turn-on and turn-off from full load to light load. Therefore, a 500pF snubber capacitorhas been added in parallel to each of the MOSFETs to provide soft-switching for the switches at bothturn-on and turn-off. As stated in Section 3.4, the converter enters into the burst mode under lightloading conditions. Since the switching frequency of the converter reaches the maximum specified980 100 200 300 4000500100015002000Cat turn-onds(Max)C at turn-offds(Min)Co(tr)+CsnubberCo(tr)Figure 3.14: Maximum possible value of Cds in order to guarantee ZVS at turn-on. In addition,the minimum value of Cds required at turn-off to provide ZVS for the switch. Bothwaveforms are given versus the output power and the nominal input-output conditions.The parasitic capacitor (Co(tr)) for the selected switch (TK20A60W) is approximatedto be 260pF . The added snubber capacitors across the switches are Csnubber = 500pF .frequency of 300kHz at 160W loading condition, the proposed converter works in the burst modeat lighter loads. Therefore, based on Fig. 3.14, soft-switching is guaranteed at turn-on and turn-offat different loading levels in the variable frequency operational mode as well as the burst modeoperation. In other words, before even reaching the minimum load for soft-switching shown in Fig.3.14, the converter enters into the burst mode. However, if the frequency could be increased evenunder light loading conditions instead of entering into the burst mode, the minimum load underwhich the converter would lose its soft-switching for the MOSFETs at turn-on and turn-off wouldbe still very low. Therefore, in the proposed converter, soft-switching can be achieved under lightloading conditions as well as full load.3.6 Experimental Results for the Proposed DC/DC AdvancedLLCC Resonant StructureTo show the validity of the theoretical analysis, a prototype of the proposed advanced LLCC res-onant converter is constructed and tested. Circuit elements are selected based on the procedure99Figure 3.15: The picture of the proposed DC/DC advanced LLCC resonant structure.explained in the previous section. The chosen components are shown in Table 3.1 and a pictureof the prototype is given in Fig. 3.15. The studied converter produces a low-ripple continuousinput current with the frequency control method. Additionally, it is shown in this section that soft-switching is provided for all of the semiconductors, including MOSFETs and the diodes. In thissection, the experimental results are shown for the input voltage ranging from 150V to 250V , andthe output voltage at 400V with 400W maximum output power. In the first subsection, the opera-tion of the proposed converter is analyzed in the experimental prototype. As shown, the operationalwaveforms of the proposed converter are similar to the predicted behaviour in Section 3.2. In thesecond subsection, the proposed converter is compared with a similar configuration (conventionalinterleaved boost) with the same components.3.6.1 Operation of the Proposed Advanced LLCC Resonant Boost Conceptin a DC/DC SetupAs stated, the proposed converter provides soft-switching for all of the semiconductors in the cir-cuit. Experimental results are provided to prove the validity of the theoretical analysis. The gatesignal, drain-source voltage, and the drain current for one of the MOSFETs are shown in Fig. 3.18(a)at 400W output power and 200V to 400V conversion ratio. As seen in the figure, the switch isturned on and off under ZVS condition and the soft-switching occurs at both on and off times. Also,switching waveforms of the switch at Pout = 160W are shown in Fig. 3.17(a). As stated in theprevious sections, if the capacitance across the drain-source is large, it can resist to the changesof the drain-source voltage at turn-off (while getting charged by the inductor’s current when the100switch is not conducting). In this case, the current of the inductor cannot charge this capacitancenor change the drain-source voltage of the switch during turn-off. This causes the switch to turn offwith ZVS. As shown in Fig. 3.18(a) and (b), the switch current cannot charge this capacitor at turn-off instantaneously, so it causes the switch to turn off with zero voltage across the drain-source withminimum switching losses. As predicted by theory, Fig. 3.18(a) and (b) shows that the MOSFETworks under ZVS at both turn-on and turn-off. The soft-switching concept in the proposed structurehas been thoroughly described in Section 3.5 with the related figures and equations. Soft-switchingwaveforms of the switch are shown in Fig. 3.18(a) and (b) at the nominal loading conditions andlight loading levels, respectively. Switching waveforms of the diode D1 are also shown in Fig.3.18(b) and (d). Voltage and current of the diode D1 are shown at the nominal conditions in Fig.3.18(b) and at Pout = 160W loading conditions in Fig. 3.17(b). As seen in the figures, D1 turnsoff with zero current switching or ZCS. Soft-switching happens in both of the loading conditions.Because of the symmetry in the proposed circuit, switching waveforms of the diode D2 are thesame as Fig. 3.18 with a phase shift. Additionally, as stated in Fig. 3.10, the main diodes’ voltagesare clamped using D3. This function is also seen in Fig. 3.18, which has a similar waveform to Fig.3.10(c), proving that the clamp diode is working as predicted by theory. Therefore, Fig. 3.18(c)and (d) show the ZCS turn-off in the diode and the effectiveness of the clamp diode which clampsthe diodes’ voltages to the output voltage.As stated in this chapter, the proposed converter draws continuous input current from the sourceeven with the discontinuous currents in the inductors in the variable frequency control mode. In-ductors’ currents and the input current are shown in Fig. 3.18 at the nominal operating conditions.As seen in Fig. 3.18, the input inductors’ currents are both discontinuous. However, the inputcurrent is continuous. As stated, the analyzed circuit works based on the resonance between theinductors Lr1 and Lr2, and the input capacitors Cr1 and Cr2. Inductors’ currents iLr1 and iLr2, and theinput capacitors’ voltages vCr1 and vCr2 have been captured in Fig. 3.19 to show this phenomenon.As seen in Fig. 3.19, the voltages across the capacitors Cr1 and Cr2 do not remain constant in aswitching period indicating that the capacitors are participating in the resonance in the proposedcircuit. In other words, they are resonating with the input inductors to form a resonant tank for101(a)(b)iD1vD1ZCS turn-offvS1iS1GateS1ZVS turn-onZVS turn-offFigure 3.16: a) Gate signal (GateS1), drain source voltage (vS1), and the switch current (iS1)at 400W , indicating that ZVS at turn-on and turn-off is provided for the switches. b)Diode’s current (iD1) and voltage (vD1) at 400W , which shows that the diode is turnedoff with ZCS, and the clamp diode is working as expected.controlling the gain of the converter.In order for the converter to work under light loading conditions, the switching frequency shouldbe increased based on Fig. 3.7. This results in higher switching frequencies under light loadingconditions. If the frequency increases too much, it will generate other problems such as the in-fluence of the elements’ parasitics, excessive magnetic losses, and reverse recovery problems. Toavoid these problems, the maximum switching frequency is limited as stated in Section 3.4. Thisapproach prevents the circuit from having a switching frequency of more than fSw max. However,to achieve regulation under light loading conditions, the burst mode operation is employed. Duringthe burst mode operation, both gate signals are turned on and off with a frequency lower than the102(a)(b)iD1vD1ZCS turn-offvS1iS1GateS1ZVS turn-onZVS turn-offFigure 3.17: a) Gate signal (GateS1), drain source voltage (vS1), and the switch current (iS1)at 160W , indicating that ZVS at turn-on and turn-off is provided for the switches. b)Diode’s current (iD1) and voltage (vD1) at 160W , which shows that the diode is turnedoff with Zero Current Switching or ZCS, and the clamp diode is working as expected.switching frequency. In this mode, the switching frequency is kept constant at its maximum (whichis 300kHz in this prototype), and the gate signals are kept on during several cycles (duty cycle of theburst mode operation) and off during some other switching cycles. The total number of the cyclesin which the gate signals are on and off would be called the period of the burst mode operation. Thetheoretical waveform of the burst mode operation has been shown in Fig. 3.12. By incorporatingthe burst mode operation, the output voltage could be regulated even under light loading conditionswithout increasing the switching frequency above its maximum value. Therefore, the output volt-age can be regulated at the constant maximum switching frequency without reducing the efficiencyof the converter. The strategy for the burst mode operation is to limit the switching frequency to a103iLr1iLr2iinFigure 3.18: Inductors’ currents (iLr1 and iLr2) and the input current (iin) at the nominal load-ing conditions, which shows that the input current is continuous even with the discon-tinuous inductors’ currentsiLr1iLr2vCr1vCr2Figure 3.19: The resonance characteristic between the inductors Lr1 and Lr2, and also theinput capacitors’ voltages (vCr1 and vCr2) at the nominal loading conditions.value (300kHz in this prototype) and turn on and off both of the gate signals under very light load-ing conditions with a frequency lower than the switching frequency. Inductor currents iLr1 and iLr2,input current iin, and the output voltage vout are shown under 10% of the full load during the burstmode operation in Fig. 3.20. As seen in the figure, the output voltage has 1.5% or 6V peak to peakripple at the burst mode frequency which is close to 1kHz. This value is based on the theoreticalanalysis discussed in Section 3.4.3.6.2 Comparison with the Conventional Interleaved Boost ConverterThe proposed advanced LLCC resonant boost converter has been compared with the traditionalinterleaved boost converter. The same components have been used for both of the structures. Thelist of the components for both of the converters has been presented in Table 3.1. In other words,104iLr1iinvout1.5% or 6Vpk-pkFigure 3.20: Inductor’s current iLr1, input current (iin), and the output voltage vout under burstmode operation at 10% of the full load.the same inductors, capacitors, and semiconductors have been utilized for both of the structures tomake the comparison fair. Since the modulation of the interleaved boost is based on PWM with aconstant switching frequency, the switching frequency of the traditional interleaved boost converterwas selected to be 200kHz. This is the switching frequency of the LLCC resonant boost at full loadconverting 200V to 400V . As stated in this chapter, the input current of the proposed structure hasless ripple compared to the interleaved boost converter, even with the same passive components.The input currents for the proposed LLCC resonant boost and for the conventional interleavedboost converter are shown in Fig. 3.21. Input current is measured for both the proposed and theconventional converters at the nominal loading conditions. As stated, the same components listedin Table 3.1 have been used in both structures.The input current waveform for the proposed converter has been shown in Fig. 3.21(a), aswell as for the conventional interleaved boost converter in Fig. 3.21(b). As seen in Fig. 3.21,the input current ripple is decreased by more than 50% in the proposed structure compared to theconventional interleaved boost converter. In other words, the input current ripple in the proposedadvanced LLCC resonant converter is 1.5A pk− pk in comparison with the 3A pk− pk in thetraditional interleaved boost converter. This is one of the benefits of the proposed converter, whichcan have an input current with lower ripples. Besides, as seen in Fig. 3.21(b) since the conventionalinterleaved boost converter cannot provide ZVS for the switches, there are some switching spikesin the waveforms. However, as shown in Fig. 3.21(a), the waveforms are smoother in the proposedconverter. This is because of the soft-switching characteristics of the proposed advanced LLCC105(b) iin in the conventional interleaved Boost converteriin3A pk-pk(a) iin in the proposed LC resonant Boost structureiin1.5A pk-pkFigure 3.21: Input current at the nominal loading conditions in a) the proposed LLCC Res-onant boost converter, and b) the conventional interleaved boost converter. The samecomponents have been used in both of the converters.resonant boost. Moreover, as seen in Fig. 3.21(b), the input current of the conventional boostconverter is a summation of a triangular waveform and a small sinusoidal. This happens because ofthe resonance between the input inductors and the parasitic capacitors across the switches and thediodes in the Discontinuous Conduction Mode (DCM) boost structure. Inductors’ currents startresonating with the mentioned capacitors when they reach zero. Since the inductors’ currentsare in DCM, their currents reach zero at some point in the switching period. This generates asinusoidal waveform with higher frequencies in the inductors’ currents which is also visible in theinput current waveform [128–130]. The efficiency of the LLCC resonant boost has been comparedwith the traditional interleaved boost converter in different loading levels and input voltages. Theresults are shown in Fig. 3.22(a) and (b), respectively.10685878991939597140 160 180 200 220 240 260808284868890929496980 50 100 150 200 250 300 350 400 450Output Power (W)Efficiency (%)Conventional Interleaved Boost(PWM mode)Conventional Interleaved Boost(Burst mode)Conventional Interleaved Boost (PWM mode)Interleaved LC Resonant Boost (variable fsw)Interleaved LC Resonant Boost (variable fsw)Interleaved LC Resonant Boost(Burst Mode)Input Voltage (V)Efficiency (%)(a)(b)Figure 3.22: Efficiency comparison between a) the LLCC resonant boost in the variable fre-quency and the burst mode operation, and the traditional interleaved boost converterwith the same components from full load to 10% of the maximum load with vin = 200Vto vout = 400V . The conventional interleaved boost converter’s efficiency is also mea-sured in the burst mode under light loading conditions. b) The efficiency comparisonin different input voltages from 150V to 250V to vout = 400V at full load.Efficiency comparison has been shown in Fig. 3.22(a) from light load to full load when theinput voltage is 200V . Also, efficiencies at different input voltages from 150V to 250V are shownin Fig. 3.22(b). As seen in Fig. 3.22(a), the efficiency of the analyzed LLCC Resonant boost circuitis about 1% higher than the traditional Interleaved boost converter with the same components atfull load. To make the comparison fair for both of the converters, the efficiency of the conventionalinterleaved boost converter has been also measured working in the burst mode under light loadingconditions. As seen in Fig. 3.22(a), with the presented burst mode operation, the efficiency of theLLCC resonant boost circuit is significantly higher than the traditional interleaved boost converter107under light loading conditions. Moreover, the efficiency of the proposed converter is higher than thetraditional interleaved boost in different input voltages ranging from 150V to 250V which provesthat the operation of the circuit is good even in different voltage gains. As seen in Fig. 3.22(a), theslope of the reduction in the efficiency is higher in the variable frequency control mode comparedto the burst mode in the proposed converter for below 50% of the nominal load. As seen in Fig.3.13, changing the maximum frequency of the converter in the variable frequency mode can changethe starting point of the burst mode operation. In other words, if fSwMax is chosen to be bigger, itmakes the converter work in the variable frequency mode for a higher fraction of the load. Thismeans that the efficiency of the burst mode operation at very light load levels would be less. How-ever, the operation of the converter in the variable frequency mode is increased in lighter loadingconditions, resulting in lower ripples in the components. For example, as seen in Fig. 3.20, theoutput voltage ripple is increased in the burst mode operation compared to the variable frequencymode. Hence, there is a trade-off in choosing the maximum frequency of the converter, or fswMax,that the designers need to take into account.3.7 SummaryIn this chapter, the proposed advanced LLCC resonant boost structure was studied in a DC/DC ap-plication. The proposed converter provides soft-switching capabilities in the whole loading rangefor all of the semiconductors. The presented LLCC resonant boost converter was analyzed thor-oughly with the related modes of operation, equations, and design considerations. The switchingfrequency is controlled and limited to the maximum frequency of 300KHz. The experimental re-sults show that ZVS is provided for the switches at turn-on and turn-off instances, and ZCS for thediodes. Both inductors in the circuit are small with DCM currents while the input current is in CCMwith low ripples. Significant efficiency improvement is recorded for a 400W prototype, especiallyunder light loading conditions, compared to a benchmark conventional interleaved boost converterwith the same components. The measured efficiency shows approximately 1% improvement at fullload and more than 9% improvement under the light loading conditions. Besides, the input and out-put current ripples are significantly lower, compared to the traditional interleaved boost structure.108Input current ripple has been decreased more than 50% compared to the conventional structure atfull load with the same passive components.As mentioned, this structure is a fundamental resonant structure that can be applied to otherapplications too. In this chapter, the operation of this structure was reviewed in switching cycleswith related equations. In order to validate the analysis, a DC/DC version of this structure wastested which is suitable for step-up interfacing modules in renewable energy applications. The nextchapter is dedicated to another application for the LLCC resonant boost which is an AC/DC PFCconversion application. Understanding the basics of the proposed structure in a DC/DC applicationis a crucial step to move forward to other applications such as AC/DC converters. There are manyreferences in the next chapter of the analysis done in this part of the work.109Chapter 4Resonant Boost Structure for Narrow InputVoltage Range Applications: AC/DC PFCApplication1In this chapter, the proposed advanced LLCC resonant boost structure in Chapter 3 is studied in anAC/DC PFC application. The DC/DC LLCC resonant boost structure was developed in Chapter 3 fora distributed PV conversion system (shown in Fig. 3.4). Different operating modes and equationswere analyzed in that chapter of the thesis. The theoretical and experimental analysis for thisconverter was done on a switching-cycle scale. In this chapter, this advanced resonant structure isdeveloped for an AC/DC application with some modifications. The resonant bridgeless boost PFCconverter proposed in this chapter is shown in Fig. 4.1.The resonant AC/DC version is based on the proposed advanced LLCC resonant boost structurewith some adjustments. The resonant tank is similar, but the configuration of the semiconductorsare different. There are two additional diodes in the AC/DC version of the advanced resonant circuitto enable the PFC converter to work with an AC input.The proposed AC/DC circuit simultaneously provides a simple bridgeless and symmetrical struc-ture; resonant behaviour providing soft-switching for all of the semiconductors; intrinsic highpower factor capability without a dual loop control structure; continuous input current with low1Portions of this chapter have been published in [3–5]110S2S1Lr1Cr1Cr2D1D3D4D2VinCORLLr2voevCv(s) vreffswVCOVariable Frequency Control LoopNoCurrent LoopiinFigure 4.1: Proposed resonant bridgeless AC/DC PFC boost converter with inherent sinusoidaland continuous input current without any current loops.ripples even with small inductors; and simple modulation and control circuit. The input current iscontinuous and divided equally between the two input inductors even in the lower parts of the inputvoltage in the line cycle. Soft-switching is provided for all of the semiconductors in the circuit. ZVSis provided for the MOSFETs at turn-on, and ZCS is provided for the diodes at turn-off. Moreover,the studied PFC converter has inherent power factor correction capability. In other words, as shownin Fig. 4.1, the converter draws a sinusoidal input current when connected to a sinusoidal inputvoltage without any current controller loops, making the controller simple and easy to incorporate.In Section 4.1, the principles of operation for the proposed PFC converter is fully discussed.In Section 4.2, related equations and analysis necessary for the design stage are provided. Designconsiderations have been provided in Section 4.3 based on the represented equations for a 400Wexperimental setup. The modulation and control requirements for the proposed AC/DC resonantconverter are covered in Section 4.4. To show the validity of the theoretical analysis, a prototypeis constructed and experimental results are presented in Section 4.5. The presented results are alsocompared with a conventional PFC converter with the same power levels and characteristics.111viniiniLr1iLr2iD1iD2vCr1vCr2iD3iD4Inherently Sinusoidal ContinuousInput CurrentFigure 4.2: The current and voltage waveforms of the proposed advanced resonant PFC circuitin a line-frequency cycle with simple variable switching frequency modulation.4.1 Principles of Operation for the Proposed Advanced LLCCResonant Boost Concept in Line CyclesThe principles of operation for the proposed resonant AC/DC converter is analyzed in this section.As stated, the proposed LLCC resonant boost structure, introduced in Chapter 3, is modified tobe used in an AC environment in this chapter in the form of a bridgeless AC/DC converter. Theproposed bridgeless PFC rectifier has a resonant behaviour to convert the input AC voltage to theoutput DC, and also to draw a sinusoidal and continuous input current from the grid. This resonantphenomenon in the circuit is described in this section to show some of the benefits of the proposedconverter. In this section, the behaviour of the proposed converter in different intervals of the112line cycles and also the switching cycles are investigated. The equivalent circuit of the proposedconverter as well as currents’ and voltages’ waveforms in different intervals are also given in thissection.The power stage of the proposed PFC converter is illustrated in Fig. 4.1. The simple controlalgorithm used in the proposed converter is also shown in Fig. 4.1. The operation of the converteris symmetrical in two half-line cycles. Fig. 4.2 represents the line cycle waveforms of the pro-posed converter. The equivalent circuit diagrams in the positive and negative half-line cycles areillustrated in Fig. 4.3. As seen in the figures, one switch leg is used in the circuit with S1 and S2.Two series diodes (D1 and D2 in the positive half cycle, and D3 and D4 in the negative half cycle)are used to prevent reverse power from flowing to the input. It will be shown in this section thatthe input current is continuous during the line frequency period, which is one of the benefits of theproposed converter.(a)S2S1Lr1Cr1Cr2D1D3D4D2VinCORLLr2(b)S2S1Lr1Cr1Cr2D1D3D4D2VinCORLLr2Figure 4.3: The equivalent circuit of the proposed AC/DC resonant converter in a) the positivehalf line cycles, and b) negative half line cycles.113In order to simplify the analysis, it is assumed that all of the circuit elements are ideal except forthe MOSFETs. In the MOSFETs, the parasitic drain-source capacitance is not neglected. Consideringthe output capacitors of the MOSFETs is necessary in order to show the ZVS conditions for theswitches. The circuit operates at a steady-state and the output capacitors are large enough to beconsidered as an ideal DC voltage source. It is assumed that the inductors Lr1 and Lr2 are equal,as the input capacitors Cr1 and Cr2. Thus, each of the inductors and the input capacitors can beshown with Lr and Cr respectively in the equations. Because of the symmetrical operation in theproposed converter in each of the half-line cycles, the analysis is done during the positive portionof the input voltage. Then it can be extended to the whole range. Additionally, it is assumed thatthe input voltage is constant in a switching cycle. This is because of the high switching frequencyin comparison with the line frequency. Waveforms of the converter in a line frequency cycle areshown in Fig. 4.2.The equivalent circuit of the converter is given in Fig. 4.3(a) for the positive half-line cycles,and in Fig. 4.3(b) for the negative half-line cycles. Fig. 4.3, shows the behaviour of the proposedAC/DC converter in different line cycles. Since this converter is another form of the proposedLLCC resonant boost converter introduced in Chapter 3, for the full switching cycle analysis ofthe converter, the reader can refer to the previous chapter. However, the switching cycle analysisof the proposed resonant structure is briefly given in this chapter as well. The equivalent activecircuit and theoretical key waveforms in a switching cycle scale are shown in Fig. 4.4 and Fig.4.5, respectively. These figures are describing the switching frequency operation of the proposedconverter in the positive half line cycles. Since the circuit is symmetrical, the switching operationof the proposed converter is similar in both of the half line cycles. Fig. 4.4 and Fig. 4.5 are similarto Fig. 3.5 and Fig. 3.6 in Chapter 3. As stated, the resonant concept introduced in Chapter 3 isapplied in an AC/DC PFC application in this chapter. Therefore, the switching cycle behaviour ofthe converter is similar. In this part of the chapter, the switching cycle behaviour is briefly reviewedand then the analysis is given for the line frequency behaviour.As seen, there are eight different operational modes for a switching cycle. Since the operationof the converter is symmetrical, only the first four modes are explained in this section. Before114the first mode, it is assumed that the drain-source capacitor of the switch S1 is discharged. So,the parasitic capacitor of the switch S2 is fully charged to the output voltage. Additionally, it isassumed that the anti-parallel diode of the switch S1 is conducting. At this moment, switch S1 canbe turned on under the ZVS condition.Mode I [t0 < t < t1] shown in Fig. 4.4(a): This mode is started when the body diode of theswitch begins to conduct. Since the body diode of S1 is conducting, S1 can be switched on underZVS condition. In this mode, iS1 is negative and ramping up. This mode ends when iS1 reacheszero (at t1). At this moment, the currents of the input capacitors become zero, and since iCr1 waspositive before that, the voltage of Cr1 is at its peak and vCr2 is at its lowest value in the switchingcycle.Mode II [t1 < t < t2] shown in Fig. 4.4(b): The current flowing through D1 and S1 is still charg-ing inductor Lr1. Simultaneously, Lr2 is supplying the load through D2 and S1. Nevertheless, aftert1, the net current of Lr1 and Lr2 is positive flowing from the drain to the source of S1. During thisinterval, iLr1 is increasing and at the same time iLr2 is decreasing. At t2, iLr2 touches zero, whichforces the diode D2 to turn off under ZCS condition and consequently stops the inductors fromfeeding the output capacitor. As seen in Fig. 4.5, iLr1 and iLr2 can be interpreted approximatelylinearly from t0 to t2. During this mode, in order to simplify the equations, the input capacitors’voltages (vCr1, and vCr2 ) can be considered to be constant as in (3.7). In (3.7), vCmax is the maxi-mum voltage of the input capacitors in a switching cycle. As stated, considering the voltage acrossthe input capacitors to be constant during this interval means that the inductors Lr1 and Lr2 haveconstant voltages equal to vCmax and vin− vCmax− vo, respectively. The equations for calculatingthe inductors’ currents are represented in (3.8) and (3.9).Mode III [t2 < t < t3] shown in Fig. 4.4(c): Once the diode D2 turns off, this interval begins.During this time, iLr1 is ramping up through S1 and D1, and iLr2 is zero. At the same time, vCr1decreases because of the negative value of iCr1. On the other hand, since iCr2 is positive, vCr2 isincreasing. Turning off the switch S1 by the controller is the end of this interval. Since a resonancebetween Lr1 and the parallel combination of Cr1 and Cr2 is happening during this mode, vCr1 andiLr1 can be expressed with sinusoidal equations mentioned in (3.10).115D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr212iLr212iLr212iLr2 (h) t7 ~ t8D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr2 (g) t6 ~ t7D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr1iLr2iLr1(f) t5 ~ t6D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr1iLr2iLr1(e) t4 ~ t5D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr1iLr112iLr112iLr112(d) t3 ~ t4D3D4S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr1(c) t2 ~ t3D3D4(b) t1 ~ t2S2S1Lr1Cr1Cr2D1D2VinCORLLr2iLr2iLr1iLr2D3D4VS2S1Lr1Cr1Cr2D1D2inCORLLr2iLr2iLr1iLr2(a) t0 ~ t1Figure 4.4: The proposed resonant boost PFC converter structure in the positive half-line cycleduring each switching cycle interval.116iLr1iLr2GateS1GateS2iS1iS2vDS-S2vDS-S1iiniCr2iCr1vCr1vCr2t0 t1 t2 t3 t4 t7 t8t5 t6Continuous Input CurrentFigure 4.5: Operating modes of the proposed advanced resonant PFC converter during theswitching cycle intervals. The circuit works with simple variable switching frequencymodulation and complementary gate signals with 50% duty cycle. These waveformsare for the converter at positive half-line cycles. The operation of the converter is thesame in the negative half-line cycles because of the symmetry in the topology.117Resonant frequency or ωres is the result of the resonance between each inductor (Lr1 or Lr2)and the parallel combination of the input capacitors (Cr1 and Cr2). Therefore, it can be defined as(3.11). In addition, the impedance of the resonant elements is shown with Zr which is also definedin (3.11). The resonant tank impedance or Zr is just a definition that will prove useful in the analysissection of the chapter. Moreover, (3.10) can be used to find a relationship between iLmax and vCmax,which is given in (3.12).Mode IV [t3 < t < t4] shown in Fig. 4.4(d): Starting this mode, the gate signal of S1 is turnedoff, which results in both switches being off. Meanwhile, the current in Lr2 is zero, and iLr1 isexperiencing its maximum in the switching cycle or iLmax. Since the current of an inductor cannotchange suddenly, iLr1 cannot reach zero instantaneously, and the only way it can close its path is toflow through the drain-source capacitors in the MOSFETs. In other words, it is helping to charge thedrain-source capacitance of S1 and discharge the capacitance of S2. If S1 has a big capacitor acrossthe drain-source, its voltage does not reach vout suddenly, and this helps decrease the turn-off loss.This leads to a reduction in dvdt across the switches at turn-off moments.On the other hand, if the parallel capacitance of the switch is chosen larger, it takes more timeand energy to discharge this capacitor prior to the turn-on of the switch, risking the ZVS conditionat turn-on. However, since the current for discharging the cap is the maximum current of eachinductor (iLmax), ZVS at turn-on is achieved even under light loading conditions. At the end of thisinterval, the voltage across the drain-source capacitance of S2 reaches zero, and from this momenton, the inductor current iLr1 will flow through the anti-parallel diode of the switch S2. During thisinterval, S2 can be switched on with discharged parallel capacitor or ZVS.Because of the symmetry in the circuit, the next four modes of operation (Fig. 4.4(e)-(h)) aresimilar to the first four intervals (Fig. 4.4(a)-(d)) discussed in this section. In other words, as seenin the first four intervals, switch S1 is going to be turned on under soft-switching conditions, but inthe next four intervals, S2 can be switched on under ZVS. Therefore, the same pattern is observedin terms of operation of the circuit in the second four intervals, and the discussion would be verysimilar to that of the first intervals. In the next section, the mathematical equations of the proposedconverter are analyzed and presented.1184.2 Proposed Advanced LLCC Resonant Boost ConceptMathematical Analysis in Line CyclesIn this section, the proposed AC/DC converter is mathematically analyzed. The proposed converterhas a simple and symmetrical structure which makes the mathematical analysis easier. In thissection, the line frequency characteristics of the proposed converter are investigated as well as theswitching scale behaviour. Since the switching cycle analysis of the advanced LLCC resonant boostis fully given in Section 3.3, there are many references to the equations in Chapter 3 to summarizethis section. In the line frequency analysis, it will be mathematically shown that the proposed con-verter has inherent PFC capability without any current loops. It will be also shown that the proposedconverter draws continuous input current with low ripples, even with the small inductances withdiscontinuous currents. These characteristics happen with a simple variable frequency modulationtechnique with 50% duty cycles in complementary mode. Switching cycle analysis is provided inthe first subsection, and the second part of the section represents the analysis in the line frequencycycles.4.2.1 AC/DC Converter Analysis Review in a Switching CycleIn this subsection, the voltages and currents of the proposed circuit are analyzed at different timeintervals in a switching cycle. In order to have a better understanding of the behaviour of theconverter, input and output currents should be first studied in the switching cycle. In this sub-section, some of the equations related to the input and output currents are given based on theequations in Chapter 3. It should be mentioned that at this part, all of the converter characteristicslike vin(t) are assumed to be constant in a switching cycle, which is fairly a valid assumption.Because the switching cycle is much smaller than a line frequency cycle. Using the equations(3.15)-(3.20), the equation (4.1) can be written as per (3.22) in an AC environment.< iO > fSw=Vout− vin(t)+ vCmax(t)Lr2(t2− t0)2TSw.(4.1)As discussed, even with the discontinuous currents flowing through the inductors in the circuit,input current is continuous, which is one of the greatest benefits of this structure. The average and119ripple of the input current in a single switching period can be calculated in (4.2) and (4.3) based onthe equations given in (3.23) and (3.24). (4.2) and (4.3) are similar to (3.25) and (3.26).< iin > (t) =Vout− vin(t)+2vCmax(t)4L(t2− t0) (4.2)∆iin(t) =Vout− vin(t)2L(t2− t0) (4.3)Replacing (3.27) in (4.1) and (4.2) eliminates the variables (t2− t0), resulting in the simplerequations written in (4.4) and (4.5) that describe the relationship for the average value of the outputand input currents in a switching cycle, respectively, as the followings:< iO > fSw=Vout−vin(t)+vCmax(t)LTSw.(2LC vCmax(t) ωresVout−vin(t)+vCmax(t))2(4.4)< iin > fSw=Vout−vin(t)+2vCmax(t)4L(2LC vCmax(t) ωresVout−vin(t)+vCmax(t))(4.5)Output and input current averages over a switching cycle are given in (4.4) and (4.5). As seen inFig. 4.2, vCmax(t) in a switching cycle is different from the absolute maximum of vCmaxPeak in a line-frequency cycle. In other words, vCmax(t) is a sinusoidal function in the line cycles. Mathematicalcharacteristics of vCmax(t) are analyzed in the next subsection along with the other characteristics ofthe converter in a line-frequency cycle. The maximum value of the input capacitors’ voltages to theinstantaneous value of the input voltage, orvCmax(t)vin(t), is a constant value in the line cycle if the value ofthe switching frequency and load remain constant. Since variable switching frequency modulationis used in the proposed circuit, fSw. and load are kept constant in a line cycle. Therefore,vCmax(t)vin(t)remains constant during the line cycles. In other words,vCmax(t)vin(t)is kept constant, which resultsinvCmax(t)vin(t)being equal to VCmaxPeakVinPeak . VCmaxPeak and VinPeak are the maximum values of the functionsvCmax(t) and vin(t) in a line cycle, respectively. In the next sub-section, this simple characteristic willprove very helpful in interpreting the line frequency content of the input current in the proposedconverter.1204.2.2 AC/DC Converter Analysis in a Line CycleIn this subsection, voltages and currents of the proposed converter are analyzed in the line frequencycycles. It is assumed that the input voltage is a pure sinusoidal waveform. At the very beginning,the equation for the input and output current will be analyzed. It will be shown that the inputcurrent follows the input voltage inherently with a simple constant frequency modulation. In otherwords, with a sinusoidal input voltage, the input current would be sinusoidal and continuous evenwith the DCM currents in the inductors. This also means that the the power factor of the converterwould be high with a simple frequency control without the need to have a current loop. As stated,with a constant switching frequency and load in a line cycle,vCmax(t)vin(t)remains constant. Using thischaracteristic, (4.5) can be made simpler as done in (4.6):iin(t) = vin(t)C (VCmaxPeakVinPeak ) ωres2×(1+1VoutvCmax(t)+(1− VinPeakVCmaxPeak ))(4.6)As seen in (4.6), input current has two components in the parentheses. The first is the constant1 and the other is an expression comprising some constant ratios and the variable ratio VoutvCmax(t) . Ifthe second component appearing in (4.6) can be neglected most of the time during a line frequencycycle compared to the other component, it can be assumed with a relatively accurate approximationthat the input current is very close to a sinusoidal waveform. The ratio VoutvCmax(t) varies with an ACinput voltage, and the circuit should be designed in such a way that the variable vCmax(t) is smallerthan Vout . As seen in Fig. 4.2 and discussed in the previous subsection, vCmax(t) is close to asinusoidal function. Hence, if the circuit is designed in order to make VoutvCmaxPeak as low as possible, itcan lead to VoutvCmax(t) being a small value and thus negligible compared to (1−VinPeakVCmaxPeak). As a result,iin(t) can be close to a sinusoidal function. The proposed circuit is designed in the next section tobe compatible with the assumption that was made. Hence, if the converter is working with constantfSw. for a particular amount of load in the whole line frequency cycle, the input current would bevery close to sinusoidal, which results in a high power factor. This means that the input current loopis not needed in the structure in order to achieve a high power factor, and as a result, the controlcircuit is very simple. As discussed, with a variable-frequency modulation in gate signals with a50% duty cycle, and sinusoidal input voltage, input current is automatically sinusoidal. Therefore,121input current can be approximated to be a sinusoidal function in the equations in a line frequencycycle and it is hereafter assumed to be. In order to make the analysis simple, electrical variablesof the circuit are going to be normalized. In the normalization process, there should be somereference values for the voltage, impedance, frequency, and current. These definitions have beengiven in (4.7)-(4.10):vre f =VinRMS (4.7)Zre f = Zr =√Lr2Cr(4.8)fre f = fres =12pi√2LrCr(4.9)ire f =vre fZre f=VinRMSZr(4.10)Using the definitions in (4.7)-(4.10), the variables in the proposed circuit can be normalized asdone in (4.11)-(4.14). Since the analyzed circuit in this chapter is an AC/DC converter, the voltagereference and some of the other definitions are different from the ones in Chapter 3. Therefore, theequations will be different as follows.Fn =fSw.fre f=fSw.fres(4.11)Q =ZrRout=√Lr2CrRout(4.12)mv =Voutvre f=VoutVinRMS(4.13)vCmaxn =VCmaxPeakvre f=VCmaxPeakVinRMS(4.14)122Using the definitions in (4.11)-(4.14), the equations can be made simpler hereafter. The switch-ing frequency has been normalized in (4.11). So Fn hereafter depicts the normalized switchingfrequency. Q in (4.12) is the normalized value of the output admittance or the quality factor. mvis the gain of the converter defined in (4.13) as the ratio of the output voltage to the RMS valueof the input voltage. Also vCmaxn is the representation of the normalized value of the maximumvoltage of the input capacitors defined in (4.14). Considering the sinusoidal approximation for iinand other parameters, and using the definitions in (4.11)-(4.14), (4.4) and (4.5) can be used to reachthe equation in (4.15). Also, η represents the efficiency of the converter in (4.15).64F2n Q×m3v−12√2pi2Fn Q η×m2v +(pi4 Q η2−4pi Fn η2)×mv +√2 Fn η2 pi2 = 0 (4.15)The equation (4.15) has been solved numerically in different values of Fn and Q. The solutionfor this equation has been drawn in Fig. 4.6(a) for different values of the quality factor (Q) andthe normalized switching frequency (Fn). The definitions in (4.11)-(4.14), along with (4.4) and(4.5), can lead to (4.16) representing the equation for calculation of vCmaxn in different values of Fn.This equation has also been drawn for different values of the quality factor (Q) and the normalizedswitching frequency (Fn) in Fig. 4.6(b).vCmaxn =2Q mv(16Fn m2v− (2√2ηpi2 +4√2Fnpi) mv +pi3η)−8FnQpi m2v +(4√2Fnη+pi3Q√2η)mv−2Fnηpi(4.16)As stated, the proposed circuit works based on the resonance between the components in thecircuit. Both of the input inductors (Lr1 and Lr2) and input capacitors (Cr1 and Cr2) participatein the resonance. The maximum current of the inductors (iLmax) and maximum voltage of thecapacitors (vCmax) are important in selecting these components. The general relationship betweenthese two parameters is given in (3.12). As stated, in order to make the analysis and design simplefor the reader, variables are normalized based on the references defined in (4.7)-(4.10). As seen,Ire f is defined as the ratio of the voltage reference (vre f =VinRMS) to the reference of the impedance(Zre f = Zr). Therefore, based on (3.12), it is understood that the normalized value of the maximum1231 1.5 2 2.5 3 3.5 4 4.511.522.533.544.55Q=0.025Q=0.05Q=0.1Q=0.15Q=0.2Q=0.4(a)1 1.5 2 2.5 3 3.5 4 4.50.511.522.533.544.55Q=0.025Q=0.05Q=0.1Q=0.15Q=0.2Q=0.4(b)Figure 4.6: a) The voltage gain versus the normalized switching frequency in different valuesof the quality factor. b) Normalized maximum value of the input capacitors’ voltagesand maximum value of inductors’ currents in different values of the normalized switch-ing frequency and the quality factor.124current of the inductor would be equal to the maximum voltage of the capacitor. This expression ismathematically proved in (4.17).iLmaxn =ILmaxPeakire f=VCmaxPeakZrVinRMSZre f=VCmaxPeakVinRMS= vCmaxn (4.17)Based on (4.17), the maximum of the resonant inductor’s current peak (iLmaxn) is equal to thevalue of the maximum voltage of the resonant capacitor’s peak (vCmaxn). the value of vCmaxn oriLmaxn can be calculated using (4.16). In addition, this variable is depicted in Fig. 4.6(b) in differentvalues of the normalized switching frequency and the quality factor. As seen in Fig. 4.6(b), themaximum value of the capacitors’ voltages and the maximum value of the inductors’ currents donot vary in different quality factors. This shows that these values mostly depend on the normalizedswitching frequency. The average value of the inductor’s current can be calculated by taking theaverage of (3.18). Since the average of inductors Lr1 and Lr2 currents are equal, their average valuecan be shown by iLaveg. This parameter can be calculated in (4.18):< iin > |@ fSw. =< iLr1 > |@ fSw.+< iLr2 > |@ fSw.2(4.18)Since the average value of the inductors’ current are equal (< iLr1 > |@ fSw. =< iLr2 > |@ fSw. =iLaveg), equation (4.19) can be assumed:< iLaveg > |@ fSw. =< iin > |@ fSw. (4.19)Therefore, the average of the inductors’ currents in the switching frequency is equal to the inputcurrent, which is considered a sinusoidal value. In addition, the voltage stress of the semiconductorsis equal to the output voltage. For example, the maximum voltage of the switches is equal to theoutput voltage, once the other switch is conducting. The same scenario happens for the diodes. Inother words, the voltages of the diodes are limited by the output voltage when they are off. Theirvoltages are restricted to Vout because of the conduction of the other diodes at the same time. Theconverter elements are designed in the next section in a step-by-step process.1254.3 Design Considerations for the Proposed AdvancedResonant Boost PFC StructureIn this section, a prototype based on the analyzed equations is designed to prove the feasibility ofthe structure. The input voltage is considered 220VRMS±20%, with 400V output DC voltage. Themaximum load power is 400W . The proposed converter should be designed with as low conductionlosses as possible without sacrificing the gain variation versus the switching frequency. Since theswitching losses in the converter are very low, the switching frequency can be increased withoutany problems. Based on the waveforms shown in Fig. 4.6(a), in order to decrease the switchingfrequency range, the quality factor should be chosen to be high. However in this case, the maximuminput capacitor voltage increases (shown in Fig. 4.6(b)). As stated in the previous section, in orderto have higher power factors, the maximum voltage of the resonant capacitors (VCmaxPeak) shouldbe limited. Therefore, Qmax should not be chosen to be high. The minimum and the maximumvalues of the gain can be calculated as given in (4.20).mv min =VoutVinRMS max= 1.51, mv max =VoutVinRMS min= 2.27 (4.20)The converter is designed such that it has minimal conduction losses while keeping the gainvariation high with the small variations in the switching frequency. Since soft-switching is pro-vided for all the semiconductors, the switching frequency can be increased. Based on the wave-forms illustrated in Fig. 4.6(a), if the quality factor is high, the difference between the maximumand minimum switching frequencies decreases, which is preferred. However, in that case, theAC voltage across the resonant capacitors increases as well, which requires special capacitors tobe used. In addition, if vCmax increases, based on (4.6), ratio VoutVCmaxPeak increases too, resulting inhigher deviation of the input current from a sinusoidal waveform. This reduces the THD, which isundesirable. Moreover, since the time during which the current of the inductor is being chargedwithout transferring to the output is increasing, the conduction losses increase too. Therefore, it isnot recommended to choose a high quality-factor or Q. On the other hand, if Q is too small, thegain waveform flattens, increasing the frequency deviation with the same gain variation. Hence, amoderate value for Q should be selected in order to avoid these problems. Based on the description126provided, the maximum quality-factor or Qmax = 0.1 is selected to meet all of the requirementsaddressed above. The resonant frequency is selected to be 100kHz. Therefore, the values of theinput capacitors and the inductors can be calculated using (4.21) and (4.22). These equations arederived from (4.12) and (4.13).L = Lr1 = Lr2 =RloadQmax2pi fres= 63.7µH (4.21)C =Cr1 =Cr2 =14piRloadQmax fres= 19.9nF (4.22)Three 5.6nF capacitors from Epcos have been used as well as two 70µH inductor with RM12cores. Therefore, the real value of Qmax and fres would be slightly different from those of (4.21) and(4.22). The real values can be calculated based on (3.11) and (4.12). The practical values of Qmaxand fres are 0.114 and 104kHz, respectively. As seen in Fig. 4.6(a), the switching frequency of theconverter at the nominal load when Qmax = 0.114 and fres = 104kHz, is 230kHz. In other words,the switching frequency of the proposed converter at full load (vin = 220V RMS, Vout = 400V ,and Pout = 400W ) is 230kHz. Also, the switching frequencies at vinMax and vinMin is 320kHz and190kHz, respectively. As stated, because of soft-switching in the proposed converter, increasingthe switching frequency is not an issue; the efficiency does not drop significantly. The providedstatement about the efficiency is checked in the next section in an experimental prototype. Thecharacteristic impedance of the resonant tank can then be calculated as (4.23). This equation isbased on the one given in (4.8):Zr designed =√L2C= 45.6Ω (4.23)Based on Fig. 4.6(b), the normalized maximum current of the inductor or maximum voltage ofthe capacitors are both equal to 1.2 at the nominal loading conditions. Based on (4.10), ire f canbe calculated using the input voltage and (4.23) as the references of the voltage and impedance,respectively. The maximum value of the inductor’s current would be 1.2× vinRMSZr = 5.8A. Also,the maximum voltage of the capacitors would be equal to 1.2× vinRMS = 264V . The core RM12/I127Table 4.1: Components used for the experimental prototype of the proposed AC/DC LLCCresonant boost topology.Parameter Value DescriptionLr1, Lr2 70 µH RM12−3C95Cr1, Cr2 3×5.6 nF E pcosS1, S2 TK20A60W −D1−D4 RURP1560 −from Ferroxcube is selected with the material 3C95. The number of turns is selected to be 17 withAWG 12 Litz wire. Litz wire is chosen in order to have a low resistance in higher frequencies.The resistance of the core has been calculated at the nominal switching frequency. This value forthe inductors is 0.65Ω. TK20A60W and RURP1560 are selected as the switches and the diodes,respectively. All of the circuit elements are listed in Table 4.1. TK20A60W is a low-cost switchwith slightly higher drain-source parasitic capacitance. This capacitance helps the proposed con-verter to provide lower dvdt , even at turn-off. The only challenge with this method is discharging thebigger capacitance before turning on the switch or providing ZVS at turn-on. Fortunately, since inthe proposed converter the parasitic capacitance of the switches is discharging with the maximumvalue of the inductors’ currents, ZVS is achieved with no problem. Loss analysis of the selectedcomponents for the experimental prototype has been done in the next subsection.4.4 Single Loop Control and Modulation AlgorithmThe modulation and control scheme for the proposed bridgeless resonant PFC converter is presentedin this section. The proposed converter has a simple modulation algorithm that requires only twocomplementary gate signals with constant ≈ 50% duty cycles with some deadtime. Because ofthe complementary gate signals in the switch leg, a non-isolated gating strategy like bootstrapcan be used which makes the gate circuitry simple. The duty ratio of the gate signals is constantand equal to 50%. The switching frequency of the gate signals is constant during the whole linecycle. As shown in Section 4.2 the input current of the converter is inherently sinusoidal andcontinuous. Therefore, if the converter has a constant switching frequency in a whole line cycle128S2S1Lr1Cr1Cr2D1D3D4D2VinCORLLr2voevCv(s) vreffswVCOVariable Frequency Control LoopNoCurrent Loopiinlimiterconstant 50%duty cyclesFigure 4.7: The modulation and control block diagram of the proposed AC/DC LLCC resonantboost converter.with complementary gate signals with 50% duty cycles, the power factor of the proposed converterwould be high. The switching frequency of the proposed converter can be used for control purposes.In other words, the variable frequency method can be used only to control the output voltage of theconverter in different loading and input voltage conditions. Hence, there is no need to have a currentcontrol loop in the proposed converter. The input current is inherently continuous and sinusoidalwithout using any current loop controllers.The control block diagram of the proposed converter is shown in Fig. 4.7. As seen in Fig.4.7, there is no current loop in the circuit and thus the power factor correction is inherent. Onlya voltage loop is used to achieve regulations in the output voltage. After the measurement of theoutput voltage, this value is subtracted from the reference value, which is 400V in the studiedprototype. The error in the output voltage or the output of the subtracter is shown with eV in Fig.4.7. This value is the input of the compensator block shown with CV . The compensator produces anoutput which is interpreted as the switching frequency of the converter. This value ( fsw) then feedsthe input of the VCO after the limiter block. The VCO block generates two complementary pulsedsignals with near 50% duty ratios with proper dead time, with a frequency equal to the switchingfrequency ( fsw). With this method, the output voltage is regulated and the input current is inherentlyfollowing the input voltage which has a sinusoidal waveform. The main design consideration for129the voltage compensator is to have a slow dynamic signal across one half line cycle so that it doesnot try to compensate for the instantaneous variations of the input voltage. Therefore, the voltagecontroller is designed with a very slow bandwidth. However, if the voltage compensator is too slow,the converter does not react to the load variations fast enough and this could cause overstress in thecomponents or a very slow response.A PI compensator is used in the presented prototype for the proposed converter. If the timeconstant of the PI compensator is at least five times higher than twice the line frequency cycle, thecompensator could skip the line frequency and regulate the output voltage mean value. Moreover,like other resonant converters, there should be a negative sign in the PI controller to support thenegative slope of the gain versus the variation of the switching frequency shown in Fig. 4.6(a). Theexperimental prototype using the components in Table 4.1, along with the results from testing, ispresented in the next section.4.5 Experimental Results for the Proposed AdvancedResonant Boost PFC StructureThe proposed resonant bridgeless PFC converter has been tested in an experimental setup with a400W nominal output power. The picture of the designed prototype is shown in Fig. 4.8. Theexperimental results of the proposed converter are presented in this section. It will be shown withthe experimental waveforms that the proposed converter provides continuous input current evenwith the small inductances and input capacitors in the circuit. In addition, the operation of theproposed bridgeless converter is compared with a conventional structure with the same componentsresulting in higher efficiency and lower THD in the proposed structure.The proposed resonant PFC structure has a high efficiency due to the bridgeless structure, andalso providing soft-switching for all of the semiconductor elements. Components used for theexperimental setup are designed in the previous section of the chapter. The full list is given inTable 4.1. As seen, the values of the input capacitors and the inductors are small. Even with thesesmall values, the proposed circuit can guarantee the continuous input current behaviour. Therefore,the power factor remains high at different load conditions.There are two sub-sections in Section 4.5. The first sub-section is dedicated to the operation130Figure 4.8: The picture of the designed prototype based on the proposed advanced AC/DCresonant structure.of the proposed converter in an experimental prototype with related waveforms. In the secondsubsection, the proposed converter is compared with a conventional interleaved boost PFC in termsof efficiency and power factor. The same components have been used for both of the converters tokeep the comparison fair.4.5.1 Operation of the Proposed AC/DC Converter in the ExperimentalSetupExperimental waveforms of the input voltage and current are shown in Fig. 4.9(a) in a line-frequency scale. In addition, voltage of the input capacitor Cr1 and the inductor Lr1 current areshown in Fig. 4.9(b). Diodes D1 and D3 currents are also shown in Fig. 4.9(b) synchronous withthe line voltage. As seen, the input current is sinusoidal even with the simple single-loop voltageloop control shown in Fig. 4.1 and Fig. 4.7. As shown in the experimental captures, input diodesdo not conduct in all of the line cycle. This is an important characteristic of the proposed resonantbridgeless PFC converter.Fig. 4.9(a) shows that the input current is sinusoidal and in-phase with the input voltage. Themeasured input power factor is near unity without adding any extra filter. In other words, using only70µH inductors and 16.8nF capacitors resulted in a near unity power factor without the need toadd any other filter elements in the input. As seen in Fig. 4.9(a), input current remains continuouswith low ripples, without adding an extra filter at the input. This certifies the claim that the inputcurrent is continuous even with the low inductances in the circuit. As seen in Fig. 4.9, vCr1 and131viniin(a)vCr1iLr1iD1iD3(b)Figure 4.9: a) Input voltage and current of the proposed AC/DC resonant converter with anear-unity measured power factor, b) vCr1, iLr1, iD1, and iD3, in line-cycle scale at fullload and the nominal input-output conditions.iLr1 are working in both half-line cycles of the input AC voltage, but the diodes D1 and D2 arejust working in the positive half-line cycles along with the diodes D2 and D4 working only in thenegative half-line cycles. Therefore, the operation of the converter is as discussed in the theoreticalanalysis section of the chapter.Waveforms of the proposed resonant AC/DC converter in a switching-cycle scale are shown inFig. 4.10. This figure is captured at the peak of the input voltage at the nominal loading conditions.As seen in Fig. 4.10(a), the resonant capacitors’ voltages (i.e. vCr1 and vCr2) and inductors’ currents(iLr1 and iLr2) are alternating with the resonant frequency, which has the same characteristics as ex-pected in the theoretical analysis. In addition, as shown in Fig. 4.10(b), switch S2 is turned on underZVS conditions. As mentioned, this feature reduces the switching losses significantly. The same132vCr2vCr1iLr1iLr2vS2iS2vD1iD1(a)(b)(c)Figure 4.10: a) Resonant elements’ voltages and currents alternating with the resonant fre-quency, b) switching waveforms of the switch S2 indicating ZVS turn-on, and c) switch-ing waveforms of the diode D1 with ZCS turn-off, all in a switching frequency cyclecaptured at peak of the input voltage at full load and nominal conditions.133scenario happens for the other switch because of the symmetry in the circuit. Moreover, voltageand current waveforms of the diode D1 are shown in Fig. 4.10(c), which shows that the diode turnsoff under ZCS conditions. This feature reduces the switching losses in the circuit considerably. ZCSturn-off is provided for all of the diodes in the circuit, helping to decrease the switching losses andincrease the efficiency in the circuit. These soft-switching characteristics enable the converter to bedesigned for higher switching frequencies.As stated, the switching frequency operation of the presented prototype has been shown in Fig.4.10. The voltage of the resonant capacitors (vCr1 and vCr2) along with the resonant inductors’currents (iLr1 and iLr2) are shown in Fig. 4.10(a) in the switching cycle at the peak of the inputvoltage. Resonance waveforms of the proposed converter shown in this figure are similar to thetheoretical waveforms depicted in Fig. 4.5. In addition, the same behaviour is seen in Fig. 4.10(b)and (d) as the theoretical predictions made in Fig. 4.5. The only difference seen in the experimentalwaveforms which is different from the theory is the small tail in the inductors’ and the diodes’currents in Fig. 4.10.The small current tails in Fig. 4.10 for iLr1, iLr2, and iD1 are shown with blue circles. Thesetails happen because of the small resonance between the inductors and the intrinsic capacitorsof the diodes. This resonance occurs once the inductors’ currents reach zero. This resonance iscontrolled with other diodes in the circuit acting like clamps to limit the voltage across the diodes.For example, once iLr1 reaches zero at t6, iLr1 starts resonating with the capacitor across D1 whichis then controlled by the diode D4. In this case, D4 acts like a clamp avoiding the voltage across D1to exceed Vout . Therefore, the structure clamps the voltage across the diodes to the output voltagewhich enables the designer to use 600V diodes in the prototype. This unwanted resonance is solvedin the AC/DC resonant circuit with the elements of the circuit themselves. But as mentioned inSection 3.3, a small diode is needed in the DC/DC structure to mitigate this resonance. The effectsof this resonance in the DC/DC circuit is fully shown in Fig. 3.10.1344.5.2 AC/DC LLCC Resonant Converter Operation Comparison withConventional Interleaved BoostTo further analyze the behaviour of the proposed AC/DC converter, the performance of the designedprototype has been compared with an interleaved boost converter with the same components andinput-output specifications. Since the same components listed in Table 4.1 are used in the inter-leaved boost, with the same input-output characteristics and the nominal switching frequency, theinductors in the interleaved boost experience discontinuous currents. If the inductors in the tra-ditional interleaved boost converter have discontinuous currents, the input current intrinsically isapproximately sinusoidal without any current loops [14]. This current can get more sinusoidal ifthe difference between the input voltage peak and the output voltage gets bigger. Therefore, thisconventional circuit has many features that are close to the proposed converter including inherentPFC capability with DCM inductors’ currents, and a similar number of components with only twomore diodes than the proposed structure.The only problem in the interleaved DCM boost would be the higher ripples in the input currentwhich gets completely discontinuous at medium to light load compared to the continuous inputcurrent in the proposed converter. This forces the designers to use big passive elements as filters inthe traditional converter. Therefore, the overall volume of the proposed converter is less than that ofthe conventional DCM interleaved boost. Moreover, the proposed converter provides soft-switchingfor all of the semiconductors in the circuit. It can provide ZVS for the switches and ZCS for thediodes, whereas the traditional DCM boost converter cannot provide ZVS for the MOSFETs. In otherwords, the traditional DCM boost converter cannot discharge the parasitic capacitor of the switchesand the diodes prior to turning on the switches. This causes the discharge of the parallel capacitorsof the MOSFETs into the switches at turn-on. This restricts the function of the traditional boostconverter in higher frequencies.The interleaved boost has the same components with a constant switching frequency equal tothe nominal frequency (230kHz) of the designed converter. This is helpful in keeping the efficiencyof the interleaved boost high, because of the switching losses. Although the switching frequencyof the interleaved boost converter is rather low compared to the proposed converter in lighter loads,135(a)Output Power (W)75%80%85%90%95%100%75 125 175 225 275 325 375 425Proposed Bridgeless Resonant PFCInterleaved Boost PFCEfficiency (%)(b)Input Voltage RMS (V)75%80%85%90%95%100%170 180 190 200 210 220 230 240 250 260 270Proposed Bridgeless Resonant PFCInterleaved Boost PFCEfficiency (%)Figure 4.11: The efficiency of the proposed converter compared with the conventional inter-leaved boost PFC converter with the same components in a) different output powerlevels, and b) at the nominal load in different input voltage levels.the efficiency is not higher as shown in Fig. 4.11(a). Fig. 4.11(a) shows a 2% improvement inthe efficiency of the proposed converter at the nominal load compared to the traditional interleavedboost converter with the same components. As seen in Fig. 4.11(a), the efficiency of the proposedconverter is always higher than the efficiency of the interleaved boost converter from light load tofull loading conditions at the nominal input voltage. The efficiency of the proposed converter indifferent input voltages has been also compared with that of the traditional DCM boost converter inFig. 4.11(b).As stated, low inductances are used in the proposed converter. The same components listed inTable 4.1 have been used in both of the proposed converter and the interleaved boost. The traditionalinterleaved boost works with 70µH inductors and 230kHz switching frequency. With these values,136(b)viniinvoutInterleaved DCM BoostNo current loopLow inductanceswith DCM currents(a)viniinvoutProposed ConverterNo current loopLow inductanceswith DCM currentsFigure 4.12: a) Input voltage and current, and output voltage of the proposed converter at fullload. b) Input voltage and current, and output voltage of the conventional interleavedboost converter with the same components at full load. The same components areused for both of the converters. No current loops have been used in neither one ofthe converters. No filter elements have been used for these waveforms. The measuredpower factor for the proposed converter is near unity, and for the traditional interleavedboost converter is 0.74 without extra filters.each of the inductors’ currents in the traditional interleaved boost is always discontinuous in thefull operating conditions. This happens even at full load. Therefore, the interleaved boost converterwith low inductances with discontinuous currents can have an intrinsic high power factor evenwithout a current loop. This characteristic has been proved mathematically in [14]. The inputcurrent of the interleaved boost converter, however, is the sum of the currents of the two inductors.In the specified operating conditions, the input current of the conventional converter is continuousin only a very small fraction of the line cycle. In other words, the average of the input current in137(a)Power Factor Output Power (W)THD (%)(b)Output Power (W)0.00%20.00%40.00%60.00%80.00%100.00%75 125 175 225 275 325 375 4250.70.750.80.850.90.95175 125 175 225 275 325 375 425Proposed Bridgeless Resonant PFCConventional Interleaved Boost PFCProposed Bridgeless Resonant PFCConventional Interleaved Boost PFCFigure 4.13: a) Power factor, and b) THD of the proposed advanced LLCC resonant boostPFC converter compared to the conventional interleaved boost converter versus outputpower levels. The same components have been used in both of the converters.the DCM interleaved boost is approximately sinusoidal. However, since bulky filtering elementsare not used in the structures, the input current is discontinuous in most of the line cycle even atthe nominal load. This reduces the power factor and increases the THD significantly. On the otherhand, the input current of the proposed converter remains continuous with the same conditions.Input current, input voltage, and the output voltage of the proposed converter have been shownin Fig. 4.12(a), as well as those of the conventional interleaved boost in Fig. 4.12(b). Both ofthe converters are running at full load with 220VRMS input voltage. To have a better view of theconverters’ operations, these waveforms are measured without any filter elements in the input.This means that the input characteristics of the proposed converter is similar to a converter withCCM operation, even with the small inductors used. The measured power factor for the proposed138converter is near unity. Nonetheless, the interleaved boost converter has a 0.74 input power factorwith the same components. No additional filter is used in the input of the converters for thesemeasurements and the waveforms in Fig. 4.12. This shows that the required input filter size in theproposed converter would be smaller than that of the conventional interleaved boost converter.The power factor and THD of the proposed converter compared to the conventional interleavedboost structure are shown in Fig. 4.13(a) and (b), respectively. Fig. 4.13 shows that the powerfactor of the proposed converter is more than that of the conventional converter with the same com-ponents in different load levels. A 2µF capacitor and 50µH inductor have been used in the input tofilter out the high-frequency components in both of the circuits. The input current waveform of theinterleaved boost converter along with that of the proposed converter has been shown in Fig. 4.12.The currents shown in Fig. 4.12 are measured before the filtering components to show the improve-ments in the proposed converter. As seen, the input current of the interleaved boost is discontinuousin most of the line cycle. However, the input current of the proposed converter is continuous withthe same inductors at the same operating conditions. This certifies that the proposed converterneeds a smaller filter size to have the same THD level as the conventional design. As the outputpower decreases, the input current of the interleaved boost gets more discontinuous which resultsin the reduction of the Power Factor (PF) and/or increase in the THD. This characteristic has beenreflected in Fig. 4.13(a) and (b) in different output power levels.4.6 SummaryAn advanced resonant structure was proposed in Chapter 3 of the work. This concept was tested asa DC/DC converter in Chapter 3 along with relevant equations and analysis. A modification of thisadvanced resonant structure was then analyzed in this chapter of the work for an AC environment.The proposed AC/DC LLCC resonant boost converter was fully analyzed in this chapter with therequired line frequency theoretical behaviour. The proposed advanced LLCC resonant structureis very good in narrow range applications. It uses many approaches mentioned in Chapter 1 alltogether to improve the efficiency and performance in these kinds of applications.139A resonant bridgeless PFC rectifier with high frequency and inherent power factor correctioncapabilities has been proposed in this chapter with the related theoretical analysis and experimen-tal results. This converter works based on the proposed advanced resonant concept introduced inChapter 3. The proposed AC/DC converter can provide continuous input current with low THD, evenwith small inductances with discontinuous currents. The proposed structure is simple, symmetri-cal, and bridgeless. In addition, as shown in the experimental waveforms, the analyzed converterprovides soft-switching for all of the semiconductors in the structure, helping to further increase theefficiency at high frequencies. The simple variable frequency method has been used for the mod-ulation with complementary gate signals with constant ≈ 50% duty cycles plus dead-time. Theproposed converter has been compared with a conventional interleaved boost converter with thesame components, resulting in a 2% improvement in the efficiency at full load and more than 8%under light loading conditions. The proposed converter also provides a near-unity power factor atfull load with no current loops and no extra filter elements.140Chapter 5Conclusion5.1 Conclusions and ContributionsHigher energy demands and using new technologies have expanded the market for industries suchas renewable energies, telecommunications, automotive, and data centers. Highly efficient powerconverters are widely needed in these sectors. There are different types of power losses in thesepower converters: switching losses, conduction losses, and magnetic core losses. The focus ofthis work is mostly improving the efficiency and performance of AC/DC PFC converters. Differentapproaches are studied in this work to enhance the operation of the PFC converters in different appli-cations. Soft switching, interleaving, bridgeless structure, and reconfigurable topology in differentoperational points are among the utilized methods in this work.Wide input voltage range applications are studied as well as narrow range ones. Differentcombinations of the mentioned methods are used in each of these applications to improve efficiencywhile keeping the performance high. For wide-range applications, a reconfigurable and flexiblePFC converter is proposed in this work. The proposed converter can support an extended range ofvariations in the input voltage with a high and flat efficiency curve. An advanced LLCC resonantboost concept was proposed in this work to improve the performance in narrow input voltage rangeapplications. This concept was tested in a basic structure as a DC/DC converter first and then appliedto an AC/DC application.The following subsections summarize contributions of this work.1415.1.1 Reconfigurable PFC Converter for a Wide Input Voltage RangeMany approaches are studied in this work for improving the efficiency of power converters in dif-ferent applications. One of the best methods for reducing different types of losses in a wide inputvoltage range converter is reconfiguring the structure in different operational points. A reconfig-urable PFC converter is proposed in Chapter 2 for this purpose. The proposed converter works witha very wide input voltage range and can provide a low THD, a high and flat efficiency curve, and aregulated high output voltage throughout the range. This converter has a simple structure and canreduce the size of the magnetic elements compared to conventional designs. It can provide a line-frequency common-mode connection between the input and output ports. It can also handle inrushcurrent at the startup to stop the unwanted resonance in the circuit to save the important compo-nents of the structure. Theoretical and experimental analysis for this converter have been given inChapter 2. Two different modulation methods are proposed for this converter in this chapter eachwith its own structure and implementation algorithm. Both of the presented methods for this con-verter have been compared with a conventional totem pole PFC structure with the same componentsand constraints. The proposed reconfigurable converter in both of the proposed modulations showssignificant improvements in terms of efficiency and power factor.A 2kW experimental prototype with a wide range of variations in the input voltage, 90−530VRMS, has been developed in Chapter 2 as a proof of concept. At full load, the efficiency ofthe proposed converter reaches as high as 98.2% at 480VRMS compared to 97.2% in the totem polePFC with the same components. Also, the efficiency of the proposed converter is 96.9% at 208VRMScompared to 96.2% in the totem pole PFC structure.5.1.2 Advanced LLCC Resonant Boost ConceptAn advanced structure with soft switching is introduced in Chapter 3 of this work. This structureis suitable for distributed DC/DC converters in PV applications. The proposed converter combinesinterleaving and soft-switching methods to improve performance and efficiency. The proposedadvanced LLCC resonant boost converter is a simple and effective structure that can provide softswitching for all of the semiconductors in the circuit even under light loading conditions. This142structure has a low input current ripples even with the small inductances used in the hardware. Theproposed converter can run with simplified control and has a simple and symmetrical structure.The proposed advanced LLCC resonant boost topology is a simple and symmetrical structurethat uses the elements of the circuit as the resonant tank. Theoretical analysis and experimentalbehaviour of this concept have been tested for the DC/DC application in this chapter. This converterhas been also compared with a traditional interleaved boost converter with the same componentsand the same input/output conditions. The proposed advanced LLCC resonant boost converter hasshown great improvements compared to the benchmark structure in both terms of efficiency andinput current ripples. Significant efficiency improvement is recorded for a 400W prototype, es-pecially under light loading conditions, compared to a benchmark conventional interleaved boostconverter with the same components. The measured efficiency shows approximately 1% improve-ment at full load and more than 9% improvement under the light loading conditions. Besides, theinput and output current ripples are significantly lower, compared to the traditional structure. Inputcurrent ripple has been decreased more than 50% compared to the conventional structure at fullload with the same passive components.This resonant concept can be modified and used in other applications as well. The modifiedversion of this concept has been used in an AC environment in Chapter 4 for which the contributionis more discussed in the next subsection.5.1.3 Advanced Bridgeless LLCC Resonant Boost PFC RectifierAs stated, the proposed advanced LLCC resonant boost concept is a simple and effective conceptthat can be adopted in many other applications. This concept was first developed and analyzed inits simplest format as a DC/DC converter in Chapter 3. With some modifications in the structureand operation, the proposed advanced LLCC resonant boost converter can be adopted in an ACenvironment to work as an AC/DC PFC rectifier. The switching cycle performance of this structurewas discussed in Chapter 3. Using the equations in this chapter, line frequency analysis and the-oretical operation of the LLCC resonant concept is developed in Chapter 4. The proposed LLCCresonant rectifier in this chapter has a simple and bridgeless structure. This converter has a lowTHD at the input even with the small inductances in the hardware. This converter also requires a143simple control algorithm as it can provide an inherent high power factor at the input with just onevoltage controller loop and does not need an internal current loop. This simplifies the control ofthe converter significantly while keeping the input current continuous during the whole line cycle.The proposed converter has been compared with a conventional interleaved boost converter withthe same components, resulting in a 2% improvement in the efficiency at full load and more than8% under light loading conditions. The proposed converter also provides a near-unity power fac-tor at full load, higher than the conventional structure’s, with no current loops and no extra filterelements.5.1.4 Specific Academic ContributionsThe work presented in this dissertation is reported in three journal and two published internationalconference papers. The work studies efficiency improvement methods in different applicationswhile keeping other components of the performance in a high level.A flexible PFC converter was proposed to work in a wide range of variations in the input volt-age from 90VRMS to 530VRMS. This converter can provide a high and flat efficiency curve for thisextended range with a high 800VDC regulated output voltage. This circuit can reduce cost and im-prove the operations in telecom and Electric Vehicle (EV) applications. The following publicationsaddressed the proposed methods in this research for this wide-range application:• H. Valipour, M. Mahdavi, M. Ordonez, P. Ksiazek and R. Khandekar, ”Extended RangeBridgeless PFC Converter with High Voltage DC Bus and Small Inductor,” in IEEE Transac-tions on Power Electronics, doi: 10.1109/TPEL.2020.2997667.• H. Valipour, M. Mahdavi and M. Ordonez, ”A Wide Input Voltage Range PFC Converterwith High-Efficiency,” 2019 IEEE Applied Power Electronics Conference and Exposition(APEC), Anaheim, CA, USA, 2019, pp. 774-779.A novel resonant-based structure was also proposed for a narrow-range of operation. This con-verter can provide soft-switching for all of the semiconductors even under light loading conditions.This structure was first tested in a DC/DC renewable energy application. Then, it was modified to be144used in an AC/DC PFC application with a bridgeless structure. This converter has a simple and sym-metrical topology. The AC/DC version of this converter can inherently provide a high power factorwithout any current loop control. The following publications are about the proposed advancedLLCC resonant boost converter in a narrow range application:• H. Valipour, M. Mahdavi and M. Ordonez, ”Resonant Bridgeless AC/DC Rectifier WithHigh Switching Frequency and Inherent PFC Capability,” in IEEE Transactions on PowerElectronics, vol. 35, no. 1, pp. 232-246, Jan. 2020.• H. Valipour, M. Ordonez and M. Mahdavi, ”High-Efficiency Interleaved LC Resonant BoostTopology: Analysis and Design,” in IEEE Transactions on Power Electronics, vol. 34, no.11, pp. 10759-10775, Nov. 2019.• H. Valipour and M. Ordonez, ”High efficiency LC resonant boost topology: Analysis anddesign,” 2017 IEEE Energy Conversion Congress and Exposition (ECCE), Cincinnati, OH,2017, pp. 3427-3432.Besides the work presented in this dissertation, one more conference paper was published aboutother possible solutions in a wide range PFC application:• M. Mahdavi, H. Valipour and M. Ordonez, ”Reconfigurable Universal Buck-Boost PFC withUltra Wide Input Voltage Range,” 2019 IEEE Energy Conversion Congress and Exposition(ECCE), Baltimore, MD, USA, 2019, pp. 2707-2712.5.2 Future WorkThis work opens up many full areas of research that can build upon its findings. Some of the mainareas in which multiple Masters and Ph.D. students could be supervised include:• MegaHertz (MHz) switching frequency operation of the LC resonant boost concept: Asstated, the proposed LC resonant boost converter in this work can provide soft switchingfor all of the semiconductors in the circuit. This enables the designer to increase the switch-ing frequency resulting in smaller sizes for the passive elements. The switching frequency145of this converter can be increased all the way up to MHz levels which enables the designerto even use Printed Circuit Board (PCB) top inductors with air cores which reduces the sizesignificantly. This requires an accurate PCB design as well as using GAN or SIC switches.• Control loop analysis for the proposed LC resonant boost converter: As stated, this converterutilizes small inductors with discontinuous currents but it draws a continuous current fromthe input. This causes the proposed converter to have a fast response to changes in the loador the input voltage. Therefore, a small signal transfer function analysis can be made for thisconverter to be used in applications that require a fast response in the controller.• A reconfigurable PFC conversion system with variable DC bus voltage: In this work, a PFCconverter was introduced which can regulate the DC bus voltage in all of the line voltagevariations. Having this converter simplifies the operation of the second stage converter whichis usually an isolated DC/DC converter. This means that the second stage is not responsiblefor the wide variations in the input and should just work with a constant regulated DC busvoltage. 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For example, when the input voltage changes rapidly to a higher value, or when theconverter is starting up. But in this work, when referred to inrush current, the latter is meant.This form of inrush current flows through the circuit at the startup, when the input voltage risesfrom zero. This phenomenon results in a current spike in the components and also an unwantedresonance in the passive circuit elements that increases the voltage in the circuit, sometimes even tomore than twice the nominal values. This inrush current should be limited to protect the elementsat the startup.For instance, a boost converter has zero charge in its output capacitor before starting up. Butwhen the input voltage is applied, if there is no mechanism to absorb the inrush current, there is aS1D1LvinDinrushC1 RLFigure A.1: The required circuit to handle inrush current at the startup in the boost converterto avoid over-voltage in C1 and over current through semiconductors.163spike that results in the resonance of the input inductor and the output capacitor. This phenomenoncauses the voltage of the output capacitor to get higher than the input voltage which might causeover-voltage across the components and possibly failure.There are ways to limit the inrush current at the startup. One of these methods is to limit theoutput voltage at the startup to input voltage with an extra diode in boost converter [131]. In thismethod, the extra added diode charges the output capacitor to the input voltage level, therefore, theinrush current goes through the added extra elements and also the resonance between the inductorand the output cap is controlled. As a result, the high-frequency semiconductors in the circuit areprotected, and also the possibility of an over-voltage is limited.The added extra diode in the regular boost converter is shown in Fig. A.1 with Dinrush. Thisdiode is a high surge-current semiconductor that can tolerate the high current levels at the startup.If this diode doesn’t exist, the current goes through the fast recovery diode D1 to charge the outputcap. This results in a higher voltage across C1 than the input voltage because of the resonance. Inaddition, it saves D1 from handling the spike in the current as this diode is a fast recovery one withlow spike handling capabilities. On the other hand, Dinrush is a line frequency diode with a goodcapability to handle big spikes of current.164Appendix BCommon Mode Noise and ElectromagneticInterference (EMI)EMI is an unwanted effect between two electrical systems as a result of either electromagneticradiation or electromagnetic conduction. EMI is the major adverse effect caused by the applicationof switch-mode power supplies. In switching power supplies, EMI noise is unavoidable due to theswitching actions of the semiconductor devices and resulting discontinuous currents. EMI control isone of the more difficult challenges in power supply design, beyond functional issues, robustness,cost, thermal and space constraints [132].There are some features that if a power electronics topology has, the levels of noise are provento be lower. Having a common ground between the input and output ports of the converter is one ofthem [133–135]. The other feature is to have a line frequency connection between the ports. Thismeans that the input and output ports of the converter are connected in the whole half-line cycle.Another method of decreasing the noise is to provide soft switching for the semiconductors [136]or have a balanced structure and PCB layout [137].165

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