Open Collections

UBC Theses and Dissertations

UBC Theses Logo

UBC Theses and Dissertations

Efficient layout-aware statistical analysis for photonic integrated circuits Jhoja, Jaspreet Singh 2019

Your browser doesn't seem to have a PDF viewer, please download the PDF to view this item.

Notice for Google Chrome users:
If you are having trouble viewing or searching the PDF with Google Chrome, please download it here instead.

Item Metadata

Download

Media
24-ubc_2020_may_jhoja_jaspreet.pdf [ 7.24MB ]
Metadata
JSON: 24-1.0387286.json
JSON-LD: 24-1.0387286-ld.json
RDF/XML (Pretty): 24-1.0387286-rdf.xml
RDF/JSON: 24-1.0387286-rdf.json
Turtle: 24-1.0387286-turtle.txt
N-Triples: 24-1.0387286-rdf-ntriples.txt
Original Record: 24-1.0387286-source.json
Full Text
24-1.0387286-fulltext.txt
Citation
24-1.0387286.ris

Full Text

Efficient layout-aware statistical analysis forphotonic integrated circuitsbyJaspreet Singh JhojaBEng. (Honours) in Computer Systems Engineering,University of Bedfordshire, 2015A THESIS SUBMITTED IN PARTIAL FULFILLMENTOF THE REQUIREMENTS FOR THE DEGREE OFMaster of Applied ScienceinTHE FACULTY OF GRADUATE AND POSTDOCTORAL STUDIES(Electrical and Computer Engineering)The University of British Columbia(Vancouver)December 2019© Jaspreet Singh Jhoja, 2019The following individuals certify that they have read, and recommend to the Facultyof Graduate and Postdoctoral Studies for acceptance, the thesis entitled:Efficient layout-aware statistical analysis forphotonic integrated circuitssubmitted by Jaspreet Singh Jhoja in partial fulfillment of the requirements for thedegree of Master of Applied Science in Electrical and Computer Engineering.Examining Committee:Lukas Chrostowski, Electrical and Computer EngineeringSupervisorSteve Wilton, Electrical and Computer EngineeringSupervisory Committee MemberShahriar Mirabbasi, Electrical and Computer EngineeringSupervisory Committee MemberiiAbstractFabrication variability significantly impacts the performance of photonic integratedcircuits (PICS), which makes it crucial to quantify the impact of fabrication varia-tions at the design and simulation stage. The variability analysis enables circuit andsystem designers to optimize their designs to be more robust and obtain maximumyield when designing for manufacturing. The variability analysis requires a totalof six parameters to model spatially correlated manufacturing variations in pho-tonic circuits: mean, standard deviation, and correlation length for both width andthickness variations of photonic components. The correlation lengths are spatial pa-rameters that describe how the width and thickness variations are distributed alonga chip’s or a wafer’s surface. The methods that allow for the non-invasive charac-terization of variations are limited to extracting mean and standard deviations ofwidth and thickness variations. In this thesis, we present a method to extract thephysical correlation lengths, which are crucial to model manufacturing variations.In this thesis, we also present the Reduced Spatial Correlation Matrix-basedMonte Carlo (RSCM-MC), a methodology to study the impact of spatially correlatedmanufacturing variations on the performance of photonic circuits. The presentedmethodology is compared with another layout-dependent Monte Carlo (MC) simu-lation methodology, called Virtual Wafer-based Monte Carlo (VW-MC). First, wedescribe the process of generating spatially correlated physical variations using thepresented methodology and use the generated correlated physical variations to con-ductMC simulations. We then use aMach-Zehnder lattice filter photonic circuit as abenchmark circuit to study the accuracy of the proposed method. We compare thestatistical parameters of quantities defining the flatness of the transmission spec-tra of the filter. We then compare the computation performance of RSCM-MC withiiiVW-MC using a combination of small-sized (two-stage Mach-Zehnder filter) anda large circuit (a 16x16 ring matrix) with thousands of components. For the bestcase, i.e. the small-sized circuit, we observe a decrease in computational times by98.9% and a reduction in memory requirement by 72%. For the worst case, i.e. the16x16 ring matrix, we observe a decrease in computational times by 99.8% and areduction in memory requirement by 87%.ivLay SummaryIn silicon-on-insulator (SOI) photonic circuits, we often observe a discrepancy be-tween "what is designed" and "what is fabricated". This discrepancy occurs dueto manufacturing variations. Therefore, in order to make robust circuits, it is es-sential to do variability analysis at the design stage, especially when designing formanufacturing. As the photonic circuits are increasing in complexity and size, thevariability analysis techniques are having scalability issues, i.e. high computationtimes and memory requirements to perform variability analysis.In this thesis, we present Reduced Spatial Correlation Matrix-based MonteCarlo (RSCM-MC), an alternative variability analysis methodology that addressesthe issues mentioned above. Compared to other methods, the methodology hascomparable accuracy, and improved scalability, i.e. it is significantly faster and haslower physical memory requirements. We also introduce a method to extract spa-tial correlation parameters that define how circuit components are correlated in achip. These correlation parameters are an integral part of modelling manufacturingvariations.vPrefaceAll the research presented in this thesis was primarily conducted by author, JaspreetJhoja. The projects were done under the supervision and guidance of Dr. LukasChrostowski who also provided editorial support for all written publications.The work presented in the chapters 3 and 4 is the original, unpublished workby the author, Jaspreet Jhoja. The contents of chapters 3 and 4 are submitted forpublication as a journal paper, which is currently under peer-review. Mr. CameronHorvath and Dr. Jocelyn Bachman from Applied Nanotools provided the reflec-tometry measurements analysed in Section 3.4.J. Jhoja, Z. Lu, J. Pond, and L. Chrostowski, "Efficient layout-awarestatistical analysis for photonic integrated circuits" (under peer review)I proposed the methodologies for correlation length extraction and re-duced spatial correlation matrix based variability analysis, conductedsimulations, performed measurements and data analysis, and draftedthe manuscript. L. Chrostowski supervised the project, and all authorshelped in editing the manuscript.viTable of ContentsAbstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iiiLay Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viiList of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ixList of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xList of Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvAcknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviiDedication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviii1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 Silicon Photonics . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Challenges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . 52 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.1 Variability in Silicon Photonics . . . . . . . . . . . . . . . . . . . 62.2 Variability Extraction . . . . . . . . . . . . . . . . . . . . . . . . 82.3 Modelling variability in Photonic Integrated Circuits . . . . . . . 10vii2.3.1 Virtual Wafer-based Monte Carlo (VW-MC) . . . . . . . . 102.4 Covariance and correlation matrix . . . . . . . . . . . . . . . . . 152.4.1 Covariance matrix . . . . . . . . . . . . . . . . . . . . . 152.4.2 Correlation matrix . . . . . . . . . . . . . . . . . . . . . 172.5 Cholesky factorization . . . . . . . . . . . . . . . . . . . . . . . 183 Correlation Length Estimation . . . . . . . . . . . . . . . . . . . . . 213.1 Correlated Random Surfaces . . . . . . . . . . . . . . . . . . . . 213.2 Simulation setup . . . . . . . . . . . . . . . . . . . . . . . . . . 223.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . 273.4 Results for wafer-level measurements . . . . . . . . . . . . . . . 323.5 Discussion and Summary . . . . . . . . . . . . . . . . . . . . . . 324 Reduced Spatial Correlation Matrix based Monte Carlo . . . . . . . 354.1 Simulation Methodology . . . . . . . . . . . . . . . . . . . . . . 364.2 Comparison between Full and Reduced Matrix . . . . . . . . . . 424.3 Implementation in SiEPIC-Tools . . . . . . . . . . . . . . . . . . 454.4 Numerical Experiments . . . . . . . . . . . . . . . . . . . . . . . 464.4.1 Performance analysis of a Lattice Filter . . . . . . . . . . 464.4.2 Time and Memory Benchmark . . . . . . . . . . . . . . . 494.4.3 Analysis of a balanced Mach-Zehnder Interferometer . . . 554.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 604.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625 Summary and suggestions for future work . . . . . . . . . . . . . . . 635.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 635.2 Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66viiiList of TablesTable 3.1 Correlation length extraction results for different data rangesconsidered for sigmoid fit. . . . . . . . . . . . . . . . . . . . . 25Table 3.2 Statistical results for the manufacturing variations of a 9x30 mmchip fabricated through an e-beam lithography process . . . . . 29Table 3.3 Statistical results for the thickness variations in Soitec andWafer-Pro wafers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Table 4.1 Input parameters for the Monte-Carlo simulations . . . . . 49Table 4.2 MC simulation results summary . . . . . . . . . . . . . . . 49Table 4.3 A summary of computation times for different MC analysistechniques [40] . . . . . . . . . . . . . . . . . . . . . . . . . 53ixList of FiguresFigure 1.1 Schematic of a typical 220 nm silicon-on-insulator wafer stackwith oxide cladding. . . . . . . . . . . . . . . . . . . . . . . 2Figure 1.2 Schematic of a standard 500 nm x 220 nm strip waveguide onsilicon-on-insulator platform. . . . . . . . . . . . . . . . . . . 3Figure 2.1 Spatial process variations at different levels of Manufacturingprocess. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Figure 2.2 A schematic and nominal response of an all-pass racetrack res-onator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Figure 2.3 Measured transmission spectra of three all-pass racetrack res-onators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 2.4 Illustration of process corners and correlated bivariate distri-bution between two correlated random variables . . . . . . . . 11Figure 2.5 A flow chart detailing the simulation flow of VW-MCmethodol-ogy [Reprinted with permission from [8] ©The Optical Society] 12Figure 2.6 Mapping of variations from virtual wafer maps to circuit com-ponents [Adapted with permission from [8] ©The Optical So-ciety] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 2.7 Mapping of variations for waveguides . . . . . . . . . . . . . 14Figure 2.8 Interpolation of a coarse virtual die (b) taken from a virtualwafer map (a) into fine virtual die (c) [Reprinted with permis-sion from [8] ©The Optical Society] . . . . . . . . . . . . . . 15xFigure 2.9 Time taken and memory required to generate correlated sam-ples as a function of number of MC runs for VW-MC. The es-timations were performed for a die size of 4 mm, grid to corre-lation length ratio of 1:9, and correlation length of 200 µm. . 16Figure 2.10 Linear transformation of a dataset to correlate uncorrelated ran-dom variables. . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 3.1 Spatial correlation values as a function of separation betweentwo components for different correlation lengths. . . . . . . . 22Figure 3.2 The process of generating and sampling a correlated randomsurface. (a) Generated 2D uncorrelated random surface with푤 = 5 nm (b) Gaussian filter profile with 휉푡 = 200 µm. (c) 2Dprofile of the correlated random surface with 퐿 = 1200 µm and푁퐿 = 1200. (d) position of sample points selected for the ex-traction of correlation length. . . . . . . . . . . . . . . . . . 23Figure 3.3 Data showing the absolute difference of squared variation,퐻(푟),between each pair of points (푝푖, 푝푗) in (b) as a function of eu-clidean distance between the points. Solid colored lines showsigmoid fits for different ranges of r. . . . . . . . . . . . . . . 24Figure 3.4 (a) Extracted correlation lengths from 10 independent simu-lations for 휉 = 200 µm (b) Distribution of correlation lengthestimates as a function of the ratio between 휉푡 and die size, L. 26Figure 3.5 (a)Extracted correlation lengths for different values of푁푠푎푚푝푙푒푠,for 휉푡 = 200 µm, 푤 = 5 nm, 퐿 = 1200 µm and푁퐿 = 1200. . . 27Figure 3.6 Distribution of racetrack resonators on the chip. The figure alsoshows the spacing between the racetrack resonators. . . . . . . 28Figure 3.7 Cumulative Distribution Function (CDF) for extracted widthvariations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Figure 3.8 Cumulative Distribution Function (CDF) for extracted thick-ness variations. . . . . . . . . . . . . . . . . . . . . . . . . . 29Figure 3.9 (a) Extracted Δ푊 versus position. (b) Extracted Δ퐻 versusposition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30xiFigure 3.10 H(r) vs r curve (in grey) and sigmoid fit(in red) for width vari-ations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 3.11 H(r) vs r curve (in grey) and sigmoid fit(in red) for thicknessvariations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 3.12 Wafer-level thickness variation profiles of Soitec andWaferProwafers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Figure 4.1 Example circuit layout of a calibration structure in KLayout. . 36Figure 4.2 (a) Placement of point and continuous elements in the case ex-ample (b) Full spatial correlation matrix (c) Reduced spatialcorrelation matrix where correlation value between A& B rep-resents the mean of correlation values for range [A, B(1:5)] in(b), similarly C & B represents mean of values for range [C,B(1:5)] in (b), and the correlation of the continuous elementwith itself is set to one as we are treating it as a lumped element 42Figure 4.3 Scatterplot matrix exploring the relationships between the pairsof circuit components using the generated data. . . . . . . . . 43Figure 4.4 (a) Overlaid Cumulative Distribution Function (CDF) curves forall circuit components. The CDF curves for data generated us-ing full matrix are shown in blue and reduce matrix in red. (b)Differences in cumulative probabilities between A & B(top), B& C (middle) and C & A (bottom), for both, full matrix(blue)and reduced matrix (red). . . . . . . . . . . . . . . . . . . . . 44Figure 4.5 Flowchart summarizing the process of runningMC simulationsusing the SiEPIC-Tools implementation. . . . . . . . . . . . . 45Figure 4.6 (a) Schematic of the multi-stage Mach-Zehnder lattice filter.(b) Ideal response of the flat-top filter. MaximumTransmissionvs -1dB bandwidth for both . . . . . . . . . . . . . . . . . . 47Figure 4.7 Maximum Transmission vs -1dB bandwidth for (a) Output 1and (b) Output 2. . . . . . . . . . . . . . . . . . . . . . . . . 48xiiFigure 4.8 CDF curve for -1dB bandwidth data obtained from (a) output1 and (b) output 2. The data presented in the figures is fromthree independent batches of MC simulations. This was doneto observe any systematic errors. . . . . . . . . . . . . . . . . 50Figure 4.9 CDF curve for Maximum transmission data obtained from (c)output 1 and (d) output2. . . . . . . . . . . . . . . . . . . . . 51Figure 4.10 a) Schematic of the second orderMach-Zehnder filter b) Time(top)and Memory(bottom) comparison for 104 MC runs, die size =800 µm, 휉 = 200 µm, and 푔푟푖푑푠푖푧푒 ∶ 휉 = 1:9 . . . . . . . . . . 52Figure 4.11 a) Chip layout of 16x16 switch matrix system b) Time(top) andMemory(bottom) comparison for 104 MC runs, 휉 = 500 µm,and 푔푟푖푑푠푖푧푒 ∶ 휉 = 1:9 . . . . . . . . . . . . . . . . . . . . . 54Figure 4.12 Example layout of a balanced MZI design . . . . . . . . . . . 55Figure 4.13 The standard deviation of phase errors as a function of armlength for both "1휎" and " 110휎" process variations. We assumednominal waveguide width of 500 nm, waveguide thickness of220 nm, and (a) separation distance of 10 µm (b) separationdistance of 50 µm . . . . . . . . . . . . . . . . . . . . . . . . 56Figure 4.14 (a) The standard deviation of phase errors as a function of sep-aration between the Mach-Zehnder Interferometer (MZI) armsfor waveguide arm lengths of 100 µm. (b) A heatmap show-ing standard deviations of phase errors as a function of the armlength and the separation distance between the arms. The pro-cess data from only "1휎" was used to produce this heatmap. . 57Figure 4.15 The layout of the silicon photonic optical miner system [44] . 58Figure 4.16 The total power required to tune phase errors in 48 tunable MZIblocks. The MZI blocks have arm length of 100 µm and armseparation distance of 44 µm. The phase errors were obtainedusing the data from "1휎" process variations. . . . . . . . . . . 59Figure 4.17 Waveguide length difference utility showing length difference(in microns) and expected RMS phase error (in pi radians) be-tween two waveguides in a layout. . . . . . . . . . . . . . . . 59xiiiFigure 4.18 Comparison of computation requirements for a die size of 2.7mm and 104 MC runs. (a) Time taken to generate correlatedvariations as a function of correlation length for both, VW-MC(black) and RSCM-MC (green). (b Memory required as a func-tion of correlation length for both, VW-MC (black) and RSCM-MC(green) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61xivList of Abbreviations2D two-dimensionalAFM atomic force microscopyANT Applied Nanotools’CDF Cumulative Distribution FunctionCMOS complementary metal-oxide-semiconductorEBL Electron-Beam LithographyGB GigaByteGPC generalized Polynomial ChaosMB MegaByteMC Monte CarloMPW multi-project waferMZI Mach-Zehnder InterferometerPIC photonic integrated circuitRMS root mean squareRSCM-MC Reduced Spatial Correlation Matrix-based Monte CarloSEM scanning electron microscopyxvSIP Silicon photonicsSOI silicon-on-insulatorVW-MC Virtual Wafer-based Monte CarloxviAcknowledgmentsFirstly, I would like to thank Dr. Lukas Chrostowski for his guidance throughoutmy Master’s program. I really appreciate you for encouraging and supporting meto pursue graduate studies. This experience has allowed me to develop as a betterresearcher, both in professional and personal life. I would like to thank the Natu-ral Sciences and Engineering Research Council of Canada (NSERC) and SiliconElectronic-Photonic Integrated Circuits (SiEPIC) Fabrication (SiEPICfab) for thefunding. I would also like to thank my colleagues, including Mustafa Hammood,Hossam Shoman, Stephen Lin, Han Yun, Ajay Mistry, Enxiao Luan and MingleiMa, for their valuable support, assistance, and friendship.Finally, I would like to express my deepest gratitude to my family - my mother,my grandmother, my grandfather, my uncle, my aunties, and my brothers - for theirunconditional love and support.xviiDedication<“God is One”Ek OnkarI dedicate this work to my Family.Chapter 1Introduction1.1 Silicon PhotonicsSilicon photonics (SIP) has gained massive popularity in the fields of communica-tions, computing, and bio-sensing in the past couple of years [1, 2]. Silicon photon-ics is one of the most widely used photonics platforms due to its compatibility withthemature fabrication processes of complementarymetal-oxide-semiconductor (CMOS)industry [3], which paves the way for cheaper and high volume manufacturing.Many foundries around the world already offer low or high volume manufactur-ing of silicon photonic chips [2]. The fabrication runs can cost somewhere between$100k to $1 million per run but with the help of multi-project wafer (MPW) aggre-gators such as CMC Microsystems [4] and MOSIS[5], a group of users can sharethe cost for cheaper fabrication. There are several silicon photonic platforms, butsilicon-on-insulator (SOI) is the most commonly used platform for silicon photonics[1, 3]. The SOI wafers are made up of layers of silicon and silicon dioxide, wheretypically a 220 nm thick layer of silicon situates on top of a 2-3 um thick buried ox-ide (silicon dioxide) and 675 um thick silicon layer (acts as a handling layer) [1, 6].The cross-section of a 220 nm SOI wafer is illustrated in Figure 1.1. The devices arefabricated on the 220 nm silicon layer. The 220 nm silicon layer is sometimes cov-ered with a 2-3 휇푚 thick cladding layer (Si푂2) which allows for a better couplingto the optical fibers [1], helps in isolating and protecting the structures from theenvironment [6], and allows for the integration of thermal heaters and fabrication1of active devices [1, 3, 6].SiliconSiO2 (Buried oxide)SiO2 claddingSilicon substrate2.2 μm220 nm2 μm675 μmFigure 1.1: Schematic of a typical 220 nm silicon-on-insulator wafer stackwith oxide cladding.Silicon photonics (SIP) allows for the integration of multiple optical function-alities on a chip. The high refractive index contrast in silicon-on-insulator (SOI)designs has allowed the confinement of light in tightly packed sub-micron waveg-uides with sharp bends. A waveguide is a channel or a structure that provides themedium for guiding the light inside the chip much like an electric wire in electroniccircuits. A strip waveguide is the most common type of silicon waveguide, whichis typically 500 nm wide and 220 nm thick [1, 2]. An illustration of a waveguideon SOI platform is shown in Figure 1.2. However, the high index contrast in SOImakes these sub-micron waveguides more prone to manufacturing variations. It hasbeen a challenge to deal with the manufacturing variability in photonic integratedcircuits (PICS) and systems [1, 7], and this variability can cause fabrication errorsin waveguide width and thickness, which can lead to significant changes in light2SiSiO2 (Buried oxide)SiO2 claddingSilicon substrate500nm220nmSilicon substrateFigure 1.2: Schematic of a standard 500 nm x 220 nm strip waveguide onsilicon-on-insulator platform.propagation constants [8, 9]. These changes in propagation constants can affect thedevice performance, especially interferometers with long waveguide arm lengths[8]. Therefore, it is crucial to understand and model variability when designing aphotonic device to make the device more robust to manufacturing variations.1.2 ChallengesIt has been a challenge to characterize manufacturing variations on a wafer scale[8]. There are several techniques such as atomic force microscopy (AFM) mapping[10], scanning electronmicroscopy (SEM) imaging[11], analyzing spectral responsevariations of microdisk resonators [12], and Bragg gratings[13, 14] that can be used3to characterize manufacturing variations. However, these techniques are sometimesinvasive, costly, time-consuming, and in the case of microdisk resonators and Bragggratings, require complex measurements and processing. Z. Lu et al. [8] presentedamore straightforward and efficient technique to extract waveguide width and thick-ness variations on a wafer scale. The technique extracts waveguide width and heightvariations from the transverse electric (TE) mode spectral response of a racetrackresonator. Z. Lu et al. [8] also identified six key variability parameters that de-scribe width and thickness variations, and are as follows: width mean(휇푤), widthstandard deviation (휎푤), width correlation length(휉푤), thickness mean(휇ℎ), thick-ness standard deviation (휎ℎ), and thickness correlation length(휉ℎ). The paper pre-sented methods to extract the mean and the standard deviation for the width andthe thickness variations but not the correlation lengths. A correlation length (CL)is a crucial parameter that defines the inverse of the frequency of spatial variations,or in other words, describes how the width and thickness variations are distributedalong a surface [15]. Therefore, we need a reliable method to extract this parame-ter from the data extracted using the technique mentioned above in order to modelvariability.In electronics, the variability analysis typically includes conducting a corneranalysis or a Monte Carlo (MC) analysis. However, in photonics, it is difficult tocapture all effects of variability with just corner analysis as it only predicts theperformance at the process corners and might lead to highly conservative designs[3, 8, 16, 17]. In such cases, a MC analysis is highly preferred, however, when con-ducting traditional MC analysis in photonics, variations are sampled from indepen-dent random distributions, which might lead to unrealistic yield prediction resultsas it does not include any spatial correlations[8, 17]. In the case of photonics, thedevice sizes are much larger than the operation wavelengths. This means that smallchanges in waveguide width or thickness can lead to significant phase errors. Thevariations for both, width and thickness, tend to be spatially correlated, i.e. the spa-tially closer components will have more similar variations than those that are farapart. Therefore, it is required to include spatial correlations for all circuit compo-nents when conducting MC analysis [8, 16]. The very first simulation methodologyto incorporate layout-dependency in MC simulations for PICS was introduced byZ. Lu et al. [8]. The methodology generates correlated variations for the circuit4components by generating correlated virtual wafers for both width and thicknessvariations, and sample MC variations from the generated virtual wafer maps. Sinceits introduction, the methodology has been implemented in commercial photoniccircuit and system simulation frameworks such as the CapheVE framework, whichis implemented on top of the IPKISS design framework [9]. However, the sim-ulation methodology does not scale well with the number of simulations and diesize, especially when dealing with small correlation lengths as the density of datapoints in virtual wafers increases drastically. In this work, we also present a methodto extract physical correlation lengths for wafer-scale variation measurements, andwe also present an alternative MC simulation methodology to conduct layout-awarestatistical analysis for PICS efficiently.1.3 Thesis OrganizationThe thesis is organized as follows: In chapter 2, we provide the necessary back-ground on manufacturing variability, and methods of extracting and simulatingvariability in photonic integrated circuits (PICS). It then discusses components oflinear algebra and probability theory, such as covariance matrix, correlation matrix,cholesky decomposition and linear transformations of matrices.In chapter 3, we present the methodology to extract correlation lengths, theexperimental results from a chip fabricated using Electron-BeamLithography (EBL)technology, and discussion on the impact of parameters such as sampling type onthe estimation of correlation length.In chapter 4, we present the alternative MC simulation technique, Reduced Spa-tial Correlation Matrix-based Monte Carlo (RSCM-MC), for spatially-dependentMCsimulations in PICS. We also compare the performance prediction results betweenthe two methodologies, RSCM-MC and Virtual Wafer-based Monte Carlo (VW-MC),using a Mach-Zehnder lattice filter as a benchmark. We then use a second-orderMach-Zehnder Interferometer (MZI) filter and a 16x16 ring matrix to compare thecomputational performance of both methods, and also compare computation re-quirements as a function of correlation length for both, VW-MC and RSCM-MC.The thesis is concluded in chapter 5. We provide a summary and significanceof the work, and provide suggestions for future work.5Chapter 2BackgroundIn order to understand the work presented in this thesis, it is required to have a ba-sic understanding of variability and how variability is extracted and simulated. Thischapter discusses variability in silicon photonics, and methods to extract manufac-turing variability. Then, the techniques that are used to conduct variability analysisfor photonic integrated circuits are discussed. It then provides the necessary back-ground on probability theory and linear algebra, such as how uncorrelated randomvariables are correlated with the help of linear transformations.2.1 Variability in Silicon PhotonicsAs we discussed in Chapter 1, the high refractive index contrast in silicon pho-tonics allows for the integration of tightly packed sub-micron waveguides, whichmakes it possible to include more complex and dense designs on chip [3, 8, 9].However, this high index contrast also makes these waveguide components moreprone to variations, i.e. small changes in physical dimensions of waveguide com-ponents introduced by process variations (e.g. width and thickness variations) andoperating conditions (e.g. ambient temperature) lead to significant changes in theiroptical behavior [8, 11]. As the photonic circuits are increasing in size and com-plexity, the effects of variability are also becoming more apparent [3, 9, 18, 19].According to [9], in the case of wavelength filters with sub-micron waveguides, avariation of 1 nm in width and thickness can lead to a shift of the filter response by61 nm and 2 nm, respectively. In the case of dense wavelength division multiplexers(DWDM) systems, where the channel spacing is as small as 0.133 nm [20], if thefilter response shifts by a few nano-meters, it can render the DWDM system useless.However, the effects of variability can be compensated, to some degree, with thehelp of tuning elements such as heaters. But it can drastically increase the circuit’spower consumption, size, and complexity [8, 9].Lot-to-lot Wafer-to-wafer Die-to-die Within-DieInter-die Intra-dieFigure 2.1: Spatial process variations at different levels ofManufacturing pro-cess.Therefore, it is important to conduct a variability analysis to observe the impactof process variations on the yield and robustness of a circuit. In order to modelfabrication variations, it is important to understand and map variability at differ-ent levels of the manufacturing process. The process starts with the selection ofa wafer, which comes from a "lot". There are lot-to-lot variations which dependon factors such as wafer supplier, resist age, and tool drift [18]. The variations onwafer-to-wafer scale exist due to tool priming, and non-uniform layer thickness.The random variations on die-to-die or within-wafer level come from non-uniformlayer thickness, exposure time, plasma density, and quality of other materials suchas photoresist and etching compounds, which deteriorate over time [3, 9, 18]. Thevariations above die-to-die level are random and can be modelled using a Gaussiandistribution [9, 17, 18]. The variations on intra-die level are a result of non-uniformlayer thickness, variability in lithography, and differences in pattern density. Ac-cording to [17], the thickness variations are most dependent on intrinsic factors suchas wafer thickness.72.2 Variability ExtractionIn order to model variability at the design and simulation phase, it is required toextract statistical information regarding process variations at wafer or chip-level[8]. As mentioned in [8, 19], the physical parameters of fabricated devices arecorrelated on an intra-die level or within a chip. There are a number of ways toextract these parameters from a fabricated chip, such as atomic force microscopy(AFM) [10] and scanning electron microscopy (SEM) [11]. But these methods areexpensive, time-consuming, and invasive as they require some pre-processing ofthe chip i.e. removing the top cladding layer before measurements [8].A number of non-invasive methods have been proposed where the variability isextracted from the changes in spectral response of a circuit, such as microdisk res-onators [12], and Bragg gratings[13, 14]. However, these methods require complexmeasurements and processing. A more straightforward and efficient technique toextract waveguide width and thickness variations on a wafer scale was proposed by[8]. The method works on the principle of extracting waveguide width and thick-ness variations from the changes in the spectral response of an all-pass racetrackresonator. The schematic and the nominal transmission spectra of the device areshown in Figure 2.2.(a) (b)Figure 2.2: A schematic and nominal response of an all-pass racetrack res-onatorThe waveguides in the racetrack resonator design have a nominal width andthickness of 500nm and 220 nm, respectively. The effects of manufacturing varia-8tions are reflected by the changes in the spectral response (shown in Figure 2.3) [8].These changes in spectral response can be translated into changes in group index(Δ푛푔) and resonance wavelength (Δ휆푟푒푠), which can be used to extract the corre-sponding Δ푤 and Δℎ. The group index value is defined as the ratio of the velocityof light in vacuum to the group velocity in the medium [1]. In interferometer or res-onator circuits, the group index can be determined from free spectral range (FSR),which is the spacing between two adjacent peaks or resonances in the transmissionspectra (shown in Figure 2.2).1544.6 1544.8 1545.0 1545.2 1545.4Wavelength (nm)32101Transmission (dB)Figure 2.3: Measured transmission spectra of three all-pass racetrack res-onators푛푔 =휆2푟푒푠퐹푆푅 ∗ 퐿(2.1)The waveguide dimensions can be extracted using the matrix transformationgiven below:9[Δ푤Δℎ]=[ 훿푛푔훿푤훿푛푔훿ℎ훿휆푟푒푠훿푤훿휆푟푒푠훿ℎ]−1[Δ푛푔Δ휆푟푒푠](2.2)where 훿휆푟푒푠훿푤=0.585911 (nm/nm), 훿푛푔훿푤= -0.001650 (/nm), 훿휆푟푒푠훿ℎ=1.36330 (nm/nm),and 훿푛푔훿ℎ= 0.001091 (/nm) [8].Z. Lu et al. [8] identified six key variability parameters that describe widthand thickness variations, and are as follows: width mean(휇푤), width standard de-viation (휎푤), width correlation length(휉푤), thickness mean(휇ℎ), thickness standarddeviation (휎ℎ), and thickness correlation length(휉ℎ).2.3 Modelling variability in Photonic Integrated CircuitsIn order to observe the impact of manufacturing variability on circuit and systemdesigns, we can use several techniques such as corner analysis, and monte carloanalysis. In photonics, it is difficult to capture all effects of variability with just cor-ner analysis as it only predicts the performance at the process corners andmight leadto highly conservative designs [3, 8, 16, 17]. Moreover, a corner analysis assumesall the components in a circuit will change (grow or shrink) by the same margin, butthis ignores the spatial dependency between the devices [8]. In such cases, a MCanalysis is highly preferred, but when conducting traditionalMC analysis in photon-ics, variations are sampled from a set of uncorrelated random distributions, whichmight lead to unrealistic yield prediction results [8, 17]. In the case of photonics,the device sizes are much larger than the operation wavelengths. This means thatsmall changes in waveguide width or thickness can lead to significant phase errors.The variations for both, width and thickness, tend to be spatially correlated, i.e.the spatially closer components will have more similar variations than those thatare far apart. Therefore, it is required to include spatial correlations for all circuitcomponents when conducting MC analysis [8, 16].2.3.1 Virtual Wafer-based Monte Carlo (VW-MC)Virtual wafer-basedMC is a technique to generate correlated variations forMC sim-ulations in PICS. The simulation flow for VW-MC simulations is shown in Figure 2.510Figure 2.4: Illustration of process corners and correlated bivariate distribu-tion between two correlated random variablesand is discussed below. First, the netlist of a layout is extracted using an open-sourcetool[21] developed in KLayout [22], a layout design software. The extracted netlistis then imported into Lumerical INTERCONNECT [23], a commercial photoniccircuit simulator. Based on the mean, standard deviation and the correlation lengthvalues provided by the user, virtual wafers for width and thickness variations aregenerated. The process of creating these virtual wafers is the same as the processof generating correlated random surfaces in Chapter 3.The correlated variations are then sampled from the virtual wafers and mappedonto the individual circuit components (shown in Figure 2.6). The size of the totalvirtual wafer is determined by the chip area and the number of MC simulations. Foreach MC run, the corresponding virtual die is selected and variations are mappedonto the circuit components. There are two types of components. One type iswhere the components’ location can be represented with a single coordinate (e.g.11Figure 2.5: Aflow chart detailing the simulation flow of VW-MCmethodology[Reprinted with permission from [8] ©The Optical Society]grating couplers), and the other type where the components’ location is representedby an array of coordinates along its length (e.g. waveguides). For waveguides, thewidth and thickness variations along its length are averaged [8]. Each waveguideis divided into several segments, where each segment gets Δ푤 and Δℎ based onits location on the virtual wafer (shown in Figure 2.7. Then, width and thicknessvariations are averaged using Equation 2.3 and Equation 2.4 respectively, to obtaina single Δ푤 and Δℎ value.푤푎푣푔 =푤0+1푁푁∑푘=1Δ푤푘 (2.3)ℎ푎푣푔 = ℎ0+1푁푁∑푘=1Δℎ푘 (2.4)where N, Δ푤푘, and Δℎ푘 are total number of waveguide segments, width variation12at segment n, and thickness variation at segment n, respectively.#1 #2 #1 #2 #3  #4  #5  #6  #7  #8  #9  #10  #11  #12  #13  #14  #15  #16  #17  #18  #19  #20  #21  #22  #23  #24  #25    [nm]#1 #2 #3  #4  #5  #6  #7  #8  #9  #10  #11  #12  #13  #14  #15  #16  #17  #18  #19  #20  #21  #22  #23  #24  #25  #1  #2  a    aa    abbbbi = 1                       i = 2∆w variation map∆h variation mapFigure 2.6: Mapping of variations from virtual wafer maps to circuit compo-nents [Adapted with permission from [8] ©The Optical Society]Then based on the width (Δw) and thickness variations (Δh), waveguide com-ponents’ properties (e.g.푛푔(휆0)) are updated (using parametrized compact models,and look-up tables of waveguide geometry and correspondingwaveguide properties[8,16]). For primitive components other than waveguides, a similar approach is usedto obtain S-parameters, based on the changes in the geometry. The amplitude andthe phase of the S-parameters is obtained with the help of multi-dimensional splineinterpolation. Once the components’ performance is updated, circuit simulationsare conducted, and the results are recorded for further analysis.This methodology has several advantages. First, this is the first methodologyto consider layout-dependency in MC simulations for PICs. Second, as long as thedie size and the number of simulations remain constant, the computation cost to13(∆Wn , ∆Hn) (∆Wn-1 , ∆Hn-1)(∆W1 , ∆H1)Grid SizeFigure 2.7: Mapping of variations for waveguidesgenerate correlated samples for the MC simulations is fixed and is independent ofthe circuit complexity. This makes the methodology useful for changing complexcircuits and systems as long as the die size remains unchanged as the size of thevirtual wafer depends mainly on the die size and number of simulations.In order to improve the computation efficiency of the method, a sparse gridof 500 µm for a correlation length of 4500 µm was used when generating virtualwafers, and then linear interpolation was used to interpolate this data to a finergrid when taking samples for circuit simulations [8] (as shown in Figure 2.8). Webelieve it would be better to represent grid size as a ratio of correlation length ratherthan a fixed value, as this value will scale up or down with the correlation length.From the parameters used in the paper[8], we can see that the authors considereda grid size to correlation length ratio of 1:9. So for further comparisons, we willuse a grid size to correlation length ratio of 1:9, as it is not too large and should14Figure 2.8: Interpolation of a coarse virtual die (b) taken from a virtual wafermap (a) into fine virtual die (c) [Reprinted with permission from [8]©The Optical Society]offer maximum computation efficiency while maintaining excellent accuracy wheninterpolating data to finer grid sizes.An issue with the virtual wafer technique is that the methodology does not scalewell with the number of simulations and die size, especially when dealing withsmall correlation lengths. The virtual wafers’ size increases drastically with an in-crease in the die size and the number of simulations. This can significantly increasethe computation cost, as shown in Fig.2.9. The time and memory comparisons inthe figure only include the time and memory it takes to compute virtual wafers witha sparse grid, interpolate to a fine grid of 1 µm, and sample correlated width andthickness variations. All computation benchmarks were performed on a windowsmachine with an intel i5-8250 CPU and 8 GigaByte (GB) of physical memory.2.4 Covariance and correlation matrixIn this study, we work with both the correlation and the covariance matrices. There-fore, it is crucial to understand their definitions and the differences between them.2.4.1 Covariance matrixIn order to understand the covariancematrix, it is important to understand the differ-ence between variance and covariance. Variance is a measure of spread of data for15    1XPEHURIVLPXODWLRQV7LPHV0HPRU\0%Figure 2.9: Time taken and memory required to generate correlated samplesas a function of number of MC runs for VW-MC. The estimations wereperformed for a die size of 4 mm, grid to correlation length ratio of 1:9,and correlation length of 200 µm.a random variable, whereas covariance measures how two random variables varywith respect to each other [24]. The variance of a random variable 푎 can be writtenas [24–26]휎푎2 = 1(푥−1)푥∑푖=1(푎푖− 푎̄)2 (2.5)where x is the number of samples, 푎̄ is the sample mean of random variable 푎.The variance 휎푎2 can also be written as 휎(푎,푎) [26]. The covariance between tworandom variables 푎 and 푏 is written as [25–28]16휎(푎,푏) = 1(푥−1)푥∑푖=1(푎푖− 푎̄)(푏푖− 푏̄) (2.6)where 푏̄ is the sample mean of random variable 푏.The covariance matrix, also known as variance-covariance matrix, is a symmet-ric matrix, which keeps a record of all the covariances between the random variablesof a dataset [25, 26, 28]. The size of the matrix is dictated by the number of randomvariables in the dataset, i.e. Σ ∈ ℝ푚푥푚, where m signifies the number of randomvariables [26]. The variances of the variables are noted in the diagonal entries ofthe matrix, whereas the covariances are noted in the non-diagonal entries. For asimple two dimensional case between variables a and b, the covariance matrix iswritten asΣ =(휎(푎,푎) 휎(푎,푏)휎(푏,푎) 휎(푏,푏))(2.7)2.4.2 Correlation matrixIn order to understand the correlationmatrix, it is necessary to understandwhat doesa correlation value/ correlation coefficient represents. A correlation value defines"the strength and the direction of the relationship between two variables" [28]. Inother words, a correlation value represents the direction and the tightness of a bi-variate distribution.In this work, we use spatial correlation values, which are generated using a2D Gaussian function (refer to Section 4.1 for more information). The correlationvalues range between zero and one.• If the correlation value is zero: the variables are said to be completely ran-dom, or uncorrelated.• If the correlation value is one: the variables are said to be completely posi-tively correlated.The correlation value between two variables can be obtained by dividing thecovariance value between the variables by the product of standard deviations of17both variables [28].푐표푟푟(푎,푏) = 휎(푎,푏)푆푎푆푏(2.8)where 휎(푎,푏),푆푎,푎푛푑푆푏 represent the covariance value between variables a and b,standard deviation of variable a, and standard deviation of variable b, respectively.2.5 Cholesky factorizationIn this work, we make use of Cholesky decomposition/factorization to correlate un-correlated random variables. In this section, we discuss the necessary backgroundon Cholesky decomposition, and how a set of uncorrelated random variables arecorrelated.Lower-upper (LU) decomposition allows the decomposition of a nonsingularmatrix into an upper and a lower triangular matrix, such that the dot product of thetwo matrices produces the original matrix [29, 30]. LU decomposition of a matrixM is written as푀 = 퐿푈 =⎛⎜⎜⎜⎝푙11 0 0푙21 푙22 0푙31 푙32 푙33⎞⎟⎟⎟⎠⎛⎜⎜⎜⎝푢11 푢12 푢130 푢22 푢230 0 푢33⎞⎟⎟⎟⎠ (2.9)When the upper triangular matrix is the transpose of the lower triangular ma-trix, the decomposition is referred as Cholesky decomposition [30, 31]. Choleskydecomposition of a matrix M is written as푀 = 퐿퐿푇 =⎛⎜⎜⎜⎝푎 0 0푏 푐 0푑 푒 푓⎞⎟⎟⎟⎠⎛⎜⎜⎜⎝푎 푏 푑0 푐 푒0 0 푓⎞⎟⎟⎟⎠ (2.10)where L denotes the lower triangular matrix and 퐿푇 denotes the transpose ofthe lower triangular matrix. Cholesky decomposition is twice as efficient as LUdecomposition [30, 32]. However, it has special requirements such as it is onlyapplicable to cases where the matrix is symmetric and positive definite [30, 32].There are a number of applications of cholesky decomposition such as statisti-cal modelling [32, 33]. Cholesky decomposition can be used to correlate datasets of18uncorrelated random variables. Let us assume a dataset X that contains two uncor-related random variables a and b with zero mean and unit variance. As the variablesare uncorrelated, they will have zero covariance. The variables can be correlated bytransforming the dataset using a transformation matrix L, which scales and rotatesthe vector representation of the covariance matrix[26, 33].푋′ = 퐿푋 (2.11)where 푋′ is the transformed dataset. The transformation matrix is composed of arotation and a scaling matrix, which allow for the linear transformation of relation-ships between variables [26, 33].퐿 = 푅푆 (2.12)The rotation matrix R and scaling matrix S are defined below [26, 33]푅 =[푐표푠(휃) −푠푖푛(휃)푠푖푛(휃) 푐표푠(휃)](2.13)푆 =[푆푎 00 푆푏](2.14)where 푆푎 and 푆푏 denote the scaling factors for the two random variables, a andb, contained in the dataset. This transformation matrix can be obtained with thehelp of cholesky decomposition. The covariance matrix can be decomposed intorotational and scaling matrices [26, 33].Σ = 푅푆푆푅−1 = 퐿퐿푇 (2.15)From Equation 2.11 and Equation 2.15, we can see that the decomposition ob-tained by Cholesky factorization can be used to correlate a dataset of uncorrelatedrandom variables. The dataset transformation is illustrated in Figure 2.10, wherethe both variables are correlated by a correlation coefficient of 0.95. We can rewrite19Equation 2.8 and use it to convert correlation values to covariance.휎(푎,푏) = 푐표푟푟(푎,푏)푆푎푆푏 (2.16)where 푐표푟푟(푎,푏),푆푎푎푛푑푆푏 represent the correlation values between variables a andb, standard deviation of variable a and standard deviation of variable b, respectively.Therefore, for a correlation coefficient of 0.95 and unit variances, we get thecovariance value of 0.95. This can also be seen in Figure 2.10.1      00      1∑ = X X’X’ = LX1     0.950.95     1∑’ = = RSSR’ = LL’Figure 2.10: Linear transformation of a dataset to correlate uncorrelated ran-dom variables.20Chapter 3Correlation Length EstimationThis chapter describes our proposed methodology to estimate physical correlationlengths from the variation maps extracted using the methodology described in Sec-tion 2.2. In Section 3.1, we discuss variables that describe a random surface’sroughness. Using these variables, a simulation recipe to demonstrate the processof correlation length estimation is presented in Section 3.2. In Section 3.3, wedemonstrate the methodology on variation maps extracted from a chip fabricatedusing Applied Nanotools’ (ANT) [6] Electron-Beam Lithography (EBL) process.3.1 Correlated Random SurfacesIn this section, we describe terms that are used to define correlated random surfaces.The width and the thickness variationmaps, which are extracted using the techniquedescribed in Section 2.2, can also be described using these terms.Rough surfaces can be categorized into two types, deterministic and random[34]. Deterministic surfaces have a specific surface profile, such as sinusoidal, saw-tooth etc., whereas random surfaces are stochastic in nature, and can be defined us-ing terms from probability theory such as a probability density function with ameanand sigma, where mean and sigma define the vertical roughness of a surface profile[15]. However, the mean and the sigma paint a partial picture of the surface profileas it only defines how rough a surface is in the vertical direction. Another crucialparameter is the correlation length (CL), a parameter that defines the inverse of21the frequency of the surface variations. This parameter describes how the physicalvariations are distributed along a chip’s surface, or in other words, the correlationlength describes the spatial correlation between two photonic circuit componentsas a function of separation between them (shown in Figure 3.1).0 50 100 150 200 250separation (microns)0.00.20.40.60.81.0spatial correlation valueCL = 50 mCL = 100 mCL = 200 mFigure 3.1: Spatial correlation values as a function of separation between twocomponents for different correlation lengths.3.2 Simulation setupIn this section, we demonstrate the process of extracting physical correlation lengthsby generating a correlated rough surface with an input mean, sigma and correlationlength, and recovering the input correlation length parameter using the recipe de-scribed below.1. First, we generate a 2-dimensional correlated surface using the steps de-scribed here [8, 34, 35]. A correlated random surface (see Figure 3.2(c))is obtained by applying a gaussian filter (see Figure 3.2(b)) to an uncorre-lated random rough surface with zero mean and standard deviation (푤) (see22Figure 3.2(a)). This requires inputs such as true correlation length (휉푡), rms-roughness(푤), surface/die side length(퐿), points per surface length(푁퐿). Forthe example presented in Figure 3.2(a, b, c, & d ), we used 휉푡 = 200 µm, 푤 =5 nm, 퐿 = 1200 µm and푁퐿 = 1200.  [FRRUGLQDWH m\FRRUGLQDWHmI[\QP  [FRRUGLQDWH m\FRRUGLQDWHmI[\QP(a) (b)  [FRRUGLQDWH m\FRRUGLQDWHmI[\QP  [FRRUGLQDWH m\FRRUGLQDWHmI[\QP(c) (d)Figure 3.2: The process of generating and sampling a correlated random sur-face. (a) Generated 2D uncorrelated random surface with 푤 = 5 nm (b)Gaussian filter profile with 휉푡 = 200 µm. (c) 2D profile of the corre-lated random surface with 퐿 = 1200 µm and 푁퐿 = 1200. (d) positionof sample points selected for the extraction of correlation length.2. We then randomly sample a number of points from the correlated randomsurface, and this number is denoted by 푁푠푎푚푝푙푒푠 (see Figure 3.2(d)). The푁푠푎푚푝푙푒푠 value is decided by first selecting an arbitrary value for number ofsamples for a 1:1 ratio of 휉퐿 & L, and then scaling this value for a desired ra-tio while keeping the sampling density constant. In this case, we decided on231000 samples for a 1:1 ratio, which was scaled to 36000 points for a ratio of1:6. For each sample point 푝푖, we obtain its x,y coordinates and correspond-ing roughness value (푓 (푝푖)). The accuracy of the estimation is dependenton the number of points sampled and the ratio between the true correlationlength and the surface side length.3. For each pair of sample points, 푝푎& 푝푏, we calculate their euclidean distance(푟푎푏)and difference of squared roughness, 퐻(푟), i.e. (퐻(푟) = |푓 (푝푎)2 −푓 (푝푏)2|)[15]. For 36000 sample points, we get 647,982,000 pair combinations. Thedata is shown in Figure 3.3.  U m+U 'DWD6>r1 : rmax/2@6>r1 : rmax/3@6>r1 : rmax/4@6>r1 : rmax/6@trmax2rmax3rmax4rmax6 rmaxFigure 3.3: Data showing the absolute difference of squared variation,퐻(푟),between each pair of points (푝푖, 푝푗) in (b) as a function of euclidean dis-tance between the points. Solid colored lines show sigmoid fits for dif-ferent ranges of r.4. Next, we fit a logistic function (sigmoid curve) to the data,푓 (푥) = 퐿1+ 푒−푘(푥−푥0)(3.1)where L is maximum amplitude of the curve, k is the slope of the curve and 푥0is the sigmoid’s midpoint’s x-value. The accuracy of the sigmoid fit dependson the data range considered for the fit. The Figure 3.3 shows the sigmoid fitsfor a number of ranges of r, where 푟푚푎푥 is the maximum Euclidean distance24between two sample points. A general way to find the best sigmoid fit for CLestimation is by calculating sigmoid fits for several data ranges and choosingthe fit that captures the plateau and has the highest R-squared value to thedata considered for the fit.5. The correlation length is estimated by the point along the fit that is 5% lowerthan the plateau, and is denoted by the symbol 퐸[휉]. In order to find thepoint of estimation, we conducted a number of simulations with high densityof sample points and the estimation point was found to be 5% lower thanthe plateau. The correlation length estimations for different data ranges aresummarized in Table 3.1.Table 3.1: Correlation length extraction results for different data ranges con-sidered for sigmoid fit.Data range (µm) Estimated correlation length (µm)fit label minimum r maximum rS[(r1 ∶ 푟푚푎푥∕2)] 1 840 346.58S[(r1 ∶ 푟푚푎푥∕3)] 1 560 246.56S[(r1 ∶ 푟푚푎푥∕4)] 1 420 218.48S[(r1 ∶ 푟푚푎푥∕6)] 1 289 192.33We then repeated the simulation recipe to conduct 10 independent CL extrac-tions. The results from the extractions are shown in Figure 3.4(a). In order todemonstrate the impact of ratio between the correlation length and the die sidelength, we repeated the experiment multiple times for different correlation lengthto die side length ratios. The sample density is kept constant for all simulations.The results are shown in Figure 3.4(b). As the ratio gets bigger, we see better CLestimations. For smaller ratios, the data curve is noisy for the estimation region,which affects the sigmoid fit and correlation length estimations.In order to demonstrate the impact of number of samples on correlation lengthestimation, we repeated simulation 25 times for several values of 푁푠푎푚푝푙푒푠. Theresults are summarized in Figure 3.5. The CL estimation improves as we increasethe푁푠푎푚푝푙푒푠 values.25H (r)(a)1:1 1:3 1:6 1:9 1:12:L100150200E[] (m)(b)Figure 3.4: (a)Extracted correlation lengths from 10 independent simulationsfor 휉 = 200 µm (b)Distribution of correlation length estimates as a func-tion of the ratio between 휉푡 and die size, L.26250 500 1000 2500 5000Nsamples200300400E[] (m)Figure 3.5: (a) Extracted correlation lengths for different values of 푁푠푎푚푝푙푒푠,for 휉푡 = 200 µm, 푤 = 5 nm, 퐿 = 1200 µm and푁퐿 = 1200.3.3 Experimental ResultsIn order to demonstrate the correlation length extraction experimentally, we de-signed and fabricated a 9 mm x 30 mm chip using Applied Nanotools’ (ANT)[6]EBL technology.We used the methodology described in [8] to characterize the manufacturingvariability of the chip, i.e. to extract the width and the thickness variations. Wecovered the entire chip with 2705 identical racetrack resonators, separated by adistance of 300 µm. The nominal width and thickness of the waveguides are 500 nmand 200 nm, respectively. The device has a radius, coupling length, and couplinggap of 20 µm, 10 µm, and 200 nm, respectively [8]. Figure 3.6 shows the distributionof racetrack resonators on the chip.2730 mm9 mm300 μm300 μmFigure 3.6: Distribution of racetrack resonators on the chip. The figure alsoshows the spacing between the racetrack resonators.We measured the chip using an automated photonics testing setup. Cumulativedistribution function (CDF) curves for Δ푊 (width variations) and Δ퐻 (thicknessvariations) are shown in Figure 3.7 and Figure 3.8, respectively. The mean and thestandard deviation of the width variations relative to the nominal width (500 nm)are found to be 6.295 nm and 1.132nm, respectively. The mean and the standarddeviation of the thickness variations relative to the nominal thickness (200 nm) arefound to be -1.99 nm and 0.585 nm, respectively.  GHOWDZLGWKQPFXPXODWLYHSUREDELOLW\Figure 3.7: Cumulative Distribution Function (CDF) for extracted width vari-ations.28  GHOWDWKLFNQHVVQPFXPXODWLYHSUREDELOLW\Figure 3.8: Cumulative Distribution Function (CDF) for extracted thicknessvariations.The extracted width variations versus position are shown in Figure 3.9(a). Wethen calculated H(r) vs r curve for each pair of sample points, which is shown inFigure 3.10. Similarly, the extracted thickness variations versus position are shownin Fig.3.9(b). We then calculated H(r) for every r, which is shown in Fig. 3.11.The extracted correlation lengths for width and thickness variations are found tobe 12.23 mm and 8.72 mm, respectively. The extracted results from the chip aresummarized in Table 3.2.Table 3.2: Statistical results for the manufacturing variations of a 9x30 mmchip fabricated through an e-beam lithography processΔ w Δ hMean, 휇 6.295 nm -1.99 nmStandard deviation, 휎 1.132 nm 0.585 nmCorrelation Length, 휉 12.23 mm 8.72 mmWe have compiled a manufacturing variability analysis utility [36] in the formof a python Jupyter notebook [37]. The tool takes the measurement data from race-track resonators, and outputs mean, sigma and correlation lengths for both, widthand thickness variations. The tool is available for download along with the variation29  \ m[m[\YV HQP  \ m[m[\YV WQP(a) (b)Figure 3.9: (a) Extracted Δ푊 versus position. (b) Extracted Δ퐻 versus po-sition.data characterized from the 9 mm x 30 mm chip [36].30    U( m)+UFigure 3.10: H(r) vs r curve (in grey) and sigmoid fit(in red) for width varia-tions.    U( m)+UFigure 3.11: H(r) vs r curve (in grey) and sigmoid fit(in red) for thicknessvariations.313.4 Results for wafer-level measurementsIn this section, we analyze and compare thewafer-level reflectometrymeasurementsof Soitec andWaferProwafers. AppliedNanotools [6] provided the data from a totalof three WaferPro and four Soitec wafers, where a circular area with a radius of 25mm was measured from the center of each wafer. The variations were computedwith respect to a nominal thickness of 220 nm. A summary of the statistical resultsfor thickness variations is presented in Table 3.3, and the thickness variation mapsfor all measured wafers are shown in Figure 3.12.Table 3.3: Statistical results for the thickness variations in Soitec and Wafer-Pro wafersMean Δ h (nm) Sigma Δ h CL/휉 (mm)WaferPro #1 3.36 1.07 10.14WaferPro #2 4.18 1.05 9.80WaferPro #3 4.53 0.87 12.51Soitec #1 5.27 0.50 24.79Soitec #2 3.46 0.25 22.05Soitec #3 8.81 0.36 27.16Soitec #4 5.12 0.45 22.45From the summary presented in Table 3.3, we can see that the thickness vari-ations in Soitec wafers have significantly lower variance and longer correlationlengths. This means that the Soitec wafers have smoother surface profiles thanthe WaferPro wafers. The correlation lengths for Soitec wafers are twice as long asthe correlation lengths for WaferPro wafers. This means that the smooth thicknessvariation profiles span over longer lengths as compared to WaferPro wafers, andthe variations on die-to-die and intra-die level for dies/chips fabricated on Soitecwafers can be expected to be highly correlated.3.5 Discussion and SummaryWhen extracting correlation length from a wafer or a die/chip dedicated to extractmanufacturing variations, it is advised to sample the surface uniformly. The ex-pected correlation length dictates the maximum spacing between the racetrack res-32#1                                       #2                                           #3 #1                                        #2                                        #3                                         #4               WaferPro                            SOITECFigure 3.12: Wafer-level thickness variation profiles of Soitec and WaferPro wafers.33onators and the maximum spacing needs to be less than 1∕3푟푑 of the expected corre-lation length. As it is not always feasible to dedicate a chip/wafer to study manufac-turing variations, users can sample surface randomly, i.e. sprinkle ring resonatorswherever space permits. However, when sampling randomly, it is crucial to dis-tribute ring resonators all over the chip with a mix of more and less closely placedring resonators. If there are not enough data points that sample variations closer,we can miss higher frequency noise. The correlation length can change based onhow we sample the surface. Therefore, it is necessary to have a mix of small andlarge scale scans to obtain a good estimation of the correlation length.In summary, we have presented a simple method to extract physical correla-tion lengths for width and thickness variations from the variability maps extractedusing the technique described in [8]. We have also presented a simulation recipedetailing the process of generating a correlated random surface, sampling the sur-face, and extracting physical correlation length. We also performed a number ofconvergence tests to observe the impact of changes in ratio of correlation length &die side length, and changes in number of samples value. We also demonstratedthe method on a 9 mm x 30 mm chip fabricated using electron beam lithographyprocess. The estimated correlation lengths for width and thickness variations arefound to be 12.23 mm and 8.72 mm, respectively. We also analyzed and comparedreflectometry measurements of wafers from two different suppliers.34Chapter 4Reduced Spatial CorrelationMatrix based Monte CarloIn this chapter, we present an alternative Monte Carlo (MC) simulation method-ology, which has better computation efficiency than Virtual Wafer-based MonteCarlo (VW-MC). The principal idea behind the improved methodology is to use acorrelation matrix-based technique [32, 38], to generate correlated variations forindividual components without the need of any virtual wafers. The work presentedin [16] demonstrated a use case of the correlation matrix technique to conduct MCsimulations in PICS. However, the work was limited to small-sized photonic circuitssuch as a ring modulator.In this chapter, we introduce a correlation matrix-based technique that can han-dle PICs of any size and number of components. A general description of the stepsto generate correlated variations is as follows. We first record spatial correlationsbetween components in a correlation matrix. A two-dimensional (2D) Gaussianfunction is used to obtain these spatial correlation values. Then a reduction ofthe correlation matrix is performed, and a covariance matrix is generated fromthe reduced correlation matrix. Finally, Cholesky Decomposition [32, 38, 39] ofthe covariance matrix is computed which decomposes the covariance matrix into aproduct of 푈 and 푈푇 , where U is the lower triangular matrix, and 푈푇 is the uppertriangular matrix. Then the lower triangular matrix (푈 ) is multiplied with a matrixof random uncorrelated samples to generate correlated variations for each compo-35nent. The whole process is repeated for both width and thickness variations as theyboth would have a separate set of variation parameters.4.1 Simulation MethodologyThe simulation methodology to generate correlated variations and conductMC sim-ulations can be divided into several sequential steps, and each step is described indetail below.STEP 1 Extract Netlist: The first step would be to start with a layout of a photoniccircuit. Then the netlist of the layout would be extracted (in this case,we used an open-source tool[21] to extract this information) and importedinto Lumerical INTERCONNECT [23], a schematic circuit simulator. Thenetlist includes details such as layout coordinates, connections and designparameters of circuit components. An example circuit layout and its netlistare given below.Figure 4.1: Example circuit layout of a calibration structure in KLayout.The netlist of the example circuit is shown below. We have colour-coded apart of the netlist to highlight the critical information. The text highlightedin purple colour indicates the name of the component instance. The text inred shows the nodes or ports the component is connected to. The compo-nent class name, component library name and component parameters arehighlighted in blue, green and orange, respectively.36* Spice output from KLayout SiEPIC-Tools v0.3.56, 2019-10-11 15:53:49..subckt TOP ebeam_gc_te1550_detector1 ebeam_gc_te1550_laser2ebeam_gc_te1550_0 ebeam_gc_te1550_detector1 N$0 ebeam_gc_te1550library="Design kits/ebeam" lay_x=-97.49E-6 lay_y=-11.74E-6 sch_x=-1.22E0 sch_y=-148.0E-3ebeam_gc_te1550_1 ebeam_gc_te1550_laser2 N$1 ebeam_gc_te1550 li-brary="Design kits/ebeam" lay_x=-17.09E-6 lay_y=-62.75E-6 sch_x=-215.50E-3 sch_y=-790.95E-3 sch_r=180ebeam_wg_integral_1550_2 N$0 N$1 ebeam_wg_integral_1550 li-brary="Design kits/ebeam" wg_length=95.312u wg_width=0.500upoints="[[-81.0,-11.75],[-58.45,-11.75],[-58.45,-62.76],[-33.6,-62.76]]"radius=5.0 lay_x=-57.29E-6 lay_y=-37.25E-6 sch_x=-722.14E-3sch_y=-469.51E-3 .ends TOP TOP ebeam_gc_te1550_detector1ebeam_gc_te1550_laser2 TOP sch_x=-1 sch_y=-1STEP 2 Generate Spatial correlation matrix: In this step, we would take mean,sigma and correlation length values [8] for both width and thickness vari-ations, and generate spatial correlation matrices using a 2D gaussian func-tion [8, 34]. A spatial correlation value between two components is calcu-lated using the following equation:푐[(푥푖,푦푖), (푥푗 ,푦푗)] = 푒푥푝[−(푥푗 −푥푖)2−(푦푗 −푦푖)2푙2∕2](4.1)where (푥푖,푦푖), (푥푗 ,푦푗) and 푙 are coordinates of first element, coordinates ofsecond element and correlation length, respectively.All primitive components except waveguides are classified as point com-ponents. This means that the location of a point component can be repre-sented by a single layout coordinate whereas for a continuous component,its location is represented by an array of coordinates along its length.There are three types of correlations between circuit components.(a) Point to Point e.g. a grating coupler and a grating coupler(b) Point to Continuous e.g. a grating coupler and a waveguide37(c) Continuous to Continuous e.g. a waveguide and a waveguideSpatial correlations of type (a) (between point components) are easier andsimpler to calculate. However, when calculating spatial correlation val-ues of type (b) and (c), it is required to split continuous components intosmaller segments. Then spatial correlation values for each segment arecalculated and recorded in the spatial correlation matrix. This means thateach segment occupies a row and a column in the correlation matrix. Thiscan cause problems for waveguide heavy circuits as the spatial correlationmatrix grows at a rate of 푛2 where n is the total number of components (in-cluding waveguide segments). This means that the method’s effectivenesswill decrease as the number of continuous components increases. One ap-proach is to reduce the matrix dimensionality by representing correlationsof type (b) and (c) with a single correlation value.Reduction of spatial correlation matrixIn this section, we derive an expression that justifies the averaging of cor-relation/ covariance values for continuous components. For simplicity, weassume a simple case of type (b) i.e. a point component (P) and a continu-ous component (Q). The expression then can be extended to more complextype (c) cases i.e. between two continuous components. The covariancebetween the two variables can be written as [27]:퐶표푣(푃 ,푄) =푥∑푖=1(푃푖− 푃̄ )(푄푖− 푄̄)(푥−1)(4.2)where x is the number of samples, and 푃̄ and 푄̄ are the sample means ofvariables P and Q, respectively.As the number of samples (x) increases, the sample means of both vari-ables converge to the input mean 푢̄. Therefore, the expression can be re-written as :퐶표푣(푃 ,푄) =푥∑푖=1(푃푖− 푢̄)(푄푖− 푢̄)(푥−1) (4.3)38Lets assume that the component Q has m number of segments. As shownin virtual wafer method [8], the sample variation for the whole componentQ at sample instance i, can be written as the average of sample variationsfor all segments of Q at instance i.푄푖 =푄1푖+푄2푖+푄3푖....푄푚푖푚(4.4)where i is the sample/instance number.From Equation 4.3 & Equation 4.4, we get:퐶표푣(푃 ,푄) =푥∑푖=1(푃푖− 푢̄)(푄1푖+푄2푖+푄3푖....푄푚푖푚− 푢̄)(푥−1)=푥∑푖=1(푃푖− 푢̄)(푚∑푗=1푄푗푖푚− 푢̄)(푥−1)(4.5)For reduced matrix case, we suppose that the covariance between P and Qcan be written as the average covariance between P and the segments of39Q.퐶표푣(푃 ,푄) =퐶표푣(푃 ,푄1)+퐶표푣(푃 ,푄2)+퐶표푣(푃 ,푄3)....퐶표푣(푃 ,푄푚)푚=푥∑푖=1(푃푖− 푢̄)(푄1푖− 푢̄)푚(푥−1)+푥∑푖=1(푃푖− 푢̄)(푄2푖− 푢̄)푚(푥−1)+ ....푥∑푖=1(푃푖− 푢̄)(푄푚푖− 푢̄)푚(푥−1)=푥∑푖=1(푃푖− 푢̄)(푄1푖− 푢̄+푄2푖− 푢̄+ ....푄푚푖− 푢̄)푚(푥−1)=푥∑푖=1(푃푖− 푢̄)(푄1푖+푄2푖+ ....푄푚푖−푚푢̄)푚(푥−1)=푥∑푖=1(푃푖− 푢̄)푚∑푗=1푄푗푖−푚푢̄푚(푥−1)=푥∑푖=1(푃푖− 푢̄)(푚∑푗=1푄푗푖푚− 푢̄)(푥−1)This proves that the covariance/ correlation between a point componentand a continuous component can be written as a single averaged covari-ance/ correlation value. For type (b) correlations, the correlation betweenP and Q can be re-written as the average correlation between P and thesegments of Q.퐶(푃 ,푄) =퐶(푃 ,푄1)+퐶(푃 ,푄2)+퐶(푃 ,푄3)....퐶(푃 ,푄푚)푚= 1푚푚∑푗=1퐶(푃 ,푄푗)(4.6)where P is a point component, Q is a continuous component, and m is thenumber of segments in Q. We can also re-write Equation 4.6 to accommo-date complex type (c) correlations.퐶(푃 ,푄) = 1푛푚푛∑푘=1푚∑푗=1퐶(푃푘,푄푗) (4.7)40where P is a continuous component, Q is a continuous component, n is thenumber of segments in P, andm is the number of segments in Q. Correlatedvariations generated by full and reduced matrices are compared in section4.2.STEP 3 Generate correlated variations: We can then process correlation matri-ces either by scripting the processing routine or by simply using a utilitywe have implemented in SiEPIC-Tools [21] (More information about thisutility is given below).Processing routineThe processing routine is as follows:(a) Generate a Covariance matrix from the reduced correlation matrix.(b) Perform Cholesky Decomposition of the covariance matrix such thatthe product 푈푈푇 equals to the covariance matrix, where 푈 is thelower triangular matrix and 푈푇 denotes matrix transpose of 푈 .(c) Generate normally distributed random numbers in a matrix (X) ofsize 푛 ∗ 푚, where n= number of elements and m = number of simu-lations with mean = 0, standard deviation = 1.(d) Obtain correlated samples by calculating the dot product of 푈 and푋.STEP 4 Interpolate components’ performance and conduct circuit simulation:Finally, the performance of the circuit components is updated based on thegenerated samples and the circuit simulations are conducted.When running MC simulations, the method can be used with any opti-cal simulation techniques such as traditional MC, generalized PolynomialChaos (GPC) based MC[40], etc. We discuss this in more detail in sectionSection 4.4.We have made an implementation of Reduced Spatial CorrelationMatrix-basedMonte Carlo (RSCM-MC) available as a part of SiEPIC tools [21, 41], which is avail-able to download as an open-source package. The tool extracts the layout netlist,41takes variability parameters as an input, calculates spatial correlations between allcircuit components, parses this information to INTERCONNECT’s MC functional-ity, and carries out the variability analysis.4.2 Comparison between Full and Reduced MatrixIn order to compare the correlated values generated by the reduced matrix to theones generated by the full matrix, we created a case example with three components,two point components and one continuous component (with five segments). Theplacement of the components is shown in Figure 4.2(a). For the simulation, weselected 휇 = 0, variation 휎 = 5 and correlation length 휉 = 40 µm. This leads to afull matrix of size 7x7, as shown in Figure 4.2(b). The reduced spatial matrix isshown in Figure 4.2(c), where the correlation value between A & B represents theaverage of correlation values for range [A, B(1:5)] in Figure 4.2(b). Similarly C &B represents mean of values for range [C, B(1:5)] in Figure 4.2(b).50–50 20x(μ)y(μ)A : (0, -5)C : (20, 5)B : (0–20, 0)B(1)B(5)B(2)B(4)B(3)B(3)B(4)B(2)B(5)B(1)AABBCC10.90.80.70.6AABBCC(a) (b) (c)(a) (b) (c)Figure 4.2: (a) Placement of point and continuous elements in the case ex-ample (b) Full spatial correlation matrix (c) Reduced spatial correlationmatrix where correlation value between A& B represents the mean ofcorrelation values for range [A, B(1:5)] in (b), similarly C & B repre-sents mean of values for range [C, B(1:5)] in (b), and the correlation ofthe continuous element with itself is set to one as we are treating it as alumped elementThe spatial correlation values in the range [A, B(1:5)] in Figure 4.2(b) representspatial correlation values between A and each segment of B. When reducing the42$%  $&  %  &0HWKRGIXOOPDWUL[UHGXFHGPDWUL[Figure 4.3: Scatterplot matrix exploring the relationships between the pairsof circuit components using the generated data.matrix, we set the correlation of element Bwith itself as one because when reducingmatrix, we treat the element as a lumped element. A scatterplot matrix showing thecorrelations between the pairs of circuit components is shown in Figure 4.3. Thediagonal entries show the comparison between the probability density functions(PDFs) obtained using both methods. In both cases, the PDF curves converge to thesame mean and standard deviation value. The scatterplots of each variable plottedagainst each other are shown in the non-diagonal entries of the matrix.As expected, the Cumulative Distribution Function (CDF) curves of variationsfor all components converge to the samemean and standard deviation values (shownin Figure 4.4(a)). In order to compare the differences between the CDFS of differentcomponents, we computed the differences in cumulative probabilities of A&B, B&43-20 0 20hypothesis space, x0.00.20.40.60.81.0P(x)full matrixreduced matrix(a)0.000.01P(A,B)0.000.01P(B,C)-20 0 20hypothesis space, x0.000.01P(C,A)(b)Figure 4.4: (a) Overlaid CDF curves for all circuit components. The CDFcurves for data generated using full matrix are shown in blue and reducematrix in red. (b) Differences in cumulative probabilities between A &B(top), B & C (middle) and C & A (bottom), for both, full matrix(blue)and reduced matrix (red).C, and C&A, as shown in Figure 4.4(b), for both methods. The absolute difference44between cumulative probabilities of A and B is denoted asΔ푃Σ(퐴,퐵). The absoluteerrors/differences between cumulative probabilities for both cases are contained inthe same error range (< 1%). The errors for the full matrix are shown in the blueand reduced matrix in the red, in Figure 4.4(b).4.3 Implementation in SiEPIC-ToolsAs we mentioned earlier, we have made an implementation of the methodologyavailable as a part of SiEPIC-Tools[21]. SiEPIC-Tools is a package developed inKLayout’s python macros environment to assist photonic circuit designers in theprocess of layout design, verification and simulation. The process of utilizing thetool to conduct MC simulation is described below.Photonic Circuit LayoutExtract component netlistGenerate and process reducedcorrelation matrixParse component netlist andcorrelation matrix toINTERCONNECTusing LumAPIGenerate MC analysis instance Run simulation and obtain resultsFigure 4.5: Flowchart summarizing the process of running MC simulationsusing the SiEPIC-Tools implementation.The user first start by creating a layout. This includes selecting and arranging45layout components from a Pcell library. Pcells are parameterized layout compo-nent, which can be modified with different parameter values. Next, we launch theRSCM-MC functionality from the SiEPIC-Tools’ menu. This opens a new window,where the user inputs MC parameters such as mean, sigma, and correlation lengthsfor width and thickness variations. After this, the tool extracts the spatial infor-mation of all the circuit components, and processes a reduced correlation matrix,which gets parsed to a circuit simulation software, along with rest of the netlist in-formation. The data is parsed using lumapi, which allows the easy integration oflumerical tools with python. This generates a circuit schematic in INTERCON-NECT [23], and creates a MC simulation instance in optimizations and sweeps tab.From here, we can adjust MC simulation parameters such as the number of trials,seed values, and even fine-tune variation parameters for different component mod-els. Once we are happy with the parameters, we can run the instance to conductMCsimulations, and obtain results.4.4 Numerical ExperimentsIn order to compare the accuracy of RSCM-MC method, we conducted variabilityanalysis of a lattice filter using both methods, VW-MC and RSCM-MC. In the secondsubsection, we compared the time and memory performance of both methods on asmall scaled and a large circuit.4.4.1 Performance analysis of a Lattice FilterIn this section, we present the performance analysis of a lattice filter using bothmethodologies. The filter is based on the designs presented in [42], and the pho-tonic circuit layout is shown in Figure 4.6(a). The purpose of the filter is to obtaina flat-top response by comparing multiple stages of MZIS [16, 42]. The nominalwaveguide width and thickness are 500 nm and 220 nm, respectively. We can ob-serve the filter’s flat-top response in Figure 4.6(b).In order to evaluate the performance of the filter, we are interested in -1dBbandwidth and maximum transmission power of both outputs. These performancemarkers are sensitive to small changes in waveguide width and thickness. -1dBbandwidth is defined as a wavelength range where the maximum output transmis-46input output 1output 2  δL4= 50 μ δL3= 0.1057μ δL2= 100.323μ δL1= 0.2642μ3 dB coupler(a)1500 1520 1540 1560 1580 1600(nm)50403020100Transmission (dB)Output 1Output 2(b)Figure 4.6: (a) Schematic of the multi-stage Mach-Zehnder lattice filter. (b)Ideal response of the flat-top filter. Maximum Transmission vs -1dBbandwidth for bothsion is reduced by 1 dB. From Figure 4.6(b), we can see that the filter has an ideal-1 dB bandwidth of 4.1 nm around wavelength of 1550 nm, and a maximum trans-mission power of -0.9 dB. The input parameters for the Monte-Carlo simulationsare presented in Table 4.1.472 3 4 5-1dB Bandwidth (nm)2520151050Maximum Transmission (dB)VWMCRSCMMCnominal(a)2 3 4 5-1dB Bandwidth (nm)2520151050Maximum Transmission (dB)VWMCRSCMMCnominal(b)Figure 4.7: Maximum Transmission vs -1dB bandwidth for (a) Output 1 and(b) Output 2.48Table 4.1: Input parameters for the Monte-Carlo simulations휎푤푖푑푡ℎ(푛푚) 휎푡ℎ푖푐푘푛푒푠푠(푛푚) 휉푤푖푑푡ℎ(푚푚) 휉푡ℎ푖푐푘푛푒푠푠(푚푚)5 2 4.5 4.5We ran three independent MC batches with 1000 simulations each. This wasdone to observe and rule out any systematic errors. Figure 4.7(a) and Figure 4.7(b)shows the maximum transmission as a function of the -1dB bandwidth for output 1and output 2, respectively.In Figure 4.8(a) and Figure 4.8(c), we are showing the Cumulative DistributionFunction (CDF) curves of maximum transmission and -1dB bandwidth for output1, respectively. In Figure 4.8(b) and Figure 4.8(d), we are showing the cumulativedistribution function curves of maximum transmission and -1dB bandwidth for out-put 2, respectively. The plots shown in Figure 4.6, Figure 4.7, and Figure 4.8 showa high correlation between the results obtained using both methods.The results are summarized in Table 4.2, where 휇1푑퐵, 휎1푑퐵, 휇푚푎푥푇 and 휎푚푎푥푇denote mean of -1dB bandwidth, standard deviation of -1dB bandwidth, mean ofmaximum transmission, and standard deviation of maximum transmission, respec-tively.Table 4.2: MC simulation results summaryMethod Output 1 Output 2휇1푑퐵(nm)휎1푑퐵(nm)휇푚푎푥푇(dB)휎푚푎푥푇(dB)휇1푑퐵(nm)휎1푑퐵(nm)휇푚푎푥푇(dB)휎푚푎푥푇(dB)VW-MC3.08 1.03 -7.06 5.23 3.05 1.01 -6.81 5.18RSCM-MC3.11 1.06 -7.18 5.27 3.09 1.05 -6.95 5.194.4.2 Time and Memory BenchmarkIn order to compare the time and the memory requirements between RSCM-MC andVW-MC, we decided to use a second-order Mach-Zehnder filter [40] (shown in fig.4.10(a)). The results reported in Fig.4.10(b) only include the time taken and mem-492 3 4 5-1dB Bandwidth (nm)0.00.20.40.60.81.0Cumulative ProbabilityVWMCRSCMMC(a)2 3 4 5-1dB Bandwidth (nm)0.00.20.40.60.81.0Cumulative ProbabilityVWMCRSCMMC(b)Figure 4.8: CDF curve for -1dB bandwidth data obtained from (a) output 1and (b) output 2. The data presented in the figures is from three in-dependent batches of MC simulations. This was done to observe anysystematic errors.5025 20 15 10 5 0Maximum Transmission (dB)0.00.20.40.60.81.0Cumulative ProbabilityVWMCRSCMMC(a)25 20 15 10 5 0Maximum Transmission (dB)0.00.20.40.60.81.0Cumulative ProbabilityVWMCRSCMMC(b)Figure 4.9: CDF curve forMaximum transmission data obtained from (c) out-put 1 and (d) output2.51ory required to generate correlated samples.δL2= 680.8μ δL1= input barcross(a)2.64 255.27Time (seconds)RSCM-MCVW-MC246 851Memory (MB)RSCM-MCVW-MC(b)Figure 4.10: a) Schematic of the second order Mach-Zehnder filter b)Time(top) and Memory(bottom) comparison for 104 MC runs, die size= 800 µm, 휉 = 200 µm, and 푔푟푖푑푠푖푧푒 ∶ 휉 = 1:9For 104 MC runs, die size of 0.8 mm and correlation length of 200 µm, VW-MCtook 255.27 seconds to generate correlated samples whereas RSCM-MC took only522.64 seconds. In terms of memory required, VW-MC required 851 MegaByte (MB),whereas RSCM-MC required 246 MB. The optical simulation run times for 104 MCruns using different MC simulation techniques are summarized in table 4.3. Anymemory and time speedups achieved using RSCM-MC would be more significant inthe cases of non-classical MC analysis techniques, such as GPC based MC analysis[40].Table 4.3: A summary of computation times for different MC analysistechniques [40]Technique Computation timeClassical MC analysis 10 hour 58 minutesgPC MC analysis 5 min 26 secondsBB-gPC analysis 3 min and 9 seconds.Next, we compared the computation requirements for a 16x16 switch matrix[43]. The layout of the system is shown in Fig. 4.11(a). In the system, thereare about 1700 total components. For 104 MC runs, correlation length of 500 µmand a die size of 2.7 mm, VW-MC computed variations in 4614 seconds whereasRSCM-MC took 6.48 seconds. VW-MC operations required 2138 MB of physicalmemory, whereas RSCM-MC operations required 280 MB.532.7 mm2.7 mm(a) (b)Figure 4.11: a) Chip layout of 16x16 switch matrix system b) Time(top)and Memory(bottom) comparison for 104 MC runs, 휉 = 500 µm, and푔푟푖푑푠푖푧푒 ∶ 휉 = 1:9544.4.3 Analysis of a balanced Mach-Zehnder InterferometerWe can use the presented correlation matrix technique to conduct an in-depth anal-ysis of balanced Mach-Zehnder Interferometer (MZI) based designs. In this section,we present an analysis of a lossless balanced MZI design for different process vari-ation statistics, i.e. standard deviations.For a lossless balanced MZI, we expect an ideal output power of 100 % due toconstructive interference at the output, which is a result of equal arm lengths andpropagation constants. However, if the propagation constants in any of the armsvary due to mismatch variations, the output power will change. In order to studythe impact of mismatch variations in a balanced interferometer, we decided to studythe changes in two MZI parameters: the arm lengths and the separation between thearms.Input OutputArm length SeparationFigure 4.12: Example layout of a balanced MZI designFor this analysis, we used the variation statistics (standard deviations and cor-relation lengths) extracted in Section 3.3. We labeled the process as "1휎". We thenassumed a process which has 10x lower variation statistics than the "1휎" process,and we labelled this process as " 110휎". The width and thickness standard deviationsfor "1휎" are 1.132 nm and 0.585 nm. The width and thickness standard deviationsfor " 110휎" are assumed to be 10 times lower than the "1휎" process, i.e. 0.1132 nmand 0.0585 nm. We used the same width and thickness correlation lengths for bothprocesses. We used width and thickness correlation lengths of 12.23 mm and 8.72mm, respectively.For a central wavelength of 1550 nm and arm separation distances of 10 µm and50 µm, we computed phase errors between the MZI arms for a range of arm lengths.The standard deviations of phase errors as a function of arm lengths are shown in55101 102 103arm length (um)10 310 210 1Phase error std. dev. ( rad)1 , separation = 10 m110  , separation = 10 m(a)101 102 103arm length (um)10 310 210 1Phase error std. dev. ( rad)1 , separation = 50 m110  , separation = 50 m(b)Figure 4.13: The standard deviation of phase errors as a function of armlength for both "1휎" and " 110휎" process variations. We assumed nom-inal waveguide width of 500 nm, waveguide thickness of 220 nm, and(a) separation distance of 10 µm (b) separation distance of 50 µmFigure 4.13. As the arm length increases, the root mean square (RMS) phase erroralso increases because the accumulated effects of variability along a waveguide’slength increase with the waveguide length. We obtain larger phase errors in thecase of 50 µm separation because the correlation between two arms decreases as56the separation increases.In order to observe the impact of increasing separation on phase error, we as-sumed a waveguide of length 100 µm and computed phase errors as a function ofseparation between the MZI arms, which are shown in Figure 4.14(a). Using theprocess variations from "1휎", a heatmap showing the standard deviations of phaseerrors as a function of different arm lengths and separation distances is generated,and is shown in Figure 4.14(b).101 102 103Separation (um)10 310 210 1Phase error std. dev. ( rad)1 110  (a)100 200 300 400separation (um)50100150200250300arm length (um)0.000.020.040.060.080.100.120.14Phase error std. dev. ( rad)(b)Figure 4.14: (a) The standard deviation of phase errors as a function of sepa-ration between the MZI arms for waveguide arm lengths of 100 µm. (b)A heatmap showing standard deviations of phase errors as a functionof the arm length and the separation distance between the arms. Theprocess data from only "1휎" was used to produce this heatmap.57The circuit/system designers using balanced MZIs as building blocks for theirsystems can generate and use these heatmaps to find optimal length and separationvalues for their designs to make sure the MZI arms are matched enough and requireless tuning. This can improve the tuning efficiency and the overall power consump-tion of the system. We present a case of a silicon photonics based cryptocurrencyminer [44] as an example. The system has a total of 48 tunable MZI blocks. Thelayout of the optical miner system is shown in Figure 4.15. In order to simplifycalculations, we assumed the same arm length and separation distance values of100 µm and 44 µm, for all MZI blocks. Based on the process variations of "1휎", wecalculated phase errors in terms of pi radians. For each block, we assumed heaterswith a tuning efficiency of 30 mW/pi radians. Using this data, we calculated thetotal power required to tune the phase errors in all MZI blocks, which is shown inFigure 4.16.Figure 4.15: The layout of the silicon photonic optical miner system [44]We also implemented a utility that allows a user to calculate the RMS phaseerror between two waveguides as a part of siepic tools [41]. It is integrated withanother functionality that is used to calculate waveguide length difference betweentwo waveguides. It takes process parameters and waveguide path coordinates asinputs and outputs the length difference between waveguides (in microns) and theirRMS phase error (in pi radians). An example of the output results is shown in Fig-ure 4.17.580.070 0.035 0.000 0.035 0.070Phase error (  rad.)020406080100Tuning power (mW)Figure 4.16: The total power required to tune phase errors in 48 tunable MZIblocks. The MZI blocks have arm length of 100 µm and arm separationdistance of 44 µm. The phase errors were obtained using the data from"1휎" process variations.Figure 4.17: Waveguide length difference utility showing length difference(in microns) and expected RMS phase error (in pi radians) betweentwo waveguides in a layout.594.5 DiscussionWe also compared the computation requirements for the circuit shown in Fig. 4.11as a function of correlation length, and the comparison results are shown in Fig.4.18. We can see that, in this case, RSCM-MC has better computation efficiencythan VW-MC. For VW-MC, the computation efficiency gets better as the correlationlength increases because the grid size of the sparse virtual wafers increases with thecorrelation length, which leads to virtual wafers with fewer data points. However,as shown in Fig. 4.18, the time and the memory requirements for VW-MC saturateto 2526 seconds and 370 MB, respectively. This saturation point is mainly dictatedby the value of the grid size of the interpolated wafer blocks (1 µm in this case). ForRSCM-MC, the time and memory requirements remain constant as its computationrequirements are only affected by the number of components in the circuit, whichremained unchanged.For small-sized circuits or a small number of simulations, users can considereither methodology, RSCM-MC or VW-MC, to generate correlated variations. Fromthe comparison data presented in Section 4.4.2, we can say that RSCM-MC methodis more useful for a large number of simulations (> 1000) and larger die sizes (>1 mm). The method is also useful when users are trying to run MC simulationson their personal computers as it has light computation requirements. A bottleneckof RSCM-MC method is that the method scales with the number of components in acircuit. When working with circuits that have a large number of circuit components,it is advised to use the VW-MCmethod. VW-MCmethod also works better for circuitsand systems containing Bragg gratings, as they cannot be treated as continuouscomponents. This is because each grating period will require to be treated as anindividual component when generating width and thickness variations. This willincrease the computation cost in the case of RSCM-MC method.60      t( m7LPHV9:0&56&00&(a)     t( m0HPRU\0%9:0&56&00&(b)Figure 4.18: Comparison of computation requirements for a die size of 2.7mm and 104 MC runs. (a) Time taken to generate correlated varia-tions as a function of correlation length for both, VW-MC (black) andRSCM-MC (green). (b Memory required as a function of correlationlength for both, VW-MC (black) and RSCM-MC (green)614.6 SummaryIn this chapter, we have presented an efficient way to generate spatially correlatedvariations for Monte-Carlo simulations in photonic integrated circuits & systems.We have detailed the full simulation recipe and proved its reliability with the helpof numerical experiments conducted on a lattice filter. We also benchmarked theperformance of the proposedmethodology against the previously proposedmethod-ology, VW-MC, using a second-order MZI filter and a 16x16 optical switch matrixsystem. For the best case, i.e. the small-sized circuit, we showed a decrease incomputational times by 98.9% and a reduction in memory requirement by 72%.For the worst case, i.e. the 16x16 ring matrix, we observed a decrease in computa-tional times by 99.8% and a reduction in memory requirement by 87%. Moreover,we have made the correlation extraction utility and implementation of RSCM-MC,open-source and available for download [41].62Chapter 5Summary and suggestions forfuture work5.1 SummaryIn this thesis, we addressed the challenges of extracting physical correlation lengthsfrom fabrication variations and efficiently generating correlated samples for Monte-Carlo simulations in photonic integrated circuits. The major contributions of thiswork include:1. We have presented a simple and reliable method to extract physical corre-lation lengths for width and thickness variations from the variability dataextracted using the technique described in [8]. We then demonstrated themethod on a 9 mm x 30 mm chip fabricated using electron beam lithographyprocess. The estimated correlation lengths for width and thickness variationsare found to be 12.23 mm and 8.72 mm, respectively.2. We have presented an efficient way to generate spatially correlated variationsfor Monte-Carlo simulations in photonic integrated circuits & systems. Wehave detailed the full simulation recipe and proved its reliability with the helpof numerical experiments conducted on a lattice filter. We also benchmarkedthe performance of the proposed methodology against the previously pro-posed methodology, VW-MC, using a second-order MZI filter and a 16x1663optical switch matrix system. In the case of second-order MZI filter, weshowed a decrease in computational times by 98.9% and a reduction in mem-ory requirement by 72%. In the case of 16x16 ring matrix, we observeda decrease in computational times by 99.8% and a reduction in memory re-quirement by 87%. Moreover, we have made the correlation extraction utilityand implementation of RSCM-MC, open-source and available for download[41].As discussed in Section 4.5, our proposed method is more useful for a largenumber of simulations (> 1000) and larger die sizes (> 1 mm). As the method haslow computation requirements than VW-MC, it is useful for runningMC simulationson personal computers. However, our method scales with the number of compo-nents in a circuit. Therefore, when working with circuits with large number ofcircuit components, it is advised to use the VW-MC method. Moreover, the VW-MCmethod also works better for circuits and systems containing Bragg gratings, as theywill require each grating to be treated as an individual component when generatingwidth and thickness variations. This will increase the computation cost in the caseof RSCM-MC method.5.2 Future workIn this section, suggestions for future work are discussed.• The proposed methodology can be utilized to conduct a detailed yield pre-diction analysis of photonic circuits. A yield analysis reveals important in-formation regarding a circuit’s robustness, behavior, and tolerance to manu-facturing variations, which is one of the key steps in the optimization process[17]. There are several optimization methods that have been introduced toconduct a constrained [45], and unconstrained [46] optimization of photonicintegrated circuits. In the case of unconstrained optimization, the parametervalues are not limited or restricted in any way. In the case of constrained op-timization, the values of the optimizing variables are constrained with ruleswhich prohibit certain variable values or combination of values. The opti-mization methods mentioned above rely on optimization algorithms and be-64havioral models such as genetic algorithms [40], and generalized PolynomialChaos (gPC) models [40, 46].However, these methodologies do not account for any spatial correlationsbetween circuit components. So our proposed simulation methodology canbe used to introduce spatial dependence in these optimizationmethods. In thecase of genetic algorithms based optimization, our simulation method can beused to allow for spatially constrained optimization of circuit components. Inthe case of gPC, our method can be used to generate surrogate models thataccount for the spatial correlations, where surrogate models are also referredto as behavioral models such as gPC.• Currently, the variability model is limited to width or thickness variations.Other parameters that define variability such as sidewall angle can be in-cluded into the variability model.• As mentioned in Section 4.5, the methodology is not optimized for workingwith Bragg gratings. Currently, each period of the grating is treated as anindividual component and each Bragg grating component can have hundredsto thousands of grating periods. This can increase the computation require-ments for themethod quickly. In the future, more work can be done to addressthis challenge.65Bibliography[1] Lukas Chrostowski and Michael Hochberg. Silicon Photonics Design.Cambridge University Press, Cambridge, 2015. ISBN 978-1-316-08416-8.doi:10.1017/CBO9781316084168. URLhttp://ebooks.cambridge.org/ref/id/CBO9781316084168. → pages 1, 2, 9[2] Lukas Chrostowski, Hossam Shoman, Mustafa Hammood, Han Yun,Jaspreet Jhoja, Enxiao Luan, Stephen Lin, Ajay Mistry, Donald Witt, NicolasA. F. Jaeger, Sudip Shekhar, Hasitha Jayatilleka, Philippe Jean, Simon B.-deVillers, Jonathan Cauchon, Wei Shi, Cameron Horvath, Jocelyn N.Westwood-Bachman, Kevin Setzer, Mirwais Aktary, N. Shane Patrick,Richard J. Bojko, Amin Khavasi, Xu Wang, Thomas Ferreira de Lima,Alexander N. Tait, Paul R. Prucnal, David E. Hagan, Doris Stevanovic, andAndy P. Knights. Silicon Photonic Circuit Design Using Rapid PrototypingFoundry Process Design Kits. IEEE Journal of Selected Topics in QuantumElectronics, 25(5):1–26, September 2019. ISSN 1077-260X, 1558-4542.doi:10.1109/JSTQE.2019.2917501. URLhttps://ieeexplore.ieee.org/document/8718393/. → pages 1, 2[3] Muhammad Umar Khan, Yufei Xing, Yinghao Ye, and Wim Bogaerts.Photonic Integrated Circuit Design in a Foundry+Fabless Ecosystem. IEEEJournal of Selected Topics in Quantum Electronics, 25(5):1–14, September2019. ISSN 1077-260X, 1558-4542. doi:10.1109/JSTQE.2019.2918949.URL https://ieeexplore.ieee.org/document/8721505/. → pages1, 2, 4, 6, 7, 10[4] CMC, . URL https://www.cmc.ca/. → page 1[5] MOSIS Fabrication Processes, . URLhttps://www.mosis.com/products/fab-processes. → page 1[6] Appliednt. Applied Nanotools Inc. URL https://www.appliednt.com/. →pages 1, 2, 21, 27, 3266[7] Wim Bogaerts, Martin Fiers, and Pieter Dumon. Design Challenges inSilicon Photonics. IEEE Journal of Selected Topics in Quantum Electronics,20(4):1–8, July 2014. ISSN 1077-260X, 1558-4542.doi:10.1109/JSTQE.2013.2295882. URLhttp://ieeexplore.ieee.org/document/6691908/. → page 2[8] Zeqin Lu, Jaspreet Jhoja, Jackson Klein, Xu Wang, Amy Liu, JonasFlueckiger, James Pond, and Lukas Chrostowski. Performance prediction forsilicon photonics integrated circuits with layout-dependent correlatedmanufacturing variability. Optics Express, 25(9):9712, May 2017. ISSN1094-4087. doi:10.1364/OE.25.009712. URLhttps://www.osapublishing.org/abstract.cfm?URI=oe-25-9-9712. → pagesx, 3, 4, 6, 7, 8, 9, 10, 12, 13, 14, 15, 22, 27, 34, 37, 39, 63[9] Wim Bogaerts, Yufei Xing, and Umar Khan. Layout-Aware VariabilityAnalysis, Yield Prediction, and Optimization in Photonic Integrated Circuits.IEEE Journal of Selected Topics in Quantum Electronics, 25(5):1–13,September 2019. ISSN 1077-260X, 1558-4542.doi:10.1109/JSTQE.2019.2906271. URLhttps://ieeexplore.ieee.org/document/8675367/. → pages 3, 5, 6, 7[10] Selvaraja Kumar Shankar. Wafer-scale fabrication technolgoy for siliconphotonic integrated circuits. PhD thesis, 2011. → pages 3, 8[11] Shankar Kumar Selvaraja, Wim Bogaerts, Pieter Dumon, DriesVan Thourhout, and Roel Baets. Subnanometer Linewidth Uniformity inSilicon Nanophotonic Waveguide Devices Using CMOS FabricationTechnology. IEEE Journal of Selected Topics in Quantum Electronics, 16(1):316–324, January 2010. ISSN 1077-260X, 1558-4542.doi:10.1109/JSTQE.2009.2026550. URLhttps://ieeexplore.ieee.org/document/5325789/. → pages 3, 6, 8[12] William A. Zortman, Douglas C. Trotter, and Michael R. Watts. Siliconphotonics manufacturing. Optics Express, 18(23):23598, November 2010.ISSN 1094-4087. doi:10.1364/OE.18.023598. URLhttps://www.osapublishing.org/oe/abstract.cfm?uri=oe-18-23-23598. →pages 3, 8[13] Nicolas Ayotte, Alexandre D. Simard, and Sophie LaRochelle. LongIntegrated Bragg Gratings for SoI Wafer Metrology. IEEE PhotonicsTechnology Letters, 27(7):755–758, April 2015. ISSN 1041-1135,671941-0174. doi:10.1109/LPT.2015.2391174. URLhttp://ieeexplore.ieee.org/document/7006638/. → pages 3, 8[14] Xu Wang, Wei Shi, Han Yun, Samantha Grist, Nicolas A. F. Jaeger, andLukas Chrostowski. Narrow-band waveguide Bragg gratings on SOI waferswith CMOS-compatible fabrication process. Optics Express, 20(14):15547,July 2012. ISSN 1094-4087. doi:10.1364/OE.20.015547. URLhttps://www.osapublishing.org/oe/abstract.cfm?uri=oe-20-14-15547. →pages 3, 8[15] Max Bloomfield. Roughness Concepts. page 15, 2006. → pages 4, 21, 24[16] James Pond, Jackson Klein, Jonas FlÃijckiger, Xu Wang, Zeqin Lu, JaspreetJhoja, and Lukas Chrostowski. Predicting the yield of photonic integratedcircuits using statistical compact modeling. page 102420S, Prague, CzechRepublic, May 2017. doi:10.1117/12.2268845. URL http://proceedings.spiedigitallibrary.org/proceeding.aspx?doi=10.1117/12.2268845. → pages4, 10, 13, 35, 46[17] Wim Bogaerts and Lukas Chrostowski. Silicon Photonics Circuit Design:Methods, Tools and Challenges. Laser & Photonics Reviews, 12(4):1700237, April 2018. ISSN 18638880. doi:10.1002/lpor.201700237. URLhttp://doi.wiley.com/10.1002/lpor.201700237. → pages 4, 7, 10, 64[18] Yufei Xing, Domenico Spina, Ang Li, Tom Dhaene, and Wim Bogaerts.Variability analysis of device-level photonics using stochastic collocation(Conference Presentation). In Laurent Vivien, Lorenzo Pavesi, and StefanoPelli, editors, Silicon Photonics and Photonic Integrated Circuits V, page 43,Brussels, Belgium, July 2016. SPIE. ISBN 978-1-5106-0136-9.doi:10.1117/12.2224037. URLhttps://spiedigitallibrary.org/conference-proceedings-of-spie/9891/2224037/Variability-analysis-of-device-level-photonics-using-stochastic-collocation-Conference/10.1117/12.2224037.full. → pages 6, 7[19] L. Chrostowski, X. Wang, J. Flueckiger, Y. Wu, Y. Wang, and S. Talebi Fard.Impact of Fabrication Non-Uniformity on Chip-Scale Silicon PhotonicIntegrated Circuits. In Optical Fiber Communication Conference, pageTh2A.37, San Francisco, California, 2014. OSA. ISBN 978-1-55752-993-0.doi:10.1364/OFC.2014.Th2A.37. URLhttps://www.osapublishing.org/abstract.cfm?URI=OFC-2014-Th2A.37. →pages 6, 868[20] Dvir Munk, Moshe Katzman, Yuri Kaganovskii, Naor Inbar, Arijit Misra,Mirit Hen, Maayan Priel, Moshe Feldberg, Maria Tkachev, Arik Bergman,Menachem Vofsi, Michael Rosenbluh, Thomas Schneider, and Avi Zadok.Eight-Channel Silicon-Photonic Wavelength Division Multiplexer With 17GHz Spacing. IEEE Journal of Selected Topics in Quantum Electronics, 25(5):1–10, September 2019. ISSN 1077-260X, 1558-4542.doi:10.1109/JSTQE.2019.2904437. URLhttps://ieeexplore.ieee.org/document/8664601/. → page 7[21] lukasc-ubc/SiEPIC-Tools: Package for KLayout to add integrated optics /silicon photonics functionality (waveguides, netlist extraction, circuitsimulations, etc), . URL https://github.com/lukasc-ubc/SiEPIC-Tools. →pages 11, 36, 41, 45[22] Matthias KÃűfferlein. KLayout Layout Viewer And Editor. URLhttps://www.klayout.de/. → page 11[23] PIC Design and Simulation Software - Lumerical INTERCONNECT, . URLhttps://www.lumerical.com/products/interconnect/. → pages 11, 36, 46[24] Standard Deviation and Variance, . URLhttps://www.mathsisfun.com/data/standard-deviation.html. → page 16[25] Covariance Matrix, . URLhttps://stattrek.com/matrix-algebra/covariance-matrix.aspx. → pages 16, 17[26] Nikolai Janakiev. Understanding the Covariance Matrix | DataScience+.URL https://datascienceplus.com/understanding-the-covariance-matrix/. →pages 16, 17, 19[27] James Chen. Covariance. URLhttps://www.investopedia.com/terms/c/covariance.asp. → page 38[28] Srishti Saha. Baffled by Covariance and Correlation??? Get the Math andthe Appli-cation in Analytics for both the terms.. URL https://towardsdatascience.com/let-us-understand-the-correlation-matrix-and-covariance-matrix-d42e6b643c22.→ pages 16, 17, 18[29] Nishant Arora. Mathematics | L U Decomposition of a System of LinearEquations - GeeksforGeeks. URL https://www.geeksforgeeks.org/l-u-decomposition-system-linear-equations/. →page 1869[30] Thia Kirubarajan. Cholesky Decomposition. URLhttps://www.ece.mcmaster.ca/~kiruba/3sk3/lecture7.pdf. → page 18[31] John Mathews. Cholesky, Doolittle and Crout Factorization. URLhttp://mathfaculty.fullerton.edu/mathews/n2003/CholeskyMod.html. → page18[32] Rick Wicklin. Use the Cholesky transformation to correlate and uncorrelatevariables. URL https://blogs.sas.com/content/iml/2012/02/08/use-the-cholesky-transformation-to-correlate-and-uncorrelate-variables.html. → pages 18, 35[33] Vincent Spruyt. A geometric interpretation of the covariance matrix. URLhttps://www.visiondummy.com/2014/04/geometric-interpretation-covariance-matrix/. → pages 18, 19[34] David BergstrÃűm. mysimlabs, 2010. URLhttp://www.mysimlabs.com/matlab/surfgen/rsgeng2D.m. → pages 21, 22, 37[35] N. Garcia and E. Stoll. Monte Carlo Calculation for Electromagnetic-WaveScattering from Random Rough Surfaces. Physical Review Letters, 52(20):1798–1801, May 1984. ISSN 0031-9007.doi:10.1103/PhysRevLett.52.1798. URLhttps://link.aps.org/doi/10.1103/PhysRevLett.52.1798. → page 22[36] Jaspreet Jhoja. jaspreetj/manufacturing-variability-analysis-tool, August2019. URLhttps://github.com/jaspreetj/manufacturing-variability-analysis-tool.original-date: 2019-07-16T23:26:06Z. → pages 29, 30[37] Project Jupyter. Project Jupyter. URL https://www.jupyter.org. → page 29[38] Correlated Random Samples âĂŤ SciPy Cookbook documentation, . URLhttps://scipy-cookbook.readthedocs.io/items/CorrelatedRandomSamples.html. →page 35[39] Solving Systems of Linear Equations. In A Workout in ComputationalFinance, pages 117–131. John Wiley & Sons, Ltd, Chichester, UK, August2013. ISBN 978-1-119-97351-5 978-1-119-97191-7.doi:10.1002/9781119973515.ch8. URLhttp://doi.wiley.com/10.1002/9781119973515.ch8. → page 3570[40] Abi Waqas, Daniele Melati, Paolo Manfredi, and Andrea Melloni. Stochasticprocess design kits for photonic circuits based on polynomial chaosaugmented macro-modelling. Optics Express, 26(5):5894, March 2018.ISSN 1094-4087. doi:10.1364/OE.26.005894. URLhttps://www.osapublishing.org/abstract.cfm?URI=oe-26-5-5894. → pagesix, 41, 49, 53, 65[41] Jaspreet Jhoja. jaspreetj/SiEPIC-Tools, November 2019. URLhttps://github.com/jaspreetj/SiEPIC-Tools. original-date:2018-05-24T21:33:36Z. → pages 41, 58, 62, 64[42] K. Jinguji and M. Oguma. Optical half-band filters. Journal of LightwaveTechnology, 18(2):252–259, February 2000. ISSN 0733-8724, 1558-2213.doi:10.1109/50.822800. URL http://ieeexplore.ieee.org/document/822800/.→ page 46[43] Hasitha Jayatilleka, Hossam Shoman, Lukas Chrostowski, and SudipShekhar. Photoconductive heaters enable control of large-scale siliconphotonic ring resonator circuits. Optica, 6(1):84, January 2019. ISSN2334-2536. doi:10.1364/OPTICA.6.000084. URLhttps://www.osapublishing.org/abstract.cfm?URI=optica-6-1-84. → page 53[44] Michael Dubrovsky, Marshall Ball, and Bogdan Penkovsky. Optical Proof ofWork. arXiv:1911.05193 [cs, q-fin], November 2019. URLhttp://arxiv.org/abs/1911.05193. arXiv: 1911.05193. → pages xiii, 58[45] Daniele Melati, Abi Waqas, Dan-Xia Xu, and Andrea Melloni. Geneticalgorithm and polynomial chaos modelling for performance optimization ofphotonic circuits under manufacturing variability. In Optical FiberCommunication Conference, page M3I.4, San Diego, California, 2018. OSA.ISBN 978-1-943580-38-5. doi:10.1364/OFC.2018.M3I.4. URLhttps://www.osapublishing.org/abstract.cfm?URI=OFC-2018-M3I.4. → page64[46] Daniele Melati, Tsui-wei weng, luca daniel, and Andrea Melloni.Generalized polynomial chaos expansion for photonic circuits optimization.URL https://ieeexplore.ieee.org/document/7718520. → pages 64, 6571

Cite

Citation Scheme:

        

Citations by CSL (citeproc-js)

Usage Statistics

Share

Embed

Customize your widget with the following options, then copy and paste the code below into the HTML of your page to embed this item in your website.
                        
                            <div id="ubcOpenCollectionsWidgetDisplay">
                            <script id="ubcOpenCollectionsWidget"
                            src="{[{embed.src}]}"
                            data-item="{[{embed.item}]}"
                            data-collection="{[{embed.collection}]}"
                            data-metadata="{[{embed.showMetadata}]}"
                            data-width="{[{embed.width}]}"
                            data-media="{[{embed.selectedMedia}]}"
                            async >
                            </script>
                            </div>
                        
                    
IIIF logo Our image viewer uses the IIIF 2.0 standard. To load this item in other compatible viewers, use this url:
https://iiif.library.ubc.ca/presentation/dsp.24.1-0387286/manifest

Comment

Related Items