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Power line communications in vehicles : channel measurements and impedance matching networks TaheriNejad, Nima 2015

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Power line communications in vehicles:Channel measurements and impedancematching networksbyNima TaheriNejadB.Sc., University of Mazandaran - Nushirvani, 2007M.Sc., Iran University of Science and Technology, 2009A THESIS SUBMITTED IN PARTIAL FULFILLMENT OFTHE REQUIREMENTS FOR THE DEGREE OFDOCTOR OF PHILOSOPHYinThe Faculty of Graduate and Postdoctoral Studies(Electrical and Computer Engineering)THE UNIVERSITY OF BRITISH COLUMBIA(Vancouver)April 2015c© Nima TaheriNejad 2015AbstractIn today’s Electric Vehicles (EVs) and conventional Combustion Engine Ve-hicles (CEVs), data communication between electronic control units is ac-complished by sending communication signals over dedicated wires. Thespace requirement, weight, and installation costs for these wires can becomesignificant, especially in electric vehicles of the future, which are highlysophisticated electronic systems. This has motivated research and develop-ment activities in the area of Vehicular Power Line Communication (VPLC).VPLC systems reuse power wires inside a vehicle for data communicationpurposes. Thus, they eliminate the need for extra wires dedicated to com-munication.However, there are several impediments to overcome in order to achievea reliable and robust VPLC. Many of these challenges originate from in-herent properties of current wirings in vehicles, which are not designed withcommunication in mind. Therefore, to develop suitable data transmissionequipments, a good understanding of the communication channel character-istics is essential.Considering the importance of proper characterization as a first step to-wards the design and deployment of VPLC systems, in this work, we havetried to contribute to the available body of knowledge on channel character-iiAbstractization for VPLC in EVs and CEVs. As tangible contributions, we presentmethodology and results of two measurement campaigns in this thesis. Themain outcomes of this part of our research are quantitative statements aboutChannel Transfer Functions and Access Impedance for two vehicles and dis-cussions of our results in the context of VPLC system design.Building on the results of these measurements, an adaptive impedancematching system is designed to improve the power transmission betweenVPLC devices and the vehicular power line network, and consequently im-prove the Signal-to-Noise Ratio (SNR) of the communication system. Theadaptive impedance matching system is first behaviorally described in VHDL-AMS and simulated using CadenceTM and then for each unit a circuit de-sign compatible for implementation on an Integrated Circuit (IC) platformis suggested.Tested against the challenges of VPLC observed in our measurementcampaigns, the proposed system proved to be capable of significantly im-proving the reliability of communication over power wires in vehicle.iiiPrefaceThe content presented in this thesis is the outcome of research performedby myself, Nima TaheriNejad, as the principal contributor. My researchhas been co-supervised by Professor Shahriar Mirabbasi and Professor LutzLampe.Dr. Roberto Rosales provided technical and editorial support for thework presented in Chapter 1 and 2.Parts of Chapter 4 have benefited fromsome technical and editorial assistance by Mr. Mohammad Beikahmadi andMr. Ahmadreza Farsaei.I have also collaborated with Dr. Zhengguo Sheng, Mr. Amir Kenarsari-Anhari and Professor Victor C. M. Leung in preparing the manuscript “AMulti-channel Medium Access Control Protocol for Vehicular Power LineCommunication Systems”. The respective contribution, even though notappearing directly in the text of this thesis, was a result of my researchpresented in Chapter 1 and Chapter 2.PublicationsThe following is a list of articles published or submitted for publication asa result of the research presented in this thesis.ivPublicationsJournal Papers1. Z. Sheng, A. Kenarsari-Anhari, N. Taherinejad, V. C. M. Leung. “AMulti-channel Medium Access Control Protocol for Vehicular PowerLine Communication Systems”. Accepted for publication in IEEETransaction on Vehicular Technology. (Chapter 1 and Chapter 2).2. N. Taherinejad, L. Lampe, and S. Mirabbasi. “An Adaptive ImpedanceMatching System for Vehicular Power Line Communication”. Submit-ted. (Chapter 3).Conference Papers1. N. Taherinejad, R. Rosales, S. Mirabbasi, and L. Lampe. “A studyon access impedance for vehicular power line communications”. InIEEE International Symposium on Power Line Communications andIts Applications (ISPLC), pages 440-445, Udine, Italy, April 2011.(Chapter 2).2. N. Taherinejad, R. Rosales, L. Lampe, and S. Mirabbasi. “Chan-nel characterization for power line communication in a hybrid electricvehicle”. In IEEE International Symposium on Power Line Communi-cations and Its Applications (ISPLC), pages 328-333, Beijing, China,2012. (Chapter 2).3. N. Taherinejad, R. Rosales, L. Lampe, and S. Mirabbasi. “On thedesign of impedance matching circuits for vehicular power line com-munication systems”. In IEEE International Symposium on PowervPublicationsLine Communications and Its Applications (ISPLC), pages 322-327,Beijing, China, 2012. (Chapter 3 and Chapter 4).4. N. Taherinejad, L. Lampe, and S. Mirabbasi. “Adaptive impedancematching for vehicular power line communication systems”. In IEEEInternational Symposium on Power Line Communications and its Ap-plications (ISPLC), pages 214-219, Glasgow, Scotland, March 2014.(Chapter 3).viTable of ContentsAbstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iiPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ivTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . viiList of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiList of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiiiGlossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxi1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 Objectives of the Thesis . . . . . . . . . . . . . . . . . . . . . 31.2 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.2.1 Wiring Harness . . . . . . . . . . . . . . . . . . . . . 41.2.2 VPLC Characterization Measurements . . . . . . . . 71.2.3 Impedance Matching and SNR Matching . . . . . . . 111.2.4 Impedance Matching Classification . . . . . . . . . . 141.2.5 Impedance Matching in PLC . . . . . . . . . . . . . . 171.2.6 A Note on Electromagnetic Compatibility . . . . . . 23viiTable of Contents1.3 Main Contributions of the Thesis . . . . . . . . . . . . . . . 251.4 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . 262 Medium Characterization . . . . . . . . . . . . . . . . . . . . 282.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 282.2 Characterization of Internal Combustion Engine Vehicle - Pon-tiac Solstice 2006 . . . . . . . . . . . . . . . . . . . . . . . . 302.2.1 Battery and Load Measurement . . . . . . . . . . . . 312.2.2 Access Impedance . . . . . . . . . . . . . . . . . . . . 352.2.3 Discussion . . . . . . . . . . . . . . . . . . . . . . . . 432.3 Characterization of Azure Dynamics BalanceTM Hybrid Elec-tric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452.3.1 Measurement Setup . . . . . . . . . . . . . . . . . . . 462.3.2 Results and Discussion . . . . . . . . . . . . . . . . . 522.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 633 Interface Design - System Level . . . . . . . . . . . . . . . . . 663.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 663.2 Our Approach to Matching Problem . . . . . . . . . . . . . . 673.2.1 Impedance Matching at One End . . . . . . . . . . . 683.2.2 Impedance Matching at Both Ends . . . . . . . . . . 723.3 System Design . . . . . . . . . . . . . . . . . . . . . . . . . . 743.3.1 Basic Structure and Operation . . . . . . . . . . . . . 743.3.2 Measurement Unit . . . . . . . . . . . . . . . . . . . . 763.3.3 Matching Unit . . . . . . . . . . . . . . . . . . . . . . 793.3.4 Control Unit . . . . . . . . . . . . . . . . . . . . . . . 80viiiTable of Contents3.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . 853.4.1 Test Parameters . . . . . . . . . . . . . . . . . . . . . 863.4.2 Time-Domain Illustration of Matching . . . . . . . . 873.4.3 Transmitter-side Matching . . . . . . . . . . . . . . . 903.4.4 Receiver-side Matching . . . . . . . . . . . . . . . . . 943.4.5 Matching at Both Ends of the Communication Link . 943.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 984 Interface Design - Suggestions for Circuit Blocks . . . . . . 1004.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004.2 Op-Amp Design . . . . . . . . . . . . . . . . . . . . . . . . . 1014.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . 1024.2.2 Proposed Compensation Technique . . . . . . . . . . 1044.2.3 Simulation Results . . . . . . . . . . . . . . . . . . . . 1084.2.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . 1114.3 Measurement Unit . . . . . . . . . . . . . . . . . . . . . . . . 1124.3.1 Sensing Unit . . . . . . . . . . . . . . . . . . . . . . . 1124.3.2 Interpretation Unit . . . . . . . . . . . . . . . . . . . 1144.4 Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . 1184.5 Matching Unit . . . . . . . . . . . . . . . . . . . . . . . . . . 1204.5.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 1224.5.2 Capacitor Bank . . . . . . . . . . . . . . . . . . . . . 1244.5.3 Inductor Bank . . . . . . . . . . . . . . . . . . . . . . 1274.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137ixTable of Contents5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1395.1 Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . 142Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144xList of Tables1.1 List of links including communication wires, their estimatedlength and respective number/size of wirings. . . . . . . . . . 51.2 Summary of length and weight of communication cables incurrent technology. . . . . . . . . . . . . . . . . . . . . . . . . 71.3 Classification of impedance matching solutions - Overview . . 171.4 Compilation of some of the related works in literature - Overview 232.1 Measurement Results for Load Impedances in ICE vehicleunder the test . . . . . . . . . . . . . . . . . . . . . . . . . . . 352.2 Ports at which VNA measurements were performed. Vehiclestate: O=off, IG=ignition, ID=idle, S=wheels spinning. . . . 493.1 Combination of elements for the matching circuit to achievematching if network access impedance is in different regionsof the Smith chart shown in Fig. 3.1. . . . . . . . . . . . . . . 713.2 Effect of termination at one end of a VPLC link on the otherend for several measured links. Average (Avg.) and Maxi-mum (Max.) change for seven termination impedances. . . . 74xiList of Tables3.3 Logic to determine location of impedance in the Smith chartbased on the measured variables. . . . . . . . . . . . . . . . . 823.4 Logic table for the switches in the matching unit of the trans-mitter and the receiver side. The bit stream represents thestatus of switches in following order from MSB to LSB: SLSw,SLIn, SLCp, SMIn, SMCp, SRIn, SRCp, SRSw. “0” representsthe open-circuit state of the switch, “1” is the short-circuitstate, and “X” represents the “Don’t care” state. . . . . . . 833.5 Parameters for bandwidth simulations. . . . . . . . . . . . . . 884.1 Op-Amp compensation schemes comparison . . . . . . . . . . 1114.2 Maximum value of capacitance and inductance needed foreach element of matching unit, in order to match the wholerange of access impedance variation depicted in Fig. 4.12.Frequency range of operation is considered to be between 1to 100MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1234.3 Width and length of transistors. . . . . . . . . . . . . . . . . 1334.4 Active inductors; inductance, range of operation, their seriesresistance and power consumption. . . . . . . . . . . . . . . . 135xiiList of Figures1.1 Harness Layout of Ford Focus 2011. Blueprint obtained from[32] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81.2 Reported Frequency Bands for VPLC application. . . . . . . 101.3 Connection of a transmitter and receiver to a two port net-work via impedance matching blocks. At the transmitter side,the access impedance seen at the network, namely Zacc(Tx),is transferred to complex conjugate of the impedance of thetransmitter, Zg. At the receiver side, the impedance of re-ceiver, Zl, is transferred to complex conjugate of the accessimpedance seen at the network, Zacc(Rx). . . . . . . . . . . . 151.4 VCGIC used in [25] to provide necessary variable inductor formatching circuit. . . . . . . . . . . . . . . . . . . . . . . . . . 191.5 Power transfer gain between modem and power line networkwith (blue solid line) and without (black dashed line) wide-band equalizer. Results taken from [29, Fig. 5] . . . . . . . . 222.1 Microstrip PCB interface for 1-Port VNA measurements ofthe car battery. . . . . . . . . . . . . . . . . . . . . . . . . . . 322.2 Resistive part of the internal impedance of the battery. . . . . 33xiiiList of Figures2.3 Inductive part of the internal impedance of the battery. . . . 332.4 Lamp inductances: Measured (solid) and Fitted Curve (dashed). 362.5 Circuit schematic of calculating access impedance, Zacc. . . . 372.6 Measured Network Input Impedances ZNWK at Rear, Front,and Trunk lamp access nodes while turned ON. . . . . . . . . 392.7 Measured Network Input Impedances ZNWK at Rear andFront lamp access nodes while turned OFF. . . . . . . . . . . 402.8 Measured Network Input Impedances ZNWK at CigaretteLighter (thin black line) and Battery (bold blue line). . . . . 412.9 Calculated Access Input Impedances Zacc at Rear, Front, andTrunk lamp access nodes while turned ON. . . . . . . . . . . 422.10 Imaginary Part of Calculated Access Input Reactance Rear and Front lamp access nodes while turned OFF. . . . 432.11 Electric diagram of the selected access points and their con-nection to the 12V battery. . . . . . . . . . . . . . . . . . . . 462.12 Adapters for channel measurements. Left: TMDMOC. Right:VCU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512.13 Top: Vehicular PLC as two-port network. Bottom: Equiva-lent model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522.14 Magnitude of S21(f) as function of frequency f for connec-tions from VCU. . . . . . . . . . . . . . . . . . . . . . . . . . 542.15 Magnitude of S21(f) as function of frequency f for connec-tions from DC/DC converter. . . . . . . . . . . . . . . . . . 56xivList of Figures2.16 Magnitude of S21(f) as function of frequency f for VCU-TMDMOC connection in different vehicle states: vehicle off(“off”) and ignition switch on (“ignition”). . . . . . . . . . . 572.17 Magnitude of S21(f) as function of frequency f for VCU-TMDMOC and VCU-DC/DC connections in different vehi-cle states: vehicle off (“off”), ignition switch on (“ignition”),combustion engine idling (“idle, comb.”). . . . . . . . . . . . 592.18 Magnitude of S21(f) as a function of frequency, f , for VCU-TMDMOC and VCU-DC/DC connections in different vehiclestates: vehicle off (“off”) and wheels spinning in electricalmode on a dynamo meter (“spinning, elect.”). . . . . . . . . 602.19 Measured access impedances Zacc for different vehicle states.Top: real part, Bottom: imaginary part. Solid lines are forvehicle off state, dotted lines for ignition on, dashed for com-bustion engine idling, and dash-dot for state of wheels spin-ning in electrical mode on a dynamo-meter. . . . . . . . . . . 622.20 Smith chart illustration of access impedance ranges accord-ing to measurement results. Colored areas: Green: reducedfrequency range of 30-40MHz. Green and yellow: averageimpedance values in the frequency range from 100 kHz to100 MHz. Green-yellow-black: complete range of measuredresults. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63xvList of Figures3.1 Matching problem demonstrated in the Smith chart. From agiven impedance, point A, to the desired impedance, point B,there are several paths which could be implemented througha matching circuit. Two sample paths are traced. . . . . . . . 693.2 Smith chart divided into eight regions in order to categorizedifferent movements. . . . . . . . . . . . . . . . . . . . . . . . 703.3 Block diagram of the proposed adaptive impedance matchingsystem for the transmitter and receiver side. Zt and Zn arethe source impedance at the transmitter and network accessimpedance seen from the receiver, respectively. Z∗t and Z∗nindicate the desired impedance matching at the transmitterand receiver, respectively. . . . . . . . . . . . . . . . . . . . . 763.4 Block diagram of the measurement unit consisting of the sens-ing and interpretation units. . . . . . . . . . . . . . . . . . . . 773.5 Circuit-level block diagram of the sensing unit. . . . . . . . . 783.6 Envelop detecting circuit used in the interpretation unit. Forthis work the values were selected as Rf = 1 kΩ and Cf =1.4 pF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 783.7 Second order low-pass RC filter for providing active powermeasurement Pact. For this work the values were selected asRfil = 10 kΩ and Cfil = 6 pF. . . . . . . . . . . . . . . . . . . 793.8 The circuit used to discern capacitive versus inductive loadsbased on zero crossings. The output is “1” if the load iscapacitive and “0” if inductive. . . . . . . . . . . . . . . . . . 793.9 Circuit structure of the matching unit (see Fig. 3.3). . . . . 80xviList of Figures3.10 Illustration of matching an impedance at point A in the Smithchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 843.11 Colored area shows the access impedance range for VPLCapplications for frequencies between 1-100 MHz presented inChapter 2 and each dot represents a test point. The valueson the chart are normalized to 50 Ω. . . . . . . . . . . . . . 873.12 Illustration of impedance matching considering instantaneouspower Ps(t) from the source into the network with an accessimpedance of 10 Ω (top) and (75− j175) Ω (bottom), respec-tively. Impedance matching is activated at t = 150 ns. . . . 893.13 Illustration of transmitter-side and receiver-side matching forVCU-DC/DC link. Curves are the power received at the re-ceiver side of the communication link. Transmitter performsmatching at t = 1 µs (left subplot). Receiver sends a testsignal at t = 2 µs to perform matching, which happens att = 3.2 µs (middle sub-plot). Finally, at t = 4 µs, the systemgoes into the data-transmission mode (right sub-plot). . . . 903.14 Normalized active power transferred into the network as afunction of frequency with (solid lines) and without (dashedlines) transmitter-side impedance matching for different ac-cess impedances. Top: inductive access impedance. Bottom:purely resistive access impedance. . . . . . . . . . . . . . . . 913.15 Normalized active power transferred into the network as afunction of resistance for purely resistive access impedance.Frequency fc = 50 MHz. . . . . . . . . . . . . . . . . . . . . . 92xviiList of Figures3.16 Normalized active power transferred into the network as afunction of frequency with (solid lines) and without (dashedlines) transmitter-side impedance matching. Bandwidth re-sults of the impedance matching for the test cases specifiedin Table 3.5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 933.17 Normalized active power extracted from the network withand without adaptive impedance matching at the receiverside. Top: Different capacitive access impedance, results with(solid lines) and without (dashed lines) receiver-side match-ing as a function of frequency. Bottom: Performance as afunction of resistance for a purely resistive access impedanceand fc = 50 MHz. . . . . . . . . . . . . . . . . . . . . . . . . 953.18 Active power at the receiver as a function of frequency with(solid lines) and without (dashed lines) impedance matchingfor four different communication links. In all cases transmit-ter is a voltage source with an amplitude of 50 mV and bothtransmitter and receiver have a 50 Ω resistance. . . . . . . . . 963.19 Active power at the receiver as a function of frequency with(solid lines) and without (dashed line) impedance match-ing for the Bat-Tail-R link. Transmitter-side matching (“Txonly”), receiver-side matching (“Rx-only”), and concurrenttransmitter- and receiver-side matching (“TRx Matching”)are considered. In all cases transmitter is a voltage sourcewith an amplitude of 50 mV and both transmitter and re-ceiver have 50 Ω resistance. . . . . . . . . . . . . . . . . . . . 96xviiiList of Figures3.20 Active power transferred from the transmitter to the receiveras a function of frequency with (solid lines) and without(dashed line) impedance matching for the Bat-Front-L link.Matching is adjusted at the frequency points fc = {12, 23, 45, 78}MHz.In all cases transmitter is a voltage source with an amplitudeof 50 mV and both transmitter and receiver have 50 Ω resis-tance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 974.1 Generic two-stage Complimentary Metal-Oxide Semiconduc-tor (CMOS) Op-Amp circuits with: (a) conventional Millercompensation technique and (b) proposed compensation tech-nique. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1024.2 Power Supply Rejection Ratio (PSRR) analysis of the pro-posed two-stage CMOS Op-Amp; (a) small-signal model ofthe first stage, (b) simplified model of the first stage, (c)& (d) (e) effect of perturbations in positive power supplythrough first stage, compensation branch and output stage,respectively (used for the purpose of superposition). . . . . . 1074.3 Frequency response simulation results of the circuits understudy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1094.4 Noise seen at the output originated from positive supply forthe circuits under study. . . . . . . . . . . . . . . . . . . . . . 1104.5 Circuit design suggested for a more precise implementationas Integrated Circuit. . . . . . . . . . . . . . . . . . . . . . . . 113xixList of Figures4.6 Circuit design suggested for rectification and detection of theenvelope of voltage and currents measured. . . . . . . . . . . 1154.7 Analog Multiplier circuit with differential output; input con-nections adapted to accommodate single-ended input signals. 1164.8 Analog differential amplifier circuit which turns the differen-tial input to single-ended output by the way of subtraction. . 1164.9 The circuit design suggested to discern capacitive versus in-ductive loads based on zero crossing. The output is “1” if theload is capacitive and “0” if inductive. . . . . . . . . . . . . . 1174.10 Analog adder circuit using operational amplifier. . . . . . . . 1194.11 Circuit topology of element banks for a 4 bit controller. Ele-ments are set to grow with a factor of 2(i−1) to accommodatedigital binary input. . . . . . . . . . . . . . . . . . . . . . . . 1214.12 Range of access impedances considered for adaptive matchingby the proposed system. (a) Colored area: Full range accord-ing to our measurement campaigns. (b) Green area: Reducedarea to relieve inductance requirements. . . . . . . . . . . . . 1234.13 Floating GIC structure proposed by Ndjountche et. al. [77]. . 1264.14 Proposed active inductor circuit. . . . . . . . . . . . . . . . . 1314.15 Schematic of the simulated active inductor . . . . . . . . . . . 1324.16 Proposed active inductor; Effect of the capacitance C on theequivalent inductance and series resistance. . . . . . . . . . . 1344.17 Proposed active inductor with additional negative resistance;Effect of the capacitance C on the equivalent inductance andseries resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 134xxGlossaryAC Alternating CurrentABS Anti-lock Breaking SystemADC Analog-to-Digital ConverterAZD Azure Dynamics CorporationCAN Control Area NetworkCCII Current Conveyor - 2nd generationCEV Combustion Engine VehicleCISPR Comite´ International Spe´cial des Perturbations Radioe´lectriques(Special International Committee on Radio Interference)CMOS Complimentary Metal-Oxide SemiconductorDC Direct CurrentDVCC Differential Voltage Current ConveyorEMC ElectroMagnetic CompatibilityEV Electric VehiclexxiGlossaryESS Energy Storage SystemGIC General Impedance ConverterHEV Hybrid Electric VehicleIC Integrated CircuitICE Internal Combustion EngineISO International Standards OrganizationLIN Local Interconnect NetworkLSB Least-Significant BitM-PSO Meta-Particle Swarm OptimizationMOS Metal Oxide SemiconductorMSB Most-Significant Bitop-amp Operational AmplifierPCB Printed-Circuit BoardPSD Power Spectral DensityPLC Power Line CommunicationPSRR Power Supply Rejection RatioRF Radio FrequencyRHP Right-Half PlanexxiiGlossarySMA Sub-Miniature version ASNR Signal-to-Noise RatioSoC System on ChipTF Transfer FunctionTMDMOC Traction Motor Digital MOdule ControllerUGB Unity Gain BandwidthVCGIC Voltage Controlled General Impedance ConverterVCU Vehicle Control UnitVNA Vector Network AnalyzerVPLC Vehicular Power Line CommunicationxxiiiChapter 1IntroductionPower Line Communication (PLC) has been widely applied over the elec-tricity distribution grid. Re-using PLC infrastructure, i.e., power cables andwires, for data-communication purposes, enables application such as auto-matic meter reading and home automation and entertainment [1]. The firstdevelopments of PLC technology go back to the early 1900s, where it hasbeen used by electricity utilities for voice communications and automationand control [2]. Nevertheless, it has only gained broader public attentionwith the introduction of broadband communication over power lines in the1990s [1, 3].Recently, electronics has become one of the most important componentsin modern vehicles, and since every network node that communicates datawith other nodes is connected to the Direct Current (DC) power supplyof the vehicle, PLC is being investigated as a solution for communicationinside vehicles as well. It is estimated that some 2 billion nodes per yearare connected in car electronic networks currently [4]. This trend demon-strates the importance and the need for efficient automotive communicationnetworking to accommodate the intra-vehicle information flow.In particular, the promises of Vehicular Power Line Communication1Chapter 1. Introduction(VPLC) are reduction in cost, complexity, and weight of the wiring har-ness, as well as fast installation and easy retrofitting. These advantagesare even more pronounced in EVs, since compared to conventional InternalCombustion Engine (ICE) vehicles, additional communication for power andbattery management is required. While PLC can replace wires, it can alsobe used as an independent and redundant communication bus, without anywiring overhead, to reduce failure risks and support “X-by-wire” concepts[5].Vehicular power line communication is not a new concept and some earlyworks include, for example, [6–8]. Furthermore, there is a sizable body ofrecent literature reporting measurement results for channel transmission andnoise characterization for VPLC, e.g., [9–16]. The literature on VPLC forEVs, however, is more sparse. Barmada et al. [17, 18] present results from ameasurement campaign on a fully electric vehicle, namely a Piaggio Porter.Bassi et al. [19] discuss requirements of VPLC for EVs and show preliminarylaboratory measurement results using proprietary DCB500 transceivers [20].Most recent campaigns include, measurements of Antoniali et al. [21] on anItalian compact electric car, namely Biro, and measurement results of aHybrid Electric Vehicle (HEV) published by Takanashi et al. [22].Research results existing in the literature as well as studies performed inour group, demonstrate that to communicate reliably and efficiently overpower lines several challenges need to be overcome [11, 12, 17, 23, 24].This includes frequency selectivity of the transmission channel caused byimpedance mismatches in the wiring harness and impulsive noise that isintroduced by electrical components connected to the harness. Another21.1. Objectives of the Thesischaracteristic of the power line medium as a communication channel isthe time and frequency selective network impedance at different accesspoints, e.g., [1, Ch. 4], [15, 25]. Impedance mismatch can degrade Signal-to-Noise Ratio (SNR) and therefore affect communication reliability betweentransceivers. Hence, impedance matching to improve the efficiency of trans-mission/reception of signal into/from power lines becomes an appealing con-cept. While different approaches and aspects of impedance matching havebeen studied in the literature, e.g., [1, Ch. 4], [26–31], frequency and timedependency of access impedance, which renders fixed matching circuits in-efficient and necessitates adaptive impedance matching, are often not con-sidered or discussed in detail [25].1.1 Objectives of the ThesisThe main objectives of this thesis are:• to provide a deeper understanding of channel characteristics of powerlines in vehicles.• to supply detailed data necessary to develop an efficient system forcoupling communication devices to the power lines in vehicles.• to develop an efficient interface system for coupling communicationdevices to power line in vehicles, capable of accommodating potentialchanges in channel properties.• to equip circuit designers with a vantage by providing lead suggestionsappropriate for on-chip implementation of the coupling system.31.2. BackgroundIn the following chapters, we will address these objectives through present-ing results from our measurement campaigns and deriving a matching sys-tem design and its associated circuit components. Before this, we proceedwith providing additional background information concerning characteristicmeasurements, impedance matching in general and impedance matching forVPLC.1.2 BackgroundIn this section, we first analyze the wiring harness of a typical vehicle to havea better understanding of the size of the problem at hand. Then, we presentsome of the parameters that should to be considered for running measure-ment campaigns. Afterwards, we discuss the general concept of impedancematching and how it can improve the quality and reliability of communi-cation. Next, we study various aspects of impedance matching which cancategorize impedance matching solutions into different classes. Finally, weconclude this section with a note on ElectroMagnetic Compatibility (EMC)in PLC.1.2.1 Wiring HarnessEven though the importance of PLC and the advantages of using it in ve-hicles is an established fact in the literature, to the best of the author’sknowledge, there has been no report in the literature presenting a detailedaccount of what amount of wiring could be saved by using VPLC. Therefore,to have a better understanding of the size of the problem and the potential41.2. BackgroundTable 1.1: List of links including communication wires, their estimatedlength and respective number/size of wirings.Link/Bundle Estimated Lengthof the Link [m]Average Numberof Comm. WiresAverage Size ofWires [mm2]14K733 9.7 2 0.7514401 2.7 3 0.514014 9.8 13 0.515K868 1.3 1 0.514335 3.4 5 0.3514K138 1 17 0.514A584 1 12 0.353C221 0.3 1 0.514B723 0.5 1 0.512C508 1.1 8 0.512A690 1.8 3 0.5F221095 0.6 8 0.3514240 1.2 4 0.515K857 0.7 1 0.514180 0.4 1 0.3517N400 1.6 5 0.514K155 0.6 1 0.52C055 0.7 1 0.514A107 0.8 3 0.7515K867 1.9 1 0.514D466 1 3 0.5improvement as a result of using VPLC, a typical car -namely a Ford Focus-was chosen as a representative example and its harness was studied in detail.To extract the length and weight information for the wiring, the followingsteps were taken.1. The first step for estimating the communication wires was to determinethe links, i.e. wire bundles, which include communication wires (forControl Area Network (CAN), Local Interconnect Network (LIN) or51.2. Backgroundboth). This was done by studying all different connections in the carusing the blueprint obtained from [32]. Table 1.1 shows the list ofthese links.2. After preparing the list of wire bundles including a communicationcable, their length was estimated as reported in Table 1.1- using theharness layout in the blueprint (shown in Fig. 1.1) and scaled to theactual size of the car taken from the Ford website [33]. The extractedlength for the communication part of the wiring harness (excludingthe parts with only power wiring in the harness) was estimated to be42.1 meters.3. To estimate the total length of the communication wires in the bundle,it was necessary to know the number of wires in each bundle. However,not all the wires in the bundle travel all the way from the beginningto the end of the bundle. Therefore based on the number of communi-cation wires in the various connectors attached to the link, an averagenumber of communication wires for each bundle was estimated. Thesum of the products of each bundle length and its relevant number ofwires gives us the total length of these wires which was calculated tobe 244.9 meters.4. To find out the copper weight of the communication wires, the size ofthe wires were needed. However, as before, since there exists a varietyof wiring sizes in each bundle and they do not necessarily travel thesame length, an estimation based on the number of wires of each sizewas considered for that link (shown in Table 1.1). Hence, the total61.2. BackgroundTable 1.2: Summary of length and weight of communication cables in currenttechnology.Comm.HarnessLength [m]EstimatedWireLength [m]CopperWeight [gr]CablingWeight [gr]Comm. WireProperties42.1 244.9 1235.1 1893.1weight of copper was calculated to be 1.2 kg.5. To obtain the weight of communication cables, in other words copperand insulation combined, the cabling weight profile from [34] was usedand based on the nominal size of each wire and the relative weight perlength, the total weight of that link was calculated. Hence, the sumof the weight of communication wires was calculated to be 1.9 kg.Table 1.2, summarizes associated lengths and weights calculated basedon the described method.1.2.2 VPLC Characterization MeasurementsAs mentioned in previous sections, several groups have been working ondifferent aspects of VPLC channel measurements and characterizations, e.g.[9–16, 21]. Although there have been studies on implementing a toy-networkin the lab set-up [35] in order to simulate the car network, the majority ofstudies are dedicated to measuring the actual internal power network of thecar intact. One of the main reasons here is the complexity of simulatingthe vehicle set-up in a laboratory. The principal difficulty is associated withchassis which acts as the return/ground path for the signal.71.2. BackgroundFigure 1.1: Harness Layout of Ford Focus 2011. Blueprint obtained from[32]Measurements in different vehicles lead to different results in term ofchannel properties, however, they still help in obtaining a big-picture overviewof some general properties of the channel like frequency selectivity and at-tenuation range, as well as possible sources of noise and their characteristics.Some of the main identifying parameters in a measurement are:• Topology of access points. From a system point of view, the need forcommunication at different access points renders one access point, andconsequently its respective measurements data, more important or lessimportant, compared to other access points. From a circuit point ofview, the electrical properties of the channel is dependent on the topol-81.2. Backgroundogy of the wiring harness and the electrical paths between the accesspoints. Specially the network access impedance varies considerablyfrom one access point to another. Eventually, from a practical pointof view, a physical access to the measurement point should be feasible,and if a user-end device is supposed to connect to the access point, itshould be easily accessible to the user.• Loading/unloading access points. In many measurement campaigns,to access the measurement points, the loads are disconnected. Of-ten the effect of loads on the access point properties are not properlyconsidered because of missing stand-alone load measurements in theliterature. Several work groups assume rather non-realistic values forload impedance and some have totally dismissed their effect. How-ever, it should be emphasized that regarding their proximity to theaccess point, properties of loads have a significant impact on the over-all characteristic of the channel seen from the access point, and shouldbe considered in characterizations.• Vehicle state (off, on, idle, moving). Since at different vehicle states,different switches and loads are on and off, they can change the chan-nel properties to some extent. Also some apparatus of a vehicle whichimpose noise on the network are intact only when the vehicle is in acertain state, e.g. Anti-lock Breaking System (ABS) acts only whenvehicle is moving. Therefore it is important to perform characteriza-tion measurements under various vehicle states.• Frequency range of measurements. Center frequency and bandwidthof a communication device is one of the major identifying properties.91.2. Background[20][36][9][37][8][37][38][12][39]Figure 1.2: Reported Frequency Bands for VPLC application.To design and perform properly at certain frequencies and bandwidth,proper measurements at those frequency ranges are essential. To ex-tract a reasonable frequency range for our measurements, differentVPLC application reports, including commercial products, test bedsand research studies, have been reviewed. The results are depicted inFig. 1.2. To provide results relevant and applicable to the wide rangeof frequency bands envisaged for VPLC, frequency range of 100 kHzto 100 MHz appeared suitable.Despite a relatively good literature [9–15] for channel Transfer Function(TF) and noise measurements in ICEs, the literature on Access Impedancemeasurement is sparse. For instance, the reader can refer to [10] as one ofthe few works regarding this aspect. Furthermore, for EVs and HEVs, dueto their relatively recent popularity, there have only been few measurementstudies in characterizing TFs, noise and access impedance measurements.For example [18, 19, 21, 22] are among the few works in this regard. There-101.2. Backgroundfore with our measurement campaign we aim to contribute in expanding theliterature on this subject.1.2.3 Impedance Matching and SNR MatchingWe now turn to the problem of impedance matching and start with a dis-cussion of the basic objectives of matching. A power source is able to deliverits maximum power only if the impedance seen at its ports is the complexconjugate of its internal output impedance. A similar statement holds for aload to be able to receive the maximum power through its ports.In the context of VPLC, at the transmitter node the load is the powernetwork and its The`venin/Norton equivalent impedance is considered asthe load for the transmitter which should be complex conjugate matchedto the source internal impedance (conventionally considered to be 50Ω).At the receiver node, the load is the receiver’s input impedance (which isconventionally designed to be 50Ω) and the The`venin/Norton equivalentimpedance of the network is what should be complex conjugate matchedto the receiver’s input impedance. It should be kept in mind nevertheless,that the main objective of a communication system is to optimize the SNRrather than merely optimizing the power transfer.Therefore, what we are interested in is the SNR,SNR = PSignalPNoise, (1.1)at the output of the network, or equivalently, at the input of the receiver111.2. Backgrounddevice. In (1.1), for the VPLC case at hand,PSignal = PTx · CMTx · TFTRx · CMRx, (1.2)where PTx is the available power at the transmitter, CMTx and CMRx arecoefficients representing the effect of matching at transmitter and receiverrespectively, and TFTRx is the gain of transfer function between transmitterand receiver.Considering the nature of noise, PNoise can be divided into two differentgroups: active noise or interference caused by active devices connected tothe network (Pact), and passive or resistive noise caused by resistive elementsin the network (Pres).Considering the source of noise, PNoise can be divided into three differentgroups: Pi,Tx, Pi,Rx, and Pi,Nt, representing the noise contribution of thetransmitter, receiver and network respectively, where i could be replacedby act or res accordingly. The contribution of all these noise sources to theoverall PNoise is dependent on the impedance seen at the receiver’s port andtherefore matching at the receiver side.The noises generated at the transmitter side, similar to the signal willundergo the same attenuation coefficients. In other words,Pi,Tx = Pact,Tx ·CMTx ·TFTRx ·CMRx +Pres,Tx ·CMTx ·TFTRx ·CMRx. (1.3)Therefore, whereas matching at the transmitter also increases the noisetransfer, we expect that attenuation due to the channel, renders transmitter-121.2. Backgroundside noise insignificant compared to other noise sources contributing toPNoise. Hence, transmitter matching can only improve the SNR.Regarding the effect of matching at the receiver side and its effect onSNR, Antoniali et al. [40] present a study on the optimal impedance formaximization of the SNR for in-home power line networks. The authorselaborate on the effect of the impedance of the receiver on the noise receivedfrom both active and resistive noise sources. They show that power matchingmay contribute to increased noise level, and consequently decrease the SNR.By incorporating noise formulas in (1.1), Antoniali et al.[40] obtain anexpression for the SNR, as a function of receiver impedance. This leadsto a non-convex optimization problem, which is solved numerically, usingthe measurement results of their campaigns for in-home PLC networks.The results show that, statistically, power matching, i.e., complex conju-gate impedance matching, does not always lead to an optimum SNR for theset of in-home networks under study. The imaginary part of the complexconjugate matching impedance however, closely follows the imaginary partobtained for the optimum SNR in their study. According to this study,the achievable rate improvements using optimum SNR matching instead ofpower matching is quite significant. While the former achieves gains betweenabout 5%-25% over non-matched reception, the gains reported for the latterare between about 1%-10%. Given the general similarities of in-home andin-vehicle networks, we suspect a similar outcome for a VPLC network.It should be kept in mind however, that implementing the solution sug-gested by Antoniali et al.[40] needs network knowledge and an exhaustivesearch for the optimal receiver-impedance. Therefore, implementation of131.2. Backgroundsuch solution is practically impossible for on-line SNR optimization. On theother hand, performing power matching at both ends of the communicationsystem, as it will be discussed in Chapter 3, is well feasible in a fashionsuitable for integrated system implementation. Therefore, even though sub-optimal to SNR matching, in this thesis we pursue power matching, i.e.complex conjugate matching, as the objective of our interface system de-sign.Complex conjugate matching usually happens between the transmitterand network or the network and the receiver. Particularly, this is the case forVPLC application where the network equivalent impedance (a.k.a. accessimpedance) is varying with time as well as location of access. Hence, asillustrated in Fig. 1.3, to maximize efficiency of power delivery, an impedancematching circuit is needed to transfer the access impedance to a matchedimpedance at the ports of transmitter and receiver.To design the impedance matching circuit without power loss, circuitsbased on loss-less passive elements (either lumped elements such as inductorsand capacitors or distributed elements such as transmission lines) are amongthe most popular impedance matching solutions, cf. e.g. [31], [41, Ch. 5],[42,43].In the next section, different aspects of impedance matching and theirrespective classes will be introduced and studied.1.2.4 Impedance Matching ClassificationImpedance matching solutions can be classified into different categories.141.2. BackgroundTxImpedance Matching CircuitNetwork RxImpedance Matching CircuitZgZlZg* Zl*Zacc(Tx) Zacc(Rx)CPLPCSrightSource LoadLSleftPower LineNetworkImpedance Matching UnitMeas. UnitControl UnitModem Imp. Mtch.IsVsSampling ResistorTxZtZt*Impedance Matching CiruitRf CfVsIsMeas. UnitSensingUnitInterp.UnitPactVs IsP12P11P22P21SLInSRCpSLSw SRSwSMIn SMCpBL BRBMP11P12 P22P21VgRgZaccRg = 50 ΩP12P11P22P21PhsignV envI envRfilCfilVs x IsRfilCfilLSrightCSleftSLCpSRInFigure 1.3: Connection of a transmitter and receiver to a two port net-work via impedance matching blocks. At the transmitter side, the accessimpedance seen at the network, namely Zacc(Tx), is transferred to complexconjugate of the impedance of the transmitter, Zg. At the receiver side, theimpedance of receiver, Zl, is transferred to complex conjugate of the accessimpedance seen at the network, Zacc(Rx).• Considering the design methodology of impedance matching circuits,two classes of methods can be distinguished [31], namely, analyticalmethods, which use an approximate circuit model for the load (in thecase of PLC, both load and network), and numerical methods suchas real frequency technique, rational parametric approximation, anddirect stochastic approximation [29].• In terms of load/source characteristics, impedance matching problemscan be divided into three classes [42]. First, the filter or insertion lossproblem, in which matching a resistive load to a resistive source is con-sidered. Second, the single matching problem, where a resistive sourceis to be matched with a complex load. And third, the double matchingproblem, in which both load and source have complex impedances.• From the implementation point of view, the impedance matching sys-tem design can be classified into two categories: flexible or fixed struc-151.2. Backgroundtures. In the former, circuit topology is optimized together with thevalues of the components. For the latter, only the values of compo-nents can be chosen to obtain the best match possible. Therefore,some design goals may be compromised in favor of simplicity of thestructure.• In terms of frequency range of operation, matching circuits can be nar-rowband or wideband. In some cases, wideband matching is achievedvia several narrowband matching schemes, e.g., [44].• In terms of elements used for implementation there are two classes;passive and active. Passive elements themselves can be categorizedinto transmission lines and lumped elements. Transmission lines aremost often used in Radio Frequency and higher frequencies since theyare impractical for achieving matching for lower frequencies such as≤100MHz (considered for a typical VPLC application) due to exces-sive length of line necessary to implement them [41, Ch. 5]. Lumpedelements also can be implemented on-chip (for smaller values) or off-chip (for larger values). However, some off-chip components such astransformers are not propitious due to the weight, size and cost bur-den they impose on the systems such as VPLC which need to be assmall, light and inexpensive as possible. An alternative for implement-ing components with larger value is to implement them using activecircuits which can be implemented on-chip and thus save considerableweight, size and cost.161.2. BackgroundTable 1.3: Classification of impedance matching solutions - OverviewCriterion Classes Brief DescriptionMethod Numerical Real frequency techniqueAnalytical Circuit modelsLoad/SourceDouble Complex/ComplexSingle Complex/ResistiveInsertion Loss Resistive/ResistiveStructure Fixed One circuit topologyFlexible Different topologiesBandwidth Narrow BandWide BandImplementation Passive On-chip, off-chip (bulky)Active Easily integratedTo give a better overview of the classification methods, a summary of allthese categories is compiled and inserted in Table 1.3.All the classes could potentially be used in an appropriate set-up toaddress a matching problem.1.2.5 Impedance Matching in PLCDesigning an interface circuit for PLC has drawn attention of engineerssince the beginning of using this communication technique. Coupling tothe power grid and coupling to the vehicle power network have substantialdifferences. Since in a power grid, both power and transmitted/received sig-nal are Alternating Current (AC) waves using two rather complicated filtersfor each of these waves is essential. In a vehicle on the other hand, sincepower is DC and communication signal is AC, simpler filters can separatethese waves. In theory, a single capacitor can filter the DC signal out andhence separate these two waves. However, using a single capacitor is not171.2. Backgroundthe optimal solution in the terms of quality and power of transferred signal.To address this issue, an impedance matching system should be designed asthe interface circuit. It is worth mentioning that maximizing the efficiencyand power delivery via impedance matching is considered in several elec-trical engineering disciplines including power systems [45], amplifier design[44, 46, 47], antenna design [31, 48] and filter design [49, 50] as well.We now review impedance matching systems and circuits in further de-tail, particularly those proposed for PLC applications, and discuss theiradvantages and disadvantages specifically in context of their potential usein VPLC.Phase and magnitude screening and capacitor bank adaptiveimpedance matchingIn [26], the authors describe a PLC system that performs impedance de-tection via reading the phase and magnitude deviation from a referenceimpedance, e.g. 50 or 100 Ω. Impedance matching is accomplished via afixed inductor combined with a capacitor bank controlled by semiconductorswitches. To decrease the range of impedances to be matched they also sug-gest an optional use of a transformer. The design is based on an analyticalmethod and a fixed L-structure, and impedances ranging from a few Ω tofew MΩ can be matched. However, matching is limited to a very narrowband and the quality and range of performance in matching non-resistiveloads is unclear. Using off-chip components increases the size and weightof the system which makes it less suitable for a VPLC application where181.2. BackgroundTxImpedance Matching CiruitNetwork RxImpedance Matching CiruitZgZlZg* Zl*Zacc(Tx) Zacc(Rx)Z3Z4Z2Z1Z5ZinCPLS1CS1LPLS2CS2Source LoadFigure 1.4: VCGIC used in [25] to provide necessary variable inductor formatching circuit.compactness of the device and its light weight are significantly important.PLC impedance adaptation using VCGICIn [25], Park et al. comment on previous works for adaptive impedancematching and point out that many external (i.e., off-chip) components suchas capacitors, switches and transformers increase the price and size of match-ing circuits. To address these problems, they suggest the use of a VoltageControlled General Impedance Converter (VCGIC), as proposed in [51] andshown in Fig. 1.4. The impedance seen at the input of this circuit is givenbyZin =Z1Z3Z5Z2Z4. (1.4)Different impedances can be achieved depending on the chosen values forpassive components in the circuit (refer to [51] for more information). Forexample, with a single capacitor (Z2 or Z4) and four resistors (other fourimpedances), this circuit can be implemented with the equivalent impedance191.2. Backgroundof an inductor. This provides an extended flexibility to this system andmakes it more suitable for Integrated Circuit (IC) technology by avoidingthe use of bulky passive inductors. This gain however comes at a costsince the maximum current and voltage supported by operational amplifiersimpose certain limits on the operation range of this circuit. This is overcomewith the addition of a fixed inductor and a transformer in [25], which hasthe disadvantages of additional cost and size.The methodology used in [25] is based on an analytical circuit modeland solves a single-matching problem via sensing the peak current through atransformer [28]. The implementation is with a fixed structure and achievesnarrowband matching for the impedance range of [6.4, 25] Ω + j2pif [7.5, 24] µH.Impedance adaptation using Fuzzy LogicA series LC circuit and a transformer are used in [27] as adaptation circuit.The off-chip variable inductor and transformer are controlled by a digitalcircuitry in order to match the phase and magnitude of the access impedancein an automatic fashion. The decision making process chosen in this studyis based on a fuzzy logic algorithm which, compared to other numerical ap-proaches discussed below, seems to have a lower computational complexity.Disadvantages are the use of discrete variable transformer and inductor aspart of the circuit which contributes to significantly larger size and weight ofthe system. Also the need for a comparatively more complex digital controlsystem results into larger die area on chip which translates to additionalfabrication cost.201.2. BackgroundPLC wideband equalizerAraneo et al. [29] present a study on wideband impedance matching, using anumerical approach, namely a vector fitting method. They suggest using aMeta-Particle Swarm Optimization (M-PSO) algorithm for calculations andcompare it with some other methods such as genetic algorithms. Their studyshows that M-PSO is able to converge to the solution after approximatelyone thousand iterations. The solution devised for this single-matching prob-lem is to find the appropriate location for zeros and poles of an LC-ladderstructure which enables the maximum power transmission. The couplingcircuit for this wideband matching is referred to as equalizer, as it does notnecessarily match the impedance throughout the band but rather increasesthe power transmission toward maximum. As shown in Fig 1.5 (taken from[29]), the power transfer gain between modem and network is less than 1over the frequency range of interest, i.e., the network impedance is nevermatched at any point in the frequency band of interest.In a similar work by Issa et al. [30], a recursive algorithm called Wein-berg relations is developed and a Tchebycheff gain function has been usedas the equalizer structure. The matching behavior of their proposed systemis also similar to what is seen in Fig. 1.5. We note that the use of numericaloptimization methods requires a significantly large and complex digital pro-cessor, which may be considered a disadvantage when aiming for small-areaintegrated solutions.211.2. Background0 5 10 15 20 25 3000. [MHz]Power GainFigure 1.5: Power transfer gain between modem and power line networkwith (blue solid line) and without (black dashed line) wideband equalizer.Results taken from [29, Fig. 5]Transformer-less impedance matching networkFinally, our approach for narrowband matching, first proposed in [52], wasadopted by Nisbet et al. in [53]. The capability of transformer-less impedancematching (at the transmitter side) is demonstrated for a range of accessimpedances. However, it is not entirely clear in what way the design ex-tends beyond [52], as the control and some other parts of the system, whichhave a major impact on the performance, are not explained.In Chapter 3, we will elaborate on how our previous design in [52] isexpanded and enhanced.We will explain the particulars of the control systemand its functionality as well as full system performance results.221.2. BackgroundTable 1.4: Compilation of some of the related works in literature - OverviewWork Method Load -SourceStruc-tureBand-WidthImplement-ationNotesMarvetic[26]Analytical InsertionLossFixed Narrow Passive Bulky,heavy andexpensivetransform-ersPark[25]Analytical Single Fixed Narrow Combina-tionTransformersused,alleviatedmethodMunoz[27]Analytical Single Fixed Passive Fuzzy Logiccontrolsystem,Transform-ersAraneo[29]Numerical Single Flex. Wide Passive ComplexControlSystem(M-PSO)Nisbet[53]Analytical Single Flex. Narrow Combina-tionControlSystem NotDiscussedSummary of Impedance Matching in PLCA brief summary of the works reviewed in this section is inserted in Ta-ble 1.2.5 to provide an overall view of these works and how they match withthe classes provided previously in Table A Note on Electromagnetic CompatibilityAs VPLC emits electromagnetic signals into the vehicle, restrictions imposedby EMC standards should not be forgotten. Standards provided by theComite´ International Spe´cial des Perturbations Radioe´lectriques (Special231.2. BackgroundInternational Committee on Radio Interference) (CISPR) such as CISPR25and CISPR12, as well as standards provided by International StandardsOrganization (ISO) such as ISO 11451/11452 apply to vehicular applicationand hence VPLC. In addition to these standards, automotive companies alsodevelop their own guidelines and specifications for EMC (see e.g. [54, 55]).These standards describe the radio disturbance characteristics, measure-ment methods and emission limits for all the electronic and electric devicesthat are intended to be used in vehicles. As an example, CISPR25 specifiesan upper limit of 6 dBµV (150-300 kHz) or 0 dBµV (530 kHz-1.8 MHz, 5.9-6.2 MHz) for the signal received at the antenna terminal. This restrictionimposes certain limits on the maximum power that VPLC transmitters areallowed to inject to the network. Degardin et al., in [56] report that accord-ing to their measurement tests, in order to comply with the aforementionedrequirements, the Power Spectral Density (PSD) of injected signals shouldbe chosen between -60 and -80 dBm/Hz [56].Therefore, considering the EMC restrictions, the severe attenuation ofthe power line channel cannot be compensated beyond a certain limit byincreasing the injected power from the transmitter. In such cases however,impedance matching can compensate for channel attenuation to some extentand improve the efficiency of signal transmission between the modem andnetwork without requiring an increase in injected power which may lead toviolation of EMC standards.241.3. Main Contributions of the Thesis1.3 Main Contributions of the ThesisTo provide the reader with a better overview of the main contributions of thisthesis, which will be discussed in detail in subsequent chapters, a list of thesecontributions is compiled in this section. In summary, the contributions ofthis thesis are:• a detailed literature overview on characteristic measurements and impedancematching interface design,• measurement data for channel characteristic and access impedance ofan internal combustion engine vehicle,• measurement data for battery and load values at access points inVPLC,• an extensive discussion of channel characteristics, access impedanceand the effect of loads on these characteristics for the ICE under study,• measurement data for channel characteristic and access impedance ofa hybrid electric vehicle,• a comprehensive discussion of channel characteristics, access impedanceas well as the effect of length of channel and state of vehicle on thesecharacteristics for the HEV under study,• an overview of variation of access impedance in VPLC, as the founda-tion of designing impedance matching systems for VPLC modems,• a new approach for addressing the matching problem for variableimpedances,251.4. Thesis Outline• an extended derivation and discussion of the matching solution,• a new discussion and solution for concurrent matching at both trans-mitter and receiver sides of the VPLC links,• an original design for the transmitter and receiver side of the adaptiveimpedance matching system,• a set of extensive simulations, including the transmitter side only, re-ceiver side only, concurrent simulation of transmitter and receiver sidematching, and emulating the VPLC network using the S-parametersof the VPLC links obtained in our measurement campaigns,• suggesting several circuits, suitable for on-chip implementation of dif-ferent units of the system, as lead designs for fabrication of the system,• an original design to enhance the performance of one of the most basicbuilding blocks needed throughout the system, namely OperationalAmplifier (op-amp),• an original design of an active inductor using a new structure, capableof producing high inductances at intended frequency range of VPLCapplications.1.4 Thesis OutlineIn the next chapter the details of our measurement campaigns for character-ization of two vehicles available to us will be presented. These characteriza-tion measurements include mainly transfer function and access impedance261.4. Thesis Outlinemeasurements and calculations. The work presented in the Chapter 2 willlay the foundation for the design of an adaptive impedance matching inter-face for VPLC. In Chapter 3, the design of the proposed adaptive impedancematching interface will be discussed at a system level which will be followedby circuits designed for each part of the system in Chapter 4. Finally, Chap-ter 5 will conclude this thesis.27Chapter 2Medium Characterization2.1 IntroductionIt was mentioned in Chapter 1 that to design suitable data transmissionequipments, a deeper understanding of the communication channel charac-teristics is essential. One of the important issues of VPLC is to maintainreliable communication over highly frequency-selective channels [10]. Fre-quency selectivity is caused by impedance mismatches in the wiring harness,which had not been designed with data communication in mind [39]. An-other important issue and a specific characteristic of PLC is that the networkaccess impedance varies with location (point of access to the power line net-work), frequency, and time. This characteristic renders impedance matchingan appealing concept [1]. However, matching the network access impedancewith preferably simple passive circuits is challenging due to the aforemen-tioned frequency selectivity. For an efficient design of the adaptive couplingunits, it is important to have an in depth knowledge of channel properties,and particularly, the nature and range of changes in the access impedancesof vehicles.This chapter is dedicated to studying an Internal Combustion EngineVehicle, namely Pontiac Solstice, and a Hybrid EV built on a Ford E-450282.1. Introductioncutaway chassis truck which uses the BalanceTM Hybrid Electric drive sys-tem by Azure Dynamics Corporation (AZD). Considering the data providedin Fig. 1.2, and in order to produce relevant results that are applicable to thewide range of frequency bands envisaged for VPLC, we performed all ourmeasurement for these studies up to 100MHz. The measurement results canbe downloaded at the first part of this chapter, Section 2.2, we continue the investiga-tions performed by our group, started in [12], and by others, e.g., [5, 8, 10,38], towards a better understanding and modeling of the VPLC channel. Inparticular, battery and loads, that have been identified as important net-work elements for a long while [10]. Their characteristics have a notableimpact on the channel transfer function and access impedances. However,there is scarcely any measurement data on these components available inthe literature. Intending to close this gap, we present measurement resultsfor battery and load impedances and discuss their impact on the networkaccess impedances.In the second part of this chapter, Section 2.3, considering the impor-tance of EVs in the future of the auto industry, we will contribute by ex-panding the sparse measurement data available on EVs in the literature[17, 19, 21, 22]. In particular, we will report the channel transfer functionmeasurement data and analysis in different states of vehicle as well as theaccess impedances from several potential communication access points in aHEV.Finally, Section 2.4 will provide the summary and conclusions for thischapter.292.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 20062.2 Characterization of Internal CombustionEngine Vehicle - Pontiac Solstice 2006Considering various potential applications of VPLC technology, the follow-ing plug-in locations were selected: front and rear lamp for sensors, batteryand trunk light for main control units, and cigarette lighter for main controlunits as well as user access. Selection of these loads are made based onthe fact that their locations are reasonable access points for potential PLC-based applications such as car rear/back-up camera, front and rear radarcollision systems, or a control system that is accessing the communicationline or is being charged through the cigarette lighter.The work presented in this chapter is a continuation of the work pre-viously started in our group, the result of which had been published byMohammadi et al. in [12]. Therefore, in this chapter only the result of thework done by the author in extension of [12] are presented. The reader isreferred to [12] for complementary information such as the result of channeltransfer function measurements of the Pontiac Solstice 2006 under study.The remainder of this section is organized as follows. In Section 2.2.1,stand-alone battery and load measurements are presented and discussed.In Section 2.2.2, access impedance is broadly studied. This includes inputimpedance measurements at several access points and a discussion on theimpact of the load impedances on the overall access impedance.302.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 20062.2.1 Battery and Load MeasurementIn this section we describe impedance measurements of five loads and onecar battery from the Pontiac Solstice 2006 sport vehicle made available tous through the Electrical Engineering and Computer Engineering Depart-ments and the Mechanical Engineering Department. The following selectedplug in locations were considered: front and rear lamp for sensors, battery,trunk light for main control units, and cigarette lighter for both control unitand user interface access point. In order to perform the measurements, wedetached the loads (except for cigarette lighter where there is no load), mea-sured the channel characteristic and then measured the stand alone loads.Measurement SetupFor all measurements, the device under test is disconnected from the ve-hicle and tested stand-alone using an Agilent 8793E Vector Network Ana-lyzer (VNA). The corresponding complex input impedances are afterwardscalculated from the measured S11 data. The measurement frequency rangeis set from 100kHz to 100MHz. In order to connect the different load termi-nals to the VNA coaxial test ports, we used custom made adaptors. Theseadaptors were designed and fabricated such that VNA Port Extension couldbe used to compensate for their electrical length.BatteryThe typical distance between the battery’s (+) and (-) terminals representsan obstacle for VNA measurements in the MHz range, as it forces splitting312.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006the VNA coaxial signal and coaxial ground several inches apart to be ableto make electrical contact with the battery terminals. Such splitting is asignificant cause of error, as it creates an equivalent ‘ground lead’ connectionto the battery’s (-) terminal. To solve this problem, we built a microstripline on a Printed-Circuit Board (PCB) that, when inserted on top of thebattery, provides a suitable Radio Frequency (RF) connection between thebattery terminals and a coaxial cable. This PCB, shown in Fig. 2.1, allowsus to obtain repetitive and resonance-free impedance measurements.Figure 2.1: Microstrip PCB interface for 1-Port VNA measurements of thecar battery.Results from the battery S11 measurements show that the internal impedanceof the battery consists of a series resistive and inductive part, as shown inFigs. 2.2 and 2.3.322.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 20060 10 20 30 40 50 60 70 80 90 1000102030405060708090100R (Ohm)Frequency (MHz)Figure 2.2: Resistive part of the internal impedance of the battery.As seen in Fig. 2.2, the output resistance of the battery at low frequenciesis close to zero and gradually increases, approaching 10Ω at 50MHz. There-fore, as expected, at lower frequencies, the battery acts as an ideal voltagesource with negligible output resistance. For a VPLC modem connectednear the battery this would represent having a short circuit connected inparallel. Beyond 50MHz, the impedance rapidly increases until it reaches apeak of 80Ω, thus improving the prospects for a nearby PLC modem.10 20 30 40 50 60 70 80 90 100050100150200250300L (nH)Frequency (MHz)Figure 2.3: Inductive part of the internal impedance of the battery.According to Fig. 2.3, the output inductance of the battery is close to a332.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006constant value of approximately 150nH. This means that the output reac-tance of the battery will increase linearly with frequency. Thus both real andimaginary parts of the impedance of the battery increase with frequency.Given the inner configuration of the battery cells, an inductive behav-ior may seem counter-intuitive and possibly the result of a measurementartifact. Nonetheless, the high-frequency inductive nature of batteries isa phenomenon that has also been observed and studied for sealed lead-acid batteries in [57]. In addition, we must emphasize that the micro-stripadapter shown in Fig. 2.1 is the result of our efforts to eliminate unwantedmeasurement errors, mostly caused by magnetic coupling. In that sense, thecircuit successfully allowed us to obtain a calibrated measurement plane andreproducible measurements, independent of the position of the VNA cable.Load MeasurementsTo measure the loads stand-alone, we used simple custom adaptors carefullycrafted such that their electrical length could be easily de-embedded by theVNA. For the lamp loads, measurements are taken at the ON and OFFstates. Given the large currents required to turn the lamps on (up to 5A),we could not use the built-in Bias Tee of the VNA, for which the maximumcurrent limit is 500mA. Instead, we connected a battery in parallel, andcarefully de-embedded its effect from the measurements. Results show againa resistive and inductive part in series. The resistive behavior is, as expected,low in the OFF state, and higher at the ON state. ON values correspond tothe lamps quoted wattage which confirms the sanity of the measurementsand custom adaptors. The summary of measurement results are compiled342.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006Table 2.1: Measurement Results for Load Impedances in ICE vehicle underthe testLoads Resistance [Ω] L0 [H] L1 [H/Hz] L2 [H/Hz2] L3 [H/Hz3]Off On 10−9 10−18 10−25 10−34Front High Beam 0.24 2.36 1301.1 -404.5 90.3 -242.9Front Low Beam 0.37 2.74 177.6 -751.1 161.9 -308.7Rear - Tail 6.59 25.2 309.0 -7701 1384 -7344Trunk 2.43 12.8 112.5 -122.6 25.1 -7.1in TABLE 2.1.Interestingly, the inductive behavior is found to be the same for the ONand OFF states, and in a non-linear fashion with respect to the frequency.To model these inductances, a least squares third-order polynomial fittingof the data is performed. The resulting coefficients are listed in TABLE 2.1,and can be used to calculate the inductance L as follows:L = L0 + L1.f1 + L2.f2 + L3.f3 (2.1)As an example, the measured inductances and the fitted curves for therear tail and the front high beam lamps are depicted in Fig. Access ImpedanceWe now proceed to consider the access impedance Zacc experienced at dif-ferent locations of a VPLC network. Knowledge of typical ranges of Zaccis essential for the emulation of VPLC networks and the design of adaptiveimpedance matching circuits.352.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006Obtaining the Network ImpedanceWe consider as access impedance, Zacc, the impedance seen at the trans-mitting terminals of a PLC device (transmitter/receiver) when connectedin parallel to a PLC plug-in point. Our approach to determine Zacc forthe selected potential plug-in points consists of measuring the network in-put impedance ZNWK at each of the selected plug-in nodes with a VNA.Afterwards, as shown in Fig. 2.5, we calculate each Zacc from the parallelcombination of the loads measured in Section2.2.1 with their corresponding(a) Front Lamp High Beam.(b) Rear Tail Lamp.Figure 2.4: Lamp inductances: Measured (solid) and Fitted Curve (dashed).362.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006measured ZNWK .Figure 2.5: Circuit schematic of calculating access impedance, Zacc.During the measurement of each ZNWK we have proceeded as follows:• For each of the loads, we have removed the lamp from the vehicle andmeasured the network impedance ZNWK at the plug-in node of thelamp, with all other loads of the network attached. For the Rear andFront lamps we have taken measurements with the lamp switch turnedON and OFF.• For the Cigarette Lighter, we have measured the network impedanceZNWK directly with all other loads attached to the network. It shouldbe noted that as there are no loads connected to this point, Zacc =ZNWK .• For the Battery we have measured the network impedance at the bat-tery terminals with the battery still attached. This was made possibleonly by the interface board described in Section 2.2.1 placed betweenthe battery and the battery terminals which allows performing suchmeasurement.372.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006Measured Network ImpedancesIn Figs. 2.6, 2.7 and 2.8, we show the measured input impedances ZNWK ,obtained from the car network. For all plots, Scattering parameters (S-parameters) measured with the VNA are used to calculate the correspondinginput impedances. The effect of all connecting adaptors are also carefully de-embedded from the measurements. A noticeable observation is the suddenspikes in the resistance and the sudden capacitive to inductive changes inthe reactance. Interestingly, this phenomenon is more pronounced at lowerfrequencies, which imposes a challenge for the design of adaptive impedancematching circuits at these frequencies.Fig. 2.6 shows the real and imaginary parts of ZNWK for the rear, frontand trunk lamps while turned ON. This means that even though the lampshave been removed from the network, their ON/OFF relays in the car areswitched ON. Fig. 2.7 shows the measurement results for the Front and Rearlamps when turned OFF. It can be seen in latter figure that the reactancesof most lamps are initially capacitive. We attribute this behavior to theopen-contact capacitance of the lamp relays, which we have measured withthe VNA to be in the range of 1.6pF to 1.83pF. Surprisingly, however, thereare two reactances, corresponding to the rear tail lamps, which are initiallyinductive even at low frequencies.Fig. 2.8 corresponds to the cigarette lighter (thin black lines) and thebattery (bold blue lines) plug-in points. Because the cigarette lighter islocated near the battery with only one fuse in between we were expecting theZNWK at the cigarette lighter to be the closest to the impedance measured382.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006(a) Real Part.(b) Imaginary Part.Figure 2.6: Measured Network Input Impedances ZNWK at Rear, Front,and Trunk lamp access nodes while turned the battery, but the results show otherwise. Despite our careful design andfabrication to avoid any impact from the adaptors on our measurements, wecan still not rule out the possibility of resonance caused by our custom Sub-Miniature version A (SMA) coax to cigarette lighter connector adapter. Onthe other hand, as expected, at the battery node the impedance is dominated392.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006by the inductive nature of the battery.Total Access ImpedancesAt first glance, the results shown in the previous sub-section seem to indi-cate that the lower frequency range is the most adverse frequency band forimplementation of an (adaptive) impedance matching circuit.(a) Real Part.(b) Imaginary Part.Figure 2.7: Measured Network Input Impedances ZNWK at Rear and Frontlamp access nodes while turned OFF.402.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006(a) Real Part.(b) Imaginary Part.Figure 2.8: Measured Network Input Impedances ZNWK at CigaretteLighter (thin black line) and Battery (bold blue line).However, we still need to take into account the effect of the vehicle loadswhen connected in parallel to the plug-in access nodes. As explained earlier,we obtain the total Access Impedances, Zacc, by calculating the impedancethat results from the parallel connection of the load data measured in Section2.2.2, with the network input impedance measured in Section 2.2.2.Fig. 2.9 shows the resulting values of Zacc for all lamps in the ON state.412.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006As we can observe from the figure, the total access impedance is stronglyinfluenced by the inductive nature of the loads. Similar to the case of thebattery, a modem connected to any of the lamp plug-in nodes will experiencea practical short-circuit near DC, and an increasing output load with fre-quency. This effect is also present when the lamps are at their OFF state asshown in Fig. 2.10. The real part of Zacc for the OFF state is not shown since(a) Real Part.(b) Imaginary Part.Figure 2.9: Calculated Access Input Impedances Zacc at Rear, Front, andTrunk lamp access nodes while turned ON.422.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006it is approximately the same as that of Fig. 2.9. For the Cigarette Lighterand the Battery plug-in nodes Zacc is the same as shown on Fig. 2.8, sincethere are no other loads at those nodes to consider in parallel.2.2.3 DiscussionBased on our measurements, the battery appears as an inductive load. Atlow frequencies this supports the concept of direct and indirect paths assuggested in [38], where a ‘direct’ PLC data connection that does not passthrough the battery is more desirable, to avoid being short-circuited toground by the low impedance of the battery.On the other hand, at higher frequencies the impedance of the batteryis significantly higher (both in resistance and reactance), acting more likean open circuit that allows the flow of data.Furthermore, based on our load measurements, the lamps also behavelike an inductive load over a wide frequency range (from about DC toFigure 2.10: Imaginary Part of Calculated Access Input Reactance Zacc. atRear and Front lamp access nodes while turned OFF.432.2. Characterization of Internal Combustion Engine Vehicle - Pontiac Solstice 2006100MHz), and their inductance is independent of whether the lamp is turnedON or OFF. Their resistance, nevertheless, changes between the ON andOFF states.One of the outstanding findings of our study is that the mere existence ofrelays in a path does not necessarily mean that the path is completely openwhen the relay is off. It appears that the parasitic capacitance of the relays(when they are off) provides a capacitive path that conducts particularly athigher frequencies. We measured the parasitic capacitance of typical relaysand their value ranges from 1.6pF to 1.83pF.The inductive loads play a dominant role on the behavior of the accessimpedance, making impedance driving and/or matching more difficult atlower frequencies, and easier for higher frequencies. This effect is so strongthat it dominates even when ZNWK is capacitive, such as when the lampsare in their OFF state, for instance refer to the Fig. 2.7(b). However, itcould be argued that even though, at lower frequencies, the inductive loadsreduce the Zacc, they also reduce the fluctuations of ZNWK , making it amore controllable environment for impedance matching. Whereas the sce-nario is completely reversed at higher frequencies, where both resistance andreactance vary significantly (e.g., Fig. 2.9).An alternative approach to bypass the smaller Zacc at low frequenciescould be to take advantage of the almost short-circuited path provided bythe loads and connect the PLC modem in series with the load (since theload provides a low impedance path to ground).Comparing the obtained reactance limits of Zacc with those of ZNWK ,the reactance of Zacc is less in magnitude at higher frequencies, i.e., the442.3. Characterization of Azure Dynamics BalanceTM Hybrid Electricparallel of ZNWK with Zload results in more reasonable reactances, from thepoint of view of the designer of an impedance matching circuit. In particular,for an integrated circuit solution, this lower reactance is beneficial as largeinductances are more challenging (if not essentially impractical) to integrate.Even though the measurements presented in this part of the study arefor a specific North American sport car, namely the Pontiac Solstice 2006,we believe that our results can easily be extended to other vehicles. Thisis based on the fact that the loads dominate the behavior of the accessimpedance, and that the battery and lamps studied here are standard forseveral other vehicles. Our measurements of Azure Dynamics BalanceTM Hy-brid Electric presented in the remainder of this chapter is another confirma-tion of the validity of this statement.2.3 Characterization of Azure DynamicsBalanceTM Hybrid ElectricIn this section, we present the methodology and results of our measurementcampaign using a HEV. This vehicle has been made available to us byAZD, providing access to internal nodes that would be of interest for aVPLC system. We have been able to operate the vehicle in different states,including activated ICE and electrical drive system which provides furtherinsight on the effect of different states on channel characteristics.The measurement points were selected in such a fashion to ascertain theirsuitability as a potential VPLC communication node. Since a cut-awaychassis vehicle was provided to us, access to nodes such as Vehicle Con-452.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricFigure 2.11: Electric diagram of the selected access points and their connec-tion to the 12V battery.trol Unit (VCU), Traction Motor Digital MOdule Controller (TMDMOC),Energy Storage System (ESS) and DC to DC converter was facilitated. Fea-sible access to various nodes helped us to select aforementioned nodes suchthat most meaningful measurements with regard to potential applicationscould be performed.The remainder of this section is organized as follows. The details aboutthe vehicle and measurement methodology are given in Section 2.3.1. Wethen present and discuss a number of measurement results of the channeltransfer function and access impedance in Section 2.3.2. Finally, Section 2.4concludes this chapter.2.3.1 Measurement SetupIn this section, we first describe the HEV available for measurements. Wethen explain in detail the applied methodology, which is critical to obtainuseful and correct results.462.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricVehicleThe vehicle employed for this measurement campaign is an Azure DynamicsBalanceTM Hybrid Electric. This vehicle is built on a Ford E-450 cutawaychassis truck, and transformed into an HEV by the addition of proprietaryelectric drive train technology and a high voltage Lithium-Ion battery. Thebody of the vehicle is thereafter built for different roles, such as passen-ger shuttle or delivery truck. As an HEV, the unit combines its automatictransmission with a conventional combustion engine and an electric tractionmotor. The combustion engine is used to run the vehicle at speeds above35 mph (56 kmph) or when the high voltage battery needs recharging. Theelectric traction is used to run the vehicle at speeds below 35 mph, to as-sist the combustion engine when accelerating, and to harvest energy fromregenerative braking events [58, 59]. Finally, it is worth mentioning thatthe Azure Dynamics BalanceTM Hybrid Electric is available in both singleor dual 12V battery options, and a single or dual DC/DC converter option.The results presented in this work are for a single battery, single DC/DCconverter vehicle.Next, we provide details of the experimental setup and an overview ofall the measurements performed.Access PointFor the selection of the measurement nodes the following criteria were used:a) proximity to the Control Area Network (CAN) buses,b) proximity to main HEV blocks, and472.3. Characterization of Azure Dynamics BalanceTM Hybrid Electricc) availability of connectors with both wiring to “VBAT” (12V batterypositive terminal) and “CHASSIS GND” (12V battery negative ter-minal through vehicle body).The measurements were performed on an engineering prototype versionof the vehicle, stripped of the body and all its components other than thedriver seat, steering column and wheel, accelerator, brakes, and instrumentpanel. The absence of the body allowed us to gain easier access to the nodesof interest, but eliminated the possibility of the chassis body acting as signalreturn path. However, since all test nodes were selected at cable bundleswith wiring for both “VBAT” and ”CHASSIS GND”, the return path wasprovided by the connection of the “CHASSIS GND” wiring to the internalmetal body of the vehicle.The access points selected were the VCU, the ESS, the TMDMOC, theDC/DC converter, and the relay “K6” in a central fuse box. These arepotential nodes in a PLC network and their roles in the HEV are as follows(cf. [58, 59]).A) The VCU controls and coordinates the operation of all hybrid compo-nents. For example when in electric mode, it is responsible for shuttingdown the combustion engine and decoupling the engine from the drivewheels.B) The ESS is a 345V Lithium-Ion battery used to drive the vehicle inelectric mode, capture regenerative braking energy, and assist the en-gine during vehicle acceleration.482.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricC) The TMDMOC converts the high DC voltage from the ESS to 3-phaseAC when driving the electric traction motor, or can also perform thereverse power conversion during regenerative braking events to storeenergy in the ESS. It also controls the speed and torque of the tractionmotor. The TMDMOC is connected to VBAT upon ignition via therelay K6 as shown in Fig. 2.11D) The DC/DC converter is used to convert the high DC voltage fromthe ESS to 12V DC, in order to charge the 12V battery and power12V electrical accessories.E) The relay K6 is located in the low-voltage under-the-hood fuse boxand provides 12V power to the TMDMOC upon ignition. It should benoted that to access this node we needed to remove the relay, there-fore measurements from the relay access point to other nodes are notpossible with engines running.Fig. 2.11 shows an electric diagram of the selected access points andtheir connection to the 12V battery. Complete electric diagrams for thisvehicle are available online, see [60].Table 2.2: Ports at which VNA measurements were performed. Vehiclestate: O=off, IG=ignition, ID=idle, S=wheels spinning.VCU ESS TMDMOC DC/DC RelayVCU O,IG,ID O,IG,ID O,IG,ID,S O,IGESS O,IG,ID O,IG,ID,S O,IGTMDMOC O,IG,ID,S O,IGDC/DC O,IGRelay492.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricMeasurements SetupFollowing the approach adopted in our previous work on an ICE vehiclereported in Section 2.2, we performed channel measurements between allaccess points by means of a 2-port Vector Network Analyzer in the fre-quency range of 100 kHz to 100 MHz, which is the frequency range typicallyconsidered for VPLC (see overview in Section 1.2.2, Fig. 1.2). This ap-proach provides frequency dependent Scattering parameters (S-parameters)that fully describe the transfer function between connection points as wellas their access impedances. The measurements were repeated for the fol-lowing different states: vehicle off, ignition switch on, combustion enginerunning at idle, and electrical mode with the rear traction wheels spinningon a roller type chassis dynamo meter. Table 2.2 provides an overview ofthe measurements performed.All measurements were performed using the “VBAT” and “CHASSIS GND”wires. Custom made adapters were built to interface the VNA coaxial testcables with the on-vehicle connectors at the selected access points such thatwe could:a) Connect in parallel to the power network without disconnecting anyloads from the harness.b) Selectively disconnect loads, to measure load impedance or the networkwithout the load.Thus, this approach enables us to fully describe the transmission char-acteristics of the PLC network.502.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricFigure 2.12: Adapters for channel measurements. Left: TMDMOC. Right:VCU.ConnectorsFig. 2.12 shows the adapters built for the TMDMOC and VCU access points.All adapters are basically patch connections that are inserted at the junctionof two (male/female) vehicle connectors. A coaxial connector in shunt with“VBAT” and “CHASSIS GND” provides the access for the VNA test port.When commercially available end-launch connectors were used and mounteddirectly on the PCB board, otherwise, cable crimped connectors were usedand the cables soldered to the PCB board. Given the high density of theend launch connectors and the high current ratings of the signals beingpatched, the boards were designed to sustain up to 4 amps current at a100◦C temperature rise, fabricated with 3 oz copper thickness.512.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric[S11 S12S21 S22]Ii ILIiVSVSILZLZSVi ZL VLVPLCNet.Vi ViZaccZaccVLFigure 2.13: Top: Vehicular PLC as two-port network. Bottom: Equivalentmodel.2.3.2 Results and DiscussionChannel Transfer Function - CalculationsFig. 2.13 (top) shows the representation of a vehicular PLC system. TheThe´venin equivalent circuit of the transmitter is linked via a two-port cir-cuit representing the vehicle wiring to the load impedance representing thereceiver. The two-port circuit is described by its S-parameters measuredwith the VNA and the reference impedance, which in our measurementswas selected as Z0 = 50 Ω. Given the S-parameters, the transfer functionH(f) , VL(f)/VS(f) =S21(f)(1 + ΓL(f))(1− ΓS(f))2(1− S22(f)ΓL(f))(1− Γi(f)ΓS(f))(2.2)522.3. Characterization of Azure Dynamics BalanceTM Hybrid Electricand the access impedanceZacc(f) = Z01 + Γi(f)1− Γi(f)(2.3)whereΓi(f) = S11(f) +S21(f)ΓL(f)S12(f)1− S22(f)ΓL(f), (2.4)f denotes frequency andΓL(f) =ZL − Z0ZL + Z0, ΓS(f) =ZS − Z0ZS + Z0. (2.5)The transfer function H(f) and access impedance Zacc(f) lead to theequivalent transmission model in Fig. 2.13 (bottom), which is of interest forcommunications engineers.We note that if ZL = ZS = Z0, then H(f) = S21(f)/2 andZacc(f) = Z01 + S11(f)1− S11(f). (2.6)In the following, we show results for S21(f) and Zacc(f) under the assump-tion of ZL = ZS = Z0, as provided by the VNA.Channel Transfer Function - Different LinksWe first consider the vehicle in the off-state and compare the channel transferfunction for different node-to-node links.Fig. 2.14 shows the magnitude of |S21(f)| (which is equal to the magni-tude of transfer function times two) as function of frequency f for trans-532.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric020406080100−100−90−80−70−60−50−40−30−20−10VCU−ESS|S21| −−−> [dB]020406080100−100−90−80−70−60−50−40−30−20−10VCU−TMDMOC020406080100−100−90−80−70−60−50−40−30−20−10VCU−DC/DCf −−−> [MHz]|S21| −−−> [dB]020406080100−100−90−80−70−60−50−40−30−20−10VCU−Relayf −−−> [MHz]Figure 2.14: Magnitude of S21(f) as function of frequency f for connectionsfrom VCU.mission links from the VCU. These links seem to be particularly relevantas the VCU is the central control unit. We observe that the channel isfairly frequency-selective, which is consistent with measurements for ICEand electric vehicles in Section 2.2 and e.g. [12, 13, 17, 18, 61].It can also be seen that attenuation is strongly link-dependent. TheVCU-ESS and VCU-Relay links experience much less attenuation than theVCU-TMDMOC and VCU-DC/DC links, especially for frequencies below50 MHz (note that all subplots in Fig. 2.14 show the same y-axis range). In-542.3. Characterization of Azure Dynamics BalanceTM Hybrid Electricterestingly, the VCU-TMDMOC and VCU-DC/DC links are notably longerthan the VCU-ESS and VCU-Relay links, which suggests a distance-proportionalattenuation.This is further confirmed considering the results in Fig. 2.15 for the linksfrom the DC/DC converter. All links experience relatively high attenuation.The DC/DC-TMDMOC is the longest link and shows the smallest gain|S21(f)| for frequencies below ≈ 50 MHz. The larger gains for higherfrequencies could be due to frequency-dependent network impedances, whichdominate attenuation. They might also be due to the parasitic wirelesstransmission between links. In this context, we also note that the 12V wiresconnecting the battery with VCU and TMDMOC run in the same cablebundle for some distance, which may lead to cross-talk and could explainthe larger channel gain for VCU-TMDMOC compared to VCU-DC/DC, seenin Fig. 2.14.Comparing the absolute attenuations with those for ICE vehicles, e.g.,[12, 13, 61], and the EV in [17, 18], we find them to be quite similar withthe exception of the high attenuation of the links to/from the DC/DCand TMDMOC nodes at lower frequencies. This could be caused by lowimpedances of these loads at lower frequencies.Finally, comparing the plots for VCU-DC/DC and DC/DC-VCU inFigs 2.14 and 2.15, the channels can be identified as reciprocal. This hasbeen confirmed for all the links that we measured.552.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric020406080100−100−90−80−70−60−50−40−30−20−10DC/DC−ESS|S21| −−−> [dB]020406080100−100−90−80−70−60−50−40−30−20−10DC/DC−TMDMOC020406080100−100−90−80−70−60−50−40−30−20−10DC/DC−VCUf −−−> [MHz]|S21| −−−> [dB]020406080100−100−90−80−70−60−50−40−30−20−10DC/DC−Relayf −−−> [MHz]Figure 2.15: Magnitude of S21(f) as function of frequency f for connectionsfrom DC/DC converter.Channel Transfer Function - Different Vehicle StatesWe now compare the transfer function results when operating the vehicle indifferent states. First, we consider the TMDMOC node, as it is connected tothe 12V network through relay K6 (see Fig. 2.11). The relay is open in the“off” state and closed in the “ignition” state. Fig. 2.16 shows the channelgain |S21(f)| for both states. The changes in the channel gain due to thevehicle-state transition are overall not dramatic. This suggests that similar562.3. Characterization of Azure Dynamics BalanceTM Hybrid Electricto our observation in Sec. 2.2.2, the high-frequency signal passes or bypassesthe relay through parasitic capacitances.Fig. 2.17 presents the |S21(f)| for the three different vehicle states: vehi-cle off (“off”), ignition switch on (“ignition”), and combustion engine idling(“idle, comb.”) and for the two connections VCU-TMDMOC and VCU-DC/DC. Again, the overall differences are not substantial, but changes inthe transfer function gain of 10 dB to 20 dB can occur in certain frequencyranges. For example, considering the VCU-DC/DC link and the frequencyrange below 10 MHz, we observe a drop by 10 dB when the ignition switchis on, which could be caused by load changes when loads become powered.Some notable effects occur when the electrical drive system is operating.0102030405060708090100−100−90−80−70−60−50−40−30−20f −−−> [MHz]|S21| −−−> [dB]  VCU−TMDMOC, offVCU−TMDMOC, ignitionFigure 2.16: Magnitude of S21(f) as function of frequency f for VCU-TMDMOC connection in different vehicle states: vehicle off (“off”) andignition switch on (“ignition”).572.3. Characterization of Azure Dynamics BalanceTM Hybrid ElectricThis is highlighted in Fig. 2.18, which compares |S21(f)| when the vehicle isoff (“off”) and when it drives in the electrical drive mode (“spinning, elect.”).Note that in Fig. 2.18 the frequency range from 100 kHz to 20 MHz is zoomedin, to provide a better distinction of details in the image. In the electricaldrive mode, the frequency responses have many sharp peaks and notches, notpresent in the off-mode. We further observed that those change with time(which cannot be seen from the figure, of course). This suggests the presenceof an independent signal source in the network, i.e., noise induced into thenetwork through loads, and/or the variation of load characteristics over time.Both would affect the VNA measurements. Preliminary noise measurementsshow an increased noise level in the range below about 15 MHz, which wouldbe consistent with the observations from Fig. 2.18.We now proceed to examine the access impedance Zacc obtained at eachof the five selected access points on the HEV. The values obtained hereadd to our previous work for an ICE vehicle reported in Section 2.2 aswell as [12, 15], and provide essential information for the design of prospectmatching circuits.Obtaining the Access Impedance ZaccIn consistence with [15] and Section 2.2.2, we consider as access impedanceZacc the impedance seen by a PLC device connected in parallel to a PLCaccess point; e.g. for an access point located in the vicinity of a load, Zaccincludes the effect of that load’s impedance in parallel with the impedanceseen towards the vehicle harness (see Fig. 2.5).Given that our test adapters allow for VNA measurements without dis-582.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric0102030405060708090100−100−90−80−70−60−50−40−30−20−10VCU−TMDMOCf −−−> [MHz]|S21| −−−> [dB]  off ignitionidle, comb.0102030405060708090100−100−90−80−70−60−50−40−30−20−10VCU−DC/DCf −−−> [MHz]|S21| −−−> [dB]  off ignitionidle, comb.Figure 2.17: Magnitude of S21(f) as function of frequency f for VCU-TMDMOC and VCU-DC/DC connections in different vehicle states: vehicleoff (“off”), ignition switch on (“ignition”), combustion engine idling (“idle,comb.”).connection of the loads, we calculated the corresponding access impedancesdirectly from the measured scattering reflection parameter S11 using Eq. (2.3).Otherwise, the impedances of load and network were first separately mea-sured, and then Zacc was calculated as the parallel of those two impedances.It is important to note that given the short physical dimension of theadapters we do not expect their phase insertion or loss to be of any signifi-cance in comparison to those of long networks being measured across. Stand-alone characterization of the adapters approves the aforementioned assump-592.3. Characterization of Azure Dynamics BalanceTM Hybrid Electriction, the exception being the ESS automotive patch connectors, where con-nector characterization measurements has shown the presence of a resonanceeffect between the pins.Measured Access ImpedancesIn Fig. 2.19 we show the obtained Zacc for all access nodes and differentvehicle states. The most noticeable features of these results are as follows:02468101214161820−80−70−60−50−40−30−20−10f −−−> [MHz]|S21| −−−> [dB]VCU−TMDMOC  off spinning, elect.02468101214161820−80−70−60−50−40−30−20−10f −−−> [MHz]|S21| −−−> [dB]VCU−DC/DC  off spinning, elect.Figure 2.18: Magnitude of S21(f) as a function of frequency, f , for VCU-TMDMOC and VCU-DC/DC connections in different vehicle states: vehicleoff (“off”) and wheels spinning in electrical mode on a dynamo meter (“spin-ning, elect.”).602.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric1. There is very small influence of the vehicle state on the value of Zacc,with the sole exception of the VCU access point, particularly at higherfrequencies.2. The high voltage battery node ESS, and the Relay have distinctivelythe widest impedance variations, but the possibility that the measure-ments at the ESS node are affected by the connection adapter usedduring the measurements should be borne in mind. As mentionedbefore, stand alone characterization of the adapters has shown thepresence of a resonance effect between the pins of the ESS automotivepatch connectors. All other adapters were found to be resonant-free.3. Zacc at the TMDMOC stands out as a purely inductive impedance witha small reactive and resistive component and at all vehicle states, whichseems to indicate a small load impedance towards the TMDMOC.From the perspective of a designer, considering the requirements fora PLC impedance matching circuit, it is essential to know the range ofimpedances to match to. To help visualize this range, Fig. 2.20 shows thespan of measured impedances on a Smith Chart normalized to Z0 = 50 Ω.The colored regions shown in green, yellow, and black, altogether representthe complete range of measured Zacc for frequencies between 100 kHz and100 MHz. Combined regions colored in green and yellow represent the rangeof average values by the way of ignoring the isolated large peak variationsthat correspond to the black area, such as for example those occurring at60 MHz on the Relay as shown in Fig. 2.19.612.3. Characterization of Azure Dynamics BalanceTM Hybrid Electric0 10 20 30 40 50 60 70 80 90 100-1000100200300400500Real part of Z a --->  0 10 20 30 40 50 60 70 80 90 100-250-200-150-100-50050100150200Imaginary part of Za --->f ---> [MHz]ESSDMOCDC/DCRelayVCUFigure 2.19: Measured access impedances Zacc for different vehicle states.Top: real part, Bottom: imaginary part. Solid lines are for vehicle off state,dotted lines for ignition on, dashed for combustion engine idling, and dash-dot for state of wheels spinning in electrical mode on a dynamo-meter.To illustrate the value of this information, the region in green is distinctlypresented, which shows the range of impedance variations if the PLC systemis designed to operate in this vehicle in the range of 30 MHz to 40 MHz. Asit is seen, this area is much smaller than the total area to be covered. Inother words, there is a smaller range of impedance that should be matchedby impedance matching system. This casts less restriction on the impedancematching circuit designer, both in terms of structure and elements necessaryto address this need.622.4. ConclusionFigure 2.20: Smith chart illustration of access impedance ranges accordingto measurement results. Colored areas: Green: reduced frequency range of30-40MHz. Green and yellow: average impedance values in the frequencyrange from 100 kHz to 100 MHz. Green-yellow-black: complete range ofmeasured results.2.4 ConclusionIn this chapter, we first pointed out the importance of channel characteristicmeasurements for designers of VPLC gadgets in helping them better under-stand the harsh environment of power lines and its respective requirementsbetter. The necessity of proper data regarding access impedance in order todesign coupling circuits, specifically an adaptive impedance matching sys-tem which is the focus of the next chapter, was then established. Based632.4. Conclusionon this need and lack of appropriate data in the literature with this regard,two measurement campaigns were launched and their outcomes reportedaccordingly.First, in Section 2.2, we presented an experimental study of access impedancein an ICE vehicle available to us, namely the Pontiac Solstice 2006, with thepurpose of gaining further insights towards the understanding and emula-tion of the VPLC networks and their access impedances. In particular, wepresented experimental measurement data for the loads at the potential ve-hicular access points such as battery, as well as for the rear, front, and trunklights. The absence of such data, and unrealistic assumptions in this regardwere pronounced in the literature and therefore motivated us to run thesemeasurements. These measurements, combined with the input impedancemeasurements at selected plug-in nodes, helped us to calculate their com-bined effect in the total access impedance as would be seen by a PLC deviceconnected in parallel to those same nodes. The results showed how the in-ductive nature of the battery and lamps dominates the shape of the accessimpedance.Second, in Section 2.3, since there are very little results known on channelcharacteristics for VPLC in EVs, we presented and discussed results fortransfer function and access impedance from our measurement campaign foran HEV, namely Azure Dynamics BalanceTM. In particular we presented thetransfer function data obtained for the links between five access point suchas VCU, ESS, TMDMOC, DC/DC converter and Relay, which are highlyprobable candidates of future VPLC nodes. Based on the presented channelcharacteristic measurements, access impedances seen from these nodes were642.4. Conclusioncalculated and presented. The results showed the small effect of vehicle stateon the overall access impedance perceived at access points. The range ofimpedance variation proved to be noticeably larger than that observed forthe ICE vehicle measured and reported earlier in this chapter. This effectcould be attributed to the larger and more complex power network andwirings connected to it as well as larger number of electric devices connectedto the power line. To be inclusive of all measured data for both vehicles,the wider range which was obtained for HEV will be used as the base forthe range of changes in impedance considered for designing the adaptiveimpedance matching discussed in the next chapter.Finally, we hope that a methodology similar to what has been presentedin this chapter be adopted in future by other research groups, leading toa broader basis of measurement results, and thus a better understandingof the channel characteristics. Furthermore, to enable others to work withour measurement results beyond what we have presented here, we havemade the measurements available at 3Interface Design - SystemLevel3.1 IntroductionAs described in detail in Chapter 1, impedance mismatch degrades theSNR and thus the signal integrity. Given the variable nature of the ac-cess impedance measured and analyzed in Chapter 2, a conventional fixedmatching circuit will be sub-optimal considering the communication signaltransfer and hence inefficient. To address the issue of variability of theaccess impedance with time and location, caused by time-varying networkloads and signal reflections in the power line, a coupling circuit is neces-sary that is able to flexibly match the impedance between the network andthe VPLC modems. The solution; namely an adaptive impedance matchingsystem, is therefore the subject of this chapter.In this chapter, we present and evaluate a narrowband adaptive impedancematching design that can adjust the matching circuits for each instance ofaccess impedance as monitored by its sensing unit. We consider both match-ing at the transmitter side for signal coupling and at the receiver side for663.2. Our Approach to Matching Problemsignal decoupling, and discuss the simultaneous operation of transmitter andreceiver-side impedance matching. To demonstrate the merit of our design,we use the data obtained in our measurement campaigns elaborated in Chap-ter 2 and test the system under real case scenarios as well as extreme casesof access impedance, namely the boundary values of the measured accessimpedance range. The bandwidth of the matching circuit is also simulatedand other important issues such as adaptation delay are discussed.In Section 3.2, our approach to the matching problem is presented. Sec-tion 3.3 entails the design process and details of each unit in the system.Extensive simulation results are presented and discussed in Section 3.4. Fi-nally, this chapter is concluded by Section Our Approach to Matching ProblemIn this section, we first introduce our approach to solve the matching prob-lem at one end of the communication system. At the transmitter side, thesource and its internal impedance interact with the network, which is rep-resented by its equivalent impedance, i.e., the access impedance. On thereceiver side, the network is represented with its The´venin equivalent circuitand interacts with the receiver’s input impedance. Then, we explain that,based on results from our previous measurement campaigns, matching atone side of the network does not have a significant impact on matching atthe other side in VPLC. Hence, independent matching at the transmitterand the receiver will be a practically meaningful solution for the matchingproblem in VPLC applications.673.2. Our Approach to Matching Problem3.2.1 Impedance Matching at One EndThere are several ways to approach the matching problem, explain and solveit. A useful tool that aids the understanding of the underlying concepts isthe Smith chart. The Smith chart visualizes the location of impedances aswell as the effect of adding various impedances to a network. The matchingproblem is finding a circuit that changes an impedance seen at one of itsports to another impedance at the other port. On the Smith chart thiscircuit can be represented as a path going from a point A, the originalimpedance, to the desired point B, the matched impedance. Fig. 3.1 showstwo different sample paths from a point A to point B. One can find manyother paths connecting these two points. However, a loss-less solution canbe obtained only by traversing constant conductance or constant resistancecontours. This consideration reduces the number of possible paths, but thereare still many options. Another limiting factor to be considered can be thenumber of moves along these contours. Since each move represents a seriesor a parallel non-resistive element in the matching circuit, more moves entailthe use of more components and consequently result in a more complicatedcircuit structure. This also imposes an extra burden to the control logic foradaptation. Therefore, matching with fewer moves (e.g., two for the blacksolid line in Fig. 3.1) is preferred over matching with more moves (e.g., threefor the gray dotted line in Fig. 3.1).Following the above rationale, we adopt a two-move strategy to performthe matching. The first move is along a constant conductance contour toreach the constant resistance contour of the matching target, or along a683.2. Our Approach to Matching ProblemFigure 3.1: Matching problem demonstrated in the Smith chart. From agiven impedance, point A, to the desired impedance, point B, there areseveral paths which could be implemented through a matching circuit. Twosample paths are traced.constant resistance contour to reach the constant conductance contour ofthe matching target. This compensates for the real part of the impedancemismatch. The second move is along the constant resistance or conductancecontour until the matching target is reached, and it thus compensates forthe imaginary part of the mismatch. Constant conductance moves are ac-complished through a parallel inductor or capacitor, and constant resistancemoves are achieved with a series inductor or capacitor.Normalizing the Smith chart with the target impedance, so that it isrepresented by the center point of the chart, Fig. 3.2 shows the perfect-match conductance and resistance circles in red and purple, respectively.Therefore, our first move from any point is to reach one of these circles. Tochoose the path to these circles, the location of the original impedance pointin the Smith chart is important, since it determines the type of element usedfor achieving this move. Whether the original impedance value is inside oroutside one of these circles and whether it is above or below the green line693.2. Our Approach to Matching ProblemFigure 3.2: Smith chart divided into eight regions in order to categorizedifferent movements.shown in Fig. 3.2 also affects the first move and its respective type of elementused for implementing that move. For normalization to a resistive targetimpedance, above and below the green line mean inductive and capacitiveoriginal impedances, respectively. Furthermore, for the regions outside thecircles, the moves are determined by the circle which is closer out of thetwo. Hence, the aforementioned criterion divide the Smith chart into the 8regions shown in Fig. 3.2.For transmitter-side impedance matching, we move from the network ac-cess impedance to the internal impedance of the modem (the target impedance).Depending on the region of the Smith chart into which the access impedancefalls, we apply the combination of elements in the matching circuit shown703.2. Our Approach to Matching ProblemTable 3.1: Combination of elements for the matching circuit to achievematching if network access impedance is in different regions of the Smithchart shown in Fig. 3.1.Transmitter-side matchingRegion Combination1 series inductor followed by a parallel capacitor2 series capacitor followed by a parallel capacitor3 parallel capacitor followed by a series capacitor4 parallel inductor followed by a series capacitor5 parallel capacitor followed by a series inductor6 parallel inductor followed by a series inductor7 series inductor followed by a parallel inductor8 series capacitor followed by a parallel inductorReceiver-side matchingRegion Combination1 parallel inductor followed by series capacitor2 parallel inductor followed by a series inductor3 series inductor followed by a parallel inductor4 series inductor followed by a parallel capacitor5 series capacitor followed by a parallel inductor6 series capacitor followed by a parallel capacitor7 parallel capacitor followed by a series capacitor8 parallel capacitor followed by a series inductorin the top part of Table 3.1. These combinations bring us to the centreof the Smith chart. To reuse the same circuitry for receiver-side matching,the original and the target impedance change their roles, and we need tomove from the centre of the Smith chart (corresponding to the impedanceof receiving modem) to the access impedance point in the Smith chart. Thisis accomplished by traversing the paths from transmitter-side matching inreverse direction, for which the circuit-element combinations are shown inthe bottom part of Table 3.1713.2. Our Approach to Matching Problem3.2.2 Impedance Matching at Both EndsThe VPLC network access impedance is clearly dependent on the loadsconnected to the power harness, which makes it dependent on the state ofthese loads and thus time varying. Measurement results in e.g., 2.6, 2.7 and[12, Fig. 8] show such dependencies as a function of the vehicle ignition state.This means that strictly speaking transmitter and receiver-side matchingshould be performed jointly. However, it is interesting to look at the effectof changing the load impedance at one end (via impedance matching) ontothe access impedance at the other end of the communication link.To this end, we consider S-parameter channel data obtained in our mea-surement campaigns reported in Chapter 2. In particular, we compute thereflection coefficients [41]Γin = S11 +S12S211− S22ΓLΓL (3.1)at the transmitter side of the network, as a function of the reflection coeffi-cient of the load impedance ΓL, andΓout = S22 +S12S211− S22ΓSΓS (3.2)at the receiver side of the network, as a function of the source reflection coef-ficient ΓS. Sij are the measured S-parameters and the relationship betweena reflection coefficient Γ and an impedance Z isΓ = (Z − Z0)/(Z + Z0) , (3.3)723.2. Our Approach to Matching Problemwhere for our measurements [15, 62] the reference impedance Z0 = 50 Ω.For the following, we choose ΓL and ΓS corresponding to the six impedancevalues {0.1, 1, 10, 50, 100, 250} Ω, which cover the whole range for the realpart of access impedances that we have seen in our measurement campaigns.In addition, we consider the case of perfect impedance matching, for which[63]ΓS =B ±√B2 − 4|C|22C , (3.4)whereB = 1 + |S11|2 − |S22|2 − |S11S22 − S21S12|2C = S11 − S∗22|S11S22 − S21S12|, (3.5)and ΓL has the same form as (3.4) with S11 and S22 swapped in (3.5).The effect of changing the termination impedance at one side of theVPLC link according to the seven cases specified above is shown in Table 3.2.We consider four links of a hybrid-electric vehicle measured and reported inChapter 2.3, published in [62], and four links of a combustion-engine vehiclemeasured and reported in Chapter 2.2, published in [15], respectively. Theresults presented are the average and maximum deviations for the sevenscenarios over the frequency range from 100 kHz to 100 MHz.We observe that the effect of changing the load at one end of the linkonto the other end is overall fairly moderate. Even the maximum change isonly in one case more than 10%, which is due to deep notches seen in thechannel transfer function. These results suggest that performing impedancematching independently at the transmitter and the receiver side should notincur notable performance penalties compared to the joint matching at both733.3. System DesignTable 3.2: Effect of termination at one end of a VPLC link on the other endfor several measured links. Average (Avg.) and Maximum (Max.) changefor seven termination impedances.Link (from Chapter 2, published in [15, 62]) Effect on Γin (%) Effect on Γout (%)Avg. Max. Avg. Max.VCU-TMDMOC 0.08 1.41 0.09 2.11VCU-DC/DC 0.005 0.67 0.002 0.13DC/DC-TMDMOC 0.01 0.11 0.03 0.71HVBat-TMDMOC 0.42 6.61 0.19 4.58Average for [62] 0.13 6.61 0.08 4.58Bat-Cigar 0.05 1.25 0.11 1.13Bat-Trunk 0.08 3.44 0.18 12.44Bat-Tail-R 0.02 0.61 0.05 3.56Bat-Front-L 0.07 1.80 0.20 3.74Average for [15] 0.06 3.44 0.14 12.44Total Average 0.10 6.61 0.11 12.44ends of the link. Since the latter would require the exchange of accessimpedance measurements, we prefer and pursue the independent matchingapproach in the following.3.3 System DesignHaving established the basic principles of our approach to impedance match-ing, in this section the details of the matching system will be explained.3.3.1 Basic Structure and OperationThe block diagram of the proposed adaptive impedance matching system isshown in Fig. 3.3. It is implemented at the transmitter and receiver sideand each system consists of three main units: measurement unit, impedancematching unit and control unit. To enable the matching, we assume that743.3. System Designthe communication device sends a tone at a frequency of fc, which is thecentre frequency for the band in which impedance matching is to be achieved.When the measurement unit is settled, the control unit adjusts the matchingcircuit elements in the matching unit.The impedance adjustment values for a certain device can be different de-pending on whether transmitter-side or receiver-side matching is performed.Hence, a device could have two different matching units, one for transmis-sion and one for reception. Alternatively, the same matching unit can beused but its setting would change from transmission to reception. Aftersetting the values in the matching unit, devices go to their normal state oftransmission or reception of data.Generally, adaptation of the matching circuit can be done periodically, oron demand when transmitting or receiving data. Specifically, for the adapta-tion on the receiver side, the receiver needs to send some test signal in orderto determine the network impedance and perform the matching accordingly.Therefore, while performing the matching at the receiver side, since the re-ceiver has to send the test signal, it can not be receiving communicationsignals. Due to this requirement, matching on the receiver can not be doneon-line but based on demand, whether this demand is set periodically oroccasionally according to the communication scheme.For the transmission side however, the transmitting communication sig-nal can be used for the purpose of measuring the access impedance of thenetwork as well. Therefore, as long as the amplitude of the transmittedsignal is known to the matching system, adaptive matching can be per-formed on-line and at the same time as the actual communication. On-line753.3. System DesignFigure 3.3: Block diagram of the proposed adaptive impedance matchingsystem for the transmitter and receiver side. Zt and Zn are the sourceimpedance at the transmitter and network access impedance seen from thereceiver, respectively. Z∗t and Z∗n indicate the desired impedance matchingat the transmitter and receiver, respectively.adaptation concurrent with communication is particularly suitable for com-munication schemes where there is no amplitude modulation. Even though,theoretically the knowledge of amplitude suffices for the matching system toperform, due to latency of the impedance measurements and time-responseof the entire system, on-line adaptation concurrent with communicationsusing amplitude modulation will lead to extensive complications in calcula-tion. Therefore, on-line adaptation concurrent with communication schemesusing amplitude modulation is not favorable and matching on-demand ispreferable. The matching on-demand can be done either periodically oroccasionally according to what communication system needs and dictates.3.3.2 Measurement UnitThe measurement unit senses physical parameters and provides this infor-mation to the control unit for decision making. It also performs a smallamount of pre-processing to provide appropriate inputs for the control unit.Fig. 3.4 shows the structure of the measurement unit, which can be dividedinto the sensing unit and the interpretation unit.763.3. System DesignFigure 3.4: Block diagram of the measurement unit consisting of the sensingand interpretation units.The details of the sensing unit are shown in Fig. 3.5. A very small resistor(e.g. 0.1 to 1 Ω) is used for sensing, and two op-amps amplify the sensedsignals. One op-amp measures the voltage across the resistor, from whichthe current going through it, Is is obtained. The other op-amp measures thevoltage between the input node and the reference node (ground), VS. Giventhe single-tone signal, we haveVS(t) =√2Venv cos(2pifct+ φ) (3.6)Is(t) =√2Ienv cos(2pifct) . (3.7)The interpretation unit is supplied with the voltage and current signalsgenerated by the sensing unit and outputs four control signals, Venv, Ienv,Pact and Bsign, that are used by the control unit (see Fig. 3.3). Venv andIenv are the envelop values of the measured voltage and current signals in(3.6) and (3.7), and generated by the circuit shown in Fig. 3.6. Multiplying773.3. System DesignFigure 3.5: Circuit-level block diagram of the sensing unit.Figure 3.6: Envelop detecting circuit used in the interpretation unit. Forthis work the values were selected as Rf = 1 kΩ and Cf = 1.4 pF.VS and Is gives the instantaneous source powerPs(t) = 2KVenvIenv cos(2pifct+ φ) cos(2pifct)= KVenvIenv [cos(2pi(2fc)t+ φ) + cos(φ)] , (3.8)where K is a constant denoting the overall gain of the multiplier circuit.This is followed by low-pass filtering, which provides the active-power mea-surement (“∗” denotes convolution)Pact(t) = (hLP ∗ Ps)(t) , (3.9)783.3. System DesignFigure 3.7: Second order low-pass RC filter for providing active power mea-surement Pact. For this work the values were selected as Rfil = 10 kΩ andCfil = 6 pF.Figure 3.8: The circuit used to discern capacitive versus inductive loadsbased on zero crossings. The output is “1” if the load is capacitive and “0”if inductive.which converges to KVenvIenv cos(φ). The circuit-level block diagram for theactive-power measurement is shown in Fig. 3.7. Finally, Bsign is a Booleanvariable that indicates whether a load is inductive (Bsign = 0) or capacitive(Bsign = 1). The circuit shown in Fig. 3.8 generates Bsign by comparing thevalues of voltage and current at their zero crossings.3.3.3 Matching UnitAs explained in Section 3.2.1, an arrangement of L-structured inductorsand/or capacitors can perform the impedance matching leading to the max-imum active power transfer between the modem and the network. Fig. 3.9shows the corresponding circuit structure that can be used for this impedancematching. This unit turns the bias voltages BL, BR, and BM into the actual793.3. System DesignFigure 3.9: Circuit structure of the matching unit (see Fig. 3.3).capacitance and inductance values according toLP = Z02pifcVB, (3.10)CP = VB2pifcZ0, (3.11)LS = VBZ02pifc, (3.12)CS = VBZ02pifc, (3.13)where Z0 = 50 Ω and VB is to be substituted by BL, BR and BM accordingto Fig. 3.9. The bias voltages and switches shown in Fig. 3.9 are adjustedby the control unit described next.3.3.4 Control UnitThe control unit (see Fig. 3.3) uses the input from the measurement unit toprovide the matching unit with control signals that determine the state of theswitches as well as the normalized values of the components in the matching803.3. System Designcircuit shown in Fig. 3.9. This is done by determining the access impedance’sposition in the Smith chart, considering the eight different regions in Fig. 3.2.First, using the Bsign signal provided by the measurement unit, we deter-mine whether the measured impedance is inductive or capacitive (above orbelow the green line in Fig. 3.2). Next, we determine whether the impedanceis in the left or right-hand side half of the Smith chart, i.e., left or right ofthe black line in Fig. 3.2. Writing real and imaginary parts of the reflectioncoefficient Γ = a+ jb, we haveZ = Z01 + Γ1− Γ = Z01 + a+ jb1− a− jb⇒ |Z| = VenvIenv= |Z0|(1 + a)2 + b2(1− a)2 + b2⇒ VenvIenv≶ |Z0| ⇔(1 + a)2 + b2(1− a)2 + b2 ≶ 1⇔ a ≶ 0(3.14)where the reference impedance Z0 is the impedance of the transmitter/receiver-modem for transmitter/receiver-side matching. Hence, if Venv/Ienv is smallerthan the impedance of the modem, then the measured access impedance islocated in the left half of Smith chart and vice-versa.Finally, we need to determine whether the impedance lies inside or out-side of the perfect-match circles shown in purple and blue in Fig. 3.2. Start-ing with the right circle, it can be seen that all the impedances inside thecircle have real parts that are larger than that of the modem. Similarly,admittance values inside the left circle have real parts that are larger thanthat of the modem. We obtain these real parts from the measured quantities813.3. System DesignTable 3.3: Logic to determine location of impedance in the Smith chartbased on the measured variables.Bsign (Venv/Ienv)/|Z0| Z ′r, Y ′r Region‘1’≥ 1 Z′r ≥ 1 5Z ′r < 1 6< 1 Y′r ≥ 1 8Y ′r < 1 7‘0’≥ 1 Z′r ≥ 1 4Z ′r < 1 3< 1 Y′r ≥ 1 1Y ′r < 1 2asZr = Pact/I2env (3.15)Yr = Pact/V 2env (3.16)and compare them to the real parts of the modem impedance and ad-mittance, Zr,0 and Yr,0. That is, we compare the normalized quantitiesZ ′r = Zr/Zr,0 and Y ′r = Yr/Yr,0 to one.Table 3.3 summarizes how we determine the location of the impedancein the Smith Chart. This provides the control unit with all the necessaryinformation regarding the type of moves and their respective order, direc-tions and signs. Together with the matching steps described in Table 3.1,this leads to the logic for the switches in the matching unit in Fig. 3.9. Thislogic is shown in Table 3.4 for the transmitter and the receiver side. The bitstream from Most-Significant Bit (MSB) to the Least-Significant Bit (LSB)shows the status of each switch in the following order: SLSw, SLIn, SLCp,SMIn, SMCp, SRIn, SRCp, SRSw.823.3. System DesignTable 3.4: Logic table for the switches in the matching unit of the transmit-ter and the receiver side. The bit stream represents the status of switchesin following order from MSB to LSB: SLSw, SLIn, SLCp, SMIn, SMCp, SRIn,SRCp, SRSw. “0” represents the open-circuit state of the switch, “1” is theshort-circuit state, and “X” represents the “Don’t care” state.Region Switches at Tx Switches at Rx1 “1XX01100” “00110XX1”2 “1XX01010” “01010XX1”3 “01001XX1” “1XX10100”4 “00110XX1” “1XX01100”5 “01001XX1” “1XX10010”6 “01010XX1” “1XX01010”7 “1XX10100” “00101XX1”8 “1XX10010” “01001XX1”The values for the capacitor and inductor elements are also decided bythe control unit. To find a relation between inputs, i.e., measured param-eters, and assigned values for each element of the matching circuit, themagnitudes of the phase changes (i.e., lengths of moves in the Smith chart)needs to be determined. For transmitter-side matching, this means that firstthe magnitude of the phase change that is necessary to arrive to the respec-tive perfect-match circle of resistance or conductance is estimated. Then,the magnitude of the phase change necessary to move from this new pointon the perfect-match circle to the center (i.e., the perfect match point) isdetermined. For receiver-side matching, the calculations are the same, butin reverse order. The reason for this change of order is that the matchingunit needs to move first from the center towards the target impedance onthe perfect-match circle and then to the location of the access impedance.To be specific about how we estimate the lengths of the moves, assume833.3. System DesignFigure 3.10: Illustration of matching an impedance at point A in the Smithchart.that for the transmitter-side, we aim to match an access impedance locatedat point A in the right-hand side of the Smith chart as shown in Fig. 3.10.The first move needs to change the susceptance from −0.1 at point A to −0.4at point B on the perfect-match circle. We approximate the relation betweenthe susceptance y of the target point B and the normalized conductancex = Y ′r of the access impedance point A by the second order polynomialexpressiony = 0.01 + 2.15x− 2.15x2 . (3.17)The magnitude of susceptance change needed for the first move is thus cal-culated as∆mov1 = |Y ′i − y|, (3.18)where Y ′i =√|Y ′|2 − Y ′r 2.To move from point B to the destination point C, the value of the reac-tance needs to be changed to zero. The magnitude of this move can also beestimated based on the value of reactance on the perfect match resistancecircle, at each conductance circle, i.e., for each x = Y ′r . For this purpose, we843.4. Simulation Resultsuse the third order polynomial∆mov2 = 4.1− 13.2x+ 18.5x2 − 9.4x3 (3.19)to estimate the reactance at each conductance circle and thus the length ofthe second move.Due to the symmetry of the Smith chart, the previous explanation canbe applied to the left half of the Smith chart. Impedance and admittancewill change place and thus the same polynomials could be used, given thatthis time x = Z ′r and ∆mov1 = |Z ′i − y|.The control unit adjusts the values of the bias voltages according to∆mov1 and ∆mov2 and passes them to the matching unit, where the capaci-tance and inductance values are set following Eqs. (3.10) to (3.13).3.4 Simulation ResultsThe proposed impedance matching system was modeled behaviorally, de-scribed in VHDL-AMS and simulated in Cadence. In this section, we firstdescribe the access impedance settings we used for our experiments and thenpresent and discuss simulation results. To gain insight into the performanceof the matching circuit, three types of simulations results are presented:transmitter-side stand-alone matching, receiver-side stand-alone matching,and concurrent transmitter-side and receiver-side matching.853.4. Simulation Results3.4.1 Test ParametersThe shaded area of the Smith chart in Fig. 3.11 shows the range of possibleaccess impedances for the frequency range of 1 MHz to 100 MHz, measuredfor two different vehicles, reported in detail in Chapter 2 and publishedin [15, 62]. Since reference impedance is Z0 = 50 Ω, the plotted rangecorresponds to impedances from ≈ 0 Ω to 250 Ω for the real part and −175 Ωto +150 Ω for the imaginary part, respectively. In order to evaluate theperformance of the impedance matching under different scenarios, the accessimpedance points, shown in Fig. 3.11, have been selected for simulations.Given the selected impedance values, the matching circuit is simulated atdifferent frequencies.Furthermore, bandwidth simulations were performed in order to evaluateperformance of the circuit when operated around the carrier frequency fc.For these tests, the impedance matching was performed at frequency fc, andthen, with matching disabled, the signal frequency was altered around fc toevaluate the bandwidth performance. Table 3.5 lists the four center frequen-cies and frequency bands that have been tested and the results are presentedin Sections 3.4.3 and 3.4.4. For each of them, three access impedance val-ues were assumed, according to the maximum, one-tenth of the maximum,and average impedance for the corresponding frequency fc, as measured inour measurement campaigns and presented in Chapter 2 . To model theimpedances for the entire tested band, we used passive elements (resistorsand inductors) with fixed values. The real part of the impedances in Ta-ble 3.5 gives the resistance values and the inductances are the imaginary863.4. Simulation ResultsFigure 3.11: Colored area shows the access impedance range for VPLCapplications for frequencies between 1-100 MHz presented in Chapter 2 andeach dot represents a test point. The values on the chart are normalized to50 Ω.parts divided by 2pifc.Finally, for simulations of concurrent transmitter-side and receiver-sidematching in Section 3.4.5, we used the S-parameters of the links as mea-sured in our campaigns and reported in Chapter 2 to emulate the networkcharacteristics.3.4.2 Time-Domain Illustration of MatchingWe first illustrate the effect of transmitter-side impedance matching by con-sidering the instantaneous power signal Ps(t) from (3.8) at the transmitterside. Fig. 3.12 shows Ps(t) for an access impedance of 10 Ω and (75−j175) Ω,873.4. Simulation ResultsTable 3.5: Parameters for bandwidth simulations.fc Tested band Access Impedance at fc [Ω][MHz] [MHz] Maximum Maximum/10 Average10 7.5-12.5 100 + j60 10 + j6 10 + j2030 25-35 100 + j45 10 + j4.5 20 + j2550 40-60 260 + j60 26 + j6 40 + j4080 65-95 150 + j140 15 + j14 75 + j30respectively. The matching is activated at t = 150 ns. We observe that aftert = 150 ns, the adaptive impedance matching system adjusts the matchingcircuit such that it improves the power transfer from the source into thenetwork. Whereas for the case of the 10 Ω access impedance (top graph inFig. 3.12) the power envelope, i.e., VenvIenvhas increased after matching, inthe other case (bottom graph in Fig. 3.12), the active power is increasedmostly due to better matching of the phase.Fig. 3.13 illustrates the transmitter-side and receiver-side matching fora communication link by showing the instantaneous and active signal powerreceived by the receiver of the communication link. To model the link, weapply the S-parameters for the VCU-DC/DC link from Section 2.3.As described in Section 3.3.1, the system uses a preamble signal to per-form the matching.First, the transmitter sends the test signal and performsthe matching at t = 1 µs. As we can see in the left sub-plot of Fig. 3.13, thepower transmitted to the receiver increases due to the larger power insertedinto the network from the transmitter side. Second, the test signal is sentfrom the receiver side at t = 2 µs. In the middle sub-plot of Fig. 3.13, thepower received at the receiver is negative since the receiver is injecting powerduring this period. Note that the different y-axis scale for this sub-plot is883.4. Simulation ResultsFigure 3.12: Illustration of impedance matching considering instantaneouspower Ps(t) from the source into the network with an access impedance of10 Ω (top) and (75 − j175) Ω (bottom), respectively. Impedance matchingis activated at t = 150 ns.due to the signal being measured before it undergoes channel attenuation.Matching at the receiver is afterwards performed at t = 3.2 µs. Finally, thesystem goes into operation mode where communication could be performedat t = 4 µs (right sub-plot). Overall, the power transfer from the transmit-ter to the receiver is tripled after both matching circuits have been adapted(after t = 4 µs) compared to the original state without matching (beforet = 1 µs).We note that the active power, shown in Fig. 3.13 is Pact(t) in (3.9) asprovided by the measurement unit. We observe that it takes about 0.5 µsfor the measurement circuit to settle to its final value, which determines the893.4. Simulation ResultsFigure 3.13: Illustration of transmitter-side and receiver-side matching forVCU-DC/DC link. Curves are the power received at the receiver side ofthe communication link. Transmitter performs matching at t = 1 µs (leftsubplot). Receiver sends a test signal at t = 2 µs to perform matching,which happens at t = 3.2 µs (middle sub-plot). Finally, at t = 4 µs, thesystem goes into the data-transmission mode (right sub-plot).time that is required for the matching process.3.4.3 Transmitter-side MatchingWe now present results for the transmitter-side matching, given the accessimpedance range discussed in Section 3.4.1. The source impedance of thecommunication transmitter is set to 50Ω.Fig. 3.14 shows the normalized active power, transmitted into the net-work with and without impedance matching, for different frequencies andaccess-impedance values. Normalization is with respect to the active powerwhen optimal matching is applied, i.e., a normalized active power of one isthe best possible performance. The top and bottom sub-figures in Fig. 3.14are for inductive and purely resistive access impedances, respectively. We903.4. Simulation ResultsFigure 3.14: Normalized active power transferred into the network as a func-tion of frequency with (solid lines) and without (dashed lines) transmitter-side impedance matching for different access impedances. Top: inductiveaccess impedance. Bottom: purely resistive access impedance.observe that for most access-impedance values, impedance matching signif-icantly improves the active power transfer, and that this applies for thefrequency values sampled from a wide range. The exception is the very lowresistance case of 2.5 Ω, for which matching does not show an improvement.We attribute this to rapid changes of the values needed for compensationat the low resistance end of the Smith chart, which causes larger estimationerrors from fitting susceptance and reactance changes (estimated by (3.17),913.4. Simulation ResultsFigure 3.15: Normalized active power transferred into the network as afunction of resistance for purely resistive access impedance. Frequency fc =50 MHz.(3.18), (3.19)). We also note that a wrong estimation in the first move coulditself lead to a degraded matching, regardless of the quality of the secondmove. For all other impedance cases though, matching can improve thepower transmission to about 70% and more of the ideally matched case.Further insight into the performance of our impedance matching solu-tion is provided through Fig. 3.15, which shows the normalized active powertransfer as a function of the resistance of a purely resistive access impedanceat a frequency of fc = 50 MHz. We observe that impedance matching con-sistently improves performance, but the gap to the ideal matching increasesdrastically for access impedances below about 8 Ω. This could be improvedby providing better estimation functions than Eqs. (3.18) and (3.19), e.g.,by using a higher-order polynomial expression. We also note that the di-mension of the sensing resistor in the measurement unit is critical especiallyfor access impedances with very low resistance. To avoid potential perfor-mance degradation because of distorted measurements, the sensing resistor923.4. Simulation ResultsFigure 3.16: Normalized active power transferred into the network as a func-tion of frequency with (solid lines) and without (dashed lines) transmitter-side impedance matching. Bandwidth results of the impedance matchingfor the test cases specified in Table 3.5.was chosen equal to 0.1 Ω.Finally, Fig. 3.16 shows the results of the bandwidth simulations ac-cording to the parameters specified in Table 3.5. It is observed that thematching system shows an overall fairly flat in-band behavior. Even wherethere are notable changes in frequency-response due to deviation from thematching frequency fc, still significant improvements of signal-power trans-fer compared to transmission without matching are achieved. In particular,active power transmitted into the network with matching is always within30% of the ideal condition. Therefore, once fixed and adjusted at a centerfrequency, under such conditions the matching circuit can be considered asa candidate for improving the matching in systems with more broadbandsignal transmission as well.933.4. Simulation Results3.4.4 Receiver-side MatchingThe second set of results belong to the receiver-side matching. For thesetests, the impedance of the communication receiver is assumed to be 50 Ω.Fig. 3.17 shows the performance, again in terms of normalized power trans-fer, here from the network into the communication receiver, as a functionof frequency and for different capacitive access impedances (top sub-figure)and as a function of the resistance of a purely resistive access impedanceat fc = 50 MHz (bottom sub-figure). We observe that in all cases, theamount of signal power extracted from the network is greatly improved andapproaches that of ideal matching or within 30% thereof. A notable simi-larity to the results from the previous section, transmitter-side matching, isthe degradation of the transferred power at low-resistance impedances forsimilar reasons.3.4.5 Matching at Both Ends of the Communication LinkIn this section, we show the active power transfer from the transmitterof the communication system to the receiver when the proposed adaptiveimpedance matching is performed at both ends of the communication link.To evaluate the performance of the system under realistic circumstancesof VPLC, the S-parameters obtained in our measurement campaigns, re-ported in Chapter 2, were used to describe the network. Fig. 3.18 showsthe receiver’s active power for transmission with and without matching as afunction of frequency for four links. We note that the fluctuation of curveswith frequency is due to the frequency-dependent channel attenuation ob-943.4. Simulation ResultsFigure 3.17: Normalized active power extracted from the network with andwithout adaptive impedance matching at the receiver side. Top: Differentcapacitive access impedance, results with (solid lines) and without (dashedlines) receiver-side matching as a function of frequency. Bottom: Perfor-mance as a function of resistance for a purely resistive access impedanceand fc = 50 MHz.served in Chapter 2 (e.g., see Figs 2.14-2.18), which affects the receivedpower. Comparing the results for “with” and “without” matching, we ob-serve improvements between 1 dBW to 10 dBW in the received power. Inother words, up to about 10 times more signal power reaches the receiverdue to matching.To further investigate the distinct effect of matching at each end of thelink, Fig. 3.19 shows the received active power for the cases of no matching,953.4. Simulation ResultsFigure 3.18: Active power at the receiver as a function of frequency with(solid lines) and without (dashed lines) impedance matching for four differ-ent communication links. In all cases transmitter is a voltage source withan amplitude of 50 mV and both transmitter and receiver have a 50 Ωresistance.Figure 3.19: Active power at the receiver as a function of frequency with(solid lines) and without (dashed line) impedance matching for the Bat-Tail-R link. Transmitter-side matching (“Tx only”), receiver-side matching(“Rx-only”), and concurrent transmitter- and receiver-side matching (“TRxMatching”) are considered. In all cases transmitter is a voltage source withan amplitude of 50 mV and both transmitter and receiver have 50 Ω resis-tance.963.4. Simulation Resultsonly transmitter-side matching, only receiver-side matching, and concurrenttransmitter-side and receiver-side matching for one of the links in Fig. 3.18(the Bat-Tail-R link, Section 2.2). We observe that for most of the frequencyvalues the concurrent matching offers the best performance. The contribu-tions from matching at each end of the link is frequency-dependent though,which is due to the different S-parameters and thus access impedances fordifferent frequencies at different sides. Furthermore, in a few instances,we note that only the transmitter-side matching would result in somewhathigher received power than matching at both ends. In these cases, anotheradjustment of the matching circuit at the transmitter, after adjustment ofthe receiver-side matching, would be beneficial.Finally, the results for bandwidth simulations are shown in Fig. 3.20.Here, we selected the Bat-Front-L link (the measurements of which wereFigure 3.20: Active power transferred from the transmitter to the receiveras a function of frequency with (solid lines) and without (dashed line)impedance matching for the Bat-Front-L link. Matching is adjusted at thefrequency points fc = {12, 23, 45, 78}MHz. In all cases transmitter is a volt-age source with an amplitude of 50 mV and both transmitter and receiverhave 50 Ω resistance.973.5. Conclusiondescribed in Section 2.2), also considered in Fig. 3.18. Matching is done forthe frequency points fc = {12, 23, 45, 78} MHz and tested in a bandwidthof about 0.2fc around the fc value. It is observed that, in most cases, thematching adjusted at the center frequency of matching leads to an improvedpower transmission over a wider range around the center frequency. Onlyfor the case of adjusting the matching at fc = 45 MHz and operating atabove 55 MHz, we note a loss in the received power, due to matching net-work mismatch. Also, we observe that changes in the power transmissionover frequency are often smoother and/or better bounded after matching isapplied. Hence, the proposed matching also improves relatively broadbandtransmission.3.5 ConclusionAs elaborated in Chapter 1, PLC over the automotive power harness wouldbenefit from impedance matching at the transmitter and the receiver. Specif-ically, due to the variation of the channel over location and time, adaptiveimpedance matching is required. In this chapter, we presented a design ap-proach for such an adaptive impedance matching system. It includes theactual matching circuitry and a sensing and a control unit to adjust thecircuit components. The details of the design were presented, followed bydemonstrations of the system performance using simulations for realistic testscenarios. Our numerical results demonstrated that under a wide range ofconditions, the proposed design achieves signal-power transfer close to thatof optimal matching. Overall power transfer gains achieved due to match-983.5. Conclusioning can be up to about 10 dBW. Furthermore, although our design is fornarrowband transmission, it often, nonetheless, improves the performancefor transmission around the nominal matching frequency as well.99Chapter 4Interface Design -Suggestions for CircuitBlocks4.1 IntroductionIn the previous chapters, the characteristics of the channel were extractedfrom measurement and based on the results an adaptive impedance matchingsystem was designed and discussed. Due to size, weight, and cost constrainsimposed by vehicular applications, it is desirable for the system to be imple-mented as a System on Chip (SoC), i.e., on an IC platform. In this chapter,the following criteria are considered as the main priorities for the design anddevelopment of the suggested circuit blocks.• suitability for monolithic implementation.• compactness and small die-area which leads to a lower fabrication cost.• ability to cover a wide frequency range of operation within the fre-quency range of the interest in VPLC applications.1004.2. Op-Amp DesignThe block diagram of the proposed adaptive impedance matching systemand how it breaks down to different units is presented in Chapter 3. In thischapter, we suggest structures for various building block of the system. Webegin with an op-amp structure, which is one of the main building blocksof the system. Then, circuit designs for different units of the system will bediscussed. As a follow up to the top-down view of the system, presented inChapter 3, in this chapter, a bottom-up perspective is presented.The proposed op-amp uses a simple compensation method to achieve awide bandwidth. We also introduce a structure for implementation of activeinductors which are used to emulate variable inductors. Variable inductorsare among the essential components of the Matching Unit.The rest of this chapter is organized as follows: Section 4.2 describesthe suggested op-amp design. Section 4.3 will include details of suggestedcircuits for the Measurement Unit of the system. Section 4.4 describes thecircuit blocks of the Control Unit whereas circuits designed for MatchingUnit are explained in Section 4.5. Finally, Section 4.6 concludes this chapter.4.2 Op-Amp DesignIn this section, an op-amp structure, which is needed for various buildingblocks of the system, is proposed. The proposed op-amp uses a new com-pensation method that increases the bandwidth of operation and improvesits robustness against supply and ground noise.1014.2. Op-Amp Design4.2.1 IntroductionOperational amplifiers have widespread applications in various analog andmixed-signal integrated circuits such as buffers, filters, and switched-capacitorcircuits. Op-amps are also used in various building blocks of the proposedadaptive impedance matching system. In what follows, the importance ofop-amps and the proposed structure developed for improving their perfor-mance are discussed.A two-stage CMOS op-amp is a popular op-amp topology (see Fig.4.1(a)) as it is simple and offers a relatively high gain, a high output swingand a robust operation once it is properly designed [64]. Op-amps are of-ten used in a feedback system and thus require a compensation techniqueto guarantee their stability. Compensation techniques typically modify thetransfer function of the op-amp so that the op-amp operation is stable overthe frequency band of interest.Among the various compensation techniques such as Miller [65, 66],nested Miller [67, 68], or reversed nested Miller [69, 70], the most commonlyFigure 4.1: Generic two-stage CMOS Op-Amp circuits with: (a) conven-tional Miller compensation technique and (b) proposed compensation tech-nique.1024.2. Op-Amp Designused technique for a two-stage op-amp is the Miller compensation. In thistechnique, compensation is achieved by adding an extra capacitor (Cc) be-tween the input and output of the second gain stage (M6 in Fig. 4.1 (b)).The Miller effect increases the value of the perceived capacitance at the in-put of the second gain stage by a factor that is approximately equal to thegain of the second stage [64], thus, typically the frequency of the dominantpole is set by the value of the compensation capacitor. Furthermore, as thevalue of the Cc increases, the frequency of the dominant pole decreases, andthe frequency of the first non-dominant pole increases (pole splitting).The use of the Miller compensation capacitor introduces a Right-HalfPlane (RHP) zero which could have adverse effects on the phase of thesystem (non-minimum phase system) and if not accounted for, reduces thephase margin. This zero is due to the feed-forward path through the com-pensation capacitor. In order to cancel or move this zero to satisfy thephase margin requirements, an extra resistor can be added in series withCc. This resistor is typically implemented by a properly biased Metal OxideSemiconductor (MOS) device that operate in the triode region.Furthermore, the conventional Miller compensation technique typicallyreduces the 3-dB bandwidth and Unity Gain Bandwidth (UGB) of theop-amp and degrades its Power Supply Rejection Ratio (PSRR) [71].In this work, we introduce an alternative and simple compensation schemefor a two-stage CMOS op-amp. The proposed technique achieves a signifi-cantly higher 3-dB bandwidth and UGB as compared to the standard Millercompensation technique with the same compensation capacitance. In termsof PSRR, the proposed technique offers improvements as compared to other1034.2. Op-Amp Designvariants of compensation. Furthermore, the bandwidth, UGB, and PSRR ofthe proposed compensated op-amp approach those of the non-compensatedop-amp and at the same time it offers a significantly improved phase margin.4.2.2 Proposed Compensation TechniqueIn the proposed technique, the compensation capacitor, Cc, is added betweenthe gate and source of M6 to create a dominant pole independent of thecapacitance of the load. However, since adding this capacitor would resultin a capacitive path from the supply (VDD) noise to the gate of M6, it woulddegrade the PSRR+. To ameliorate this effect, a series resistor (Rc) isadded to the compensation circuit. This resistor can be implemented by aproperly biased MOS device. The in-band gain of the proposed structure iscalculated as (assuming Rc  r′o)Av =VoVi≈ −(gm)1 · (gm)6 ·r′o · (Rc · Ccs+ 1)r′o · Ccs+ 1[(ro)6 ‖ (ro)7 ‖1CLs] (4.1)where r′o is the equivalent output resistance of the first stage and is givenby r′o = (ro)1 ‖ (ro)3. The dominant pole of the proposed structure isPdom =1r′o · Cc, (4.2)which can be set by Cc and has a (gm)6 · (r′o)2 times higher frequency com-pared to the dominant pole of the conventional Miller structure, namely,PMiller =1(gm)6 · (r′o)2 · r′o · Cc, (4.3)1044.2. Op-Amp DesignIt should be noted that (r′o)2 in Eq. (4.3) is the equivalent output resistanceof the second stage of the op-amp, given by (r′o)2 = (ro)6 ‖ (ro)5.Both systems have one zero as well as two other poles (one in-band ornear UGB and one out of band). The out of band pole of both circuits,which is designed to be located far from UGB, is approximated byPout =1RcCI(4.4)where Rc is the compensation resistor and CI is the equivalent capacitanceseen from the gate of M6 to ground.In the conventional Miller approach, it is desired that the zero and thenon-dominant low frequency pole be designed such that they cancel eachother out and the system behaves as a system with two poles [71, 72]. Thepossibility of this cancellation makes this method very attractive [64]. Sincethe out-of-band pole is far from UGB, in the band of interest, the system canbe approximated with a first order system (having only one effective polein-band) and monotonic phase changes. Hence, by moving the dominantpole to lower frequencies, because of earlier drop of the gain, larger phasemargins can be obtained. However, due to process variations which in turnaffect proper cancellation, it is hard to implement it in practice [71].In the proposed method the zero,z = 1RcCc(4.5)is located close to UGB frequency by selecting a proper Rc. Since the zero is1054.2. Op-Amp Designlocated at higher frequencies in this method, smaller capacitor and resistorare needed. In terms of phase changes, this method creates a peak in thephase response of the system in the vicinity of the UGB and hence providesa phase margin of around 45◦.Larger phase margins can be obtained by locating the second pole ornon-dominant pole of the proposed system, i.e.,Pn−dom =1(r′o)2CL. (4.6)closer to the UGB which imposes certain restrictions on the load by limitingthe CL. Therefore, the designer needs to make a compromise between thephase margin and the load capacitance, tailored to the requirements of thespecific application of the op-amp.In terms of PSRR+, the two circuits are substantially different as welland the proposed circuit shows a considerably better performance. Thesmall-signal model of the first stage of the proposed structure (Fig. 4.1 (b))for PSRR+ calculation is shown in Fig. 4.2 (a). Using this small-signalmodel, the effect of the proposed compensation on the (vgs)6 of the proposedstructure is(vsg)M6Vdd= (Gm · r′o + 1) · (Rc · Ccs+ 1)(RD ‖ ro +Rc) · Ccs+ 1. (4.7)where Gm = (gm)3 +(1/(ro)3) and RD is the equivalent resistance of the firststage from the drain of M3, given by (gm)1 · (ro)7 · (ro)1. Based on Eq. (4.7),1064.2. Op-Amp DesignCCRDro_++gm · vgsIinVinro1/gm RDGm · Vin r0oCCGm · Vin r0o(a)(d)(c)(b)RCVinRC_+gm · vgs (ro)6 (ro)5 CLVin(e)Figure 4.2: PSRR analysis of the proposed two-stage CMOS Op-Amp; (a)small-signal model of the first stage, (b) simplified model of the first stage,(c) & (d) (e) effect of perturbations in positive power supply through firststage, compensation branch and output stage, respectively (used for thepurpose of superposition).the PSRR+ of the proposed architecture is1PSRR+Prop.≈− (gm)7 ·(Gm · r′o + 1) · (Rc · Ccs+ 1)(RD ‖ ro +Rc) · Ccs+ 1· [(ro)5 ‖ (ro)6 ‖1CLs]. (4.8)The main difference between conventional Miller compensation and the pro-posed approach in relation to PSRR+ is the frequency range of rejection.1074.2. Op-Amp DesignConsidering the fact that (r′o = RD ‖ ro ≈ (gm)1 · (ro)7 · (ro)1 ‖ (ro)3) Rc)the dominant pole of the PSRR+ of the proposed architecture (referring toFig. 4.2 (c) to (e)) is derived as:PSRR+Prop.(pole) =1Rc · Cc. (4.9)In comparison, the location of the dominant pole of the PSRR+ for theconventional Miller structure isPSRR+Miller(pole) ≈12A2DC · r′o · Cc,(4.10)where A2DC represents the DC gain of the second stage.Comparing Eq. (4.9) and Eq. (4.10), and assuming a similar compensa-tion capacitor, the proposed architecture has a higher-frequency dominantpole which leads to a wider frequency range of rejection for PSRR+. Thisin turn translates into an enhanced PSRR+. Given the similarity of bothstructures in terms of PSRR−, we conclude that the proposed architecturehas a better performance in terms of overall PSRR.4.2.3 Simulation ResultsTo evaluate and compare the performance of the proposed compensationscheme with that of conventional Miller approach, three 2-stage CMOSop-amps are designed; one without compensation, one with the conventionalMiller compensation, and one with the proposed compensation technique.Since the compensation capacitor plays an important role in both techniques,1084.2. Op-Amp DesignFigure 4.3: Frequency response simulation results of the circuits under study.the structures are implemented using the same compensation capacitance.Except for the value of the compensation resistor, all three circuits are keptthe same. The circuits are designed in a 0.13-µm standard CMOS processand simulated using Cadence.Fig. 4.3 shows the frequency response of the op-amps. As it can be seen,the proposed architecture achieves a unity gain frequency of approximatelytwice that of the conventional Miller method. More importantly, the 3-dBfrequency of the proposed system is more than seven times of that of theconventional Miller structure which is a significant improvement, particu-larly, for open-loop applications. It should be noted that the improvementin the gain of the system has been achieved at the cost of 11◦ of phasemargin. The proposed compensated op-amp has a gain frequency responsevery close to its uncompensated counterpart but with an improved phaseresponse to the extent that its phase margin is closer to that of the op-amp1094.2. Op-Amp Designwith the conventional Miller compensation.As mentioned before, one of the major disadvantages of the conventionalMiller compensation method is degradation of the positive PSSR, as can beseen from the simulation results depicted in Fig. 4.4. As shown in this fig-ure, in the case of Miller compensation, the noise in positive power supplyreaches the output at frequencies more than a decade higher than that of thecut-off frequency of the uncompensated design. On the other hand, the pro-posed method has a frequency response which follows the uncompensatedcircuit very closely. Therefore, compared to the conventional Miller com-pensation the proposed method not only improves the frequency responseof the op-amp, but also significantly improves its PSRR. For the purposeof comparison, the characteristics of all three circuits are summarized inTable 4.1.Figure 4.4: Noise seen at the output originated from positive supply for thecircuits under study.1104.2. Op-Amp DesignTable 4.1: Op-Amp compensation schemes comparisonWithout Miller ProposedComp. Comp.DC gain (dB) ≈ 50 ≈ 50 ≈ 50-3dB bandwidth (MHz) 8.1 1.0 7.2UGB (MHz) 623 233 452Phase Margin (deg) 7 53 42-3dB PSSR+ (MHz) 8.1 218 ConclusionIn this section, a simple compensation technique for two-stage op-amps isproposed which offers improved performance in terms of gain response andPSRR as compared to the conventional Miller compensation. This structurehas a higher 3-dB bandwidth in gain and wider rejection band in PSRR.The merits of the proposed architecture are confirmed by analysis andsimulation. Simulation results for an example circuit show that the proposedcompensation scheme for a two-stage op-amp results in improvements ofmore than seven times in 3-dB bandwidth and approximately two times inUGB. Furthermore, the PSSR+ bandwidth is improved by a factor of morethan 25. These improvements are achieved at the cost of 11◦ degradation inthe phase margin as compared to the conventional Miller method, whereascompared to uncompensated op-amp the phase margin is improved by morethan 35◦.It should be noted that for VPLC applications the op-amp specificationsshould meet certain requirements. For example, the op-amp should provide ahigh gain over the frequency range targeted for VPLC, namely, 1-100 MHz,as discussed in Chapter 1. Designing such a wideband op-amp in a cost1114.3. Measurement Uniteffective technology such as 0.13-µm CMOS could be challenging. Note thatthe example op-amp with the proposed compensation technique has a 3-dB bandwidth of 7.2 MHz. Therefore, for VPLC applications where higherfrequency ranges are desired, further improvements in the design of op-ampare necessary. One solution, assuming that it meets the performance-costtrade-off, could be implementing the system in a more advanced technologywhere using the same structure higher bandwidths can be obtained.4.3 Measurement UnitIn this section, some circuits are suggested for various blocks of the Mea-surement unit (see Fig. 3.3). First, the suggested circuit designs for Sensingunit (see Fig. 3.4) and, afterwards, the Analog Multiplier and the Recti-fier circuits, suggested for the Interpretation unit (again Fig. 3.4) will bepresented.4.3.1 Sensing UnitIn Section 3.3, it was pointed out that two op-amps, reading the voltagesacross a sensing resistor, will provide the measurement unit with currentvalue. The voltage reading from one end of resistor with respect to theground (reference node) also will be considered as the voltage of the load.However, there are certain concerns regarding to the implementation of suchcircuit as it is shown in Fig. 3.5. The major issue is that the open-loop gainof op-amps is not properly under the control and during the fabricationprocess variation it may change. Therefore, for purposes such as these mea-1124.3. Measurement Unitsurements, where actual gain is of paramount importance, it is preferablethat op-amps be used in closed-loop circuits. As it is well know, closed-loopamplifiers, such as the ones depicted in Fig. 4.5, the ratio of passive compo-nents, i.e., resistors in this case, determine the gain of the circuit. In general,ratios of passive resistors, have much better tolerance (i.e. less variation) ascompared to that of resistors by themselves. This circuit structure providesamplifiers with a tighter controlled gain and improves the stability of thecircuit as well.In Fig. 4.5, each end of the sampling resistor, Rsense, is connected toa closed-loop op-amp amplifier circuit with negative feedback to make thefirst reading on both ends of the sampling resistor. To compensate forlower gain of closed-loop amplifiers compared to open-loop op-amps, anotherFigure 4.5: Circuit design suggested for a more precise implementation asIntegrated Circuit.1134.3. Measurement Unitamplifying circuit (bottom right) is needed to amplify the voltage of one endof the sampling resistor and thus provides the reading of the voltage, VS.A differential amplifying circuit (top right), not only compensates for thedecreased gain but also provides the difference of the voltages of the twoends of the sampling resistor, thus providing the reading for the currentgoing through the sampling resistor, Is.4.3.2 Interpretation UnitInterpretation unit consists of three different blocks;1) Two envelope detectors which detect the envelope, i.e., amplitude, ofvoltage and current measured by the sensing unit.2) Active power calculator which uses on an analog multiplier, whichmultiplies the measured current and voltage. A low pass filter followsthe multiplier to attenuate the unwanted frequency components andthus extracts the active power.3) Finally, whether the load is capacitive or inductive is determined by asign discriminator circuit which uses the relative position of the zerocrossing of current and voltage signals for this purpose.In this section, we will suggest structures for each block, suitable for imple-mentation on IC platforms.Envelope DetectorThe envelop detector circuit was briefly discussed in Section 3.3. However,in majority of CMOS technologies used for IC implementations, instead of1144.3. Measurement UnitFigure 4.6: Circuit design suggested for rectification and detection of theenvelope of voltage and currents measured.using diodes as depicted in Fig. 3.6, using transistors in diode-connectedfashion, is more convenient. In such circuits, the parasitic capacitors oftransistors will cause capacitive coupling and thus degrade the rectification.To address this issue, a larger capacitor can be used. However, to use asmaller die-area, considering the negligible voltage drop over the junctionsof the MOS transistor as in the topology shown in Fig. 4.6, a rectification intwo steps is suggested. The left capacitor located between the two transistorsattenuates some of the ripples passing through capacitive coupling with theinput. Hence, the output will be less influenced by the capacitive couplingand would have less ripples.Active Power CalculatorTo calculate the active power, the first step is to multiply the voltage andthe current. For this purpose the circuit shown in Fig. 4.7 is suggested whichis a version of the analog multiplier circuit suggested in [73].The inputs are summed and through the resistive voltage dividers, a1154.3. Measurement UnitFigure 4.7: Analog Multiplier circuit with differential output; input connec-tions adapted to accommodate single-ended input signals.portion of this value is supplied to the M1-M4 transistors. The circuitswere originally symmetrical with differential inputs. However, the measuredvalues are not differential, therefore, some of the input nodes are groundedsuch that circuit can calculate the multiplication of two single-ended inputs.The output of this circuit, however, is still differential having one end atthe junction of sources of M1 and M2, and the other end at the junctionof sources of M3 and M4. To turn this differential signal to a single-endedagain, for the purpose of further processing as well as scaling up the signal,a differential amplifier shown in Fig. 4.8 can be used.As discussed in Section 3.3, this multiplication will generate componentsFigure 4.8: Analog differential amplifier circuit which turns the differentialinput to single-ended output by the way of subtraction.1164.3. Measurement UnitFigure 4.9: The circuit design suggested to discern capacitive versus induc-tive loads based on zero crossing. The output is “1” if the load is capacitiveand “0” if higher frequencies, namely 2fc (see 3.8), which are unwanted. Therefore,a low pass filter, as shown in Fig. 3.7, is needed to filter out those frequencycomponents and extract the active power at the output of this unit.Sign DiscriminatorFor interpreting the sign of calculated active power, or determining whetherthe voltage is leading or lagging the current (or equivalently whether the loadis inductive or capacitive), similar to Fig. 4.9 two zero-crossing detectors anda D flip-flop can be used.In this circuit, every time measured value of voltage or current crosseszero (ground), their respective op-amps detect the crossing and change theirvalue from low to high or high to low. At the rising edge of the op-ampmeasuring the cross over point of the current, the D flip-flop stores thevalue of the output of the op-amp associated with measured voltage. If atthis point, the voltage is above zero, it means that voltage is leading thecurrent. In other words, the load is inductive. Since under such condition,i.e., voltage being larger than zero, the output of the respective op-amp is1174.4. Control Unithigh. Therefore, the value of “1” will be supplied to the D input of the flip-flop and hence “0” will be stored in the Bsign variable. Similarly it can bedemonstrated that if the load is capacitive, since the voltage will be laggingcurrent, at current zero-crossing the D input will be low and hence a valueequal to “1” will be stored in Bsign.4.4 Control UnitTo implement the Control unit described in Section 3.3.4 two different ap-proaches could be chosen; Analog or Digital implementations. Dependingon the approach all or a selection of following building blocks are necessary:a) Comparatorb) Multiplierc) Adderd) Subtractere) Analog-to-Digital Converter (ADC)In the analog approach, all arithmetic and calculations can be performedin analog domain using analog implementation of the first four units. Inthe digital approach, first an ADC converts the analog signals provided byMeasurement unit into digital values and then using conventional logic anddigital arithmetic units the calculation, can be performed. Whereas analogapproach would benefit from higher speed of on-line processing compared to1184.4. Control UnitFigure 4.10: Analog adder circuit using operational amplifier.a digital solution, it is more prone to noise as well as variations and uncer-tainties caused by the fabrication processes. Calculation in digital domainhas another advantage which is the reliable and cost-efficient storage unitsavailable to store measurement and decision data. The analog counterpartfor storing values would be a Sample-and-Hold circuit which in comparisonwould be less accurate and has a limited storage span.For the analog implementation of a comparator, a structure similar to theop-amp discussed in Section 4.2 can be used, however, compensation is notnecessary. An analog multiplier (see Fig. 4.7) and a subtracter (see Fig. 4.8)were already suggested in Section 4.3 which can be used in the Control unitas well. Addition also can be implemented using classic analog circuits suchas the one depicted in Fig. 4.10. For implementation of the ADC also, aproper choice for the structure from the sizable literature [74, 75] can bemade.1194.5. Matching Unit4.5 Matching UnitIn the matching unit three different tasks are performed. First, is the switch-ing of different elements in and out of the circuit, for which CMOS switchescan be used. Second, the normalized values supplied by the Control unitneed to be converted to the corresponding values of elements. For thispurpose similar approaches as explained in Section 4.4 can be selected andsimilar arithmetic circuits as elaborated in that same section can be used.Third, is the implementation of different elements which will be discussedfurther in the rest of this section.For implementation of the elements, ideally variable inductors and ca-pacitors with linear and continuous change with respect to control voltagesare desired. However, implementing such elements off-chip are expensive andbulky, whereas their implementation on-chip is rather challenging. There-fore, using a bank of elements is suggested as an alternative. This approachcomes at the cost of less precision in the matching since only discrete valuescan be obtained for each element. Hence, based on the available resources,area, and cost of fabrication, and design requirements, special attentionshould be paid to the selection of the bank of elements. Using bank of com-ponents will make the implementation more compatible with digital storageof their values. It should be noted that even if all the data processing inControl and Matching units are performed in analog domain, an ADC canbe used to digitize the final values and store them accordingly.Whether the calculation of the values for each element is performed inthe analog or the digital domains, given the advantage of storing values1204.5. Matching Unitin the digital domain, it is reasonable to assume that the input values foreach element are provided in digital format. Bearing this assumption inmind, designing elements whose values are related by a factor of 2(i−1) andusing the circuit topology suggested in Fig. 4.11, will make the elementbanks compatible with the digital binary values stored. The rationale behindsuggested topology for each bank will be explained in respective sectiondedicated to implementation of each bank.Another challenge in implementation of matching elements is the largerequired values and consequently large required area for their implementa-tion. Hence, first in Section 4.5.1, we extract the range of values neededfor each element of the matching circuits based on the system specificationdiscussed in Chapter 3. We will see that very large capacitors and inductorsare needed which in turn will need a significantly large area for their passive(a) Capacitor Bank (b) Inductor BankFigure 4.11: Circuit topology of element banks for a 4 bit controller. Ele-ments are set to grow with a factor of 2(i−1) to accommodate digital binaryinput.1214.5. Matching Unitimplementation. Given the frequency range of the operation, it may notbe feasible to implement such large elements on-chip as passive elements,therefore, an alternative solution, namely active implementation of thoseelements, is suggested.4.5.1 RequirementsIn this section we extract the boundary values for each element in the match-ing unit (depicted in Fig. 3.9). As it was discussed in Section 3.3, the lengthof each movements on Smith chart is calculated by (3.17) to (3.19). Length ofeach movement represents the normalized value of reactance or susceptancechange needed for that move. Hence, to find the boundary values for theelements, we first need to calculate the range of changes in (3.17) to (3.19).This range is normalized to Z0, however, by using (3.10) to (3.13) it willbe denormalized and necessary inductance or capacitance values required toachieve that range of impedance change is also calculated.Top section of Table 4.2 compiles the calculated maximum values neededfor each element (needed in order to match the entire range of the accessimpedances considered for VPLC applications, as obtained in our measure-ment campaigns). This range is represented by the colored area in Fig. 4.12.However, by considering a reduced range of access impedances similar to thearea depicted in green in Fig. 4.12, the requirements for the maximum ca-pacitance and inductance will be alleviated. The bottom section of Table 4.2compiles the maximum values required for each element, in the case of re-duced access impedance range. The effect of this compromise, as seen inTable 4.2, is more pronounced for the maximum value of required induc-1224.5. Matching UnitTable 4.2: Maximum value of capacitance and inductance needed for eachelement of matching unit, in order to match the whole range of accessimpedance variation depicted in Fig. 4.12. Frequency range of operationis considered to be between 1 to 100MHz.CS [µF] CP [nF] LS [µH] LP [µH](a) 32.6 13.1 32.6 796Maximum 32.6 µF 796 µH(b) 23.1 9.23 23.1 39.8Maximum 23.1 µF 39.8 µHtance, which is reduced by a factor of 20.Figure 4.12: Range of access impedances considered for adaptive matchingby the proposed system. (a) Colored area: Full range according to our mea-surement campaigns. (b) Green area: Reduced area to relieve inductancerequirements.1234.5. Matching UnitThe frequency range of operation for calculations in Table 4.2 is con-sidered to be between 1 to 100 MHz. By changing the targeted frequencyrange to 10 to 100 MHz, all the calculated values will be divided by 10 andthus requiring smaller capacitances and inductances.4.5.2 Capacitor BankFig. 4.11, as presented in the opening of Section 4.5, shows the suggestedtopology for implementation of the capacitor bank. Since the equivalentcapacitance of parallel capacitors is the sum of those capacitances, parallelstructure is suggested for capacitor bank. For the case, where controlleris assumed to have four bits, capacitor bank consists of four capacitors.Each capacitor is in series with a switch that decides whether that specificcapacitor will contribute to the total value of the equivalent capacitor ornot.Considering the need for larger capacitors, available capacitor types inthe 0.13µm technology available to us and respective chip area these ca-pacitors occupy, dualmimcap appears to be the most suitable candidate.Cost of production is proportional to the die-area occupied by elementsand dualmimcap is able to provide larger capacitance in smaller area. Acapacitance of 150pF implemented in dualmimcap technology will occupy0.03mm2. If we consider this value for C4, the entire capacitor bank willhave a total capacitance of approximately 280pF . Referring to Table 4.2, wecan see that this value is few orders of magnitude smaller than the maximumcapacitance value necessary. Hence, implementing the necessary capacitanceusing passive capacitors on-chip is not feasible. Therefore, as the alterna-1244.5. Matching Unittive solution, General Impedance Converters (GICs) could be used and areexplained in the following section.Capacitor Bank - ImplementationAs discussed in Section 1.2.5, using a VCGIC similar to the one depicted inFig. 1.4 grounded impedances can be obtained. The equivalent impedanceof aforementioned VCGIC is calculated using (1.4). In this equation, byassuming one of the impedances in the nominator, e.q. Z5, a capacitor, andthe rest of the impedances resistors, an equivalent capacitor with simulatedcapacitance of Z1Z3/Z2Z4 times larger than original capacitor can be ob-tained. If R1 and R3 (Ri representing resistive Zi) are each three ordersof magnitude larger than R2 and R4, and for Z5 capacitances discussed inprevious section are used, simulated capacitances in order of µF can beachieved. Therefore, given that resistances from few ohms to mega-ohmscan be fabricated in CMOS technologies, this structure appears to be a fea-sible solution for achieving the maximum capacitance needed for groundedcapacitor, CS.For floating capacitors, CPs, also several floating GIC solutions canbe found in the literature, e.g., [76–78]. In [76], Hou et. al., proposea GIC based on Current Conveyor - 2nd generation (CCII) and Saad [78] propose a GIC using CCII and Differential Voltage Current Con-veyor (DVCC), whereas the structure proposed by Ndjountche et. al. [77]is based on op-amps. Since an enhanced op-amp module has been alreadyproposed and explained, here we focus on the latter floating GIC which offersimpler and more modular solution. In [77], Ndjountche et. al. present also1254.5. Matching UnitFigure 4.13: Floating GIC structure proposed by Ndjountche et. al. [77].a grounded GIC which can be obtained by a slight modification of theirfloating GIC and thus increasing the modularity of implementing variousimpedances.Fig. 4.13 shows the floating GIC proposed by Ndjountche et. al. [77].The input impedance of this, Zin, is calculated by,Zin =gm4Z1Z3gm3Z2, (4.11)where gmi represent the transconductance of the i-th amplifier. Therefore,by assuming one of the impedances in the nominator, e.g., Z3 to be a capaci-tor and the two others resistors, the equivalent impedance will be a simulatedcapacitor multiplied by gm4R1/gm3R2. Achieving gm4/gm3 larger than sev-eral tens or hundreds in CMOS technology is rather difficult. Therefore, inorder to achieve an overall coefficient ratio of up to six orders of magnitude,the resistors need to have a difference of four orders of magnitude. Con-sidering the range of resistances that can be fabricated on-chip in CMOS1264.5. Matching Unittechnology mentioned before, achieving this ratio is possible. Therefore,using the capacitance values in the previous section and the Ndjountche’scircuit explained, simulated floating capacitors in the needed range of µFcan be implemented.It should be kept in mind that the performance of op-amp and its re-strictions will cast similar limitations on the performance of the simulatedcapacitor using VCGIC and GIC structures. Particularly, frequency re-sponse of the op-amp and its bandwidth will determine the upper limit ofoperation for the simulated capacitance.4.5.3 Inductor BankFor inductor bank, to have aggregating values, the topology of the bank, asshown in Fig. 4.11 (b), must be based on series combination of components.However, this topology will lead to aggregating parasitic resistances as well.To reduce the effect of parasitic resistances in series, including those of theswitches, the circuit as seen in Fig. 4.11 (b) is structured such that allinductors in the bank are initially in series to each other. When smallervalues of inductances are needed, one or more inductors are accordinglytaken out by a switch that shortens both ends of the respective inductor(s).To keep the compatibility of this structure with normal binary numbers, thecomplement values of each bit is supplied to the inductor bank. Therefore,whenever a bit is set to “1” and their respective inductor is supposed tobe intact, the complement output of ADC or flip-flop register which willbe “0” is supplied to the inductor bank. Thus the respective switch isopen, keeping the intended inductor intact. For other bits that are zero, the1274.5. Matching Unitcomplementary value of one will activate their switches and short circuitthem, taking them out of the bank. It should be noted that since flip-flopsalso provide inverse of registered data simultaneously, this technique willnot impose any extra hardware to the system.Given the practical limits of implementing passive inductors on a chipand particularly available inductors in the 0.13µm technology available tous, inds type inductors appear as the prime candidate for implementationof passive inductors on chip. An L4 of approximately 186 nH occupies0.2 mm2, and considering the 2(i−1) ratio of elements, it will lead to anaggregating total of approximately 372nH for the entire inductor bank de-picted in Fig. 4.11 (b). Comparing this to the values in Table 4.2, we cansee that the necessary inductance range is significantly larger. Therefore, inthe next following active implementation of inductors will be discussed.Inductor Bank - ImplementationAs mentioned in Section 1.2.5, inductors are one of the main componentsof impedance matching circuits. However, given the frequency range ofinterest, lumped passive inductors are bulky and expensive elements and theintegration of large inductors on an IC platform is impractical [25, 43, 49, 79].The larger the value of the inductance and the lower the frequency, thebulkier the lumped element and the more difficult its implementation on anIC platform [79]. Therefore, for various applications such as RF filters [80–82] and oscillators [83–85], active circuits are used to mimic the behavior ofinductors [79, 82]. The above-mentioned VCGIC circuit presented in [25] isan example for this approach being used in PLC impedance matching.1284.5. Matching UnitThe GIC circuits presented in Section 4.5.2 could be used for realizingsimulated inductors as well. This could be done similar to implementationof simulated capacitance, and by using the GIC only as an impedance mul-tiplier. However, compared to capacitors, passive inductors occupy a muchlarger die-area on the chip. Also, there are more restrictions, not only onthe maximum size, but also on the minimum size of passive inductors thatcan be fabricated on-chip. Therefore, it is preferred to obtain simulatedinductors by using passive capacitors on-chip.As an example, consider (1.4) which describes the simulated impedanceof the VCGIC, and was presented in Section 1.2.5. Let us assume one of theimpedances in the denominator of (1.4) a capacitor, e.g., Z4, and the rest ofthe impedances as resistors. In such a scenario, the equivalent inductor willhave a simulated inductance of (R1R3R5/R2) · C4. In which, Ri representthe resistive value of Zi and C4 represents the capacitor used as Z4.For the floating inductance, by choosing Z2 in Fig. 4.13 a capacitor,according to (4.11), a simulated floating inductance of (gm4R1R3/gm3) · C2can be achieved. Similarly, Ri represent the resistive value of Zi and C2represents the capacitor used as Z2.In both cases of grounded and floating inductor, proper selection of re-sistors can change the value of simulated inductance several orders of magni-tude. Therefore, by choosing capacitors in range of pF , the active inductanceof µH range can be readily implemented as required in Table 4.2.Even though, simulated inductances can be achieved using aforemen-tioned GIC circuits, there is a sizable body of literature (e.g. [43, 79, 82])on various implementations of active inductors. The rationale is that, as seen1294.5. Matching Unitin previous sections, GICs often require few to several amplifiers and passiveelements for their implementation. This translates into a large number oftransistors and chip area as well as excess power used for their implemen-tation. Therefore, there has been several efforts in reducing the die-areaoccupied by active inductors as well as required power using new structureswhich are more compact. Along the same line, we propose an active inductorstructure which is very compact and is able to simulate large inductances asit is required for the VPLC matching application. In the next section, thisdesign will be presented with further details.The proposed Active Inductor StructureAs mentioned before, even though the GIC-based implementations -presentedpreviously- require a chip area that is smaller than a passive inductor, theystill require a relatively large number of transistors and thus chip area andpower. Another popular and less complex approach to implement active in-ductors is to use two gyrators [79, 81]. Since the simplest gyrator is a singletransistor amplifier, an active inductor core circuit can consist of a mini-mum of two single-transistor amplifiers. As noted in [64], single-transistoramplifiers, in particular, output impedance of a common-drain buffer (sourcefollower), can mimic inductive behavior. In this section, we propose an al-ternative active inductor structure that is also based on a single-transistoramplifier, namely a common-gate amplifier. This structure is simple, occu-pies a small chip area, and is capable of providing high inductance values atlow frequencies.1304.5. Matching UnitR Z2IVBZ1M1CM1M2M3VB T1=2N3904CR2=4.7KR1=1.2KRgmvgs CRIVBias M1 Cro+vgs_ZinZin600pFRCM1M2M3M4VBias(a) SchematicR Z2IVBZ1M1CM1M2M3VB T1=2N3904CR2=4.7KR1=1.2KRgmvgs CRIVBias M1 Cro+vgs_ZinZin600pFRCM1M2M3M4VBias(b) Equivalent small signal modelFigure 4.14: Proposed active inductor circuit.• Circuit Structure and FunctionalityThe proposed circuit and its simplified small-signal model are shownin Fig. 4.14. The input impedance of this circuit shows an inductivebehavior which can be modeled by an ideal inductor with series andparallel parasitic resistances. There is also a parallel parasitic capac-itance, however, its value is low and thus over the frequency range ofinterest it can be neglected. From the analysis of the model shown inFig. 4.14(b), the values of the equivalent elements can be obtained as:L = CG(gm −G)(4.12)Rs =Go +GG(gm −G)(4.13)Rp =1G , (4.14)where G is the equivalent conductance of resistor R, C is the capacitorconnected between drain and source of transistor M1, and gm and Goare the transconductance and the output conductance of the transis-1314.5. Matching UnitR Z2IVBZ1M1CM1M2M3VBT1=2N3904CR2=4.7KR1=1.2KRgmvgs CRIVBias M1 Cro+vgs_ZinZin600pFRCM1M2M3M4VBiasFigure 4.15: Schematic of the simulated active inductortor. As it can be seen, the value of inductance can be changed not onlyby changing the bias current, i.e., gm, or load conductance, i.e., G, butalso by changing the value of the added capacitor, i.e., C. By prop-erly tuning these parameters a wide range of inductance values canbe achieved. Note that by changing the bias current the power con-sumption of the circuit also changes. The tunability and high level ofintegration come at the cost of an additional power. Note that passiveinductors ideally do not dissipate power, however, at low frequencies,they are bulky and typically are not tunable. As shown in the nextsection, the power overhead of the proposed structure is on the orderof few µW to a few tens of µW and depending on the application itcan be optimized.• Simulation ResultsTo evaluate the proposed structure, several sample active inductorsbased on the circuit shown in Fig. 4.15 are simulated in IBM 0.13 µm1324.5. Matching UnitCMOS technology. Note that in this circuit, instead of the load re-sistor, a transistor biased in triode is used. As mentioned above, thecircuit is capable of providing a wide range of inductance over the fre-quency range of interest with inductance values from µH to few mHand beyond. Fig. 4.16 shows the simulation results for the equivalentinductance and equivalent series resistance of a sample circuit of theproposed structure. Inductance has been varied by changing the ca-pacitance C, from 500 fF to 5 pF (by switching in or out capacitors ina capacitor bank). The overall power consumption for this particularcircuit is less than 2.6 µW. Note that changing the capacitance (C)does not affect the power consumption.As it can be seen from the Fig. 4.16 this structure can cover a widerange of inductances (from µH to mH), however, it has a relativelylarge series resistance. To reduce the series resistance, a negative re-sistance structure, namely, a standard architecture based on cross-coupled transistors [64], has been added. Although the inclusion ofthe aforementioned negative resistor reduces the equivalent series re-sistance, this amendment comes at the cost of increased power con-sumption (93 µW power overhead) and decreased inductance. ThisTable 4.3: Width and length of transistors.Transistor W (nm) L (nm)M1 390 390M2 390 780M3 390 160M4 390 1601334.5. Matching Unit102 103 104 105 106 107 108 109 1010-10123456Inductance [mH]Frequency [Hz]  C=500fC=1.625pC=2.75pC=3.875pC=5p0102030405060708090Resistance [K]Figure 4.16: Proposed active inductor; Effect of the capacitance C on theequivalent inductance and series resistance.1021031041051061071081091010-505101520253035Inductance [  µH]Frequency [Hz]  C=500fC=1.625pC=2.75pC=3.875pC=5p102103104105106107108109101000.511.522.53.0Resistance [KΩ]Figure 4.17: Proposed active inductor with additional negative resistance;Effect of the capacitance C on the equivalent inductance and series resis-tance.effect is illustrated in Fig. 4.17 where we show simulation results ob-tained after adding the negative resistance structure.• Comparison and Discussion1344.5. Matching UnitTable 4.4: Active inductors; inductance, range of operation, their seriesresistance and power consumption.Work Frequency Inductance Rs PowerThis work + 3 MHz 5.5 mH 22 kΩ 2.6 µW8 MHz 30 µH 500 Ω 96 µW[82] ∗ 430 MHz 230 nH 0.9 Ω 40 mW[86] + 1.4 GHz 42 nH 0.03 Ω 1.8 mW[87] ∗ 3.6 GHz 33 nH 20 Ω 3.6 mW[88] ∗ 5-25 GHz 0.5-2 nH 0.15-30 Ω N/A+ Simulated ∗ MeasuredThis structure, despite its advantages such as producing large simu-lated inductance at very low frequencies and low power consumption,suffers from high series resistance. To provide the extent of advantagesand disadvantages of proposed structure compared to other active in-ductors, the properties of our active inductor and some other works inthe literature are compiled into Table 4.4.As it can be seen, the value of simulated inductance for the proposedcircuit is significantly higher than other works in the literature. Itshould be kept in mind that the lower the frequency, the harder toimplement higher inductances and the frequency range of operation isconsiderably lower for the proposed active inductor compared to theother works reported in the literature. The other advantage of theproposed structure is its power consumption which is also significantlylower than other works. However, the series resistance of the the pro-posed active inductor is considerably high, which may not be suitablefor the adaptive impedance matching application. Hence, to use the1354.5. Matching Unitproposed structure in the matching unit, alternative solutions to de-crease its series resistance need to be explored. Even though, otherworks show smaller resistance and therefore are favorable for the use inthe matching unit in that regard, their frequency of operation is muchhigher than that of VPLC application. Hence, their designs need tobe properly adopted to ascertain that if able to operate at lower fre-quencies, they demonstrate necessary inductive characteristics at thefrequency range of interest for VPLC application as well.Inductor Bank - ConclusionIn this section, after a brief introduction on advantages and disadvantagesof active and passive inductors, a new structure for active inductor imple-mentation was presented. This new structure whereas being simple andcompact is able to provide large range of tunability and achieve high valuesof inductances. The new circuit was developed in order to be used in VPLCapplications, however, its relatively high parasitic resistance renders it moresuitable for application which do need active inductors with relatively lowquality factor, i.e. low parasitic resistance.Alternatively, other circuits suggested for higher frequencies such as [82,86, 89] which have lower resistance could be adopted such that they canperform at lower frequencies. Active inductors, despite the advantage oftunability that they often provide, as mentioned in Chapter 1, have intrinsiclimitations such as limited range of operations and undesirable parasitics.Therefore, a careful selection of active inductors -perhaps in combinationwith passive inductors similar to what was presented in Chapter 1- can be1364.6. Conclusionmore beneficial.4.6 ConclusionIn this chapter details of circuit designs that could be used for the imple-mentation of the proposed system on integrated circuit platform were elab-orated. The proposed op-amp building block was explained first, and basedon this basic building block, other suggested circuit units such as load mea-surement, envelop detector, analog multiplier and sign discriminator circuitswere studied. Other circuits that could be useful for implementation of pro-posed adaptive impedance matching system such as ADC for Control Unitand banks of capacitors and inductors for Matching unit were explained infurther sections.The major contribution of this chapter is the new op-amp that was de-signed for enhanced performance necessary for implementation of the pro-posed adaptive impedance matching system. Therefore, a comparativelylarger portion of this chapter was dedicated to explaining the details ofits design and performance. Introduced op-amp uses a new compensationmethod which increases the bandwidth of operation both 3-dB bandwidthand UGB. Nevertheless, the bandwidth of the example op-amp with the pro-posed compensation technique implemented in a 0.13-µm CMOS, does notcover the entire frequency range of interest for VPLC applications. Hence,the system needs to be implemented either in a more advanced technologywith intrinsic higher bandwidth or new structures with higher performanceand wider bandwidth need to be used. The proposed method also improves1374.6. Conclusionthe PSRR which means a better resistance against noises imposed by powersupply.Lastly, a new active inductor structure was introduced which can pro-duce high values of inductances at low frequencies in the range of interest forVPLC application. The suggested structure is very compact and occupiessmall die-area, produces larger simulated inductances and uses less powercompared to similar active inductors. The proposed circuit has high par-asitic resistance, which renders it unfavorable for the adaptive impedancematching purpose. Therefore, a solution for further decreasing the parasiticresistance of the proposed structure needs to be developed. Alternatively,other active inductors in the literature can be used. However, proper adap-tations need to be done to ascertain their ability to operate and demonstratedesired inductance characteristics at lower frequencies, in the range of inter-est for VPLC application.138Chapter 5ConclusionIn this thesis, we first discussed the motivation for using VPLC, as opposedto current conventional methods, which use dedicated wires for communica-tion. Among the advantages of VPLC over dedicated wires for communica-tion is the reduced complexity and cost of the wiring harness and its instal-lation. Considering the exponential growth of electric and electronic devicesin both conventional combustion engine vehicles and electric vehicles, theseadvantages will be more pronounced in the vehicles of the future. Theseadvantages have motivated further research and development of VPLC.The advantages gained by using VPLC do not come without costs though.VPLC is affected by transmission channel imperfections, which includes im-pulsive noise, frequency selectivity of the channel transfer function, andtime and location dependent network access impedance. The latter causesa general impedance mismatch for VPLC transmitters and receivers, whichresults in sub-optimal signal coupling from the transmitter to the network,and from the network to the receiver. This, in turn, weakens the PLC sig-nal transfer, and consequently degrades the signal-to-noise-power ratio. Toaddress the challenges posed on achieving a reliable VPLC, a deeper under-standing of communication channel characteristics is essential. Therefore,139Chapter 5. Conclusionin Chapter 3, the methodology and results of two measurement campaignswere presented.First, in Section 2.2, characteristics of a specific CEVs, namely PontiacSolstice 2006 sport vehicle were studied. One of the major contributionsof this measurement campaign was presenting measurement results on thecharacteristics of the battery of vehicle and vehicular loads, as there was alack of such measurement data in the literature. The second major contri-bution of this measurement campaign was calculating and discussing accessimpedance and its range of variation, which along with our further mea-surements on this topic, laid out the foundations for our work in Chapter 3,regarding the adaptive impedance matching system design.Second, in Section 2.3, characteristics of a hybrid EV, built on a FordE-450 cutaway chassis truck which uses the BalanceTM Hybrid Electric drivesystem by Azure Dynamics Corporation, was studied. This vehicle was madeavailable to us as a courtesy of AZD. One of the major contribution of thiscampaign was adding the details of channel transfer function measurementresults to the scarce literature of measurements on EVs. As another majorcontribution, the details of obtained access impedances were presented anddiscussed. These results, especially range of changes, and variation in accessimpedance, along with the results obtained in this regard during our pre-vious measurement campaign, formed the bases for the work in subsequentchapters.Based on these studies and measurements on access impedances for aPLC network in a vehicle, a particular challenge, which is common to manyPLC application scenarios, stood out. That is the temporal and spatial vari-140Chapter 5. Conclusionation of the input impedance. This causes impedance mismatch, which de-grades the SNR and the signal integrity, thus requiring the use of impedancematching circuits at VPLC transmitters and receivers. However, conven-tional matching circuits using fixed passive elements are not effective due tothe variability of the access impedance with time and location, caused bytime-varying network loads and signal reflections in the power line. There-fore the rest of this thesis was dedicated to designing an adaptive impedancematching system for VPLC.In Chapter 3, the theoretical foundation behind our approach towardsan adaptive impedance matching solution was first elaborated. This was fol-lowed by demonstration of performance of the proposed adaptive impedancematching system under various realistic scenarios. Simulation results showedclose-to-optimal performances under a wide range of conditions, and an over-all power transfer gain of up to 10 dBW. Even though the system was de-signed for narrowband communication, since it often improves the gain ofpower transmission around the nominal frequency, it is beneficial for use inmore broadband communications as well.Finally, regarding the size, weight and cost constrains of VPLC modemdesigns, it is important that the adaptive impedance matching system beimplemented as an integrated solution. Therefore, in Chapter 4, circuitdesigns which could be used for on-chip implementation of each unit of thesystem were suggested. The major contribution in this chapter was the newcompensation method for enhancing the performance of op-amps, whichhave an extensive use throughout the system. The suggested techniqueimproves both 3-dB bandwidth and UGB of the op-amp. This method1415.1. Future Worksalso improves the noise performance of the op-amp by better rejecting thenoise injected from the power supply. Lastly, a new active inductor with acompact structure was introduced. This active inductor, whereas occupyinga small die-area, produces large values of inductances in the frequency rangeof interest for VPLC.5.1 Future WorksAfter identifying challenges in achieving a reliable communication over powerwires in a vehicle, based on the result of our measurement campaigns, anadaptive impedance matching system was designed and explained. However,this system needs to be implemented and tested in actual VPLC environ-ment as well. The implementation of proposed system constitutes the mainbody of the future works.To pave the way for these future works, some circuits were suggestedfor implementation of the system and their limitations were discussed. Thesuggested circuits demonstrated that even though the system can be imple-mented on a single chip, due to their limitations in their current form, theycan not cover the entire range of frequency which is of interest for VPLCapplications.Op-amp, which is among the main building blocks, used throughoutthe suggested implementation, imposes its restrictions on the overall per-formance of the system. As a future work, extension of the bandwidth ofop-amp to several tens of MHz, which is the frequency range of interest forVPLC applications, could be explored. A newer technology with intrinsic1425.1. Future Workshigher bandwidth could be used or newer designs should be developed.It was pointed out that for implementation of the matching unit, largecapacitances and inductances are needed. Therefore, some solutions foractive implementation of simulated capacitances and inductance with largevalues, as extracted in Section 4.5.1, were suggested. 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