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Photonic device design flow : from mask layout to device measurement 2012

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Photonic Device Design Flow From Masklayout to Device Measurement by Charlie Lin B.A.Sc., The University of British Columbia, 2009 A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF APPLIED SCIENCE in The Faculty of Graduate Studies (Electrical and Computer Engineering) THE UNIVERSITY OF BRITISH COLUMBIA (Vancouver) October 2012 © Charlie Lin 2012 Abstract Mask layout design is an important part in silicon photonic device design flow; the space used and the quality of the mask directly affect the cost of fabrication and quality of the outcome. To effectively minimize time spent on drawing masks, fixing design violations, and reducing unused spacings between each structure, we use effective approaches in the mask design pro- cess to ensure the listed criteria are met. Using the PCell and the hierarchy drawing methods, GDS files that contain different device parameters can be generated efficiently. As a result, direct GDS modeling efficiency is im- proved. An experimental setup that is capable of obtaining high quality measurement data is critical to device measurement. The concept of an automated measurement station can effectively reduce work needed from the experimenter while providing quality results. With the implemented fiber-to-fiber and fiber array automated measurement station, multi-device measurement can be set up to run automatically in minutes whereas tradi- tional manual measurement stations require one’s presence and constant at- tention. In this thesis, we have illustrated several mask drawing approaches and showed the drawing steps of two masks in detail. We have described two automated experimental setups, fiber-to-fiber and fiber array, in detail and included various measurement results to show the capabilities of these two stations. ii Table of Contents Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi List of Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . ix 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Thesis Contributions . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . 4 2 Mask Layout Design . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Mask Drawing with Pyxis . . . . . . . . . . . . . . . . . . . . 6 2.1.1 Manual Drawing vs. Scripting Drawing . . . . . . . . 6 2.1.2 Library Components . . . . . . . . . . . . . . . . . . 8 2.1.3 Drawing Approaches . . . . . . . . . . . . . . . . . . 10 2.1.4 Routing . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1.5 Error Checking . . . . . . . . . . . . . . . . . . . . . 14 2.1.6 Tiling . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.2 Completed Mask Designs . . . . . . . . . . . . . . . . . . . . 16 2.2.1 Traveling Wave Modulator . . . . . . . . . . . . . . . 16 2.2.2 On-Chip Optical Circuit . . . . . . . . . . . . . . . . 30 3 Measurement Setup: Fiber-to-Fiber Automated Measure- ment Station . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.1 Station Overview . . . . . . . . . . . . . . . . . . . . . . . . 45 3.1.1 Station Specifications . . . . . . . . . . . . . . . . . . 47 3.2 GUI Software . . . . . . . . . . . . . . . . . . . . . . . . . . 49 iii Table of Contents 3.3 Automated Setup Tests and Measurement Results . . . . . . 51 3.3.1 Fiber Angles vs. Measurement Peaks . . . . . . . . . 51 3.3.2 24 Hour Alignment Test . . . . . . . . . . . . . . . . 53 3.3.3 Fiber Elevation vs. Coupling Efficiency . . . . . . . . 54 3.3.4 Laser Sweep vs. Piezoelectric Actuator Tracking . . . 55 3.3.5 Device Measurement Results . . . . . . . . . . . . . . 57 4 Measurement Setup: Fiber Array Automated Measurement Station . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.1 Station Overview . . . . . . . . . . . . . . . . . . . . . . . . 61 4.1.1 Station Specification . . . . . . . . . . . . . . . . . . 63 4.2 GUI Software . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.2.1 Area Sweeping . . . . . . . . . . . . . . . . . . . . . . 67 4.2.2 First Device Alignment and Fine Alignment . . . . . 70 4.2.3 Chip Level Auto-Measuring Algorithm . . . . . . . . 71 4.3 Automated Setup Tests and Measured Results . . . . . . . . 72 4.3.1 Repeated Alignment Test . . . . . . . . . . . . . . . . 73 4.3.2 24 hour alignment test . . . . . . . . . . . . . . . . . 75 4.3.3 Fiber Array Angles vs. Measurement Peaks . . . . . 76 4.3.4 Device Measurement Results . . . . . . . . . . . . . . 77 5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 5.1 Suggestions for Future Work . . . . . . . . . . . . . . . . . . 83 Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Appendices A Taper PCell Script . . . . . . . . . . . . . . . . . . . . . . . . . 87 iv List of Tables 2.1 Device Summary . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.2 PCell Parameter Detail . . . . . . . . . . . . . . . . . . . . . 29 2.3 VOA Performance Summary . . . . . . . . . . . . . . . . . . 37 2.4 On-Chip Optical Circuit Device Summary . . . . . . . . . . . 43 v List of Figures 1.1 Photonic Design Flowchart . . . . . . . . . . . . . . . . . . . 2 2.1 Pyxis Manual Drawing . . . . . . . . . . . . . . . . . . . . . . 8 2.2 GDS Library Component . . . . . . . . . . . . . . . . . . . . 9 2.3 PCell Example . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Real-Time Error Viewing . . . . . . . . . . . . . . . . . . . . 15 2.5 Pyxis Tiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.6 Fabrication Process . . . . . . . . . . . . . . . . . . . . . . . . 16 2.7 Traveling Modulator Design Flow . . . . . . . . . . . . . . . . 17 2.8 Traveling Wave Modulator Waveguide Definition . . . . . . . 19 2.9 Horseshoe PN-Junction . . . . . . . . . . . . . . . . . . . . . 20 2.10 Horseshoe PN-Junction Offset . . . . . . . . . . . . . . . . . . 21 2.11 Horseshoe Doping Layers . . . . . . . . . . . . . . . . . . . . 22 2.12 Horseshoe Geometry . . . . . . . . . . . . . . . . . . . . . . . 23 2.13 Traveling Wave Modulator Via1 Layer . . . . . . . . . . . . . 24 2.14 Traveling Wave Modulator Metal1 and Via2 Layer . . . . . . 25 2.15 Horseshoe Array and PCell . . . . . . . . . . . . . . . . . . . 26 2.16 Traveling Wave Modulator Final GDS Layout . . . . . . . . . 29 2.17 On-Chip Photodetector . . . . . . . . . . . . . . . . . . . . . 30 2.18 On-Chip Ring Modulator . . . . . . . . . . . . . . . . . . . . 31 2.19 PIN Structure Characterization: Current vs. Voltage . . . . . 32 2.20 PIN Structure Characterization: Effective Index vs. Voltage . 32 2.21 PIN Structure Characterization: Loss vs. Voltage . . . . . . . 33 2.22 Temperature VOA Structure . . . . . . . . . . . . . . . . . . 34 2.23 Current vs. Change in Temperature . . . . . . . . . . . . . . 35 2.24 Effective Index vs. Wavelength . . . . . . . . . . . . . . . . . 36 2.25 Transfer Function vs. Change in Temperature . . . . . . . . . 36 2.26 Transfer Function vs. Current . . . . . . . . . . . . . . . . . . 37 2.27 VOA PCell Waveguide Illustrations . . . . . . . . . . . . . . . 38 2.28 VOA Doping Layer Definition . . . . . . . . . . . . . . . . . . 39 2.29 Metal Interconnect Layer Configuration . . . . . . . . . . . . 40 vi List of Figures 2.30 On-Chip Circuit Edge Coupling Measurement Concept . . . . 41 2.31 On-Chip Circuit Fiber Array Measurement Concept . . . . . 42 2.32 On-Chip Optical Circuit Final GDS Layout . . . . . . . . . . 44 3.1 Fiber-to-Fiber Setup Overview . . . . . . . . . . . . . . . . . 46 3.2 Fiber Holder and Fiber Arm . . . . . . . . . . . . . . . . . . 48 3.3 Fiber-Chip Microscope Image . . . . . . . . . . . . . . . . . . 49 3.4 Device Alignment Flowchart . . . . . . . . . . . . . . . . . . . 50 3.5 Fiber Angles vs. Measurement Peaks . . . . . . . . . . . . . . 52 3.6 24 Hour Test: Power vs. Time . . . . . . . . . . . . . . . . . 53 3.7 24 Hour Test: Power Change per 5 Minutes . . . . . . . . . . 54 3.8 Fiber Elevation vs. Coupling Power . . . . . . . . . . . . . . 55 3.9 Fiber Tracking vs. Coupling Peaks . . . . . . . . . . . . . . . 56 3.10 Grating Design Measurement Results . . . . . . . . . . . . . . 57 3.11 Disk Resonator Measurement Results . . . . . . . . . . . . . . 58 3.12 2-Ring Vernier Effect Measurement Results . . . . . . . . . . 59 3.13 Dumbbell Narrow-band Reflector Measurement Result . . . . 60 4.1 Fiber Array Automated Measurement Station . . . . . . . . . 62 4.2 Fiber Array Ribbon Holder and Fiber Arm . . . . . . . . . . 64 4.3 Fiber Array Setup Microscope Top View . . . . . . . . . . . . 65 4.4 Device Alignment Flowchart-Manual Alignment . . . . . . . . 66 4.5 Device Alignment Flowchart-Automated Alignment . . . . . . 67 4.6 Area Sweeping . . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.7 Area Sweeping Flowchart and Fiber Travel Pattern . . . . . . 69 4.8 First Device Alignment . . . . . . . . . . . . . . . . . . . . . 70 4.9 Fine Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . 71 4.10 Chip Level Auto-Measuring Algorithm . . . . . . . . . . . . . 72 4.11 Repeated Alignment: Small Window . . . . . . . . . . . . . . 73 4.12 Repeated Alignment: Small Window Power . . . . . . . . . . 73 4.13 Repeated Alignment: Large Window . . . . . . . . . . . . . . 74 4.14 Repeated Alignment: Large Window Power . . . . . . . . . . 74 4.15 24 Hour Alignment Test: Power vs. Time . . . . . . . . . . . 75 4.16 24 Hour Alignment Test: Power Change per 5 Minutes . . . . 75 4.17 Fiber Ribbon Angle vs. Measurement Peaks . . . . . . . . . . 76 4.18 Grating-Ring Response . . . . . . . . . . . . . . . . . . . . . . 77 4.19 Grating Coupler Response . . . . . . . . . . . . . . . . . . . . 78 4.20 Bio-Sensing Ring Resonator Response . . . . . . . . . . . . . 79 vii List of Programs 2.1 Ring Resonator Script . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Pyxis Parameterized Device Script . . . . . . . . . . . . . . . 12 2.3 Pyxis Script: Hierarchy Approach . . . . . . . . . . . . . . . . 13 viii Acknowledgments I would like to thank my supervisor Dr. Lukas Chrostowski and professor Dr. Nicolas A.F. Jaeger for all the help and guidance they provided when I encountered difficulties in my research. Especially, I would like to thank Dr. Lukas Chrostowski for exposing me to the field of silicon photonics and providing me with such wonderful research experiences. I would also like to thank my parents for their unconditional love and support throughout the years of my education. Lastly, to all my colleagues, thank you for your support and guidance. ix Chapter 1 Introduction The dominant application of silicon photonics is in the optical interconnect technology [1,2]. Silicon photonics, a topic of advanced research, can be applied in high-performance computing, biological and chemical sensing, environmental monitoring, and medical and military technologies [2]. As the performance of silicon photonic designs continue to improve, the designs become more complex year after year. As a result, the steps involved in the design procedure are required to be refined as well. The typical traditional photonic design steps are: 1. A design is modeled and simulated for its feasibility. 2. Designs are manually drawn into mask files with optimal parameter iterations. 3. The complete mask is sent to foundry for fabrication. 4. Construct a chip-testing station and measure the fabricated devices. 5. Publish the obtained results if they meet the standard. As the demand for improvement in current state-of-the-art technology increases, silicon photonics has become a popular research topic in recent years. As technology improves, the foundries are now capable of offering more extensive fabrication procedures. These procedures include multiple depths of silicon etching, various concentrations of doping, and metal de- positions. Research groups that focus on silicon photonic technology have also evolved from experimenting with simple photonic structures, such as ring resonators and straight waveguides, into studying more complicated systems. As a result, the importance of efficient mask design and device testing becomes more significant. Hence, the traditional design steps must evolve to meet the current research demands. The improved photonic de- sign flow should emphasize on maximizing the efficiency and quality of the design flow while minimizing total design time. The improved design flow is illustrated in the following flowchart: 1 Chapter 1. Introduction Figure 1.1: Photonic Design Flowchart The focus of my thesis contribution is primarily on mask layout design and device testing (as highlighted in the orange box in the above flowchart). The first goal of my work is to generate space-efficient, error-free mask de- signs that fit the simulated performance requirements. To achieve this, the mask designer must communicate with the simulator frequently to deter- mine the critical parameters of the design and the basic physical form of the device. Unlike in traditional design flow, where mask drawing is a one-time labor work, the simulation process and the mask layout procedure must now occur simultaneously to make the optimization of the device mask design possible. To improve communication efficiency, the mask design method must be carefully chosen so it can adapt to the parameter requirements needed. A well-designed final mask layout possesses the following charac- teristic: ˆ Can adapt to last minute changes ˆ Can be regenerated and reused for further design cycles 2 1.1. Thesis Contributions ˆ Fits the experimental testing constrains ˆ Meets the fabrication requirements ˆ Is Space-Efficient ˆ Is Error-free Traditionally, device testing is carried out manually and hence requires the presence of an experimenter. The second goal of my work is to con- struct automated measurement stations that provide GDS coordinate-driven testing. The purpose of the automated measurement system is to signifi- cantly reduce the work and time needed to obtain experimental results. GDS coordinate-driven testing uses grating coupler locations on the mask file as a reference to deduce the traveling path of the input/output fibers or fiber array for automated photonic device testing. Setting up a measurement sta- tion properly in order to obtain accurate results with maximized coupling efficiency and minimized noise level is important. It is ideal to have a well calibrated experimental setup and design the mask accordingly to minimize measurement work required. A well-calibrated experimental setup has the following characteristics: ˆ A stable measurement environment ˆ Properly angled optic fiber(s) to ensure maximum coupling efficiency ˆ An effective microscope setup that can provide clear view of the device and fiber during experiments ˆ Stages that allow easy fiber movement in all directions and fiber angle adjustments 1.1 Thesis Contributions I am mainly involved in mask layout designs and device measurements. I have created a script library in Pyxis where each script represents a mask layout design PCell and built two automated setups in collaboration with Han Yun which are now being used in SiEPIC and CMC workshops. My supervisor, Dr. Lukas Chrostowski, has guided me by providing innovative ideas and concepts. The publications that I am involved in are: 3 1.2. Thesis Organization 1. W. Shi, X. Wang, W. Zhang, H. Yun, C. Lin, L. Chrostowski, and N. A. F. Jaeger, “Grating-coupled silicon microring resonators”, Applied Physics Letters, vol. 100, no.12, pp. 121118, 2012. 2. W. Shi, H. Yun, T. K. Chang, W. Zhang, C. Lin, N. A. F. Jaeger, L. Chrostowski, “Differential measurement of transmission losses of inte- grated optical components using waveguide ring resonators, Photonics North, Montreal, Canada, 2012. 3. C. Lin, L. Chrostowski, and N. A. F. Jaeger, “Design and Character- ization of Embedded Ring Resonators, The 15th Canadian Semicon- ductor Science and Technology Conference, Vancouver, Canada, 2011. 4. W. Shi, X. Wang, C. Lin, H. Yun, Y. Liu, T. Baehr-Jones, M. Hochberg, N. A. F. Jaeger, and L. Chrostowski, “Electrically tunable resonant filters in phase-shifted contra-directional couplers”, IEEE Group IV Photonics Conference, 09/2012 5. W. Shi, M. Greenberg, X. Wang, Y. Wang, C. Lin, N. A. F. Jaeger, and L. Chrostowski, “Single-band add-drop filters using anti-reflection, contra-directional couplers”, IEEE Group IV Photonics Conference, San Diego, USA, pp. WA7, 09/2012. 6. W. Shi, H. Yun, W. Zhang, C. Lin, T. K. Chang, Y. Wang, N. A. F. Jaeger, L. Chrostowski,“Ultra-compact, high-Q silicon microdisk re- flectors”, Optics Express, vol. 20, issue 20, pp. 21840-21846 , 09/2012. 1.2 Thesis Organization This thesis consists of five chapters. The first chapter introduces the evolved photonic device design flow and the importance of my thesis contribution. The requirements that need to be met in order to generate quality mask layouts and construct well-calibrated automated stations are also included. In Chapter 2, we discuss in detail the mask layout drawing methods devel- oped. Also, we show complete masks with detailed step-by-step mask design illustrations. In Chapter 3, we introduce the fiber-to-fiber automated setup constructed and include discussions that illustrate its performance. Chap- ter 4 gives an overview of the automated fiber array setup and studies the stability of the station through a series of experiments. Lastly, Chapter 5 concludes my thesis with suggestions for future work. 4 Chapter 2 Mask Layout Design The layout program we primarily use is Mentor Graphic Pyxis but we have also experimented with other programs such as DW2000 and KLayout. DW2000 is a drawing tool developed by Design Workshop Technology. This program is the program choice for my first mask design [25]. A technology package is provided with basic PCells such as straight waveguides, tapers, arcs and circles. Since we are inexperienced, our mask designs are simple structures such as ring structures and straight waveguide testing devices, etc. The mask is generated by manually placing each PCell onto the lay- out and adjusting the PCell parameters such as waveguide length, width, and circle radius etc. The errors such as improperly connected waveguides and misplaced etch layer are fixed manually. KLayout is a free software developed by Matthias Köfferlein [27]. This layout software has a clean user interface and provides a hierarchy tree which can locate different designs ef- fectively. The main attraction of KLayout is its capability of making direct modifications to GDS files without converting the complete mask layout to other formats. These features promotes KLayout to be the main choice for final mask reviewing. The mask layout figures shown in this chapter are displayed in KLayout. Pyxis is developed by Mentor Graphics. Besides ba- sic manual drawing features, Pyxis provides a scripting platform that offers numerous ways to approach mask designing. To achieve the mask design criteria mentioned in the previous chapter and to work in a commercialized environment to fit industry needs, hierarchy drawing methods and PCell developments can provide the re-usability of the mask we needed. Hence, Pyxis is our primary choice for mask design development. The mask layout portion of the photonic device design flow can be di- vided into three stages: planning stage, drawing stage, and finalizing stage. The planning stage requires the coordination between the simulator and the mask designer to conceptualize a draft structure based on the theoretical analysis of a new design. This draft includes the core design of the device and lists out the core parameters that influence the device performance. During the drawing stage, this draft design is laid out with a drawing tool and the physical feasibility of the design is considered along with its pro- 5 2.1. Mask Drawing with Pyxis jected device performance. Communication is required frequently between the simulator and the mask designer in order for the design to meet the performance expectation and fabrication constraints. The finalizing stage includes routing, tiling, and error checking. By carefully choosing the rout- ing method of the device and the locations of input/output couplers, we ensure that the fabricated mask is feasible for device testing and the allo- cated spaces are efficiently used. In this chapter, we start by discussing the scripting platform of Pyxis and move onto various scripting techniques. We introduce drawing approaches developed for photonic device mask designs in detail and give two step-by-step mask design examples along with the difficulty faced in each example and a justification for the drawing approach choice of each design. 2.1 Mask Drawing with Pyxis 2.1.1 Manual Drawing vs. Scripting Drawing Pyxis has the option of manual drawing like all other layout tools. Pyxis’ transcript window documents each manual action performed by the user and displays the corresponding line of code executed. To create the ring res- onator showed in Figure 2.1, three PCell calls are executed; the add shape() PCell generates rectangles that correspond to the input coordinates and the add ring() PCell creates a ring structure based on the radius and layer in- puts. Program 2.1 illustrates the corresponding code executed from manual inputs. 6 2 .1 . M ask D raw in g w ith P y x is Program 2.1 Ring Resonator Script $add_shape([[-10,5.2],[10,5.7]], "Layer1", @internalk, @nokeep, "drawing"); $add_shape([[-10,-5.2],[10,-5.7]], "Layer1", @internalk, @nokeep, "drawing"); $add_point_device("add_ring", @block, [], [@to, [0,0], @rotation, 0.0, @flip, "none"], [["layer", "1"],["radius1","5"],["radius2","4.5"]], @placed); 7 2.1. Mask Drawing with Pyxis Figure 2.1: This disk resonator has a radius of 5 µm, waveguide width of 500 nm, and a gap size of 200 nm. 2.1.2 Library Components Having a library of components is critical to layout drawings especially while working in collaboration with other people. Library components exist in two forms: existing GDS mask files and scripted PCells. Existing GDS masks can be re-used in new designs but this form of library component requires manual adjustments if one needs to change their physical footprint. On the other hand, PCell library components are more versatile; they are capable of function-like behaviors and generate the corresponding device according to the specified input values. Common examples of GDS library components are the grating and edge coupler. These couplers are required in photonic designs because they are responsible for the input and output of the laser source. Grating couplers are sensitive to the wavelength of the input light [3]; therefore, different versions of grating coupler GDS masks are used for wavelengths ranging from 1450 to 1650 nm(see Figure 2.2). Edge couplers are tapers that gradually reduce the waveguide core width and output the light at the smaller end. These couplers have a higher coupling efficiency but are hard to align to a coupling fiber and require the coupler tips to be located at the chip edge. The PCell examples we include here are the quarter-arc PCell and the transition taper PCell. To minimize loss when light is redirected around waveguide corners, a 90o bend is used to guide the light. For a 220 nm high and 500 nm wide waveguide, the bend radius used is 5 µm (See Figure 2.3(a)). To minimize the loss when the light transitions between a strip waveguide to a ridge waveguide, a transition taper is applied to the transition 8 2.1. Mask Drawing with Pyxis points (See Figure 2.3(b) for the generated mask example and Appendix A for the corresponding PCell script). Figure 2.2: 1550 nm Grating Coupler [9] 9 2.1. Mask Drawing with Pyxis (a) (b) Figure 2.3: (a) Quarter-Circle Arc PCell. (b) Transition Taper PCell. 2.1.3 Drawing Approaches The physical nature of the device design must be considered prior to mask drawing in order to choose a suitable approach. For designs that require overwhelming repetition of the same structures, such as grating structure or multi-ring structure, we use GDS library components. For designs that have similar structures but different parameter variations, we use PCell library components. These drawing methods can be categorized into two primary 10 2.1. Mask Drawing with Pyxis approaches: nested PCell approach and hierarchy approach. The Nested PCell approach is a method that uses multiple PCells to cre- ate the final device structure. By inputing the parameter variations to the final PCell function using for-loops, we can generate complex device masks. The advantage of using this method is that the user only has to manage one PCell script. However, the final mask generated using this approach contains no hierarchy levels. Program 2.2 is an example of a ring resonator PCell created using nested PCell approach. Pyxis PCells’ general form con- tains three functions; in this example, the functions are ring resonator(), build ring resonator(), and ring resonator parameters(). By defining input parameters - gap, radius, and waveguide width - in the basic functions, the code illustrated in Program 2.1 is parameterized into a nested PCell that generates ring resonator structures. The hierarchy approach generates the final GDS layout by using GDS library components. Hence, the final layout is formed by a hierarchy of sub- layout files. The advantage of this approach is that it avoids the re-creation of identical structures. Referring to a pre-existing GDS effectively reduces the final mask layout file size and script drawing time compared to the nested PCell approach. The disadvantage of this approach is that managing the sub-cell files is troublesome when the required parameter iterations increase. To prepare for the final mask generation, the sub-cell GDS files with different parameters are generated first through sub-cell generation script. During the final mask generation, these generated sub-cells are referenced and placed onto the mask accordingly. The generation of the final mask layout uses an execution file (it is called a do-file in Pyxis) that defines the location of these these sub-cells. Program 2.3 is an example script that creates a ring sub-cell. The execution of this script uses input parameters that defines a ring structure as the cell name and creates the ring structure accordingly to generate the sub-cell. 11 2 .1 . M ask D raw in g w ith P y x is Program 2.2 Pyxis Parameterized Device Script function ring_resonator () { local device = %get_device_iobj(); local gap = $get_property_value(device, "gap"); local radius = $get_property_value(device, "radius"); local waveguide_width = $get_property_value(device, "waveguide_width"); build_ring_resonator(gap, radius, waveguide_width); } function build_ring_resonator(gap:number (default=0.2), radius:number (default=5), waveguide_width:number (default=0.5)) { $add_shape([[-10,radius+gap],[10,radius+gap+waveguide_width]],"Layer1", @internalk, @nokeep, "drawing"); $add_shape([[-10,radius+gap],[10,radius+gap+waveguide_width]],"Layer1", @internalk, @nokeep, "drawing"); $add_point_device("add_ring", @block, [], [@to, [0,0], @rotation, 0.0, @flip, "none"], [["layer", "1"],["radius1",radius],["radius2",radius-waveguide_width]], @placed); } function ring_resonator_parameters(gap: optional number (default 0.2), radius: optional number (default 5), waveguide_width: optional number (default 0.5)) { return[["gap",$g(gap)],["radius",$g(radius)],["waveguide_width",$g(waveguide_width)]]; } 12 2 .1 . M ask D raw in g w ith P y x is Program 2.3 Pyxis Script: Hierarchy Approach function ring_cell(gap:number (default=0.2), radius:number (default=5), waveguide_width:number (default=0.5) { local device_name=$format("gap_%1d_rad_%1d_width_%1d_ring", gap,radius,waveguide_width) $create_cell(device_name, @block, @geometry_editing, @ninety, "","") $reserve_cell(); $add_point_device("add_ring", @block, [], [@to, [0,0], @rotation, 0.0, @flip, "none"], [["layer", "1"],["radius1",radius],["radius2",radius-waveguide_width]], @placed); $save_cell(@all); } 13 2.1. Mask Drawing with Pyxis 2.1.4 Routing Routing is an important step in designing layouts. A well thought out rout- ing method can minimize a large amount of empty spacings, and thus allow more devices to be packed into the final layout. However, device packing is not the only concern; we must take into account the measurement setup con- strains as well. For example, active mask designs require additional probes for current injection. Therefore, there are limited ways of positioning the input, output couplers and the n-doped and the p-doped contacts. Given all the constrains, it is challenging to come up with a suitable routing method that provides convenient chip testing and reduces empty spacings (see Sec- tion 2.2.2 for a detailed routing example). 2.1.5 Error Checking In order for the fabricated device to meet the performance expectation, the mask submitted to the foundry is required to be error free. A rule file is provided by the foundry and is used to identify mistakes and violations. Using Pyxis’ error checking platform, errors are identified and highlighted (see Figure 2.4). The error illustrated in this example is the acute angle error. Other examples of common errors and violations include: ˆ Misaligned waveguides ˆ Minimum spacing violation ˆ Minimum feature size violation ˆ Enclosure violation ˆ Layer density violation 14 2.1. Mask Drawing with Pyxis Figure 2.4: Error Checker Display in Pyxis Figure 2.5: Tiling Mask 2.1.6 Tiling The silicon layers and the metal layers in the fabrication process require the density of silicon or metal to be within a given margin; these density rules are 15 2.2. Completed Mask Designs included in the error checking rule file. These density rules are implemented so the etched material density is within a margin during lithography. In the cases where the densities are not met, we tile in dummy features, such as a tiny square, in the empty spacings to raise the overall density of the particular layer. Keep-out layers are used to cover delicate design features so they will not be sabotaged by the tiling script. Figure 2.5 shows a typical tiled layout. This mask is tiled in the silicon layer, and two metal layers. 2.2 Completed Mask Designs To demonstrate the mask design flow described in the previous section in de- tail, two complete mask examples are included in this section: the traveling wave modulator mask and the on-chip optical circuit. Both of the example masks are fabricated under the OpSIS IME process [4]. An illustration of the fabrication procedure is shown in Figure 2.6. Figure 2.6: Fabrication Process Illustration 2.2.1 Traveling Wave Modulator In this section, we describe the traveling wave modulator design in detail. This example is chosen to be included in this thesis because it implements the new design flow introduced in Chapter 1. The traveling wave modulator project emphasizes the importance of simulation-to-layout design loop. Fre- quent communications established between the mask designer and simulator achieve the optimization needed both in device performance simulation and final mask physical footprint [5]. The objective of this design is to reach a high speed operation of 25 Gbs to 40 Gb s with high extinction ratio and 16 2.2. Completed Mask Designs match the performance specifications of the current state-of-the-art modu- lators [2]. The physical structure of this design is similar to the traditional Mach-Zehner Interferometer (MZI); the modulation of the signal is achieved by introducing a pi phase shift difference between the two waveguides. The use of traveling wave electrodes allows for high-speed operation through us- ing a depletion-mode reverse-biased diode. Due to its long length (mm), it operates at a low drive voltage and allows wide optical bandwidth op- eration [6]. The key of this design is achieving a velocity synchronization between the traveling wave electrode microwave velocity and optical signal velocity [6]. To address this, the structure proposed for the traveling wave modulator uses a capacitively loaded fin microwave waveguide, known as a slow-wave electrode [19]. Extended optical path lengths are implemented by ”snaking” the optical waveguides to reduce the overall device footprint. The challenge of this design is minimizing loss from the parasitic resistance and capacitance introduced by the proposed structure while ensuring the optical signal velocity and electrode microwave velocity perfectly match. Figure 2.7: Traveling Modulator Design Flow 17 2.2. Completed Mask Designs Modulator modeling, a major portion of the traveling wave modulator design, is carried out as illustrated in Figure 2.7. The foundry process sim- ulations [4], the optical performance simulations [5], and the PCell design of this structure are carried out simultaneously. Device dimensions are ad- justed and the generated GDS is fed to programs such as Sonnet or FDTD for direct GDS simulation. The OpSIS IME fabrication process offers the following features: ˆ Strip and Ridge Waveguide ˆ n, p doping for PN junction ˆ n+, p+ transition doping ˆ n++, p++ contact doping ˆ metal interconnect ˆ vias ˆ contact metal Device Structure To achieve velocity matching, the footprint of this device consists of features that delay the microwave velocity and optical signal velocity. Taking this into account, the optical path of this device is defined as illustrated in Figure 2.8 (a). The input optical signal goes through a 50-50 splitter and the split signals travel along a S-shaped symmetric paths and are merged at the output end with another 50-50 splitter; this path is defined by combining the horseshoe paired structures into an array. In the design iterations, the input and output ends of the modulators are identical; the variation of this modulator is determined by the number of horseshoe pairs chosen and their physical length. The S-shaped horseshoe pair is a nested PCell. It is the core of the design and defines the overall geometry of the modulator. The parameters that dictate the length of optical path of the modulator are lx, ly, and r as illustrated in Figure 2.8 (b). 18 2.2. Completed Mask Designs (a) (b) Figure 2.8: (a) Modulator Waveguide Path (b) Horseshoe PCell Waveguide Parameters The bend radius used in the horseshoe PCell design is 10 µm because the horseshoe pair is a ridge waveguide and larger bend radius is required to minimize optical loss (see Figure 2.9 (a)). In the PCell, the shallow etch of the ridge waveguide is internally parameterized to match the parameter variations of lx, ly, and d. The PN-junction is formed by applying N and P doping layer to the PCell. The two doping layers meet at the center of the waveguide with a slight offset to include a wider P region so the modulator can operate in a P doping favored environment [8](see Figure 2.10). The N and P doping layers have an S-shape geometry that closely match the waveguide (see Figure 2.9 (b)). With N and P layer applied, the added parameters that define the layers are nw and pw, which define N doping width and P doping width, respectively. 19 2.2. Completed Mask Designs (a) (b) Figure 2.9: (a) Horseshoe PCell Ridge Layer Addition. (b) Modulator PN doping Layer Geometry. 20 2.2. Completed Mask Designs Figure 2.10: PN Junction Offset The N+ and P+ doping layers are the transition layers that provides a more gradual change in the doping concentration profile. The N+ and P+ doping layers closely follow the snaking waveguide path. However, unlike N and P layers, the N+ and P+ layers have a gap between the waveguide and doping layer edge. As a result, the parameters introduced by the inclusion of N+ and P+ layers are nnw, ppw, nng, and ppg which corresponds to N+ layer width, P+ layer width, N+ layer gap, and P+ layer gap, respectively (see Figure 2.10 (a) and (b)). The layers with heaviest doping involved in the modulator design are the N++ and P++ doping layer. They are scripted in the similar fashion as N+ and P+ layers and the corresponding parameters introduced to the PCell are nnnw, pppw, nnng, and pppg which corresponds to N++ layer width, P++ layer width, N++ layer gap, and P++ layer gap respectively (see Figure 2.11 (a) and (b)). Figure 2.12 shows a horseshoe-structure with applied ridge etch layer and the doping layers. 21 2.2. Completed Mask Designs (a) (b) Figure 2.11: (a) Doping Layer Width Definitions. (b) Doping Layer Gap Definitions. 22 2.2. Completed Mask Designs Figure 2.12: Horseshoe Geometry with Ridge and Doping Layers To bias the PN junction, metal pads that receive electric signals from contacting probes are required to be connected to the P++ and N++ doping layers; hence, the fabrication process includes metal interconnect layers, Via1, Metal1, Via2, and Metal2. Via1 layer is an interconnect metal layer that links the heavy doping layers to the Metal1 layer. Typically, in other active photonic designs, Via1 structure footprint is minimized. But in our case, we require Via1 to be of a larger scale to uniformly distribute the electrons at the metal junctions. As a result, in order to meet the fabrication rule where Via1 is required to be enclosed by the heavily doped layer by a minimum spacing and the design considerations mentioned previously, the parameters that define Via1 structure in the PCell are chosen to be v1g1, v1w, and v1L. These parameters define the distance between the inner wall of Via1 to waveguide edge, Via1 width, and the gap to the edge of the heavy doping layer respectively (see Figure 2.13). Based on these parameters, the physical shape of Via1 forms two horseshoe shaped metal walls on either side of the center waveguide. The reason for the parameter choice is that we want to make sure the degree of freedom of the physical shape of the metal layers so the PCell is capable of generating wide variations of GDS drafts for re-simulation purposes. 23 2.2. Completed Mask Designs Figure 2.13: Via1 Layer (in dark green) Geometry The next metal interconnect layers are Metal1 and Via2. To internally connect the Via1 and Via2 layers, Metal1 encloses both Via layers. Metal1 layer extends out on the outer rim of the waveguide and fills the center cavity of the inner side of the horseshoe structure (see Figure 2.14). The layers shown in Figure 2.14 are the waveguide layer, Via1 (solid dark green), Metal1 (shaded blue), and Via2 (solid red). The parameter introduced from the addition of the Metal1 layer is m1g. This parameter represents the distance between the waveguide edge to the Metal1 edge. The physical shape of Metal1 shown in figure is the configuration chosen for the final GDS mask. Other configurations have been considered and rejected based on their corresponding simulation results or unfeasible physical footprint. Ideally, like Via1 layer design, we want to increase Via2 size. Thus, the Via2 is placed as a solid block in the center cavity. The Via2 on the outer rim of the horseshoe pair is separated so the current is distributed more evenly. The parameters that define the inner Via2 structure are v2w and v2L. 24 2.2. Completed Mask Designs Figure 2.14: Modulator Metal Interconnect Layers The Metal2 layer is the top metal layer that defines the fin electrodes which contribute to microwave velocity delay. Three electrodes are defined in this layer; these electrodes correspond to a proposed Signal-Ground-Signal (SGS) configuration. The length of the electrodes scales with the vertical array distance of the horseshoe arrays. The widths of the outer two elec- trodes and the center electrode are defined by the following parameters: m2w1 and m2w2, respectively. The distance between the electrodes also plays an important role as indicated by the simulated results, and hence it is also parameterized; the corresponding parameter is m2g. Figure 2.15 (a) shows PCell array to illustrate the over all electrode design configuration and Figure 2.15 (b) shows the PCell that represents the horseshoe pair. 25 2.2. Completed Mask Designs (a) (b) Figure 2.15: (a) Modulator Structure Overview. (b) Horseshoe Pairs PCell. 26 2.2 . C om p leted M ask D esign s Description Ratio Number of Modulated Impedance Probe Pads Device Area Horseshoe Pairs WG Length Transformer (mm) (mm) (mm) (mm2) 4 32 8.192 0.6 1.703 4 12 2.072 0.6 0.935 4 7 1.792 0.6 0.743 With 3.5 36 8.064 0.6 1.856 Impedance 3.5 14 3.136 0.6 1.012 Transformer 3 42 8.064 0.6 2.087 3 16 3.072 0.6 1.088 2.5 50 8 0.6 2.384 2.5 19 3.04 0.6 1.204 4 32 8.192 0.2 1.463 4 12 3.072 0.2 0.695 No 4 7 1.792 0.2 0.503 Impedance 2.5 50 8 0.2 2.154 Transformer 2.5 19 3.04 0.2 0.964 2.5 11 1.76 0.2 0.656 Short 4 1 0.256 0.2 0.272 Device 2.5 1 0.16 0.2 0.272 Table 2.1: Device Summary 27 2.2. Completed Mask Designs The PCell revealed in 2.15 (b) is intended to be directly used in simula- tion. Due to computing power issue, direct simulation on the PCell is not ideal because of the small mesh steps that are required to simulate round corners. Hence, the PCell corners are modified from 10 µm arcs into 90o straight waveguide connections to match the mesh constraints. Based on the simulation results, we have decided to include 17 traveling wave modulator designs to the total assigned space of 22.0 mm2(see Table 2.1). The short devices are included in the final mask so the response of the proposed horse- shoe pair PN junction can be tested and used as a reference in the analysis of the complete traveling wave modulator structure. The ratios presented in Table 2.1 correspond to microwave and optical wave velocity matching. For example, in ratio 4 designs the optical wave is predicted to travel 4 times faster than the microwave through Sonnet simulations [5]; therefore, extra length is applied to the optical waveguide to achieve an in-phase modula- tion. Similar simulations are done for the other ratios; microwave speed is adjusted by changing the metal junction widths and lengths to modify the junction RC constants [5][6]. The values included in Table 2.2 are in µm; they represent the PCell parameters of the ratio 4 designs. The last step of the modulator drawing procedure is the addition of con- tact pads. The pads and the attached impedance transformers are defined on the Metal2 layer (see Figure 2.16) [5]. Arranging the complete modu- lators onto the allocated mask space is not trivial. To minimize possible cross-talk between individual modulators, we align the modulators with a 200 µm horizontal and 100 µm vertical spacing. The empty spacings are filled with passive devices to maximize space efficiency. The traveling wave modulators use edge coupling. As a result, the input and output ends are required to be located on the left and right end of the chip. The routing method chosen for this mask is manual routing due to the irregular lengths of the devices and the edge coupling constraints. Keep-out layers are used to cover the core of the modulator design; we want to restrict the tiling of the Metal1 and Metal2 layers to be 50 µm away from the electrodes. Hence, in order to meet the final density requirement on the metal layers, the tile density from the tiling script is modified. Figure 2.16 shows an example of the final GDS of traveling wave modulators that contains 11 modulators; the rest of the modulators are merged with other layouts to space efficient purposes. 28 2.2. Completed Mask Designs Description Ratio 4 lx waveguide length 42.4 ly waveguide width 12 d distance between left and right PN junction 1 nw N dope width 2.95 pw P dope width 3.05 nnw N+ width 4.5 ppw P+ width 4.5 nng distance of N+ to waveguide 0.25 ppg distance of P+ to waveguide 0.25 nnnw N++ width 4.5 pppw P++ width 4.5 nnng distance of N++ to waveguide 0.5 pppg distance of P++ to waveguide 0.5 m1g distance of Metal1 to waveguide 2 v2w Via2 width 39.3 v2L Via2 length 12 m2w1 Outer electrode width 100 m2w2 Center electrode width 16 m2g Electrode Gap 140 Table 2.2: PCell Parameter Detail Figure 2.16: Traveling Wave Modulator Final GDS Layout 29 2.2. Completed Mask Designs 2.2.2 On-Chip Optical Circuit On-chip optical circuit design is a project in collaboration with Optelian. The goal of this project is to demonstrate simple on-chip circuits consist- ing of a maximum of three optical components and provide Optelian with a final chip that uses edge coupling and simple probing device orientations (discussed in detail in a later section). This design example is included in this thesis to demonstrate the importance of device packing and routing. The components involved in the optical circuit design are a ring modula- tor, a photodetector, and three variations of variable optical attenuators (VOAs). The ring modulator and the photodetector are documented com- ponents from the OpSIS IME GDS library (see Figures 2.17 and 2.18) [21]. Both the ring modulator and the detector are modified slightly from GSG configuration to SG configuration (see layout section for detail). The pho- todetector and the ring modulator have been simulated and tested by OpSIS before they are included in the OpSIS library; hence the focus of our work is to design VOAs that act as a switch by attenuating the optical signal before it enters the photodetector. This design is fabricated on the same run as the traveling wave modulator discussed above (see Figure 2.6 for fabrication process illustration). Figure 2.17: OpSIS IME Photodetector [21]. 30 2.2. Completed Mask Designs Figure 2.18: OpSIS IME Ring Modulator [21]. A total of three VOA designs are included in the on-chip optical circuit design. The first VOA has a similar MZI-like structure described above but implements a N++, I, P++ doping. Phase shift is achieved by applying an electric field to one of the branches [10,11,23]. The second VOA is a long single waveguide with N++, I, P++ doping. The optical signal is atten- uated due to the optical loss increase from carrier injection when the PIN junction is forward biased [12,23]. The third VOA is a MZI-like structure that implements a N++, N, N++ junction to one of the branches [4]. The goal of this design is to achieve a pi phase shift between the two waveguide branches by heating one of the branches to change its optical property. MZI PIN VOA (Design 1) To estimate the performance of the PIN junction VOAs, simulations carried out with Lumerical DEVICE and MODE Solution are compared to previous PIN structure measurement results [22][23]. The structure is a 500 nm wide, 500 µm long ridge waveguide. The heavily doped layers are 200 nm away from the waveguide edge. The simulation and measurement results 31 2.2. Completed Mask Designs are compared in the following figures. Figure 2.19: Current vs. Voltage [22] Figure 2.20: Effective Index vs. Voltage [22] 32 2.2. Completed Mask Designs Figure 2.21: Loss vs. Voltage [22] Using a lossless model that represents a simple MZI structure, the trans- fer function, IiIo , and β are [23][24]: Ii Io = 1 2 [1 + cos(β1L1 − β2L2)] (2.1) β = 2pineff λ (2.2) Since the PIN VOA design has a symmetric structure, the condition required to satisfy a pi phase shift is defined as: ∆neff = λ 2L (2.3) As a result, the ∆neff required for a pi phase shift of a 3 mm long MZI at wavelength 1550 nm is 2.58 × 10−4. The VOA designs implement the PIN junction with an 800 nm doping-layer-to-waveguide gap rather than the 200 nm gap design of the old PIN structures; the doping layer gaps are increased to minimize loss due to doping [4]. Due to the changed PIN junction characteristic, the effect of voltage on ∆neff is estimated to be 25% or less of the data illustrated in Figure 2.20. To compensate for the PIN junction variation, the length of the MZI VOA design is set to 3 mm. The 33 2.2. Completed Mask Designs estimated voltage to achieve the required pi phase shift for the 3 mm MZI VOA is 0.8V. Long PIN VOA (Design 2) The long PIN VOA is a single waveguide structure with a PIN junction that has an 800 nm doping-layer-to-waveguide gap. As a result, the loss, as illustrated in Figure 2.21, is expected to increase more gradually; the extinction ratio for a long PIN VOA with 1 cm length is approximated to be 15 dBm with a 1V applied voltage. Temperature Tuning VOA (Design 3) To estimate the efficiency of the temperature tuning VOA, we started out by predicting the resistance of the VOA structure (see Figure 2.22). The L1, L2, and L3 values are 500 nm, 800 nm, and 7.9 µm, respectively. Figure 2.22: Temperature VOA Structure The measured sheet resistance, ρ, values used for thick silicon, thin sili- con, and N++ doped thin silicon are extracted from [4]. A total resistance of the MZI branch is 4.268 Ω. It is calculated using the following equation where Lwg is the waveguide length: R = ρ1L1 Lwg + 2 ρ2L2 Lwg + 2 ρ3L3 Lwg (2.4) Using a constant that represent the oC change per mW of 1 mm long waveguide, Tc = 1.623×10−4 oCmmW [7], we can deduce the temperature change due to the input current with the following formula (see Figure 2.23). 34 2.2. Completed Mask Designs Temperature = Tc × I 2R L (2.5) Figure 2.23: Current vs. Change in Temperature Using MODE Solution, the effective index neff is extracted and curve fitted in Matlab (see Figure 2.24). Equation 2.1 is modified to include the effect of the change in temperature; β and the corresponding MZI transfer function are defined as the following [24]: β = 2pi(neff + dn dT ∆T ) λ (2.6) Ii Io = 1 2 [1 + cos(β1L− 2pi(neff + dn dT ∆T ) λ L)] (2.7) Using thermo-optical coefficient, dndT = 1.86× 10−4K−1 [24], we can plot the transfer function of the VOA versus the change in temperature and the transfer function versus input current (see Figures 2.25 and 2.26). The re- sults suggest that to reach the first VOA turn off point, the temperature change required is 1.75 oC and the current required to reach that tempera- ture is 80 mA. 35 2.2. Completed Mask Designs Figure 2.24: Effective Index vs. Wavelength Figure 2.25: Transfer Function vs. Change in Temperature 36 2.2. Completed Mask Designs Figure 2.26: Transfer Function vs. Current The performance prediction of the VOAs introduced above is summa- rized in Table 2.3. An insertion loss of 1.3 dBm is used to account for y-branch loss in the VOA performance calculations [18]: Design 1 Design 2 Design 3 Description PIN VOA Long PIN VOA Heat Tuning VOA Structure MZI Straight Waveguide MZI Junction Implemented P++, I, N++ P++, I, N++ N++, N, N++ Extinction Ratio Predicted 12.9 dBm 15 dBm Infinite Wavelength Dependence Independent Independent Independent Insertion Loss 3.2 dB 4 dB 7 dB Switch Current (off to on) 0.1mA 1.3mA 80 mA Switch Voltage (off to on) 800 mV 1000 mV 320 mV Switch Power (off to on) 0.080 mW 1.3 mW 25.6 mW Device Length 3 mm 10 mm 3 mm Table 2.3: VOA Performance Summary 37 2.2. Completed Mask Designs VOA PCells To build a PCell for these VOAs, we start by mapping out the Si layers first before the doping layers, the Via layers and the metal layers are applied. The MZI-like VOAs use a 50-50 splitter library component to direct the input optical into two branches and another 50-50 splitter to combine the optical signals before the output grating coupler. Both the strip and ridge waveguide are implemented in the VOA designs; the PCell of the transition taper described in section 2.1.2 is used at the waveguide junctions. The parameters that are responsible for the physical shape of this PCell are n and L, which correspond to the number of bends and length of the branch, respectively (See Figure 2.27(a)). The similar concept is used to design the third VOA (see Figure 2.27 (b)). (a) (b) Figure 2.27: (a) MZI-Like VOA Waveguide Structure. (b) Single Waveguide VOA Structure 38 2.2. Completed Mask Designs The doping layers are defined and parameterized in the fashion as il- lustrated in section 2.2.1. The PCell parameters and the corresponding junctions are illustrated in Figure 2.28. (a) (b) Figure 2.28: (a) PIN Junction Definition. (b) NnN Junction Definition. The purpose of the metal interconnect layers is to provide a linkage between the metal pads and the heavily doped layers. The footprint of the interconnect layers is determined by the length and width of the heavily doped layers. Via1 and Metal1 layers are fitted onto the doping layers with the minimum gap requirement to the doping layer edges to avoid drawing violations. Via2 and Metal2 layers have the connection described above. The Via2 and Metal2 layers have a zig-zag configuration so the N++ doping layers are connected only on the left side and the P++ layers are connected only on the right side (see Figure 2.29). The N++, N, N++ junction is connected in the same style. 39 2.2. Completed Mask Designs (a) (b) (c) (d) Figure 2.29: (a) Via1 Layer (blue). (b) Metal1 Layer (green). (c) Via2 Layer (red). (d) The complete MZI-like PIN VOA Design. 40 2.2. Completed Mask Designs On-Chip Optical Circuit Layout Understanding the performance of each component is critical to understand- ing the proposed on-chip optical link structure. Hence, besides the three- component optical link structure that consists of ring modulator, a type of VOA, and photodetector, single components and two-component links are placed onto the final mask as well. Unlike single-component designs such as the traveling wave modulator describe above, the footprint of each type of links or single components introduced in the optical circuit varies more vigorously. As a result, placing the components onto the final layer while attempting to minimize empty spacing and making experimental measure- ments trivial is a challenging task. The constrains considered are: ˆ Require both edge coupling and grating coupler. ˆ Only top and right edge are available for edge coupling. ˆ Three component links require VOA probes, modulator-detector probe, and input/output optic signal coupling. ˆ Minimize empty spacing. Figure 2.30: Edge Coupling Testing Orientation. 41 2.2. Completed Mask Designs Figure 2.31: Fiber Array Testing Orientation. The photodetector and ring modulator probing pads are reduced. The change from GSG probing to SG probing is established by connecting the interconnect metal layer (Metal1) that links to the ground pads together. By doing so, the electric signal that drives the ring modulator and electrical signal detection required for the photodetector can be from a customized GSGSG probe that is capable of providing separated signals. By combining the ring modulator and the photodetector in this fashion, the testing of the linked component is possible. The concept orientation for device measuring is illustrated in Figures 2.30 and 2.31. Considering the constraints and the irregular link component pattern, the final GDS mask is chosen to be laid out manually. As a result, the rout- ing required for the input and output waveguides for both edge coupling and grating coupling are performed manually as well. To pack and route the on-chip circuit design, all the combinations of the links and single com- ponents are generated via calling PCell or GDS. To effectively pack these components to minimize the waste of space, the components are manually placed onto the allocated space one by one as compactly as possible while allowing versatile waveguide routing. The links between the components and the input and output couplers are established via manually connecting the input and output ports of the components together using the quarter-arc 42 2.2. Completed Mask Designs PCell as the 5 µm radius waveguide bends. Due to limited allocated space, the final GDS does not fit all the combinations of the links. Hence, the spaces allocated for this design are prioritized as the following (see Figure 2.32 (a) for the final GDS mask and (b) for a 3-component link example): 1. 3-component links with edge coupling (top left corner) 2. 3-component links with grating coupling (bottom right corner) 3. 2-component links with both type of coupling (bottom left corner) 4. Single Components (packed in left over spacing) A summary of the components of the on-chip optical circuit are docu- mented in Table 2.4. Description Ring VOA Type VOA Length Detector Coupling Modulator (mm) Method Yes 1 10 Yes Edge Yes 2 3 Yes Edge Yes 3 3 Yes Edge Yes 1 20 Yes Edge Yes 2 6 Yes Edge 3-Component Yes 3 6 Yes Edge Link Yes 1 10 Yes Grating Yes 2 3 Yes Grating Yes 3 3 Yes Grating Yes 1 20 Yes Grating Yes 2 6 Yes Grating Yes 3 6 Yes Grating 2-Component Yes Yes Edge Link Single Yes Edge Component Yes Edge 1 10 Edge 1 10 Grating 2 3 Grating 3 3 Grating Table 2.4: On-Chip Optical Circuit Device Summary 43 2.2. Completed Mask Designs (a) (b) Figure 2.32: (a) On-Chip Optical Circuit Final GDS Layout. (b) 3- Component Link (located at bottom right corner of the final mask) 44 Chapter 3 Measurement Setup: Fiber-to-Fiber Automated Measurement Station The fiber-to-fiber automated measurement station is an improved version of our previous manual measurement stations. In the outdated manual setup, it is difficult to align to the optimal fiber position because the manual actuators are not as stable compared to the newly implemented motorized actuators. The manual actuators have a tendency to backlash upon the release of the actuator handle; the coupling power drops several dBm because of this. Therefore, we propose the fiber-to-fiber automated measurement station to improve our photonic device measurement results. 3.1 Station Overview The chip is placed on top of the temperature-controlled platform which is on top of the center manual stage. The center stage elevates the chip to the desired height in relation to the fiber stages. To the left and right of the center stage, the coupling fibers are held in fiber-mounts which are mounted to angle rotators. The angle rotators are fixed to motorized stages. The right motorized stage is mounted to a 1-axis travel stage so the distance between the input and output fibers can be adjusted to fit various input and output coupler distances. The microscope is mounted to the edge of the table and is at the bottom-side of the central stage; the light source is located at the opposite side and is relative to the microscope to provide clear images. Figure 3.1 shows the block diagram setup and a photograph of the system. 45 3.1. Station Overview (a) (b) Figure 3.1: (a) Fiber-to-Fiber Setup Block Diagram Illustration. (b) Fiber- to-Fiber Setup. 46 3.1. Station Overview 3.1.1 Station Specifications To improve the automated fiber-to-fiber setup performance, the following criteria are required: 1. Stage Automation ˆ To achieve automation, stages are required to be controlled through Matlab. The stages used are from Thorlabs. These stages are responsible for automatic fiber positioning. The internal piezo- electric actuators are used for fine alignment once the fibers are in the proximity of the grating couplers [15]. 2. Temperature Control ˆ The temperature controller is used to tune or maintain the tem- perature of heat-sensitive devices during a measurement. The temperature is observed to fluctuate within a range of ±0.005◦C [16]. 3. Laser Source and Photodetector ˆ The laser source used for our measurement is the HP8164A [17]. The typical range of the wavelength sweep performed is from 1460 nm to 1580 nm. A photodetector is also implemented on this module. 4. Fiber-to-Fiber Distance Adjustment ˆ A manual stage is used for coarse fiber-to-fiber distance varia- tion. With the addition of this 1-axis 10 cm travel manual stage, the fiber-to-fiber automated setup can be adjusted to fit various input-to-output coupler distances. 5. Fiber-to-Coupler Angle Adjustment ˆ To optimize the incident angle between the coupling fibers and the grouting coupler, an angle rotator is implemented. The affect of fiber-to-grating coupler angle on the response is discussed in detail in section 3.3.1. 47 3.1. Station Overview 6. Fiber Arm and Holder ˆ The input and output fibers are held in a coupler holder (see Figure 3.2). This holder is connected to a custom-designed alu- minum arm and is connected to the angle rotator to make fiber angle adjustments possible. 7. Laser Coupling ˆ We choose cleaved fiber over lensed fiber to couple the laser into the grating coupler because stripped fiber can be re-stripped and re-cleaved when damaged. As a result, the insertion loss is around -18 dB (about 6 dB less than lensed fiber). The input fiber is a polarization maintaining single mode fiber. The output fiber is a multi-mode fiber; we choose to use multi-mode fiber because it captures all the modes at the output end and thus, have better coupling power. 8. Microscope and Light Source ˆ The clear chip-fiber view is achieved by setting up the microscope and its corresponding light source at an angle to the center stage (see Figure 3.3). This makes device alignment trivial. Figure 3.2: Fiber Holder and Fiber Arm. 48 3.2. GUI Software Figure 3.3: Fiber-Chip Microscope Image 3.2 GUI Software The fiber-to-fiber automated setup supports both semi-manual and fully- automated measurements. Manual device characterization is used for un- desired input and output grating coupler configuration. The automated device measurements are suitable for coupler configurations that are within the movement limitations of the motorized actuators. To allow automated measurements, the ActiveX drivers that correspond to motorized actuators and the piezoelectric actuators are merged into a single master graphic user interface (GUI) in Matlab. By doing so, the movements of the motors and the auto-alignment feature of the piezoelectric actuators can be accessed through Matlab. The signal from the output fiber is split by a 50-50 split- ter. One of the split signals is sent to the laser photodetector, and the other is used for piezoelectric fine alignment. The flowcharts illustrated in Figure 3.4 (a) and (b) show the typical measurement flow for manual and automated device characterization respectively. 49 3.2. GUI Software (a) (b) Figure 3.4: (a) Manual Device Measurement Flowchart. (b) Automated Device Measurement Flowchart. 50 3.3. Automated Setup Tests and Measurement Results The multi-measurement algorithm requires a GDS mask coordinate Ex- cel file and the first and last device motor coordinates of the input and output fiber. The Excel file contains the coordinates of input and output grating couplers which describe the relative distances between the couplers. After aligning the fibers to the first and last device and record the motor co- ordinates, the Excel file GDS coordinates are read and converted into matrix form. The first and last device coordinates from the Excel file are matched with the first and last device motor coordinates. Using these points, relative chip rotation angles to the input and output fibers are calculated along with magnitude scaling constants. Using the calculated parameters, the rest of the device GDS coordinates are converted to motor coordinates and thus the travel path of the input and output fiber is mapped out. The fibers move along the matrix coordinates one by one; a wavelength sweep is performed at each of the aligned grating coupler after piezoelectric actuators locate the optimal coupling input and output fiber positions. 3.3 Automated Setup Tests and Measurement Results Tests have been conducted to illustrate the stability of the fiber-to-fiber setup. These tests include: fiber angles vs. measurement peaks test, 24 hour alignment test, fiber elevation vs. coupling efficiency test, and laser sweep vs. piezoelectric actuator tracking test. Experimental results of fabricated devices are also illustrated at the end of this section. 3.3.1 Fiber Angles vs. Measurement Peaks The purpose of this test is to show how coupling fiber angles affect the measurement response. Figure 3.5 shows three measurements where the fiber angle is at optimized position, 2 degrees less than optimized position, and 2 degrees more than optimized position. The maximized coupling power is located at 1548.5 nm; to achieve this coupling power, the fiber is adjusted to approximately 12 degrees. The maximum peak shifts relative to the angle variation (see Figure 3.5 (a)). At +2 degree relative to the optimal position, the maximum peak’s corresponding wavelength is 1537 nm; at -2 degree relative to the optimal position, the maximum peak’s corresponding wavelength is 1553.5 nm. 51 3.3. Automated Setup Tests and Measurement Results (a) (b) Figure 3.5: (a) The maximum peak shifts relative to fiber angle. (b) Optimal coupling power can be achieved by adjusting the fiber angle to match the designed grating coupler angle. 52 3.3. Automated Setup Tests and Measurement Results At optimal fiber angle, the maximum peak occurs at 1548.5 nm, which corresponds to the 1550 nm grating coupler used for this ring resonator. The coupling power at 1550 nm is -24.62 dBm, -26.91 dBm, and -30.16 dBm for optimal angle, -2 degree from optimal angle, and +2 degree from opti- mal angle, respectively (see Figure 3.6 (b)). The result of this experiment suggests that fiber angles should be re-adjusted for every chip so the fiber angle to grating coupler relationship is optimal. 3.3.2 24 Hour Alignment Test The 24 hour alignment test is designed to test the stability of the setup over a long measurement time. The device choice for this test is a ring resonator. The fiber is first fine-aligned to the grating couplers of the ring resonator. The motor actuators are locked at the same position and the piezoelectric actuators are latched in place. Wavelength sweeps are initiated 12 times per hour, with a 5 minute halt between each sweep, over the time span of 24 hours. Ideally, the fibers should be tracking the optimal position continuously when wavelength sweeps are not initialized. In this experiment, the fiber tracking is purposely turned off so the stability of the motor and the position drift of the piezoelectric actuators can be observed. This experiment is carried out with the temperature controller set to 25 oC. Figure 3.6: 24 Hour Test: Power vs. Time As the temperatures stabilizes to 25 oC, a -2 dBm drop is observed 53 3.3. Automated Setup Tests and Measurement Results from the first wavelength sweeps. As the time progresses through the 24 hour stability test, the power gradually drifts between -31 dBm and -29.6 dBm (see Figure 3.6). Figure 3.7 documents the change in power every 5 minutes. The maximum coupling power variation is around ±0.3 dBm in a 5 minutes time interval (see Figure 3.7). The experimental results suggest that the setup is relatively stable and thus is suitable for a long duration measurement. Figure 3.7: Power Change per 5 Minutes 3.3.3 Fiber Elevation vs. Coupling Efficiency The change in distance between the input fiber and the grating coupler affects the coupling efficiency due to the change in laser spot size. The purpose of this experiment is to document the effect of the fiber-to-chip height on the coupling power. The coupling efficiency is expected to drop as we incrementally move the fiber tip away from the coupler. The fiber elevation experiment starts out by aligning the coupling fibers to the optimal position with an infinitesimally small fiber-to-chip height. A wavelength sweep is performed at each fiber-to-chip elevation as the fiber is moved away gradually at an interval of 4 µm. The final elevation of the fiber is approximately 80 µm above the grating coupler. At each elevation, the fibers 54 3.3. Automated Setup Tests and Measurement Results are re-aligned in their X and Y positions. The result is illustrated in Figure 3.8. Figure 3.8: Fiber Elevation vs. Coupling Power . The result suggests that the power decreases as the fiber elevation in- creases as predicted. Currently, the fiber-to-fiber station is not capable of automatically determining the fiber-to-chip height. Hence in order to avoid damaging the fiber, the height of the fiber is kept at a safe distance away from the chip when the automated measurement algorithm is triggered. 3.3.4 Laser Sweep vs. Piezoelectric Actuator Tracking With piezoelectric actuation, we can choose to track or latch the fibers during a wavelength sweep. Due to the nature of the grating coupler, the optimal position for every wavelength is slightly different. Hence, tracking during the measurement can provide data sets with less power difference between the highest peak and lowest peak (see Figure 3.9(a)). The purpose of this experiment is to determine the effect of piezoelectric actuator tracking on the measurement response. 55 3.3. Automated Setup Tests and Measurement Results (a) (b) Figure 3.9: Fiber Tracking vs. Coupling Peaks 56 3.3. Automated Setup Tests and Measurement Results Even though less power drop is observed when tracking is used, moving the fiber during an experiment is not desired because the movement from piezoelectric actuation introduces ripple noise to the system (See Figure 3.9 (b)). With tracking off, the power difference between the highest peak and the lowest peak is 21.59 dBm; with tracking on, the power difference is 17.30 dBm. The ripple introduced to the system by piezoelectric tracking is approximately 0.5 dBm at the peaks. 3.3.5 Device Measurement Results The fiber-to-fiber automated setup is built for research purposes but is also used for graduate and undergraduate courses as well. In the past year, people who took photonic fabrication workshops and courses have been visiting our laboratory for stage demonstrations or to measure their designs. In this section, we show device measurement examples acquired from this setup. Figure 3.10: These are the measurement results of grating structures de- signed by Xu Wang (manuscript in preparation). 57 3.3. Automated Setup Tests and Measurement Results Figure 3.11: This is the transmission and reflection response of a disk res- onator designed by Wei Shi [18]. 58 3.3. Automated Setup Tests and Measurement Results Figure 3.12: These are the measurement results of a 2-ring structure that demonstrates Vernier Effect designed by Robi Boeck (manuscript in prepa- ration). 59 3.3. Automated Setup Tests and Measurement Results Figure 3.13: This is a measurement of the dumbbell narrow-band reflector designed by Han Yun [5]. 60 Chapter 4 Measurement Setup: Fiber Array Automated Measurement Station In fiber-to-fiber approach we use two copper fiber mounts to hold the input and output fibers to the left and right of the center stage, whereas in fiber array approach, we use a fiber array ribbon. This setup is inspired by the setup built by the OpSIS group from University of Washington [21]. Based on the performance of the their setup, we believe switching to the fiber array ribbon will greatly increase device coupling power. 4.1 Station Overview The chip is placed on top of the platform of an angle rotator that is on top of the Y-axis motorized stage. The Y-axis stage sits on top of the X-axis motorized stage and forms a cross configuration. The fiber array ribbon is held by a custom-made aluminum piece which is suspended on top of the chip platform by an aluminum arm that is attached to an angle rotator. The angle rotator is fixed onto a Z-axis manual actuator that is bolted to a raised platform so the fiber ribbon height can be adjusted accordingly. The ribbon- to-chip image is captured by two microscopes; one microscope shows the top view and is used for alignment purpose; the other microscope is angled from the side to display the height displacement between the fiber array and the chip to prevent crashing the fiber array into the chip during alignment. The light source for the microscopes illuminates the chip platform at an angle from behind the fiber ribbon (see Figure 4.1). The benefit of using the fiber ribbon setup is that only the chip is moving during automated alignment procedure rather than having to move two fibers like in the fiber-to-fiber setup. This makes the alignment process simpler. However, using the fiber array setup also requires the grating couplers to be routed in a standard configuration that corresponds to the fiber array used. In our case, the 61 4.1. Station Overview grating couplers need to be lined up with a spacing of 127 µm. (a) (b) Figure 4.1: (a) Fiber Array Setup Block Diagram Illustration. (b) Fiber Array Setup. 62 4.1. Station Overview 4.1.1 Station Specification To improve the automated fiber array setup performance, the following cri- teria are required: 1. Stage Automation ˆ To achieve mask level automated measurement, the stages are re- quired to be automated and have large enough maximum travel to cover the entire chip. The Thorlabs stages used allow only sin- gle axis actuation but have a maximum travel of 220 mm. These two stages are set up in an XY configuration and are responsible for both coarse and fine alignment of the fiber array [15]. 2. Laser Coupling ˆ The laser is coupled in and out of the device via fiber array (fab- ricated by PLC Connect). Fiber array ribbon is a plastic piece; the fibers are separated 127 µm apart and are glued onto the carved channel cavities. The fibers are polished along with the plastic tip surface of the ribbon. The fiber array ribbon that is currently implemented is a 4-channel fiber array polished to 10◦ (see Figure 4.3 (a)). 3. Fiber Arm and Holder ˆ The fiber array holder is a slotted aluminum piece that uses side screws to hold the fiber array ribbon. The custom-made alu- minum arm secures the holder in a similar fashion and is con- nected to an angle rotator (see Figure 4.2). 4. Angle Adjustments ˆ The fiber-grating coupler angle and chip-to-array orientation are important factors that affect the coupling power. An angle rota- tor is implemented to adjust the incident angle between the fiber array and the grating couplers. Another angle rotator is placed under the chip the grating coupler pair angle can be matched with fiber array angle; this is done by making sure the fiber array ribbon edge is parallel to the chip edge under the microscope. 5. Fiber-to-Chip Height Adjustment 63 4.1. Station Overview ˆ A manual stage is attached to the fiber arm and holder. This manual stage is installed so the height between the fiber array and the chip can be changed accordingly. 6. Laser Source and Photodetector ˆ The same type of laser and photodetector used in fiber-to-fiber automated measurement station is used for the fiber array station (see section 3.1.1). 7. Microscopes and Light Source ˆ The side microscope is angled around 10o and provides the fiber- to-chip height view. The main microscope and its corresponding light source shows the top view of the fiber array and is used as a reference during device alignment. Figure 4.3 shows the top view with and without the fiber array aligned. Figure 4.2: Fiber Array Ribbon Holder and Fiber Arm 64 4.1. Station Overview (a) (b) Figure 4.3: (a) Fiber Array Setup Microscope Top View with Fiber Array. (b) Fiber Array Setup Microscope Chip Top View. 65 4.2. GUI Software 4.2 GUI Software Manual fiber array alignment is not as trivial as fiber-to-fiber alignment. It is difficult to align the fiber arrays under the microscope because the location of the input and output fiber is difficult to identify (see Figure 4.3). To ad- dress this issue, several alignment algorithms are implemented to help with the visualization of the current fiber and grating coupler positions. Using these functions, we can locate the desired grating couplers and use the GDS mask coordinates to map all the actual coordinates of the devices and hence perform chip level automated measurements. The GUI is constantly being updated to include new functionalities [20]. It is now more user-friendly and include 1220 nm laser controller module. The typical measurement flow for manual and automated device characterization are illustrated in the follow- ing flow charts (see Figures 4.4 and 4.5). Figure 4.4: Manual Device Measurement Flowchart 66 4.2. GUI Software Figure 4.5: Automated Device Measurement Flowchart. 4.2.1 Area Sweeping Map sweeping function scans a small area in proximity to the current loca- tion of the fiber ribbon. The function moves the fiber ribbon in a snake-like fashion and record the power continuously (see Figure 4.7 (b)). The scan window is user defined. A contour plot is generated at the end of the sweep to provide a visual of the relative coupling of the swept area; the color bar is in dBm (see Figure 4.6 (a)). Each point of the plot represents a power value collected via power sensor. The corresponding grating coupler microscope image is illustrated in Figure 4.6 (b). The circled coupling peaks in Figure 4.6 (a) correspond to the circled grating coupler pairs in Figure 4.6 (b). The X axis of the plot represents the total data point collected per line; each unit in Y axis represents the Y displacement performed. The red power points in the figure represents the locations of the grating couplers. The flowchart of this program is shown in Figure 4.7 (a). 67 4.2. GUI Software (a) (b) Figure 4.6: (a) Grating Coupler Intensity Mapping. (b) Corresponding Grating Coupler Microscope Image. 68 4.2. GUI Software (a) (b) Figure 4.7: (a) Area Sweeping Algorithm Flowchart. (b) Fiber Array Travel Pattern. 69 4.2. GUI Software 4.2.2 First Device Alignment and Fine Alignment Because the exact location of the input fiber cannot be located with the naked eye through the microscope, we implement the first device alignment algorithm for device alignment. After the area sweeping function outputs a intensity map and confirms that working grating couplers are in proximity, this function locates the first working device and performs the fine align- ment algorithm. First device alignment uses a similar approach as the map sweeping algorithm. If the recorded power that correspond to the current displacement meets the coupling threshold criteria, the motor is stopped and relocated to the detected coupler. The fine alignment algorithm scans first in the X axis and moves to the optimal X axis coupling position and per- forms a similar scan in the Y axis; the fine alignment process takes around 10 seconds. After the optimal position of coupling is reached, the motor coordinates are recorded and used for chip level auto-mapping algorithm. The flowcharts that represent the first device alignment and fine alignment algorithm are presented in Figure 4.8 and 4.9 respectively. Figure 4.8: First Device Alignment Flowchart 70 4.2. GUI Software Figure 4.9: Fine Alignment Flowchart 4.2.3 Chip Level Auto-Measuring Algorithm The chip level auto-mapping algorithm is defined by two functions. The first function takes in motor coordinates and GDS coordinates and outputs chip rotation angle relative to fiber ribbon and magnitude scaling factor. A total of four motor coordinates are required along with their corresponding GDS coordinates. The angle and distance relations between all the input motor coordinates are calculated and compared to the relations of the GDS coordinates. An average value of the angle difference between the coordi- nates are used to represent the chip rotation angle. The magnitude scaling factor is deduced in the same fashion through cosine law. The calculated rotation angle and scaling factor are applied to three of the input motor coordinates to find the relative fourth motor coordinates. The calculated fourth motor coordinate values are averaged and compared to the inputed fourth motor coordinate. The errors between these values are calculated and if they are within a tolerable range, the function will output the calculated chip rotation angle and magnitude scaling factor. The second function of this auto-mapping algorithm takes in the previous calculated rotation angle and scaling factor and use them to deduce the corresponding motor coor- dinate matrix. By feeding this function a GDS coordinate array, we can 71 4.3. Automated Setup Tests and Measured Results map all the grating couplers on the chip, and therefore chip level testing can be performed. See Figure 4.10 for the complete flowchart of the chip level auto-mapping algorithm. Figure 4.10: Chip Level Auto-Measuring Algorithm 4.3 Automated Setup Tests and Measured Results Stability tests similar to those listed in the fiber-to-fiber setup section are performed to illustrate the stability of the fiber ribbon setup. These tests include: fiber ribbon angles vs. measurement peaks test, repeated alignment test, and 24 hour alignment test. Device measurement results of several different designs are included at the end of this section. 72 4.3. Automated Setup Tests and Measured Results 4.3.1 Repeated Alignment Test The repeated alignment test is performed to show the performance of the first device alignment and the fine alignment algorithm. First, fine align- ment algorithm is triggered to locate the optimal coupling position of a ring resonator. The fiber array is then moved out of optimal position and re-aligned repeatedly. The coordinate of the fiber array is recorded after each re-alignment. By summarizing the change in the optimal coupling lo- cation after each re-alignment, we can understand the performance of the alignment algorithms. Figure 4.11: Fiber Array Position Summary with 4 mm2 window. Figure 4.12: Fiber Array Power Summary with 4 mm2 window. 73 4.3. Automated Setup Tests and Measured Results This test is performed twice with a 2 mm by 2 mm and 10 mm by 10 mm X and Y displacement window. Figures 4.11 and 4.13 correspond to the motor position for the 4 mm2 window and 100 mm2 window respectively. And Figures 4.12 and 4.14 correspond to the measurement power after every re-alignment. Each test sequence iterates for 40 times. The experimental result indicates that during fine alignment, the stages have a ±1 µm varia- tion. This variation is within tolerance range. Overall, the system is stable in terms of device re-alignment and relative motor displacement. Figure 4.13: Fiber Array Position Summary with 100 mm2 window. Figure 4.14: Fiber Array Power Summary with 100 mm2 window. 74 4.3. Automated Setup Tests and Measured Results 4.3.2 24 hour alignment test A ring structure is used for the 24 hour alignment test. This is the same test performed on the fiber-to-fiber automated measurement station (see section 3.3.2). A wavelength sweep is performed every 5 minutes and the maximum value of the sweep is used to plot Figure 4.15. The temperature controller is not available on the fiber array setup. Figure 4.15: 24 Hour Test: Power vs. Time Figure 4.16: Power Change per 5 Minutes 75 4.3. Automated Setup Tests and Measured Results The coupling power drops dramatically over the duration of the exper- iment. The DDS200 stages used in the fiber array setup appear to be not as stable as the MAX300 stages used in the fiber-to-fiber setup. The total power drop of 43 dBm over 24 hours illustrated in Figure 4.15 corresponds to a 3 µm and 2 µm motor movement in Y axis and X axis motorized stage respectively; these values are obtained from comparing the re-aligned motor coordinates (after stage drift) and the motor coordinates before the drift occurs. The power change per 5 minutes illustrated in figure 4.16 shows a maximum drop of 1 dBm over the duration of 5 minutes. As a result, fiber array automated measurement station is currently not suitable for long du- ration single device measurements. 4.3.3 Fiber Array Angles vs. Measurement Peaks The fiber-to-grating angle test performed on the fiber array setup follows the same concept as illustrated for the fiber-to-fiber setup (see section 3.3.1). Figure 4.17: Fiber Ribbon Angle vs. Measurement Peaks At optimal angle, the coupling power is -30.81 dBm at center trough wavelength 1548.17 nm. With a -2 degree change relative to the optimal an- gle, the coupling power is -35.95 dBm at center trough wavelength 1548.20 nm. With a +2 degree change relative to the optimal angle, the coupling 76 4.3. Automated Setup Tests and Measured Results power is -36.33 dBm at center trough wavelength 1548.16 nm (see Figure 4.17). The power drop when the fiber-to-grating coupler angle is not opti- mized suggests that re-optimization of the fiber array ribbon angle should be performed each time the device chip is changed. 4.3.4 Device Measurement Results In this section, device measurement results obtained from the fiber ribbon automated setup are included. These measurements include grating-ring resonators, bio-sensing ring resonators, and grating couplers. Figure 4.18: These are the through and drop port response of grating-ring resonators designed by Wei Shi (manuscript in preparation) [14]. 77 4.3. Automated Setup Tests and Measured Results Figure 4.19: This is a measurement of a grating coupler pair designed by Oscar Wang. This design consists of two grating couplers separated 127 µm apart; they are connected together with a straight waveguide. The -7.7 dBm coupling power obtained suggests that the grating couplers have a 3.8 dBm power loss each. This is the highest coupling power value observed with the fiber-to-fiber or fiber ribbon setup [9]. 78 4.3. Automated Setup Tests and Measured Results Figure 4.20: These ring resonators are designed to operate at 1220 nm by Jonas Flueckiger. A 1220 nm laser is used for this experiment. This plot illustrates the shift observed when the device is exposed to solutions with different NaCl concentrations [20]. 79 Chapter 5 Conclusion The primary goal of this thesis is to improve the traditional photonic de- vice design flow. With the mask drawing methods introduced, device sim- ulation and layout design can occur simultaneously. The introduced mask design methods, nested PCell approach and hierarchy approach, are capa- ble of generating device structures with different parameter combinations effectively. As a result, simulations can be performed directly on the gener- ated GDS mask files to more accurately predict device performance. Bragg grating designs, for example, benefit from this feature significantly because they require accurate lithography simulation follow by FDTD to accurately predict the device performance. With multiple mask-layout-to-simulation iterations, the physical drawing constraints are kept in check while device performance is being imrpoved. Therefore, situations where optimal device parameters are physically incompatible with fabrication process will not oc- cur. The nested PCell approach and hierarchy approach are both scripted; this makes error fixing trivial compared to traditional manual mask drawing approaches. As silicon photonic research groups evolve from experimenting with simple photonic structures into studying complex devices or systems, having a quality mask design method that improves the design efficiency, reduces design error, and emphasizes the mask re-usability becomes more crucial towards improving their research flow. Hence, the application of this method towards all future photonic masks designs is advised. To effectively carry out device testing, we introduce the concept of two automated measurement stations, the fiber-to-fiber setup and the fiber ar- ray setup. By linking the coupler coordinates in the mask GDS file to the measurement algorithm, the automatic GDS coodinate-driven testing is pos- sible. Switching from manual measurement stations to automated stations provide a big leap in terms of photonic device design efficiency. With tradi- tional manual testing stations, the measurement process requires a tremen- dous amount of time and effort because it requires ones presence. With the testing procedure fully automated, hours that are required to obtain measurement results can be minimized. As a result, the implementation of automated stations are advised in order to further improve the efficiency of 80 Chapter 5. Conclusion silicon design flow. The active device measurement is not yet supported. To add the active device measurement capability, we require automated actu- ation to adjust the height of chip so it can be raised to be in contact with the added probe. The fiber-to-fiber and fiber array automated measurement stations may serve the same purpose, but they are two very different stations due to their design architecture and parts used. The pros and cons of the fiber-to-fiber and the fiber array setups are illustrated below: Fiber-to-Fiber Setup Pros: ˆ Allows multi-device testing ˆ Supports temperature control ˆ Allow almost any input/output grating coupler configuration ˆ Has minimum stage drift overtime ˆ Easy coupling fiber replacement when damaged ˆ Easy device alignment ˆ Supports 1 input and multiple output device configuration Fiber-to-Fiber Setup Cons: ˆ Presently Supports only passive device measurement ˆ Does not support chip-level automated testing due to stage travel lim- itations ˆ Multi-device testing limited by the 4 mm stage travel ˆ High insertion loss; the total insertion loss is typically around -17 dB ˆ Sensitive to acoustic vibration (introduces noise to the measurement) Fiber Array Setup Pros: ˆ Allows multi-device testing ˆ Allows chip-level testing ˆ Low insertion loss; the total insertion loss is typically around -7.7 dB ˆ Fiber array measurements have less ripple noise 81 Chapter 5. Conclusion ˆ Additional probes can be easily added to support active device mea- surements Fiber Array Setup Cons: ˆ Presently Supports only passive device measurement ˆ Requires paired input/output couplers ˆ Temperature control not yet supported ˆ Not suitable for long measurements due to excessive stage drift over- time ˆ Fiber array needs to be re-ordered when damaged ˆ Fiber array is difficult to align manually ˆ 1 input and multiple output device measurement requires multiple photodetectors and is limited to 3 output channels only for the 4- channel fiber array we purchased The insertion loss values listed are not inherent. They are the best coupling loss observed with our current setups. Both the grating coupler and the cleaved fiber or polished fiber array contribute to this loss and can be further improved. After installing the fiber-to-fiber and the fiber ribbon setup, experiments that require multiple measurements only require an initial set up time of 10 minutes. This is a large efficiency improvement compared to our outdated manual setup where measuring 30 devices requires one’s constant attention of 1 to 2 hours. By implementing the PCell method, the hierarchy method, and the au- tomated testing stations, the overall efficiency of the silicon photonic design process is improved; the design process is becoming more like CMOS analog design process. Companies, such as Luxtera, have been integrating optic de- signs into their fabrication platform. Ultimately, the characterized optical components become basic circuit building blocks, like resistors, capacitors, or diodes in CMOS designs, which can be accessed as part of a toolkit for op- toelectonic circuit design [26]. IPKISS, developed by the Photonic Research Group of Ghent University and IMEC, is another program that can be used to design photonic components and complex photonic integrated circuits. A designer can directly simulate the defined photonic components in electro- magnetic solvers and then integrate them into a photonic circuit for mask 82 5.1. Suggestions for Future Work fabrication [28]. To the best of our knowledge, there are no commercial sys- tem available for the fiber-to-fiber measurement station introduced. Both OpSIS and Luxtera use fiber array ribbon in their wafer-level automated testing stations. Active device measurement is also available on Luxtera’s testing platform. In the near future, we want to improve our mask de- sign process to include schematic driven layout and layout versus schematic verification. Also we want to improve the capability of the current fiber-to- fiber and fiber array measurement stations and meet the requirements for automated active device wafer-level testing. 5.1 Suggestions for Future Work 1. Pyxis Development ˆ Categorize GDS and PCell Library components ˆ Generate documentations for developed library components ˆ Implement Pyxis Auto-routing tool to accelerate Schematic Driven Layout flow and allow system level simulation capability. ˆ Implement new Mentor Graphics tools so Layout Versus Schematic (LVS) verification is possible. 2. Fiber-to-Fiber Measurement Station ˆ Improve fiber-to-coupler angle adjustment by re-designing fiber arm ˆ Implement a height adjustment algorithm to maximize coupling efficiency ˆ Further study is required to characterize the motor drift over time ˆ Re-configure the station to allow active device measurement ˆ Re-design fiber holder to allow the implementation of lensed fibers 3. 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URL: www.ipkiss.org 86 Appendix A Taper PCell Script function my_taper3() { local device = $get_device_iobj(); local length = $get_property_value(device,"length"); local my_layer = $get_property_value(device,"my_layer"); local h = $get_property_value(device,"h"); local h2 = $get_property_value(device,"h2"); local tl = $get_property_value(device,"tl"); build_taper(my_layer,length, h, h2, tl); } function build_taper(my_layer: string {default="Layer1"}, length : number {default=3}, h : number {default=1}, h2 : number {default=1}, tl : number {default=100}) { local se = 3; $add_shape([ [0,h2],[1*length/100,h2+h/10], [4*length/100,h2+2*h/10],[9*length/100,h2+3*h/10], [16*length/100,h2+4*h/10],[25*length/100,h2+5*h/10], [36*length/100,h2+6*h/10],[49*length/100,h2+7*h/10], [64*length/100,h2+8*h/10],[81*length/100,h2+9*h/10], [100*length/100,h2+10*h/10],[length,h2] ],se); $add_shape([ [0,0],[1*length/100,-h/10], [4*length/100,2*-h/10],[9*length/100,3*-h/10], [16*length/100,4*-h/10],[25*length/100,5*-h/10], [36*length/100,6*-h/10],[49*length/100,7*-h/10], [64*length/100,8*-h/10],[81*length/100,9*-h/10], [100*length/100,-10*h/10],[length,0] ],se); } function taper_parameters( my_layer: optional string {default = "Layer1" }, length: optional number {default =3},h: optional number {default =1}, h2: optional number {default =1}, tl: optional number {default =100}) { return [ ["my_layer",my_layer],["length",$g(length)],["h",$g(h)], 87 Appendix A. Taper PCell Script ["h2",$g(h2)], ["tl",$g(tl)] ]; } 88

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