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Description

The stagnated increase in CPU frequency and the resulting trend in HPC towards massively parallel systems poses new challenges for HPC applications. The ongoing trend towards massive parallelism (accelerator cards and many-core systems) requires redesigning existing algorithms to cope with these architectures. In this presentation we will focus on oscillatory problems. Solving them with a regular time stepping method leads to a timestep-by-step sequentialization in the time dimension. In combination with the CFL limitation, an increasing resolutions also results in an increase in the number of these sequential time steps. For problems which are already limited in their scalability this directly leads to an increase in wall clock time which can make the results less valuable or even useless. Based on underlying properties of oscillatory problems we make use of a recently developed method of a "rational approximation of exponential integrator" (REXI). This method uses features of linear oscillatory problems which allows a massively parallel formulation. This yields several beneficial advantages: e.g. an increase in resolution does not lead to an increase in the number of time steps as it is the case with conventional time stepping methods. In contrast, it leads to an increase in the degree of parallelization. Our results show speedups of over 2 orders of magnitude compared to a standard time stepping method and a scalability model indicates robust scalability beyond 100k cores in case of large time step sizes. Finally, an extension to a semi-Lagrangian time stepping scheme to cope with non-linearities will be discussed.